1 /* 2 * Copyright (c) 1988 Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms are permitted 6 * provided that the above copyright notice and this paragraph are 7 * duplicated in all such forms and that any documentation, 8 * advertising materials, and other materials related to such 9 * distribution and use acknowledge that the software was developed 10 * by the University of California, Berkeley. The name of the 11 * University may not be used to endorse or promote products derived 12 * from this software without specific prior written permission. 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 15 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 16 * 17 * @(#)vbaparam.h 7.2 (Berkeley) 06/29/88 18 */ 19 20 /* 21 * Parameters related to the VERSAbus i/o configuration. 22 */ 23 24 /* 25 * VERSAbus i/o devices use either memory mapped interfaces 26 * or mapped i/o register banks, or some of both. Page tables 27 * are allocated at boot time by each device driver, as needed. 28 * VMEMmap is used to map a fixed size portion of the VERSAbus 29 * i/o space, while VMEMmap1 maps dynamically defined portions 30 * for devices which utilize shared i/o memory. VBmap is used 31 * for mapping kernel intermediate buffers for DMA devices which 32 * are incapable of utilizing user virtual addresses or which 33 * require page aligned i/o buffers. The size of the VMEMmap1 34 * VBmap tables must be large enough for the needs of all devices 35 * in the system. 36 */ 37 extern struct pte VMEMmap[], VMEMmap1[]; 38 extern caddr_t vmem1, vmemend; 39 extern struct pte VBmap[]; 40 extern caddr_t vbbase, vbend; 41 42 /* 43 * The following macros relate to the segmentation of the VERSAbus 44 * i/o space. 45 * 46 * The VERSAbus adapter segments the i/o space (as seen by the cpu) 47 * into three regions. Cpu accesses to the upper 64Kb of the i/o space 48 * generate VERSAbus cycles with a 16-bit address and a non-privileged 49 * short i/o space address modifier. Accesses to the next 1Mb - 64Kb 50 * generate 24-bit addresses and a non-privileged standard address 51 * modifier. Accesses to the remainder of the 1Gb i/o space generate 52 * 32-bit addresses with a non-privileged extended address modifier. 53 * Beware that 32-bit addresses generated from this region always have 54 * zero in the upper 2 bits; e.g. a reference to physical address fe000000 55 * results in a VERSAbus address of 3e000000. 56 */ 57 #define VBIO16BIT(a) ((unsigned)0xfffe0000 <= ((unsigned)(a))) 58 #define VBIO24BIT(a) ((unsigned)0xff000000 <= ((unsigned)(a)) && \ 59 ((unsigned)(a)) < (unsigned)0xfffe0000) 60 #define VBIO32BIT(a) (((unsigned)(a)) < (unsigned)0xff000000) 61 62 /* 63 * The following constants define the fixed size map of the 64 * VERSAbus i/o space. The values should reflect the range 65 * of i/o addresses used by all the controllers unprepared 66 * to allocate and initialize their own page maps. 67 */ 68 #define VBIOBASE 0xfff00000 /* base of VERSAbus address space */ 69 #define VBIOEND 0xffffee45 /* last address in mapped space */ 70 /* number of entries in the system page table for i/o space */ 71 #define VBIOSIZE btoc(VBIOEND-VBIOBASE) 72 /* is device in mapped region */ 73 #define VBIOMAPPED(a) ((unsigned)VBIOBASE <= ((unsigned)(a)) && \ 74 ((unsigned)(a)) <= (unsigned)VBIOEND) 75 #define vboff(addr) ((int)(((caddr_t)(addr)) - VBIOBASE)) 76