15193899aSPaolo Bonzini /* 25193899aSPaolo Bonzini * TI OMAP processors GPIO emulation. 35193899aSPaolo Bonzini * 45193899aSPaolo Bonzini * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org> 55193899aSPaolo Bonzini * Copyright (C) 2007-2009 Nokia Corporation 65193899aSPaolo Bonzini * 75193899aSPaolo Bonzini * This program is free software; you can redistribute it and/or 85193899aSPaolo Bonzini * modify it under the terms of the GNU General Public License as 95193899aSPaolo Bonzini * published by the Free Software Foundation; either version 2 or 105193899aSPaolo Bonzini * (at your option) version 3 of the License. 115193899aSPaolo Bonzini * 125193899aSPaolo Bonzini * This program is distributed in the hope that it will be useful, 135193899aSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of 145193899aSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 155193899aSPaolo Bonzini * GNU General Public License for more details. 165193899aSPaolo Bonzini * 175193899aSPaolo Bonzini * You should have received a copy of the GNU General Public License along 185193899aSPaolo Bonzini * with this program; if not, see <http://www.gnu.org/licenses/>. 195193899aSPaolo Bonzini */ 205193899aSPaolo Bonzini 2117b7f2dbSPeter Maydell #include "qemu/osdep.h" 225193899aSPaolo Bonzini #include "hw/hw.h" 235193899aSPaolo Bonzini #include "hw/arm/omap.h" 245193899aSPaolo Bonzini #include "hw/sysbus.h" 2584a3a53cSMarkus Armbruster #include "qemu/error-report.h" 26*0b8fa32fSMarkus Armbruster #include "qemu/module.h" 27ebc116f8Sxiaoqiang zhao #include "qapi/error.h" 285193899aSPaolo Bonzini 295193899aSPaolo Bonzini struct omap_gpio_s { 305193899aSPaolo Bonzini qemu_irq irq; 315193899aSPaolo Bonzini qemu_irq handler[16]; 325193899aSPaolo Bonzini 335193899aSPaolo Bonzini uint16_t inputs; 345193899aSPaolo Bonzini uint16_t outputs; 355193899aSPaolo Bonzini uint16_t dir; 365193899aSPaolo Bonzini uint16_t edge; 375193899aSPaolo Bonzini uint16_t mask; 385193899aSPaolo Bonzini uint16_t ints; 395193899aSPaolo Bonzini uint16_t pins; 405193899aSPaolo Bonzini }; 415193899aSPaolo Bonzini 421d300b5fSAndreas Färber #define TYPE_OMAP1_GPIO "omap-gpio" 431d300b5fSAndreas Färber #define OMAP1_GPIO(obj) \ 441d300b5fSAndreas Färber OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) 451d300b5fSAndreas Färber 465193899aSPaolo Bonzini struct omap_gpif_s { 471d300b5fSAndreas Färber SysBusDevice parent_obj; 481d300b5fSAndreas Färber 495193899aSPaolo Bonzini MemoryRegion iomem; 505193899aSPaolo Bonzini int mpu_model; 515193899aSPaolo Bonzini void *clk; 525193899aSPaolo Bonzini struct omap_gpio_s omap1; 535193899aSPaolo Bonzini }; 545193899aSPaolo Bonzini 555193899aSPaolo Bonzini /* General-Purpose I/O of OMAP1 */ 565193899aSPaolo Bonzini static void omap_gpio_set(void *opaque, int line, int level) 575193899aSPaolo Bonzini { 585193899aSPaolo Bonzini struct omap_gpio_s *s = &((struct omap_gpif_s *) opaque)->omap1; 595193899aSPaolo Bonzini uint16_t prev = s->inputs; 605193899aSPaolo Bonzini 615193899aSPaolo Bonzini if (level) 625193899aSPaolo Bonzini s->inputs |= 1 << line; 635193899aSPaolo Bonzini else 645193899aSPaolo Bonzini s->inputs &= ~(1 << line); 655193899aSPaolo Bonzini 665193899aSPaolo Bonzini if (((s->edge & s->inputs & ~prev) | (~s->edge & ~s->inputs & prev)) & 675193899aSPaolo Bonzini (1 << line) & s->dir & ~s->mask) { 685193899aSPaolo Bonzini s->ints |= 1 << line; 695193899aSPaolo Bonzini qemu_irq_raise(s->irq); 705193899aSPaolo Bonzini } 715193899aSPaolo Bonzini } 725193899aSPaolo Bonzini 735193899aSPaolo Bonzini static uint64_t omap_gpio_read(void *opaque, hwaddr addr, 745193899aSPaolo Bonzini unsigned size) 755193899aSPaolo Bonzini { 765193899aSPaolo Bonzini struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; 775193899aSPaolo Bonzini int offset = addr & OMAP_MPUI_REG_MASK; 785193899aSPaolo Bonzini 795193899aSPaolo Bonzini if (size != 2) { 805193899aSPaolo Bonzini return omap_badwidth_read16(opaque, addr); 815193899aSPaolo Bonzini } 825193899aSPaolo Bonzini 835193899aSPaolo Bonzini switch (offset) { 845193899aSPaolo Bonzini case 0x00: /* DATA_INPUT */ 855193899aSPaolo Bonzini return s->inputs & s->pins; 865193899aSPaolo Bonzini 875193899aSPaolo Bonzini case 0x04: /* DATA_OUTPUT */ 885193899aSPaolo Bonzini return s->outputs; 895193899aSPaolo Bonzini 905193899aSPaolo Bonzini case 0x08: /* DIRECTION_CONTROL */ 915193899aSPaolo Bonzini return s->dir; 925193899aSPaolo Bonzini 935193899aSPaolo Bonzini case 0x0c: /* INTERRUPT_CONTROL */ 945193899aSPaolo Bonzini return s->edge; 955193899aSPaolo Bonzini 965193899aSPaolo Bonzini case 0x10: /* INTERRUPT_MASK */ 975193899aSPaolo Bonzini return s->mask; 985193899aSPaolo Bonzini 995193899aSPaolo Bonzini case 0x14: /* INTERRUPT_STATUS */ 1005193899aSPaolo Bonzini return s->ints; 1015193899aSPaolo Bonzini 1025193899aSPaolo Bonzini case 0x18: /* PIN_CONTROL (not in OMAP310) */ 1035193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1045193899aSPaolo Bonzini return s->pins; 1055193899aSPaolo Bonzini } 1065193899aSPaolo Bonzini 1075193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1085193899aSPaolo Bonzini return 0; 1095193899aSPaolo Bonzini } 1105193899aSPaolo Bonzini 1115193899aSPaolo Bonzini static void omap_gpio_write(void *opaque, hwaddr addr, 1125193899aSPaolo Bonzini uint64_t value, unsigned size) 1135193899aSPaolo Bonzini { 1145193899aSPaolo Bonzini struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; 1155193899aSPaolo Bonzini int offset = addr & OMAP_MPUI_REG_MASK; 1165193899aSPaolo Bonzini uint16_t diff; 1175193899aSPaolo Bonzini int ln; 1185193899aSPaolo Bonzini 1195193899aSPaolo Bonzini if (size != 2) { 12077a8257eSStefan Weil omap_badwidth_write16(opaque, addr, value); 12177a8257eSStefan Weil return; 1225193899aSPaolo Bonzini } 1235193899aSPaolo Bonzini 1245193899aSPaolo Bonzini switch (offset) { 1255193899aSPaolo Bonzini case 0x00: /* DATA_INPUT */ 1265193899aSPaolo Bonzini OMAP_RO_REG(addr); 1275193899aSPaolo Bonzini return; 1285193899aSPaolo Bonzini 1295193899aSPaolo Bonzini case 0x04: /* DATA_OUTPUT */ 1305193899aSPaolo Bonzini diff = (s->outputs ^ value) & ~s->dir; 1315193899aSPaolo Bonzini s->outputs = value; 132bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 1335193899aSPaolo Bonzini if (s->handler[ln]) 1345193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 1355193899aSPaolo Bonzini diff &= ~(1 << ln); 1365193899aSPaolo Bonzini } 1375193899aSPaolo Bonzini break; 1385193899aSPaolo Bonzini 1395193899aSPaolo Bonzini case 0x08: /* DIRECTION_CONTROL */ 1405193899aSPaolo Bonzini diff = s->outputs & (s->dir ^ value); 1415193899aSPaolo Bonzini s->dir = value; 1425193899aSPaolo Bonzini 1435193899aSPaolo Bonzini value = s->outputs & ~s->dir; 144bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 1455193899aSPaolo Bonzini if (s->handler[ln]) 1465193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 1475193899aSPaolo Bonzini diff &= ~(1 << ln); 1485193899aSPaolo Bonzini } 1495193899aSPaolo Bonzini break; 1505193899aSPaolo Bonzini 1515193899aSPaolo Bonzini case 0x0c: /* INTERRUPT_CONTROL */ 1525193899aSPaolo Bonzini s->edge = value; 1535193899aSPaolo Bonzini break; 1545193899aSPaolo Bonzini 1555193899aSPaolo Bonzini case 0x10: /* INTERRUPT_MASK */ 1565193899aSPaolo Bonzini s->mask = value; 1575193899aSPaolo Bonzini break; 1585193899aSPaolo Bonzini 1595193899aSPaolo Bonzini case 0x14: /* INTERRUPT_STATUS */ 1605193899aSPaolo Bonzini s->ints &= ~value; 1615193899aSPaolo Bonzini if (!s->ints) 1625193899aSPaolo Bonzini qemu_irq_lower(s->irq); 1635193899aSPaolo Bonzini break; 1645193899aSPaolo Bonzini 1655193899aSPaolo Bonzini case 0x18: /* PIN_CONTROL (not in OMAP310 TRM) */ 1665193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1675193899aSPaolo Bonzini s->pins = value; 1685193899aSPaolo Bonzini break; 1695193899aSPaolo Bonzini 1705193899aSPaolo Bonzini default: 1715193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1725193899aSPaolo Bonzini return; 1735193899aSPaolo Bonzini } 1745193899aSPaolo Bonzini } 1755193899aSPaolo Bonzini 1765193899aSPaolo Bonzini /* *Some* sources say the memory region is 32-bit. */ 1775193899aSPaolo Bonzini static const MemoryRegionOps omap_gpio_ops = { 1785193899aSPaolo Bonzini .read = omap_gpio_read, 1795193899aSPaolo Bonzini .write = omap_gpio_write, 1805193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 1815193899aSPaolo Bonzini }; 1825193899aSPaolo Bonzini 1835193899aSPaolo Bonzini static void omap_gpio_reset(struct omap_gpio_s *s) 1845193899aSPaolo Bonzini { 1855193899aSPaolo Bonzini s->inputs = 0; 1865193899aSPaolo Bonzini s->outputs = ~0; 1875193899aSPaolo Bonzini s->dir = ~0; 1885193899aSPaolo Bonzini s->edge = ~0; 1895193899aSPaolo Bonzini s->mask = ~0; 1905193899aSPaolo Bonzini s->ints = 0; 1915193899aSPaolo Bonzini s->pins = ~0; 1925193899aSPaolo Bonzini } 1935193899aSPaolo Bonzini 1945193899aSPaolo Bonzini struct omap2_gpio_s { 1955193899aSPaolo Bonzini qemu_irq irq[2]; 1965193899aSPaolo Bonzini qemu_irq wkup; 1975193899aSPaolo Bonzini qemu_irq *handler; 1985193899aSPaolo Bonzini MemoryRegion iomem; 1995193899aSPaolo Bonzini 2005193899aSPaolo Bonzini uint8_t revision; 2015193899aSPaolo Bonzini uint8_t config[2]; 2025193899aSPaolo Bonzini uint32_t inputs; 2035193899aSPaolo Bonzini uint32_t outputs; 2045193899aSPaolo Bonzini uint32_t dir; 2055193899aSPaolo Bonzini uint32_t level[2]; 2065193899aSPaolo Bonzini uint32_t edge[2]; 2075193899aSPaolo Bonzini uint32_t mask[2]; 2085193899aSPaolo Bonzini uint32_t wumask; 2095193899aSPaolo Bonzini uint32_t ints[2]; 2105193899aSPaolo Bonzini uint32_t debounce; 2115193899aSPaolo Bonzini uint8_t delay; 2125193899aSPaolo Bonzini }; 2135193899aSPaolo Bonzini 21474d1e352SAndreas Färber #define TYPE_OMAP2_GPIO "omap2-gpio" 21574d1e352SAndreas Färber #define OMAP2_GPIO(obj) \ 21674d1e352SAndreas Färber OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) 21774d1e352SAndreas Färber 2185193899aSPaolo Bonzini struct omap2_gpif_s { 21974d1e352SAndreas Färber SysBusDevice parent_obj; 22074d1e352SAndreas Färber 2215193899aSPaolo Bonzini MemoryRegion iomem; 2225193899aSPaolo Bonzini int mpu_model; 2235193899aSPaolo Bonzini void *iclk; 2245193899aSPaolo Bonzini void *fclk[6]; 2255193899aSPaolo Bonzini int modulecount; 2265193899aSPaolo Bonzini struct omap2_gpio_s *modules; 2275193899aSPaolo Bonzini qemu_irq *handler; 2285193899aSPaolo Bonzini int autoidle; 2295193899aSPaolo Bonzini int gpo; 2305193899aSPaolo Bonzini }; 2315193899aSPaolo Bonzini 2325193899aSPaolo Bonzini /* General-Purpose Interface of OMAP2/3 */ 2335193899aSPaolo Bonzini static inline void omap2_gpio_module_int_update(struct omap2_gpio_s *s, 2345193899aSPaolo Bonzini int line) 2355193899aSPaolo Bonzini { 2365193899aSPaolo Bonzini qemu_set_irq(s->irq[line], s->ints[line] & s->mask[line]); 2375193899aSPaolo Bonzini } 2385193899aSPaolo Bonzini 2395193899aSPaolo Bonzini static void omap2_gpio_module_wake(struct omap2_gpio_s *s, int line) 2405193899aSPaolo Bonzini { 2415193899aSPaolo Bonzini if (!(s->config[0] & (1 << 2))) /* ENAWAKEUP */ 2425193899aSPaolo Bonzini return; 2435193899aSPaolo Bonzini if (!(s->config[0] & (3 << 3))) /* Force Idle */ 2445193899aSPaolo Bonzini return; 2455193899aSPaolo Bonzini if (!(s->wumask & (1 << line))) 2465193899aSPaolo Bonzini return; 2475193899aSPaolo Bonzini 2485193899aSPaolo Bonzini qemu_irq_raise(s->wkup); 2495193899aSPaolo Bonzini } 2505193899aSPaolo Bonzini 2515193899aSPaolo Bonzini static inline void omap2_gpio_module_out_update(struct omap2_gpio_s *s, 2525193899aSPaolo Bonzini uint32_t diff) 2535193899aSPaolo Bonzini { 2545193899aSPaolo Bonzini int ln; 2555193899aSPaolo Bonzini 2565193899aSPaolo Bonzini s->outputs ^= diff; 2575193899aSPaolo Bonzini diff &= ~s->dir; 258bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 2595193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (s->outputs >> ln) & 1); 2605193899aSPaolo Bonzini diff &= ~(1 << ln); 2615193899aSPaolo Bonzini } 2625193899aSPaolo Bonzini } 2635193899aSPaolo Bonzini 2645193899aSPaolo Bonzini static void omap2_gpio_module_level_update(struct omap2_gpio_s *s, int line) 2655193899aSPaolo Bonzini { 2665193899aSPaolo Bonzini s->ints[line] |= s->dir & 2675193899aSPaolo Bonzini ((s->inputs & s->level[1]) | (~s->inputs & s->level[0])); 2685193899aSPaolo Bonzini omap2_gpio_module_int_update(s, line); 2695193899aSPaolo Bonzini } 2705193899aSPaolo Bonzini 2715193899aSPaolo Bonzini static inline void omap2_gpio_module_int(struct omap2_gpio_s *s, int line) 2725193899aSPaolo Bonzini { 2735193899aSPaolo Bonzini s->ints[0] |= 1 << line; 2745193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 2755193899aSPaolo Bonzini s->ints[1] |= 1 << line; 2765193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 2775193899aSPaolo Bonzini omap2_gpio_module_wake(s, line); 2785193899aSPaolo Bonzini } 2795193899aSPaolo Bonzini 2805193899aSPaolo Bonzini static void omap2_gpio_set(void *opaque, int line, int level) 2815193899aSPaolo Bonzini { 2825193899aSPaolo Bonzini struct omap2_gpif_s *p = opaque; 2835193899aSPaolo Bonzini struct omap2_gpio_s *s = &p->modules[line >> 5]; 2845193899aSPaolo Bonzini 2855193899aSPaolo Bonzini line &= 31; 2865193899aSPaolo Bonzini if (level) { 2875193899aSPaolo Bonzini if (s->dir & (1 << line) & ((~s->inputs & s->edge[0]) | s->level[1])) 2885193899aSPaolo Bonzini omap2_gpio_module_int(s, line); 2895193899aSPaolo Bonzini s->inputs |= 1 << line; 2905193899aSPaolo Bonzini } else { 2915193899aSPaolo Bonzini if (s->dir & (1 << line) & ((s->inputs & s->edge[1]) | s->level[0])) 2925193899aSPaolo Bonzini omap2_gpio_module_int(s, line); 2935193899aSPaolo Bonzini s->inputs &= ~(1 << line); 2945193899aSPaolo Bonzini } 2955193899aSPaolo Bonzini } 2965193899aSPaolo Bonzini 2975193899aSPaolo Bonzini static void omap2_gpio_module_reset(struct omap2_gpio_s *s) 2985193899aSPaolo Bonzini { 2995193899aSPaolo Bonzini s->config[0] = 0; 3005193899aSPaolo Bonzini s->config[1] = 2; 3015193899aSPaolo Bonzini s->ints[0] = 0; 3025193899aSPaolo Bonzini s->ints[1] = 0; 3035193899aSPaolo Bonzini s->mask[0] = 0; 3045193899aSPaolo Bonzini s->mask[1] = 0; 3055193899aSPaolo Bonzini s->wumask = 0; 3065193899aSPaolo Bonzini s->dir = ~0; 3075193899aSPaolo Bonzini s->level[0] = 0; 3085193899aSPaolo Bonzini s->level[1] = 0; 3095193899aSPaolo Bonzini s->edge[0] = 0; 3105193899aSPaolo Bonzini s->edge[1] = 0; 3115193899aSPaolo Bonzini s->debounce = 0; 3125193899aSPaolo Bonzini s->delay = 0; 3135193899aSPaolo Bonzini } 3145193899aSPaolo Bonzini 3155193899aSPaolo Bonzini static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr) 3165193899aSPaolo Bonzini { 3175193899aSPaolo Bonzini struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; 3185193899aSPaolo Bonzini 3195193899aSPaolo Bonzini switch (addr) { 3205193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 3215193899aSPaolo Bonzini return s->revision; 3225193899aSPaolo Bonzini 3235193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 3245193899aSPaolo Bonzini return s->config[0]; 3255193899aSPaolo Bonzini 3265193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 3275193899aSPaolo Bonzini return 0x01; 3285193899aSPaolo Bonzini 3295193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 3305193899aSPaolo Bonzini return s->ints[0]; 3315193899aSPaolo Bonzini 3325193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 3335193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 3345193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 3355193899aSPaolo Bonzini return s->mask[0]; 3365193899aSPaolo Bonzini 3375193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 3385193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 3395193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 3405193899aSPaolo Bonzini return s->wumask; 3415193899aSPaolo Bonzini 3425193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 3435193899aSPaolo Bonzini return s->ints[1]; 3445193899aSPaolo Bonzini 3455193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 3465193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 3475193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 3485193899aSPaolo Bonzini return s->mask[1]; 3495193899aSPaolo Bonzini 3505193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 3515193899aSPaolo Bonzini return s->config[1]; 3525193899aSPaolo Bonzini 3535193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 3545193899aSPaolo Bonzini return s->dir; 3555193899aSPaolo Bonzini 3565193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 3575193899aSPaolo Bonzini return s->inputs; 3585193899aSPaolo Bonzini 3595193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 3605193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 3615193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 3625193899aSPaolo Bonzini return s->outputs; 3635193899aSPaolo Bonzini 3645193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 3655193899aSPaolo Bonzini return s->level[0]; 3665193899aSPaolo Bonzini 3675193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 3685193899aSPaolo Bonzini return s->level[1]; 3695193899aSPaolo Bonzini 3705193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 3715193899aSPaolo Bonzini return s->edge[0]; 3725193899aSPaolo Bonzini 3735193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 3745193899aSPaolo Bonzini return s->edge[1]; 3755193899aSPaolo Bonzini 3765193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 3775193899aSPaolo Bonzini return s->debounce; 3785193899aSPaolo Bonzini 3795193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 3805193899aSPaolo Bonzini return s->delay; 3815193899aSPaolo Bonzini } 3825193899aSPaolo Bonzini 3835193899aSPaolo Bonzini OMAP_BAD_REG(addr); 3845193899aSPaolo Bonzini return 0; 3855193899aSPaolo Bonzini } 3865193899aSPaolo Bonzini 3875193899aSPaolo Bonzini static void omap2_gpio_module_write(void *opaque, hwaddr addr, 3885193899aSPaolo Bonzini uint32_t value) 3895193899aSPaolo Bonzini { 3905193899aSPaolo Bonzini struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; 3915193899aSPaolo Bonzini uint32_t diff; 3925193899aSPaolo Bonzini int ln; 3935193899aSPaolo Bonzini 3945193899aSPaolo Bonzini switch (addr) { 3955193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 3965193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 3975193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 3985193899aSPaolo Bonzini OMAP_RO_REG(addr); 3995193899aSPaolo Bonzini break; 4005193899aSPaolo Bonzini 4015193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 4025193899aSPaolo Bonzini if (((value >> 3) & 3) == 3) 403a89f364aSAlistair Francis fprintf(stderr, "%s: bad IDLEMODE value\n", __func__); 4045193899aSPaolo Bonzini if (value & 2) 4055193899aSPaolo Bonzini omap2_gpio_module_reset(s); 4065193899aSPaolo Bonzini s->config[0] = value & 0x1d; 4075193899aSPaolo Bonzini break; 4085193899aSPaolo Bonzini 4095193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 4105193899aSPaolo Bonzini if (s->ints[0] & value) { 4115193899aSPaolo Bonzini s->ints[0] &= ~value; 4125193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4135193899aSPaolo Bonzini } 4145193899aSPaolo Bonzini break; 4155193899aSPaolo Bonzini 4165193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 4175193899aSPaolo Bonzini s->mask[0] = value; 4185193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4195193899aSPaolo Bonzini break; 4205193899aSPaolo Bonzini 4215193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 4225193899aSPaolo Bonzini s->wumask = value; 4235193899aSPaolo Bonzini break; 4245193899aSPaolo Bonzini 4255193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 4265193899aSPaolo Bonzini if (s->ints[1] & value) { 4275193899aSPaolo Bonzini s->ints[1] &= ~value; 4285193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4295193899aSPaolo Bonzini } 4305193899aSPaolo Bonzini break; 4315193899aSPaolo Bonzini 4325193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 4335193899aSPaolo Bonzini s->mask[1] = value; 4345193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 4355193899aSPaolo Bonzini break; 4365193899aSPaolo Bonzini 4375193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 4385193899aSPaolo Bonzini s->config[1] = value & 7; 4395193899aSPaolo Bonzini break; 4405193899aSPaolo Bonzini 4415193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 4425193899aSPaolo Bonzini diff = s->outputs & (s->dir ^ value); 4435193899aSPaolo Bonzini s->dir = value; 4445193899aSPaolo Bonzini 4455193899aSPaolo Bonzini value = s->outputs & ~s->dir; 446bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 447bd2a8884SStefan Hajnoczi diff &= ~(1 << ln); 4485193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 4495193899aSPaolo Bonzini } 4505193899aSPaolo Bonzini 4515193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4525193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4535193899aSPaolo Bonzini break; 4545193899aSPaolo Bonzini 4555193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 4565193899aSPaolo Bonzini omap2_gpio_module_out_update(s, s->outputs ^ value); 4575193899aSPaolo Bonzini break; 4585193899aSPaolo Bonzini 4595193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 4605193899aSPaolo Bonzini s->level[0] = value; 4615193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4625193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4635193899aSPaolo Bonzini break; 4645193899aSPaolo Bonzini 4655193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 4665193899aSPaolo Bonzini s->level[1] = value; 4675193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4685193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4695193899aSPaolo Bonzini break; 4705193899aSPaolo Bonzini 4715193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 4725193899aSPaolo Bonzini s->edge[0] = value; 4735193899aSPaolo Bonzini break; 4745193899aSPaolo Bonzini 4755193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 4765193899aSPaolo Bonzini s->edge[1] = value; 4775193899aSPaolo Bonzini break; 4785193899aSPaolo Bonzini 4795193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 4805193899aSPaolo Bonzini s->debounce = value; 4815193899aSPaolo Bonzini break; 4825193899aSPaolo Bonzini 4835193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 4845193899aSPaolo Bonzini s->delay = value; 4855193899aSPaolo Bonzini break; 4865193899aSPaolo Bonzini 4875193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 4885193899aSPaolo Bonzini s->mask[0] &= ~value; 4895193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4905193899aSPaolo Bonzini break; 4915193899aSPaolo Bonzini 4925193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 4935193899aSPaolo Bonzini s->mask[0] |= value; 4945193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4955193899aSPaolo Bonzini break; 4965193899aSPaolo Bonzini 4975193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 4985193899aSPaolo Bonzini s->mask[1] &= ~value; 4995193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 5005193899aSPaolo Bonzini break; 5015193899aSPaolo Bonzini 5025193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 5035193899aSPaolo Bonzini s->mask[1] |= value; 5045193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 5055193899aSPaolo Bonzini break; 5065193899aSPaolo Bonzini 5075193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 5085193899aSPaolo Bonzini s->wumask &= ~value; 5095193899aSPaolo Bonzini break; 5105193899aSPaolo Bonzini 5115193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 5125193899aSPaolo Bonzini s->wumask |= value; 5135193899aSPaolo Bonzini break; 5145193899aSPaolo Bonzini 5155193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 5165193899aSPaolo Bonzini omap2_gpio_module_out_update(s, s->outputs & value); 5175193899aSPaolo Bonzini break; 5185193899aSPaolo Bonzini 5195193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 5205193899aSPaolo Bonzini omap2_gpio_module_out_update(s, ~s->outputs & value); 5215193899aSPaolo Bonzini break; 5225193899aSPaolo Bonzini 5235193899aSPaolo Bonzini default: 5245193899aSPaolo Bonzini OMAP_BAD_REG(addr); 5255193899aSPaolo Bonzini return; 5265193899aSPaolo Bonzini } 5275193899aSPaolo Bonzini } 5285193899aSPaolo Bonzini 529940caf1fSPeter Maydell static uint64_t omap2_gpio_module_readp(void *opaque, hwaddr addr, 530940caf1fSPeter Maydell unsigned size) 5315193899aSPaolo Bonzini { 5325193899aSPaolo Bonzini return omap2_gpio_module_read(opaque, addr & ~3) >> ((addr & 3) << 3); 5335193899aSPaolo Bonzini } 5345193899aSPaolo Bonzini 5355193899aSPaolo Bonzini static void omap2_gpio_module_writep(void *opaque, hwaddr addr, 536940caf1fSPeter Maydell uint64_t value, unsigned size) 5375193899aSPaolo Bonzini { 5385193899aSPaolo Bonzini uint32_t cur = 0; 5395193899aSPaolo Bonzini uint32_t mask = 0xffff; 5405193899aSPaolo Bonzini 541940caf1fSPeter Maydell if (size == 4) { 542940caf1fSPeter Maydell omap2_gpio_module_write(opaque, addr, value); 543940caf1fSPeter Maydell return; 544940caf1fSPeter Maydell } 545940caf1fSPeter Maydell 5465193899aSPaolo Bonzini switch (addr & ~3) { 5475193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 5485193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 5495193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 5505193899aSPaolo Bonzini OMAP_RO_REG(addr); 5515193899aSPaolo Bonzini break; 5525193899aSPaolo Bonzini 5535193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 5545193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 5555193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 5565193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 5575193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 5585193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 5595193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 5605193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 5615193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 5625193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 5635193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 5645193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 5655193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 5665193899aSPaolo Bonzini cur = omap2_gpio_module_read(opaque, addr & ~3) & 5675193899aSPaolo Bonzini ~(mask << ((addr & 3) << 3)); 5685193899aSPaolo Bonzini 5695193899aSPaolo Bonzini /* Fall through. */ 5705193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 5715193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 5725193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 5735193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 5745193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 5755193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 5765193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 5775193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 5785193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 5795193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 5805193899aSPaolo Bonzini value <<= (addr & 3) << 3; 5815193899aSPaolo Bonzini omap2_gpio_module_write(opaque, addr, cur | value); 5825193899aSPaolo Bonzini break; 5835193899aSPaolo Bonzini 5845193899aSPaolo Bonzini default: 5855193899aSPaolo Bonzini OMAP_BAD_REG(addr); 5865193899aSPaolo Bonzini return; 5875193899aSPaolo Bonzini } 5885193899aSPaolo Bonzini } 5895193899aSPaolo Bonzini 5905193899aSPaolo Bonzini static const MemoryRegionOps omap2_gpio_module_ops = { 591940caf1fSPeter Maydell .read = omap2_gpio_module_readp, 592940caf1fSPeter Maydell .write = omap2_gpio_module_writep, 593940caf1fSPeter Maydell .valid.min_access_size = 1, 594940caf1fSPeter Maydell .valid.max_access_size = 4, 5955193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 5965193899aSPaolo Bonzini }; 5975193899aSPaolo Bonzini 5985193899aSPaolo Bonzini static void omap_gpif_reset(DeviceState *dev) 5995193899aSPaolo Bonzini { 6001d300b5fSAndreas Färber struct omap_gpif_s *s = OMAP1_GPIO(dev); 6011d300b5fSAndreas Färber 6025193899aSPaolo Bonzini omap_gpio_reset(&s->omap1); 6035193899aSPaolo Bonzini } 6045193899aSPaolo Bonzini 6055193899aSPaolo Bonzini static void omap2_gpif_reset(DeviceState *dev) 6065193899aSPaolo Bonzini { 60774d1e352SAndreas Färber struct omap2_gpif_s *s = OMAP2_GPIO(dev); 6085193899aSPaolo Bonzini int i; 60974d1e352SAndreas Färber 6105193899aSPaolo Bonzini for (i = 0; i < s->modulecount; i++) { 6115193899aSPaolo Bonzini omap2_gpio_module_reset(&s->modules[i]); 6125193899aSPaolo Bonzini } 6135193899aSPaolo Bonzini s->autoidle = 0; 6145193899aSPaolo Bonzini s->gpo = 0; 6155193899aSPaolo Bonzini } 6165193899aSPaolo Bonzini 6175193899aSPaolo Bonzini static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, 6185193899aSPaolo Bonzini unsigned size) 6195193899aSPaolo Bonzini { 6205193899aSPaolo Bonzini struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; 6215193899aSPaolo Bonzini 6225193899aSPaolo Bonzini switch (addr) { 6235193899aSPaolo Bonzini case 0x00: /* IPGENERICOCPSPL_REVISION */ 6245193899aSPaolo Bonzini return 0x18; 6255193899aSPaolo Bonzini 6265193899aSPaolo Bonzini case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ 6275193899aSPaolo Bonzini return s->autoidle; 6285193899aSPaolo Bonzini 6295193899aSPaolo Bonzini case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ 6305193899aSPaolo Bonzini return 0x01; 6315193899aSPaolo Bonzini 6325193899aSPaolo Bonzini case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ 6335193899aSPaolo Bonzini return 0x00; 6345193899aSPaolo Bonzini 6355193899aSPaolo Bonzini case 0x40: /* IPGENERICOCPSPL_GPO */ 6365193899aSPaolo Bonzini return s->gpo; 6375193899aSPaolo Bonzini 6385193899aSPaolo Bonzini case 0x50: /* IPGENERICOCPSPL_GPI */ 6395193899aSPaolo Bonzini return 0x00; 6405193899aSPaolo Bonzini } 6415193899aSPaolo Bonzini 6425193899aSPaolo Bonzini OMAP_BAD_REG(addr); 6435193899aSPaolo Bonzini return 0; 6445193899aSPaolo Bonzini } 6455193899aSPaolo Bonzini 6465193899aSPaolo Bonzini static void omap2_gpif_top_write(void *opaque, hwaddr addr, 6475193899aSPaolo Bonzini uint64_t value, unsigned size) 6485193899aSPaolo Bonzini { 6495193899aSPaolo Bonzini struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; 6505193899aSPaolo Bonzini 6515193899aSPaolo Bonzini switch (addr) { 6525193899aSPaolo Bonzini case 0x00: /* IPGENERICOCPSPL_REVISION */ 6535193899aSPaolo Bonzini case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ 6545193899aSPaolo Bonzini case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ 6555193899aSPaolo Bonzini case 0x50: /* IPGENERICOCPSPL_GPI */ 6565193899aSPaolo Bonzini OMAP_RO_REG(addr); 6575193899aSPaolo Bonzini break; 6585193899aSPaolo Bonzini 6595193899aSPaolo Bonzini case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ 6605193899aSPaolo Bonzini if (value & (1 << 1)) /* SOFTRESET */ 66174d1e352SAndreas Färber omap2_gpif_reset(DEVICE(s)); 6625193899aSPaolo Bonzini s->autoidle = value & 1; 6635193899aSPaolo Bonzini break; 6645193899aSPaolo Bonzini 6655193899aSPaolo Bonzini case 0x40: /* IPGENERICOCPSPL_GPO */ 6665193899aSPaolo Bonzini s->gpo = value & 1; 6675193899aSPaolo Bonzini break; 6685193899aSPaolo Bonzini 6695193899aSPaolo Bonzini default: 6705193899aSPaolo Bonzini OMAP_BAD_REG(addr); 6715193899aSPaolo Bonzini return; 6725193899aSPaolo Bonzini } 6735193899aSPaolo Bonzini } 6745193899aSPaolo Bonzini 6755193899aSPaolo Bonzini static const MemoryRegionOps omap2_gpif_top_ops = { 6765193899aSPaolo Bonzini .read = omap2_gpif_top_read, 6775193899aSPaolo Bonzini .write = omap2_gpif_top_write, 6785193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 6795193899aSPaolo Bonzini }; 6805193899aSPaolo Bonzini 681ebc116f8Sxiaoqiang zhao static void omap_gpio_init(Object *obj) 6825193899aSPaolo Bonzini { 683ebc116f8Sxiaoqiang zhao DeviceState *dev = DEVICE(obj); 684ebc116f8Sxiaoqiang zhao struct omap_gpif_s *s = OMAP1_GPIO(obj); 685ebc116f8Sxiaoqiang zhao SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 6861d300b5fSAndreas Färber 6871d300b5fSAndreas Färber qdev_init_gpio_in(dev, omap_gpio_set, 16); 6881d300b5fSAndreas Färber qdev_init_gpio_out(dev, s->omap1.handler, 16); 6891d300b5fSAndreas Färber sysbus_init_irq(sbd, &s->omap1.irq); 690ebc116f8Sxiaoqiang zhao memory_region_init_io(&s->iomem, obj, &omap_gpio_ops, &s->omap1, 6915193899aSPaolo Bonzini "omap.gpio", 0x1000); 6921d300b5fSAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 6935193899aSPaolo Bonzini } 6945193899aSPaolo Bonzini 695ebc116f8Sxiaoqiang zhao static void omap_gpio_realize(DeviceState *dev, Error **errp) 6965193899aSPaolo Bonzini { 697ebc116f8Sxiaoqiang zhao struct omap_gpif_s *s = OMAP1_GPIO(dev); 698ebc116f8Sxiaoqiang zhao 699ebc116f8Sxiaoqiang zhao if (!s->clk) { 700ebc116f8Sxiaoqiang zhao error_setg(errp, "omap-gpio: clk not connected"); 701ebc116f8Sxiaoqiang zhao } 702ebc116f8Sxiaoqiang zhao } 703ebc116f8Sxiaoqiang zhao 704ebc116f8Sxiaoqiang zhao static void omap2_gpio_realize(DeviceState *dev, Error **errp) 705ebc116f8Sxiaoqiang zhao { 70674d1e352SAndreas Färber struct omap2_gpif_s *s = OMAP2_GPIO(dev); 707ebc116f8Sxiaoqiang zhao SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 7085193899aSPaolo Bonzini int i; 70974d1e352SAndreas Färber 7105193899aSPaolo Bonzini if (!s->iclk) { 711ebc116f8Sxiaoqiang zhao error_setg(errp, "omap2-gpio: iclk not connected"); 712ebc116f8Sxiaoqiang zhao return; 7135193899aSPaolo Bonzini } 71484a3a53cSMarkus Armbruster 71584a3a53cSMarkus Armbruster s->modulecount = s->mpu_model < omap2430 ? 4 71684a3a53cSMarkus Armbruster : s->mpu_model < omap3430 ? 5 71784a3a53cSMarkus Armbruster : 6; 71884a3a53cSMarkus Armbruster 7195193899aSPaolo Bonzini if (s->mpu_model < omap3430) { 720ebc116f8Sxiaoqiang zhao memory_region_init_io(&s->iomem, OBJECT(dev), &omap2_gpif_top_ops, s, 7215193899aSPaolo Bonzini "omap2.gpio", 0x1000); 72274d1e352SAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 7235193899aSPaolo Bonzini } 72484a3a53cSMarkus Armbruster 725b45c03f5SMarkus Armbruster s->modules = g_new0(struct omap2_gpio_s, s->modulecount); 726b45c03f5SMarkus Armbruster s->handler = g_new0(qemu_irq, s->modulecount * 32); 72774d1e352SAndreas Färber qdev_init_gpio_in(dev, omap2_gpio_set, s->modulecount * 32); 72874d1e352SAndreas Färber qdev_init_gpio_out(dev, s->handler, s->modulecount * 32); 72984a3a53cSMarkus Armbruster 7305193899aSPaolo Bonzini for (i = 0; i < s->modulecount; i++) { 7315193899aSPaolo Bonzini struct omap2_gpio_s *m = &s->modules[i]; 73284a3a53cSMarkus Armbruster 733ebc116f8Sxiaoqiang zhao if (!s->fclk[i]) { 734ebc116f8Sxiaoqiang zhao error_setg(errp, "omap2-gpio: fclk%d not connected", i); 735ebc116f8Sxiaoqiang zhao return; 736ebc116f8Sxiaoqiang zhao } 737ebc116f8Sxiaoqiang zhao 7385193899aSPaolo Bonzini m->revision = (s->mpu_model < omap3430) ? 0x18 : 0x25; 7395193899aSPaolo Bonzini m->handler = &s->handler[i * 32]; 74074d1e352SAndreas Färber sysbus_init_irq(sbd, &m->irq[0]); /* mpu irq */ 74174d1e352SAndreas Färber sysbus_init_irq(sbd, &m->irq[1]); /* dsp irq */ 74274d1e352SAndreas Färber sysbus_init_irq(sbd, &m->wkup); 743ebc116f8Sxiaoqiang zhao memory_region_init_io(&m->iomem, OBJECT(dev), &omap2_gpio_module_ops, m, 7445193899aSPaolo Bonzini "omap.gpio-module", 0x1000); 74574d1e352SAndreas Färber sysbus_init_mmio(sbd, &m->iomem); 7465193899aSPaolo Bonzini } 7475193899aSPaolo Bonzini } 7485193899aSPaolo Bonzini 7495193899aSPaolo Bonzini /* Using qdev pointer properties for the clocks is not ideal. 7505193899aSPaolo Bonzini * qdev should support a generic means of defining a 'port' with 7515193899aSPaolo Bonzini * an arbitrary interface for connecting two devices. Then we 7525193899aSPaolo Bonzini * could reframe the omap clock API in terms of clock ports, 7535193899aSPaolo Bonzini * and get some type safety. For now the best qdev provides is 7545193899aSPaolo Bonzini * passing an arbitrary pointer. 7555193899aSPaolo Bonzini * (It's not possible to pass in the string which is the clock 7565193899aSPaolo Bonzini * name, because this device does not have the necessary information 7575193899aSPaolo Bonzini * (ie the struct omap_mpu_state_s*) to do the clockname to pointer 7585193899aSPaolo Bonzini * translation.) 7595193899aSPaolo Bonzini */ 7605193899aSPaolo Bonzini 7615193899aSPaolo Bonzini static Property omap_gpio_properties[] = { 7625193899aSPaolo Bonzini DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), 7635193899aSPaolo Bonzini DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), 7645193899aSPaolo Bonzini DEFINE_PROP_END_OF_LIST(), 7655193899aSPaolo Bonzini }; 7665193899aSPaolo Bonzini 7675193899aSPaolo Bonzini static void omap_gpio_class_init(ObjectClass *klass, void *data) 7685193899aSPaolo Bonzini { 7695193899aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 7705193899aSPaolo Bonzini 771ebc116f8Sxiaoqiang zhao dc->realize = omap_gpio_realize; 7725193899aSPaolo Bonzini dc->reset = omap_gpif_reset; 7735193899aSPaolo Bonzini dc->props = omap_gpio_properties; 7741b111dc1SMarkus Armbruster /* Reason: pointer property "clk" */ 775e90f2a8cSEduardo Habkost dc->user_creatable = false; 7765193899aSPaolo Bonzini } 7775193899aSPaolo Bonzini 7785193899aSPaolo Bonzini static const TypeInfo omap_gpio_info = { 7791d300b5fSAndreas Färber .name = TYPE_OMAP1_GPIO, 7805193899aSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 7815193899aSPaolo Bonzini .instance_size = sizeof(struct omap_gpif_s), 782ebc116f8Sxiaoqiang zhao .instance_init = omap_gpio_init, 7835193899aSPaolo Bonzini .class_init = omap_gpio_class_init, 7845193899aSPaolo Bonzini }; 7855193899aSPaolo Bonzini 7865193899aSPaolo Bonzini static Property omap2_gpio_properties[] = { 7875193899aSPaolo Bonzini DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), 7885193899aSPaolo Bonzini DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), 7895193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), 7905193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), 7915193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), 7925193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), 7935193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), 7945193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), 7955193899aSPaolo Bonzini DEFINE_PROP_END_OF_LIST(), 7965193899aSPaolo Bonzini }; 7975193899aSPaolo Bonzini 7985193899aSPaolo Bonzini static void omap2_gpio_class_init(ObjectClass *klass, void *data) 7995193899aSPaolo Bonzini { 8005193899aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 8015193899aSPaolo Bonzini 802ebc116f8Sxiaoqiang zhao dc->realize = omap2_gpio_realize; 8035193899aSPaolo Bonzini dc->reset = omap2_gpif_reset; 8045193899aSPaolo Bonzini dc->props = omap2_gpio_properties; 8051b111dc1SMarkus Armbruster /* Reason: pointer properties "iclk", "fclk0", ..., "fclk5" */ 806e90f2a8cSEduardo Habkost dc->user_creatable = false; 8075193899aSPaolo Bonzini } 8085193899aSPaolo Bonzini 8095193899aSPaolo Bonzini static const TypeInfo omap2_gpio_info = { 81074d1e352SAndreas Färber .name = TYPE_OMAP2_GPIO, 8115193899aSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 8125193899aSPaolo Bonzini .instance_size = sizeof(struct omap2_gpif_s), 8135193899aSPaolo Bonzini .class_init = omap2_gpio_class_init, 8145193899aSPaolo Bonzini }; 8155193899aSPaolo Bonzini 8165193899aSPaolo Bonzini static void omap_gpio_register_types(void) 8175193899aSPaolo Bonzini { 8185193899aSPaolo Bonzini type_register_static(&omap_gpio_info); 8195193899aSPaolo Bonzini type_register_static(&omap2_gpio_info); 8205193899aSPaolo Bonzini } 8215193899aSPaolo Bonzini 8225193899aSPaolo Bonzini type_init(omap_gpio_register_types) 823