15193899aSPaolo Bonzini /* 25193899aSPaolo Bonzini * TI OMAP processors GPIO emulation. 35193899aSPaolo Bonzini * 45193899aSPaolo Bonzini * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org> 55193899aSPaolo Bonzini * Copyright (C) 2007-2009 Nokia Corporation 65193899aSPaolo Bonzini * 75193899aSPaolo Bonzini * This program is free software; you can redistribute it and/or 85193899aSPaolo Bonzini * modify it under the terms of the GNU General Public License as 95193899aSPaolo Bonzini * published by the Free Software Foundation; either version 2 or 105193899aSPaolo Bonzini * (at your option) version 3 of the License. 115193899aSPaolo Bonzini * 125193899aSPaolo Bonzini * This program is distributed in the hope that it will be useful, 135193899aSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of 145193899aSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 155193899aSPaolo Bonzini * GNU General Public License for more details. 165193899aSPaolo Bonzini * 175193899aSPaolo Bonzini * You should have received a copy of the GNU General Public License along 185193899aSPaolo Bonzini * with this program; if not, see <http://www.gnu.org/licenses/>. 195193899aSPaolo Bonzini */ 205193899aSPaolo Bonzini 21*17b7f2dbSPeter Maydell #include "qemu/osdep.h" 225193899aSPaolo Bonzini #include "hw/hw.h" 235193899aSPaolo Bonzini #include "hw/arm/omap.h" 245193899aSPaolo Bonzini #include "hw/sysbus.h" 2584a3a53cSMarkus Armbruster #include "qemu/error-report.h" 265193899aSPaolo Bonzini 275193899aSPaolo Bonzini struct omap_gpio_s { 285193899aSPaolo Bonzini qemu_irq irq; 295193899aSPaolo Bonzini qemu_irq handler[16]; 305193899aSPaolo Bonzini 315193899aSPaolo Bonzini uint16_t inputs; 325193899aSPaolo Bonzini uint16_t outputs; 335193899aSPaolo Bonzini uint16_t dir; 345193899aSPaolo Bonzini uint16_t edge; 355193899aSPaolo Bonzini uint16_t mask; 365193899aSPaolo Bonzini uint16_t ints; 375193899aSPaolo Bonzini uint16_t pins; 385193899aSPaolo Bonzini }; 395193899aSPaolo Bonzini 401d300b5fSAndreas Färber #define TYPE_OMAP1_GPIO "omap-gpio" 411d300b5fSAndreas Färber #define OMAP1_GPIO(obj) \ 421d300b5fSAndreas Färber OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) 431d300b5fSAndreas Färber 445193899aSPaolo Bonzini struct omap_gpif_s { 451d300b5fSAndreas Färber SysBusDevice parent_obj; 461d300b5fSAndreas Färber 475193899aSPaolo Bonzini MemoryRegion iomem; 485193899aSPaolo Bonzini int mpu_model; 495193899aSPaolo Bonzini void *clk; 505193899aSPaolo Bonzini struct omap_gpio_s omap1; 515193899aSPaolo Bonzini }; 525193899aSPaolo Bonzini 535193899aSPaolo Bonzini /* General-Purpose I/O of OMAP1 */ 545193899aSPaolo Bonzini static void omap_gpio_set(void *opaque, int line, int level) 555193899aSPaolo Bonzini { 565193899aSPaolo Bonzini struct omap_gpio_s *s = &((struct omap_gpif_s *) opaque)->omap1; 575193899aSPaolo Bonzini uint16_t prev = s->inputs; 585193899aSPaolo Bonzini 595193899aSPaolo Bonzini if (level) 605193899aSPaolo Bonzini s->inputs |= 1 << line; 615193899aSPaolo Bonzini else 625193899aSPaolo Bonzini s->inputs &= ~(1 << line); 635193899aSPaolo Bonzini 645193899aSPaolo Bonzini if (((s->edge & s->inputs & ~prev) | (~s->edge & ~s->inputs & prev)) & 655193899aSPaolo Bonzini (1 << line) & s->dir & ~s->mask) { 665193899aSPaolo Bonzini s->ints |= 1 << line; 675193899aSPaolo Bonzini qemu_irq_raise(s->irq); 685193899aSPaolo Bonzini } 695193899aSPaolo Bonzini } 705193899aSPaolo Bonzini 715193899aSPaolo Bonzini static uint64_t omap_gpio_read(void *opaque, hwaddr addr, 725193899aSPaolo Bonzini unsigned size) 735193899aSPaolo Bonzini { 745193899aSPaolo Bonzini struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; 755193899aSPaolo Bonzini int offset = addr & OMAP_MPUI_REG_MASK; 765193899aSPaolo Bonzini 775193899aSPaolo Bonzini if (size != 2) { 785193899aSPaolo Bonzini return omap_badwidth_read16(opaque, addr); 795193899aSPaolo Bonzini } 805193899aSPaolo Bonzini 815193899aSPaolo Bonzini switch (offset) { 825193899aSPaolo Bonzini case 0x00: /* DATA_INPUT */ 835193899aSPaolo Bonzini return s->inputs & s->pins; 845193899aSPaolo Bonzini 855193899aSPaolo Bonzini case 0x04: /* DATA_OUTPUT */ 865193899aSPaolo Bonzini return s->outputs; 875193899aSPaolo Bonzini 885193899aSPaolo Bonzini case 0x08: /* DIRECTION_CONTROL */ 895193899aSPaolo Bonzini return s->dir; 905193899aSPaolo Bonzini 915193899aSPaolo Bonzini case 0x0c: /* INTERRUPT_CONTROL */ 925193899aSPaolo Bonzini return s->edge; 935193899aSPaolo Bonzini 945193899aSPaolo Bonzini case 0x10: /* INTERRUPT_MASK */ 955193899aSPaolo Bonzini return s->mask; 965193899aSPaolo Bonzini 975193899aSPaolo Bonzini case 0x14: /* INTERRUPT_STATUS */ 985193899aSPaolo Bonzini return s->ints; 995193899aSPaolo Bonzini 1005193899aSPaolo Bonzini case 0x18: /* PIN_CONTROL (not in OMAP310) */ 1015193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1025193899aSPaolo Bonzini return s->pins; 1035193899aSPaolo Bonzini } 1045193899aSPaolo Bonzini 1055193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1065193899aSPaolo Bonzini return 0; 1075193899aSPaolo Bonzini } 1085193899aSPaolo Bonzini 1095193899aSPaolo Bonzini static void omap_gpio_write(void *opaque, hwaddr addr, 1105193899aSPaolo Bonzini uint64_t value, unsigned size) 1115193899aSPaolo Bonzini { 1125193899aSPaolo Bonzini struct omap_gpio_s *s = (struct omap_gpio_s *) opaque; 1135193899aSPaolo Bonzini int offset = addr & OMAP_MPUI_REG_MASK; 1145193899aSPaolo Bonzini uint16_t diff; 1155193899aSPaolo Bonzini int ln; 1165193899aSPaolo Bonzini 1175193899aSPaolo Bonzini if (size != 2) { 11877a8257eSStefan Weil omap_badwidth_write16(opaque, addr, value); 11977a8257eSStefan Weil return; 1205193899aSPaolo Bonzini } 1215193899aSPaolo Bonzini 1225193899aSPaolo Bonzini switch (offset) { 1235193899aSPaolo Bonzini case 0x00: /* DATA_INPUT */ 1245193899aSPaolo Bonzini OMAP_RO_REG(addr); 1255193899aSPaolo Bonzini return; 1265193899aSPaolo Bonzini 1275193899aSPaolo Bonzini case 0x04: /* DATA_OUTPUT */ 1285193899aSPaolo Bonzini diff = (s->outputs ^ value) & ~s->dir; 1295193899aSPaolo Bonzini s->outputs = value; 130bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 1315193899aSPaolo Bonzini if (s->handler[ln]) 1325193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 1335193899aSPaolo Bonzini diff &= ~(1 << ln); 1345193899aSPaolo Bonzini } 1355193899aSPaolo Bonzini break; 1365193899aSPaolo Bonzini 1375193899aSPaolo Bonzini case 0x08: /* DIRECTION_CONTROL */ 1385193899aSPaolo Bonzini diff = s->outputs & (s->dir ^ value); 1395193899aSPaolo Bonzini s->dir = value; 1405193899aSPaolo Bonzini 1415193899aSPaolo Bonzini value = s->outputs & ~s->dir; 142bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 1435193899aSPaolo Bonzini if (s->handler[ln]) 1445193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 1455193899aSPaolo Bonzini diff &= ~(1 << ln); 1465193899aSPaolo Bonzini } 1475193899aSPaolo Bonzini break; 1485193899aSPaolo Bonzini 1495193899aSPaolo Bonzini case 0x0c: /* INTERRUPT_CONTROL */ 1505193899aSPaolo Bonzini s->edge = value; 1515193899aSPaolo Bonzini break; 1525193899aSPaolo Bonzini 1535193899aSPaolo Bonzini case 0x10: /* INTERRUPT_MASK */ 1545193899aSPaolo Bonzini s->mask = value; 1555193899aSPaolo Bonzini break; 1565193899aSPaolo Bonzini 1575193899aSPaolo Bonzini case 0x14: /* INTERRUPT_STATUS */ 1585193899aSPaolo Bonzini s->ints &= ~value; 1595193899aSPaolo Bonzini if (!s->ints) 1605193899aSPaolo Bonzini qemu_irq_lower(s->irq); 1615193899aSPaolo Bonzini break; 1625193899aSPaolo Bonzini 1635193899aSPaolo Bonzini case 0x18: /* PIN_CONTROL (not in OMAP310 TRM) */ 1645193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1655193899aSPaolo Bonzini s->pins = value; 1665193899aSPaolo Bonzini break; 1675193899aSPaolo Bonzini 1685193899aSPaolo Bonzini default: 1695193899aSPaolo Bonzini OMAP_BAD_REG(addr); 1705193899aSPaolo Bonzini return; 1715193899aSPaolo Bonzini } 1725193899aSPaolo Bonzini } 1735193899aSPaolo Bonzini 1745193899aSPaolo Bonzini /* *Some* sources say the memory region is 32-bit. */ 1755193899aSPaolo Bonzini static const MemoryRegionOps omap_gpio_ops = { 1765193899aSPaolo Bonzini .read = omap_gpio_read, 1775193899aSPaolo Bonzini .write = omap_gpio_write, 1785193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 1795193899aSPaolo Bonzini }; 1805193899aSPaolo Bonzini 1815193899aSPaolo Bonzini static void omap_gpio_reset(struct omap_gpio_s *s) 1825193899aSPaolo Bonzini { 1835193899aSPaolo Bonzini s->inputs = 0; 1845193899aSPaolo Bonzini s->outputs = ~0; 1855193899aSPaolo Bonzini s->dir = ~0; 1865193899aSPaolo Bonzini s->edge = ~0; 1875193899aSPaolo Bonzini s->mask = ~0; 1885193899aSPaolo Bonzini s->ints = 0; 1895193899aSPaolo Bonzini s->pins = ~0; 1905193899aSPaolo Bonzini } 1915193899aSPaolo Bonzini 1925193899aSPaolo Bonzini struct omap2_gpio_s { 1935193899aSPaolo Bonzini qemu_irq irq[2]; 1945193899aSPaolo Bonzini qemu_irq wkup; 1955193899aSPaolo Bonzini qemu_irq *handler; 1965193899aSPaolo Bonzini MemoryRegion iomem; 1975193899aSPaolo Bonzini 1985193899aSPaolo Bonzini uint8_t revision; 1995193899aSPaolo Bonzini uint8_t config[2]; 2005193899aSPaolo Bonzini uint32_t inputs; 2015193899aSPaolo Bonzini uint32_t outputs; 2025193899aSPaolo Bonzini uint32_t dir; 2035193899aSPaolo Bonzini uint32_t level[2]; 2045193899aSPaolo Bonzini uint32_t edge[2]; 2055193899aSPaolo Bonzini uint32_t mask[2]; 2065193899aSPaolo Bonzini uint32_t wumask; 2075193899aSPaolo Bonzini uint32_t ints[2]; 2085193899aSPaolo Bonzini uint32_t debounce; 2095193899aSPaolo Bonzini uint8_t delay; 2105193899aSPaolo Bonzini }; 2115193899aSPaolo Bonzini 21274d1e352SAndreas Färber #define TYPE_OMAP2_GPIO "omap2-gpio" 21374d1e352SAndreas Färber #define OMAP2_GPIO(obj) \ 21474d1e352SAndreas Färber OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) 21574d1e352SAndreas Färber 2165193899aSPaolo Bonzini struct omap2_gpif_s { 21774d1e352SAndreas Färber SysBusDevice parent_obj; 21874d1e352SAndreas Färber 2195193899aSPaolo Bonzini MemoryRegion iomem; 2205193899aSPaolo Bonzini int mpu_model; 2215193899aSPaolo Bonzini void *iclk; 2225193899aSPaolo Bonzini void *fclk[6]; 2235193899aSPaolo Bonzini int modulecount; 2245193899aSPaolo Bonzini struct omap2_gpio_s *modules; 2255193899aSPaolo Bonzini qemu_irq *handler; 2265193899aSPaolo Bonzini int autoidle; 2275193899aSPaolo Bonzini int gpo; 2285193899aSPaolo Bonzini }; 2295193899aSPaolo Bonzini 2305193899aSPaolo Bonzini /* General-Purpose Interface of OMAP2/3 */ 2315193899aSPaolo Bonzini static inline void omap2_gpio_module_int_update(struct omap2_gpio_s *s, 2325193899aSPaolo Bonzini int line) 2335193899aSPaolo Bonzini { 2345193899aSPaolo Bonzini qemu_set_irq(s->irq[line], s->ints[line] & s->mask[line]); 2355193899aSPaolo Bonzini } 2365193899aSPaolo Bonzini 2375193899aSPaolo Bonzini static void omap2_gpio_module_wake(struct omap2_gpio_s *s, int line) 2385193899aSPaolo Bonzini { 2395193899aSPaolo Bonzini if (!(s->config[0] & (1 << 2))) /* ENAWAKEUP */ 2405193899aSPaolo Bonzini return; 2415193899aSPaolo Bonzini if (!(s->config[0] & (3 << 3))) /* Force Idle */ 2425193899aSPaolo Bonzini return; 2435193899aSPaolo Bonzini if (!(s->wumask & (1 << line))) 2445193899aSPaolo Bonzini return; 2455193899aSPaolo Bonzini 2465193899aSPaolo Bonzini qemu_irq_raise(s->wkup); 2475193899aSPaolo Bonzini } 2485193899aSPaolo Bonzini 2495193899aSPaolo Bonzini static inline void omap2_gpio_module_out_update(struct omap2_gpio_s *s, 2505193899aSPaolo Bonzini uint32_t diff) 2515193899aSPaolo Bonzini { 2525193899aSPaolo Bonzini int ln; 2535193899aSPaolo Bonzini 2545193899aSPaolo Bonzini s->outputs ^= diff; 2555193899aSPaolo Bonzini diff &= ~s->dir; 256bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 2575193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (s->outputs >> ln) & 1); 2585193899aSPaolo Bonzini diff &= ~(1 << ln); 2595193899aSPaolo Bonzini } 2605193899aSPaolo Bonzini } 2615193899aSPaolo Bonzini 2625193899aSPaolo Bonzini static void omap2_gpio_module_level_update(struct omap2_gpio_s *s, int line) 2635193899aSPaolo Bonzini { 2645193899aSPaolo Bonzini s->ints[line] |= s->dir & 2655193899aSPaolo Bonzini ((s->inputs & s->level[1]) | (~s->inputs & s->level[0])); 2665193899aSPaolo Bonzini omap2_gpio_module_int_update(s, line); 2675193899aSPaolo Bonzini } 2685193899aSPaolo Bonzini 2695193899aSPaolo Bonzini static inline void omap2_gpio_module_int(struct omap2_gpio_s *s, int line) 2705193899aSPaolo Bonzini { 2715193899aSPaolo Bonzini s->ints[0] |= 1 << line; 2725193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 2735193899aSPaolo Bonzini s->ints[1] |= 1 << line; 2745193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 2755193899aSPaolo Bonzini omap2_gpio_module_wake(s, line); 2765193899aSPaolo Bonzini } 2775193899aSPaolo Bonzini 2785193899aSPaolo Bonzini static void omap2_gpio_set(void *opaque, int line, int level) 2795193899aSPaolo Bonzini { 2805193899aSPaolo Bonzini struct omap2_gpif_s *p = opaque; 2815193899aSPaolo Bonzini struct omap2_gpio_s *s = &p->modules[line >> 5]; 2825193899aSPaolo Bonzini 2835193899aSPaolo Bonzini line &= 31; 2845193899aSPaolo Bonzini if (level) { 2855193899aSPaolo Bonzini if (s->dir & (1 << line) & ((~s->inputs & s->edge[0]) | s->level[1])) 2865193899aSPaolo Bonzini omap2_gpio_module_int(s, line); 2875193899aSPaolo Bonzini s->inputs |= 1 << line; 2885193899aSPaolo Bonzini } else { 2895193899aSPaolo Bonzini if (s->dir & (1 << line) & ((s->inputs & s->edge[1]) | s->level[0])) 2905193899aSPaolo Bonzini omap2_gpio_module_int(s, line); 2915193899aSPaolo Bonzini s->inputs &= ~(1 << line); 2925193899aSPaolo Bonzini } 2935193899aSPaolo Bonzini } 2945193899aSPaolo Bonzini 2955193899aSPaolo Bonzini static void omap2_gpio_module_reset(struct omap2_gpio_s *s) 2965193899aSPaolo Bonzini { 2975193899aSPaolo Bonzini s->config[0] = 0; 2985193899aSPaolo Bonzini s->config[1] = 2; 2995193899aSPaolo Bonzini s->ints[0] = 0; 3005193899aSPaolo Bonzini s->ints[1] = 0; 3015193899aSPaolo Bonzini s->mask[0] = 0; 3025193899aSPaolo Bonzini s->mask[1] = 0; 3035193899aSPaolo Bonzini s->wumask = 0; 3045193899aSPaolo Bonzini s->dir = ~0; 3055193899aSPaolo Bonzini s->level[0] = 0; 3065193899aSPaolo Bonzini s->level[1] = 0; 3075193899aSPaolo Bonzini s->edge[0] = 0; 3085193899aSPaolo Bonzini s->edge[1] = 0; 3095193899aSPaolo Bonzini s->debounce = 0; 3105193899aSPaolo Bonzini s->delay = 0; 3115193899aSPaolo Bonzini } 3125193899aSPaolo Bonzini 3135193899aSPaolo Bonzini static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr) 3145193899aSPaolo Bonzini { 3155193899aSPaolo Bonzini struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; 3165193899aSPaolo Bonzini 3175193899aSPaolo Bonzini switch (addr) { 3185193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 3195193899aSPaolo Bonzini return s->revision; 3205193899aSPaolo Bonzini 3215193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 3225193899aSPaolo Bonzini return s->config[0]; 3235193899aSPaolo Bonzini 3245193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 3255193899aSPaolo Bonzini return 0x01; 3265193899aSPaolo Bonzini 3275193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 3285193899aSPaolo Bonzini return s->ints[0]; 3295193899aSPaolo Bonzini 3305193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 3315193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 3325193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 3335193899aSPaolo Bonzini return s->mask[0]; 3345193899aSPaolo Bonzini 3355193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 3365193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 3375193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 3385193899aSPaolo Bonzini return s->wumask; 3395193899aSPaolo Bonzini 3405193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 3415193899aSPaolo Bonzini return s->ints[1]; 3425193899aSPaolo Bonzini 3435193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 3445193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 3455193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 3465193899aSPaolo Bonzini return s->mask[1]; 3475193899aSPaolo Bonzini 3485193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 3495193899aSPaolo Bonzini return s->config[1]; 3505193899aSPaolo Bonzini 3515193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 3525193899aSPaolo Bonzini return s->dir; 3535193899aSPaolo Bonzini 3545193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 3555193899aSPaolo Bonzini return s->inputs; 3565193899aSPaolo Bonzini 3575193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 3585193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 3595193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 3605193899aSPaolo Bonzini return s->outputs; 3615193899aSPaolo Bonzini 3625193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 3635193899aSPaolo Bonzini return s->level[0]; 3645193899aSPaolo Bonzini 3655193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 3665193899aSPaolo Bonzini return s->level[1]; 3675193899aSPaolo Bonzini 3685193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 3695193899aSPaolo Bonzini return s->edge[0]; 3705193899aSPaolo Bonzini 3715193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 3725193899aSPaolo Bonzini return s->edge[1]; 3735193899aSPaolo Bonzini 3745193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 3755193899aSPaolo Bonzini return s->debounce; 3765193899aSPaolo Bonzini 3775193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 3785193899aSPaolo Bonzini return s->delay; 3795193899aSPaolo Bonzini } 3805193899aSPaolo Bonzini 3815193899aSPaolo Bonzini OMAP_BAD_REG(addr); 3825193899aSPaolo Bonzini return 0; 3835193899aSPaolo Bonzini } 3845193899aSPaolo Bonzini 3855193899aSPaolo Bonzini static void omap2_gpio_module_write(void *opaque, hwaddr addr, 3865193899aSPaolo Bonzini uint32_t value) 3875193899aSPaolo Bonzini { 3885193899aSPaolo Bonzini struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque; 3895193899aSPaolo Bonzini uint32_t diff; 3905193899aSPaolo Bonzini int ln; 3915193899aSPaolo Bonzini 3925193899aSPaolo Bonzini switch (addr) { 3935193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 3945193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 3955193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 3965193899aSPaolo Bonzini OMAP_RO_REG(addr); 3975193899aSPaolo Bonzini break; 3985193899aSPaolo Bonzini 3995193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 4005193899aSPaolo Bonzini if (((value >> 3) & 3) == 3) 4015193899aSPaolo Bonzini fprintf(stderr, "%s: bad IDLEMODE value\n", __FUNCTION__); 4025193899aSPaolo Bonzini if (value & 2) 4035193899aSPaolo Bonzini omap2_gpio_module_reset(s); 4045193899aSPaolo Bonzini s->config[0] = value & 0x1d; 4055193899aSPaolo Bonzini break; 4065193899aSPaolo Bonzini 4075193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 4085193899aSPaolo Bonzini if (s->ints[0] & value) { 4095193899aSPaolo Bonzini s->ints[0] &= ~value; 4105193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4115193899aSPaolo Bonzini } 4125193899aSPaolo Bonzini break; 4135193899aSPaolo Bonzini 4145193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 4155193899aSPaolo Bonzini s->mask[0] = value; 4165193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4175193899aSPaolo Bonzini break; 4185193899aSPaolo Bonzini 4195193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 4205193899aSPaolo Bonzini s->wumask = value; 4215193899aSPaolo Bonzini break; 4225193899aSPaolo Bonzini 4235193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 4245193899aSPaolo Bonzini if (s->ints[1] & value) { 4255193899aSPaolo Bonzini s->ints[1] &= ~value; 4265193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4275193899aSPaolo Bonzini } 4285193899aSPaolo Bonzini break; 4295193899aSPaolo Bonzini 4305193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 4315193899aSPaolo Bonzini s->mask[1] = value; 4325193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 4335193899aSPaolo Bonzini break; 4345193899aSPaolo Bonzini 4355193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 4365193899aSPaolo Bonzini s->config[1] = value & 7; 4375193899aSPaolo Bonzini break; 4385193899aSPaolo Bonzini 4395193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 4405193899aSPaolo Bonzini diff = s->outputs & (s->dir ^ value); 4415193899aSPaolo Bonzini s->dir = value; 4425193899aSPaolo Bonzini 4435193899aSPaolo Bonzini value = s->outputs & ~s->dir; 444bd2a8884SStefan Hajnoczi while ((ln = ctz32(diff)) != 32) { 445bd2a8884SStefan Hajnoczi diff &= ~(1 << ln); 4465193899aSPaolo Bonzini qemu_set_irq(s->handler[ln], (value >> ln) & 1); 4475193899aSPaolo Bonzini } 4485193899aSPaolo Bonzini 4495193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4505193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4515193899aSPaolo Bonzini break; 4525193899aSPaolo Bonzini 4535193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 4545193899aSPaolo Bonzini omap2_gpio_module_out_update(s, s->outputs ^ value); 4555193899aSPaolo Bonzini break; 4565193899aSPaolo Bonzini 4575193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 4585193899aSPaolo Bonzini s->level[0] = value; 4595193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4605193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4615193899aSPaolo Bonzini break; 4625193899aSPaolo Bonzini 4635193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 4645193899aSPaolo Bonzini s->level[1] = value; 4655193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 0); 4665193899aSPaolo Bonzini omap2_gpio_module_level_update(s, 1); 4675193899aSPaolo Bonzini break; 4685193899aSPaolo Bonzini 4695193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 4705193899aSPaolo Bonzini s->edge[0] = value; 4715193899aSPaolo Bonzini break; 4725193899aSPaolo Bonzini 4735193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 4745193899aSPaolo Bonzini s->edge[1] = value; 4755193899aSPaolo Bonzini break; 4765193899aSPaolo Bonzini 4775193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 4785193899aSPaolo Bonzini s->debounce = value; 4795193899aSPaolo Bonzini break; 4805193899aSPaolo Bonzini 4815193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 4825193899aSPaolo Bonzini s->delay = value; 4835193899aSPaolo Bonzini break; 4845193899aSPaolo Bonzini 4855193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 4865193899aSPaolo Bonzini s->mask[0] &= ~value; 4875193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4885193899aSPaolo Bonzini break; 4895193899aSPaolo Bonzini 4905193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 4915193899aSPaolo Bonzini s->mask[0] |= value; 4925193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 0); 4935193899aSPaolo Bonzini break; 4945193899aSPaolo Bonzini 4955193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 4965193899aSPaolo Bonzini s->mask[1] &= ~value; 4975193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 4985193899aSPaolo Bonzini break; 4995193899aSPaolo Bonzini 5005193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 5015193899aSPaolo Bonzini s->mask[1] |= value; 5025193899aSPaolo Bonzini omap2_gpio_module_int_update(s, 1); 5035193899aSPaolo Bonzini break; 5045193899aSPaolo Bonzini 5055193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 5065193899aSPaolo Bonzini s->wumask &= ~value; 5075193899aSPaolo Bonzini break; 5085193899aSPaolo Bonzini 5095193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 5105193899aSPaolo Bonzini s->wumask |= value; 5115193899aSPaolo Bonzini break; 5125193899aSPaolo Bonzini 5135193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 5145193899aSPaolo Bonzini omap2_gpio_module_out_update(s, s->outputs & value); 5155193899aSPaolo Bonzini break; 5165193899aSPaolo Bonzini 5175193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 5185193899aSPaolo Bonzini omap2_gpio_module_out_update(s, ~s->outputs & value); 5195193899aSPaolo Bonzini break; 5205193899aSPaolo Bonzini 5215193899aSPaolo Bonzini default: 5225193899aSPaolo Bonzini OMAP_BAD_REG(addr); 5235193899aSPaolo Bonzini return; 5245193899aSPaolo Bonzini } 5255193899aSPaolo Bonzini } 5265193899aSPaolo Bonzini 5275193899aSPaolo Bonzini static uint32_t omap2_gpio_module_readp(void *opaque, hwaddr addr) 5285193899aSPaolo Bonzini { 5295193899aSPaolo Bonzini return omap2_gpio_module_read(opaque, addr & ~3) >> ((addr & 3) << 3); 5305193899aSPaolo Bonzini } 5315193899aSPaolo Bonzini 5325193899aSPaolo Bonzini static void omap2_gpio_module_writep(void *opaque, hwaddr addr, 5335193899aSPaolo Bonzini uint32_t value) 5345193899aSPaolo Bonzini { 5355193899aSPaolo Bonzini uint32_t cur = 0; 5365193899aSPaolo Bonzini uint32_t mask = 0xffff; 5375193899aSPaolo Bonzini 5385193899aSPaolo Bonzini switch (addr & ~3) { 5395193899aSPaolo Bonzini case 0x00: /* GPIO_REVISION */ 5405193899aSPaolo Bonzini case 0x14: /* GPIO_SYSSTATUS */ 5415193899aSPaolo Bonzini case 0x38: /* GPIO_DATAIN */ 5425193899aSPaolo Bonzini OMAP_RO_REG(addr); 5435193899aSPaolo Bonzini break; 5445193899aSPaolo Bonzini 5455193899aSPaolo Bonzini case 0x10: /* GPIO_SYSCONFIG */ 5465193899aSPaolo Bonzini case 0x1c: /* GPIO_IRQENABLE1 */ 5475193899aSPaolo Bonzini case 0x20: /* GPIO_WAKEUPENABLE */ 5485193899aSPaolo Bonzini case 0x2c: /* GPIO_IRQENABLE2 */ 5495193899aSPaolo Bonzini case 0x30: /* GPIO_CTRL */ 5505193899aSPaolo Bonzini case 0x34: /* GPIO_OE */ 5515193899aSPaolo Bonzini case 0x3c: /* GPIO_DATAOUT */ 5525193899aSPaolo Bonzini case 0x40: /* GPIO_LEVELDETECT0 */ 5535193899aSPaolo Bonzini case 0x44: /* GPIO_LEVELDETECT1 */ 5545193899aSPaolo Bonzini case 0x48: /* GPIO_RISINGDETECT */ 5555193899aSPaolo Bonzini case 0x4c: /* GPIO_FALLINGDETECT */ 5565193899aSPaolo Bonzini case 0x50: /* GPIO_DEBOUNCENABLE */ 5575193899aSPaolo Bonzini case 0x54: /* GPIO_DEBOUNCINGTIME */ 5585193899aSPaolo Bonzini cur = omap2_gpio_module_read(opaque, addr & ~3) & 5595193899aSPaolo Bonzini ~(mask << ((addr & 3) << 3)); 5605193899aSPaolo Bonzini 5615193899aSPaolo Bonzini /* Fall through. */ 5625193899aSPaolo Bonzini case 0x18: /* GPIO_IRQSTATUS1 */ 5635193899aSPaolo Bonzini case 0x28: /* GPIO_IRQSTATUS2 */ 5645193899aSPaolo Bonzini case 0x60: /* GPIO_CLEARIRQENABLE1 */ 5655193899aSPaolo Bonzini case 0x64: /* GPIO_SETIRQENABLE1 */ 5665193899aSPaolo Bonzini case 0x70: /* GPIO_CLEARIRQENABLE2 */ 5675193899aSPaolo Bonzini case 0x74: /* GPIO_SETIREQNEABLE2 */ 5685193899aSPaolo Bonzini case 0x80: /* GPIO_CLEARWKUENA */ 5695193899aSPaolo Bonzini case 0x84: /* GPIO_SETWKUENA */ 5705193899aSPaolo Bonzini case 0x90: /* GPIO_CLEARDATAOUT */ 5715193899aSPaolo Bonzini case 0x94: /* GPIO_SETDATAOUT */ 5725193899aSPaolo Bonzini value <<= (addr & 3) << 3; 5735193899aSPaolo Bonzini omap2_gpio_module_write(opaque, addr, cur | value); 5745193899aSPaolo Bonzini break; 5755193899aSPaolo Bonzini 5765193899aSPaolo Bonzini default: 5775193899aSPaolo Bonzini OMAP_BAD_REG(addr); 5785193899aSPaolo Bonzini return; 5795193899aSPaolo Bonzini } 5805193899aSPaolo Bonzini } 5815193899aSPaolo Bonzini 5825193899aSPaolo Bonzini static const MemoryRegionOps omap2_gpio_module_ops = { 5835193899aSPaolo Bonzini .old_mmio = { 5845193899aSPaolo Bonzini .read = { 5855193899aSPaolo Bonzini omap2_gpio_module_readp, 5865193899aSPaolo Bonzini omap2_gpio_module_readp, 5875193899aSPaolo Bonzini omap2_gpio_module_read, 5885193899aSPaolo Bonzini }, 5895193899aSPaolo Bonzini .write = { 5905193899aSPaolo Bonzini omap2_gpio_module_writep, 5915193899aSPaolo Bonzini omap2_gpio_module_writep, 5925193899aSPaolo Bonzini omap2_gpio_module_write, 5935193899aSPaolo Bonzini }, 5945193899aSPaolo Bonzini }, 5955193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 5965193899aSPaolo Bonzini }; 5975193899aSPaolo Bonzini 5985193899aSPaolo Bonzini static void omap_gpif_reset(DeviceState *dev) 5995193899aSPaolo Bonzini { 6001d300b5fSAndreas Färber struct omap_gpif_s *s = OMAP1_GPIO(dev); 6011d300b5fSAndreas Färber 6025193899aSPaolo Bonzini omap_gpio_reset(&s->omap1); 6035193899aSPaolo Bonzini } 6045193899aSPaolo Bonzini 6055193899aSPaolo Bonzini static void omap2_gpif_reset(DeviceState *dev) 6065193899aSPaolo Bonzini { 60774d1e352SAndreas Färber struct omap2_gpif_s *s = OMAP2_GPIO(dev); 6085193899aSPaolo Bonzini int i; 60974d1e352SAndreas Färber 6105193899aSPaolo Bonzini for (i = 0; i < s->modulecount; i++) { 6115193899aSPaolo Bonzini omap2_gpio_module_reset(&s->modules[i]); 6125193899aSPaolo Bonzini } 6135193899aSPaolo Bonzini s->autoidle = 0; 6145193899aSPaolo Bonzini s->gpo = 0; 6155193899aSPaolo Bonzini } 6165193899aSPaolo Bonzini 6175193899aSPaolo Bonzini static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, 6185193899aSPaolo Bonzini unsigned size) 6195193899aSPaolo Bonzini { 6205193899aSPaolo Bonzini struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; 6215193899aSPaolo Bonzini 6225193899aSPaolo Bonzini switch (addr) { 6235193899aSPaolo Bonzini case 0x00: /* IPGENERICOCPSPL_REVISION */ 6245193899aSPaolo Bonzini return 0x18; 6255193899aSPaolo Bonzini 6265193899aSPaolo Bonzini case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ 6275193899aSPaolo Bonzini return s->autoidle; 6285193899aSPaolo Bonzini 6295193899aSPaolo Bonzini case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ 6305193899aSPaolo Bonzini return 0x01; 6315193899aSPaolo Bonzini 6325193899aSPaolo Bonzini case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ 6335193899aSPaolo Bonzini return 0x00; 6345193899aSPaolo Bonzini 6355193899aSPaolo Bonzini case 0x40: /* IPGENERICOCPSPL_GPO */ 6365193899aSPaolo Bonzini return s->gpo; 6375193899aSPaolo Bonzini 6385193899aSPaolo Bonzini case 0x50: /* IPGENERICOCPSPL_GPI */ 6395193899aSPaolo Bonzini return 0x00; 6405193899aSPaolo Bonzini } 6415193899aSPaolo Bonzini 6425193899aSPaolo Bonzini OMAP_BAD_REG(addr); 6435193899aSPaolo Bonzini return 0; 6445193899aSPaolo Bonzini } 6455193899aSPaolo Bonzini 6465193899aSPaolo Bonzini static void omap2_gpif_top_write(void *opaque, hwaddr addr, 6475193899aSPaolo Bonzini uint64_t value, unsigned size) 6485193899aSPaolo Bonzini { 6495193899aSPaolo Bonzini struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque; 6505193899aSPaolo Bonzini 6515193899aSPaolo Bonzini switch (addr) { 6525193899aSPaolo Bonzini case 0x00: /* IPGENERICOCPSPL_REVISION */ 6535193899aSPaolo Bonzini case 0x14: /* IPGENERICOCPSPL_SYSSTATUS */ 6545193899aSPaolo Bonzini case 0x18: /* IPGENERICOCPSPL_IRQSTATUS */ 6555193899aSPaolo Bonzini case 0x50: /* IPGENERICOCPSPL_GPI */ 6565193899aSPaolo Bonzini OMAP_RO_REG(addr); 6575193899aSPaolo Bonzini break; 6585193899aSPaolo Bonzini 6595193899aSPaolo Bonzini case 0x10: /* IPGENERICOCPSPL_SYSCONFIG */ 6605193899aSPaolo Bonzini if (value & (1 << 1)) /* SOFTRESET */ 66174d1e352SAndreas Färber omap2_gpif_reset(DEVICE(s)); 6625193899aSPaolo Bonzini s->autoidle = value & 1; 6635193899aSPaolo Bonzini break; 6645193899aSPaolo Bonzini 6655193899aSPaolo Bonzini case 0x40: /* IPGENERICOCPSPL_GPO */ 6665193899aSPaolo Bonzini s->gpo = value & 1; 6675193899aSPaolo Bonzini break; 6685193899aSPaolo Bonzini 6695193899aSPaolo Bonzini default: 6705193899aSPaolo Bonzini OMAP_BAD_REG(addr); 6715193899aSPaolo Bonzini return; 6725193899aSPaolo Bonzini } 6735193899aSPaolo Bonzini } 6745193899aSPaolo Bonzini 6755193899aSPaolo Bonzini static const MemoryRegionOps omap2_gpif_top_ops = { 6765193899aSPaolo Bonzini .read = omap2_gpif_top_read, 6775193899aSPaolo Bonzini .write = omap2_gpif_top_write, 6785193899aSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 6795193899aSPaolo Bonzini }; 6805193899aSPaolo Bonzini 6811d300b5fSAndreas Färber static int omap_gpio_init(SysBusDevice *sbd) 6825193899aSPaolo Bonzini { 6831d300b5fSAndreas Färber DeviceState *dev = DEVICE(sbd); 6841d300b5fSAndreas Färber struct omap_gpif_s *s = OMAP1_GPIO(dev); 6851d300b5fSAndreas Färber 6865193899aSPaolo Bonzini if (!s->clk) { 68784a3a53cSMarkus Armbruster error_report("omap-gpio: clk not connected"); 68884a3a53cSMarkus Armbruster return -1; 6895193899aSPaolo Bonzini } 6901d300b5fSAndreas Färber qdev_init_gpio_in(dev, omap_gpio_set, 16); 6911d300b5fSAndreas Färber qdev_init_gpio_out(dev, s->omap1.handler, 16); 6921d300b5fSAndreas Färber sysbus_init_irq(sbd, &s->omap1.irq); 693b7163687SPaolo Bonzini memory_region_init_io(&s->iomem, OBJECT(s), &omap_gpio_ops, &s->omap1, 6945193899aSPaolo Bonzini "omap.gpio", 0x1000); 6951d300b5fSAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 6965193899aSPaolo Bonzini return 0; 6975193899aSPaolo Bonzini } 6985193899aSPaolo Bonzini 69974d1e352SAndreas Färber static int omap2_gpio_init(SysBusDevice *sbd) 7005193899aSPaolo Bonzini { 70174d1e352SAndreas Färber DeviceState *dev = DEVICE(sbd); 70274d1e352SAndreas Färber struct omap2_gpif_s *s = OMAP2_GPIO(dev); 7035193899aSPaolo Bonzini int i; 70474d1e352SAndreas Färber 7055193899aSPaolo Bonzini if (!s->iclk) { 70684a3a53cSMarkus Armbruster error_report("omap2-gpio: iclk not connected"); 70784a3a53cSMarkus Armbruster return -1; 7085193899aSPaolo Bonzini } 70984a3a53cSMarkus Armbruster 71084a3a53cSMarkus Armbruster s->modulecount = s->mpu_model < omap2430 ? 4 71184a3a53cSMarkus Armbruster : s->mpu_model < omap3430 ? 5 71284a3a53cSMarkus Armbruster : 6; 71384a3a53cSMarkus Armbruster 71484a3a53cSMarkus Armbruster for (i = 0; i < s->modulecount; i++) { 71584a3a53cSMarkus Armbruster if (!s->fclk[i]) { 71684a3a53cSMarkus Armbruster error_report("omap2-gpio: fclk%d not connected", i); 71784a3a53cSMarkus Armbruster return -1; 71884a3a53cSMarkus Armbruster } 71984a3a53cSMarkus Armbruster } 72084a3a53cSMarkus Armbruster 7215193899aSPaolo Bonzini if (s->mpu_model < omap3430) { 722b7163687SPaolo Bonzini memory_region_init_io(&s->iomem, OBJECT(s), &omap2_gpif_top_ops, s, 7235193899aSPaolo Bonzini "omap2.gpio", 0x1000); 72474d1e352SAndreas Färber sysbus_init_mmio(sbd, &s->iomem); 7255193899aSPaolo Bonzini } 72684a3a53cSMarkus Armbruster 727b45c03f5SMarkus Armbruster s->modules = g_new0(struct omap2_gpio_s, s->modulecount); 728b45c03f5SMarkus Armbruster s->handler = g_new0(qemu_irq, s->modulecount * 32); 72974d1e352SAndreas Färber qdev_init_gpio_in(dev, omap2_gpio_set, s->modulecount * 32); 73074d1e352SAndreas Färber qdev_init_gpio_out(dev, s->handler, s->modulecount * 32); 73184a3a53cSMarkus Armbruster 7325193899aSPaolo Bonzini for (i = 0; i < s->modulecount; i++) { 7335193899aSPaolo Bonzini struct omap2_gpio_s *m = &s->modules[i]; 73484a3a53cSMarkus Armbruster 7355193899aSPaolo Bonzini m->revision = (s->mpu_model < omap3430) ? 0x18 : 0x25; 7365193899aSPaolo Bonzini m->handler = &s->handler[i * 32]; 73774d1e352SAndreas Färber sysbus_init_irq(sbd, &m->irq[0]); /* mpu irq */ 73874d1e352SAndreas Färber sysbus_init_irq(sbd, &m->irq[1]); /* dsp irq */ 73974d1e352SAndreas Färber sysbus_init_irq(sbd, &m->wkup); 740b7163687SPaolo Bonzini memory_region_init_io(&m->iomem, OBJECT(s), &omap2_gpio_module_ops, m, 7415193899aSPaolo Bonzini "omap.gpio-module", 0x1000); 74274d1e352SAndreas Färber sysbus_init_mmio(sbd, &m->iomem); 7435193899aSPaolo Bonzini } 74484a3a53cSMarkus Armbruster 7455193899aSPaolo Bonzini return 0; 7465193899aSPaolo Bonzini } 7475193899aSPaolo Bonzini 7485193899aSPaolo Bonzini /* Using qdev pointer properties for the clocks is not ideal. 7495193899aSPaolo Bonzini * qdev should support a generic means of defining a 'port' with 7505193899aSPaolo Bonzini * an arbitrary interface for connecting two devices. Then we 7515193899aSPaolo Bonzini * could reframe the omap clock API in terms of clock ports, 7525193899aSPaolo Bonzini * and get some type safety. For now the best qdev provides is 7535193899aSPaolo Bonzini * passing an arbitrary pointer. 7545193899aSPaolo Bonzini * (It's not possible to pass in the string which is the clock 7555193899aSPaolo Bonzini * name, because this device does not have the necessary information 7565193899aSPaolo Bonzini * (ie the struct omap_mpu_state_s*) to do the clockname to pointer 7575193899aSPaolo Bonzini * translation.) 7585193899aSPaolo Bonzini */ 7595193899aSPaolo Bonzini 7605193899aSPaolo Bonzini static Property omap_gpio_properties[] = { 7615193899aSPaolo Bonzini DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), 7625193899aSPaolo Bonzini DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), 7635193899aSPaolo Bonzini DEFINE_PROP_END_OF_LIST(), 7645193899aSPaolo Bonzini }; 7655193899aSPaolo Bonzini 7665193899aSPaolo Bonzini static void omap_gpio_class_init(ObjectClass *klass, void *data) 7675193899aSPaolo Bonzini { 7685193899aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 7695193899aSPaolo Bonzini SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 7705193899aSPaolo Bonzini 7715193899aSPaolo Bonzini k->init = omap_gpio_init; 7725193899aSPaolo Bonzini dc->reset = omap_gpif_reset; 7735193899aSPaolo Bonzini dc->props = omap_gpio_properties; 7741b111dc1SMarkus Armbruster /* Reason: pointer property "clk" */ 7751b111dc1SMarkus Armbruster dc->cannot_instantiate_with_device_add_yet = true; 7765193899aSPaolo Bonzini } 7775193899aSPaolo Bonzini 7785193899aSPaolo Bonzini static const TypeInfo omap_gpio_info = { 7791d300b5fSAndreas Färber .name = TYPE_OMAP1_GPIO, 7805193899aSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 7815193899aSPaolo Bonzini .instance_size = sizeof(struct omap_gpif_s), 7825193899aSPaolo Bonzini .class_init = omap_gpio_class_init, 7835193899aSPaolo Bonzini }; 7845193899aSPaolo Bonzini 7855193899aSPaolo Bonzini static Property omap2_gpio_properties[] = { 7865193899aSPaolo Bonzini DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), 7875193899aSPaolo Bonzini DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), 7885193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), 7895193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), 7905193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), 7915193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), 7925193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), 7935193899aSPaolo Bonzini DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), 7945193899aSPaolo Bonzini DEFINE_PROP_END_OF_LIST(), 7955193899aSPaolo Bonzini }; 7965193899aSPaolo Bonzini 7975193899aSPaolo Bonzini static void omap2_gpio_class_init(ObjectClass *klass, void *data) 7985193899aSPaolo Bonzini { 7995193899aSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 8005193899aSPaolo Bonzini SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 8015193899aSPaolo Bonzini 8025193899aSPaolo Bonzini k->init = omap2_gpio_init; 8035193899aSPaolo Bonzini dc->reset = omap2_gpif_reset; 8045193899aSPaolo Bonzini dc->props = omap2_gpio_properties; 8051b111dc1SMarkus Armbruster /* Reason: pointer properties "iclk", "fclk0", ..., "fclk5" */ 8061b111dc1SMarkus Armbruster dc->cannot_instantiate_with_device_add_yet = true; 8075193899aSPaolo Bonzini } 8085193899aSPaolo Bonzini 8095193899aSPaolo Bonzini static const TypeInfo omap2_gpio_info = { 81074d1e352SAndreas Färber .name = TYPE_OMAP2_GPIO, 8115193899aSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 8125193899aSPaolo Bonzini .instance_size = sizeof(struct omap2_gpif_s), 8135193899aSPaolo Bonzini .class_init = omap2_gpio_class_init, 8145193899aSPaolo Bonzini }; 8155193899aSPaolo Bonzini 8165193899aSPaolo Bonzini static void omap_gpio_register_types(void) 8175193899aSPaolo Bonzini { 8185193899aSPaolo Bonzini type_register_static(&omap_gpio_info); 8195193899aSPaolo Bonzini type_register_static(&omap2_gpio_info); 8205193899aSPaolo Bonzini } 8215193899aSPaolo Bonzini 8225193899aSPaolo Bonzini type_init(omap_gpio_register_types) 823