149ab747fSPaolo Bonzini /* 249ab747fSPaolo Bonzini * QEMU AMD PC-Net II (Am79C970A) PCI emulation 349ab747fSPaolo Bonzini * 449ab747fSPaolo Bonzini * Copyright (c) 2004 Antony T Curtis 549ab747fSPaolo Bonzini * 649ab747fSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 749ab747fSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 849ab747fSPaolo Bonzini * in the Software without restriction, including without limitation the rights 949ab747fSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1049ab747fSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 1149ab747fSPaolo Bonzini * furnished to do so, subject to the following conditions: 1249ab747fSPaolo Bonzini * 1349ab747fSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 1449ab747fSPaolo Bonzini * all copies or substantial portions of the Software. 1549ab747fSPaolo Bonzini * 1649ab747fSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1749ab747fSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1849ab747fSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1949ab747fSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2049ab747fSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2149ab747fSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2249ab747fSPaolo Bonzini * THE SOFTWARE. 2349ab747fSPaolo Bonzini */ 2449ab747fSPaolo Bonzini 2549ab747fSPaolo Bonzini /* This software was written to be compatible with the specification: 2649ab747fSPaolo Bonzini * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet 2749ab747fSPaolo Bonzini * AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000 2849ab747fSPaolo Bonzini */ 2949ab747fSPaolo Bonzini 30e8d40465SPeter Maydell #include "qemu/osdep.h" 3164552b6bSMarkus Armbruster #include "hw/irq.h" 32edf5ca5dSMarkus Armbruster #include "hw/pci/pci_device.h" 33a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 34d6454270SMarkus Armbruster #include "migration/vmstate.h" 3549ab747fSPaolo Bonzini #include "net/net.h" 360b8fa32fSMarkus Armbruster #include "qemu/module.h" 3749ab747fSPaolo Bonzini #include "qemu/timer.h" 3849ab747fSPaolo Bonzini #include "sysemu/dma.h" 39ea3b3511SGonglei #include "sysemu/sysemu.h" 4032c95249SDon Koch #include "trace.h" 4149ab747fSPaolo Bonzini 4247b43a1fSPaolo Bonzini #include "pcnet.h" 43db1015e9SEduardo Habkost #include "qom/object.h" 4449ab747fSPaolo Bonzini 4549ab747fSPaolo Bonzini //#define PCNET_DEBUG 4649ab747fSPaolo Bonzini //#define PCNET_DEBUG_IO 4749ab747fSPaolo Bonzini //#define PCNET_DEBUG_BCR 4849ab747fSPaolo Bonzini //#define PCNET_DEBUG_CSR 4949ab747fSPaolo Bonzini //#define PCNET_DEBUG_RMD 5049ab747fSPaolo Bonzini //#define PCNET_DEBUG_TMD 5149ab747fSPaolo Bonzini //#define PCNET_DEBUG_MATCH 5249ab747fSPaolo Bonzini 531f8c7946SPeter Crosthwaite #define TYPE_PCI_PCNET "pcnet" 541f8c7946SPeter Crosthwaite 558063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(PCIPCNetState, PCI_PCNET) 5649ab747fSPaolo Bonzini 57db1015e9SEduardo Habkost struct PCIPCNetState { 581f8c7946SPeter Crosthwaite /*< private >*/ 591f8c7946SPeter Crosthwaite PCIDevice parent_obj; 601f8c7946SPeter Crosthwaite /*< public >*/ 611f8c7946SPeter Crosthwaite 6249ab747fSPaolo Bonzini PCNetState state; 6349ab747fSPaolo Bonzini MemoryRegion io_bar; 64db1015e9SEduardo Habkost }; 6549ab747fSPaolo Bonzini 6649ab747fSPaolo Bonzini static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) 6749ab747fSPaolo Bonzini { 6849ab747fSPaolo Bonzini PCNetState *s = opaque; 6932c95249SDon Koch 7032c95249SDon Koch trace_pcnet_aprom_writeb(opaque, addr, val); 7149ab747fSPaolo Bonzini if (BCR_APROMWE(s)) { 7249ab747fSPaolo Bonzini s->prom[addr & 15] = val; 7349ab747fSPaolo Bonzini } 7449ab747fSPaolo Bonzini } 7549ab747fSPaolo Bonzini 7649ab747fSPaolo Bonzini static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr) 7749ab747fSPaolo Bonzini { 7849ab747fSPaolo Bonzini PCNetState *s = opaque; 7949ab747fSPaolo Bonzini uint32_t val = s->prom[addr & 15]; 8032c95249SDon Koch 8132c95249SDon Koch trace_pcnet_aprom_readb(opaque, addr, val); 8249ab747fSPaolo Bonzini return val; 8349ab747fSPaolo Bonzini } 8449ab747fSPaolo Bonzini 8549ab747fSPaolo Bonzini static uint64_t pcnet_ioport_read(void *opaque, hwaddr addr, 8649ab747fSPaolo Bonzini unsigned size) 8749ab747fSPaolo Bonzini { 8849ab747fSPaolo Bonzini PCNetState *d = opaque; 8949ab747fSPaolo Bonzini 9032c95249SDon Koch trace_pcnet_ioport_read(opaque, addr, size); 9149ab747fSPaolo Bonzini if (addr < 0x10) { 9249ab747fSPaolo Bonzini if (!BCR_DWIO(d) && size == 1) { 9349ab747fSPaolo Bonzini return pcnet_aprom_readb(d, addr); 9449ab747fSPaolo Bonzini } else if (!BCR_DWIO(d) && (addr & 1) == 0 && size == 2) { 9549ab747fSPaolo Bonzini return pcnet_aprom_readb(d, addr) | 9649ab747fSPaolo Bonzini (pcnet_aprom_readb(d, addr + 1) << 8); 9749ab747fSPaolo Bonzini } else if (BCR_DWIO(d) && (addr & 3) == 0 && size == 4) { 9849ab747fSPaolo Bonzini return pcnet_aprom_readb(d, addr) | 9949ab747fSPaolo Bonzini (pcnet_aprom_readb(d, addr + 1) << 8) | 10049ab747fSPaolo Bonzini (pcnet_aprom_readb(d, addr + 2) << 16) | 10149ab747fSPaolo Bonzini (pcnet_aprom_readb(d, addr + 3) << 24); 10249ab747fSPaolo Bonzini } 10349ab747fSPaolo Bonzini } else { 10449ab747fSPaolo Bonzini if (size == 2) { 10549ab747fSPaolo Bonzini return pcnet_ioport_readw(d, addr); 10649ab747fSPaolo Bonzini } else if (size == 4) { 10749ab747fSPaolo Bonzini return pcnet_ioport_readl(d, addr); 10849ab747fSPaolo Bonzini } 10949ab747fSPaolo Bonzini } 11049ab747fSPaolo Bonzini return ((uint64_t)1 << (size * 8)) - 1; 11149ab747fSPaolo Bonzini } 11249ab747fSPaolo Bonzini 11349ab747fSPaolo Bonzini static void pcnet_ioport_write(void *opaque, hwaddr addr, 11449ab747fSPaolo Bonzini uint64_t data, unsigned size) 11549ab747fSPaolo Bonzini { 11649ab747fSPaolo Bonzini PCNetState *d = opaque; 11749ab747fSPaolo Bonzini 11832c95249SDon Koch trace_pcnet_ioport_write(opaque, addr, data, size); 11949ab747fSPaolo Bonzini if (addr < 0x10) { 12049ab747fSPaolo Bonzini if (!BCR_DWIO(d) && size == 1) { 12149ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr, data); 12249ab747fSPaolo Bonzini } else if (!BCR_DWIO(d) && (addr & 1) == 0 && size == 2) { 12349ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr, data & 0xff); 12449ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr + 1, data >> 8); 12549ab747fSPaolo Bonzini } else if (BCR_DWIO(d) && (addr & 3) == 0 && size == 4) { 12649ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr, data & 0xff); 12749ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr + 1, (data >> 8) & 0xff); 12849ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr + 2, (data >> 16) & 0xff); 12949ab747fSPaolo Bonzini pcnet_aprom_writeb(d, addr + 3, data >> 24); 13049ab747fSPaolo Bonzini } 13149ab747fSPaolo Bonzini } else { 13249ab747fSPaolo Bonzini if (size == 2) { 13349ab747fSPaolo Bonzini pcnet_ioport_writew(d, addr, data); 13449ab747fSPaolo Bonzini } else if (size == 4) { 13549ab747fSPaolo Bonzini pcnet_ioport_writel(d, addr, data); 13649ab747fSPaolo Bonzini } 13749ab747fSPaolo Bonzini } 13849ab747fSPaolo Bonzini } 13949ab747fSPaolo Bonzini 14049ab747fSPaolo Bonzini static const MemoryRegionOps pcnet_io_ops = { 14149ab747fSPaolo Bonzini .read = pcnet_ioport_read, 14249ab747fSPaolo Bonzini .write = pcnet_ioport_write, 143a26405b3SAurelien Jarno .endianness = DEVICE_LITTLE_ENDIAN, 14449ab747fSPaolo Bonzini }; 14549ab747fSPaolo Bonzini 14649ab747fSPaolo Bonzini static const VMStateDescription vmstate_pci_pcnet = { 14749ab747fSPaolo Bonzini .name = "pcnet", 14849ab747fSPaolo Bonzini .version_id = 3, 14949ab747fSPaolo Bonzini .minimum_version_id = 2, 15049ab747fSPaolo Bonzini .fields = (VMStateField[]) { 1511f8c7946SPeter Crosthwaite VMSTATE_PCI_DEVICE(parent_obj, PCIPCNetState), 15249ab747fSPaolo Bonzini VMSTATE_STRUCT(state, PCIPCNetState, 0, vmstate_pcnet, PCNetState), 15349ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 15449ab747fSPaolo Bonzini } 15549ab747fSPaolo Bonzini }; 15649ab747fSPaolo Bonzini 15749ab747fSPaolo Bonzini /* PCI interface */ 15849ab747fSPaolo Bonzini 15949ab747fSPaolo Bonzini static const MemoryRegionOps pcnet_mmio_ops = { 160b187e20fSPeter Maydell .read = pcnet_ioport_read, 161b187e20fSPeter Maydell .write = pcnet_ioport_write, 1625d026de8SPeter Maydell .valid.min_access_size = 1, 1635d026de8SPeter Maydell .valid.max_access_size = 4, 1645d026de8SPeter Maydell .impl.min_access_size = 1, 1655d026de8SPeter Maydell .impl.max_access_size = 4, 166a26405b3SAurelien Jarno .endianness = DEVICE_LITTLE_ENDIAN, 16749ab747fSPaolo Bonzini }; 16849ab747fSPaolo Bonzini 16949ab747fSPaolo Bonzini static void pci_physical_memory_write(void *dma_opaque, hwaddr addr, 17049ab747fSPaolo Bonzini uint8_t *buf, int len, int do_bswap) 17149ab747fSPaolo Bonzini { 17249ab747fSPaolo Bonzini pci_dma_write(dma_opaque, addr, buf, len); 17349ab747fSPaolo Bonzini } 17449ab747fSPaolo Bonzini 17549ab747fSPaolo Bonzini static void pci_physical_memory_read(void *dma_opaque, hwaddr addr, 17649ab747fSPaolo Bonzini uint8_t *buf, int len, int do_bswap) 17749ab747fSPaolo Bonzini { 17849ab747fSPaolo Bonzini pci_dma_read(dma_opaque, addr, buf, len); 17949ab747fSPaolo Bonzini } 18049ab747fSPaolo Bonzini 18149ab747fSPaolo Bonzini static void pci_pcnet_uninit(PCIDevice *dev) 18249ab747fSPaolo Bonzini { 1831f8c7946SPeter Crosthwaite PCIPCNetState *d = PCI_PCNET(dev); 18449ab747fSPaolo Bonzini 1859e64f8a3SMarcel Apfelbaum qemu_free_irq(d->state.irq); 186bc72ad67SAlex Bligh timer_free(d->state.poll_timer); 18749ab747fSPaolo Bonzini qemu_del_nic(d->state.nic); 18849ab747fSPaolo Bonzini } 18949ab747fSPaolo Bonzini 19049ab747fSPaolo Bonzini static NetClientInfo net_pci_pcnet_info = { 191f394b2e2SEric Blake .type = NET_CLIENT_DRIVER_NIC, 19249ab747fSPaolo Bonzini .size = sizeof(NICState), 19349ab747fSPaolo Bonzini .receive = pcnet_receive, 19449ab747fSPaolo Bonzini .link_status_changed = pcnet_set_link_status, 19549ab747fSPaolo Bonzini }; 19649ab747fSPaolo Bonzini 197eb1bef94SMarkus Armbruster static void pci_pcnet_realize(PCIDevice *pci_dev, Error **errp) 19849ab747fSPaolo Bonzini { 1991f8c7946SPeter Crosthwaite PCIPCNetState *d = PCI_PCNET(pci_dev); 20049ab747fSPaolo Bonzini PCNetState *s = &d->state; 20149ab747fSPaolo Bonzini uint8_t *pci_conf; 20249ab747fSPaolo Bonzini 20349ab747fSPaolo Bonzini #if 0 20449ab747fSPaolo Bonzini printf("sizeof(RMD)=%d, sizeof(TMD)=%d\n", 20549ab747fSPaolo Bonzini sizeof(struct pcnet_RMD), sizeof(struct pcnet_TMD)); 20649ab747fSPaolo Bonzini #endif 20749ab747fSPaolo Bonzini 20849ab747fSPaolo Bonzini pci_conf = pci_dev->config; 20949ab747fSPaolo Bonzini 21049ab747fSPaolo Bonzini pci_set_word(pci_conf + PCI_STATUS, 21149ab747fSPaolo Bonzini PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); 21249ab747fSPaolo Bonzini 21349ab747fSPaolo Bonzini pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, 0x0); 21449ab747fSPaolo Bonzini pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0); 21549ab747fSPaolo Bonzini 21649ab747fSPaolo Bonzini pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ 21749ab747fSPaolo Bonzini pci_conf[PCI_MIN_GNT] = 0x06; 21849ab747fSPaolo Bonzini pci_conf[PCI_MAX_LAT] = 0xff; 21949ab747fSPaolo Bonzini 22049ab747fSPaolo Bonzini /* Handler for memory-mapped I/O */ 221eedfac6fSPaolo Bonzini memory_region_init_io(&d->state.mmio, OBJECT(d), &pcnet_mmio_ops, s, 222eedfac6fSPaolo Bonzini "pcnet-mmio", PCNET_PNPMMIO_SIZE); 22349ab747fSPaolo Bonzini 224eedfac6fSPaolo Bonzini memory_region_init_io(&d->io_bar, OBJECT(d), &pcnet_io_ops, s, "pcnet-io", 22549ab747fSPaolo Bonzini PCNET_IOPORT_SIZE); 22649ab747fSPaolo Bonzini pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->io_bar); 22749ab747fSPaolo Bonzini 22849ab747fSPaolo Bonzini pci_register_bar(pci_dev, 1, 0, &s->mmio); 22949ab747fSPaolo Bonzini 2309e64f8a3SMarcel Apfelbaum s->irq = pci_allocate_irq(pci_dev); 23149ab747fSPaolo Bonzini s->phys_mem_read = pci_physical_memory_read; 23249ab747fSPaolo Bonzini s->phys_mem_write = pci_physical_memory_write; 2334cc76287SMarc-André Lureau s->dma_opaque = DEVICE(pci_dev); 23449ab747fSPaolo Bonzini 2354c3b2245SMarkus Armbruster pcnet_common_init(DEVICE(pci_dev), s, &net_pci_pcnet_info); 23649ab747fSPaolo Bonzini } 23749ab747fSPaolo Bonzini 23849ab747fSPaolo Bonzini static void pci_reset(DeviceState *dev) 23949ab747fSPaolo Bonzini { 2401f8c7946SPeter Crosthwaite PCIPCNetState *d = PCI_PCNET(dev); 24149ab747fSPaolo Bonzini 24249ab747fSPaolo Bonzini pcnet_h_reset(&d->state); 24349ab747fSPaolo Bonzini } 24449ab747fSPaolo Bonzini 245ea3b3511SGonglei static void pcnet_instance_init(Object *obj) 246ea3b3511SGonglei { 247ea3b3511SGonglei PCIPCNetState *d = PCI_PCNET(obj); 248ea3b3511SGonglei PCNetState *s = &d->state; 249ea3b3511SGonglei 250ea3b3511SGonglei device_add_bootindex_property(obj, &s->conf.bootindex, 251ea3b3511SGonglei "bootindex", "/ethernet-phy@0", 25240c2281cSMarkus Armbruster DEVICE(obj)); 253ea3b3511SGonglei } 254ea3b3511SGonglei 25549ab747fSPaolo Bonzini static Property pcnet_properties[] = { 25649ab747fSPaolo Bonzini DEFINE_NIC_PROPERTIES(PCIPCNetState, state.conf), 25749ab747fSPaolo Bonzini DEFINE_PROP_END_OF_LIST(), 25849ab747fSPaolo Bonzini }; 25949ab747fSPaolo Bonzini 26049ab747fSPaolo Bonzini static void pcnet_class_init(ObjectClass *klass, void *data) 26149ab747fSPaolo Bonzini { 26249ab747fSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 26349ab747fSPaolo Bonzini PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 26449ab747fSPaolo Bonzini 265eb1bef94SMarkus Armbruster k->realize = pci_pcnet_realize; 26649ab747fSPaolo Bonzini k->exit = pci_pcnet_uninit; 26749ab747fSPaolo Bonzini k->romfile = "efi-pcnet.rom", 26849ab747fSPaolo Bonzini k->vendor_id = PCI_VENDOR_ID_AMD; 26949ab747fSPaolo Bonzini k->device_id = PCI_DEVICE_ID_AMD_LANCE; 27049ab747fSPaolo Bonzini k->revision = 0x10; 27149ab747fSPaolo Bonzini k->class_id = PCI_CLASS_NETWORK_ETHERNET; 27249ab747fSPaolo Bonzini dc->reset = pci_reset; 27349ab747fSPaolo Bonzini dc->vmsd = &vmstate_pci_pcnet; 2744f67d30bSMarc-André Lureau device_class_set_props(dc, pcnet_properties); 275125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); 27649ab747fSPaolo Bonzini } 27749ab747fSPaolo Bonzini 27849ab747fSPaolo Bonzini static const TypeInfo pcnet_info = { 2791f8c7946SPeter Crosthwaite .name = TYPE_PCI_PCNET, 28049ab747fSPaolo Bonzini .parent = TYPE_PCI_DEVICE, 28149ab747fSPaolo Bonzini .instance_size = sizeof(PCIPCNetState), 28249ab747fSPaolo Bonzini .class_init = pcnet_class_init, 283ea3b3511SGonglei .instance_init = pcnet_instance_init, 284fd3b02c8SEduardo Habkost .interfaces = (InterfaceInfo[]) { 285fd3b02c8SEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 286fd3b02c8SEduardo Habkost { }, 287fd3b02c8SEduardo Habkost }, 28849ab747fSPaolo Bonzini }; 28949ab747fSPaolo Bonzini 29049ab747fSPaolo Bonzini static void pci_pcnet_register_types(void) 29149ab747fSPaolo Bonzini { 29249ab747fSPaolo Bonzini type_register_static(&pcnet_info); 29349ab747fSPaolo Bonzini } 29449ab747fSPaolo Bonzini 29549ab747fSPaolo Bonzini type_init(pci_pcnet_register_types) 296