1ffd9589eSMark Cave-Ayland /*
2ffd9589eSMark Cave-Ayland * QEMU Simba PCI bridge
3ffd9589eSMark Cave-Ayland *
4ffd9589eSMark Cave-Ayland * Copyright (c) 2006 Fabrice Bellard
5ffd9589eSMark Cave-Ayland * Copyright (c) 2012,2013 Artyom Tarasenko
6ffd9589eSMark Cave-Ayland * Copyright (c) 2018 Mark Cave-Ayland
7ffd9589eSMark Cave-Ayland *
8ffd9589eSMark Cave-Ayland * Permission is hereby granted, free of charge, to any person obtaining a copy
9ffd9589eSMark Cave-Ayland * of this software and associated documentation files (the "Software"), to deal
10ffd9589eSMark Cave-Ayland * in the Software without restriction, including without limitation the rights
11ffd9589eSMark Cave-Ayland * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12ffd9589eSMark Cave-Ayland * copies of the Software, and to permit persons to whom the Software is
13ffd9589eSMark Cave-Ayland * furnished to do so, subject to the following conditions:
14ffd9589eSMark Cave-Ayland *
15ffd9589eSMark Cave-Ayland * The above copyright notice and this permission notice shall be included in
16ffd9589eSMark Cave-Ayland * all copies or substantial portions of the Software.
17ffd9589eSMark Cave-Ayland *
18ffd9589eSMark Cave-Ayland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19ffd9589eSMark Cave-Ayland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20ffd9589eSMark Cave-Ayland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21ffd9589eSMark Cave-Ayland * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22ffd9589eSMark Cave-Ayland * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23ffd9589eSMark Cave-Ayland * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24ffd9589eSMark Cave-Ayland * THE SOFTWARE.
25ffd9589eSMark Cave-Ayland */
26ffd9589eSMark Cave-Ayland
27ffd9589eSMark Cave-Ayland #include "qemu/osdep.h"
28ffd9589eSMark Cave-Ayland #include "hw/pci/pci.h"
29ffd9589eSMark Cave-Ayland #include "hw/pci/pci_bridge.h"
30ffd9589eSMark Cave-Ayland #include "hw/pci/pci_bus.h"
310b8fa32fSMarkus Armbruster #include "qemu/module.h"
32ffd9589eSMark Cave-Ayland #include "hw/pci-bridge/simba.h"
33ffd9589eSMark Cave-Ayland
34ffd9589eSMark Cave-Ayland /*
35ffd9589eSMark Cave-Ayland * Chipset docs:
36ffd9589eSMark Cave-Ayland * APB: "Advanced PCI Bridge (APB) User's Manual",
37ffd9589eSMark Cave-Ayland * http://www.sun.com/processors/manuals/805-1251.pdf
38ffd9589eSMark Cave-Ayland */
39ffd9589eSMark Cave-Ayland
simba_pci_bridge_realize(PCIDevice * dev,Error ** errp)4090302adaSMark Cave-Ayland static void simba_pci_bridge_realize(PCIDevice *dev, Error **errp)
41ffd9589eSMark Cave-Ayland {
42ffd9589eSMark Cave-Ayland /*
43ffd9589eSMark Cave-Ayland * command register:
44ffd9589eSMark Cave-Ayland * According to PCI bridge spec, after reset
45ffd9589eSMark Cave-Ayland * bus master bit is off
46ffd9589eSMark Cave-Ayland * memory space enable bit is off
47ffd9589eSMark Cave-Ayland * According to manual (805-1251.pdf).
48ffd9589eSMark Cave-Ayland * the reset value should be zero unless the boot pin is tied high
49ffd9589eSMark Cave-Ayland * (which is true) and thus it should be PCI_COMMAND_MEMORY.
50ffd9589eSMark Cave-Ayland */
5190302adaSMark Cave-Ayland SimbaPCIBridge *br = SIMBA_PCI_BRIDGE(dev);
52ffd9589eSMark Cave-Ayland
53ffd9589eSMark Cave-Ayland pci_bridge_initfn(dev, TYPE_PCI_BUS);
54ffd9589eSMark Cave-Ayland
55ffd9589eSMark Cave-Ayland pci_set_word(dev->config + PCI_COMMAND, PCI_COMMAND_MEMORY);
56ffd9589eSMark Cave-Ayland pci_set_word(dev->config + PCI_STATUS,
57ffd9589eSMark Cave-Ayland PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |
58ffd9589eSMark Cave-Ayland PCI_STATUS_DEVSEL_MEDIUM);
59ffd9589eSMark Cave-Ayland
60ffd9589eSMark Cave-Ayland /* Allow 32-bit IO addresses */
61ffd9589eSMark Cave-Ayland pci_set_word(dev->config + PCI_IO_BASE, PCI_IO_RANGE_TYPE_32);
62ffd9589eSMark Cave-Ayland pci_set_word(dev->config + PCI_IO_LIMIT, PCI_IO_RANGE_TYPE_32);
63ffd9589eSMark Cave-Ayland pci_set_word(dev->wmask + PCI_IO_BASE_UPPER16, 0xffff);
64ffd9589eSMark Cave-Ayland pci_set_word(dev->wmask + PCI_IO_LIMIT_UPPER16, 0xffff);
65ffd9589eSMark Cave-Ayland
66ffd9589eSMark Cave-Ayland pci_bridge_update_mappings(PCI_BRIDGE(br));
67ffd9589eSMark Cave-Ayland }
68ffd9589eSMark Cave-Ayland
simba_pci_bridge_class_init(ObjectClass * klass,void * data)6990302adaSMark Cave-Ayland static void simba_pci_bridge_class_init(ObjectClass *klass, void *data)
70ffd9589eSMark Cave-Ayland {
71ffd9589eSMark Cave-Ayland DeviceClass *dc = DEVICE_CLASS(klass);
72ffd9589eSMark Cave-Ayland PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
73ffd9589eSMark Cave-Ayland
7490302adaSMark Cave-Ayland k->realize = simba_pci_bridge_realize;
75ffd9589eSMark Cave-Ayland k->exit = pci_bridge_exitfn;
76ffd9589eSMark Cave-Ayland k->vendor_id = PCI_VENDOR_ID_SUN;
77ffd9589eSMark Cave-Ayland k->device_id = PCI_DEVICE_ID_SUN_SIMBA;
78ffd9589eSMark Cave-Ayland k->revision = 0x11;
79ffd9589eSMark Cave-Ayland k->config_write = pci_bridge_write_config;
80ffd9589eSMark Cave-Ayland set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
81*e3d08143SPeter Maydell device_class_set_legacy_reset(dc, pci_bridge_reset);
82ffd9589eSMark Cave-Ayland dc->vmsd = &vmstate_pci_device;
83ffd9589eSMark Cave-Ayland }
84ffd9589eSMark Cave-Ayland
8590302adaSMark Cave-Ayland static const TypeInfo simba_pci_bridge_info = {
8690302adaSMark Cave-Ayland .name = TYPE_SIMBA_PCI_BRIDGE,
87ffd9589eSMark Cave-Ayland .parent = TYPE_PCI_BRIDGE,
8890302adaSMark Cave-Ayland .class_init = simba_pci_bridge_class_init,
8990302adaSMark Cave-Ayland .instance_size = sizeof(SimbaPCIBridge),
90ffd9589eSMark Cave-Ayland .interfaces = (InterfaceInfo[]) {
91ffd9589eSMark Cave-Ayland { INTERFACE_CONVENTIONAL_PCI_DEVICE },
92ffd9589eSMark Cave-Ayland { },
93ffd9589eSMark Cave-Ayland },
94ffd9589eSMark Cave-Ayland };
95ffd9589eSMark Cave-Ayland
simba_register_types(void)9690302adaSMark Cave-Ayland static void simba_register_types(void)
97ffd9589eSMark Cave-Ayland {
9890302adaSMark Cave-Ayland type_register_static(&simba_pci_bridge_info);
99ffd9589eSMark Cave-Ayland }
100ffd9589eSMark Cave-Ayland
10190302adaSMark Cave-Ayland type_init(simba_register_types)
102