149ab747fSPaolo Bonzini /* 249ab747fSPaolo Bonzini * QEMU ESP/NCR53C9x emulation 349ab747fSPaolo Bonzini * 449ab747fSPaolo Bonzini * Copyright (c) 2005-2006 Fabrice Bellard 549ab747fSPaolo Bonzini * Copyright (c) 2012 Herve Poussineau 649ab747fSPaolo Bonzini * 749ab747fSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 849ab747fSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 949ab747fSPaolo Bonzini * in the Software without restriction, including without limitation the rights 1049ab747fSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1149ab747fSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 1249ab747fSPaolo Bonzini * furnished to do so, subject to the following conditions: 1349ab747fSPaolo Bonzini * 1449ab747fSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 1549ab747fSPaolo Bonzini * all copies or substantial portions of the Software. 1649ab747fSPaolo Bonzini * 1749ab747fSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1849ab747fSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1949ab747fSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2049ab747fSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2149ab747fSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2249ab747fSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2349ab747fSPaolo Bonzini * THE SOFTWARE. 2449ab747fSPaolo Bonzini */ 2549ab747fSPaolo Bonzini 26a4ab4792SPeter Maydell #include "qemu/osdep.h" 2749ab747fSPaolo Bonzini #include "hw/sysbus.h" 28d6454270SMarkus Armbruster #include "migration/vmstate.h" 2964552b6bSMarkus Armbruster #include "hw/irq.h" 3049ab747fSPaolo Bonzini #include "hw/scsi/esp.h" 3149ab747fSPaolo Bonzini #include "trace.h" 3249ab747fSPaolo Bonzini #include "qemu/log.h" 330b8fa32fSMarkus Armbruster #include "qemu/module.h" 3449ab747fSPaolo Bonzini 3549ab747fSPaolo Bonzini /* 3649ab747fSPaolo Bonzini * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O), 3749ab747fSPaolo Bonzini * also produced as NCR89C100. See 3849ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt 3949ab747fSPaolo Bonzini * and 4049ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt 4174d71ea1SLaurent Vivier * 4274d71ea1SLaurent Vivier * On Macintosh Quadra it is a NCR53C96. 4349ab747fSPaolo Bonzini */ 4449ab747fSPaolo Bonzini 4549ab747fSPaolo Bonzini static void esp_raise_irq(ESPState *s) 4649ab747fSPaolo Bonzini { 4749ab747fSPaolo Bonzini if (!(s->rregs[ESP_RSTAT] & STAT_INT)) { 4849ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] |= STAT_INT; 4949ab747fSPaolo Bonzini qemu_irq_raise(s->irq); 5049ab747fSPaolo Bonzini trace_esp_raise_irq(); 5149ab747fSPaolo Bonzini } 5249ab747fSPaolo Bonzini } 5349ab747fSPaolo Bonzini 5449ab747fSPaolo Bonzini static void esp_lower_irq(ESPState *s) 5549ab747fSPaolo Bonzini { 5649ab747fSPaolo Bonzini if (s->rregs[ESP_RSTAT] & STAT_INT) { 5749ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_INT; 5849ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 5949ab747fSPaolo Bonzini trace_esp_lower_irq(); 6049ab747fSPaolo Bonzini } 6149ab747fSPaolo Bonzini } 6249ab747fSPaolo Bonzini 6374d71ea1SLaurent Vivier static void esp_raise_drq(ESPState *s) 6474d71ea1SLaurent Vivier { 6574d71ea1SLaurent Vivier qemu_irq_raise(s->irq_data); 66960ebfd9SMark Cave-Ayland trace_esp_raise_drq(); 6774d71ea1SLaurent Vivier } 6874d71ea1SLaurent Vivier 6974d71ea1SLaurent Vivier static void esp_lower_drq(ESPState *s) 7074d71ea1SLaurent Vivier { 7174d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 72960ebfd9SMark Cave-Ayland trace_esp_lower_drq(); 7374d71ea1SLaurent Vivier } 7474d71ea1SLaurent Vivier 7549ab747fSPaolo Bonzini void esp_dma_enable(ESPState *s, int irq, int level) 7649ab747fSPaolo Bonzini { 7749ab747fSPaolo Bonzini if (level) { 7849ab747fSPaolo Bonzini s->dma_enabled = 1; 7949ab747fSPaolo Bonzini trace_esp_dma_enable(); 8049ab747fSPaolo Bonzini if (s->dma_cb) { 8149ab747fSPaolo Bonzini s->dma_cb(s); 8249ab747fSPaolo Bonzini s->dma_cb = NULL; 8349ab747fSPaolo Bonzini } 8449ab747fSPaolo Bonzini } else { 8549ab747fSPaolo Bonzini trace_esp_dma_disable(); 8649ab747fSPaolo Bonzini s->dma_enabled = 0; 8749ab747fSPaolo Bonzini } 8849ab747fSPaolo Bonzini } 8949ab747fSPaolo Bonzini 9049ab747fSPaolo Bonzini void esp_request_cancelled(SCSIRequest *req) 9149ab747fSPaolo Bonzini { 9249ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9349ab747fSPaolo Bonzini 9449ab747fSPaolo Bonzini if (req == s->current_req) { 9549ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 9649ab747fSPaolo Bonzini s->current_req = NULL; 9749ab747fSPaolo Bonzini s->current_dev = NULL; 98324c8809SMark Cave-Ayland s->async_len = 0; 9949ab747fSPaolo Bonzini } 10049ab747fSPaolo Bonzini } 10149ab747fSPaolo Bonzini 102e5455b8cSMark Cave-Ayland static void esp_fifo_push(Fifo8 *fifo, uint8_t val) 103042879fcSMark Cave-Ayland { 104e5455b8cSMark Cave-Ayland if (fifo8_num_used(fifo) == fifo->capacity) { 105042879fcSMark Cave-Ayland trace_esp_error_fifo_overrun(); 106042879fcSMark Cave-Ayland return; 107042879fcSMark Cave-Ayland } 108042879fcSMark Cave-Ayland 109e5455b8cSMark Cave-Ayland fifo8_push(fifo, val); 110042879fcSMark Cave-Ayland } 111c5fef911SMark Cave-Ayland 112c5fef911SMark Cave-Ayland static uint8_t esp_fifo_pop(Fifo8 *fifo) 113042879fcSMark Cave-Ayland { 114c5fef911SMark Cave-Ayland if (fifo8_is_empty(fifo)) { 115042879fcSMark Cave-Ayland return 0; 116042879fcSMark Cave-Ayland } 117042879fcSMark Cave-Ayland 118c5fef911SMark Cave-Ayland return fifo8_pop(fifo); 119023666daSMark Cave-Ayland } 120023666daSMark Cave-Ayland 1217b320a8eSMark Cave-Ayland static uint32_t esp_fifo_pop_buf(Fifo8 *fifo, uint8_t *dest, int maxlen) 1227b320a8eSMark Cave-Ayland { 1237b320a8eSMark Cave-Ayland const uint8_t *buf; 12449c60d16SMark Cave-Ayland uint32_t n, n2; 12549c60d16SMark Cave-Ayland int len; 1267b320a8eSMark Cave-Ayland 1277b320a8eSMark Cave-Ayland if (maxlen == 0) { 1287b320a8eSMark Cave-Ayland return 0; 1297b320a8eSMark Cave-Ayland } 1307b320a8eSMark Cave-Ayland 13149c60d16SMark Cave-Ayland len = maxlen; 13249c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n); 1337b320a8eSMark Cave-Ayland if (dest) { 1347b320a8eSMark Cave-Ayland memcpy(dest, buf, n); 1357b320a8eSMark Cave-Ayland } 1367b320a8eSMark Cave-Ayland 13749c60d16SMark Cave-Ayland /* Add FIFO wraparound if needed */ 13849c60d16SMark Cave-Ayland len -= n; 13949c60d16SMark Cave-Ayland len = MIN(len, fifo8_num_used(fifo)); 14049c60d16SMark Cave-Ayland if (len) { 14149c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n2); 14249c60d16SMark Cave-Ayland if (dest) { 14349c60d16SMark Cave-Ayland memcpy(&dest[n], buf, n2); 14449c60d16SMark Cave-Ayland } 14549c60d16SMark Cave-Ayland n += n2; 14649c60d16SMark Cave-Ayland } 14749c60d16SMark Cave-Ayland 1487b320a8eSMark Cave-Ayland return n; 1497b320a8eSMark Cave-Ayland } 1507b320a8eSMark Cave-Ayland 151c47b5835SMark Cave-Ayland static uint32_t esp_get_tc(ESPState *s) 152c47b5835SMark Cave-Ayland { 153c47b5835SMark Cave-Ayland uint32_t dmalen; 154c47b5835SMark Cave-Ayland 155c47b5835SMark Cave-Ayland dmalen = s->rregs[ESP_TCLO]; 156c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCMID] << 8; 157c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCHI] << 16; 158c47b5835SMark Cave-Ayland 159c47b5835SMark Cave-Ayland return dmalen; 160c47b5835SMark Cave-Ayland } 161c47b5835SMark Cave-Ayland 162c47b5835SMark Cave-Ayland static void esp_set_tc(ESPState *s, uint32_t dmalen) 163c47b5835SMark Cave-Ayland { 164c5d7df28SMark Cave-Ayland uint32_t old_tc = esp_get_tc(s); 165c5d7df28SMark Cave-Ayland 166c47b5835SMark Cave-Ayland s->rregs[ESP_TCLO] = dmalen; 167c47b5835SMark Cave-Ayland s->rregs[ESP_TCMID] = dmalen >> 8; 168c47b5835SMark Cave-Ayland s->rregs[ESP_TCHI] = dmalen >> 16; 169c5d7df28SMark Cave-Ayland 170c5d7df28SMark Cave-Ayland if (old_tc && dmalen == 0) { 171c5d7df28SMark Cave-Ayland s->rregs[ESP_RSTAT] |= STAT_TC; 172c5d7df28SMark Cave-Ayland } 173c47b5835SMark Cave-Ayland } 174c47b5835SMark Cave-Ayland 175c04ed569SMark Cave-Ayland static uint32_t esp_get_stc(ESPState *s) 176c04ed569SMark Cave-Ayland { 177c04ed569SMark Cave-Ayland uint32_t dmalen; 178c04ed569SMark Cave-Ayland 179c04ed569SMark Cave-Ayland dmalen = s->wregs[ESP_TCLO]; 180c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCMID] << 8; 181c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCHI] << 16; 182c04ed569SMark Cave-Ayland 183c04ed569SMark Cave-Ayland return dmalen; 184c04ed569SMark Cave-Ayland } 185c04ed569SMark Cave-Ayland 186abc139cdSMark Cave-Ayland static const char *esp_phase_names[8] = { 187abc139cdSMark Cave-Ayland "DATA OUT", "DATA IN", "COMMAND", "STATUS", 188abc139cdSMark Cave-Ayland "(reserved)", "(reserved)", "MESSAGE OUT", "MESSAGE IN" 189abc139cdSMark Cave-Ayland }; 190abc139cdSMark Cave-Ayland 191abc139cdSMark Cave-Ayland static void esp_set_phase(ESPState *s, uint8_t phase) 192abc139cdSMark Cave-Ayland { 193abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= ~7; 194abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] |= phase; 195abc139cdSMark Cave-Ayland 196abc139cdSMark Cave-Ayland trace_esp_set_phase(esp_phase_names[phase]); 197abc139cdSMark Cave-Ayland } 198abc139cdSMark Cave-Ayland 1995a83e83eSMark Cave-Ayland static uint8_t esp_get_phase(ESPState *s) 2005a83e83eSMark Cave-Ayland { 2015a83e83eSMark Cave-Ayland return s->rregs[ESP_RSTAT] & 7; 2025a83e83eSMark Cave-Ayland } 2035a83e83eSMark Cave-Ayland 204761bef75SMark Cave-Ayland static uint8_t esp_pdma_read(ESPState *s) 205761bef75SMark Cave-Ayland { 2068da90e81SMark Cave-Ayland uint8_t val; 2078da90e81SMark Cave-Ayland 208c5fef911SMark Cave-Ayland val = esp_fifo_pop(&s->fifo); 2098da90e81SMark Cave-Ayland return val; 210761bef75SMark Cave-Ayland } 211761bef75SMark Cave-Ayland 212761bef75SMark Cave-Ayland static void esp_pdma_write(ESPState *s, uint8_t val) 213761bef75SMark Cave-Ayland { 2148da90e81SMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 2158da90e81SMark Cave-Ayland 2163c421400SMark Cave-Ayland if (dmalen == 0) { 2178da90e81SMark Cave-Ayland return; 2188da90e81SMark Cave-Ayland } 2198da90e81SMark Cave-Ayland 220e5455b8cSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 2218da90e81SMark Cave-Ayland 2228da90e81SMark Cave-Ayland dmalen--; 2238da90e81SMark Cave-Ayland esp_set_tc(s, dmalen); 224761bef75SMark Cave-Ayland } 225761bef75SMark Cave-Ayland 226c7bce09cSMark Cave-Ayland static int esp_select(ESPState *s) 2276130b188SLaurent Vivier { 2286130b188SLaurent Vivier int target; 2296130b188SLaurent Vivier 2306130b188SLaurent Vivier target = s->wregs[ESP_WBUSID] & BUSID_DID; 2316130b188SLaurent Vivier 2326130b188SLaurent Vivier s->ti_size = 0; 2339b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_0; 2346130b188SLaurent Vivier 235cf40a5e4SMark Cave-Ayland if (s->current_req) { 236cf40a5e4SMark Cave-Ayland /* Started a new command before the old one finished. Cancel it. */ 237cf40a5e4SMark Cave-Ayland scsi_req_cancel(s->current_req); 238cf40a5e4SMark Cave-Ayland } 239cf40a5e4SMark Cave-Ayland 2406130b188SLaurent Vivier s->current_dev = scsi_device_find(&s->bus, 0, target, 0); 2416130b188SLaurent Vivier if (!s->current_dev) { 2426130b188SLaurent Vivier /* No such drive */ 2436130b188SLaurent Vivier s->rregs[ESP_RSTAT] = 0; 244cf1a7a9bSMark Cave-Ayland s->rregs[ESP_RINTR] = INTR_DC; 2456130b188SLaurent Vivier esp_raise_irq(s); 2466130b188SLaurent Vivier return -1; 2476130b188SLaurent Vivier } 2484e78f3bfSMark Cave-Ayland 2494e78f3bfSMark Cave-Ayland /* 2504e78f3bfSMark Cave-Ayland * Note that we deliberately don't raise the IRQ here: this will be done 251c90b2792SMark Cave-Ayland * either in esp_transfer_data() or esp_command_complete() 2524e78f3bfSMark Cave-Ayland */ 2536130b188SLaurent Vivier return 0; 2546130b188SLaurent Vivier } 2556130b188SLaurent Vivier 2563ee9a475SMark Cave-Ayland static void esp_do_dma(ESPState *s); 2573ee9a475SMark Cave-Ayland static void esp_do_nodma(ESPState *s); 2583ee9a475SMark Cave-Ayland 2594eb86065SPaolo Bonzini static void do_command_phase(ESPState *s) 26049ab747fSPaolo Bonzini { 2617b320a8eSMark Cave-Ayland uint32_t cmdlen; 26249ab747fSPaolo Bonzini int32_t datalen; 26349ab747fSPaolo Bonzini SCSIDevice *current_lun; 2647b320a8eSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 26549ab747fSPaolo Bonzini 2664eb86065SPaolo Bonzini trace_esp_do_command_phase(s->lun); 267023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 26899545751SMark Cave-Ayland if (!cmdlen || !s->current_dev) { 26999545751SMark Cave-Ayland return; 27099545751SMark Cave-Ayland } 2717b320a8eSMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, buf, cmdlen); 272023666daSMark Cave-Ayland 2734eb86065SPaolo Bonzini current_lun = scsi_device_find(&s->bus, 0, s->current_dev->id, s->lun); 274b22f83d8SAlexandra Diupina if (!current_lun) { 275b22f83d8SAlexandra Diupina /* No such drive */ 276b22f83d8SAlexandra Diupina s->rregs[ESP_RSTAT] = 0; 277b22f83d8SAlexandra Diupina s->rregs[ESP_RINTR] = INTR_DC; 278b22f83d8SAlexandra Diupina s->rregs[ESP_RSEQ] = SEQ_0; 279b22f83d8SAlexandra Diupina esp_raise_irq(s); 280b22f83d8SAlexandra Diupina return; 281b22f83d8SAlexandra Diupina } 282b22f83d8SAlexandra Diupina 283fe9d8927SJohn Millikin s->current_req = scsi_req_new(current_lun, 0, s->lun, buf, cmdlen, s); 28449ab747fSPaolo Bonzini datalen = scsi_req_enqueue(s->current_req); 28549ab747fSPaolo Bonzini s->ti_size = datalen; 286023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 287c90b2792SMark Cave-Ayland s->data_ready = false; 28849ab747fSPaolo Bonzini if (datalen != 0) { 2894e78f3bfSMark Cave-Ayland /* 290c90b2792SMark Cave-Ayland * Switch to DATA phase but wait until initial data xfer is 2914e78f3bfSMark Cave-Ayland * complete before raising the command completion interrupt 2924e78f3bfSMark Cave-Ayland */ 293c90b2792SMark Cave-Ayland if (datalen > 0) { 294abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DI); 29549ab747fSPaolo Bonzini } else { 296abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DO); 29749ab747fSPaolo Bonzini } 2984e78f3bfSMark Cave-Ayland scsi_req_continue(s->current_req); 2994e78f3bfSMark Cave-Ayland return; 3004e78f3bfSMark Cave-Ayland } 3014e78f3bfSMark Cave-Ayland } 30249ab747fSPaolo Bonzini 3034eb86065SPaolo Bonzini static void do_message_phase(ESPState *s) 30449ab747fSPaolo Bonzini { 3054eb86065SPaolo Bonzini if (s->cmdfifo_cdb_offset) { 3064eb86065SPaolo Bonzini uint8_t message = esp_fifo_pop(&s->cmdfifo); 307023666daSMark Cave-Ayland 3084eb86065SPaolo Bonzini trace_esp_do_identify(message); 3094eb86065SPaolo Bonzini s->lun = message & 7; 310023666daSMark Cave-Ayland s->cmdfifo_cdb_offset--; 3114eb86065SPaolo Bonzini } 31249ab747fSPaolo Bonzini 313799d90d8SMark Cave-Ayland /* Ignore extended messages for now */ 314023666daSMark Cave-Ayland if (s->cmdfifo_cdb_offset) { 3154eb86065SPaolo Bonzini int len = MIN(s->cmdfifo_cdb_offset, fifo8_num_used(&s->cmdfifo)); 316fa7505c1SMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, NULL, len); 317023666daSMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 318023666daSMark Cave-Ayland } 3194eb86065SPaolo Bonzini } 320023666daSMark Cave-Ayland 3214eb86065SPaolo Bonzini static void do_cmd(ESPState *s) 3224eb86065SPaolo Bonzini { 3234eb86065SPaolo Bonzini do_message_phase(s); 3244eb86065SPaolo Bonzini assert(s->cmdfifo_cdb_offset == 0); 3254eb86065SPaolo Bonzini do_command_phase(s); 32649ab747fSPaolo Bonzini } 32749ab747fSPaolo Bonzini 32849ab747fSPaolo Bonzini static void handle_satn(ESPState *s) 32949ab747fSPaolo Bonzini { 33049ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 33149ab747fSPaolo Bonzini s->dma_cb = handle_satn; 33249ab747fSPaolo Bonzini return; 33349ab747fSPaolo Bonzini } 334b46a43a2SMark Cave-Ayland 3351bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3361bcaf71bSMark Cave-Ayland return; 3371bcaf71bSMark Cave-Ayland } 3383ee9a475SMark Cave-Ayland 3393ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_MO); 3403ee9a475SMark Cave-Ayland 3413ee9a475SMark Cave-Ayland if (s->dma) { 3423ee9a475SMark Cave-Ayland esp_do_dma(s); 3433ee9a475SMark Cave-Ayland } else { 344d39592ffSMark Cave-Ayland esp_do_nodma(s); 34549ab747fSPaolo Bonzini } 34694d5c79dSMark Cave-Ayland } 34749ab747fSPaolo Bonzini 34849ab747fSPaolo Bonzini static void handle_s_without_atn(ESPState *s) 34949ab747fSPaolo Bonzini { 35049ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 35149ab747fSPaolo Bonzini s->dma_cb = handle_s_without_atn; 35249ab747fSPaolo Bonzini return; 35349ab747fSPaolo Bonzini } 354b46a43a2SMark Cave-Ayland 3551bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3561bcaf71bSMark Cave-Ayland return; 3571bcaf71bSMark Cave-Ayland } 3589ff0fd12SMark Cave-Ayland 359abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 3609ff0fd12SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 3619ff0fd12SMark Cave-Ayland 3629ff0fd12SMark Cave-Ayland if (s->dma) { 3639ff0fd12SMark Cave-Ayland esp_do_dma(s); 3649ff0fd12SMark Cave-Ayland } else { 365d39592ffSMark Cave-Ayland esp_do_nodma(s); 36649ab747fSPaolo Bonzini } 36749ab747fSPaolo Bonzini } 36849ab747fSPaolo Bonzini 36949ab747fSPaolo Bonzini static void handle_satn_stop(ESPState *s) 37049ab747fSPaolo Bonzini { 37149ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 37249ab747fSPaolo Bonzini s->dma_cb = handle_satn_stop; 37349ab747fSPaolo Bonzini return; 37449ab747fSPaolo Bonzini } 375b46a43a2SMark Cave-Ayland 3761bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3771bcaf71bSMark Cave-Ayland return; 3781bcaf71bSMark Cave-Ayland } 379db4d4150SMark Cave-Ayland 380abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_MO); 3815d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 382db4d4150SMark Cave-Ayland 383db4d4150SMark Cave-Ayland if (s->dma) { 384db4d4150SMark Cave-Ayland esp_do_dma(s); 385db4d4150SMark Cave-Ayland } else { 386d39592ffSMark Cave-Ayland esp_do_nodma(s); 38749ab747fSPaolo Bonzini } 38849ab747fSPaolo Bonzini } 38949ab747fSPaolo Bonzini 39049ab747fSPaolo Bonzini static void write_response(ESPState *s) 39149ab747fSPaolo Bonzini { 39249ab747fSPaolo Bonzini trace_esp_write_response(s->status); 393042879fcSMark Cave-Ayland 3948baa1472SMark Cave-Ayland if (s->dma) { 3958baa1472SMark Cave-Ayland esp_do_dma(s); 3968baa1472SMark Cave-Ayland } else { 39783428f7aSMark Cave-Ayland esp_do_nodma(s); 39849ab747fSPaolo Bonzini } 3998baa1472SMark Cave-Ayland } 40049ab747fSPaolo Bonzini 4015d02add4SMark Cave-Ayland static int esp_cdb_length(ESPState *s) 4025d02add4SMark Cave-Ayland { 4035d02add4SMark Cave-Ayland const uint8_t *pbuf; 4045d02add4SMark Cave-Ayland int cmdlen, len; 4055d02add4SMark Cave-Ayland 4065d02add4SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 4075d02add4SMark Cave-Ayland if (cmdlen < s->cmdfifo_cdb_offset) { 4085d02add4SMark Cave-Ayland return 0; 4095d02add4SMark Cave-Ayland } 4105d02add4SMark Cave-Ayland 4115d02add4SMark Cave-Ayland pbuf = fifo8_peek_buf(&s->cmdfifo, cmdlen, NULL); 4125d02add4SMark Cave-Ayland len = scsi_cdb_length((uint8_t *)&pbuf[s->cmdfifo_cdb_offset]); 4135d02add4SMark Cave-Ayland 4145d02add4SMark Cave-Ayland return len; 4155d02add4SMark Cave-Ayland } 4165d02add4SMark Cave-Ayland 417004826d0SMark Cave-Ayland static void esp_dma_ti_check(ESPState *s) 41849ab747fSPaolo Bonzini { 419af74b3c1SMark Cave-Ayland if (esp_get_tc(s) == 0 && fifo8_num_used(&s->fifo) < 2) { 420cf47a41eSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 42149ab747fSPaolo Bonzini esp_raise_irq(s); 422af74b3c1SMark Cave-Ayland esp_lower_drq(s); 423af74b3c1SMark Cave-Ayland } 42449ab747fSPaolo Bonzini } 42549ab747fSPaolo Bonzini 42649ab747fSPaolo Bonzini static void esp_do_dma(ESPState *s) 42749ab747fSPaolo Bonzini { 428023666daSMark Cave-Ayland uint32_t len, cmdlen; 429023666daSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 43019e9afb1SMark Cave-Ayland int n; 43149ab747fSPaolo Bonzini 4326cc88d6bSMark Cave-Ayland len = esp_get_tc(s); 433ad2725afSMark Cave-Ayland 434ad2725afSMark Cave-Ayland switch (esp_get_phase(s)) { 435ad2725afSMark Cave-Ayland case STAT_MO: 43646b0c361SMark Cave-Ayland if (s->dma_memory_read) { 43746b0c361SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 43846b0c361SMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 43946b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 44046b0c361SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 44146b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += len; 44246b0c361SMark Cave-Ayland } else { 44346b0c361SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 44446b0c361SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 44546b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 44646b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += n; 44746b0c361SMark Cave-Ayland } 44846b0c361SMark Cave-Ayland 44946b0c361SMark Cave-Ayland esp_raise_drq(s); 45046b0c361SMark Cave-Ayland 4513ee9a475SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 4523ee9a475SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 4533ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 4543ee9a475SMark Cave-Ayland /* First byte received, switch to command phase */ 4553ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_CD); 4569b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 4573ee9a475SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 4583ee9a475SMark Cave-Ayland 4593ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 4603ee9a475SMark Cave-Ayland /* Process any additional command phase data */ 4613ee9a475SMark Cave-Ayland esp_do_dma(s); 4623ee9a475SMark Cave-Ayland } 4633ee9a475SMark Cave-Ayland } 4643ee9a475SMark Cave-Ayland break; 4653ee9a475SMark Cave-Ayland 466db4d4150SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 467db4d4150SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) == 1) { 468db4d4150SMark Cave-Ayland /* First byte received, stop in message out phase */ 4699b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 470db4d4150SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 471db4d4150SMark Cave-Ayland 472db4d4150SMark Cave-Ayland /* Raise command completion interrupt */ 473db4d4150SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 474db4d4150SMark Cave-Ayland esp_raise_irq(s); 475db4d4150SMark Cave-Ayland } 476db4d4150SMark Cave-Ayland break; 477db4d4150SMark Cave-Ayland 4783fd325a2SMark Cave-Ayland case CMD_TI | CMD_DMA: 47946b0c361SMark Cave-Ayland /* ATN remains asserted until TC == 0 */ 48046b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 48146b0c361SMark Cave-Ayland esp_set_phase(s, STAT_CD); 482cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 48346b0c361SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 48446b0c361SMark Cave-Ayland esp_raise_irq(s); 48546b0c361SMark Cave-Ayland } 48646b0c361SMark Cave-Ayland break; 4873fd325a2SMark Cave-Ayland } 4883fd325a2SMark Cave-Ayland break; 48946b0c361SMark Cave-Ayland 490ad2725afSMark Cave-Ayland case STAT_CD: 491023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 492023666daSMark Cave-Ayland trace_esp_do_dma(cmdlen, len); 49374d71ea1SLaurent Vivier if (s->dma_memory_read) { 4940ebb5fd8SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 495023666daSMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 496023666daSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 497a0347651SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 49874d71ea1SLaurent Vivier } else { 4993c7f3c8bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 5003c7f3c8bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 5013c7f3c8bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 5023c7f3c8bSMark Cave-Ayland 50374d71ea1SLaurent Vivier esp_raise_drq(s); 5043c7f3c8bSMark Cave-Ayland } 505023666daSMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 50615407433SLaurent Vivier s->ti_size = 0; 50746b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 508799d90d8SMark Cave-Ayland /* Command has been received */ 509c959f218SMark Cave-Ayland do_cmd(s); 510799d90d8SMark Cave-Ayland } 511ad2725afSMark Cave-Ayland break; 5121454dc76SMark Cave-Ayland 5131454dc76SMark Cave-Ayland case STAT_DO: 5140db89536SMark Cave-Ayland if (!s->current_req) { 5150db89536SMark Cave-Ayland return; 5160db89536SMark Cave-Ayland } 5174460b86aSMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 51849ab747fSPaolo Bonzini /* Defer until data is available. */ 51949ab747fSPaolo Bonzini return; 52049ab747fSPaolo Bonzini } 52149ab747fSPaolo Bonzini if (len > s->async_len) { 52249ab747fSPaolo Bonzini len = s->async_len; 52349ab747fSPaolo Bonzini } 52474d71ea1SLaurent Vivier if (s->dma_memory_read) { 52549ab747fSPaolo Bonzini s->dma_memory_read(s->dma_opaque, s->async_buf, len); 526f3666223SMark Cave-Ayland 527f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 528f3666223SMark Cave-Ayland s->async_buf += len; 529f3666223SMark Cave-Ayland s->async_len -= len; 530f3666223SMark Cave-Ayland s->ti_size += len; 531f3666223SMark Cave-Ayland 532e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 533e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 534f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 535f3666223SMark Cave-Ayland return; 536f3666223SMark Cave-Ayland } 537f3666223SMark Cave-Ayland 538004826d0SMark Cave-Ayland esp_dma_ti_check(s); 53949ab747fSPaolo Bonzini } else { 54019e9afb1SMark Cave-Ayland /* Copy FIFO data to device */ 54119e9afb1SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 54219e9afb1SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 54319e9afb1SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 54419e9afb1SMark Cave-Ayland s->async_buf += n; 54519e9afb1SMark Cave-Ayland s->async_len -= n; 54619e9afb1SMark Cave-Ayland s->ti_size += n; 54719e9afb1SMark Cave-Ayland 54874d71ea1SLaurent Vivier esp_raise_drq(s); 549e4e166c8SMark Cave-Ayland 550e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 551e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 552e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 553e4e166c8SMark Cave-Ayland return; 554e4e166c8SMark Cave-Ayland } 555e4e166c8SMark Cave-Ayland 556004826d0SMark Cave-Ayland esp_dma_ti_check(s); 55774d71ea1SLaurent Vivier } 5581454dc76SMark Cave-Ayland break; 5591454dc76SMark Cave-Ayland 5601454dc76SMark Cave-Ayland case STAT_DI: 5611454dc76SMark Cave-Ayland if (!s->current_req) { 5621454dc76SMark Cave-Ayland return; 5631454dc76SMark Cave-Ayland } 5641454dc76SMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 5651454dc76SMark Cave-Ayland /* Defer until data is available. */ 5661454dc76SMark Cave-Ayland return; 5671454dc76SMark Cave-Ayland } 5681454dc76SMark Cave-Ayland if (len > s->async_len) { 5691454dc76SMark Cave-Ayland len = s->async_len; 5701454dc76SMark Cave-Ayland } 57174d71ea1SLaurent Vivier if (s->dma_memory_write) { 57249ab747fSPaolo Bonzini s->dma_memory_write(s->dma_opaque, s->async_buf, len); 573f3666223SMark Cave-Ayland 574f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 575f3666223SMark Cave-Ayland s->async_buf += len; 576f3666223SMark Cave-Ayland s->async_len -= len; 577f3666223SMark Cave-Ayland s->ti_size -= len; 578f3666223SMark Cave-Ayland 57902a3ce56SMark Cave-Ayland if (s->async_len == 0 && s->ti_size == 0 && esp_get_tc(s)) { 58002a3ce56SMark Cave-Ayland /* If the guest underflows TC then terminate SCSI request */ 58102a3ce56SMark Cave-Ayland scsi_req_continue(s->current_req); 58202a3ce56SMark Cave-Ayland return; 58302a3ce56SMark Cave-Ayland } 58402a3ce56SMark Cave-Ayland 585e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 586e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 587f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 588fabcba49SMark Cave-Ayland return; 589f3666223SMark Cave-Ayland } 590f3666223SMark Cave-Ayland 591004826d0SMark Cave-Ayland esp_dma_ti_check(s); 59274d71ea1SLaurent Vivier } else { 59382141c8bSMark Cave-Ayland /* Copy device data to FIFO */ 594042879fcSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo)); 595042879fcSMark Cave-Ayland fifo8_push_all(&s->fifo, s->async_buf, len); 59682141c8bSMark Cave-Ayland s->async_buf += len; 59782141c8bSMark Cave-Ayland s->async_len -= len; 59882141c8bSMark Cave-Ayland s->ti_size -= len; 59982141c8bSMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 60074d71ea1SLaurent Vivier esp_raise_drq(s); 601e4e166c8SMark Cave-Ayland 60202a3ce56SMark Cave-Ayland if (s->async_len == 0 && s->ti_size == 0 && esp_get_tc(s)) { 60302a3ce56SMark Cave-Ayland /* If the guest underflows TC then terminate SCSI request */ 60402a3ce56SMark Cave-Ayland scsi_req_continue(s->current_req); 60502a3ce56SMark Cave-Ayland return; 60602a3ce56SMark Cave-Ayland } 60702a3ce56SMark Cave-Ayland 608e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 609e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 610e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 611e4e166c8SMark Cave-Ayland return; 612e4e166c8SMark Cave-Ayland } 613e4e166c8SMark Cave-Ayland 614004826d0SMark Cave-Ayland esp_dma_ti_check(s); 615e4e166c8SMark Cave-Ayland } 6161454dc76SMark Cave-Ayland break; 6178baa1472SMark Cave-Ayland 6188baa1472SMark Cave-Ayland case STAT_ST: 6198baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6208baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6218baa1472SMark Cave-Ayland len = MIN(len, 1); 6228baa1472SMark Cave-Ayland 6238baa1472SMark Cave-Ayland if (len) { 6248baa1472SMark Cave-Ayland buf[0] = s->status; 6258baa1472SMark Cave-Ayland 6268baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6278baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 6288baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6298baa1472SMark Cave-Ayland } else { 6308baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 6318baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6328baa1472SMark Cave-Ayland } 6338baa1472SMark Cave-Ayland 6348baa1472SMark Cave-Ayland esp_set_phase(s, STAT_MI); 6358baa1472SMark Cave-Ayland 6368baa1472SMark Cave-Ayland if (esp_get_tc(s) > 0) { 6378baa1472SMark Cave-Ayland /* Process any message in phase data */ 6388baa1472SMark Cave-Ayland esp_do_dma(s); 6398baa1472SMark Cave-Ayland } 6408baa1472SMark Cave-Ayland } 6418baa1472SMark Cave-Ayland break; 64202a3ce56SMark Cave-Ayland 64302a3ce56SMark Cave-Ayland default: 64402a3ce56SMark Cave-Ayland /* Consume remaining data if the guest underflows TC */ 64502a3ce56SMark Cave-Ayland if (fifo8_num_used(&s->fifo) < 2) { 64602a3ce56SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 64702a3ce56SMark Cave-Ayland esp_raise_irq(s); 64802a3ce56SMark Cave-Ayland esp_lower_drq(s); 64902a3ce56SMark Cave-Ayland } 65002a3ce56SMark Cave-Ayland break; 6518baa1472SMark Cave-Ayland } 6528baa1472SMark Cave-Ayland break; 6538baa1472SMark Cave-Ayland 6548baa1472SMark Cave-Ayland case STAT_MI: 6558baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6568baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6578baa1472SMark Cave-Ayland len = MIN(len, 1); 6588baa1472SMark Cave-Ayland 6598baa1472SMark Cave-Ayland if (len) { 6608baa1472SMark Cave-Ayland buf[0] = 0; 6618baa1472SMark Cave-Ayland 6628baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6638baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 6648baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6658baa1472SMark Cave-Ayland } else { 6668baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 6678baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6688baa1472SMark Cave-Ayland } 6698baa1472SMark Cave-Ayland 6708baa1472SMark Cave-Ayland /* Raise end of command interrupt */ 6710ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 6728baa1472SMark Cave-Ayland esp_raise_irq(s); 6738baa1472SMark Cave-Ayland } 6748baa1472SMark Cave-Ayland break; 6758baa1472SMark Cave-Ayland } 6768baa1472SMark Cave-Ayland break; 67774d71ea1SLaurent Vivier } 67849ab747fSPaolo Bonzini } 67949ab747fSPaolo Bonzini 680a1b8d389SMark Cave-Ayland static void esp_nodma_ti_dataout(ESPState *s) 681a1b8d389SMark Cave-Ayland { 682a1b8d389SMark Cave-Ayland int len; 683a1b8d389SMark Cave-Ayland 684a1b8d389SMark Cave-Ayland if (!s->current_req) { 685a1b8d389SMark Cave-Ayland return; 686a1b8d389SMark Cave-Ayland } 687a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 688a1b8d389SMark Cave-Ayland /* Defer until data is available. */ 689a1b8d389SMark Cave-Ayland return; 690a1b8d389SMark Cave-Ayland } 691a1b8d389SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 692a1b8d389SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 693a1b8d389SMark Cave-Ayland esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 694a1b8d389SMark Cave-Ayland s->async_buf += len; 695a1b8d389SMark Cave-Ayland s->async_len -= len; 696a1b8d389SMark Cave-Ayland s->ti_size += len; 697a1b8d389SMark Cave-Ayland 698a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 699a1b8d389SMark Cave-Ayland scsi_req_continue(s->current_req); 700a1b8d389SMark Cave-Ayland return; 701a1b8d389SMark Cave-Ayland } 702a1b8d389SMark Cave-Ayland 703a1b8d389SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 704a1b8d389SMark Cave-Ayland esp_raise_irq(s); 705a1b8d389SMark Cave-Ayland } 706a1b8d389SMark Cave-Ayland 7071b9e48a5SMark Cave-Ayland static void esp_do_nodma(ESPState *s) 7081b9e48a5SMark Cave-Ayland { 7092572689bSMark Cave-Ayland uint8_t buf[ESP_FIFO_SZ]; 7107b320a8eSMark Cave-Ayland uint32_t cmdlen; 711a1b8d389SMark Cave-Ayland int n; 7121b9e48a5SMark Cave-Ayland 71383e803deSMark Cave-Ayland switch (esp_get_phase(s)) { 71483e803deSMark Cave-Ayland case STAT_MO: 715*215d2579SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 716*215d2579SMark Cave-Ayland case CMD_SELATN: 7172572689bSMark Cave-Ayland /* Copy FIFO into cmdfifo */ 7182572689bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 7192572689bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 7202572689bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 7212572689bSMark Cave-Ayland 7225d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 7235d02add4SMark Cave-Ayland /* First byte received, switch to command phase */ 7245d02add4SMark Cave-Ayland esp_set_phase(s, STAT_CD); 7259b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 7265d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 7275d02add4SMark Cave-Ayland 7285d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 7295d02add4SMark Cave-Ayland /* Process any additional command phase data */ 7305d02add4SMark Cave-Ayland esp_do_nodma(s); 7315d02add4SMark Cave-Ayland } 7325d02add4SMark Cave-Ayland } 7335d02add4SMark Cave-Ayland break; 7345d02add4SMark Cave-Ayland 7355d02add4SMark Cave-Ayland case CMD_SELATNS: 736*215d2579SMark Cave-Ayland /* Copy one byte from FIFO into cmdfifo */ 737*215d2579SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, 1); 738*215d2579SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 739*215d2579SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 740*215d2579SMark Cave-Ayland 741d39592ffSMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 7425d02add4SMark Cave-Ayland /* First byte received, stop in message out phase */ 7439b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 7445d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 7455d02add4SMark Cave-Ayland 7465d02add4SMark Cave-Ayland /* Raise command completion interrupt */ 7475d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 7485d02add4SMark Cave-Ayland esp_raise_irq(s); 7495d02add4SMark Cave-Ayland } 7505d02add4SMark Cave-Ayland break; 7515d02add4SMark Cave-Ayland 7525d02add4SMark Cave-Ayland case CMD_TI: 753*215d2579SMark Cave-Ayland /* Copy FIFO into cmdfifo */ 754*215d2579SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 755*215d2579SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 756*215d2579SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 757*215d2579SMark Cave-Ayland 7585d02add4SMark Cave-Ayland /* ATN remains asserted until FIFO empty */ 7591b9e48a5SMark Cave-Ayland s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo); 760abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 761cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 7621b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 7631b9e48a5SMark Cave-Ayland esp_raise_irq(s); 76479a6c7c6SMark Cave-Ayland break; 7655d02add4SMark Cave-Ayland } 7665d02add4SMark Cave-Ayland break; 76779a6c7c6SMark Cave-Ayland 76879a6c7c6SMark Cave-Ayland case STAT_CD: 769acdee66dSMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 770acdee66dSMark Cave-Ayland case CMD_TI: 77179a6c7c6SMark Cave-Ayland /* Copy FIFO into cmdfifo */ 77279a6c7c6SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 77379a6c7c6SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 77479a6c7c6SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 77579a6c7c6SMark Cave-Ayland 77679a6c7c6SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 77779a6c7c6SMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 77879a6c7c6SMark Cave-Ayland 7795d02add4SMark Cave-Ayland /* CDB may be transferred in one or more TI commands */ 7805d02add4SMark Cave-Ayland if (esp_cdb_length(s) && esp_cdb_length(s) == 7815d02add4SMark Cave-Ayland fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset) { 78279a6c7c6SMark Cave-Ayland /* Command has been received */ 78379a6c7c6SMark Cave-Ayland do_cmd(s); 7845d02add4SMark Cave-Ayland } else { 7855d02add4SMark Cave-Ayland /* 7865d02add4SMark Cave-Ayland * If data was transferred from the FIFO then raise bus 7875d02add4SMark Cave-Ayland * service interrupt to indicate transfer complete. Otherwise 7885d02add4SMark Cave-Ayland * defer until the next FIFO write. 7895d02add4SMark Cave-Ayland */ 7905d02add4SMark Cave-Ayland if (n) { 7915d02add4SMark Cave-Ayland /* Raise interrupt to indicate transfer complete */ 7925d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 7935d02add4SMark Cave-Ayland esp_raise_irq(s); 7945d02add4SMark Cave-Ayland } 7955d02add4SMark Cave-Ayland } 7965d02add4SMark Cave-Ayland break; 7975d02add4SMark Cave-Ayland 7988ba32048SMark Cave-Ayland case CMD_SEL | CMD_DMA: 7998ba32048SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 800acdee66dSMark Cave-Ayland /* Copy FIFO into cmdfifo */ 801acdee66dSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 802acdee66dSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 803acdee66dSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 804acdee66dSMark Cave-Ayland 8058ba32048SMark Cave-Ayland /* Handle when DMA transfer is terminated by non-DMA FIFO write */ 8068ba32048SMark Cave-Ayland if (esp_cdb_length(s) && esp_cdb_length(s) == 8078ba32048SMark Cave-Ayland fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset) { 8088ba32048SMark Cave-Ayland /* Command has been received */ 8098ba32048SMark Cave-Ayland do_cmd(s); 8108ba32048SMark Cave-Ayland } 8118ba32048SMark Cave-Ayland break; 8128ba32048SMark Cave-Ayland 8135d02add4SMark Cave-Ayland case CMD_SEL: 8145d02add4SMark Cave-Ayland case CMD_SELATN: 815acdee66dSMark Cave-Ayland /* FIFO already contain entire CDB: copy to cmdfifo and execute */ 816acdee66dSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 817acdee66dSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 818acdee66dSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 819acdee66dSMark Cave-Ayland 8205d02add4SMark Cave-Ayland do_cmd(s); 8215d02add4SMark Cave-Ayland break; 8225d02add4SMark Cave-Ayland } 82383e803deSMark Cave-Ayland break; 8241b9e48a5SMark Cave-Ayland 8259d1aa52bSMark Cave-Ayland case STAT_DO: 8265d02add4SMark Cave-Ayland /* Accumulate data in FIFO until non-DMA TI is executed */ 8279d1aa52bSMark Cave-Ayland break; 8289d1aa52bSMark Cave-Ayland 8299d1aa52bSMark Cave-Ayland case STAT_DI: 8309d1aa52bSMark Cave-Ayland if (!s->current_req) { 8319d1aa52bSMark Cave-Ayland return; 8329d1aa52bSMark Cave-Ayland } 8339d1aa52bSMark Cave-Ayland if (s->async_len == 0) { 8349d1aa52bSMark Cave-Ayland /* Defer until data is available. */ 8359d1aa52bSMark Cave-Ayland return; 8369d1aa52bSMark Cave-Ayland } 8376ef2cabcSMark Cave-Ayland if (fifo8_is_empty(&s->fifo)) { 8386ef2cabcSMark Cave-Ayland fifo8_push(&s->fifo, s->async_buf[0]); 8396ef2cabcSMark Cave-Ayland s->async_buf++; 8406ef2cabcSMark Cave-Ayland s->async_len--; 8416ef2cabcSMark Cave-Ayland s->ti_size--; 8426ef2cabcSMark Cave-Ayland } 8431b9e48a5SMark Cave-Ayland 8441b9e48a5SMark Cave-Ayland if (s->async_len == 0) { 8451b9e48a5SMark Cave-Ayland scsi_req_continue(s->current_req); 8461b9e48a5SMark Cave-Ayland return; 8471b9e48a5SMark Cave-Ayland } 8481b9e48a5SMark Cave-Ayland 8499655f72cSMark Cave-Ayland /* If preloading the FIFO, defer until TI command issued */ 8509655f72cSMark Cave-Ayland if (s->rregs[ESP_CMD] != CMD_TI) { 8519655f72cSMark Cave-Ayland return; 8529655f72cSMark Cave-Ayland } 8539655f72cSMark Cave-Ayland 8541b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 8551b9e48a5SMark Cave-Ayland esp_raise_irq(s); 8569d1aa52bSMark Cave-Ayland break; 85783428f7aSMark Cave-Ayland 85883428f7aSMark Cave-Ayland case STAT_ST: 85983428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 86083428f7aSMark Cave-Ayland case CMD_ICCS: 86183428f7aSMark Cave-Ayland fifo8_push(&s->fifo, s->status); 86283428f7aSMark Cave-Ayland esp_set_phase(s, STAT_MI); 86383428f7aSMark Cave-Ayland 86483428f7aSMark Cave-Ayland /* Process any message in phase data */ 86583428f7aSMark Cave-Ayland esp_do_nodma(s); 86683428f7aSMark Cave-Ayland break; 86783428f7aSMark Cave-Ayland } 86883428f7aSMark Cave-Ayland break; 86983428f7aSMark Cave-Ayland 87083428f7aSMark Cave-Ayland case STAT_MI: 87183428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 87283428f7aSMark Cave-Ayland case CMD_ICCS: 87383428f7aSMark Cave-Ayland fifo8_push(&s->fifo, 0); 87483428f7aSMark Cave-Ayland 8750ee71db4SMark Cave-Ayland /* Raise end of command interrupt */ 8760ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 87783428f7aSMark Cave-Ayland esp_raise_irq(s); 87883428f7aSMark Cave-Ayland break; 87983428f7aSMark Cave-Ayland } 88083428f7aSMark Cave-Ayland break; 8819d1aa52bSMark Cave-Ayland } 8821b9e48a5SMark Cave-Ayland } 8831b9e48a5SMark Cave-Ayland 8844aaa6ac3SMark Cave-Ayland void esp_command_complete(SCSIRequest *req, size_t resid) 88549ab747fSPaolo Bonzini { 8864aaa6ac3SMark Cave-Ayland ESPState *s = req->hba_private; 8875a83e83eSMark Cave-Ayland int to_device = (esp_get_phase(s) == STAT_DO); 8884aaa6ac3SMark Cave-Ayland 88949ab747fSPaolo Bonzini trace_esp_command_complete(); 8906ef2cabcSMark Cave-Ayland 8916ef2cabcSMark Cave-Ayland /* 8926ef2cabcSMark Cave-Ayland * Non-DMA transfers from the target will leave the last byte in 8936ef2cabcSMark Cave-Ayland * the FIFO so don't reset ti_size in this case 8946ef2cabcSMark Cave-Ayland */ 8956ef2cabcSMark Cave-Ayland if (s->dma || to_device) { 89649ab747fSPaolo Bonzini if (s->ti_size != 0) { 89749ab747fSPaolo Bonzini trace_esp_command_complete_unexpected(); 89849ab747fSPaolo Bonzini } 8996ef2cabcSMark Cave-Ayland } 9006ef2cabcSMark Cave-Ayland 90149ab747fSPaolo Bonzini s->async_len = 0; 9024aaa6ac3SMark Cave-Ayland if (req->status) { 90349ab747fSPaolo Bonzini trace_esp_command_complete_fail(); 90449ab747fSPaolo Bonzini } 9054aaa6ac3SMark Cave-Ayland s->status = req->status; 9066ef2cabcSMark Cave-Ayland 9076ef2cabcSMark Cave-Ayland /* 908cb988199SMark Cave-Ayland * Switch to status phase. For non-DMA transfers from the target the last 909cb988199SMark Cave-Ayland * byte is still in the FIFO 9106ef2cabcSMark Cave-Ayland */ 9118bb22495SMark Cave-Ayland s->ti_size = 0; 9128bb22495SMark Cave-Ayland 9138bb22495SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 9148bb22495SMark Cave-Ayland case CMD_SEL | CMD_DMA: 9158bb22495SMark Cave-Ayland case CMD_SEL: 9168bb22495SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 9178bb22495SMark Cave-Ayland case CMD_SELATN: 918cb988199SMark Cave-Ayland /* 9198bb22495SMark Cave-Ayland * No data phase for sequencer command so raise deferred bus service 920c90b2792SMark Cave-Ayland * and function complete interrupt 921cb988199SMark Cave-Ayland */ 922c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 9239b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 9248bb22495SMark Cave-Ayland break; 925cb22ce50SMark Cave-Ayland 926cb22ce50SMark Cave-Ayland case CMD_TI | CMD_DMA: 927cb22ce50SMark Cave-Ayland case CMD_TI: 928cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 929cb22ce50SMark Cave-Ayland break; 9306ef2cabcSMark Cave-Ayland } 9316ef2cabcSMark Cave-Ayland 9328bb22495SMark Cave-Ayland /* Raise bus service interrupt to indicate change to STATUS phase */ 9338bb22495SMark Cave-Ayland esp_set_phase(s, STAT_ST); 9348bb22495SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 9358bb22495SMark Cave-Ayland esp_raise_irq(s); 93602a3ce56SMark Cave-Ayland 93702a3ce56SMark Cave-Ayland /* Ensure DRQ is set correctly for TC underflow or normal completion */ 93802a3ce56SMark Cave-Ayland esp_dma_ti_check(s); 9398bb22495SMark Cave-Ayland 94049ab747fSPaolo Bonzini if (s->current_req) { 94149ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 94249ab747fSPaolo Bonzini s->current_req = NULL; 94349ab747fSPaolo Bonzini s->current_dev = NULL; 94449ab747fSPaolo Bonzini } 94549ab747fSPaolo Bonzini } 94649ab747fSPaolo Bonzini 94749ab747fSPaolo Bonzini void esp_transfer_data(SCSIRequest *req, uint32_t len) 94849ab747fSPaolo Bonzini { 94949ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9506cc88d6bSMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 95149ab747fSPaolo Bonzini 9526cc88d6bSMark Cave-Ayland trace_esp_transfer_data(dmalen, s->ti_size); 95349ab747fSPaolo Bonzini s->async_len = len; 95449ab747fSPaolo Bonzini s->async_buf = scsi_req_get_buf(req); 9554e78f3bfSMark Cave-Ayland 956c90b2792SMark Cave-Ayland if (!s->data_ready) { 957a4608fa0SMark Cave-Ayland s->data_ready = true; 958a4608fa0SMark Cave-Ayland 959a4608fa0SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 960a4608fa0SMark Cave-Ayland case CMD_SEL | CMD_DMA: 961a4608fa0SMark Cave-Ayland case CMD_SEL: 962a4608fa0SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 963a4608fa0SMark Cave-Ayland case CMD_SELATN: 964c90b2792SMark Cave-Ayland /* 965c90b2792SMark Cave-Ayland * Initial incoming data xfer is complete for sequencer command 966c90b2792SMark Cave-Ayland * so raise deferred bus service and function complete interrupt 967c90b2792SMark Cave-Ayland */ 968c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 9699b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 970c90b2792SMark Cave-Ayland break; 971c90b2792SMark Cave-Ayland 972a4608fa0SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 973a4608fa0SMark Cave-Ayland case CMD_SELATNS: 9744e78f3bfSMark Cave-Ayland /* 9754e78f3bfSMark Cave-Ayland * Initial incoming data xfer is complete so raise command 9764e78f3bfSMark Cave-Ayland * completion interrupt 9774e78f3bfSMark Cave-Ayland */ 9784e78f3bfSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 9799b2cdca2SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 980a4608fa0SMark Cave-Ayland break; 981a4608fa0SMark Cave-Ayland 982a4608fa0SMark Cave-Ayland case CMD_TI | CMD_DMA: 983a4608fa0SMark Cave-Ayland case CMD_TI: 984a4608fa0SMark Cave-Ayland /* 985a4608fa0SMark Cave-Ayland * Bus service interrupt raised because of initial change to 986a4608fa0SMark Cave-Ayland * DATA phase 987a4608fa0SMark Cave-Ayland */ 988cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 989a4608fa0SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 990a4608fa0SMark Cave-Ayland break; 991a4608fa0SMark Cave-Ayland } 992c90b2792SMark Cave-Ayland 993c90b2792SMark Cave-Ayland esp_raise_irq(s); 9944e78f3bfSMark Cave-Ayland } 9954e78f3bfSMark Cave-Ayland 9961b9e48a5SMark Cave-Ayland /* 9971b9e48a5SMark Cave-Ayland * Always perform the initial transfer upon reception of the next TI 9981b9e48a5SMark Cave-Ayland * command to ensure the DMA/non-DMA status of the command is correct. 9991b9e48a5SMark Cave-Ayland * It is not possible to use s->dma directly in the section below as 10001b9e48a5SMark Cave-Ayland * some OSs send non-DMA NOP commands after a DMA transfer. Hence if the 10011b9e48a5SMark Cave-Ayland * async data transfer is delayed then s->dma is set incorrectly. 10021b9e48a5SMark Cave-Ayland */ 10031b9e48a5SMark Cave-Ayland 100482003450SMark Cave-Ayland if (s->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) { 1005a79e767aSMark Cave-Ayland /* When the SCSI layer returns more data, raise deferred INTR_BS */ 1006004826d0SMark Cave-Ayland esp_dma_ti_check(s); 1007a79e767aSMark Cave-Ayland 1008a79e767aSMark Cave-Ayland esp_do_dma(s); 100982003450SMark Cave-Ayland } else if (s->rregs[ESP_CMD] == CMD_TI) { 10101b9e48a5SMark Cave-Ayland esp_do_nodma(s); 10111b9e48a5SMark Cave-Ayland } 101249ab747fSPaolo Bonzini } 101349ab747fSPaolo Bonzini 101449ab747fSPaolo Bonzini static void handle_ti(ESPState *s) 101549ab747fSPaolo Bonzini { 10161b9e48a5SMark Cave-Ayland uint32_t dmalen; 101749ab747fSPaolo Bonzini 101849ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 101949ab747fSPaolo Bonzini s->dma_cb = handle_ti; 102049ab747fSPaolo Bonzini return; 102149ab747fSPaolo Bonzini } 102249ab747fSPaolo Bonzini 102349ab747fSPaolo Bonzini if (s->dma) { 10241b9e48a5SMark Cave-Ayland dmalen = esp_get_tc(s); 1025b76624deSMark Cave-Ayland trace_esp_handle_ti(dmalen); 102649ab747fSPaolo Bonzini esp_do_dma(s); 1027799d90d8SMark Cave-Ayland } else { 10281b9e48a5SMark Cave-Ayland trace_esp_handle_ti(s->ti_size); 10291b9e48a5SMark Cave-Ayland esp_do_nodma(s); 10305d02add4SMark Cave-Ayland 10315d02add4SMark Cave-Ayland if (esp_get_phase(s) == STAT_DO) { 10325d02add4SMark Cave-Ayland esp_nodma_ti_dataout(s); 10335d02add4SMark Cave-Ayland } 103449ab747fSPaolo Bonzini } 103549ab747fSPaolo Bonzini } 103649ab747fSPaolo Bonzini 103749ab747fSPaolo Bonzini void esp_hard_reset(ESPState *s) 103849ab747fSPaolo Bonzini { 103949ab747fSPaolo Bonzini memset(s->rregs, 0, ESP_REGS); 104049ab747fSPaolo Bonzini memset(s->wregs, 0, ESP_REGS); 1041c9cf45c1SHannes Reinecke s->tchi_written = 0; 104249ab747fSPaolo Bonzini s->ti_size = 0; 10433f26c975SMark Cave-Ayland s->async_len = 0; 1044042879fcSMark Cave-Ayland fifo8_reset(&s->fifo); 1045023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 104649ab747fSPaolo Bonzini s->dma = 0; 104749ab747fSPaolo Bonzini s->dma_cb = NULL; 104849ab747fSPaolo Bonzini 104949ab747fSPaolo Bonzini s->rregs[ESP_CFG1] = 7; 105049ab747fSPaolo Bonzini } 105149ab747fSPaolo Bonzini 105249ab747fSPaolo Bonzini static void esp_soft_reset(ESPState *s) 105349ab747fSPaolo Bonzini { 105449ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 105574d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 105649ab747fSPaolo Bonzini esp_hard_reset(s); 105749ab747fSPaolo Bonzini } 105849ab747fSPaolo Bonzini 1059c6e51f1bSJohn Millikin static void esp_bus_reset(ESPState *s) 1060c6e51f1bSJohn Millikin { 10614a5fc890SPeter Maydell bus_cold_reset(BUS(&s->bus)); 1062c6e51f1bSJohn Millikin } 1063c6e51f1bSJohn Millikin 106449ab747fSPaolo Bonzini static void parent_esp_reset(ESPState *s, int irq, int level) 106549ab747fSPaolo Bonzini { 106649ab747fSPaolo Bonzini if (level) { 106749ab747fSPaolo Bonzini esp_soft_reset(s); 106849ab747fSPaolo Bonzini } 106949ab747fSPaolo Bonzini } 107049ab747fSPaolo Bonzini 1071f21fe39dSMark Cave-Ayland static void esp_run_cmd(ESPState *s) 1072f21fe39dSMark Cave-Ayland { 1073f21fe39dSMark Cave-Ayland uint8_t cmd = s->rregs[ESP_CMD]; 1074f21fe39dSMark Cave-Ayland 1075f21fe39dSMark Cave-Ayland if (cmd & CMD_DMA) { 1076f21fe39dSMark Cave-Ayland s->dma = 1; 1077f21fe39dSMark Cave-Ayland /* Reload DMA counter. */ 1078f21fe39dSMark Cave-Ayland if (esp_get_stc(s) == 0) { 1079f21fe39dSMark Cave-Ayland esp_set_tc(s, 0x10000); 1080f21fe39dSMark Cave-Ayland } else { 1081f21fe39dSMark Cave-Ayland esp_set_tc(s, esp_get_stc(s)); 1082f21fe39dSMark Cave-Ayland } 1083f21fe39dSMark Cave-Ayland } else { 1084f21fe39dSMark Cave-Ayland s->dma = 0; 1085f21fe39dSMark Cave-Ayland } 1086f21fe39dSMark Cave-Ayland switch (cmd & CMD_CMD) { 1087f21fe39dSMark Cave-Ayland case CMD_NOP: 1088f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_nop(cmd); 1089f21fe39dSMark Cave-Ayland break; 1090f21fe39dSMark Cave-Ayland case CMD_FLUSH: 1091f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_flush(cmd); 1092f21fe39dSMark Cave-Ayland fifo8_reset(&s->fifo); 1093f21fe39dSMark Cave-Ayland break; 1094f21fe39dSMark Cave-Ayland case CMD_RESET: 1095f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_reset(cmd); 1096f21fe39dSMark Cave-Ayland esp_soft_reset(s); 1097f21fe39dSMark Cave-Ayland break; 1098f21fe39dSMark Cave-Ayland case CMD_BUSRESET: 1099f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_bus_reset(cmd); 1100f21fe39dSMark Cave-Ayland esp_bus_reset(s); 1101f21fe39dSMark Cave-Ayland if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) { 1102f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_RST; 1103f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1104f21fe39dSMark Cave-Ayland } 1105f21fe39dSMark Cave-Ayland break; 1106f21fe39dSMark Cave-Ayland case CMD_TI: 1107f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ti(cmd); 1108f21fe39dSMark Cave-Ayland handle_ti(s); 1109f21fe39dSMark Cave-Ayland break; 1110f21fe39dSMark Cave-Ayland case CMD_ICCS: 1111f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_iccs(cmd); 1112f21fe39dSMark Cave-Ayland write_response(s); 1113f21fe39dSMark Cave-Ayland break; 1114f21fe39dSMark Cave-Ayland case CMD_MSGACC: 1115f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_msgacc(cmd); 1116f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_DC; 1117f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1118f21fe39dSMark Cave-Ayland s->rregs[ESP_RFLAGS] = 0; 1119f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1120f21fe39dSMark Cave-Ayland break; 1121f21fe39dSMark Cave-Ayland case CMD_PAD: 1122f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_pad(cmd); 1123f21fe39dSMark Cave-Ayland s->rregs[ESP_RSTAT] = STAT_TC; 1124f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 1125f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1126f21fe39dSMark Cave-Ayland break; 1127f21fe39dSMark Cave-Ayland case CMD_SATN: 1128f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_satn(cmd); 1129f21fe39dSMark Cave-Ayland break; 1130f21fe39dSMark Cave-Ayland case CMD_RSTATN: 1131f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_rstatn(cmd); 1132f21fe39dSMark Cave-Ayland break; 1133f21fe39dSMark Cave-Ayland case CMD_SEL: 1134f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_sel(cmd); 1135f21fe39dSMark Cave-Ayland handle_s_without_atn(s); 1136f21fe39dSMark Cave-Ayland break; 1137f21fe39dSMark Cave-Ayland case CMD_SELATN: 1138f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatn(cmd); 1139f21fe39dSMark Cave-Ayland handle_satn(s); 1140f21fe39dSMark Cave-Ayland break; 1141f21fe39dSMark Cave-Ayland case CMD_SELATNS: 1142f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatns(cmd); 1143f21fe39dSMark Cave-Ayland handle_satn_stop(s); 1144f21fe39dSMark Cave-Ayland break; 1145f21fe39dSMark Cave-Ayland case CMD_ENSEL: 1146f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ensel(cmd); 1147f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1148f21fe39dSMark Cave-Ayland break; 1149f21fe39dSMark Cave-Ayland case CMD_DISSEL: 1150f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_dissel(cmd); 1151f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1152f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1153f21fe39dSMark Cave-Ayland break; 1154f21fe39dSMark Cave-Ayland default: 1155f21fe39dSMark Cave-Ayland trace_esp_error_unhandled_command(cmd); 1156f21fe39dSMark Cave-Ayland break; 1157f21fe39dSMark Cave-Ayland } 1158f21fe39dSMark Cave-Ayland } 1159f21fe39dSMark Cave-Ayland 116049ab747fSPaolo Bonzini uint64_t esp_reg_read(ESPState *s, uint32_t saddr) 116149ab747fSPaolo Bonzini { 1162b630c075SMark Cave-Ayland uint32_t val; 116349ab747fSPaolo Bonzini 116449ab747fSPaolo Bonzini switch (saddr) { 116549ab747fSPaolo Bonzini case ESP_FIFO: 1166c5fef911SMark Cave-Ayland s->rregs[ESP_FIFO] = esp_fifo_pop(&s->fifo); 1167b630c075SMark Cave-Ayland val = s->rregs[ESP_FIFO]; 116849ab747fSPaolo Bonzini break; 116949ab747fSPaolo Bonzini case ESP_RINTR: 117094d5c79dSMark Cave-Ayland /* 117194d5c79dSMark Cave-Ayland * Clear sequence step, interrupt register and all status bits 117294d5c79dSMark Cave-Ayland * except TC 117394d5c79dSMark Cave-Ayland */ 1174b630c075SMark Cave-Ayland val = s->rregs[ESP_RINTR]; 117549ab747fSPaolo Bonzini s->rregs[ESP_RINTR] = 0; 1176d294b77aSMark Cave-Ayland esp_lower_irq(s); 1177d68212cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= STAT_TC | 7; 1178af947a3dSMark Cave-Ayland /* 1179af947a3dSMark Cave-Ayland * According to the datasheet ESP_RSEQ should be cleared, but as the 1180af947a3dSMark Cave-Ayland * emulation currently defers information transfers to the next TI 1181af947a3dSMark Cave-Ayland * command leave it for now so that pedantic guests such as the old 1182af947a3dSMark Cave-Ayland * Linux 2.6 driver see the correct flags before the next SCSI phase 1183af947a3dSMark Cave-Ayland * transition. 1184af947a3dSMark Cave-Ayland * 1185af947a3dSMark Cave-Ayland * s->rregs[ESP_RSEQ] = SEQ_0; 1186af947a3dSMark Cave-Ayland */ 1187b630c075SMark Cave-Ayland break; 1188c9cf45c1SHannes Reinecke case ESP_TCHI: 1189c9cf45c1SHannes Reinecke /* Return the unique id if the value has never been written */ 1190c9cf45c1SHannes Reinecke if (!s->tchi_written) { 1191b630c075SMark Cave-Ayland val = s->chip_id; 1192b630c075SMark Cave-Ayland } else { 1193b630c075SMark Cave-Ayland val = s->rregs[saddr]; 1194c9cf45c1SHannes Reinecke } 1195b630c075SMark Cave-Ayland break; 1196238ec4d7SMark Cave-Ayland case ESP_RFLAGS: 1197238ec4d7SMark Cave-Ayland /* Bottom 5 bits indicate number of bytes in FIFO */ 1198238ec4d7SMark Cave-Ayland val = fifo8_num_used(&s->fifo); 1199238ec4d7SMark Cave-Ayland break; 120049ab747fSPaolo Bonzini default: 1201b630c075SMark Cave-Ayland val = s->rregs[saddr]; 120249ab747fSPaolo Bonzini break; 120349ab747fSPaolo Bonzini } 1204b630c075SMark Cave-Ayland 1205b630c075SMark Cave-Ayland trace_esp_mem_readb(saddr, val); 1206b630c075SMark Cave-Ayland return val; 120749ab747fSPaolo Bonzini } 120849ab747fSPaolo Bonzini 120949ab747fSPaolo Bonzini void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) 121049ab747fSPaolo Bonzini { 121149ab747fSPaolo Bonzini trace_esp_mem_writeb(saddr, s->wregs[saddr], val); 121249ab747fSPaolo Bonzini switch (saddr) { 1213c9cf45c1SHannes Reinecke case ESP_TCHI: 1214c9cf45c1SHannes Reinecke s->tchi_written = true; 1215c9cf45c1SHannes Reinecke /* fall through */ 121649ab747fSPaolo Bonzini case ESP_TCLO: 121749ab747fSPaolo Bonzini case ESP_TCMID: 121849ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_TC; 121949ab747fSPaolo Bonzini break; 122049ab747fSPaolo Bonzini case ESP_FIFO: 12212572689bSMark Cave-Ayland if (!fifo8_is_full(&s->fifo)) { 12222572689bSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 12232572689bSMark Cave-Ayland } 12245d02add4SMark Cave-Ayland esp_do_nodma(s); 122549ab747fSPaolo Bonzini break; 122649ab747fSPaolo Bonzini case ESP_CMD: 122749ab747fSPaolo Bonzini s->rregs[saddr] = val; 1228f21fe39dSMark Cave-Ayland esp_run_cmd(s); 122949ab747fSPaolo Bonzini break; 123049ab747fSPaolo Bonzini case ESP_WBUSID ... ESP_WSYNO: 123149ab747fSPaolo Bonzini break; 123249ab747fSPaolo Bonzini case ESP_CFG1: 123349ab747fSPaolo Bonzini case ESP_CFG2: case ESP_CFG3: 123449ab747fSPaolo Bonzini case ESP_RES3: case ESP_RES4: 123549ab747fSPaolo Bonzini s->rregs[saddr] = val; 123649ab747fSPaolo Bonzini break; 123749ab747fSPaolo Bonzini case ESP_WCCF ... ESP_WTEST: 123849ab747fSPaolo Bonzini break; 123949ab747fSPaolo Bonzini default: 124049ab747fSPaolo Bonzini trace_esp_error_invalid_write(val, saddr); 124149ab747fSPaolo Bonzini return; 124249ab747fSPaolo Bonzini } 124349ab747fSPaolo Bonzini s->wregs[saddr] = val; 124449ab747fSPaolo Bonzini } 124549ab747fSPaolo Bonzini 124649ab747fSPaolo Bonzini static bool esp_mem_accepts(void *opaque, hwaddr addr, 12478372d383SPeter Maydell unsigned size, bool is_write, 12488372d383SPeter Maydell MemTxAttrs attrs) 124949ab747fSPaolo Bonzini { 125049ab747fSPaolo Bonzini return (size == 1) || (is_write && size == 4); 125149ab747fSPaolo Bonzini } 125249ab747fSPaolo Bonzini 12536cc88d6bSMark Cave-Ayland static bool esp_is_before_version_5(void *opaque, int version_id) 12546cc88d6bSMark Cave-Ayland { 12556cc88d6bSMark Cave-Ayland ESPState *s = ESP(opaque); 12566cc88d6bSMark Cave-Ayland 12576cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12586cc88d6bSMark Cave-Ayland return version_id < 5; 12596cc88d6bSMark Cave-Ayland } 12606cc88d6bSMark Cave-Ayland 12614e78f3bfSMark Cave-Ayland static bool esp_is_version_5(void *opaque, int version_id) 12624e78f3bfSMark Cave-Ayland { 12634e78f3bfSMark Cave-Ayland ESPState *s = ESP(opaque); 12644e78f3bfSMark Cave-Ayland 12654e78f3bfSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12660bcd5a18SMark Cave-Ayland return version_id >= 5; 12674e78f3bfSMark Cave-Ayland } 12684e78f3bfSMark Cave-Ayland 12694eb86065SPaolo Bonzini static bool esp_is_version_6(void *opaque, int version_id) 12704eb86065SPaolo Bonzini { 12714eb86065SPaolo Bonzini ESPState *s = ESP(opaque); 12724eb86065SPaolo Bonzini 12734eb86065SPaolo Bonzini version_id = MIN(version_id, s->mig_version_id); 12744eb86065SPaolo Bonzini return version_id >= 6; 12754eb86065SPaolo Bonzini } 12764eb86065SPaolo Bonzini 127782003450SMark Cave-Ayland static bool esp_is_between_version_5_and_6(void *opaque, int version_id) 127882003450SMark Cave-Ayland { 127982003450SMark Cave-Ayland ESPState *s = ESP(opaque); 128082003450SMark Cave-Ayland 128182003450SMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 128282003450SMark Cave-Ayland return version_id >= 5 && version_id <= 6; 128382003450SMark Cave-Ayland } 128482003450SMark Cave-Ayland 1285ff4a1dabSMark Cave-Ayland int esp_pre_save(void *opaque) 12860bd005beSMark Cave-Ayland { 1287ff4a1dabSMark Cave-Ayland ESPState *s = ESP(object_resolve_path_component( 1288ff4a1dabSMark Cave-Ayland OBJECT(opaque), "esp")); 12890bd005beSMark Cave-Ayland 12900bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 12910bd005beSMark Cave-Ayland return 0; 12920bd005beSMark Cave-Ayland } 12930bd005beSMark Cave-Ayland 12940bd005beSMark Cave-Ayland static int esp_post_load(void *opaque, int version_id) 12950bd005beSMark Cave-Ayland { 12960bd005beSMark Cave-Ayland ESPState *s = ESP(opaque); 1297042879fcSMark Cave-Ayland int len, i; 12980bd005beSMark Cave-Ayland 12996cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 13006cc88d6bSMark Cave-Ayland 13016cc88d6bSMark Cave-Ayland if (version_id < 5) { 13026cc88d6bSMark Cave-Ayland esp_set_tc(s, s->mig_dma_left); 1303042879fcSMark Cave-Ayland 1304042879fcSMark Cave-Ayland /* Migrate ti_buf to fifo */ 1305042879fcSMark Cave-Ayland len = s->mig_ti_wptr - s->mig_ti_rptr; 1306042879fcSMark Cave-Ayland for (i = 0; i < len; i++) { 1307042879fcSMark Cave-Ayland fifo8_push(&s->fifo, s->mig_ti_buf[i]); 1308042879fcSMark Cave-Ayland } 1309023666daSMark Cave-Ayland 1310023666daSMark Cave-Ayland /* Migrate cmdbuf to cmdfifo */ 1311023666daSMark Cave-Ayland for (i = 0; i < s->mig_cmdlen; i++) { 1312023666daSMark Cave-Ayland fifo8_push(&s->cmdfifo, s->mig_cmdbuf[i]); 1313023666daSMark Cave-Ayland } 13146cc88d6bSMark Cave-Ayland } 13156cc88d6bSMark Cave-Ayland 13160bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 13170bd005beSMark Cave-Ayland return 0; 13180bd005beSMark Cave-Ayland } 13190bd005beSMark Cave-Ayland 132049ab747fSPaolo Bonzini const VMStateDescription vmstate_esp = { 132149ab747fSPaolo Bonzini .name = "esp", 132282003450SMark Cave-Ayland .version_id = 7, 132349ab747fSPaolo Bonzini .minimum_version_id = 3, 13240bd005beSMark Cave-Ayland .post_load = esp_post_load, 13252d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 132649ab747fSPaolo Bonzini VMSTATE_BUFFER(rregs, ESPState), 132749ab747fSPaolo Bonzini VMSTATE_BUFFER(wregs, ESPState), 132849ab747fSPaolo Bonzini VMSTATE_INT32(ti_size, ESPState), 1329042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_rptr, ESPState, esp_is_before_version_5), 1330042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_wptr, ESPState, esp_is_before_version_5), 1331042879fcSMark Cave-Ayland VMSTATE_BUFFER_TEST(mig_ti_buf, ESPState, esp_is_before_version_5), 133249ab747fSPaolo Bonzini VMSTATE_UINT32(status, ESPState), 13334aaa6ac3SMark Cave-Ayland VMSTATE_UINT32_TEST(mig_deferred_status, ESPState, 13344aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 13354aaa6ac3SMark Cave-Ayland VMSTATE_BOOL_TEST(mig_deferred_complete, ESPState, 13364aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 133749ab747fSPaolo Bonzini VMSTATE_UINT32(dma, ESPState), 1338023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 0, 1339023666daSMark Cave-Ayland esp_is_before_version_5, 0, 16), 1340023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 4, 1341023666daSMark Cave-Ayland esp_is_before_version_5, 16, 1342023666daSMark Cave-Ayland sizeof(typeof_field(ESPState, mig_cmdbuf))), 1343023666daSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_cmdlen, ESPState, esp_is_before_version_5), 134449ab747fSPaolo Bonzini VMSTATE_UINT32(do_cmd, ESPState), 13456cc88d6bSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_dma_left, ESPState, esp_is_before_version_5), 13468dded6deSMark Cave-Ayland VMSTATE_BOOL_TEST(data_ready, ESPState, esp_is_version_5), 1347023666daSMark Cave-Ayland VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5), 1348042879fcSMark Cave-Ayland VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5), 1349023666daSMark Cave-Ayland VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5), 135082003450SMark Cave-Ayland VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState, 135182003450SMark Cave-Ayland esp_is_between_version_5_and_6), 13524eb86065SPaolo Bonzini VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6), 135349ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 135474d71ea1SLaurent Vivier }, 135549ab747fSPaolo Bonzini }; 135649ab747fSPaolo Bonzini 135749ab747fSPaolo Bonzini static void sysbus_esp_mem_write(void *opaque, hwaddr addr, 135849ab747fSPaolo Bonzini uint64_t val, unsigned int size) 135949ab747fSPaolo Bonzini { 136049ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1361eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 136249ab747fSPaolo Bonzini uint32_t saddr; 136349ab747fSPaolo Bonzini 136449ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1365eb169c76SMark Cave-Ayland esp_reg_write(s, saddr, val); 136649ab747fSPaolo Bonzini } 136749ab747fSPaolo Bonzini 136849ab747fSPaolo Bonzini static uint64_t sysbus_esp_mem_read(void *opaque, hwaddr addr, 136949ab747fSPaolo Bonzini unsigned int size) 137049ab747fSPaolo Bonzini { 137149ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1372eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 137349ab747fSPaolo Bonzini uint32_t saddr; 137449ab747fSPaolo Bonzini 137549ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1376eb169c76SMark Cave-Ayland return esp_reg_read(s, saddr); 137749ab747fSPaolo Bonzini } 137849ab747fSPaolo Bonzini 137949ab747fSPaolo Bonzini static const MemoryRegionOps sysbus_esp_mem_ops = { 138049ab747fSPaolo Bonzini .read = sysbus_esp_mem_read, 138149ab747fSPaolo Bonzini .write = sysbus_esp_mem_write, 138249ab747fSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 138349ab747fSPaolo Bonzini .valid.accepts = esp_mem_accepts, 138449ab747fSPaolo Bonzini }; 138549ab747fSPaolo Bonzini 138674d71ea1SLaurent Vivier static void sysbus_esp_pdma_write(void *opaque, hwaddr addr, 138774d71ea1SLaurent Vivier uint64_t val, unsigned int size) 138874d71ea1SLaurent Vivier { 138974d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1390eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 139174d71ea1SLaurent Vivier 1392960ebfd9SMark Cave-Ayland trace_esp_pdma_write(size); 1393960ebfd9SMark Cave-Ayland 139474d71ea1SLaurent Vivier switch (size) { 139574d71ea1SLaurent Vivier case 1: 1396761bef75SMark Cave-Ayland esp_pdma_write(s, val); 139774d71ea1SLaurent Vivier break; 139874d71ea1SLaurent Vivier case 2: 1399761bef75SMark Cave-Ayland esp_pdma_write(s, val >> 8); 1400761bef75SMark Cave-Ayland esp_pdma_write(s, val); 140174d71ea1SLaurent Vivier break; 140274d71ea1SLaurent Vivier } 1403b46a43a2SMark Cave-Ayland esp_do_dma(s); 140474d71ea1SLaurent Vivier } 140574d71ea1SLaurent Vivier 140674d71ea1SLaurent Vivier static uint64_t sysbus_esp_pdma_read(void *opaque, hwaddr addr, 140774d71ea1SLaurent Vivier unsigned int size) 140874d71ea1SLaurent Vivier { 140974d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1410eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 141174d71ea1SLaurent Vivier uint64_t val = 0; 141274d71ea1SLaurent Vivier 1413960ebfd9SMark Cave-Ayland trace_esp_pdma_read(size); 1414960ebfd9SMark Cave-Ayland 141574d71ea1SLaurent Vivier switch (size) { 141674d71ea1SLaurent Vivier case 1: 1417761bef75SMark Cave-Ayland val = esp_pdma_read(s); 141874d71ea1SLaurent Vivier break; 141974d71ea1SLaurent Vivier case 2: 1420761bef75SMark Cave-Ayland val = esp_pdma_read(s); 1421761bef75SMark Cave-Ayland val = (val << 8) | esp_pdma_read(s); 142274d71ea1SLaurent Vivier break; 142374d71ea1SLaurent Vivier } 1424b46a43a2SMark Cave-Ayland esp_do_dma(s); 142574d71ea1SLaurent Vivier return val; 142674d71ea1SLaurent Vivier } 142774d71ea1SLaurent Vivier 1428a7a22088SMark Cave-Ayland static void *esp_load_request(QEMUFile *f, SCSIRequest *req) 1429a7a22088SMark Cave-Ayland { 1430a7a22088SMark Cave-Ayland ESPState *s = container_of(req->bus, ESPState, bus); 1431a7a22088SMark Cave-Ayland 1432a7a22088SMark Cave-Ayland scsi_req_ref(req); 1433a7a22088SMark Cave-Ayland s->current_req = req; 1434a7a22088SMark Cave-Ayland return s; 1435a7a22088SMark Cave-Ayland } 1436a7a22088SMark Cave-Ayland 143774d71ea1SLaurent Vivier static const MemoryRegionOps sysbus_esp_pdma_ops = { 143874d71ea1SLaurent Vivier .read = sysbus_esp_pdma_read, 143974d71ea1SLaurent Vivier .write = sysbus_esp_pdma_write, 144074d71ea1SLaurent Vivier .endianness = DEVICE_NATIVE_ENDIAN, 144174d71ea1SLaurent Vivier .valid.min_access_size = 1, 1442cf1b8286SMark Cave-Ayland .valid.max_access_size = 4, 1443cf1b8286SMark Cave-Ayland .impl.min_access_size = 1, 1444cf1b8286SMark Cave-Ayland .impl.max_access_size = 2, 144574d71ea1SLaurent Vivier }; 144674d71ea1SLaurent Vivier 144749ab747fSPaolo Bonzini static const struct SCSIBusInfo esp_scsi_info = { 144849ab747fSPaolo Bonzini .tcq = false, 144949ab747fSPaolo Bonzini .max_target = ESP_MAX_DEVS, 145049ab747fSPaolo Bonzini .max_lun = 7, 145149ab747fSPaolo Bonzini 1452a7a22088SMark Cave-Ayland .load_request = esp_load_request, 145349ab747fSPaolo Bonzini .transfer_data = esp_transfer_data, 145449ab747fSPaolo Bonzini .complete = esp_command_complete, 145549ab747fSPaolo Bonzini .cancel = esp_request_cancelled 145649ab747fSPaolo Bonzini }; 145749ab747fSPaolo Bonzini 145849ab747fSPaolo Bonzini static void sysbus_esp_gpio_demux(void *opaque, int irq, int level) 145949ab747fSPaolo Bonzini { 146084fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(opaque); 1461eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 146249ab747fSPaolo Bonzini 146349ab747fSPaolo Bonzini switch (irq) { 146449ab747fSPaolo Bonzini case 0: 146549ab747fSPaolo Bonzini parent_esp_reset(s, irq, level); 146649ab747fSPaolo Bonzini break; 146749ab747fSPaolo Bonzini case 1: 1468b86dc5cbSMark Cave-Ayland esp_dma_enable(s, irq, level); 146949ab747fSPaolo Bonzini break; 147049ab747fSPaolo Bonzini } 147149ab747fSPaolo Bonzini } 147249ab747fSPaolo Bonzini 1473b09318caSHu Tao static void sysbus_esp_realize(DeviceState *dev, Error **errp) 147449ab747fSPaolo Bonzini { 1475b09318caSHu Tao SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 147684fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1477eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1478eb169c76SMark Cave-Ayland 1479eb169c76SMark Cave-Ayland if (!qdev_realize(DEVICE(s), NULL, errp)) { 1480eb169c76SMark Cave-Ayland return; 1481eb169c76SMark Cave-Ayland } 148249ab747fSPaolo Bonzini 1483b09318caSHu Tao sysbus_init_irq(sbd, &s->irq); 148474d71ea1SLaurent Vivier sysbus_init_irq(sbd, &s->irq_data); 148549ab747fSPaolo Bonzini assert(sysbus->it_shift != -1); 148649ab747fSPaolo Bonzini 148749ab747fSPaolo Bonzini s->chip_id = TCHI_FAS100A; 148829776739SPaolo Bonzini memory_region_init_io(&sysbus->iomem, OBJECT(sysbus), &sysbus_esp_mem_ops, 148974d71ea1SLaurent Vivier sysbus, "esp-regs", ESP_REGS << sysbus->it_shift); 1490b09318caSHu Tao sysbus_init_mmio(sbd, &sysbus->iomem); 149174d71ea1SLaurent Vivier memory_region_init_io(&sysbus->pdma, OBJECT(sysbus), &sysbus_esp_pdma_ops, 1492cf1b8286SMark Cave-Ayland sysbus, "esp-pdma", 4); 149374d71ea1SLaurent Vivier sysbus_init_mmio(sbd, &sysbus->pdma); 149449ab747fSPaolo Bonzini 1495b09318caSHu Tao qdev_init_gpio_in(dev, sysbus_esp_gpio_demux, 2); 149649ab747fSPaolo Bonzini 1497739e95f5SPeter Maydell scsi_bus_init(&s->bus, sizeof(s->bus), dev, &esp_scsi_info); 149849ab747fSPaolo Bonzini } 149949ab747fSPaolo Bonzini 150049ab747fSPaolo Bonzini static void sysbus_esp_hard_reset(DeviceState *dev) 150149ab747fSPaolo Bonzini { 150284fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1503eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1504eb169c76SMark Cave-Ayland 1505eb169c76SMark Cave-Ayland esp_hard_reset(s); 1506eb169c76SMark Cave-Ayland } 1507eb169c76SMark Cave-Ayland 1508eb169c76SMark Cave-Ayland static void sysbus_esp_init(Object *obj) 1509eb169c76SMark Cave-Ayland { 1510eb169c76SMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(obj); 1511eb169c76SMark Cave-Ayland 1512eb169c76SMark Cave-Ayland object_initialize_child(obj, "esp", &sysbus->esp, TYPE_ESP); 151349ab747fSPaolo Bonzini } 151449ab747fSPaolo Bonzini 151549ab747fSPaolo Bonzini static const VMStateDescription vmstate_sysbus_esp_scsi = { 151649ab747fSPaolo Bonzini .name = "sysbusespscsi", 15170bd005beSMark Cave-Ayland .version_id = 2, 1518ea84a442SGuenter Roeck .minimum_version_id = 1, 1519ff4a1dabSMark Cave-Ayland .pre_save = esp_pre_save, 15202d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 15210bd005beSMark Cave-Ayland VMSTATE_UINT8_V(esp.mig_version_id, SysBusESPState, 2), 152249ab747fSPaolo Bonzini VMSTATE_STRUCT(esp, SysBusESPState, 0, vmstate_esp, ESPState), 152349ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 152449ab747fSPaolo Bonzini } 152549ab747fSPaolo Bonzini }; 152649ab747fSPaolo Bonzini 152749ab747fSPaolo Bonzini static void sysbus_esp_class_init(ObjectClass *klass, void *data) 152849ab747fSPaolo Bonzini { 152949ab747fSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 153049ab747fSPaolo Bonzini 1531b09318caSHu Tao dc->realize = sysbus_esp_realize; 153249ab747fSPaolo Bonzini dc->reset = sysbus_esp_hard_reset; 153349ab747fSPaolo Bonzini dc->vmsd = &vmstate_sysbus_esp_scsi; 1534125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 153549ab747fSPaolo Bonzini } 153649ab747fSPaolo Bonzini 153749ab747fSPaolo Bonzini static const TypeInfo sysbus_esp_info = { 153884fbefedSMark Cave-Ayland .name = TYPE_SYSBUS_ESP, 153949ab747fSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 1540eb169c76SMark Cave-Ayland .instance_init = sysbus_esp_init, 154149ab747fSPaolo Bonzini .instance_size = sizeof(SysBusESPState), 154249ab747fSPaolo Bonzini .class_init = sysbus_esp_class_init, 154349ab747fSPaolo Bonzini }; 154449ab747fSPaolo Bonzini 1545042879fcSMark Cave-Ayland static void esp_finalize(Object *obj) 1546042879fcSMark Cave-Ayland { 1547042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1548042879fcSMark Cave-Ayland 1549042879fcSMark Cave-Ayland fifo8_destroy(&s->fifo); 1550023666daSMark Cave-Ayland fifo8_destroy(&s->cmdfifo); 1551042879fcSMark Cave-Ayland } 1552042879fcSMark Cave-Ayland 1553042879fcSMark Cave-Ayland static void esp_init(Object *obj) 1554042879fcSMark Cave-Ayland { 1555042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1556042879fcSMark Cave-Ayland 1557042879fcSMark Cave-Ayland fifo8_create(&s->fifo, ESP_FIFO_SZ); 1558023666daSMark Cave-Ayland fifo8_create(&s->cmdfifo, ESP_CMDFIFO_SZ); 1559042879fcSMark Cave-Ayland } 1560042879fcSMark Cave-Ayland 1561eb169c76SMark Cave-Ayland static void esp_class_init(ObjectClass *klass, void *data) 1562eb169c76SMark Cave-Ayland { 1563eb169c76SMark Cave-Ayland DeviceClass *dc = DEVICE_CLASS(klass); 1564eb169c76SMark Cave-Ayland 1565eb169c76SMark Cave-Ayland /* internal device for sysbusesp/pciespscsi, not user-creatable */ 1566eb169c76SMark Cave-Ayland dc->user_creatable = false; 1567eb169c76SMark Cave-Ayland set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1568eb169c76SMark Cave-Ayland } 1569eb169c76SMark Cave-Ayland 1570eb169c76SMark Cave-Ayland static const TypeInfo esp_info = { 1571eb169c76SMark Cave-Ayland .name = TYPE_ESP, 1572eb169c76SMark Cave-Ayland .parent = TYPE_DEVICE, 1573042879fcSMark Cave-Ayland .instance_init = esp_init, 1574042879fcSMark Cave-Ayland .instance_finalize = esp_finalize, 1575eb169c76SMark Cave-Ayland .instance_size = sizeof(ESPState), 1576eb169c76SMark Cave-Ayland .class_init = esp_class_init, 1577eb169c76SMark Cave-Ayland }; 1578eb169c76SMark Cave-Ayland 157949ab747fSPaolo Bonzini static void esp_register_types(void) 158049ab747fSPaolo Bonzini { 158149ab747fSPaolo Bonzini type_register_static(&sysbus_esp_info); 1582eb169c76SMark Cave-Ayland type_register_static(&esp_info); 158349ab747fSPaolo Bonzini } 158449ab747fSPaolo Bonzini 158549ab747fSPaolo Bonzini type_init(esp_register_types) 1586