149ab747fSPaolo Bonzini /* 249ab747fSPaolo Bonzini * QEMU ESP/NCR53C9x emulation 349ab747fSPaolo Bonzini * 449ab747fSPaolo Bonzini * Copyright (c) 2005-2006 Fabrice Bellard 549ab747fSPaolo Bonzini * Copyright (c) 2012 Herve Poussineau 649ab747fSPaolo Bonzini * 749ab747fSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 849ab747fSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 949ab747fSPaolo Bonzini * in the Software without restriction, including without limitation the rights 1049ab747fSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1149ab747fSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 1249ab747fSPaolo Bonzini * furnished to do so, subject to the following conditions: 1349ab747fSPaolo Bonzini * 1449ab747fSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 1549ab747fSPaolo Bonzini * all copies or substantial portions of the Software. 1649ab747fSPaolo Bonzini * 1749ab747fSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1849ab747fSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1949ab747fSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2049ab747fSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2149ab747fSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2249ab747fSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2349ab747fSPaolo Bonzini * THE SOFTWARE. 2449ab747fSPaolo Bonzini */ 2549ab747fSPaolo Bonzini 26a4ab4792SPeter Maydell #include "qemu/osdep.h" 2749ab747fSPaolo Bonzini #include "hw/sysbus.h" 28d6454270SMarkus Armbruster #include "migration/vmstate.h" 2964552b6bSMarkus Armbruster #include "hw/irq.h" 3049ab747fSPaolo Bonzini #include "hw/scsi/esp.h" 3149ab747fSPaolo Bonzini #include "trace.h" 3249ab747fSPaolo Bonzini #include "qemu/log.h" 330b8fa32fSMarkus Armbruster #include "qemu/module.h" 3449ab747fSPaolo Bonzini 3549ab747fSPaolo Bonzini /* 3649ab747fSPaolo Bonzini * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O), 3749ab747fSPaolo Bonzini * also produced as NCR89C100. See 3849ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt 3949ab747fSPaolo Bonzini * and 4049ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt 4174d71ea1SLaurent Vivier * 4274d71ea1SLaurent Vivier * On Macintosh Quadra it is a NCR53C96. 4349ab747fSPaolo Bonzini */ 4449ab747fSPaolo Bonzini 4549ab747fSPaolo Bonzini static void esp_raise_irq(ESPState *s) 4649ab747fSPaolo Bonzini { 4749ab747fSPaolo Bonzini if (!(s->rregs[ESP_RSTAT] & STAT_INT)) { 4849ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] |= STAT_INT; 4949ab747fSPaolo Bonzini qemu_irq_raise(s->irq); 5049ab747fSPaolo Bonzini trace_esp_raise_irq(); 5149ab747fSPaolo Bonzini } 5249ab747fSPaolo Bonzini } 5349ab747fSPaolo Bonzini 5449ab747fSPaolo Bonzini static void esp_lower_irq(ESPState *s) 5549ab747fSPaolo Bonzini { 5649ab747fSPaolo Bonzini if (s->rregs[ESP_RSTAT] & STAT_INT) { 5749ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_INT; 5849ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 5949ab747fSPaolo Bonzini trace_esp_lower_irq(); 6049ab747fSPaolo Bonzini } 6149ab747fSPaolo Bonzini } 6249ab747fSPaolo Bonzini 6374d71ea1SLaurent Vivier static void esp_raise_drq(ESPState *s) 6474d71ea1SLaurent Vivier { 6574d71ea1SLaurent Vivier qemu_irq_raise(s->irq_data); 66960ebfd9SMark Cave-Ayland trace_esp_raise_drq(); 6774d71ea1SLaurent Vivier } 6874d71ea1SLaurent Vivier 6974d71ea1SLaurent Vivier static void esp_lower_drq(ESPState *s) 7074d71ea1SLaurent Vivier { 7174d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 72960ebfd9SMark Cave-Ayland trace_esp_lower_drq(); 7374d71ea1SLaurent Vivier } 7474d71ea1SLaurent Vivier 7549ab747fSPaolo Bonzini void esp_dma_enable(ESPState *s, int irq, int level) 7649ab747fSPaolo Bonzini { 7749ab747fSPaolo Bonzini if (level) { 7849ab747fSPaolo Bonzini s->dma_enabled = 1; 7949ab747fSPaolo Bonzini trace_esp_dma_enable(); 8049ab747fSPaolo Bonzini if (s->dma_cb) { 8149ab747fSPaolo Bonzini s->dma_cb(s); 8249ab747fSPaolo Bonzini s->dma_cb = NULL; 8349ab747fSPaolo Bonzini } 8449ab747fSPaolo Bonzini } else { 8549ab747fSPaolo Bonzini trace_esp_dma_disable(); 8649ab747fSPaolo Bonzini s->dma_enabled = 0; 8749ab747fSPaolo Bonzini } 8849ab747fSPaolo Bonzini } 8949ab747fSPaolo Bonzini 9049ab747fSPaolo Bonzini void esp_request_cancelled(SCSIRequest *req) 9149ab747fSPaolo Bonzini { 9249ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9349ab747fSPaolo Bonzini 9449ab747fSPaolo Bonzini if (req == s->current_req) { 9549ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 9649ab747fSPaolo Bonzini s->current_req = NULL; 9749ab747fSPaolo Bonzini s->current_dev = NULL; 98324c8809SMark Cave-Ayland s->async_len = 0; 9949ab747fSPaolo Bonzini } 10049ab747fSPaolo Bonzini } 10149ab747fSPaolo Bonzini 102e5455b8cSMark Cave-Ayland static void esp_fifo_push(Fifo8 *fifo, uint8_t val) 103042879fcSMark Cave-Ayland { 104e5455b8cSMark Cave-Ayland if (fifo8_num_used(fifo) == fifo->capacity) { 105042879fcSMark Cave-Ayland trace_esp_error_fifo_overrun(); 106042879fcSMark Cave-Ayland return; 107042879fcSMark Cave-Ayland } 108042879fcSMark Cave-Ayland 109e5455b8cSMark Cave-Ayland fifo8_push(fifo, val); 110042879fcSMark Cave-Ayland } 111c5fef911SMark Cave-Ayland 112c5fef911SMark Cave-Ayland static uint8_t esp_fifo_pop(Fifo8 *fifo) 113042879fcSMark Cave-Ayland { 114c5fef911SMark Cave-Ayland if (fifo8_is_empty(fifo)) { 115042879fcSMark Cave-Ayland return 0; 116042879fcSMark Cave-Ayland } 117042879fcSMark Cave-Ayland 118c5fef911SMark Cave-Ayland return fifo8_pop(fifo); 119023666daSMark Cave-Ayland } 120023666daSMark Cave-Ayland 1217b320a8eSMark Cave-Ayland static uint32_t esp_fifo_pop_buf(Fifo8 *fifo, uint8_t *dest, int maxlen) 1227b320a8eSMark Cave-Ayland { 1237b320a8eSMark Cave-Ayland const uint8_t *buf; 12449c60d16SMark Cave-Ayland uint32_t n, n2; 12549c60d16SMark Cave-Ayland int len; 1267b320a8eSMark Cave-Ayland 1277b320a8eSMark Cave-Ayland if (maxlen == 0) { 1287b320a8eSMark Cave-Ayland return 0; 1297b320a8eSMark Cave-Ayland } 1307b320a8eSMark Cave-Ayland 13149c60d16SMark Cave-Ayland len = maxlen; 13249c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n); 1337b320a8eSMark Cave-Ayland if (dest) { 1347b320a8eSMark Cave-Ayland memcpy(dest, buf, n); 1357b320a8eSMark Cave-Ayland } 1367b320a8eSMark Cave-Ayland 13749c60d16SMark Cave-Ayland /* Add FIFO wraparound if needed */ 13849c60d16SMark Cave-Ayland len -= n; 13949c60d16SMark Cave-Ayland len = MIN(len, fifo8_num_used(fifo)); 14049c60d16SMark Cave-Ayland if (len) { 14149c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n2); 14249c60d16SMark Cave-Ayland if (dest) { 14349c60d16SMark Cave-Ayland memcpy(&dest[n], buf, n2); 14449c60d16SMark Cave-Ayland } 14549c60d16SMark Cave-Ayland n += n2; 14649c60d16SMark Cave-Ayland } 14749c60d16SMark Cave-Ayland 1487b320a8eSMark Cave-Ayland return n; 1497b320a8eSMark Cave-Ayland } 1507b320a8eSMark Cave-Ayland 151c47b5835SMark Cave-Ayland static uint32_t esp_get_tc(ESPState *s) 152c47b5835SMark Cave-Ayland { 153c47b5835SMark Cave-Ayland uint32_t dmalen; 154c47b5835SMark Cave-Ayland 155c47b5835SMark Cave-Ayland dmalen = s->rregs[ESP_TCLO]; 156c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCMID] << 8; 157c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCHI] << 16; 158c47b5835SMark Cave-Ayland 159c47b5835SMark Cave-Ayland return dmalen; 160c47b5835SMark Cave-Ayland } 161c47b5835SMark Cave-Ayland 162c47b5835SMark Cave-Ayland static void esp_set_tc(ESPState *s, uint32_t dmalen) 163c47b5835SMark Cave-Ayland { 164c5d7df28SMark Cave-Ayland uint32_t old_tc = esp_get_tc(s); 165c5d7df28SMark Cave-Ayland 166c47b5835SMark Cave-Ayland s->rregs[ESP_TCLO] = dmalen; 167c47b5835SMark Cave-Ayland s->rregs[ESP_TCMID] = dmalen >> 8; 168c47b5835SMark Cave-Ayland s->rregs[ESP_TCHI] = dmalen >> 16; 169c5d7df28SMark Cave-Ayland 170c5d7df28SMark Cave-Ayland if (old_tc && dmalen == 0) { 171c5d7df28SMark Cave-Ayland s->rregs[ESP_RSTAT] |= STAT_TC; 172c5d7df28SMark Cave-Ayland } 173c47b5835SMark Cave-Ayland } 174c47b5835SMark Cave-Ayland 175c04ed569SMark Cave-Ayland static uint32_t esp_get_stc(ESPState *s) 176c04ed569SMark Cave-Ayland { 177c04ed569SMark Cave-Ayland uint32_t dmalen; 178c04ed569SMark Cave-Ayland 179c04ed569SMark Cave-Ayland dmalen = s->wregs[ESP_TCLO]; 180c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCMID] << 8; 181c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCHI] << 16; 182c04ed569SMark Cave-Ayland 183c04ed569SMark Cave-Ayland return dmalen; 184c04ed569SMark Cave-Ayland } 185c04ed569SMark Cave-Ayland 186abc139cdSMark Cave-Ayland static const char *esp_phase_names[8] = { 187abc139cdSMark Cave-Ayland "DATA OUT", "DATA IN", "COMMAND", "STATUS", 188abc139cdSMark Cave-Ayland "(reserved)", "(reserved)", "MESSAGE OUT", "MESSAGE IN" 189abc139cdSMark Cave-Ayland }; 190abc139cdSMark Cave-Ayland 191abc139cdSMark Cave-Ayland static void esp_set_phase(ESPState *s, uint8_t phase) 192abc139cdSMark Cave-Ayland { 193abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= ~7; 194abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] |= phase; 195abc139cdSMark Cave-Ayland 196abc139cdSMark Cave-Ayland trace_esp_set_phase(esp_phase_names[phase]); 197abc139cdSMark Cave-Ayland } 198abc139cdSMark Cave-Ayland 1995a83e83eSMark Cave-Ayland static uint8_t esp_get_phase(ESPState *s) 2005a83e83eSMark Cave-Ayland { 2015a83e83eSMark Cave-Ayland return s->rregs[ESP_RSTAT] & 7; 2025a83e83eSMark Cave-Ayland } 2035a83e83eSMark Cave-Ayland 204761bef75SMark Cave-Ayland static uint8_t esp_pdma_read(ESPState *s) 205761bef75SMark Cave-Ayland { 2068da90e81SMark Cave-Ayland uint8_t val; 2078da90e81SMark Cave-Ayland 208c5fef911SMark Cave-Ayland val = esp_fifo_pop(&s->fifo); 2098da90e81SMark Cave-Ayland return val; 210761bef75SMark Cave-Ayland } 211761bef75SMark Cave-Ayland 212761bef75SMark Cave-Ayland static void esp_pdma_write(ESPState *s, uint8_t val) 213761bef75SMark Cave-Ayland { 2148da90e81SMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 2158da90e81SMark Cave-Ayland 2163c421400SMark Cave-Ayland if (dmalen == 0) { 2178da90e81SMark Cave-Ayland return; 2188da90e81SMark Cave-Ayland } 2198da90e81SMark Cave-Ayland 220e5455b8cSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 2218da90e81SMark Cave-Ayland 2228da90e81SMark Cave-Ayland dmalen--; 2238da90e81SMark Cave-Ayland esp_set_tc(s, dmalen); 224761bef75SMark Cave-Ayland } 225761bef75SMark Cave-Ayland 226c7bce09cSMark Cave-Ayland static int esp_select(ESPState *s) 2276130b188SLaurent Vivier { 2286130b188SLaurent Vivier int target; 2296130b188SLaurent Vivier 2306130b188SLaurent Vivier target = s->wregs[ESP_WBUSID] & BUSID_DID; 2316130b188SLaurent Vivier 2326130b188SLaurent Vivier s->ti_size = 0; 2336130b188SLaurent Vivier 234cf40a5e4SMark Cave-Ayland if (s->current_req) { 235cf40a5e4SMark Cave-Ayland /* Started a new command before the old one finished. Cancel it. */ 236cf40a5e4SMark Cave-Ayland scsi_req_cancel(s->current_req); 237cf40a5e4SMark Cave-Ayland } 238cf40a5e4SMark Cave-Ayland 2396130b188SLaurent Vivier s->current_dev = scsi_device_find(&s->bus, 0, target, 0); 2406130b188SLaurent Vivier if (!s->current_dev) { 2416130b188SLaurent Vivier /* No such drive */ 2426130b188SLaurent Vivier s->rregs[ESP_RSTAT] = 0; 243cf1a7a9bSMark Cave-Ayland s->rregs[ESP_RINTR] = INTR_DC; 2446130b188SLaurent Vivier s->rregs[ESP_RSEQ] = SEQ_0; 2456130b188SLaurent Vivier esp_raise_irq(s); 2466130b188SLaurent Vivier return -1; 2476130b188SLaurent Vivier } 2484e78f3bfSMark Cave-Ayland 2494e78f3bfSMark Cave-Ayland /* 2504e78f3bfSMark Cave-Ayland * Note that we deliberately don't raise the IRQ here: this will be done 251c90b2792SMark Cave-Ayland * either in esp_transfer_data() or esp_command_complete() 2524e78f3bfSMark Cave-Ayland */ 2534e78f3bfSMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 2546130b188SLaurent Vivier return 0; 2556130b188SLaurent Vivier } 2566130b188SLaurent Vivier 2573ee9a475SMark Cave-Ayland static void esp_do_dma(ESPState *s); 2583ee9a475SMark Cave-Ayland static void esp_do_nodma(ESPState *s); 2593ee9a475SMark Cave-Ayland 26020c8d2edSMark Cave-Ayland static uint32_t get_cmd(ESPState *s, uint32_t maxlen) 26149ab747fSPaolo Bonzini { 262023666daSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 263042879fcSMark Cave-Ayland uint32_t dmalen, n; 26449ab747fSPaolo Bonzini int target; 26549ab747fSPaolo Bonzini 26649ab747fSPaolo Bonzini target = s->wregs[ESP_WBUSID] & BUSID_DID; 26749ab747fSPaolo Bonzini if (s->dma) { 26820c8d2edSMark Cave-Ayland dmalen = MIN(esp_get_tc(s), maxlen); 26920c8d2edSMark Cave-Ayland if (dmalen == 0) { 2706c1fef6bSPrasad J Pandit return 0; 2716c1fef6bSPrasad J Pandit } 27274d71ea1SLaurent Vivier if (s->dma_memory_read) { 27349ab747fSPaolo Bonzini s->dma_memory_read(s->dma_opaque, buf, dmalen); 274fbc6510eSMark Cave-Ayland dmalen = MIN(fifo8_num_free(&s->cmdfifo), dmalen); 275023666daSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, dmalen); 276a0347651SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - dmalen); 27749ab747fSPaolo Bonzini } else { 27874d71ea1SLaurent Vivier return 0; 27974d71ea1SLaurent Vivier } 28074d71ea1SLaurent Vivier } else { 281023666daSMark Cave-Ayland dmalen = MIN(fifo8_num_used(&s->fifo), maxlen); 28220c8d2edSMark Cave-Ayland if (dmalen == 0) { 283d3cdc491SPrasad J Pandit return 0; 284d3cdc491SPrasad J Pandit } 2857b320a8eSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, dmalen); 286fbc6510eSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 2877b320a8eSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 28820c8d2edSMark Cave-Ayland } 28949ab747fSPaolo Bonzini trace_esp_get_cmd(dmalen, target); 29049ab747fSPaolo Bonzini 29149ab747fSPaolo Bonzini return dmalen; 29249ab747fSPaolo Bonzini } 29349ab747fSPaolo Bonzini 2944eb86065SPaolo Bonzini static void do_command_phase(ESPState *s) 29549ab747fSPaolo Bonzini { 2967b320a8eSMark Cave-Ayland uint32_t cmdlen; 29749ab747fSPaolo Bonzini int32_t datalen; 29849ab747fSPaolo Bonzini SCSIDevice *current_lun; 2997b320a8eSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 30049ab747fSPaolo Bonzini 3014eb86065SPaolo Bonzini trace_esp_do_command_phase(s->lun); 302023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 30399545751SMark Cave-Ayland if (!cmdlen || !s->current_dev) { 30499545751SMark Cave-Ayland return; 30599545751SMark Cave-Ayland } 3067b320a8eSMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, buf, cmdlen); 307023666daSMark Cave-Ayland 3084eb86065SPaolo Bonzini current_lun = scsi_device_find(&s->bus, 0, s->current_dev->id, s->lun); 309b22f83d8SAlexandra Diupina if (!current_lun) { 310b22f83d8SAlexandra Diupina /* No such drive */ 311b22f83d8SAlexandra Diupina s->rregs[ESP_RSTAT] = 0; 312b22f83d8SAlexandra Diupina s->rregs[ESP_RINTR] = INTR_DC; 313b22f83d8SAlexandra Diupina s->rregs[ESP_RSEQ] = SEQ_0; 314b22f83d8SAlexandra Diupina esp_raise_irq(s); 315b22f83d8SAlexandra Diupina return; 316b22f83d8SAlexandra Diupina } 317b22f83d8SAlexandra Diupina 318fe9d8927SJohn Millikin s->current_req = scsi_req_new(current_lun, 0, s->lun, buf, cmdlen, s); 31949ab747fSPaolo Bonzini datalen = scsi_req_enqueue(s->current_req); 32049ab747fSPaolo Bonzini s->ti_size = datalen; 321023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 322c90b2792SMark Cave-Ayland s->data_ready = false; 32349ab747fSPaolo Bonzini if (datalen != 0) { 3244e78f3bfSMark Cave-Ayland /* 325c90b2792SMark Cave-Ayland * Switch to DATA phase but wait until initial data xfer is 3264e78f3bfSMark Cave-Ayland * complete before raising the command completion interrupt 3274e78f3bfSMark Cave-Ayland */ 328c90b2792SMark Cave-Ayland if (datalen > 0) { 329abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DI); 33049ab747fSPaolo Bonzini } else { 331abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DO); 33249ab747fSPaolo Bonzini } 3334e78f3bfSMark Cave-Ayland scsi_req_continue(s->current_req); 3344e78f3bfSMark Cave-Ayland return; 3354e78f3bfSMark Cave-Ayland } 3364e78f3bfSMark Cave-Ayland } 33749ab747fSPaolo Bonzini 3384eb86065SPaolo Bonzini static void do_message_phase(ESPState *s) 33949ab747fSPaolo Bonzini { 3404eb86065SPaolo Bonzini if (s->cmdfifo_cdb_offset) { 3414eb86065SPaolo Bonzini uint8_t message = esp_fifo_pop(&s->cmdfifo); 342023666daSMark Cave-Ayland 3434eb86065SPaolo Bonzini trace_esp_do_identify(message); 3444eb86065SPaolo Bonzini s->lun = message & 7; 345023666daSMark Cave-Ayland s->cmdfifo_cdb_offset--; 3464eb86065SPaolo Bonzini } 34749ab747fSPaolo Bonzini 348799d90d8SMark Cave-Ayland /* Ignore extended messages for now */ 349023666daSMark Cave-Ayland if (s->cmdfifo_cdb_offset) { 3504eb86065SPaolo Bonzini int len = MIN(s->cmdfifo_cdb_offset, fifo8_num_used(&s->cmdfifo)); 351fa7505c1SMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, NULL, len); 352023666daSMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 353023666daSMark Cave-Ayland } 3544eb86065SPaolo Bonzini } 355023666daSMark Cave-Ayland 3564eb86065SPaolo Bonzini static void do_cmd(ESPState *s) 3574eb86065SPaolo Bonzini { 3584eb86065SPaolo Bonzini do_message_phase(s); 3594eb86065SPaolo Bonzini assert(s->cmdfifo_cdb_offset == 0); 3604eb86065SPaolo Bonzini do_command_phase(s); 36149ab747fSPaolo Bonzini } 36249ab747fSPaolo Bonzini 36349ab747fSPaolo Bonzini static void handle_satn(ESPState *s) 36449ab747fSPaolo Bonzini { 36549ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 36649ab747fSPaolo Bonzini s->dma_cb = handle_satn; 36749ab747fSPaolo Bonzini return; 36849ab747fSPaolo Bonzini } 369b46a43a2SMark Cave-Ayland 3701bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3711bcaf71bSMark Cave-Ayland return; 3721bcaf71bSMark Cave-Ayland } 3733ee9a475SMark Cave-Ayland 3743ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_MO); 3753ee9a475SMark Cave-Ayland 3763ee9a475SMark Cave-Ayland if (s->dma) { 3773ee9a475SMark Cave-Ayland esp_do_dma(s); 3783ee9a475SMark Cave-Ayland } else { 3793ee9a475SMark Cave-Ayland if (get_cmd(s, ESP_CMDFIFO_SZ)) { 380023666daSMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 381c959f218SMark Cave-Ayland do_cmd(s); 3821bcaf71bSMark Cave-Ayland } 38349ab747fSPaolo Bonzini } 38494d5c79dSMark Cave-Ayland } 38549ab747fSPaolo Bonzini 38649ab747fSPaolo Bonzini static void handle_s_without_atn(ESPState *s) 38749ab747fSPaolo Bonzini { 38849ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 38949ab747fSPaolo Bonzini s->dma_cb = handle_s_without_atn; 39049ab747fSPaolo Bonzini return; 39149ab747fSPaolo Bonzini } 392b46a43a2SMark Cave-Ayland 3931bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3941bcaf71bSMark Cave-Ayland return; 3951bcaf71bSMark Cave-Ayland } 3969ff0fd12SMark Cave-Ayland 397abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 3989ff0fd12SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 3999ff0fd12SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 4009ff0fd12SMark Cave-Ayland 4019ff0fd12SMark Cave-Ayland if (s->dma) { 4029ff0fd12SMark Cave-Ayland esp_do_dma(s); 4039ff0fd12SMark Cave-Ayland } else { 4049ff0fd12SMark Cave-Ayland if (get_cmd(s, ESP_CMDFIFO_SZ)) { 4059ff0fd12SMark Cave-Ayland do_cmd(s); 4069ff0fd12SMark Cave-Ayland } 40749ab747fSPaolo Bonzini } 40849ab747fSPaolo Bonzini } 40949ab747fSPaolo Bonzini 41049ab747fSPaolo Bonzini static void handle_satn_stop(ESPState *s) 41149ab747fSPaolo Bonzini { 41249ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 41349ab747fSPaolo Bonzini s->dma_cb = handle_satn_stop; 41449ab747fSPaolo Bonzini return; 41549ab747fSPaolo Bonzini } 416b46a43a2SMark Cave-Ayland 4171bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 4181bcaf71bSMark Cave-Ayland return; 4191bcaf71bSMark Cave-Ayland } 420db4d4150SMark Cave-Ayland 421abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_MO); 422db4d4150SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 423*5d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 424db4d4150SMark Cave-Ayland 425db4d4150SMark Cave-Ayland if (s->dma) { 426db4d4150SMark Cave-Ayland esp_do_dma(s); 427db4d4150SMark Cave-Ayland } else { 428db4d4150SMark Cave-Ayland if (get_cmd(s, 1)) { 429db4d4150SMark Cave-Ayland trace_esp_handle_satn_stop(fifo8_num_used(&s->cmdfifo)); 430db4d4150SMark Cave-Ayland 431db4d4150SMark Cave-Ayland /* Raise command completion interrupt */ 432cf47a41eSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 433799d90d8SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 43449ab747fSPaolo Bonzini esp_raise_irq(s); 4351bcaf71bSMark Cave-Ayland } 43649ab747fSPaolo Bonzini } 43749ab747fSPaolo Bonzini } 43849ab747fSPaolo Bonzini 43949ab747fSPaolo Bonzini static void write_response(ESPState *s) 44049ab747fSPaolo Bonzini { 441e3922557SMark Cave-Ayland uint8_t buf[2]; 442042879fcSMark Cave-Ayland 44349ab747fSPaolo Bonzini trace_esp_write_response(s->status); 444042879fcSMark Cave-Ayland 4458baa1472SMark Cave-Ayland if (s->dma) { 4468baa1472SMark Cave-Ayland esp_do_dma(s); 4478baa1472SMark Cave-Ayland } else { 448e3922557SMark Cave-Ayland buf[0] = s->status; 449e3922557SMark Cave-Ayland buf[1] = 0; 450042879fcSMark Cave-Ayland 451e3922557SMark Cave-Ayland fifo8_reset(&s->fifo); 452e3922557SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, 2); 45349ab747fSPaolo Bonzini s->rregs[ESP_RFLAGS] = 2; 45449ab747fSPaolo Bonzini esp_raise_irq(s); 45549ab747fSPaolo Bonzini } 4568baa1472SMark Cave-Ayland } 45749ab747fSPaolo Bonzini 458*5d02add4SMark Cave-Ayland static int esp_cdb_length(ESPState *s) 459*5d02add4SMark Cave-Ayland { 460*5d02add4SMark Cave-Ayland const uint8_t *pbuf; 461*5d02add4SMark Cave-Ayland int cmdlen, len; 462*5d02add4SMark Cave-Ayland 463*5d02add4SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 464*5d02add4SMark Cave-Ayland if (cmdlen < s->cmdfifo_cdb_offset) { 465*5d02add4SMark Cave-Ayland return 0; 466*5d02add4SMark Cave-Ayland } 467*5d02add4SMark Cave-Ayland 468*5d02add4SMark Cave-Ayland pbuf = fifo8_peek_buf(&s->cmdfifo, cmdlen, NULL); 469*5d02add4SMark Cave-Ayland len = scsi_cdb_length((uint8_t *)&pbuf[s->cmdfifo_cdb_offset]); 470*5d02add4SMark Cave-Ayland 471*5d02add4SMark Cave-Ayland return len; 472*5d02add4SMark Cave-Ayland } 473*5d02add4SMark Cave-Ayland 474004826d0SMark Cave-Ayland static void esp_dma_ti_check(ESPState *s) 47549ab747fSPaolo Bonzini { 476af74b3c1SMark Cave-Ayland if (esp_get_tc(s) == 0 && fifo8_num_used(&s->fifo) < 2) { 477cf47a41eSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 47849ab747fSPaolo Bonzini esp_raise_irq(s); 479af74b3c1SMark Cave-Ayland esp_lower_drq(s); 480af74b3c1SMark Cave-Ayland } 48149ab747fSPaolo Bonzini } 48249ab747fSPaolo Bonzini 48349ab747fSPaolo Bonzini static void esp_do_dma(ESPState *s) 48449ab747fSPaolo Bonzini { 485023666daSMark Cave-Ayland uint32_t len, cmdlen; 486023666daSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 48719e9afb1SMark Cave-Ayland int n; 48849ab747fSPaolo Bonzini 4896cc88d6bSMark Cave-Ayland len = esp_get_tc(s); 490ad2725afSMark Cave-Ayland 491ad2725afSMark Cave-Ayland switch (esp_get_phase(s)) { 492ad2725afSMark Cave-Ayland case STAT_MO: 49346b0c361SMark Cave-Ayland if (s->dma_memory_read) { 49446b0c361SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 49546b0c361SMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 49646b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 49746b0c361SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 49846b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += len; 49946b0c361SMark Cave-Ayland } else { 50046b0c361SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 50146b0c361SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 50246b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 50346b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += n; 50446b0c361SMark Cave-Ayland } 50546b0c361SMark Cave-Ayland 50646b0c361SMark Cave-Ayland esp_raise_drq(s); 50746b0c361SMark Cave-Ayland 5083ee9a475SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 5093ee9a475SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 5103ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 5113ee9a475SMark Cave-Ayland /* First byte received, switch to command phase */ 5123ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_CD); 5133ee9a475SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 5143ee9a475SMark Cave-Ayland 5153ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 5163ee9a475SMark Cave-Ayland /* Process any additional command phase data */ 5173ee9a475SMark Cave-Ayland esp_do_dma(s); 5183ee9a475SMark Cave-Ayland } 5193ee9a475SMark Cave-Ayland } 5203ee9a475SMark Cave-Ayland break; 5213ee9a475SMark Cave-Ayland 522db4d4150SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 523db4d4150SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) == 1) { 524db4d4150SMark Cave-Ayland /* First byte received, stop in message out phase */ 525db4d4150SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 526db4d4150SMark Cave-Ayland 527db4d4150SMark Cave-Ayland /* Raise command completion interrupt */ 528db4d4150SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 529db4d4150SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 530db4d4150SMark Cave-Ayland esp_raise_irq(s); 531db4d4150SMark Cave-Ayland } 532db4d4150SMark Cave-Ayland break; 533db4d4150SMark Cave-Ayland 5343fd325a2SMark Cave-Ayland case CMD_TI | CMD_DMA: 53546b0c361SMark Cave-Ayland /* ATN remains asserted until TC == 0 */ 53646b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 53746b0c361SMark Cave-Ayland esp_set_phase(s, STAT_CD); 538cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 53946b0c361SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 54046b0c361SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 54146b0c361SMark Cave-Ayland esp_raise_irq(s); 54246b0c361SMark Cave-Ayland } 54346b0c361SMark Cave-Ayland break; 5443fd325a2SMark Cave-Ayland } 5453fd325a2SMark Cave-Ayland break; 54646b0c361SMark Cave-Ayland 547ad2725afSMark Cave-Ayland case STAT_CD: 548023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 549023666daSMark Cave-Ayland trace_esp_do_dma(cmdlen, len); 55074d71ea1SLaurent Vivier if (s->dma_memory_read) { 5510ebb5fd8SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 552023666daSMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 553023666daSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 554a0347651SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 55574d71ea1SLaurent Vivier } else { 5563c7f3c8bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 5573c7f3c8bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 5583c7f3c8bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 5593c7f3c8bSMark Cave-Ayland 56074d71ea1SLaurent Vivier esp_raise_drq(s); 5613c7f3c8bSMark Cave-Ayland } 562023666daSMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 56315407433SLaurent Vivier s->ti_size = 0; 56446b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 565799d90d8SMark Cave-Ayland /* Command has been received */ 566c959f218SMark Cave-Ayland do_cmd(s); 567799d90d8SMark Cave-Ayland } 568ad2725afSMark Cave-Ayland break; 5691454dc76SMark Cave-Ayland 5701454dc76SMark Cave-Ayland case STAT_DO: 5710db89536SMark Cave-Ayland if (!s->current_req) { 5720db89536SMark Cave-Ayland return; 5730db89536SMark Cave-Ayland } 5744460b86aSMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 57549ab747fSPaolo Bonzini /* Defer until data is available. */ 57649ab747fSPaolo Bonzini return; 57749ab747fSPaolo Bonzini } 57849ab747fSPaolo Bonzini if (len > s->async_len) { 57949ab747fSPaolo Bonzini len = s->async_len; 58049ab747fSPaolo Bonzini } 58174d71ea1SLaurent Vivier if (s->dma_memory_read) { 58249ab747fSPaolo Bonzini s->dma_memory_read(s->dma_opaque, s->async_buf, len); 583f3666223SMark Cave-Ayland 584f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 585f3666223SMark Cave-Ayland s->async_buf += len; 586f3666223SMark Cave-Ayland s->async_len -= len; 587f3666223SMark Cave-Ayland s->ti_size += len; 588f3666223SMark Cave-Ayland 589e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 590e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 591f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 592f3666223SMark Cave-Ayland return; 593f3666223SMark Cave-Ayland } 594f3666223SMark Cave-Ayland 595004826d0SMark Cave-Ayland esp_dma_ti_check(s); 59649ab747fSPaolo Bonzini } else { 59719e9afb1SMark Cave-Ayland /* Copy FIFO data to device */ 59819e9afb1SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 59919e9afb1SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 60019e9afb1SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 60119e9afb1SMark Cave-Ayland s->async_buf += n; 60219e9afb1SMark Cave-Ayland s->async_len -= n; 60319e9afb1SMark Cave-Ayland s->ti_size += n; 60419e9afb1SMark Cave-Ayland 60574d71ea1SLaurent Vivier esp_raise_drq(s); 606e4e166c8SMark Cave-Ayland 607e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 608e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 609e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 610e4e166c8SMark Cave-Ayland return; 611e4e166c8SMark Cave-Ayland } 612e4e166c8SMark Cave-Ayland 613004826d0SMark Cave-Ayland esp_dma_ti_check(s); 61474d71ea1SLaurent Vivier } 6151454dc76SMark Cave-Ayland break; 6161454dc76SMark Cave-Ayland 6171454dc76SMark Cave-Ayland case STAT_DI: 6181454dc76SMark Cave-Ayland if (!s->current_req) { 6191454dc76SMark Cave-Ayland return; 6201454dc76SMark Cave-Ayland } 6211454dc76SMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 6221454dc76SMark Cave-Ayland /* Defer until data is available. */ 6231454dc76SMark Cave-Ayland return; 6241454dc76SMark Cave-Ayland } 6251454dc76SMark Cave-Ayland if (len > s->async_len) { 6261454dc76SMark Cave-Ayland len = s->async_len; 6271454dc76SMark Cave-Ayland } 62874d71ea1SLaurent Vivier if (s->dma_memory_write) { 62949ab747fSPaolo Bonzini s->dma_memory_write(s->dma_opaque, s->async_buf, len); 630f3666223SMark Cave-Ayland 631f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 632f3666223SMark Cave-Ayland s->async_buf += len; 633f3666223SMark Cave-Ayland s->async_len -= len; 634f3666223SMark Cave-Ayland s->ti_size -= len; 635f3666223SMark Cave-Ayland 636e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 637e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 638f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 639fabcba49SMark Cave-Ayland return; 640f3666223SMark Cave-Ayland } 641f3666223SMark Cave-Ayland 642004826d0SMark Cave-Ayland esp_dma_ti_check(s); 64374d71ea1SLaurent Vivier } else { 64482141c8bSMark Cave-Ayland /* Copy device data to FIFO */ 645042879fcSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo)); 646042879fcSMark Cave-Ayland fifo8_push_all(&s->fifo, s->async_buf, len); 64782141c8bSMark Cave-Ayland s->async_buf += len; 64882141c8bSMark Cave-Ayland s->async_len -= len; 64982141c8bSMark Cave-Ayland s->ti_size -= len; 65082141c8bSMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 65174d71ea1SLaurent Vivier esp_raise_drq(s); 652e4e166c8SMark Cave-Ayland 653e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 654e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 655e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 656e4e166c8SMark Cave-Ayland return; 657e4e166c8SMark Cave-Ayland } 658e4e166c8SMark Cave-Ayland 659004826d0SMark Cave-Ayland esp_dma_ti_check(s); 660e4e166c8SMark Cave-Ayland } 6611454dc76SMark Cave-Ayland break; 6628baa1472SMark Cave-Ayland 6638baa1472SMark Cave-Ayland case STAT_ST: 6648baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6658baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6668baa1472SMark Cave-Ayland len = MIN(len, 1); 6678baa1472SMark Cave-Ayland 6688baa1472SMark Cave-Ayland if (len) { 6698baa1472SMark Cave-Ayland buf[0] = s->status; 6708baa1472SMark Cave-Ayland 6718baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6728baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 6738baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6748baa1472SMark Cave-Ayland } else { 6758baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 6768baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6778baa1472SMark Cave-Ayland } 6788baa1472SMark Cave-Ayland 6798baa1472SMark Cave-Ayland esp_set_phase(s, STAT_MI); 6808baa1472SMark Cave-Ayland 6818baa1472SMark Cave-Ayland if (esp_get_tc(s) > 0) { 6828baa1472SMark Cave-Ayland /* Process any message in phase data */ 6838baa1472SMark Cave-Ayland esp_do_dma(s); 6848baa1472SMark Cave-Ayland } 6858baa1472SMark Cave-Ayland } 6868baa1472SMark Cave-Ayland break; 6878baa1472SMark Cave-Ayland } 6888baa1472SMark Cave-Ayland break; 6898baa1472SMark Cave-Ayland 6908baa1472SMark Cave-Ayland case STAT_MI: 6918baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6928baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6938baa1472SMark Cave-Ayland len = MIN(len, 1); 6948baa1472SMark Cave-Ayland 6958baa1472SMark Cave-Ayland if (len) { 6968baa1472SMark Cave-Ayland buf[0] = 0; 6978baa1472SMark Cave-Ayland 6988baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6998baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 7008baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 7018baa1472SMark Cave-Ayland } else { 7028baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 7038baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 7048baa1472SMark Cave-Ayland } 7058baa1472SMark Cave-Ayland 7068baa1472SMark Cave-Ayland /* Raise end of command interrupt */ 7078baa1472SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 7088baa1472SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 7098baa1472SMark Cave-Ayland esp_raise_irq(s); 7108baa1472SMark Cave-Ayland } 7118baa1472SMark Cave-Ayland break; 7128baa1472SMark Cave-Ayland } 7138baa1472SMark Cave-Ayland break; 71474d71ea1SLaurent Vivier } 71549ab747fSPaolo Bonzini } 71649ab747fSPaolo Bonzini 717a1b8d389SMark Cave-Ayland static void esp_nodma_ti_dataout(ESPState *s) 718a1b8d389SMark Cave-Ayland { 719a1b8d389SMark Cave-Ayland int len; 720a1b8d389SMark Cave-Ayland 721a1b8d389SMark Cave-Ayland if (!s->current_req) { 722a1b8d389SMark Cave-Ayland return; 723a1b8d389SMark Cave-Ayland } 724a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 725a1b8d389SMark Cave-Ayland /* Defer until data is available. */ 726a1b8d389SMark Cave-Ayland return; 727a1b8d389SMark Cave-Ayland } 728a1b8d389SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 729a1b8d389SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 730a1b8d389SMark Cave-Ayland esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 731a1b8d389SMark Cave-Ayland s->async_buf += len; 732a1b8d389SMark Cave-Ayland s->async_len -= len; 733a1b8d389SMark Cave-Ayland s->ti_size += len; 734a1b8d389SMark Cave-Ayland 735a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 736a1b8d389SMark Cave-Ayland scsi_req_continue(s->current_req); 737a1b8d389SMark Cave-Ayland return; 738a1b8d389SMark Cave-Ayland } 739a1b8d389SMark Cave-Ayland 740a1b8d389SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 741a1b8d389SMark Cave-Ayland esp_raise_irq(s); 742a1b8d389SMark Cave-Ayland } 743a1b8d389SMark Cave-Ayland 7441b9e48a5SMark Cave-Ayland static void esp_do_nodma(ESPState *s) 7451b9e48a5SMark Cave-Ayland { 7462572689bSMark Cave-Ayland uint8_t buf[ESP_FIFO_SZ]; 7477b320a8eSMark Cave-Ayland uint32_t cmdlen; 748a1b8d389SMark Cave-Ayland int n; 7491b9e48a5SMark Cave-Ayland 75083e803deSMark Cave-Ayland switch (esp_get_phase(s)) { 75183e803deSMark Cave-Ayland case STAT_MO: 7522572689bSMark Cave-Ayland /* Copy FIFO into cmdfifo */ 7532572689bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 7542572689bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 7552572689bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 75679a6c7c6SMark Cave-Ayland s->cmdfifo_cdb_offset += n; 7572572689bSMark Cave-Ayland 758*5d02add4SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 759*5d02add4SMark Cave-Ayland case CMD_SELATN: 760*5d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 761*5d02add4SMark Cave-Ayland /* First byte received, switch to command phase */ 762*5d02add4SMark Cave-Ayland esp_set_phase(s, STAT_CD); 763*5d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 764*5d02add4SMark Cave-Ayland 765*5d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 766*5d02add4SMark Cave-Ayland /* Process any additional command phase data */ 767*5d02add4SMark Cave-Ayland esp_do_nodma(s); 768*5d02add4SMark Cave-Ayland } 769*5d02add4SMark Cave-Ayland } 770*5d02add4SMark Cave-Ayland break; 771*5d02add4SMark Cave-Ayland 772*5d02add4SMark Cave-Ayland case CMD_SELATNS: 773*5d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) == 1) { 774*5d02add4SMark Cave-Ayland /* First byte received, stop in message out phase */ 775*5d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 776*5d02add4SMark Cave-Ayland 777*5d02add4SMark Cave-Ayland /* Raise command completion interrupt */ 778*5d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 779*5d02add4SMark Cave-Ayland esp_raise_irq(s); 780*5d02add4SMark Cave-Ayland } 781*5d02add4SMark Cave-Ayland break; 782*5d02add4SMark Cave-Ayland 783*5d02add4SMark Cave-Ayland case CMD_TI: 784*5d02add4SMark Cave-Ayland /* ATN remains asserted until FIFO empty */ 7851b9e48a5SMark Cave-Ayland s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo); 786abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 787cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 7881b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 7891b9e48a5SMark Cave-Ayland esp_raise_irq(s); 79079a6c7c6SMark Cave-Ayland break; 791*5d02add4SMark Cave-Ayland } 792*5d02add4SMark Cave-Ayland break; 79379a6c7c6SMark Cave-Ayland 79479a6c7c6SMark Cave-Ayland case STAT_CD: 79579a6c7c6SMark Cave-Ayland /* Copy FIFO into cmdfifo */ 79679a6c7c6SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 79779a6c7c6SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 79879a6c7c6SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 79979a6c7c6SMark Cave-Ayland 800*5d02add4SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 801*5d02add4SMark Cave-Ayland case CMD_TI: 80279a6c7c6SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 80379a6c7c6SMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 80479a6c7c6SMark Cave-Ayland 805*5d02add4SMark Cave-Ayland /* CDB may be transferred in one or more TI commands */ 806*5d02add4SMark Cave-Ayland if (esp_cdb_length(s) && esp_cdb_length(s) == 807*5d02add4SMark Cave-Ayland fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset) { 80879a6c7c6SMark Cave-Ayland /* Command has been received */ 80979a6c7c6SMark Cave-Ayland do_cmd(s); 810*5d02add4SMark Cave-Ayland } else { 811*5d02add4SMark Cave-Ayland /* 812*5d02add4SMark Cave-Ayland * If data was transferred from the FIFO then raise bus 813*5d02add4SMark Cave-Ayland * service interrupt to indicate transfer complete. Otherwise 814*5d02add4SMark Cave-Ayland * defer until the next FIFO write. 815*5d02add4SMark Cave-Ayland */ 816*5d02add4SMark Cave-Ayland if (n) { 817*5d02add4SMark Cave-Ayland /* Raise interrupt to indicate transfer complete */ 818*5d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 819*5d02add4SMark Cave-Ayland esp_raise_irq(s); 820*5d02add4SMark Cave-Ayland } 821*5d02add4SMark Cave-Ayland } 822*5d02add4SMark Cave-Ayland break; 823*5d02add4SMark Cave-Ayland 824*5d02add4SMark Cave-Ayland case CMD_SEL: 825*5d02add4SMark Cave-Ayland case CMD_SELATN: 826*5d02add4SMark Cave-Ayland /* FIFO already contain entire CDB */ 827*5d02add4SMark Cave-Ayland do_cmd(s); 828*5d02add4SMark Cave-Ayland break; 829*5d02add4SMark Cave-Ayland } 83083e803deSMark Cave-Ayland break; 8311b9e48a5SMark Cave-Ayland 8329d1aa52bSMark Cave-Ayland case STAT_DO: 833*5d02add4SMark Cave-Ayland /* Accumulate data in FIFO until non-DMA TI is executed */ 8349d1aa52bSMark Cave-Ayland break; 8359d1aa52bSMark Cave-Ayland 8369d1aa52bSMark Cave-Ayland case STAT_DI: 8379d1aa52bSMark Cave-Ayland if (!s->current_req) { 8389d1aa52bSMark Cave-Ayland return; 8399d1aa52bSMark Cave-Ayland } 8409d1aa52bSMark Cave-Ayland if (s->async_len == 0) { 8419d1aa52bSMark Cave-Ayland /* Defer until data is available. */ 8429d1aa52bSMark Cave-Ayland return; 8439d1aa52bSMark Cave-Ayland } 8446ef2cabcSMark Cave-Ayland if (fifo8_is_empty(&s->fifo)) { 8456ef2cabcSMark Cave-Ayland fifo8_push(&s->fifo, s->async_buf[0]); 8466ef2cabcSMark Cave-Ayland s->async_buf++; 8476ef2cabcSMark Cave-Ayland s->async_len--; 8486ef2cabcSMark Cave-Ayland s->ti_size--; 8496ef2cabcSMark Cave-Ayland } 8501b9e48a5SMark Cave-Ayland 8511b9e48a5SMark Cave-Ayland if (s->async_len == 0) { 8521b9e48a5SMark Cave-Ayland scsi_req_continue(s->current_req); 8531b9e48a5SMark Cave-Ayland return; 8541b9e48a5SMark Cave-Ayland } 8551b9e48a5SMark Cave-Ayland 8569655f72cSMark Cave-Ayland /* If preloading the FIFO, defer until TI command issued */ 8579655f72cSMark Cave-Ayland if (s->rregs[ESP_CMD] != CMD_TI) { 8589655f72cSMark Cave-Ayland return; 8599655f72cSMark Cave-Ayland } 8609655f72cSMark Cave-Ayland 8611b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 8621b9e48a5SMark Cave-Ayland esp_raise_irq(s); 8639d1aa52bSMark Cave-Ayland break; 8649d1aa52bSMark Cave-Ayland } 8651b9e48a5SMark Cave-Ayland } 8661b9e48a5SMark Cave-Ayland 8674aaa6ac3SMark Cave-Ayland void esp_command_complete(SCSIRequest *req, size_t resid) 86849ab747fSPaolo Bonzini { 8694aaa6ac3SMark Cave-Ayland ESPState *s = req->hba_private; 8705a83e83eSMark Cave-Ayland int to_device = (esp_get_phase(s) == STAT_DO); 8714aaa6ac3SMark Cave-Ayland 87249ab747fSPaolo Bonzini trace_esp_command_complete(); 8736ef2cabcSMark Cave-Ayland 8746ef2cabcSMark Cave-Ayland /* 8756ef2cabcSMark Cave-Ayland * Non-DMA transfers from the target will leave the last byte in 8766ef2cabcSMark Cave-Ayland * the FIFO so don't reset ti_size in this case 8776ef2cabcSMark Cave-Ayland */ 8786ef2cabcSMark Cave-Ayland if (s->dma || to_device) { 87949ab747fSPaolo Bonzini if (s->ti_size != 0) { 88049ab747fSPaolo Bonzini trace_esp_command_complete_unexpected(); 88149ab747fSPaolo Bonzini } 8826ef2cabcSMark Cave-Ayland } 8836ef2cabcSMark Cave-Ayland 88449ab747fSPaolo Bonzini s->async_len = 0; 8854aaa6ac3SMark Cave-Ayland if (req->status) { 88649ab747fSPaolo Bonzini trace_esp_command_complete_fail(); 88749ab747fSPaolo Bonzini } 8884aaa6ac3SMark Cave-Ayland s->status = req->status; 8896ef2cabcSMark Cave-Ayland 8906ef2cabcSMark Cave-Ayland /* 891cb988199SMark Cave-Ayland * Switch to status phase. For non-DMA transfers from the target the last 892cb988199SMark Cave-Ayland * byte is still in the FIFO 8936ef2cabcSMark Cave-Ayland */ 8948bb22495SMark Cave-Ayland s->ti_size = 0; 8958bb22495SMark Cave-Ayland 8968bb22495SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 8978bb22495SMark Cave-Ayland case CMD_SEL | CMD_DMA: 8988bb22495SMark Cave-Ayland case CMD_SEL: 8998bb22495SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 9008bb22495SMark Cave-Ayland case CMD_SELATN: 901cb988199SMark Cave-Ayland /* 9028bb22495SMark Cave-Ayland * No data phase for sequencer command so raise deferred bus service 903c90b2792SMark Cave-Ayland * and function complete interrupt 904cb988199SMark Cave-Ayland */ 905c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 9068bb22495SMark Cave-Ayland break; 907cb22ce50SMark Cave-Ayland 908cb22ce50SMark Cave-Ayland case CMD_TI | CMD_DMA: 909cb22ce50SMark Cave-Ayland case CMD_TI: 910cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 911cb22ce50SMark Cave-Ayland break; 9126ef2cabcSMark Cave-Ayland } 9136ef2cabcSMark Cave-Ayland 9148bb22495SMark Cave-Ayland /* Raise bus service interrupt to indicate change to STATUS phase */ 9158bb22495SMark Cave-Ayland esp_set_phase(s, STAT_ST); 9168bb22495SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 9178bb22495SMark Cave-Ayland esp_raise_irq(s); 9188bb22495SMark Cave-Ayland esp_lower_drq(s); 9198bb22495SMark Cave-Ayland 92049ab747fSPaolo Bonzini if (s->current_req) { 92149ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 92249ab747fSPaolo Bonzini s->current_req = NULL; 92349ab747fSPaolo Bonzini s->current_dev = NULL; 92449ab747fSPaolo Bonzini } 92549ab747fSPaolo Bonzini } 92649ab747fSPaolo Bonzini 92749ab747fSPaolo Bonzini void esp_transfer_data(SCSIRequest *req, uint32_t len) 92849ab747fSPaolo Bonzini { 92949ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9306cc88d6bSMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 93149ab747fSPaolo Bonzini 9326cc88d6bSMark Cave-Ayland trace_esp_transfer_data(dmalen, s->ti_size); 93349ab747fSPaolo Bonzini s->async_len = len; 93449ab747fSPaolo Bonzini s->async_buf = scsi_req_get_buf(req); 9354e78f3bfSMark Cave-Ayland 936c90b2792SMark Cave-Ayland if (!s->data_ready) { 937a4608fa0SMark Cave-Ayland s->data_ready = true; 938a4608fa0SMark Cave-Ayland 939a4608fa0SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 940a4608fa0SMark Cave-Ayland case CMD_SEL | CMD_DMA: 941a4608fa0SMark Cave-Ayland case CMD_SEL: 942a4608fa0SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 943a4608fa0SMark Cave-Ayland case CMD_SELATN: 944c90b2792SMark Cave-Ayland /* 945c90b2792SMark Cave-Ayland * Initial incoming data xfer is complete for sequencer command 946c90b2792SMark Cave-Ayland * so raise deferred bus service and function complete interrupt 947c90b2792SMark Cave-Ayland */ 948c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 949c90b2792SMark Cave-Ayland break; 950c90b2792SMark Cave-Ayland 951a4608fa0SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 952a4608fa0SMark Cave-Ayland case CMD_SELATNS: 9534e78f3bfSMark Cave-Ayland /* 9544e78f3bfSMark Cave-Ayland * Initial incoming data xfer is complete so raise command 9554e78f3bfSMark Cave-Ayland * completion interrupt 9564e78f3bfSMark Cave-Ayland */ 9574e78f3bfSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 958a4608fa0SMark Cave-Ayland break; 959a4608fa0SMark Cave-Ayland 960a4608fa0SMark Cave-Ayland case CMD_TI | CMD_DMA: 961a4608fa0SMark Cave-Ayland case CMD_TI: 962a4608fa0SMark Cave-Ayland /* 963a4608fa0SMark Cave-Ayland * Bus service interrupt raised because of initial change to 964a4608fa0SMark Cave-Ayland * DATA phase 965a4608fa0SMark Cave-Ayland */ 966cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 967a4608fa0SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 968a4608fa0SMark Cave-Ayland break; 969a4608fa0SMark Cave-Ayland } 970c90b2792SMark Cave-Ayland 971c90b2792SMark Cave-Ayland esp_raise_irq(s); 9724e78f3bfSMark Cave-Ayland } 9734e78f3bfSMark Cave-Ayland 9741b9e48a5SMark Cave-Ayland /* 9751b9e48a5SMark Cave-Ayland * Always perform the initial transfer upon reception of the next TI 9761b9e48a5SMark Cave-Ayland * command to ensure the DMA/non-DMA status of the command is correct. 9771b9e48a5SMark Cave-Ayland * It is not possible to use s->dma directly in the section below as 9781b9e48a5SMark Cave-Ayland * some OSs send non-DMA NOP commands after a DMA transfer. Hence if the 9791b9e48a5SMark Cave-Ayland * async data transfer is delayed then s->dma is set incorrectly. 9801b9e48a5SMark Cave-Ayland */ 9811b9e48a5SMark Cave-Ayland 98282003450SMark Cave-Ayland if (s->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) { 983a79e767aSMark Cave-Ayland /* When the SCSI layer returns more data, raise deferred INTR_BS */ 984004826d0SMark Cave-Ayland esp_dma_ti_check(s); 985a79e767aSMark Cave-Ayland 986a79e767aSMark Cave-Ayland esp_do_dma(s); 98782003450SMark Cave-Ayland } else if (s->rregs[ESP_CMD] == CMD_TI) { 9881b9e48a5SMark Cave-Ayland esp_do_nodma(s); 9891b9e48a5SMark Cave-Ayland } 99049ab747fSPaolo Bonzini } 99149ab747fSPaolo Bonzini 99249ab747fSPaolo Bonzini static void handle_ti(ESPState *s) 99349ab747fSPaolo Bonzini { 9941b9e48a5SMark Cave-Ayland uint32_t dmalen; 99549ab747fSPaolo Bonzini 99649ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 99749ab747fSPaolo Bonzini s->dma_cb = handle_ti; 99849ab747fSPaolo Bonzini return; 99949ab747fSPaolo Bonzini } 100049ab747fSPaolo Bonzini 100149ab747fSPaolo Bonzini if (s->dma) { 10021b9e48a5SMark Cave-Ayland dmalen = esp_get_tc(s); 1003b76624deSMark Cave-Ayland trace_esp_handle_ti(dmalen); 100449ab747fSPaolo Bonzini esp_do_dma(s); 1005799d90d8SMark Cave-Ayland } else { 10061b9e48a5SMark Cave-Ayland trace_esp_handle_ti(s->ti_size); 10071b9e48a5SMark Cave-Ayland esp_do_nodma(s); 1008*5d02add4SMark Cave-Ayland 1009*5d02add4SMark Cave-Ayland if (esp_get_phase(s) == STAT_DO) { 1010*5d02add4SMark Cave-Ayland esp_nodma_ti_dataout(s); 1011*5d02add4SMark Cave-Ayland } 101249ab747fSPaolo Bonzini } 101349ab747fSPaolo Bonzini } 101449ab747fSPaolo Bonzini 101549ab747fSPaolo Bonzini void esp_hard_reset(ESPState *s) 101649ab747fSPaolo Bonzini { 101749ab747fSPaolo Bonzini memset(s->rregs, 0, ESP_REGS); 101849ab747fSPaolo Bonzini memset(s->wregs, 0, ESP_REGS); 1019c9cf45c1SHannes Reinecke s->tchi_written = 0; 102049ab747fSPaolo Bonzini s->ti_size = 0; 10213f26c975SMark Cave-Ayland s->async_len = 0; 1022042879fcSMark Cave-Ayland fifo8_reset(&s->fifo); 1023023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 102449ab747fSPaolo Bonzini s->dma = 0; 102549ab747fSPaolo Bonzini s->dma_cb = NULL; 102649ab747fSPaolo Bonzini 102749ab747fSPaolo Bonzini s->rregs[ESP_CFG1] = 7; 102849ab747fSPaolo Bonzini } 102949ab747fSPaolo Bonzini 103049ab747fSPaolo Bonzini static void esp_soft_reset(ESPState *s) 103149ab747fSPaolo Bonzini { 103249ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 103374d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 103449ab747fSPaolo Bonzini esp_hard_reset(s); 103549ab747fSPaolo Bonzini } 103649ab747fSPaolo Bonzini 1037c6e51f1bSJohn Millikin static void esp_bus_reset(ESPState *s) 1038c6e51f1bSJohn Millikin { 10394a5fc890SPeter Maydell bus_cold_reset(BUS(&s->bus)); 1040c6e51f1bSJohn Millikin } 1041c6e51f1bSJohn Millikin 104249ab747fSPaolo Bonzini static void parent_esp_reset(ESPState *s, int irq, int level) 104349ab747fSPaolo Bonzini { 104449ab747fSPaolo Bonzini if (level) { 104549ab747fSPaolo Bonzini esp_soft_reset(s); 104649ab747fSPaolo Bonzini } 104749ab747fSPaolo Bonzini } 104849ab747fSPaolo Bonzini 1049f21fe39dSMark Cave-Ayland static void esp_run_cmd(ESPState *s) 1050f21fe39dSMark Cave-Ayland { 1051f21fe39dSMark Cave-Ayland uint8_t cmd = s->rregs[ESP_CMD]; 1052f21fe39dSMark Cave-Ayland 1053f21fe39dSMark Cave-Ayland if (cmd & CMD_DMA) { 1054f21fe39dSMark Cave-Ayland s->dma = 1; 1055f21fe39dSMark Cave-Ayland /* Reload DMA counter. */ 1056f21fe39dSMark Cave-Ayland if (esp_get_stc(s) == 0) { 1057f21fe39dSMark Cave-Ayland esp_set_tc(s, 0x10000); 1058f21fe39dSMark Cave-Ayland } else { 1059f21fe39dSMark Cave-Ayland esp_set_tc(s, esp_get_stc(s)); 1060f21fe39dSMark Cave-Ayland } 1061f21fe39dSMark Cave-Ayland } else { 1062f21fe39dSMark Cave-Ayland s->dma = 0; 1063f21fe39dSMark Cave-Ayland } 1064f21fe39dSMark Cave-Ayland switch (cmd & CMD_CMD) { 1065f21fe39dSMark Cave-Ayland case CMD_NOP: 1066f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_nop(cmd); 1067f21fe39dSMark Cave-Ayland break; 1068f21fe39dSMark Cave-Ayland case CMD_FLUSH: 1069f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_flush(cmd); 1070f21fe39dSMark Cave-Ayland fifo8_reset(&s->fifo); 1071f21fe39dSMark Cave-Ayland break; 1072f21fe39dSMark Cave-Ayland case CMD_RESET: 1073f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_reset(cmd); 1074f21fe39dSMark Cave-Ayland esp_soft_reset(s); 1075f21fe39dSMark Cave-Ayland break; 1076f21fe39dSMark Cave-Ayland case CMD_BUSRESET: 1077f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_bus_reset(cmd); 1078f21fe39dSMark Cave-Ayland esp_bus_reset(s); 1079f21fe39dSMark Cave-Ayland if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) { 1080f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_RST; 1081f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1082f21fe39dSMark Cave-Ayland } 1083f21fe39dSMark Cave-Ayland break; 1084f21fe39dSMark Cave-Ayland case CMD_TI: 1085f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ti(cmd); 1086f21fe39dSMark Cave-Ayland handle_ti(s); 1087f21fe39dSMark Cave-Ayland break; 1088f21fe39dSMark Cave-Ayland case CMD_ICCS: 1089f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_iccs(cmd); 1090f21fe39dSMark Cave-Ayland write_response(s); 1091f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 1092abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_MI); 1093f21fe39dSMark Cave-Ayland break; 1094f21fe39dSMark Cave-Ayland case CMD_MSGACC: 1095f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_msgacc(cmd); 1096f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_DC; 1097f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1098f21fe39dSMark Cave-Ayland s->rregs[ESP_RFLAGS] = 0; 1099f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1100f21fe39dSMark Cave-Ayland break; 1101f21fe39dSMark Cave-Ayland case CMD_PAD: 1102f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_pad(cmd); 1103f21fe39dSMark Cave-Ayland s->rregs[ESP_RSTAT] = STAT_TC; 1104f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 1105f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1106f21fe39dSMark Cave-Ayland break; 1107f21fe39dSMark Cave-Ayland case CMD_SATN: 1108f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_satn(cmd); 1109f21fe39dSMark Cave-Ayland break; 1110f21fe39dSMark Cave-Ayland case CMD_RSTATN: 1111f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_rstatn(cmd); 1112f21fe39dSMark Cave-Ayland break; 1113f21fe39dSMark Cave-Ayland case CMD_SEL: 1114f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_sel(cmd); 1115f21fe39dSMark Cave-Ayland handle_s_without_atn(s); 1116f21fe39dSMark Cave-Ayland break; 1117f21fe39dSMark Cave-Ayland case CMD_SELATN: 1118f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatn(cmd); 1119f21fe39dSMark Cave-Ayland handle_satn(s); 1120f21fe39dSMark Cave-Ayland break; 1121f21fe39dSMark Cave-Ayland case CMD_SELATNS: 1122f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatns(cmd); 1123f21fe39dSMark Cave-Ayland handle_satn_stop(s); 1124f21fe39dSMark Cave-Ayland break; 1125f21fe39dSMark Cave-Ayland case CMD_ENSEL: 1126f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ensel(cmd); 1127f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1128f21fe39dSMark Cave-Ayland break; 1129f21fe39dSMark Cave-Ayland case CMD_DISSEL: 1130f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_dissel(cmd); 1131f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1132f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1133f21fe39dSMark Cave-Ayland break; 1134f21fe39dSMark Cave-Ayland default: 1135f21fe39dSMark Cave-Ayland trace_esp_error_unhandled_command(cmd); 1136f21fe39dSMark Cave-Ayland break; 1137f21fe39dSMark Cave-Ayland } 1138f21fe39dSMark Cave-Ayland } 1139f21fe39dSMark Cave-Ayland 114049ab747fSPaolo Bonzini uint64_t esp_reg_read(ESPState *s, uint32_t saddr) 114149ab747fSPaolo Bonzini { 1142b630c075SMark Cave-Ayland uint32_t val; 114349ab747fSPaolo Bonzini 114449ab747fSPaolo Bonzini switch (saddr) { 114549ab747fSPaolo Bonzini case ESP_FIFO: 11461b9e48a5SMark Cave-Ayland if (s->dma_memory_read && s->dma_memory_write && 11471b9e48a5SMark Cave-Ayland (s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) { 114849ab747fSPaolo Bonzini /* Data out. */ 1149ff589551SPrasad J Pandit qemu_log_mask(LOG_UNIMP, "esp: PIO data read not implemented\n"); 115049ab747fSPaolo Bonzini s->rregs[ESP_FIFO] = 0; 1151042879fcSMark Cave-Ayland } else { 1152c5fef911SMark Cave-Ayland s->rregs[ESP_FIFO] = esp_fifo_pop(&s->fifo); 115349ab747fSPaolo Bonzini } 1154b630c075SMark Cave-Ayland val = s->rregs[ESP_FIFO]; 115549ab747fSPaolo Bonzini break; 115649ab747fSPaolo Bonzini case ESP_RINTR: 115794d5c79dSMark Cave-Ayland /* 115894d5c79dSMark Cave-Ayland * Clear sequence step, interrupt register and all status bits 115994d5c79dSMark Cave-Ayland * except TC 116094d5c79dSMark Cave-Ayland */ 1161b630c075SMark Cave-Ayland val = s->rregs[ESP_RINTR]; 116249ab747fSPaolo Bonzini s->rregs[ESP_RINTR] = 0; 116349ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_TC; 1164af947a3dSMark Cave-Ayland /* 1165af947a3dSMark Cave-Ayland * According to the datasheet ESP_RSEQ should be cleared, but as the 1166af947a3dSMark Cave-Ayland * emulation currently defers information transfers to the next TI 1167af947a3dSMark Cave-Ayland * command leave it for now so that pedantic guests such as the old 1168af947a3dSMark Cave-Ayland * Linux 2.6 driver see the correct flags before the next SCSI phase 1169af947a3dSMark Cave-Ayland * transition. 1170af947a3dSMark Cave-Ayland * 1171af947a3dSMark Cave-Ayland * s->rregs[ESP_RSEQ] = SEQ_0; 1172af947a3dSMark Cave-Ayland */ 117349ab747fSPaolo Bonzini esp_lower_irq(s); 1174b630c075SMark Cave-Ayland break; 1175c9cf45c1SHannes Reinecke case ESP_TCHI: 1176c9cf45c1SHannes Reinecke /* Return the unique id if the value has never been written */ 1177c9cf45c1SHannes Reinecke if (!s->tchi_written) { 1178b630c075SMark Cave-Ayland val = s->chip_id; 1179b630c075SMark Cave-Ayland } else { 1180b630c075SMark Cave-Ayland val = s->rregs[saddr]; 1181c9cf45c1SHannes Reinecke } 1182b630c075SMark Cave-Ayland break; 1183238ec4d7SMark Cave-Ayland case ESP_RFLAGS: 1184238ec4d7SMark Cave-Ayland /* Bottom 5 bits indicate number of bytes in FIFO */ 1185238ec4d7SMark Cave-Ayland val = fifo8_num_used(&s->fifo); 1186238ec4d7SMark Cave-Ayland break; 118749ab747fSPaolo Bonzini default: 1188b630c075SMark Cave-Ayland val = s->rregs[saddr]; 118949ab747fSPaolo Bonzini break; 119049ab747fSPaolo Bonzini } 1191b630c075SMark Cave-Ayland 1192b630c075SMark Cave-Ayland trace_esp_mem_readb(saddr, val); 1193b630c075SMark Cave-Ayland return val; 119449ab747fSPaolo Bonzini } 119549ab747fSPaolo Bonzini 119649ab747fSPaolo Bonzini void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) 119749ab747fSPaolo Bonzini { 119849ab747fSPaolo Bonzini trace_esp_mem_writeb(saddr, s->wregs[saddr], val); 119949ab747fSPaolo Bonzini switch (saddr) { 1200c9cf45c1SHannes Reinecke case ESP_TCHI: 1201c9cf45c1SHannes Reinecke s->tchi_written = true; 1202c9cf45c1SHannes Reinecke /* fall through */ 120349ab747fSPaolo Bonzini case ESP_TCLO: 120449ab747fSPaolo Bonzini case ESP_TCMID: 120549ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_TC; 120649ab747fSPaolo Bonzini break; 120749ab747fSPaolo Bonzini case ESP_FIFO: 12082572689bSMark Cave-Ayland if (!fifo8_is_full(&s->fifo)) { 12092572689bSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 12102572689bSMark Cave-Ayland } 1211*5d02add4SMark Cave-Ayland esp_do_nodma(s); 121249ab747fSPaolo Bonzini break; 121349ab747fSPaolo Bonzini case ESP_CMD: 121449ab747fSPaolo Bonzini s->rregs[saddr] = val; 1215f21fe39dSMark Cave-Ayland esp_run_cmd(s); 121649ab747fSPaolo Bonzini break; 121749ab747fSPaolo Bonzini case ESP_WBUSID ... ESP_WSYNO: 121849ab747fSPaolo Bonzini break; 121949ab747fSPaolo Bonzini case ESP_CFG1: 122049ab747fSPaolo Bonzini case ESP_CFG2: case ESP_CFG3: 122149ab747fSPaolo Bonzini case ESP_RES3: case ESP_RES4: 122249ab747fSPaolo Bonzini s->rregs[saddr] = val; 122349ab747fSPaolo Bonzini break; 122449ab747fSPaolo Bonzini case ESP_WCCF ... ESP_WTEST: 122549ab747fSPaolo Bonzini break; 122649ab747fSPaolo Bonzini default: 122749ab747fSPaolo Bonzini trace_esp_error_invalid_write(val, saddr); 122849ab747fSPaolo Bonzini return; 122949ab747fSPaolo Bonzini } 123049ab747fSPaolo Bonzini s->wregs[saddr] = val; 123149ab747fSPaolo Bonzini } 123249ab747fSPaolo Bonzini 123349ab747fSPaolo Bonzini static bool esp_mem_accepts(void *opaque, hwaddr addr, 12348372d383SPeter Maydell unsigned size, bool is_write, 12358372d383SPeter Maydell MemTxAttrs attrs) 123649ab747fSPaolo Bonzini { 123749ab747fSPaolo Bonzini return (size == 1) || (is_write && size == 4); 123849ab747fSPaolo Bonzini } 123949ab747fSPaolo Bonzini 12406cc88d6bSMark Cave-Ayland static bool esp_is_before_version_5(void *opaque, int version_id) 12416cc88d6bSMark Cave-Ayland { 12426cc88d6bSMark Cave-Ayland ESPState *s = ESP(opaque); 12436cc88d6bSMark Cave-Ayland 12446cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12456cc88d6bSMark Cave-Ayland return version_id < 5; 12466cc88d6bSMark Cave-Ayland } 12476cc88d6bSMark Cave-Ayland 12484e78f3bfSMark Cave-Ayland static bool esp_is_version_5(void *opaque, int version_id) 12494e78f3bfSMark Cave-Ayland { 12504e78f3bfSMark Cave-Ayland ESPState *s = ESP(opaque); 12514e78f3bfSMark Cave-Ayland 12524e78f3bfSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12530bcd5a18SMark Cave-Ayland return version_id >= 5; 12544e78f3bfSMark Cave-Ayland } 12554e78f3bfSMark Cave-Ayland 12564eb86065SPaolo Bonzini static bool esp_is_version_6(void *opaque, int version_id) 12574eb86065SPaolo Bonzini { 12584eb86065SPaolo Bonzini ESPState *s = ESP(opaque); 12594eb86065SPaolo Bonzini 12604eb86065SPaolo Bonzini version_id = MIN(version_id, s->mig_version_id); 12614eb86065SPaolo Bonzini return version_id >= 6; 12624eb86065SPaolo Bonzini } 12634eb86065SPaolo Bonzini 126482003450SMark Cave-Ayland static bool esp_is_between_version_5_and_6(void *opaque, int version_id) 126582003450SMark Cave-Ayland { 126682003450SMark Cave-Ayland ESPState *s = ESP(opaque); 126782003450SMark Cave-Ayland 126882003450SMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 126982003450SMark Cave-Ayland return version_id >= 5 && version_id <= 6; 127082003450SMark Cave-Ayland } 127182003450SMark Cave-Ayland 1272ff4a1dabSMark Cave-Ayland int esp_pre_save(void *opaque) 12730bd005beSMark Cave-Ayland { 1274ff4a1dabSMark Cave-Ayland ESPState *s = ESP(object_resolve_path_component( 1275ff4a1dabSMark Cave-Ayland OBJECT(opaque), "esp")); 12760bd005beSMark Cave-Ayland 12770bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 12780bd005beSMark Cave-Ayland return 0; 12790bd005beSMark Cave-Ayland } 12800bd005beSMark Cave-Ayland 12810bd005beSMark Cave-Ayland static int esp_post_load(void *opaque, int version_id) 12820bd005beSMark Cave-Ayland { 12830bd005beSMark Cave-Ayland ESPState *s = ESP(opaque); 1284042879fcSMark Cave-Ayland int len, i; 12850bd005beSMark Cave-Ayland 12866cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12876cc88d6bSMark Cave-Ayland 12886cc88d6bSMark Cave-Ayland if (version_id < 5) { 12896cc88d6bSMark Cave-Ayland esp_set_tc(s, s->mig_dma_left); 1290042879fcSMark Cave-Ayland 1291042879fcSMark Cave-Ayland /* Migrate ti_buf to fifo */ 1292042879fcSMark Cave-Ayland len = s->mig_ti_wptr - s->mig_ti_rptr; 1293042879fcSMark Cave-Ayland for (i = 0; i < len; i++) { 1294042879fcSMark Cave-Ayland fifo8_push(&s->fifo, s->mig_ti_buf[i]); 1295042879fcSMark Cave-Ayland } 1296023666daSMark Cave-Ayland 1297023666daSMark Cave-Ayland /* Migrate cmdbuf to cmdfifo */ 1298023666daSMark Cave-Ayland for (i = 0; i < s->mig_cmdlen; i++) { 1299023666daSMark Cave-Ayland fifo8_push(&s->cmdfifo, s->mig_cmdbuf[i]); 1300023666daSMark Cave-Ayland } 13016cc88d6bSMark Cave-Ayland } 13026cc88d6bSMark Cave-Ayland 13030bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 13040bd005beSMark Cave-Ayland return 0; 13050bd005beSMark Cave-Ayland } 13060bd005beSMark Cave-Ayland 130749ab747fSPaolo Bonzini const VMStateDescription vmstate_esp = { 130849ab747fSPaolo Bonzini .name = "esp", 130982003450SMark Cave-Ayland .version_id = 7, 131049ab747fSPaolo Bonzini .minimum_version_id = 3, 13110bd005beSMark Cave-Ayland .post_load = esp_post_load, 13122d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 131349ab747fSPaolo Bonzini VMSTATE_BUFFER(rregs, ESPState), 131449ab747fSPaolo Bonzini VMSTATE_BUFFER(wregs, ESPState), 131549ab747fSPaolo Bonzini VMSTATE_INT32(ti_size, ESPState), 1316042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_rptr, ESPState, esp_is_before_version_5), 1317042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_wptr, ESPState, esp_is_before_version_5), 1318042879fcSMark Cave-Ayland VMSTATE_BUFFER_TEST(mig_ti_buf, ESPState, esp_is_before_version_5), 131949ab747fSPaolo Bonzini VMSTATE_UINT32(status, ESPState), 13204aaa6ac3SMark Cave-Ayland VMSTATE_UINT32_TEST(mig_deferred_status, ESPState, 13214aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 13224aaa6ac3SMark Cave-Ayland VMSTATE_BOOL_TEST(mig_deferred_complete, ESPState, 13234aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 132449ab747fSPaolo Bonzini VMSTATE_UINT32(dma, ESPState), 1325023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 0, 1326023666daSMark Cave-Ayland esp_is_before_version_5, 0, 16), 1327023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 4, 1328023666daSMark Cave-Ayland esp_is_before_version_5, 16, 1329023666daSMark Cave-Ayland sizeof(typeof_field(ESPState, mig_cmdbuf))), 1330023666daSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_cmdlen, ESPState, esp_is_before_version_5), 133149ab747fSPaolo Bonzini VMSTATE_UINT32(do_cmd, ESPState), 13326cc88d6bSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_dma_left, ESPState, esp_is_before_version_5), 13338dded6deSMark Cave-Ayland VMSTATE_BOOL_TEST(data_ready, ESPState, esp_is_version_5), 1334023666daSMark Cave-Ayland VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5), 1335042879fcSMark Cave-Ayland VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5), 1336023666daSMark Cave-Ayland VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5), 133782003450SMark Cave-Ayland VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState, 133882003450SMark Cave-Ayland esp_is_between_version_5_and_6), 13394eb86065SPaolo Bonzini VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6), 134049ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 134174d71ea1SLaurent Vivier }, 134249ab747fSPaolo Bonzini }; 134349ab747fSPaolo Bonzini 134449ab747fSPaolo Bonzini static void sysbus_esp_mem_write(void *opaque, hwaddr addr, 134549ab747fSPaolo Bonzini uint64_t val, unsigned int size) 134649ab747fSPaolo Bonzini { 134749ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1348eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 134949ab747fSPaolo Bonzini uint32_t saddr; 135049ab747fSPaolo Bonzini 135149ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1352eb169c76SMark Cave-Ayland esp_reg_write(s, saddr, val); 135349ab747fSPaolo Bonzini } 135449ab747fSPaolo Bonzini 135549ab747fSPaolo Bonzini static uint64_t sysbus_esp_mem_read(void *opaque, hwaddr addr, 135649ab747fSPaolo Bonzini unsigned int size) 135749ab747fSPaolo Bonzini { 135849ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1359eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 136049ab747fSPaolo Bonzini uint32_t saddr; 136149ab747fSPaolo Bonzini 136249ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1363eb169c76SMark Cave-Ayland return esp_reg_read(s, saddr); 136449ab747fSPaolo Bonzini } 136549ab747fSPaolo Bonzini 136649ab747fSPaolo Bonzini static const MemoryRegionOps sysbus_esp_mem_ops = { 136749ab747fSPaolo Bonzini .read = sysbus_esp_mem_read, 136849ab747fSPaolo Bonzini .write = sysbus_esp_mem_write, 136949ab747fSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 137049ab747fSPaolo Bonzini .valid.accepts = esp_mem_accepts, 137149ab747fSPaolo Bonzini }; 137249ab747fSPaolo Bonzini 137374d71ea1SLaurent Vivier static void sysbus_esp_pdma_write(void *opaque, hwaddr addr, 137474d71ea1SLaurent Vivier uint64_t val, unsigned int size) 137574d71ea1SLaurent Vivier { 137674d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1377eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 137874d71ea1SLaurent Vivier 1379960ebfd9SMark Cave-Ayland trace_esp_pdma_write(size); 1380960ebfd9SMark Cave-Ayland 138174d71ea1SLaurent Vivier switch (size) { 138274d71ea1SLaurent Vivier case 1: 1383761bef75SMark Cave-Ayland esp_pdma_write(s, val); 138474d71ea1SLaurent Vivier break; 138574d71ea1SLaurent Vivier case 2: 1386761bef75SMark Cave-Ayland esp_pdma_write(s, val >> 8); 1387761bef75SMark Cave-Ayland esp_pdma_write(s, val); 138874d71ea1SLaurent Vivier break; 138974d71ea1SLaurent Vivier } 1390b46a43a2SMark Cave-Ayland esp_do_dma(s); 139174d71ea1SLaurent Vivier } 139274d71ea1SLaurent Vivier 139374d71ea1SLaurent Vivier static uint64_t sysbus_esp_pdma_read(void *opaque, hwaddr addr, 139474d71ea1SLaurent Vivier unsigned int size) 139574d71ea1SLaurent Vivier { 139674d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1397eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 139874d71ea1SLaurent Vivier uint64_t val = 0; 139974d71ea1SLaurent Vivier 1400960ebfd9SMark Cave-Ayland trace_esp_pdma_read(size); 1401960ebfd9SMark Cave-Ayland 140274d71ea1SLaurent Vivier switch (size) { 140374d71ea1SLaurent Vivier case 1: 1404761bef75SMark Cave-Ayland val = esp_pdma_read(s); 140574d71ea1SLaurent Vivier break; 140674d71ea1SLaurent Vivier case 2: 1407761bef75SMark Cave-Ayland val = esp_pdma_read(s); 1408761bef75SMark Cave-Ayland val = (val << 8) | esp_pdma_read(s); 140974d71ea1SLaurent Vivier break; 141074d71ea1SLaurent Vivier } 1411b46a43a2SMark Cave-Ayland esp_do_dma(s); 141274d71ea1SLaurent Vivier return val; 141374d71ea1SLaurent Vivier } 141474d71ea1SLaurent Vivier 1415a7a22088SMark Cave-Ayland static void *esp_load_request(QEMUFile *f, SCSIRequest *req) 1416a7a22088SMark Cave-Ayland { 1417a7a22088SMark Cave-Ayland ESPState *s = container_of(req->bus, ESPState, bus); 1418a7a22088SMark Cave-Ayland 1419a7a22088SMark Cave-Ayland scsi_req_ref(req); 1420a7a22088SMark Cave-Ayland s->current_req = req; 1421a7a22088SMark Cave-Ayland return s; 1422a7a22088SMark Cave-Ayland } 1423a7a22088SMark Cave-Ayland 142474d71ea1SLaurent Vivier static const MemoryRegionOps sysbus_esp_pdma_ops = { 142574d71ea1SLaurent Vivier .read = sysbus_esp_pdma_read, 142674d71ea1SLaurent Vivier .write = sysbus_esp_pdma_write, 142774d71ea1SLaurent Vivier .endianness = DEVICE_NATIVE_ENDIAN, 142874d71ea1SLaurent Vivier .valid.min_access_size = 1, 1429cf1b8286SMark Cave-Ayland .valid.max_access_size = 4, 1430cf1b8286SMark Cave-Ayland .impl.min_access_size = 1, 1431cf1b8286SMark Cave-Ayland .impl.max_access_size = 2, 143274d71ea1SLaurent Vivier }; 143374d71ea1SLaurent Vivier 143449ab747fSPaolo Bonzini static const struct SCSIBusInfo esp_scsi_info = { 143549ab747fSPaolo Bonzini .tcq = false, 143649ab747fSPaolo Bonzini .max_target = ESP_MAX_DEVS, 143749ab747fSPaolo Bonzini .max_lun = 7, 143849ab747fSPaolo Bonzini 1439a7a22088SMark Cave-Ayland .load_request = esp_load_request, 144049ab747fSPaolo Bonzini .transfer_data = esp_transfer_data, 144149ab747fSPaolo Bonzini .complete = esp_command_complete, 144249ab747fSPaolo Bonzini .cancel = esp_request_cancelled 144349ab747fSPaolo Bonzini }; 144449ab747fSPaolo Bonzini 144549ab747fSPaolo Bonzini static void sysbus_esp_gpio_demux(void *opaque, int irq, int level) 144649ab747fSPaolo Bonzini { 144784fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(opaque); 1448eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 144949ab747fSPaolo Bonzini 145049ab747fSPaolo Bonzini switch (irq) { 145149ab747fSPaolo Bonzini case 0: 145249ab747fSPaolo Bonzini parent_esp_reset(s, irq, level); 145349ab747fSPaolo Bonzini break; 145449ab747fSPaolo Bonzini case 1: 1455b86dc5cbSMark Cave-Ayland esp_dma_enable(s, irq, level); 145649ab747fSPaolo Bonzini break; 145749ab747fSPaolo Bonzini } 145849ab747fSPaolo Bonzini } 145949ab747fSPaolo Bonzini 1460b09318caSHu Tao static void sysbus_esp_realize(DeviceState *dev, Error **errp) 146149ab747fSPaolo Bonzini { 1462b09318caSHu Tao SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 146384fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1464eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1465eb169c76SMark Cave-Ayland 1466eb169c76SMark Cave-Ayland if (!qdev_realize(DEVICE(s), NULL, errp)) { 1467eb169c76SMark Cave-Ayland return; 1468eb169c76SMark Cave-Ayland } 146949ab747fSPaolo Bonzini 1470b09318caSHu Tao sysbus_init_irq(sbd, &s->irq); 147174d71ea1SLaurent Vivier sysbus_init_irq(sbd, &s->irq_data); 147249ab747fSPaolo Bonzini assert(sysbus->it_shift != -1); 147349ab747fSPaolo Bonzini 147449ab747fSPaolo Bonzini s->chip_id = TCHI_FAS100A; 147529776739SPaolo Bonzini memory_region_init_io(&sysbus->iomem, OBJECT(sysbus), &sysbus_esp_mem_ops, 147674d71ea1SLaurent Vivier sysbus, "esp-regs", ESP_REGS << sysbus->it_shift); 1477b09318caSHu Tao sysbus_init_mmio(sbd, &sysbus->iomem); 147874d71ea1SLaurent Vivier memory_region_init_io(&sysbus->pdma, OBJECT(sysbus), &sysbus_esp_pdma_ops, 1479cf1b8286SMark Cave-Ayland sysbus, "esp-pdma", 4); 148074d71ea1SLaurent Vivier sysbus_init_mmio(sbd, &sysbus->pdma); 148149ab747fSPaolo Bonzini 1482b09318caSHu Tao qdev_init_gpio_in(dev, sysbus_esp_gpio_demux, 2); 148349ab747fSPaolo Bonzini 1484739e95f5SPeter Maydell scsi_bus_init(&s->bus, sizeof(s->bus), dev, &esp_scsi_info); 148549ab747fSPaolo Bonzini } 148649ab747fSPaolo Bonzini 148749ab747fSPaolo Bonzini static void sysbus_esp_hard_reset(DeviceState *dev) 148849ab747fSPaolo Bonzini { 148984fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1490eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1491eb169c76SMark Cave-Ayland 1492eb169c76SMark Cave-Ayland esp_hard_reset(s); 1493eb169c76SMark Cave-Ayland } 1494eb169c76SMark Cave-Ayland 1495eb169c76SMark Cave-Ayland static void sysbus_esp_init(Object *obj) 1496eb169c76SMark Cave-Ayland { 1497eb169c76SMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(obj); 1498eb169c76SMark Cave-Ayland 1499eb169c76SMark Cave-Ayland object_initialize_child(obj, "esp", &sysbus->esp, TYPE_ESP); 150049ab747fSPaolo Bonzini } 150149ab747fSPaolo Bonzini 150249ab747fSPaolo Bonzini static const VMStateDescription vmstate_sysbus_esp_scsi = { 150349ab747fSPaolo Bonzini .name = "sysbusespscsi", 15040bd005beSMark Cave-Ayland .version_id = 2, 1505ea84a442SGuenter Roeck .minimum_version_id = 1, 1506ff4a1dabSMark Cave-Ayland .pre_save = esp_pre_save, 15072d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 15080bd005beSMark Cave-Ayland VMSTATE_UINT8_V(esp.mig_version_id, SysBusESPState, 2), 150949ab747fSPaolo Bonzini VMSTATE_STRUCT(esp, SysBusESPState, 0, vmstate_esp, ESPState), 151049ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 151149ab747fSPaolo Bonzini } 151249ab747fSPaolo Bonzini }; 151349ab747fSPaolo Bonzini 151449ab747fSPaolo Bonzini static void sysbus_esp_class_init(ObjectClass *klass, void *data) 151549ab747fSPaolo Bonzini { 151649ab747fSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 151749ab747fSPaolo Bonzini 1518b09318caSHu Tao dc->realize = sysbus_esp_realize; 151949ab747fSPaolo Bonzini dc->reset = sysbus_esp_hard_reset; 152049ab747fSPaolo Bonzini dc->vmsd = &vmstate_sysbus_esp_scsi; 1521125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 152249ab747fSPaolo Bonzini } 152349ab747fSPaolo Bonzini 152449ab747fSPaolo Bonzini static const TypeInfo sysbus_esp_info = { 152584fbefedSMark Cave-Ayland .name = TYPE_SYSBUS_ESP, 152649ab747fSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 1527eb169c76SMark Cave-Ayland .instance_init = sysbus_esp_init, 152849ab747fSPaolo Bonzini .instance_size = sizeof(SysBusESPState), 152949ab747fSPaolo Bonzini .class_init = sysbus_esp_class_init, 153049ab747fSPaolo Bonzini }; 153149ab747fSPaolo Bonzini 1532042879fcSMark Cave-Ayland static void esp_finalize(Object *obj) 1533042879fcSMark Cave-Ayland { 1534042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1535042879fcSMark Cave-Ayland 1536042879fcSMark Cave-Ayland fifo8_destroy(&s->fifo); 1537023666daSMark Cave-Ayland fifo8_destroy(&s->cmdfifo); 1538042879fcSMark Cave-Ayland } 1539042879fcSMark Cave-Ayland 1540042879fcSMark Cave-Ayland static void esp_init(Object *obj) 1541042879fcSMark Cave-Ayland { 1542042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1543042879fcSMark Cave-Ayland 1544042879fcSMark Cave-Ayland fifo8_create(&s->fifo, ESP_FIFO_SZ); 1545023666daSMark Cave-Ayland fifo8_create(&s->cmdfifo, ESP_CMDFIFO_SZ); 1546042879fcSMark Cave-Ayland } 1547042879fcSMark Cave-Ayland 1548eb169c76SMark Cave-Ayland static void esp_class_init(ObjectClass *klass, void *data) 1549eb169c76SMark Cave-Ayland { 1550eb169c76SMark Cave-Ayland DeviceClass *dc = DEVICE_CLASS(klass); 1551eb169c76SMark Cave-Ayland 1552eb169c76SMark Cave-Ayland /* internal device for sysbusesp/pciespscsi, not user-creatable */ 1553eb169c76SMark Cave-Ayland dc->user_creatable = false; 1554eb169c76SMark Cave-Ayland set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1555eb169c76SMark Cave-Ayland } 1556eb169c76SMark Cave-Ayland 1557eb169c76SMark Cave-Ayland static const TypeInfo esp_info = { 1558eb169c76SMark Cave-Ayland .name = TYPE_ESP, 1559eb169c76SMark Cave-Ayland .parent = TYPE_DEVICE, 1560042879fcSMark Cave-Ayland .instance_init = esp_init, 1561042879fcSMark Cave-Ayland .instance_finalize = esp_finalize, 1562eb169c76SMark Cave-Ayland .instance_size = sizeof(ESPState), 1563eb169c76SMark Cave-Ayland .class_init = esp_class_init, 1564eb169c76SMark Cave-Ayland }; 1565eb169c76SMark Cave-Ayland 156649ab747fSPaolo Bonzini static void esp_register_types(void) 156749ab747fSPaolo Bonzini { 156849ab747fSPaolo Bonzini type_register_static(&sysbus_esp_info); 1569eb169c76SMark Cave-Ayland type_register_static(&esp_info); 157049ab747fSPaolo Bonzini } 157149ab747fSPaolo Bonzini 157249ab747fSPaolo Bonzini type_init(esp_register_types) 1573