149ab747fSPaolo Bonzini /* 249ab747fSPaolo Bonzini * QEMU ESP/NCR53C9x emulation 349ab747fSPaolo Bonzini * 449ab747fSPaolo Bonzini * Copyright (c) 2005-2006 Fabrice Bellard 549ab747fSPaolo Bonzini * Copyright (c) 2012 Herve Poussineau 649ab747fSPaolo Bonzini * 749ab747fSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 849ab747fSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 949ab747fSPaolo Bonzini * in the Software without restriction, including without limitation the rights 1049ab747fSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1149ab747fSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 1249ab747fSPaolo Bonzini * furnished to do so, subject to the following conditions: 1349ab747fSPaolo Bonzini * 1449ab747fSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 1549ab747fSPaolo Bonzini * all copies or substantial portions of the Software. 1649ab747fSPaolo Bonzini * 1749ab747fSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1849ab747fSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1949ab747fSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2049ab747fSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2149ab747fSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2249ab747fSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2349ab747fSPaolo Bonzini * THE SOFTWARE. 2449ab747fSPaolo Bonzini */ 2549ab747fSPaolo Bonzini 26a4ab4792SPeter Maydell #include "qemu/osdep.h" 2749ab747fSPaolo Bonzini #include "hw/sysbus.h" 28d6454270SMarkus Armbruster #include "migration/vmstate.h" 2964552b6bSMarkus Armbruster #include "hw/irq.h" 3049ab747fSPaolo Bonzini #include "hw/scsi/esp.h" 3149ab747fSPaolo Bonzini #include "trace.h" 3249ab747fSPaolo Bonzini #include "qemu/log.h" 330b8fa32fSMarkus Armbruster #include "qemu/module.h" 3449ab747fSPaolo Bonzini 3549ab747fSPaolo Bonzini /* 3649ab747fSPaolo Bonzini * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O), 3749ab747fSPaolo Bonzini * also produced as NCR89C100. See 3849ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt 3949ab747fSPaolo Bonzini * and 4049ab747fSPaolo Bonzini * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt 4174d71ea1SLaurent Vivier * 4274d71ea1SLaurent Vivier * On Macintosh Quadra it is a NCR53C96. 4349ab747fSPaolo Bonzini */ 4449ab747fSPaolo Bonzini 4549ab747fSPaolo Bonzini static void esp_raise_irq(ESPState *s) 4649ab747fSPaolo Bonzini { 4749ab747fSPaolo Bonzini if (!(s->rregs[ESP_RSTAT] & STAT_INT)) { 4849ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] |= STAT_INT; 4949ab747fSPaolo Bonzini qemu_irq_raise(s->irq); 5049ab747fSPaolo Bonzini trace_esp_raise_irq(); 5149ab747fSPaolo Bonzini } 5249ab747fSPaolo Bonzini } 5349ab747fSPaolo Bonzini 5449ab747fSPaolo Bonzini static void esp_lower_irq(ESPState *s) 5549ab747fSPaolo Bonzini { 5649ab747fSPaolo Bonzini if (s->rregs[ESP_RSTAT] & STAT_INT) { 5749ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_INT; 5849ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 5949ab747fSPaolo Bonzini trace_esp_lower_irq(); 6049ab747fSPaolo Bonzini } 6149ab747fSPaolo Bonzini } 6249ab747fSPaolo Bonzini 6374d71ea1SLaurent Vivier static void esp_raise_drq(ESPState *s) 6474d71ea1SLaurent Vivier { 6574d71ea1SLaurent Vivier qemu_irq_raise(s->irq_data); 66960ebfd9SMark Cave-Ayland trace_esp_raise_drq(); 6774d71ea1SLaurent Vivier } 6874d71ea1SLaurent Vivier 6974d71ea1SLaurent Vivier static void esp_lower_drq(ESPState *s) 7074d71ea1SLaurent Vivier { 7174d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 72960ebfd9SMark Cave-Ayland trace_esp_lower_drq(); 7374d71ea1SLaurent Vivier } 7474d71ea1SLaurent Vivier 7549ab747fSPaolo Bonzini void esp_dma_enable(ESPState *s, int irq, int level) 7649ab747fSPaolo Bonzini { 7749ab747fSPaolo Bonzini if (level) { 7849ab747fSPaolo Bonzini s->dma_enabled = 1; 7949ab747fSPaolo Bonzini trace_esp_dma_enable(); 8049ab747fSPaolo Bonzini if (s->dma_cb) { 8149ab747fSPaolo Bonzini s->dma_cb(s); 8249ab747fSPaolo Bonzini s->dma_cb = NULL; 8349ab747fSPaolo Bonzini } 8449ab747fSPaolo Bonzini } else { 8549ab747fSPaolo Bonzini trace_esp_dma_disable(); 8649ab747fSPaolo Bonzini s->dma_enabled = 0; 8749ab747fSPaolo Bonzini } 8849ab747fSPaolo Bonzini } 8949ab747fSPaolo Bonzini 9049ab747fSPaolo Bonzini void esp_request_cancelled(SCSIRequest *req) 9149ab747fSPaolo Bonzini { 9249ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9349ab747fSPaolo Bonzini 9449ab747fSPaolo Bonzini if (req == s->current_req) { 9549ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 9649ab747fSPaolo Bonzini s->current_req = NULL; 9749ab747fSPaolo Bonzini s->current_dev = NULL; 98324c8809SMark Cave-Ayland s->async_len = 0; 9949ab747fSPaolo Bonzini } 10049ab747fSPaolo Bonzini } 10149ab747fSPaolo Bonzini 102e5455b8cSMark Cave-Ayland static void esp_fifo_push(Fifo8 *fifo, uint8_t val) 103042879fcSMark Cave-Ayland { 104e5455b8cSMark Cave-Ayland if (fifo8_num_used(fifo) == fifo->capacity) { 105042879fcSMark Cave-Ayland trace_esp_error_fifo_overrun(); 106042879fcSMark Cave-Ayland return; 107042879fcSMark Cave-Ayland } 108042879fcSMark Cave-Ayland 109e5455b8cSMark Cave-Ayland fifo8_push(fifo, val); 110042879fcSMark Cave-Ayland } 111c5fef911SMark Cave-Ayland 112c5fef911SMark Cave-Ayland static uint8_t esp_fifo_pop(Fifo8 *fifo) 113042879fcSMark Cave-Ayland { 114c5fef911SMark Cave-Ayland if (fifo8_is_empty(fifo)) { 115042879fcSMark Cave-Ayland return 0; 116042879fcSMark Cave-Ayland } 117042879fcSMark Cave-Ayland 118c5fef911SMark Cave-Ayland return fifo8_pop(fifo); 119023666daSMark Cave-Ayland } 120023666daSMark Cave-Ayland 1217b320a8eSMark Cave-Ayland static uint32_t esp_fifo_pop_buf(Fifo8 *fifo, uint8_t *dest, int maxlen) 1227b320a8eSMark Cave-Ayland { 1237b320a8eSMark Cave-Ayland const uint8_t *buf; 12449c60d16SMark Cave-Ayland uint32_t n, n2; 12549c60d16SMark Cave-Ayland int len; 1267b320a8eSMark Cave-Ayland 1277b320a8eSMark Cave-Ayland if (maxlen == 0) { 1287b320a8eSMark Cave-Ayland return 0; 1297b320a8eSMark Cave-Ayland } 1307b320a8eSMark Cave-Ayland 13149c60d16SMark Cave-Ayland len = maxlen; 13249c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n); 1337b320a8eSMark Cave-Ayland if (dest) { 1347b320a8eSMark Cave-Ayland memcpy(dest, buf, n); 1357b320a8eSMark Cave-Ayland } 1367b320a8eSMark Cave-Ayland 13749c60d16SMark Cave-Ayland /* Add FIFO wraparound if needed */ 13849c60d16SMark Cave-Ayland len -= n; 13949c60d16SMark Cave-Ayland len = MIN(len, fifo8_num_used(fifo)); 14049c60d16SMark Cave-Ayland if (len) { 14149c60d16SMark Cave-Ayland buf = fifo8_pop_buf(fifo, len, &n2); 14249c60d16SMark Cave-Ayland if (dest) { 14349c60d16SMark Cave-Ayland memcpy(&dest[n], buf, n2); 14449c60d16SMark Cave-Ayland } 14549c60d16SMark Cave-Ayland n += n2; 14649c60d16SMark Cave-Ayland } 14749c60d16SMark Cave-Ayland 1487b320a8eSMark Cave-Ayland return n; 1497b320a8eSMark Cave-Ayland } 1507b320a8eSMark Cave-Ayland 151c47b5835SMark Cave-Ayland static uint32_t esp_get_tc(ESPState *s) 152c47b5835SMark Cave-Ayland { 153c47b5835SMark Cave-Ayland uint32_t dmalen; 154c47b5835SMark Cave-Ayland 155c47b5835SMark Cave-Ayland dmalen = s->rregs[ESP_TCLO]; 156c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCMID] << 8; 157c47b5835SMark Cave-Ayland dmalen |= s->rregs[ESP_TCHI] << 16; 158c47b5835SMark Cave-Ayland 159c47b5835SMark Cave-Ayland return dmalen; 160c47b5835SMark Cave-Ayland } 161c47b5835SMark Cave-Ayland 162c47b5835SMark Cave-Ayland static void esp_set_tc(ESPState *s, uint32_t dmalen) 163c47b5835SMark Cave-Ayland { 164c5d7df28SMark Cave-Ayland uint32_t old_tc = esp_get_tc(s); 165c5d7df28SMark Cave-Ayland 166c47b5835SMark Cave-Ayland s->rregs[ESP_TCLO] = dmalen; 167c47b5835SMark Cave-Ayland s->rregs[ESP_TCMID] = dmalen >> 8; 168c47b5835SMark Cave-Ayland s->rregs[ESP_TCHI] = dmalen >> 16; 169c5d7df28SMark Cave-Ayland 170c5d7df28SMark Cave-Ayland if (old_tc && dmalen == 0) { 171c5d7df28SMark Cave-Ayland s->rregs[ESP_RSTAT] |= STAT_TC; 172c5d7df28SMark Cave-Ayland } 173c47b5835SMark Cave-Ayland } 174c47b5835SMark Cave-Ayland 175c04ed569SMark Cave-Ayland static uint32_t esp_get_stc(ESPState *s) 176c04ed569SMark Cave-Ayland { 177c04ed569SMark Cave-Ayland uint32_t dmalen; 178c04ed569SMark Cave-Ayland 179c04ed569SMark Cave-Ayland dmalen = s->wregs[ESP_TCLO]; 180c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCMID] << 8; 181c04ed569SMark Cave-Ayland dmalen |= s->wregs[ESP_TCHI] << 16; 182c04ed569SMark Cave-Ayland 183c04ed569SMark Cave-Ayland return dmalen; 184c04ed569SMark Cave-Ayland } 185c04ed569SMark Cave-Ayland 186abc139cdSMark Cave-Ayland static const char *esp_phase_names[8] = { 187abc139cdSMark Cave-Ayland "DATA OUT", "DATA IN", "COMMAND", "STATUS", 188abc139cdSMark Cave-Ayland "(reserved)", "(reserved)", "MESSAGE OUT", "MESSAGE IN" 189abc139cdSMark Cave-Ayland }; 190abc139cdSMark Cave-Ayland 191abc139cdSMark Cave-Ayland static void esp_set_phase(ESPState *s, uint8_t phase) 192abc139cdSMark Cave-Ayland { 193abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= ~7; 194abc139cdSMark Cave-Ayland s->rregs[ESP_RSTAT] |= phase; 195abc139cdSMark Cave-Ayland 196abc139cdSMark Cave-Ayland trace_esp_set_phase(esp_phase_names[phase]); 197abc139cdSMark Cave-Ayland } 198abc139cdSMark Cave-Ayland 1995a83e83eSMark Cave-Ayland static uint8_t esp_get_phase(ESPState *s) 2005a83e83eSMark Cave-Ayland { 2015a83e83eSMark Cave-Ayland return s->rregs[ESP_RSTAT] & 7; 2025a83e83eSMark Cave-Ayland } 2035a83e83eSMark Cave-Ayland 204761bef75SMark Cave-Ayland static uint8_t esp_pdma_read(ESPState *s) 205761bef75SMark Cave-Ayland { 2068da90e81SMark Cave-Ayland uint8_t val; 2078da90e81SMark Cave-Ayland 208c5fef911SMark Cave-Ayland val = esp_fifo_pop(&s->fifo); 2098da90e81SMark Cave-Ayland return val; 210761bef75SMark Cave-Ayland } 211761bef75SMark Cave-Ayland 212761bef75SMark Cave-Ayland static void esp_pdma_write(ESPState *s, uint8_t val) 213761bef75SMark Cave-Ayland { 2148da90e81SMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 2158da90e81SMark Cave-Ayland 2163c421400SMark Cave-Ayland if (dmalen == 0) { 2178da90e81SMark Cave-Ayland return; 2188da90e81SMark Cave-Ayland } 2198da90e81SMark Cave-Ayland 220e5455b8cSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 2218da90e81SMark Cave-Ayland 2228da90e81SMark Cave-Ayland dmalen--; 2238da90e81SMark Cave-Ayland esp_set_tc(s, dmalen); 224761bef75SMark Cave-Ayland } 225761bef75SMark Cave-Ayland 226c7bce09cSMark Cave-Ayland static int esp_select(ESPState *s) 2276130b188SLaurent Vivier { 2286130b188SLaurent Vivier int target; 2296130b188SLaurent Vivier 2306130b188SLaurent Vivier target = s->wregs[ESP_WBUSID] & BUSID_DID; 2316130b188SLaurent Vivier 2326130b188SLaurent Vivier s->ti_size = 0; 2336130b188SLaurent Vivier 234cf40a5e4SMark Cave-Ayland if (s->current_req) { 235cf40a5e4SMark Cave-Ayland /* Started a new command before the old one finished. Cancel it. */ 236cf40a5e4SMark Cave-Ayland scsi_req_cancel(s->current_req); 237cf40a5e4SMark Cave-Ayland } 238cf40a5e4SMark Cave-Ayland 2396130b188SLaurent Vivier s->current_dev = scsi_device_find(&s->bus, 0, target, 0); 2406130b188SLaurent Vivier if (!s->current_dev) { 2416130b188SLaurent Vivier /* No such drive */ 2426130b188SLaurent Vivier s->rregs[ESP_RSTAT] = 0; 243cf1a7a9bSMark Cave-Ayland s->rregs[ESP_RINTR] = INTR_DC; 2446130b188SLaurent Vivier s->rregs[ESP_RSEQ] = SEQ_0; 2456130b188SLaurent Vivier esp_raise_irq(s); 2466130b188SLaurent Vivier return -1; 2476130b188SLaurent Vivier } 2484e78f3bfSMark Cave-Ayland 2494e78f3bfSMark Cave-Ayland /* 2504e78f3bfSMark Cave-Ayland * Note that we deliberately don't raise the IRQ here: this will be done 251c90b2792SMark Cave-Ayland * either in esp_transfer_data() or esp_command_complete() 2524e78f3bfSMark Cave-Ayland */ 2534e78f3bfSMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 2546130b188SLaurent Vivier return 0; 2556130b188SLaurent Vivier } 2566130b188SLaurent Vivier 2573ee9a475SMark Cave-Ayland static void esp_do_dma(ESPState *s); 2583ee9a475SMark Cave-Ayland static void esp_do_nodma(ESPState *s); 2593ee9a475SMark Cave-Ayland 2604eb86065SPaolo Bonzini static void do_command_phase(ESPState *s) 26149ab747fSPaolo Bonzini { 2627b320a8eSMark Cave-Ayland uint32_t cmdlen; 26349ab747fSPaolo Bonzini int32_t datalen; 26449ab747fSPaolo Bonzini SCSIDevice *current_lun; 2657b320a8eSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 26649ab747fSPaolo Bonzini 2674eb86065SPaolo Bonzini trace_esp_do_command_phase(s->lun); 268023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 26999545751SMark Cave-Ayland if (!cmdlen || !s->current_dev) { 27099545751SMark Cave-Ayland return; 27199545751SMark Cave-Ayland } 2727b320a8eSMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, buf, cmdlen); 273023666daSMark Cave-Ayland 2744eb86065SPaolo Bonzini current_lun = scsi_device_find(&s->bus, 0, s->current_dev->id, s->lun); 275b22f83d8SAlexandra Diupina if (!current_lun) { 276b22f83d8SAlexandra Diupina /* No such drive */ 277b22f83d8SAlexandra Diupina s->rregs[ESP_RSTAT] = 0; 278b22f83d8SAlexandra Diupina s->rregs[ESP_RINTR] = INTR_DC; 279b22f83d8SAlexandra Diupina s->rregs[ESP_RSEQ] = SEQ_0; 280b22f83d8SAlexandra Diupina esp_raise_irq(s); 281b22f83d8SAlexandra Diupina return; 282b22f83d8SAlexandra Diupina } 283b22f83d8SAlexandra Diupina 284fe9d8927SJohn Millikin s->current_req = scsi_req_new(current_lun, 0, s->lun, buf, cmdlen, s); 28549ab747fSPaolo Bonzini datalen = scsi_req_enqueue(s->current_req); 28649ab747fSPaolo Bonzini s->ti_size = datalen; 287023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 288c90b2792SMark Cave-Ayland s->data_ready = false; 28949ab747fSPaolo Bonzini if (datalen != 0) { 2904e78f3bfSMark Cave-Ayland /* 291c90b2792SMark Cave-Ayland * Switch to DATA phase but wait until initial data xfer is 2924e78f3bfSMark Cave-Ayland * complete before raising the command completion interrupt 2934e78f3bfSMark Cave-Ayland */ 294c90b2792SMark Cave-Ayland if (datalen > 0) { 295abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DI); 29649ab747fSPaolo Bonzini } else { 297abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_DO); 29849ab747fSPaolo Bonzini } 2994e78f3bfSMark Cave-Ayland scsi_req_continue(s->current_req); 3004e78f3bfSMark Cave-Ayland return; 3014e78f3bfSMark Cave-Ayland } 3024e78f3bfSMark Cave-Ayland } 30349ab747fSPaolo Bonzini 3044eb86065SPaolo Bonzini static void do_message_phase(ESPState *s) 30549ab747fSPaolo Bonzini { 3064eb86065SPaolo Bonzini if (s->cmdfifo_cdb_offset) { 3074eb86065SPaolo Bonzini uint8_t message = esp_fifo_pop(&s->cmdfifo); 308023666daSMark Cave-Ayland 3094eb86065SPaolo Bonzini trace_esp_do_identify(message); 3104eb86065SPaolo Bonzini s->lun = message & 7; 311023666daSMark Cave-Ayland s->cmdfifo_cdb_offset--; 3124eb86065SPaolo Bonzini } 31349ab747fSPaolo Bonzini 314799d90d8SMark Cave-Ayland /* Ignore extended messages for now */ 315023666daSMark Cave-Ayland if (s->cmdfifo_cdb_offset) { 3164eb86065SPaolo Bonzini int len = MIN(s->cmdfifo_cdb_offset, fifo8_num_used(&s->cmdfifo)); 317fa7505c1SMark Cave-Ayland esp_fifo_pop_buf(&s->cmdfifo, NULL, len); 318023666daSMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 319023666daSMark Cave-Ayland } 3204eb86065SPaolo Bonzini } 321023666daSMark Cave-Ayland 3224eb86065SPaolo Bonzini static void do_cmd(ESPState *s) 3234eb86065SPaolo Bonzini { 3244eb86065SPaolo Bonzini do_message_phase(s); 3254eb86065SPaolo Bonzini assert(s->cmdfifo_cdb_offset == 0); 3264eb86065SPaolo Bonzini do_command_phase(s); 32749ab747fSPaolo Bonzini } 32849ab747fSPaolo Bonzini 32949ab747fSPaolo Bonzini static void handle_satn(ESPState *s) 33049ab747fSPaolo Bonzini { 33149ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 33249ab747fSPaolo Bonzini s->dma_cb = handle_satn; 33349ab747fSPaolo Bonzini return; 33449ab747fSPaolo Bonzini } 335b46a43a2SMark Cave-Ayland 3361bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3371bcaf71bSMark Cave-Ayland return; 3381bcaf71bSMark Cave-Ayland } 3393ee9a475SMark Cave-Ayland 3403ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_MO); 3413ee9a475SMark Cave-Ayland 3423ee9a475SMark Cave-Ayland if (s->dma) { 3433ee9a475SMark Cave-Ayland esp_do_dma(s); 3443ee9a475SMark Cave-Ayland } else { 345d39592ffSMark Cave-Ayland esp_do_nodma(s); 34649ab747fSPaolo Bonzini } 34794d5c79dSMark Cave-Ayland } 34849ab747fSPaolo Bonzini 34949ab747fSPaolo Bonzini static void handle_s_without_atn(ESPState *s) 35049ab747fSPaolo Bonzini { 35149ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 35249ab747fSPaolo Bonzini s->dma_cb = handle_s_without_atn; 35349ab747fSPaolo Bonzini return; 35449ab747fSPaolo Bonzini } 355b46a43a2SMark Cave-Ayland 3561bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3571bcaf71bSMark Cave-Ayland return; 3581bcaf71bSMark Cave-Ayland } 3599ff0fd12SMark Cave-Ayland 360abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 3619ff0fd12SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 3629ff0fd12SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 3639ff0fd12SMark Cave-Ayland 3649ff0fd12SMark Cave-Ayland if (s->dma) { 3659ff0fd12SMark Cave-Ayland esp_do_dma(s); 3669ff0fd12SMark Cave-Ayland } else { 367d39592ffSMark Cave-Ayland esp_do_nodma(s); 36849ab747fSPaolo Bonzini } 36949ab747fSPaolo Bonzini } 37049ab747fSPaolo Bonzini 37149ab747fSPaolo Bonzini static void handle_satn_stop(ESPState *s) 37249ab747fSPaolo Bonzini { 37349ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 37449ab747fSPaolo Bonzini s->dma_cb = handle_satn_stop; 37549ab747fSPaolo Bonzini return; 37649ab747fSPaolo Bonzini } 377b46a43a2SMark Cave-Ayland 3781bcaf71bSMark Cave-Ayland if (esp_select(s) < 0) { 3791bcaf71bSMark Cave-Ayland return; 3801bcaf71bSMark Cave-Ayland } 381db4d4150SMark Cave-Ayland 382abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_MO); 383db4d4150SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_MO; 3845d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 0; 385db4d4150SMark Cave-Ayland 386db4d4150SMark Cave-Ayland if (s->dma) { 387db4d4150SMark Cave-Ayland esp_do_dma(s); 388db4d4150SMark Cave-Ayland } else { 389d39592ffSMark Cave-Ayland esp_do_nodma(s); 39049ab747fSPaolo Bonzini } 39149ab747fSPaolo Bonzini } 39249ab747fSPaolo Bonzini 39349ab747fSPaolo Bonzini static void write_response(ESPState *s) 39449ab747fSPaolo Bonzini { 39549ab747fSPaolo Bonzini trace_esp_write_response(s->status); 396042879fcSMark Cave-Ayland 3978baa1472SMark Cave-Ayland if (s->dma) { 3988baa1472SMark Cave-Ayland esp_do_dma(s); 3998baa1472SMark Cave-Ayland } else { 40083428f7aSMark Cave-Ayland esp_do_nodma(s); 40149ab747fSPaolo Bonzini } 4028baa1472SMark Cave-Ayland } 40349ab747fSPaolo Bonzini 4045d02add4SMark Cave-Ayland static int esp_cdb_length(ESPState *s) 4055d02add4SMark Cave-Ayland { 4065d02add4SMark Cave-Ayland const uint8_t *pbuf; 4075d02add4SMark Cave-Ayland int cmdlen, len; 4085d02add4SMark Cave-Ayland 4095d02add4SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 4105d02add4SMark Cave-Ayland if (cmdlen < s->cmdfifo_cdb_offset) { 4115d02add4SMark Cave-Ayland return 0; 4125d02add4SMark Cave-Ayland } 4135d02add4SMark Cave-Ayland 4145d02add4SMark Cave-Ayland pbuf = fifo8_peek_buf(&s->cmdfifo, cmdlen, NULL); 4155d02add4SMark Cave-Ayland len = scsi_cdb_length((uint8_t *)&pbuf[s->cmdfifo_cdb_offset]); 4165d02add4SMark Cave-Ayland 4175d02add4SMark Cave-Ayland return len; 4185d02add4SMark Cave-Ayland } 4195d02add4SMark Cave-Ayland 420004826d0SMark Cave-Ayland static void esp_dma_ti_check(ESPState *s) 42149ab747fSPaolo Bonzini { 422af74b3c1SMark Cave-Ayland if (esp_get_tc(s) == 0 && fifo8_num_used(&s->fifo) < 2) { 423cf47a41eSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 42449ab747fSPaolo Bonzini esp_raise_irq(s); 425af74b3c1SMark Cave-Ayland esp_lower_drq(s); 426af74b3c1SMark Cave-Ayland } 42749ab747fSPaolo Bonzini } 42849ab747fSPaolo Bonzini 42949ab747fSPaolo Bonzini static void esp_do_dma(ESPState *s) 43049ab747fSPaolo Bonzini { 431023666daSMark Cave-Ayland uint32_t len, cmdlen; 432023666daSMark Cave-Ayland uint8_t buf[ESP_CMDFIFO_SZ]; 43319e9afb1SMark Cave-Ayland int n; 43449ab747fSPaolo Bonzini 4356cc88d6bSMark Cave-Ayland len = esp_get_tc(s); 436ad2725afSMark Cave-Ayland 437ad2725afSMark Cave-Ayland switch (esp_get_phase(s)) { 438ad2725afSMark Cave-Ayland case STAT_MO: 43946b0c361SMark Cave-Ayland if (s->dma_memory_read) { 44046b0c361SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 44146b0c361SMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 44246b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 44346b0c361SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 44446b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += len; 44546b0c361SMark Cave-Ayland } else { 44646b0c361SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 44746b0c361SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 44846b0c361SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 44946b0c361SMark Cave-Ayland s->cmdfifo_cdb_offset += n; 45046b0c361SMark Cave-Ayland } 45146b0c361SMark Cave-Ayland 45246b0c361SMark Cave-Ayland esp_raise_drq(s); 45346b0c361SMark Cave-Ayland 4543ee9a475SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 4553ee9a475SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 4563ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 4573ee9a475SMark Cave-Ayland /* First byte received, switch to command phase */ 4583ee9a475SMark Cave-Ayland esp_set_phase(s, STAT_CD); 4593ee9a475SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 4603ee9a475SMark Cave-Ayland 4613ee9a475SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 4623ee9a475SMark Cave-Ayland /* Process any additional command phase data */ 4633ee9a475SMark Cave-Ayland esp_do_dma(s); 4643ee9a475SMark Cave-Ayland } 4653ee9a475SMark Cave-Ayland } 4663ee9a475SMark Cave-Ayland break; 4673ee9a475SMark Cave-Ayland 468db4d4150SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 469db4d4150SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) == 1) { 470db4d4150SMark Cave-Ayland /* First byte received, stop in message out phase */ 471db4d4150SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 472db4d4150SMark Cave-Ayland 473db4d4150SMark Cave-Ayland /* Raise command completion interrupt */ 474db4d4150SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 475db4d4150SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 476db4d4150SMark Cave-Ayland esp_raise_irq(s); 477db4d4150SMark Cave-Ayland } 478db4d4150SMark Cave-Ayland break; 479db4d4150SMark Cave-Ayland 4803fd325a2SMark Cave-Ayland case CMD_TI | CMD_DMA: 48146b0c361SMark Cave-Ayland /* ATN remains asserted until TC == 0 */ 48246b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 48346b0c361SMark Cave-Ayland esp_set_phase(s, STAT_CD); 484cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 48546b0c361SMark Cave-Ayland s->rregs[ESP_RSEQ] = SEQ_CD; 48646b0c361SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 48746b0c361SMark Cave-Ayland esp_raise_irq(s); 48846b0c361SMark Cave-Ayland } 48946b0c361SMark Cave-Ayland break; 4903fd325a2SMark Cave-Ayland } 4913fd325a2SMark Cave-Ayland break; 49246b0c361SMark Cave-Ayland 493ad2725afSMark Cave-Ayland case STAT_CD: 494023666daSMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 495023666daSMark Cave-Ayland trace_esp_do_dma(cmdlen, len); 49674d71ea1SLaurent Vivier if (s->dma_memory_read) { 4970ebb5fd8SMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->cmdfifo)); 498023666daSMark Cave-Ayland s->dma_memory_read(s->dma_opaque, buf, len); 499023666daSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, len); 500a0347651SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 50174d71ea1SLaurent Vivier } else { 5023c7f3c8bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 5033c7f3c8bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 5043c7f3c8bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 5053c7f3c8bSMark Cave-Ayland 50674d71ea1SLaurent Vivier esp_raise_drq(s); 5073c7f3c8bSMark Cave-Ayland } 508023666daSMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 50915407433SLaurent Vivier s->ti_size = 0; 51046b0c361SMark Cave-Ayland if (esp_get_tc(s) == 0) { 511799d90d8SMark Cave-Ayland /* Command has been received */ 512c959f218SMark Cave-Ayland do_cmd(s); 513799d90d8SMark Cave-Ayland } 514ad2725afSMark Cave-Ayland break; 5151454dc76SMark Cave-Ayland 5161454dc76SMark Cave-Ayland case STAT_DO: 5170db89536SMark Cave-Ayland if (!s->current_req) { 5180db89536SMark Cave-Ayland return; 5190db89536SMark Cave-Ayland } 5204460b86aSMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 52149ab747fSPaolo Bonzini /* Defer until data is available. */ 52249ab747fSPaolo Bonzini return; 52349ab747fSPaolo Bonzini } 52449ab747fSPaolo Bonzini if (len > s->async_len) { 52549ab747fSPaolo Bonzini len = s->async_len; 52649ab747fSPaolo Bonzini } 52774d71ea1SLaurent Vivier if (s->dma_memory_read) { 52849ab747fSPaolo Bonzini s->dma_memory_read(s->dma_opaque, s->async_buf, len); 529f3666223SMark Cave-Ayland 530f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 531f3666223SMark Cave-Ayland s->async_buf += len; 532f3666223SMark Cave-Ayland s->async_len -= len; 533f3666223SMark Cave-Ayland s->ti_size += len; 534f3666223SMark Cave-Ayland 535e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 536e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 537f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 538f3666223SMark Cave-Ayland return; 539f3666223SMark Cave-Ayland } 540f3666223SMark Cave-Ayland 541004826d0SMark Cave-Ayland esp_dma_ti_check(s); 54249ab747fSPaolo Bonzini } else { 54319e9afb1SMark Cave-Ayland /* Copy FIFO data to device */ 54419e9afb1SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 54519e9afb1SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 54619e9afb1SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 54719e9afb1SMark Cave-Ayland s->async_buf += n; 54819e9afb1SMark Cave-Ayland s->async_len -= n; 54919e9afb1SMark Cave-Ayland s->ti_size += n; 55019e9afb1SMark Cave-Ayland 55174d71ea1SLaurent Vivier esp_raise_drq(s); 552e4e166c8SMark Cave-Ayland 553e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 554e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 555e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 556e4e166c8SMark Cave-Ayland return; 557e4e166c8SMark Cave-Ayland } 558e4e166c8SMark Cave-Ayland 559004826d0SMark Cave-Ayland esp_dma_ti_check(s); 56074d71ea1SLaurent Vivier } 5611454dc76SMark Cave-Ayland break; 5621454dc76SMark Cave-Ayland 5631454dc76SMark Cave-Ayland case STAT_DI: 5641454dc76SMark Cave-Ayland if (!s->current_req) { 5651454dc76SMark Cave-Ayland return; 5661454dc76SMark Cave-Ayland } 5671454dc76SMark Cave-Ayland if (s->async_len == 0 && esp_get_tc(s) && s->ti_size) { 5681454dc76SMark Cave-Ayland /* Defer until data is available. */ 5691454dc76SMark Cave-Ayland return; 5701454dc76SMark Cave-Ayland } 5711454dc76SMark Cave-Ayland if (len > s->async_len) { 5721454dc76SMark Cave-Ayland len = s->async_len; 5731454dc76SMark Cave-Ayland } 57474d71ea1SLaurent Vivier if (s->dma_memory_write) { 57549ab747fSPaolo Bonzini s->dma_memory_write(s->dma_opaque, s->async_buf, len); 576f3666223SMark Cave-Ayland 577f3666223SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 578f3666223SMark Cave-Ayland s->async_buf += len; 579f3666223SMark Cave-Ayland s->async_len -= len; 580f3666223SMark Cave-Ayland s->ti_size -= len; 581f3666223SMark Cave-Ayland 58202a3ce56SMark Cave-Ayland if (s->async_len == 0 && s->ti_size == 0 && esp_get_tc(s)) { 58302a3ce56SMark Cave-Ayland /* If the guest underflows TC then terminate SCSI request */ 58402a3ce56SMark Cave-Ayland scsi_req_continue(s->current_req); 58502a3ce56SMark Cave-Ayland return; 58602a3ce56SMark Cave-Ayland } 58702a3ce56SMark Cave-Ayland 588e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 589e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 590f3666223SMark Cave-Ayland scsi_req_continue(s->current_req); 591fabcba49SMark Cave-Ayland return; 592f3666223SMark Cave-Ayland } 593f3666223SMark Cave-Ayland 594004826d0SMark Cave-Ayland esp_dma_ti_check(s); 59574d71ea1SLaurent Vivier } else { 59682141c8bSMark Cave-Ayland /* Copy device data to FIFO */ 597042879fcSMark Cave-Ayland len = MIN(len, fifo8_num_free(&s->fifo)); 598042879fcSMark Cave-Ayland fifo8_push_all(&s->fifo, s->async_buf, len); 59982141c8bSMark Cave-Ayland s->async_buf += len; 60082141c8bSMark Cave-Ayland s->async_len -= len; 60182141c8bSMark Cave-Ayland s->ti_size -= len; 60282141c8bSMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 60374d71ea1SLaurent Vivier esp_raise_drq(s); 604e4e166c8SMark Cave-Ayland 60502a3ce56SMark Cave-Ayland if (s->async_len == 0 && s->ti_size == 0 && esp_get_tc(s)) { 60602a3ce56SMark Cave-Ayland /* If the guest underflows TC then terminate SCSI request */ 60702a3ce56SMark Cave-Ayland scsi_req_continue(s->current_req); 60802a3ce56SMark Cave-Ayland return; 60902a3ce56SMark Cave-Ayland } 61002a3ce56SMark Cave-Ayland 611e4e166c8SMark Cave-Ayland if (s->async_len == 0 && fifo8_num_used(&s->fifo) < 2) { 612e4e166c8SMark Cave-Ayland /* Defer until the scsi layer has completed */ 613e4e166c8SMark Cave-Ayland scsi_req_continue(s->current_req); 614e4e166c8SMark Cave-Ayland return; 615e4e166c8SMark Cave-Ayland } 616e4e166c8SMark Cave-Ayland 617004826d0SMark Cave-Ayland esp_dma_ti_check(s); 618e4e166c8SMark Cave-Ayland } 6191454dc76SMark Cave-Ayland break; 6208baa1472SMark Cave-Ayland 6218baa1472SMark Cave-Ayland case STAT_ST: 6228baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6238baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6248baa1472SMark Cave-Ayland len = MIN(len, 1); 6258baa1472SMark Cave-Ayland 6268baa1472SMark Cave-Ayland if (len) { 6278baa1472SMark Cave-Ayland buf[0] = s->status; 6288baa1472SMark Cave-Ayland 6298baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6308baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 6318baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6328baa1472SMark Cave-Ayland } else { 6338baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 6348baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6358baa1472SMark Cave-Ayland } 6368baa1472SMark Cave-Ayland 6378baa1472SMark Cave-Ayland esp_set_phase(s, STAT_MI); 6388baa1472SMark Cave-Ayland 6398baa1472SMark Cave-Ayland if (esp_get_tc(s) > 0) { 6408baa1472SMark Cave-Ayland /* Process any message in phase data */ 6418baa1472SMark Cave-Ayland esp_do_dma(s); 6428baa1472SMark Cave-Ayland } 6438baa1472SMark Cave-Ayland } 6448baa1472SMark Cave-Ayland break; 64502a3ce56SMark Cave-Ayland 64602a3ce56SMark Cave-Ayland default: 64702a3ce56SMark Cave-Ayland /* Consume remaining data if the guest underflows TC */ 64802a3ce56SMark Cave-Ayland if (fifo8_num_used(&s->fifo) < 2) { 64902a3ce56SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 65002a3ce56SMark Cave-Ayland esp_raise_irq(s); 65102a3ce56SMark Cave-Ayland esp_lower_drq(s); 65202a3ce56SMark Cave-Ayland } 65302a3ce56SMark Cave-Ayland break; 6548baa1472SMark Cave-Ayland } 6558baa1472SMark Cave-Ayland break; 6568baa1472SMark Cave-Ayland 6578baa1472SMark Cave-Ayland case STAT_MI: 6588baa1472SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 6598baa1472SMark Cave-Ayland case CMD_ICCS | CMD_DMA: 6608baa1472SMark Cave-Ayland len = MIN(len, 1); 6618baa1472SMark Cave-Ayland 6628baa1472SMark Cave-Ayland if (len) { 6638baa1472SMark Cave-Ayland buf[0] = 0; 6648baa1472SMark Cave-Ayland 6658baa1472SMark Cave-Ayland if (s->dma_memory_write) { 6668baa1472SMark Cave-Ayland s->dma_memory_write(s->dma_opaque, buf, len); 6678baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6688baa1472SMark Cave-Ayland } else { 6698baa1472SMark Cave-Ayland fifo8_push_all(&s->fifo, buf, len); 6708baa1472SMark Cave-Ayland esp_set_tc(s, esp_get_tc(s) - len); 6718baa1472SMark Cave-Ayland } 6728baa1472SMark Cave-Ayland 6738baa1472SMark Cave-Ayland /* Raise end of command interrupt */ 6740ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 6758baa1472SMark Cave-Ayland esp_raise_irq(s); 6768baa1472SMark Cave-Ayland } 6778baa1472SMark Cave-Ayland break; 6788baa1472SMark Cave-Ayland } 6798baa1472SMark Cave-Ayland break; 68074d71ea1SLaurent Vivier } 68149ab747fSPaolo Bonzini } 68249ab747fSPaolo Bonzini 683a1b8d389SMark Cave-Ayland static void esp_nodma_ti_dataout(ESPState *s) 684a1b8d389SMark Cave-Ayland { 685a1b8d389SMark Cave-Ayland int len; 686a1b8d389SMark Cave-Ayland 687a1b8d389SMark Cave-Ayland if (!s->current_req) { 688a1b8d389SMark Cave-Ayland return; 689a1b8d389SMark Cave-Ayland } 690a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 691a1b8d389SMark Cave-Ayland /* Defer until data is available. */ 692a1b8d389SMark Cave-Ayland return; 693a1b8d389SMark Cave-Ayland } 694a1b8d389SMark Cave-Ayland len = MIN(s->async_len, ESP_FIFO_SZ); 695a1b8d389SMark Cave-Ayland len = MIN(len, fifo8_num_used(&s->fifo)); 696a1b8d389SMark Cave-Ayland esp_fifo_pop_buf(&s->fifo, s->async_buf, len); 697a1b8d389SMark Cave-Ayland s->async_buf += len; 698a1b8d389SMark Cave-Ayland s->async_len -= len; 699a1b8d389SMark Cave-Ayland s->ti_size += len; 700a1b8d389SMark Cave-Ayland 701a1b8d389SMark Cave-Ayland if (s->async_len == 0) { 702a1b8d389SMark Cave-Ayland scsi_req_continue(s->current_req); 703a1b8d389SMark Cave-Ayland return; 704a1b8d389SMark Cave-Ayland } 705a1b8d389SMark Cave-Ayland 706a1b8d389SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 707a1b8d389SMark Cave-Ayland esp_raise_irq(s); 708a1b8d389SMark Cave-Ayland } 709a1b8d389SMark Cave-Ayland 7101b9e48a5SMark Cave-Ayland static void esp_do_nodma(ESPState *s) 7111b9e48a5SMark Cave-Ayland { 7122572689bSMark Cave-Ayland uint8_t buf[ESP_FIFO_SZ]; 7137b320a8eSMark Cave-Ayland uint32_t cmdlen; 714a1b8d389SMark Cave-Ayland int n; 7151b9e48a5SMark Cave-Ayland 71683e803deSMark Cave-Ayland switch (esp_get_phase(s)) { 71783e803deSMark Cave-Ayland case STAT_MO: 7182572689bSMark Cave-Ayland /* Copy FIFO into cmdfifo */ 7192572689bSMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 7202572689bSMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 7212572689bSMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 72279a6c7c6SMark Cave-Ayland s->cmdfifo_cdb_offset += n; 7232572689bSMark Cave-Ayland 7245d02add4SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 7255d02add4SMark Cave-Ayland case CMD_SELATN: 7265d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 7275d02add4SMark Cave-Ayland /* First byte received, switch to command phase */ 7285d02add4SMark Cave-Ayland esp_set_phase(s, STAT_CD); 7295d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 7305d02add4SMark Cave-Ayland 7315d02add4SMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) > 1) { 7325d02add4SMark Cave-Ayland /* Process any additional command phase data */ 7335d02add4SMark Cave-Ayland esp_do_nodma(s); 7345d02add4SMark Cave-Ayland } 7355d02add4SMark Cave-Ayland } 7365d02add4SMark Cave-Ayland break; 7375d02add4SMark Cave-Ayland 7385d02add4SMark Cave-Ayland case CMD_SELATNS: 739d39592ffSMark Cave-Ayland if (fifo8_num_used(&s->cmdfifo) >= 1) { 7405d02add4SMark Cave-Ayland /* First byte received, stop in message out phase */ 7415d02add4SMark Cave-Ayland s->cmdfifo_cdb_offset = 1; 7425d02add4SMark Cave-Ayland 7435d02add4SMark Cave-Ayland /* Raise command completion interrupt */ 7445d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 7455d02add4SMark Cave-Ayland esp_raise_irq(s); 7465d02add4SMark Cave-Ayland } 7475d02add4SMark Cave-Ayland break; 7485d02add4SMark Cave-Ayland 7495d02add4SMark Cave-Ayland case CMD_TI: 7505d02add4SMark Cave-Ayland /* ATN remains asserted until FIFO empty */ 7511b9e48a5SMark Cave-Ayland s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo); 752abc139cdSMark Cave-Ayland esp_set_phase(s, STAT_CD); 753cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 7541b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 7551b9e48a5SMark Cave-Ayland esp_raise_irq(s); 75679a6c7c6SMark Cave-Ayland break; 7575d02add4SMark Cave-Ayland } 7585d02add4SMark Cave-Ayland break; 75979a6c7c6SMark Cave-Ayland 76079a6c7c6SMark Cave-Ayland case STAT_CD: 76179a6c7c6SMark Cave-Ayland /* Copy FIFO into cmdfifo */ 76279a6c7c6SMark Cave-Ayland n = esp_fifo_pop_buf(&s->fifo, buf, fifo8_num_used(&s->fifo)); 76379a6c7c6SMark Cave-Ayland n = MIN(fifo8_num_free(&s->cmdfifo), n); 76479a6c7c6SMark Cave-Ayland fifo8_push_all(&s->cmdfifo, buf, n); 76579a6c7c6SMark Cave-Ayland 7665d02add4SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 7675d02add4SMark Cave-Ayland case CMD_TI: 76879a6c7c6SMark Cave-Ayland cmdlen = fifo8_num_used(&s->cmdfifo); 76979a6c7c6SMark Cave-Ayland trace_esp_handle_ti_cmd(cmdlen); 77079a6c7c6SMark Cave-Ayland 7715d02add4SMark Cave-Ayland /* CDB may be transferred in one or more TI commands */ 7725d02add4SMark Cave-Ayland if (esp_cdb_length(s) && esp_cdb_length(s) == 7735d02add4SMark Cave-Ayland fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset) { 77479a6c7c6SMark Cave-Ayland /* Command has been received */ 77579a6c7c6SMark Cave-Ayland do_cmd(s); 7765d02add4SMark Cave-Ayland } else { 7775d02add4SMark Cave-Ayland /* 7785d02add4SMark Cave-Ayland * If data was transferred from the FIFO then raise bus 7795d02add4SMark Cave-Ayland * service interrupt to indicate transfer complete. Otherwise 7805d02add4SMark Cave-Ayland * defer until the next FIFO write. 7815d02add4SMark Cave-Ayland */ 7825d02add4SMark Cave-Ayland if (n) { 7835d02add4SMark Cave-Ayland /* Raise interrupt to indicate transfer complete */ 7845d02add4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 7855d02add4SMark Cave-Ayland esp_raise_irq(s); 7865d02add4SMark Cave-Ayland } 7875d02add4SMark Cave-Ayland } 7885d02add4SMark Cave-Ayland break; 7895d02add4SMark Cave-Ayland 790*8ba32048SMark Cave-Ayland case CMD_SEL | CMD_DMA: 791*8ba32048SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 792*8ba32048SMark Cave-Ayland /* Handle when DMA transfer is terminated by non-DMA FIFO write */ 793*8ba32048SMark Cave-Ayland if (esp_cdb_length(s) && esp_cdb_length(s) == 794*8ba32048SMark Cave-Ayland fifo8_num_used(&s->cmdfifo) - s->cmdfifo_cdb_offset) { 795*8ba32048SMark Cave-Ayland /* Command has been received */ 796*8ba32048SMark Cave-Ayland do_cmd(s); 797*8ba32048SMark Cave-Ayland } 798*8ba32048SMark Cave-Ayland break; 799*8ba32048SMark Cave-Ayland 8005d02add4SMark Cave-Ayland case CMD_SEL: 8015d02add4SMark Cave-Ayland case CMD_SELATN: 8025d02add4SMark Cave-Ayland /* FIFO already contain entire CDB */ 8035d02add4SMark Cave-Ayland do_cmd(s); 8045d02add4SMark Cave-Ayland break; 8055d02add4SMark Cave-Ayland } 80683e803deSMark Cave-Ayland break; 8071b9e48a5SMark Cave-Ayland 8089d1aa52bSMark Cave-Ayland case STAT_DO: 8095d02add4SMark Cave-Ayland /* Accumulate data in FIFO until non-DMA TI is executed */ 8109d1aa52bSMark Cave-Ayland break; 8119d1aa52bSMark Cave-Ayland 8129d1aa52bSMark Cave-Ayland case STAT_DI: 8139d1aa52bSMark Cave-Ayland if (!s->current_req) { 8149d1aa52bSMark Cave-Ayland return; 8159d1aa52bSMark Cave-Ayland } 8169d1aa52bSMark Cave-Ayland if (s->async_len == 0) { 8179d1aa52bSMark Cave-Ayland /* Defer until data is available. */ 8189d1aa52bSMark Cave-Ayland return; 8199d1aa52bSMark Cave-Ayland } 8206ef2cabcSMark Cave-Ayland if (fifo8_is_empty(&s->fifo)) { 8216ef2cabcSMark Cave-Ayland fifo8_push(&s->fifo, s->async_buf[0]); 8226ef2cabcSMark Cave-Ayland s->async_buf++; 8236ef2cabcSMark Cave-Ayland s->async_len--; 8246ef2cabcSMark Cave-Ayland s->ti_size--; 8256ef2cabcSMark Cave-Ayland } 8261b9e48a5SMark Cave-Ayland 8271b9e48a5SMark Cave-Ayland if (s->async_len == 0) { 8281b9e48a5SMark Cave-Ayland scsi_req_continue(s->current_req); 8291b9e48a5SMark Cave-Ayland return; 8301b9e48a5SMark Cave-Ayland } 8311b9e48a5SMark Cave-Ayland 8329655f72cSMark Cave-Ayland /* If preloading the FIFO, defer until TI command issued */ 8339655f72cSMark Cave-Ayland if (s->rregs[ESP_CMD] != CMD_TI) { 8349655f72cSMark Cave-Ayland return; 8359655f72cSMark Cave-Ayland } 8369655f72cSMark Cave-Ayland 8371b9e48a5SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 8381b9e48a5SMark Cave-Ayland esp_raise_irq(s); 8399d1aa52bSMark Cave-Ayland break; 84083428f7aSMark Cave-Ayland 84183428f7aSMark Cave-Ayland case STAT_ST: 84283428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 84383428f7aSMark Cave-Ayland case CMD_ICCS: 84483428f7aSMark Cave-Ayland fifo8_push(&s->fifo, s->status); 84583428f7aSMark Cave-Ayland esp_set_phase(s, STAT_MI); 84683428f7aSMark Cave-Ayland 84783428f7aSMark Cave-Ayland /* Process any message in phase data */ 84883428f7aSMark Cave-Ayland esp_do_nodma(s); 84983428f7aSMark Cave-Ayland break; 85083428f7aSMark Cave-Ayland } 85183428f7aSMark Cave-Ayland break; 85283428f7aSMark Cave-Ayland 85383428f7aSMark Cave-Ayland case STAT_MI: 85483428f7aSMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 85583428f7aSMark Cave-Ayland case CMD_ICCS: 85683428f7aSMark Cave-Ayland fifo8_push(&s->fifo, 0); 85783428f7aSMark Cave-Ayland 8580ee71db4SMark Cave-Ayland /* Raise end of command interrupt */ 8590ee71db4SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 86083428f7aSMark Cave-Ayland esp_raise_irq(s); 86183428f7aSMark Cave-Ayland break; 86283428f7aSMark Cave-Ayland } 86383428f7aSMark Cave-Ayland break; 8649d1aa52bSMark Cave-Ayland } 8651b9e48a5SMark Cave-Ayland } 8661b9e48a5SMark Cave-Ayland 8674aaa6ac3SMark Cave-Ayland void esp_command_complete(SCSIRequest *req, size_t resid) 86849ab747fSPaolo Bonzini { 8694aaa6ac3SMark Cave-Ayland ESPState *s = req->hba_private; 8705a83e83eSMark Cave-Ayland int to_device = (esp_get_phase(s) == STAT_DO); 8714aaa6ac3SMark Cave-Ayland 87249ab747fSPaolo Bonzini trace_esp_command_complete(); 8736ef2cabcSMark Cave-Ayland 8746ef2cabcSMark Cave-Ayland /* 8756ef2cabcSMark Cave-Ayland * Non-DMA transfers from the target will leave the last byte in 8766ef2cabcSMark Cave-Ayland * the FIFO so don't reset ti_size in this case 8776ef2cabcSMark Cave-Ayland */ 8786ef2cabcSMark Cave-Ayland if (s->dma || to_device) { 87949ab747fSPaolo Bonzini if (s->ti_size != 0) { 88049ab747fSPaolo Bonzini trace_esp_command_complete_unexpected(); 88149ab747fSPaolo Bonzini } 8826ef2cabcSMark Cave-Ayland } 8836ef2cabcSMark Cave-Ayland 88449ab747fSPaolo Bonzini s->async_len = 0; 8854aaa6ac3SMark Cave-Ayland if (req->status) { 88649ab747fSPaolo Bonzini trace_esp_command_complete_fail(); 88749ab747fSPaolo Bonzini } 8884aaa6ac3SMark Cave-Ayland s->status = req->status; 8896ef2cabcSMark Cave-Ayland 8906ef2cabcSMark Cave-Ayland /* 891cb988199SMark Cave-Ayland * Switch to status phase. For non-DMA transfers from the target the last 892cb988199SMark Cave-Ayland * byte is still in the FIFO 8936ef2cabcSMark Cave-Ayland */ 8948bb22495SMark Cave-Ayland s->ti_size = 0; 8958bb22495SMark Cave-Ayland 8968bb22495SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 8978bb22495SMark Cave-Ayland case CMD_SEL | CMD_DMA: 8988bb22495SMark Cave-Ayland case CMD_SEL: 8998bb22495SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 9008bb22495SMark Cave-Ayland case CMD_SELATN: 901cb988199SMark Cave-Ayland /* 9028bb22495SMark Cave-Ayland * No data phase for sequencer command so raise deferred bus service 903c90b2792SMark Cave-Ayland * and function complete interrupt 904cb988199SMark Cave-Ayland */ 905c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 9068bb22495SMark Cave-Ayland break; 907cb22ce50SMark Cave-Ayland 908cb22ce50SMark Cave-Ayland case CMD_TI | CMD_DMA: 909cb22ce50SMark Cave-Ayland case CMD_TI: 910cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 911cb22ce50SMark Cave-Ayland break; 9126ef2cabcSMark Cave-Ayland } 9136ef2cabcSMark Cave-Ayland 9148bb22495SMark Cave-Ayland /* Raise bus service interrupt to indicate change to STATUS phase */ 9158bb22495SMark Cave-Ayland esp_set_phase(s, STAT_ST); 9168bb22495SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 9178bb22495SMark Cave-Ayland esp_raise_irq(s); 91802a3ce56SMark Cave-Ayland 91902a3ce56SMark Cave-Ayland /* Ensure DRQ is set correctly for TC underflow or normal completion */ 92002a3ce56SMark Cave-Ayland esp_dma_ti_check(s); 9218bb22495SMark Cave-Ayland 92249ab747fSPaolo Bonzini if (s->current_req) { 92349ab747fSPaolo Bonzini scsi_req_unref(s->current_req); 92449ab747fSPaolo Bonzini s->current_req = NULL; 92549ab747fSPaolo Bonzini s->current_dev = NULL; 92649ab747fSPaolo Bonzini } 92749ab747fSPaolo Bonzini } 92849ab747fSPaolo Bonzini 92949ab747fSPaolo Bonzini void esp_transfer_data(SCSIRequest *req, uint32_t len) 93049ab747fSPaolo Bonzini { 93149ab747fSPaolo Bonzini ESPState *s = req->hba_private; 9326cc88d6bSMark Cave-Ayland uint32_t dmalen = esp_get_tc(s); 93349ab747fSPaolo Bonzini 9346cc88d6bSMark Cave-Ayland trace_esp_transfer_data(dmalen, s->ti_size); 93549ab747fSPaolo Bonzini s->async_len = len; 93649ab747fSPaolo Bonzini s->async_buf = scsi_req_get_buf(req); 9374e78f3bfSMark Cave-Ayland 938c90b2792SMark Cave-Ayland if (!s->data_ready) { 939a4608fa0SMark Cave-Ayland s->data_ready = true; 940a4608fa0SMark Cave-Ayland 941a4608fa0SMark Cave-Ayland switch (s->rregs[ESP_CMD]) { 942a4608fa0SMark Cave-Ayland case CMD_SEL | CMD_DMA: 943a4608fa0SMark Cave-Ayland case CMD_SEL: 944a4608fa0SMark Cave-Ayland case CMD_SELATN | CMD_DMA: 945a4608fa0SMark Cave-Ayland case CMD_SELATN: 946c90b2792SMark Cave-Ayland /* 947c90b2792SMark Cave-Ayland * Initial incoming data xfer is complete for sequencer command 948c90b2792SMark Cave-Ayland * so raise deferred bus service and function complete interrupt 949c90b2792SMark Cave-Ayland */ 950c90b2792SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; 951c90b2792SMark Cave-Ayland break; 952c90b2792SMark Cave-Ayland 953a4608fa0SMark Cave-Ayland case CMD_SELATNS | CMD_DMA: 954a4608fa0SMark Cave-Ayland case CMD_SELATNS: 9554e78f3bfSMark Cave-Ayland /* 9564e78f3bfSMark Cave-Ayland * Initial incoming data xfer is complete so raise command 9574e78f3bfSMark Cave-Ayland * completion interrupt 9584e78f3bfSMark Cave-Ayland */ 9594e78f3bfSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 960a4608fa0SMark Cave-Ayland break; 961a4608fa0SMark Cave-Ayland 962a4608fa0SMark Cave-Ayland case CMD_TI | CMD_DMA: 963a4608fa0SMark Cave-Ayland case CMD_TI: 964a4608fa0SMark Cave-Ayland /* 965a4608fa0SMark Cave-Ayland * Bus service interrupt raised because of initial change to 966a4608fa0SMark Cave-Ayland * DATA phase 967a4608fa0SMark Cave-Ayland */ 968cb22ce50SMark Cave-Ayland s->rregs[ESP_CMD] = 0; 969a4608fa0SMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_BS; 970a4608fa0SMark Cave-Ayland break; 971a4608fa0SMark Cave-Ayland } 972c90b2792SMark Cave-Ayland 973c90b2792SMark Cave-Ayland esp_raise_irq(s); 9744e78f3bfSMark Cave-Ayland } 9754e78f3bfSMark Cave-Ayland 9761b9e48a5SMark Cave-Ayland /* 9771b9e48a5SMark Cave-Ayland * Always perform the initial transfer upon reception of the next TI 9781b9e48a5SMark Cave-Ayland * command to ensure the DMA/non-DMA status of the command is correct. 9791b9e48a5SMark Cave-Ayland * It is not possible to use s->dma directly in the section below as 9801b9e48a5SMark Cave-Ayland * some OSs send non-DMA NOP commands after a DMA transfer. Hence if the 9811b9e48a5SMark Cave-Ayland * async data transfer is delayed then s->dma is set incorrectly. 9821b9e48a5SMark Cave-Ayland */ 9831b9e48a5SMark Cave-Ayland 98482003450SMark Cave-Ayland if (s->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) { 985a79e767aSMark Cave-Ayland /* When the SCSI layer returns more data, raise deferred INTR_BS */ 986004826d0SMark Cave-Ayland esp_dma_ti_check(s); 987a79e767aSMark Cave-Ayland 988a79e767aSMark Cave-Ayland esp_do_dma(s); 98982003450SMark Cave-Ayland } else if (s->rregs[ESP_CMD] == CMD_TI) { 9901b9e48a5SMark Cave-Ayland esp_do_nodma(s); 9911b9e48a5SMark Cave-Ayland } 99249ab747fSPaolo Bonzini } 99349ab747fSPaolo Bonzini 99449ab747fSPaolo Bonzini static void handle_ti(ESPState *s) 99549ab747fSPaolo Bonzini { 9961b9e48a5SMark Cave-Ayland uint32_t dmalen; 99749ab747fSPaolo Bonzini 99849ab747fSPaolo Bonzini if (s->dma && !s->dma_enabled) { 99949ab747fSPaolo Bonzini s->dma_cb = handle_ti; 100049ab747fSPaolo Bonzini return; 100149ab747fSPaolo Bonzini } 100249ab747fSPaolo Bonzini 100349ab747fSPaolo Bonzini if (s->dma) { 10041b9e48a5SMark Cave-Ayland dmalen = esp_get_tc(s); 1005b76624deSMark Cave-Ayland trace_esp_handle_ti(dmalen); 100649ab747fSPaolo Bonzini esp_do_dma(s); 1007799d90d8SMark Cave-Ayland } else { 10081b9e48a5SMark Cave-Ayland trace_esp_handle_ti(s->ti_size); 10091b9e48a5SMark Cave-Ayland esp_do_nodma(s); 10105d02add4SMark Cave-Ayland 10115d02add4SMark Cave-Ayland if (esp_get_phase(s) == STAT_DO) { 10125d02add4SMark Cave-Ayland esp_nodma_ti_dataout(s); 10135d02add4SMark Cave-Ayland } 101449ab747fSPaolo Bonzini } 101549ab747fSPaolo Bonzini } 101649ab747fSPaolo Bonzini 101749ab747fSPaolo Bonzini void esp_hard_reset(ESPState *s) 101849ab747fSPaolo Bonzini { 101949ab747fSPaolo Bonzini memset(s->rregs, 0, ESP_REGS); 102049ab747fSPaolo Bonzini memset(s->wregs, 0, ESP_REGS); 1021c9cf45c1SHannes Reinecke s->tchi_written = 0; 102249ab747fSPaolo Bonzini s->ti_size = 0; 10233f26c975SMark Cave-Ayland s->async_len = 0; 1024042879fcSMark Cave-Ayland fifo8_reset(&s->fifo); 1025023666daSMark Cave-Ayland fifo8_reset(&s->cmdfifo); 102649ab747fSPaolo Bonzini s->dma = 0; 102749ab747fSPaolo Bonzini s->dma_cb = NULL; 102849ab747fSPaolo Bonzini 102949ab747fSPaolo Bonzini s->rregs[ESP_CFG1] = 7; 103049ab747fSPaolo Bonzini } 103149ab747fSPaolo Bonzini 103249ab747fSPaolo Bonzini static void esp_soft_reset(ESPState *s) 103349ab747fSPaolo Bonzini { 103449ab747fSPaolo Bonzini qemu_irq_lower(s->irq); 103574d71ea1SLaurent Vivier qemu_irq_lower(s->irq_data); 103649ab747fSPaolo Bonzini esp_hard_reset(s); 103749ab747fSPaolo Bonzini } 103849ab747fSPaolo Bonzini 1039c6e51f1bSJohn Millikin static void esp_bus_reset(ESPState *s) 1040c6e51f1bSJohn Millikin { 10414a5fc890SPeter Maydell bus_cold_reset(BUS(&s->bus)); 1042c6e51f1bSJohn Millikin } 1043c6e51f1bSJohn Millikin 104449ab747fSPaolo Bonzini static void parent_esp_reset(ESPState *s, int irq, int level) 104549ab747fSPaolo Bonzini { 104649ab747fSPaolo Bonzini if (level) { 104749ab747fSPaolo Bonzini esp_soft_reset(s); 104849ab747fSPaolo Bonzini } 104949ab747fSPaolo Bonzini } 105049ab747fSPaolo Bonzini 1051f21fe39dSMark Cave-Ayland static void esp_run_cmd(ESPState *s) 1052f21fe39dSMark Cave-Ayland { 1053f21fe39dSMark Cave-Ayland uint8_t cmd = s->rregs[ESP_CMD]; 1054f21fe39dSMark Cave-Ayland 1055f21fe39dSMark Cave-Ayland if (cmd & CMD_DMA) { 1056f21fe39dSMark Cave-Ayland s->dma = 1; 1057f21fe39dSMark Cave-Ayland /* Reload DMA counter. */ 1058f21fe39dSMark Cave-Ayland if (esp_get_stc(s) == 0) { 1059f21fe39dSMark Cave-Ayland esp_set_tc(s, 0x10000); 1060f21fe39dSMark Cave-Ayland } else { 1061f21fe39dSMark Cave-Ayland esp_set_tc(s, esp_get_stc(s)); 1062f21fe39dSMark Cave-Ayland } 1063f21fe39dSMark Cave-Ayland } else { 1064f21fe39dSMark Cave-Ayland s->dma = 0; 1065f21fe39dSMark Cave-Ayland } 1066f21fe39dSMark Cave-Ayland switch (cmd & CMD_CMD) { 1067f21fe39dSMark Cave-Ayland case CMD_NOP: 1068f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_nop(cmd); 1069f21fe39dSMark Cave-Ayland break; 1070f21fe39dSMark Cave-Ayland case CMD_FLUSH: 1071f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_flush(cmd); 1072f21fe39dSMark Cave-Ayland fifo8_reset(&s->fifo); 1073f21fe39dSMark Cave-Ayland break; 1074f21fe39dSMark Cave-Ayland case CMD_RESET: 1075f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_reset(cmd); 1076f21fe39dSMark Cave-Ayland esp_soft_reset(s); 1077f21fe39dSMark Cave-Ayland break; 1078f21fe39dSMark Cave-Ayland case CMD_BUSRESET: 1079f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_bus_reset(cmd); 1080f21fe39dSMark Cave-Ayland esp_bus_reset(s); 1081f21fe39dSMark Cave-Ayland if (!(s->wregs[ESP_CFG1] & CFG1_RESREPT)) { 1082f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_RST; 1083f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1084f21fe39dSMark Cave-Ayland } 1085f21fe39dSMark Cave-Ayland break; 1086f21fe39dSMark Cave-Ayland case CMD_TI: 1087f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ti(cmd); 1088f21fe39dSMark Cave-Ayland handle_ti(s); 1089f21fe39dSMark Cave-Ayland break; 1090f21fe39dSMark Cave-Ayland case CMD_ICCS: 1091f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_iccs(cmd); 1092f21fe39dSMark Cave-Ayland write_response(s); 1093f21fe39dSMark Cave-Ayland break; 1094f21fe39dSMark Cave-Ayland case CMD_MSGACC: 1095f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_msgacc(cmd); 1096f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_DC; 1097f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1098f21fe39dSMark Cave-Ayland s->rregs[ESP_RFLAGS] = 0; 1099f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1100f21fe39dSMark Cave-Ayland break; 1101f21fe39dSMark Cave-Ayland case CMD_PAD: 1102f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_pad(cmd); 1103f21fe39dSMark Cave-Ayland s->rregs[ESP_RSTAT] = STAT_TC; 1104f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] |= INTR_FC; 1105f21fe39dSMark Cave-Ayland s->rregs[ESP_RSEQ] = 0; 1106f21fe39dSMark Cave-Ayland break; 1107f21fe39dSMark Cave-Ayland case CMD_SATN: 1108f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_satn(cmd); 1109f21fe39dSMark Cave-Ayland break; 1110f21fe39dSMark Cave-Ayland case CMD_RSTATN: 1111f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_rstatn(cmd); 1112f21fe39dSMark Cave-Ayland break; 1113f21fe39dSMark Cave-Ayland case CMD_SEL: 1114f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_sel(cmd); 1115f21fe39dSMark Cave-Ayland handle_s_without_atn(s); 1116f21fe39dSMark Cave-Ayland break; 1117f21fe39dSMark Cave-Ayland case CMD_SELATN: 1118f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatn(cmd); 1119f21fe39dSMark Cave-Ayland handle_satn(s); 1120f21fe39dSMark Cave-Ayland break; 1121f21fe39dSMark Cave-Ayland case CMD_SELATNS: 1122f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_selatns(cmd); 1123f21fe39dSMark Cave-Ayland handle_satn_stop(s); 1124f21fe39dSMark Cave-Ayland break; 1125f21fe39dSMark Cave-Ayland case CMD_ENSEL: 1126f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_ensel(cmd); 1127f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1128f21fe39dSMark Cave-Ayland break; 1129f21fe39dSMark Cave-Ayland case CMD_DISSEL: 1130f21fe39dSMark Cave-Ayland trace_esp_mem_writeb_cmd_dissel(cmd); 1131f21fe39dSMark Cave-Ayland s->rregs[ESP_RINTR] = 0; 1132f21fe39dSMark Cave-Ayland esp_raise_irq(s); 1133f21fe39dSMark Cave-Ayland break; 1134f21fe39dSMark Cave-Ayland default: 1135f21fe39dSMark Cave-Ayland trace_esp_error_unhandled_command(cmd); 1136f21fe39dSMark Cave-Ayland break; 1137f21fe39dSMark Cave-Ayland } 1138f21fe39dSMark Cave-Ayland } 1139f21fe39dSMark Cave-Ayland 114049ab747fSPaolo Bonzini uint64_t esp_reg_read(ESPState *s, uint32_t saddr) 114149ab747fSPaolo Bonzini { 1142b630c075SMark Cave-Ayland uint32_t val; 114349ab747fSPaolo Bonzini 114449ab747fSPaolo Bonzini switch (saddr) { 114549ab747fSPaolo Bonzini case ESP_FIFO: 1146c5fef911SMark Cave-Ayland s->rregs[ESP_FIFO] = esp_fifo_pop(&s->fifo); 1147b630c075SMark Cave-Ayland val = s->rregs[ESP_FIFO]; 114849ab747fSPaolo Bonzini break; 114949ab747fSPaolo Bonzini case ESP_RINTR: 115094d5c79dSMark Cave-Ayland /* 115194d5c79dSMark Cave-Ayland * Clear sequence step, interrupt register and all status bits 115294d5c79dSMark Cave-Ayland * except TC 115394d5c79dSMark Cave-Ayland */ 1154b630c075SMark Cave-Ayland val = s->rregs[ESP_RINTR]; 115549ab747fSPaolo Bonzini s->rregs[ESP_RINTR] = 0; 1156d294b77aSMark Cave-Ayland esp_lower_irq(s); 1157d68212cdSMark Cave-Ayland s->rregs[ESP_RSTAT] &= STAT_TC | 7; 1158af947a3dSMark Cave-Ayland /* 1159af947a3dSMark Cave-Ayland * According to the datasheet ESP_RSEQ should be cleared, but as the 1160af947a3dSMark Cave-Ayland * emulation currently defers information transfers to the next TI 1161af947a3dSMark Cave-Ayland * command leave it for now so that pedantic guests such as the old 1162af947a3dSMark Cave-Ayland * Linux 2.6 driver see the correct flags before the next SCSI phase 1163af947a3dSMark Cave-Ayland * transition. 1164af947a3dSMark Cave-Ayland * 1165af947a3dSMark Cave-Ayland * s->rregs[ESP_RSEQ] = SEQ_0; 1166af947a3dSMark Cave-Ayland */ 1167b630c075SMark Cave-Ayland break; 1168c9cf45c1SHannes Reinecke case ESP_TCHI: 1169c9cf45c1SHannes Reinecke /* Return the unique id if the value has never been written */ 1170c9cf45c1SHannes Reinecke if (!s->tchi_written) { 1171b630c075SMark Cave-Ayland val = s->chip_id; 1172b630c075SMark Cave-Ayland } else { 1173b630c075SMark Cave-Ayland val = s->rregs[saddr]; 1174c9cf45c1SHannes Reinecke } 1175b630c075SMark Cave-Ayland break; 1176238ec4d7SMark Cave-Ayland case ESP_RFLAGS: 1177238ec4d7SMark Cave-Ayland /* Bottom 5 bits indicate number of bytes in FIFO */ 1178238ec4d7SMark Cave-Ayland val = fifo8_num_used(&s->fifo); 1179238ec4d7SMark Cave-Ayland break; 118049ab747fSPaolo Bonzini default: 1181b630c075SMark Cave-Ayland val = s->rregs[saddr]; 118249ab747fSPaolo Bonzini break; 118349ab747fSPaolo Bonzini } 1184b630c075SMark Cave-Ayland 1185b630c075SMark Cave-Ayland trace_esp_mem_readb(saddr, val); 1186b630c075SMark Cave-Ayland return val; 118749ab747fSPaolo Bonzini } 118849ab747fSPaolo Bonzini 118949ab747fSPaolo Bonzini void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) 119049ab747fSPaolo Bonzini { 119149ab747fSPaolo Bonzini trace_esp_mem_writeb(saddr, s->wregs[saddr], val); 119249ab747fSPaolo Bonzini switch (saddr) { 1193c9cf45c1SHannes Reinecke case ESP_TCHI: 1194c9cf45c1SHannes Reinecke s->tchi_written = true; 1195c9cf45c1SHannes Reinecke /* fall through */ 119649ab747fSPaolo Bonzini case ESP_TCLO: 119749ab747fSPaolo Bonzini case ESP_TCMID: 119849ab747fSPaolo Bonzini s->rregs[ESP_RSTAT] &= ~STAT_TC; 119949ab747fSPaolo Bonzini break; 120049ab747fSPaolo Bonzini case ESP_FIFO: 12012572689bSMark Cave-Ayland if (!fifo8_is_full(&s->fifo)) { 12022572689bSMark Cave-Ayland esp_fifo_push(&s->fifo, val); 12032572689bSMark Cave-Ayland } 12045d02add4SMark Cave-Ayland esp_do_nodma(s); 120549ab747fSPaolo Bonzini break; 120649ab747fSPaolo Bonzini case ESP_CMD: 120749ab747fSPaolo Bonzini s->rregs[saddr] = val; 1208f21fe39dSMark Cave-Ayland esp_run_cmd(s); 120949ab747fSPaolo Bonzini break; 121049ab747fSPaolo Bonzini case ESP_WBUSID ... ESP_WSYNO: 121149ab747fSPaolo Bonzini break; 121249ab747fSPaolo Bonzini case ESP_CFG1: 121349ab747fSPaolo Bonzini case ESP_CFG2: case ESP_CFG3: 121449ab747fSPaolo Bonzini case ESP_RES3: case ESP_RES4: 121549ab747fSPaolo Bonzini s->rregs[saddr] = val; 121649ab747fSPaolo Bonzini break; 121749ab747fSPaolo Bonzini case ESP_WCCF ... ESP_WTEST: 121849ab747fSPaolo Bonzini break; 121949ab747fSPaolo Bonzini default: 122049ab747fSPaolo Bonzini trace_esp_error_invalid_write(val, saddr); 122149ab747fSPaolo Bonzini return; 122249ab747fSPaolo Bonzini } 122349ab747fSPaolo Bonzini s->wregs[saddr] = val; 122449ab747fSPaolo Bonzini } 122549ab747fSPaolo Bonzini 122649ab747fSPaolo Bonzini static bool esp_mem_accepts(void *opaque, hwaddr addr, 12278372d383SPeter Maydell unsigned size, bool is_write, 12288372d383SPeter Maydell MemTxAttrs attrs) 122949ab747fSPaolo Bonzini { 123049ab747fSPaolo Bonzini return (size == 1) || (is_write && size == 4); 123149ab747fSPaolo Bonzini } 123249ab747fSPaolo Bonzini 12336cc88d6bSMark Cave-Ayland static bool esp_is_before_version_5(void *opaque, int version_id) 12346cc88d6bSMark Cave-Ayland { 12356cc88d6bSMark Cave-Ayland ESPState *s = ESP(opaque); 12366cc88d6bSMark Cave-Ayland 12376cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12386cc88d6bSMark Cave-Ayland return version_id < 5; 12396cc88d6bSMark Cave-Ayland } 12406cc88d6bSMark Cave-Ayland 12414e78f3bfSMark Cave-Ayland static bool esp_is_version_5(void *opaque, int version_id) 12424e78f3bfSMark Cave-Ayland { 12434e78f3bfSMark Cave-Ayland ESPState *s = ESP(opaque); 12444e78f3bfSMark Cave-Ayland 12454e78f3bfSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12460bcd5a18SMark Cave-Ayland return version_id >= 5; 12474e78f3bfSMark Cave-Ayland } 12484e78f3bfSMark Cave-Ayland 12494eb86065SPaolo Bonzini static bool esp_is_version_6(void *opaque, int version_id) 12504eb86065SPaolo Bonzini { 12514eb86065SPaolo Bonzini ESPState *s = ESP(opaque); 12524eb86065SPaolo Bonzini 12534eb86065SPaolo Bonzini version_id = MIN(version_id, s->mig_version_id); 12544eb86065SPaolo Bonzini return version_id >= 6; 12554eb86065SPaolo Bonzini } 12564eb86065SPaolo Bonzini 125782003450SMark Cave-Ayland static bool esp_is_between_version_5_and_6(void *opaque, int version_id) 125882003450SMark Cave-Ayland { 125982003450SMark Cave-Ayland ESPState *s = ESP(opaque); 126082003450SMark Cave-Ayland 126182003450SMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 126282003450SMark Cave-Ayland return version_id >= 5 && version_id <= 6; 126382003450SMark Cave-Ayland } 126482003450SMark Cave-Ayland 1265ff4a1dabSMark Cave-Ayland int esp_pre_save(void *opaque) 12660bd005beSMark Cave-Ayland { 1267ff4a1dabSMark Cave-Ayland ESPState *s = ESP(object_resolve_path_component( 1268ff4a1dabSMark Cave-Ayland OBJECT(opaque), "esp")); 12690bd005beSMark Cave-Ayland 12700bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 12710bd005beSMark Cave-Ayland return 0; 12720bd005beSMark Cave-Ayland } 12730bd005beSMark Cave-Ayland 12740bd005beSMark Cave-Ayland static int esp_post_load(void *opaque, int version_id) 12750bd005beSMark Cave-Ayland { 12760bd005beSMark Cave-Ayland ESPState *s = ESP(opaque); 1277042879fcSMark Cave-Ayland int len, i; 12780bd005beSMark Cave-Ayland 12796cc88d6bSMark Cave-Ayland version_id = MIN(version_id, s->mig_version_id); 12806cc88d6bSMark Cave-Ayland 12816cc88d6bSMark Cave-Ayland if (version_id < 5) { 12826cc88d6bSMark Cave-Ayland esp_set_tc(s, s->mig_dma_left); 1283042879fcSMark Cave-Ayland 1284042879fcSMark Cave-Ayland /* Migrate ti_buf to fifo */ 1285042879fcSMark Cave-Ayland len = s->mig_ti_wptr - s->mig_ti_rptr; 1286042879fcSMark Cave-Ayland for (i = 0; i < len; i++) { 1287042879fcSMark Cave-Ayland fifo8_push(&s->fifo, s->mig_ti_buf[i]); 1288042879fcSMark Cave-Ayland } 1289023666daSMark Cave-Ayland 1290023666daSMark Cave-Ayland /* Migrate cmdbuf to cmdfifo */ 1291023666daSMark Cave-Ayland for (i = 0; i < s->mig_cmdlen; i++) { 1292023666daSMark Cave-Ayland fifo8_push(&s->cmdfifo, s->mig_cmdbuf[i]); 1293023666daSMark Cave-Ayland } 12946cc88d6bSMark Cave-Ayland } 12956cc88d6bSMark Cave-Ayland 12960bd005beSMark Cave-Ayland s->mig_version_id = vmstate_esp.version_id; 12970bd005beSMark Cave-Ayland return 0; 12980bd005beSMark Cave-Ayland } 12990bd005beSMark Cave-Ayland 130049ab747fSPaolo Bonzini const VMStateDescription vmstate_esp = { 130149ab747fSPaolo Bonzini .name = "esp", 130282003450SMark Cave-Ayland .version_id = 7, 130349ab747fSPaolo Bonzini .minimum_version_id = 3, 13040bd005beSMark Cave-Ayland .post_load = esp_post_load, 13052d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 130649ab747fSPaolo Bonzini VMSTATE_BUFFER(rregs, ESPState), 130749ab747fSPaolo Bonzini VMSTATE_BUFFER(wregs, ESPState), 130849ab747fSPaolo Bonzini VMSTATE_INT32(ti_size, ESPState), 1309042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_rptr, ESPState, esp_is_before_version_5), 1310042879fcSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_ti_wptr, ESPState, esp_is_before_version_5), 1311042879fcSMark Cave-Ayland VMSTATE_BUFFER_TEST(mig_ti_buf, ESPState, esp_is_before_version_5), 131249ab747fSPaolo Bonzini VMSTATE_UINT32(status, ESPState), 13134aaa6ac3SMark Cave-Ayland VMSTATE_UINT32_TEST(mig_deferred_status, ESPState, 13144aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 13154aaa6ac3SMark Cave-Ayland VMSTATE_BOOL_TEST(mig_deferred_complete, ESPState, 13164aaa6ac3SMark Cave-Ayland esp_is_before_version_5), 131749ab747fSPaolo Bonzini VMSTATE_UINT32(dma, ESPState), 1318023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 0, 1319023666daSMark Cave-Ayland esp_is_before_version_5, 0, 16), 1320023666daSMark Cave-Ayland VMSTATE_STATIC_BUFFER(mig_cmdbuf, ESPState, 4, 1321023666daSMark Cave-Ayland esp_is_before_version_5, 16, 1322023666daSMark Cave-Ayland sizeof(typeof_field(ESPState, mig_cmdbuf))), 1323023666daSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_cmdlen, ESPState, esp_is_before_version_5), 132449ab747fSPaolo Bonzini VMSTATE_UINT32(do_cmd, ESPState), 13256cc88d6bSMark Cave-Ayland VMSTATE_UINT32_TEST(mig_dma_left, ESPState, esp_is_before_version_5), 13268dded6deSMark Cave-Ayland VMSTATE_BOOL_TEST(data_ready, ESPState, esp_is_version_5), 1327023666daSMark Cave-Ayland VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5), 1328042879fcSMark Cave-Ayland VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5), 1329023666daSMark Cave-Ayland VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5), 133082003450SMark Cave-Ayland VMSTATE_UINT8_TEST(mig_ti_cmd, ESPState, 133182003450SMark Cave-Ayland esp_is_between_version_5_and_6), 13324eb86065SPaolo Bonzini VMSTATE_UINT8_TEST(lun, ESPState, esp_is_version_6), 133349ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 133474d71ea1SLaurent Vivier }, 133549ab747fSPaolo Bonzini }; 133649ab747fSPaolo Bonzini 133749ab747fSPaolo Bonzini static void sysbus_esp_mem_write(void *opaque, hwaddr addr, 133849ab747fSPaolo Bonzini uint64_t val, unsigned int size) 133949ab747fSPaolo Bonzini { 134049ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1341eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 134249ab747fSPaolo Bonzini uint32_t saddr; 134349ab747fSPaolo Bonzini 134449ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1345eb169c76SMark Cave-Ayland esp_reg_write(s, saddr, val); 134649ab747fSPaolo Bonzini } 134749ab747fSPaolo Bonzini 134849ab747fSPaolo Bonzini static uint64_t sysbus_esp_mem_read(void *opaque, hwaddr addr, 134949ab747fSPaolo Bonzini unsigned int size) 135049ab747fSPaolo Bonzini { 135149ab747fSPaolo Bonzini SysBusESPState *sysbus = opaque; 1352eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 135349ab747fSPaolo Bonzini uint32_t saddr; 135449ab747fSPaolo Bonzini 135549ab747fSPaolo Bonzini saddr = addr >> sysbus->it_shift; 1356eb169c76SMark Cave-Ayland return esp_reg_read(s, saddr); 135749ab747fSPaolo Bonzini } 135849ab747fSPaolo Bonzini 135949ab747fSPaolo Bonzini static const MemoryRegionOps sysbus_esp_mem_ops = { 136049ab747fSPaolo Bonzini .read = sysbus_esp_mem_read, 136149ab747fSPaolo Bonzini .write = sysbus_esp_mem_write, 136249ab747fSPaolo Bonzini .endianness = DEVICE_NATIVE_ENDIAN, 136349ab747fSPaolo Bonzini .valid.accepts = esp_mem_accepts, 136449ab747fSPaolo Bonzini }; 136549ab747fSPaolo Bonzini 136674d71ea1SLaurent Vivier static void sysbus_esp_pdma_write(void *opaque, hwaddr addr, 136774d71ea1SLaurent Vivier uint64_t val, unsigned int size) 136874d71ea1SLaurent Vivier { 136974d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1370eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 137174d71ea1SLaurent Vivier 1372960ebfd9SMark Cave-Ayland trace_esp_pdma_write(size); 1373960ebfd9SMark Cave-Ayland 137474d71ea1SLaurent Vivier switch (size) { 137574d71ea1SLaurent Vivier case 1: 1376761bef75SMark Cave-Ayland esp_pdma_write(s, val); 137774d71ea1SLaurent Vivier break; 137874d71ea1SLaurent Vivier case 2: 1379761bef75SMark Cave-Ayland esp_pdma_write(s, val >> 8); 1380761bef75SMark Cave-Ayland esp_pdma_write(s, val); 138174d71ea1SLaurent Vivier break; 138274d71ea1SLaurent Vivier } 1383b46a43a2SMark Cave-Ayland esp_do_dma(s); 138474d71ea1SLaurent Vivier } 138574d71ea1SLaurent Vivier 138674d71ea1SLaurent Vivier static uint64_t sysbus_esp_pdma_read(void *opaque, hwaddr addr, 138774d71ea1SLaurent Vivier unsigned int size) 138874d71ea1SLaurent Vivier { 138974d71ea1SLaurent Vivier SysBusESPState *sysbus = opaque; 1390eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 139174d71ea1SLaurent Vivier uint64_t val = 0; 139274d71ea1SLaurent Vivier 1393960ebfd9SMark Cave-Ayland trace_esp_pdma_read(size); 1394960ebfd9SMark Cave-Ayland 139574d71ea1SLaurent Vivier switch (size) { 139674d71ea1SLaurent Vivier case 1: 1397761bef75SMark Cave-Ayland val = esp_pdma_read(s); 139874d71ea1SLaurent Vivier break; 139974d71ea1SLaurent Vivier case 2: 1400761bef75SMark Cave-Ayland val = esp_pdma_read(s); 1401761bef75SMark Cave-Ayland val = (val << 8) | esp_pdma_read(s); 140274d71ea1SLaurent Vivier break; 140374d71ea1SLaurent Vivier } 1404b46a43a2SMark Cave-Ayland esp_do_dma(s); 140574d71ea1SLaurent Vivier return val; 140674d71ea1SLaurent Vivier } 140774d71ea1SLaurent Vivier 1408a7a22088SMark Cave-Ayland static void *esp_load_request(QEMUFile *f, SCSIRequest *req) 1409a7a22088SMark Cave-Ayland { 1410a7a22088SMark Cave-Ayland ESPState *s = container_of(req->bus, ESPState, bus); 1411a7a22088SMark Cave-Ayland 1412a7a22088SMark Cave-Ayland scsi_req_ref(req); 1413a7a22088SMark Cave-Ayland s->current_req = req; 1414a7a22088SMark Cave-Ayland return s; 1415a7a22088SMark Cave-Ayland } 1416a7a22088SMark Cave-Ayland 141774d71ea1SLaurent Vivier static const MemoryRegionOps sysbus_esp_pdma_ops = { 141874d71ea1SLaurent Vivier .read = sysbus_esp_pdma_read, 141974d71ea1SLaurent Vivier .write = sysbus_esp_pdma_write, 142074d71ea1SLaurent Vivier .endianness = DEVICE_NATIVE_ENDIAN, 142174d71ea1SLaurent Vivier .valid.min_access_size = 1, 1422cf1b8286SMark Cave-Ayland .valid.max_access_size = 4, 1423cf1b8286SMark Cave-Ayland .impl.min_access_size = 1, 1424cf1b8286SMark Cave-Ayland .impl.max_access_size = 2, 142574d71ea1SLaurent Vivier }; 142674d71ea1SLaurent Vivier 142749ab747fSPaolo Bonzini static const struct SCSIBusInfo esp_scsi_info = { 142849ab747fSPaolo Bonzini .tcq = false, 142949ab747fSPaolo Bonzini .max_target = ESP_MAX_DEVS, 143049ab747fSPaolo Bonzini .max_lun = 7, 143149ab747fSPaolo Bonzini 1432a7a22088SMark Cave-Ayland .load_request = esp_load_request, 143349ab747fSPaolo Bonzini .transfer_data = esp_transfer_data, 143449ab747fSPaolo Bonzini .complete = esp_command_complete, 143549ab747fSPaolo Bonzini .cancel = esp_request_cancelled 143649ab747fSPaolo Bonzini }; 143749ab747fSPaolo Bonzini 143849ab747fSPaolo Bonzini static void sysbus_esp_gpio_demux(void *opaque, int irq, int level) 143949ab747fSPaolo Bonzini { 144084fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(opaque); 1441eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 144249ab747fSPaolo Bonzini 144349ab747fSPaolo Bonzini switch (irq) { 144449ab747fSPaolo Bonzini case 0: 144549ab747fSPaolo Bonzini parent_esp_reset(s, irq, level); 144649ab747fSPaolo Bonzini break; 144749ab747fSPaolo Bonzini case 1: 1448b86dc5cbSMark Cave-Ayland esp_dma_enable(s, irq, level); 144949ab747fSPaolo Bonzini break; 145049ab747fSPaolo Bonzini } 145149ab747fSPaolo Bonzini } 145249ab747fSPaolo Bonzini 1453b09318caSHu Tao static void sysbus_esp_realize(DeviceState *dev, Error **errp) 145449ab747fSPaolo Bonzini { 1455b09318caSHu Tao SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 145684fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1457eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1458eb169c76SMark Cave-Ayland 1459eb169c76SMark Cave-Ayland if (!qdev_realize(DEVICE(s), NULL, errp)) { 1460eb169c76SMark Cave-Ayland return; 1461eb169c76SMark Cave-Ayland } 146249ab747fSPaolo Bonzini 1463b09318caSHu Tao sysbus_init_irq(sbd, &s->irq); 146474d71ea1SLaurent Vivier sysbus_init_irq(sbd, &s->irq_data); 146549ab747fSPaolo Bonzini assert(sysbus->it_shift != -1); 146649ab747fSPaolo Bonzini 146749ab747fSPaolo Bonzini s->chip_id = TCHI_FAS100A; 146829776739SPaolo Bonzini memory_region_init_io(&sysbus->iomem, OBJECT(sysbus), &sysbus_esp_mem_ops, 146974d71ea1SLaurent Vivier sysbus, "esp-regs", ESP_REGS << sysbus->it_shift); 1470b09318caSHu Tao sysbus_init_mmio(sbd, &sysbus->iomem); 147174d71ea1SLaurent Vivier memory_region_init_io(&sysbus->pdma, OBJECT(sysbus), &sysbus_esp_pdma_ops, 1472cf1b8286SMark Cave-Ayland sysbus, "esp-pdma", 4); 147374d71ea1SLaurent Vivier sysbus_init_mmio(sbd, &sysbus->pdma); 147449ab747fSPaolo Bonzini 1475b09318caSHu Tao qdev_init_gpio_in(dev, sysbus_esp_gpio_demux, 2); 147649ab747fSPaolo Bonzini 1477739e95f5SPeter Maydell scsi_bus_init(&s->bus, sizeof(s->bus), dev, &esp_scsi_info); 147849ab747fSPaolo Bonzini } 147949ab747fSPaolo Bonzini 148049ab747fSPaolo Bonzini static void sysbus_esp_hard_reset(DeviceState *dev) 148149ab747fSPaolo Bonzini { 148284fbefedSMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(dev); 1483eb169c76SMark Cave-Ayland ESPState *s = ESP(&sysbus->esp); 1484eb169c76SMark Cave-Ayland 1485eb169c76SMark Cave-Ayland esp_hard_reset(s); 1486eb169c76SMark Cave-Ayland } 1487eb169c76SMark Cave-Ayland 1488eb169c76SMark Cave-Ayland static void sysbus_esp_init(Object *obj) 1489eb169c76SMark Cave-Ayland { 1490eb169c76SMark Cave-Ayland SysBusESPState *sysbus = SYSBUS_ESP(obj); 1491eb169c76SMark Cave-Ayland 1492eb169c76SMark Cave-Ayland object_initialize_child(obj, "esp", &sysbus->esp, TYPE_ESP); 149349ab747fSPaolo Bonzini } 149449ab747fSPaolo Bonzini 149549ab747fSPaolo Bonzini static const VMStateDescription vmstate_sysbus_esp_scsi = { 149649ab747fSPaolo Bonzini .name = "sysbusespscsi", 14970bd005beSMark Cave-Ayland .version_id = 2, 1498ea84a442SGuenter Roeck .minimum_version_id = 1, 1499ff4a1dabSMark Cave-Ayland .pre_save = esp_pre_save, 15002d7b39a6SRichard Henderson .fields = (const VMStateField[]) { 15010bd005beSMark Cave-Ayland VMSTATE_UINT8_V(esp.mig_version_id, SysBusESPState, 2), 150249ab747fSPaolo Bonzini VMSTATE_STRUCT(esp, SysBusESPState, 0, vmstate_esp, ESPState), 150349ab747fSPaolo Bonzini VMSTATE_END_OF_LIST() 150449ab747fSPaolo Bonzini } 150549ab747fSPaolo Bonzini }; 150649ab747fSPaolo Bonzini 150749ab747fSPaolo Bonzini static void sysbus_esp_class_init(ObjectClass *klass, void *data) 150849ab747fSPaolo Bonzini { 150949ab747fSPaolo Bonzini DeviceClass *dc = DEVICE_CLASS(klass); 151049ab747fSPaolo Bonzini 1511b09318caSHu Tao dc->realize = sysbus_esp_realize; 151249ab747fSPaolo Bonzini dc->reset = sysbus_esp_hard_reset; 151349ab747fSPaolo Bonzini dc->vmsd = &vmstate_sysbus_esp_scsi; 1514125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 151549ab747fSPaolo Bonzini } 151649ab747fSPaolo Bonzini 151749ab747fSPaolo Bonzini static const TypeInfo sysbus_esp_info = { 151884fbefedSMark Cave-Ayland .name = TYPE_SYSBUS_ESP, 151949ab747fSPaolo Bonzini .parent = TYPE_SYS_BUS_DEVICE, 1520eb169c76SMark Cave-Ayland .instance_init = sysbus_esp_init, 152149ab747fSPaolo Bonzini .instance_size = sizeof(SysBusESPState), 152249ab747fSPaolo Bonzini .class_init = sysbus_esp_class_init, 152349ab747fSPaolo Bonzini }; 152449ab747fSPaolo Bonzini 1525042879fcSMark Cave-Ayland static void esp_finalize(Object *obj) 1526042879fcSMark Cave-Ayland { 1527042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1528042879fcSMark Cave-Ayland 1529042879fcSMark Cave-Ayland fifo8_destroy(&s->fifo); 1530023666daSMark Cave-Ayland fifo8_destroy(&s->cmdfifo); 1531042879fcSMark Cave-Ayland } 1532042879fcSMark Cave-Ayland 1533042879fcSMark Cave-Ayland static void esp_init(Object *obj) 1534042879fcSMark Cave-Ayland { 1535042879fcSMark Cave-Ayland ESPState *s = ESP(obj); 1536042879fcSMark Cave-Ayland 1537042879fcSMark Cave-Ayland fifo8_create(&s->fifo, ESP_FIFO_SZ); 1538023666daSMark Cave-Ayland fifo8_create(&s->cmdfifo, ESP_CMDFIFO_SZ); 1539042879fcSMark Cave-Ayland } 1540042879fcSMark Cave-Ayland 1541eb169c76SMark Cave-Ayland static void esp_class_init(ObjectClass *klass, void *data) 1542eb169c76SMark Cave-Ayland { 1543eb169c76SMark Cave-Ayland DeviceClass *dc = DEVICE_CLASS(klass); 1544eb169c76SMark Cave-Ayland 1545eb169c76SMark Cave-Ayland /* internal device for sysbusesp/pciespscsi, not user-creatable */ 1546eb169c76SMark Cave-Ayland dc->user_creatable = false; 1547eb169c76SMark Cave-Ayland set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1548eb169c76SMark Cave-Ayland } 1549eb169c76SMark Cave-Ayland 1550eb169c76SMark Cave-Ayland static const TypeInfo esp_info = { 1551eb169c76SMark Cave-Ayland .name = TYPE_ESP, 1552eb169c76SMark Cave-Ayland .parent = TYPE_DEVICE, 1553042879fcSMark Cave-Ayland .instance_init = esp_init, 1554042879fcSMark Cave-Ayland .instance_finalize = esp_finalize, 1555eb169c76SMark Cave-Ayland .instance_size = sizeof(ESPState), 1556eb169c76SMark Cave-Ayland .class_init = esp_class_init, 1557eb169c76SMark Cave-Ayland }; 1558eb169c76SMark Cave-Ayland 155949ab747fSPaolo Bonzini static void esp_register_types(void) 156049ab747fSPaolo Bonzini { 156149ab747fSPaolo Bonzini type_register_static(&sysbus_esp_info); 1562eb169c76SMark Cave-Ayland type_register_static(&esp_info); 156349ab747fSPaolo Bonzini } 156449ab747fSPaolo Bonzini 156549ab747fSPaolo Bonzini type_init(esp_register_types) 1566