1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "exec/memop.h" 21 #include "standard-headers/linux/virtio_pci.h" 22 #include "standard-headers/linux/virtio_ids.h" 23 #include "hw/boards.h" 24 #include "hw/virtio/virtio.h" 25 #include "migration/qemu-file-types.h" 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_bus.h" 28 #include "hw/qdev-properties.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 #include "qemu/log.h" 32 #include "qemu/module.h" 33 #include "hw/pci/msi.h" 34 #include "hw/pci/msix.h" 35 #include "hw/loader.h" 36 #include "sysemu/kvm.h" 37 #include "hw/virtio/virtio-pci.h" 38 #include "qemu/range.h" 39 #include "hw/virtio/virtio-bus.h" 40 #include "qapi/visitor.h" 41 #include "sysemu/replay.h" 42 #include "trace.h" 43 44 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 45 46 #undef VIRTIO_PCI_CONFIG 47 48 /* The remaining space is defined by each driver as the per-driver 49 * configuration space */ 50 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 51 52 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 53 VirtIOPCIProxy *dev); 54 static void virtio_pci_reset(DeviceState *qdev); 55 56 /* virtio device */ 57 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 58 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 59 { 60 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 61 } 62 63 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 64 * be careful and test performance if you change this. 65 */ 66 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 67 { 68 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 69 } 70 71 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 72 { 73 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 74 75 if (msix_enabled(&proxy->pci_dev)) { 76 if (vector != VIRTIO_NO_VECTOR) { 77 msix_notify(&proxy->pci_dev, vector); 78 } 79 } else { 80 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 81 pci_set_irq(&proxy->pci_dev, qatomic_read(&vdev->isr) & 1); 82 } 83 } 84 85 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 86 { 87 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 88 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 89 90 pci_device_save(&proxy->pci_dev, f); 91 msix_save(&proxy->pci_dev, f); 92 if (msix_present(&proxy->pci_dev)) 93 qemu_put_be16(f, vdev->config_vector); 94 } 95 96 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = { 97 .name = "virtio_pci/modern_queue_state", 98 .version_id = 1, 99 .minimum_version_id = 1, 100 .fields = (const VMStateField[]) { 101 VMSTATE_UINT16(num, VirtIOPCIQueue), 102 VMSTATE_UNUSED(1), /* enabled was stored as be16 */ 103 VMSTATE_BOOL(enabled, VirtIOPCIQueue), 104 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2), 105 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2), 106 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2), 107 VMSTATE_END_OF_LIST() 108 } 109 }; 110 111 static bool virtio_pci_modern_state_needed(void *opaque) 112 { 113 VirtIOPCIProxy *proxy = opaque; 114 115 return virtio_pci_modern(proxy); 116 } 117 118 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = { 119 .name = "virtio_pci/modern_state", 120 .version_id = 1, 121 .minimum_version_id = 1, 122 .needed = &virtio_pci_modern_state_needed, 123 .fields = (const VMStateField[]) { 124 VMSTATE_UINT32(dfselect, VirtIOPCIProxy), 125 VMSTATE_UINT32(gfselect, VirtIOPCIProxy), 126 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2), 127 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0, 128 vmstate_virtio_pci_modern_queue_state, 129 VirtIOPCIQueue), 130 VMSTATE_END_OF_LIST() 131 } 132 }; 133 134 static const VMStateDescription vmstate_virtio_pci = { 135 .name = "virtio_pci", 136 .version_id = 1, 137 .minimum_version_id = 1, 138 .fields = (const VMStateField[]) { 139 VMSTATE_END_OF_LIST() 140 }, 141 .subsections = (const VMStateDescription * const []) { 142 &vmstate_virtio_pci_modern_state_sub, 143 NULL 144 } 145 }; 146 147 static bool virtio_pci_has_extra_state(DeviceState *d) 148 { 149 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 150 151 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 152 } 153 154 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 155 { 156 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 157 158 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 159 } 160 161 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 162 { 163 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 164 165 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 166 } 167 168 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 169 { 170 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 171 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 172 173 if (msix_present(&proxy->pci_dev)) 174 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 175 } 176 177 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 178 { 179 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 180 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 181 uint16_t vector; 182 183 int ret; 184 ret = pci_device_load(&proxy->pci_dev, f); 185 if (ret) { 186 return ret; 187 } 188 msix_unuse_all_vectors(&proxy->pci_dev); 189 msix_load(&proxy->pci_dev, f); 190 if (msix_present(&proxy->pci_dev)) { 191 qemu_get_be16s(f, &vector); 192 193 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) { 194 return -EINVAL; 195 } 196 } else { 197 vector = VIRTIO_NO_VECTOR; 198 } 199 vdev->config_vector = vector; 200 if (vector != VIRTIO_NO_VECTOR) { 201 msix_vector_use(&proxy->pci_dev, vector); 202 } 203 return 0; 204 } 205 206 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 207 { 208 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 209 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 210 211 uint16_t vector; 212 if (msix_present(&proxy->pci_dev)) { 213 qemu_get_be16s(f, &vector); 214 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) { 215 return -EINVAL; 216 } 217 } else { 218 vector = VIRTIO_NO_VECTOR; 219 } 220 virtio_queue_set_vector(vdev, n, vector); 221 if (vector != VIRTIO_NO_VECTOR) { 222 msix_vector_use(&proxy->pci_dev, vector); 223 } 224 225 return 0; 226 } 227 228 typedef struct VirtIOPCIIDInfo { 229 /* virtio id */ 230 uint16_t vdev_id; 231 /* pci device id for the transitional device */ 232 uint16_t trans_devid; 233 uint16_t class_id; 234 } VirtIOPCIIDInfo; 235 236 static const VirtIOPCIIDInfo virtio_pci_id_info[] = { 237 { 238 .vdev_id = VIRTIO_ID_CRYPTO, 239 .class_id = PCI_CLASS_OTHERS, 240 }, { 241 .vdev_id = VIRTIO_ID_FS, 242 .class_id = PCI_CLASS_STORAGE_OTHER, 243 }, { 244 .vdev_id = VIRTIO_ID_NET, 245 .trans_devid = PCI_DEVICE_ID_VIRTIO_NET, 246 .class_id = PCI_CLASS_NETWORK_ETHERNET, 247 }, { 248 .vdev_id = VIRTIO_ID_BLOCK, 249 .trans_devid = PCI_DEVICE_ID_VIRTIO_BLOCK, 250 .class_id = PCI_CLASS_STORAGE_SCSI, 251 }, { 252 .vdev_id = VIRTIO_ID_CONSOLE, 253 .trans_devid = PCI_DEVICE_ID_VIRTIO_CONSOLE, 254 .class_id = PCI_CLASS_COMMUNICATION_OTHER, 255 }, { 256 .vdev_id = VIRTIO_ID_SCSI, 257 .trans_devid = PCI_DEVICE_ID_VIRTIO_SCSI, 258 .class_id = PCI_CLASS_STORAGE_SCSI 259 }, { 260 .vdev_id = VIRTIO_ID_9P, 261 .trans_devid = PCI_DEVICE_ID_VIRTIO_9P, 262 .class_id = PCI_BASE_CLASS_NETWORK, 263 }, { 264 .vdev_id = VIRTIO_ID_BALLOON, 265 .trans_devid = PCI_DEVICE_ID_VIRTIO_BALLOON, 266 .class_id = PCI_CLASS_OTHERS, 267 }, { 268 .vdev_id = VIRTIO_ID_RNG, 269 .trans_devid = PCI_DEVICE_ID_VIRTIO_RNG, 270 .class_id = PCI_CLASS_OTHERS, 271 }, 272 }; 273 274 static const VirtIOPCIIDInfo *virtio_pci_get_id_info(uint16_t vdev_id) 275 { 276 const VirtIOPCIIDInfo *info = NULL; 277 int i; 278 279 for (i = 0; i < ARRAY_SIZE(virtio_pci_id_info); i++) { 280 if (virtio_pci_id_info[i].vdev_id == vdev_id) { 281 info = &virtio_pci_id_info[i]; 282 break; 283 } 284 } 285 286 if (!info) { 287 /* The device id is invalid or not added to the id_info yet. */ 288 error_report("Invalid virtio device(id %u)", vdev_id); 289 abort(); 290 } 291 292 return info; 293 } 294 295 /* 296 * Get the Transitional Device ID for the specific device, return 297 * zero if the device is non-transitional. 298 */ 299 uint16_t virtio_pci_get_trans_devid(uint16_t device_id) 300 { 301 return virtio_pci_get_id_info(device_id)->trans_devid; 302 } 303 304 /* 305 * Get the Class ID for the specific device. 306 */ 307 uint16_t virtio_pci_get_class_id(uint16_t device_id) 308 { 309 return virtio_pci_get_id_info(device_id)->class_id; 310 } 311 312 static bool virtio_pci_ioeventfd_enabled(DeviceState *d) 313 { 314 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 315 316 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; 317 } 318 319 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 320 321 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) 322 { 323 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? 324 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; 325 } 326 327 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 328 int n, bool assign) 329 { 330 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 331 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 332 VirtQueue *vq = virtio_get_queue(vdev, n); 333 bool legacy = virtio_pci_legacy(proxy); 334 bool modern = virtio_pci_modern(proxy); 335 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 336 MemoryRegion *modern_mr = &proxy->notify.mr; 337 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 338 MemoryRegion *legacy_mr = &proxy->bar; 339 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * 340 virtio_get_queue_index(vq); 341 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 342 343 if (assign) { 344 if (modern) { 345 memory_region_add_eventfd(modern_mr, modern_addr, 0, 346 false, n, notifier); 347 if (modern_pio) { 348 memory_region_add_eventfd(modern_notify_mr, 0, 2, 349 true, n, notifier); 350 } 351 } 352 if (legacy) { 353 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 354 true, n, notifier); 355 } 356 } else { 357 if (modern) { 358 memory_region_del_eventfd(modern_mr, modern_addr, 0, 359 false, n, notifier); 360 if (modern_pio) { 361 memory_region_del_eventfd(modern_notify_mr, 0, 2, 362 true, n, notifier); 363 } 364 } 365 if (legacy) { 366 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 367 true, n, notifier); 368 } 369 } 370 return 0; 371 } 372 373 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 374 { 375 virtio_bus_start_ioeventfd(&proxy->bus); 376 } 377 378 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 379 { 380 virtio_bus_stop_ioeventfd(&proxy->bus); 381 } 382 383 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 384 { 385 VirtIOPCIProxy *proxy = opaque; 386 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 387 uint16_t vector, vq_idx; 388 hwaddr pa; 389 390 switch (addr) { 391 case VIRTIO_PCI_GUEST_FEATURES: 392 /* Guest does not negotiate properly? We have to assume nothing. */ 393 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 394 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 395 } 396 virtio_set_features(vdev, val); 397 break; 398 case VIRTIO_PCI_QUEUE_PFN: 399 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 400 if (pa == 0) { 401 virtio_pci_reset(DEVICE(proxy)); 402 } 403 else 404 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 405 break; 406 case VIRTIO_PCI_QUEUE_SEL: 407 if (val < VIRTIO_QUEUE_MAX) 408 vdev->queue_sel = val; 409 break; 410 case VIRTIO_PCI_QUEUE_NOTIFY: 411 vq_idx = val; 412 if (vq_idx < VIRTIO_QUEUE_MAX && virtio_queue_get_num(vdev, vq_idx)) { 413 if (virtio_vdev_has_feature(vdev, VIRTIO_F_NOTIFICATION_DATA)) { 414 VirtQueue *vq = virtio_get_queue(vdev, vq_idx); 415 416 virtio_queue_set_shadow_avail_idx(vq, val >> 16); 417 } 418 virtio_queue_notify(vdev, vq_idx); 419 } 420 break; 421 case VIRTIO_PCI_STATUS: 422 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 423 virtio_pci_stop_ioeventfd(proxy); 424 } 425 426 virtio_set_status(vdev, val & 0xFF); 427 428 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 429 virtio_pci_start_ioeventfd(proxy); 430 } 431 432 if (vdev->status == 0) { 433 virtio_pci_reset(DEVICE(proxy)); 434 } 435 436 /* Linux before 2.6.34 drives the device without enabling 437 the PCI device bus master bit. Enable it automatically 438 for the guest. This is a PCI spec violation but so is 439 initiating DMA with bus master bit clear. */ 440 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 441 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 442 proxy->pci_dev.config[PCI_COMMAND] | 443 PCI_COMMAND_MASTER, 1); 444 } 445 break; 446 case VIRTIO_MSI_CONFIG_VECTOR: 447 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 448 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 449 } 450 /* Make it possible for guest to discover an error took place. */ 451 if (val < proxy->nvectors) { 452 msix_vector_use(&proxy->pci_dev, val); 453 } else { 454 val = VIRTIO_NO_VECTOR; 455 } 456 vdev->config_vector = val; 457 break; 458 case VIRTIO_MSI_QUEUE_VECTOR: 459 vector = virtio_queue_vector(vdev, vdev->queue_sel); 460 if (vector != VIRTIO_NO_VECTOR) { 461 msix_vector_unuse(&proxy->pci_dev, vector); 462 } 463 /* Make it possible for guest to discover an error took place. */ 464 if (val < proxy->nvectors) { 465 msix_vector_use(&proxy->pci_dev, val); 466 } else { 467 val = VIRTIO_NO_VECTOR; 468 } 469 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 470 break; 471 default: 472 qemu_log_mask(LOG_GUEST_ERROR, 473 "%s: unexpected address 0x%x value 0x%x\n", 474 __func__, addr, val); 475 break; 476 } 477 } 478 479 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 480 { 481 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 482 uint32_t ret = 0xFFFFFFFF; 483 484 switch (addr) { 485 case VIRTIO_PCI_HOST_FEATURES: 486 ret = vdev->host_features; 487 break; 488 case VIRTIO_PCI_GUEST_FEATURES: 489 ret = vdev->guest_features; 490 break; 491 case VIRTIO_PCI_QUEUE_PFN: 492 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 493 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 494 break; 495 case VIRTIO_PCI_QUEUE_NUM: 496 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 497 break; 498 case VIRTIO_PCI_QUEUE_SEL: 499 ret = vdev->queue_sel; 500 break; 501 case VIRTIO_PCI_STATUS: 502 ret = vdev->status; 503 break; 504 case VIRTIO_PCI_ISR: 505 /* reading from the ISR also clears it. */ 506 ret = qatomic_xchg(&vdev->isr, 0); 507 pci_irq_deassert(&proxy->pci_dev); 508 break; 509 case VIRTIO_MSI_CONFIG_VECTOR: 510 ret = vdev->config_vector; 511 break; 512 case VIRTIO_MSI_QUEUE_VECTOR: 513 ret = virtio_queue_vector(vdev, vdev->queue_sel); 514 break; 515 default: 516 break; 517 } 518 519 return ret; 520 } 521 522 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 523 unsigned size) 524 { 525 VirtIOPCIProxy *proxy = opaque; 526 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 527 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 528 uint64_t val = 0; 529 530 if (vdev == NULL) { 531 return UINT64_MAX; 532 } 533 534 if (addr < config) { 535 return virtio_ioport_read(proxy, addr); 536 } 537 addr -= config; 538 539 switch (size) { 540 case 1: 541 val = virtio_config_readb(vdev, addr); 542 break; 543 case 2: 544 val = virtio_config_readw(vdev, addr); 545 if (virtio_is_big_endian(vdev)) { 546 val = bswap16(val); 547 } 548 break; 549 case 4: 550 val = virtio_config_readl(vdev, addr); 551 if (virtio_is_big_endian(vdev)) { 552 val = bswap32(val); 553 } 554 break; 555 } 556 return val; 557 } 558 559 static void virtio_pci_config_write(void *opaque, hwaddr addr, 560 uint64_t val, unsigned size) 561 { 562 VirtIOPCIProxy *proxy = opaque; 563 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 564 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 565 566 if (vdev == NULL) { 567 return; 568 } 569 570 if (addr < config) { 571 virtio_ioport_write(proxy, addr, val); 572 return; 573 } 574 addr -= config; 575 /* 576 * Virtio-PCI is odd. Ioports are LE but config space is target native 577 * endian. 578 */ 579 switch (size) { 580 case 1: 581 virtio_config_writeb(vdev, addr, val); 582 break; 583 case 2: 584 if (virtio_is_big_endian(vdev)) { 585 val = bswap16(val); 586 } 587 virtio_config_writew(vdev, addr, val); 588 break; 589 case 4: 590 if (virtio_is_big_endian(vdev)) { 591 val = bswap32(val); 592 } 593 virtio_config_writel(vdev, addr, val); 594 break; 595 } 596 } 597 598 static const MemoryRegionOps virtio_pci_config_ops = { 599 .read = virtio_pci_config_read, 600 .write = virtio_pci_config_write, 601 .impl = { 602 .min_access_size = 1, 603 .max_access_size = 4, 604 }, 605 .endianness = DEVICE_LITTLE_ENDIAN, 606 }; 607 608 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy, 609 hwaddr *off, int len) 610 { 611 int i; 612 VirtIOPCIRegion *reg; 613 614 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) { 615 reg = &proxy->regs[i]; 616 if (*off >= reg->offset && 617 *off + len <= reg->offset + reg->size) { 618 *off -= reg->offset; 619 return ®->mr; 620 } 621 } 622 623 return NULL; 624 } 625 626 /* Below are generic functions to do memcpy from/to an address space, 627 * without byteswaps, with input validation. 628 * 629 * As regular address_space_* APIs all do some kind of byteswap at least for 630 * some host/target combinations, we are forced to explicitly convert to a 631 * known-endianness integer value. 632 * It doesn't really matter which endian format to go through, so the code 633 * below selects the endian that causes the least amount of work on the given 634 * host. 635 * 636 * Note: host pointer must be aligned. 637 */ 638 static 639 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr, 640 const uint8_t *buf, int len) 641 { 642 uint64_t val; 643 MemoryRegion *mr; 644 645 /* address_space_* APIs assume an aligned address. 646 * As address is under guest control, handle illegal values. 647 */ 648 addr &= ~(len - 1); 649 650 mr = virtio_address_space_lookup(proxy, &addr, len); 651 if (!mr) { 652 return; 653 } 654 655 /* Make sure caller aligned buf properly */ 656 assert(!(((uintptr_t)buf) & (len - 1))); 657 658 switch (len) { 659 case 1: 660 val = pci_get_byte(buf); 661 break; 662 case 2: 663 val = pci_get_word(buf); 664 break; 665 case 4: 666 val = pci_get_long(buf); 667 break; 668 default: 669 /* As length is under guest control, handle illegal values. */ 670 return; 671 } 672 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE, 673 MEMTXATTRS_UNSPECIFIED); 674 } 675 676 static void 677 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr, 678 uint8_t *buf, int len) 679 { 680 uint64_t val; 681 MemoryRegion *mr; 682 683 /* address_space_* APIs assume an aligned address. 684 * As address is under guest control, handle illegal values. 685 */ 686 addr &= ~(len - 1); 687 688 mr = virtio_address_space_lookup(proxy, &addr, len); 689 if (!mr) { 690 return; 691 } 692 693 /* Make sure caller aligned buf properly */ 694 assert(!(((uintptr_t)buf) & (len - 1))); 695 696 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE, 697 MEMTXATTRS_UNSPECIFIED); 698 switch (len) { 699 case 1: 700 pci_set_byte(buf, val); 701 break; 702 case 2: 703 pci_set_word(buf, val); 704 break; 705 case 4: 706 pci_set_long(buf, val); 707 break; 708 default: 709 /* As length is under guest control, handle illegal values. */ 710 break; 711 } 712 } 713 714 static void virtio_pci_ats_ctrl_trigger(PCIDevice *pci_dev, bool enable) 715 { 716 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 717 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 718 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 719 720 vdev->device_iotlb_enabled = enable; 721 722 if (k->toggle_device_iotlb) { 723 k->toggle_device_iotlb(vdev); 724 } 725 } 726 727 static void pcie_ats_config_write(PCIDevice *dev, uint32_t address, 728 uint32_t val, int len) 729 { 730 uint32_t off; 731 uint16_t ats_cap = dev->exp.ats_cap; 732 733 if (!ats_cap || address < ats_cap) { 734 return; 735 } 736 off = address - ats_cap; 737 if (off >= PCI_EXT_CAP_ATS_SIZEOF) { 738 return; 739 } 740 741 if (range_covers_byte(off, len, PCI_ATS_CTRL + 1)) { 742 virtio_pci_ats_ctrl_trigger(dev, !!(val & PCI_ATS_CTRL_ENABLE)); 743 } 744 } 745 746 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 747 uint32_t val, int len) 748 { 749 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 750 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 751 struct virtio_pci_cfg_cap *cfg; 752 753 pci_default_write_config(pci_dev, address, val, len); 754 755 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { 756 pcie_cap_flr_write_config(pci_dev, address, val, len); 757 } 758 759 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 760 pcie_ats_config_write(pci_dev, address, val, len); 761 } 762 763 if (range_covers_byte(address, len, PCI_COMMAND)) { 764 if (!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 765 virtio_set_disabled(vdev, true); 766 virtio_pci_stop_ioeventfd(proxy); 767 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 768 } else { 769 virtio_set_disabled(vdev, false); 770 } 771 } 772 773 if (proxy->config_cap && 774 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 775 pci_cfg_data), 776 sizeof cfg->pci_cfg_data)) { 777 uint32_t off; 778 uint32_t caplen; 779 780 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 781 off = le32_to_cpu(cfg->cap.offset); 782 caplen = le32_to_cpu(cfg->cap.length); 783 784 if (caplen == 1 || caplen == 2 || caplen == 4) { 785 assert(caplen <= sizeof cfg->pci_cfg_data); 786 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, caplen); 787 } 788 } 789 } 790 791 static uint32_t virtio_read_config(PCIDevice *pci_dev, 792 uint32_t address, int len) 793 { 794 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 795 struct virtio_pci_cfg_cap *cfg; 796 797 if (proxy->config_cap && 798 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 799 pci_cfg_data), 800 sizeof cfg->pci_cfg_data)) { 801 uint32_t off; 802 uint32_t caplen; 803 804 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 805 off = le32_to_cpu(cfg->cap.offset); 806 caplen = le32_to_cpu(cfg->cap.length); 807 808 if (caplen == 1 || caplen == 2 || caplen == 4) { 809 assert(caplen <= sizeof cfg->pci_cfg_data); 810 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, caplen); 811 } 812 } 813 814 return pci_default_read_config(pci_dev, address, len); 815 } 816 817 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 818 unsigned int vector) 819 { 820 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 821 int ret; 822 823 if (irqfd->users == 0) { 824 KVMRouteChange c = kvm_irqchip_begin_route_changes(kvm_state); 825 ret = kvm_irqchip_add_msi_route(&c, vector, &proxy->pci_dev); 826 if (ret < 0) { 827 return ret; 828 } 829 kvm_irqchip_commit_route_changes(&c); 830 irqfd->virq = ret; 831 } 832 irqfd->users++; 833 return 0; 834 } 835 836 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 837 unsigned int vector) 838 { 839 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 840 if (--irqfd->users == 0) { 841 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 842 } 843 } 844 845 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 846 EventNotifier *n, 847 unsigned int vector) 848 { 849 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 850 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 851 } 852 853 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 854 EventNotifier *n , 855 unsigned int vector) 856 { 857 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 858 int ret; 859 860 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 861 assert(ret == 0); 862 } 863 static int virtio_pci_get_notifier(VirtIOPCIProxy *proxy, int queue_no, 864 EventNotifier **n, unsigned int *vector) 865 { 866 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 867 VirtQueue *vq; 868 869 if (queue_no == VIRTIO_CONFIG_IRQ_IDX) { 870 *n = virtio_config_get_guest_notifier(vdev); 871 *vector = vdev->config_vector; 872 } else { 873 if (!virtio_queue_get_num(vdev, queue_no)) { 874 return -1; 875 } 876 *vector = virtio_queue_vector(vdev, queue_no); 877 vq = virtio_get_queue(vdev, queue_no); 878 *n = virtio_queue_get_guest_notifier(vq); 879 } 880 return 0; 881 } 882 883 static int kvm_virtio_pci_vector_use_one(VirtIOPCIProxy *proxy, int queue_no) 884 { 885 unsigned int vector; 886 int ret; 887 EventNotifier *n; 888 PCIDevice *dev = &proxy->pci_dev; 889 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 890 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 891 892 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector); 893 if (ret < 0) { 894 return ret; 895 } 896 if (vector >= msix_nr_vectors_allocated(dev)) { 897 return 0; 898 } 899 ret = kvm_virtio_pci_vq_vector_use(proxy, vector); 900 if (ret < 0) { 901 return ret; 902 } 903 /* 904 * If guest supports masking, set up irqfd now. 905 * Otherwise, delay until unmasked in the frontend. 906 */ 907 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 908 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector); 909 if (ret < 0) { 910 kvm_virtio_pci_vq_vector_release(proxy, vector); 911 return ret; 912 } 913 } 914 915 return 0; 916 } 917 static int kvm_virtio_pci_vector_vq_use(VirtIOPCIProxy *proxy, int nvqs) 918 { 919 int queue_no; 920 int ret = 0; 921 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 922 923 for (queue_no = 0; queue_no < nvqs; queue_no++) { 924 if (!virtio_queue_get_num(vdev, queue_no)) { 925 return -1; 926 } 927 ret = kvm_virtio_pci_vector_use_one(proxy, queue_no); 928 } 929 return ret; 930 } 931 932 static int kvm_virtio_pci_vector_config_use(VirtIOPCIProxy *proxy) 933 { 934 return kvm_virtio_pci_vector_use_one(proxy, VIRTIO_CONFIG_IRQ_IDX); 935 } 936 937 static void kvm_virtio_pci_vector_release_one(VirtIOPCIProxy *proxy, 938 int queue_no) 939 { 940 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 941 unsigned int vector; 942 EventNotifier *n; 943 int ret; 944 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 945 PCIDevice *dev = &proxy->pci_dev; 946 947 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector); 948 if (ret < 0) { 949 return; 950 } 951 if (vector >= msix_nr_vectors_allocated(dev)) { 952 return; 953 } 954 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 955 kvm_virtio_pci_irqfd_release(proxy, n, vector); 956 } 957 kvm_virtio_pci_vq_vector_release(proxy, vector); 958 } 959 960 static void kvm_virtio_pci_vector_vq_release(VirtIOPCIProxy *proxy, int nvqs) 961 { 962 int queue_no; 963 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 964 965 for (queue_no = 0; queue_no < nvqs; queue_no++) { 966 if (!virtio_queue_get_num(vdev, queue_no)) { 967 break; 968 } 969 kvm_virtio_pci_vector_release_one(proxy, queue_no); 970 } 971 } 972 973 static void kvm_virtio_pci_vector_config_release(VirtIOPCIProxy *proxy) 974 { 975 kvm_virtio_pci_vector_release_one(proxy, VIRTIO_CONFIG_IRQ_IDX); 976 } 977 978 static int virtio_pci_one_vector_unmask(VirtIOPCIProxy *proxy, 979 unsigned int queue_no, 980 unsigned int vector, 981 MSIMessage msg, 982 EventNotifier *n) 983 { 984 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 985 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 986 VirtIOIRQFD *irqfd; 987 int ret = 0; 988 989 if (proxy->vector_irqfd) { 990 irqfd = &proxy->vector_irqfd[vector]; 991 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 992 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 993 &proxy->pci_dev); 994 if (ret < 0) { 995 return ret; 996 } 997 kvm_irqchip_commit_routes(kvm_state); 998 } 999 } 1000 1001 /* If guest supports masking, irqfd is already setup, unmask it. 1002 * Otherwise, set it up now. 1003 */ 1004 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 1005 k->guest_notifier_mask(vdev, queue_no, false); 1006 /* Test after unmasking to avoid losing events. */ 1007 if (k->guest_notifier_pending && 1008 k->guest_notifier_pending(vdev, queue_no)) { 1009 event_notifier_set(n); 1010 } 1011 } else { 1012 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector); 1013 } 1014 return ret; 1015 } 1016 1017 static void virtio_pci_one_vector_mask(VirtIOPCIProxy *proxy, 1018 unsigned int queue_no, 1019 unsigned int vector, 1020 EventNotifier *n) 1021 { 1022 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1023 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1024 1025 /* If guest supports masking, keep irqfd but mask it. 1026 * Otherwise, clean it up now. 1027 */ 1028 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 1029 k->guest_notifier_mask(vdev, queue_no, true); 1030 } else { 1031 kvm_virtio_pci_irqfd_release(proxy, n, vector); 1032 } 1033 } 1034 1035 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 1036 MSIMessage msg) 1037 { 1038 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 1039 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1040 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 1041 EventNotifier *n; 1042 int ret, index, unmasked = 0; 1043 1044 while (vq) { 1045 index = virtio_get_queue_index(vq); 1046 if (!virtio_queue_get_num(vdev, index)) { 1047 break; 1048 } 1049 if (index < proxy->nvqs_with_notifiers) { 1050 n = virtio_queue_get_guest_notifier(vq); 1051 ret = virtio_pci_one_vector_unmask(proxy, index, vector, msg, n); 1052 if (ret < 0) { 1053 goto undo; 1054 } 1055 ++unmasked; 1056 } 1057 vq = virtio_vector_next_queue(vq); 1058 } 1059 /* unmask config intr */ 1060 if (vector == vdev->config_vector) { 1061 n = virtio_config_get_guest_notifier(vdev); 1062 ret = virtio_pci_one_vector_unmask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, 1063 msg, n); 1064 if (ret < 0) { 1065 goto undo_config; 1066 } 1067 } 1068 return 0; 1069 undo_config: 1070 n = virtio_config_get_guest_notifier(vdev); 1071 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n); 1072 undo: 1073 vq = virtio_vector_first_queue(vdev, vector); 1074 while (vq && unmasked >= 0) { 1075 index = virtio_get_queue_index(vq); 1076 if (index < proxy->nvqs_with_notifiers) { 1077 n = virtio_queue_get_guest_notifier(vq); 1078 virtio_pci_one_vector_mask(proxy, index, vector, n); 1079 --unmasked; 1080 } 1081 vq = virtio_vector_next_queue(vq); 1082 } 1083 return ret; 1084 } 1085 1086 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 1087 { 1088 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 1089 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1090 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 1091 EventNotifier *n; 1092 int index; 1093 1094 while (vq) { 1095 index = virtio_get_queue_index(vq); 1096 n = virtio_queue_get_guest_notifier(vq); 1097 if (!virtio_queue_get_num(vdev, index)) { 1098 break; 1099 } 1100 if (index < proxy->nvqs_with_notifiers) { 1101 virtio_pci_one_vector_mask(proxy, index, vector, n); 1102 } 1103 vq = virtio_vector_next_queue(vq); 1104 } 1105 1106 if (vector == vdev->config_vector) { 1107 n = virtio_config_get_guest_notifier(vdev); 1108 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n); 1109 } 1110 } 1111 1112 static void virtio_pci_vector_poll(PCIDevice *dev, 1113 unsigned int vector_start, 1114 unsigned int vector_end) 1115 { 1116 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 1117 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1118 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1119 int queue_no; 1120 unsigned int vector; 1121 EventNotifier *notifier; 1122 int ret; 1123 1124 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 1125 ret = virtio_pci_get_notifier(proxy, queue_no, ¬ifier, &vector); 1126 if (ret < 0) { 1127 break; 1128 } 1129 if (vector < vector_start || vector >= vector_end || 1130 !msix_is_masked(dev, vector)) { 1131 continue; 1132 } 1133 if (k->guest_notifier_pending) { 1134 if (k->guest_notifier_pending(vdev, queue_no)) { 1135 msix_set_pending(dev, vector); 1136 } 1137 } else if (event_notifier_test_and_clear(notifier)) { 1138 msix_set_pending(dev, vector); 1139 } 1140 } 1141 /* poll the config intr */ 1142 ret = virtio_pci_get_notifier(proxy, VIRTIO_CONFIG_IRQ_IDX, ¬ifier, 1143 &vector); 1144 if (ret < 0) { 1145 return; 1146 } 1147 if (vector < vector_start || vector >= vector_end || 1148 !msix_is_masked(dev, vector)) { 1149 return; 1150 } 1151 if (k->guest_notifier_pending) { 1152 if (k->guest_notifier_pending(vdev, VIRTIO_CONFIG_IRQ_IDX)) { 1153 msix_set_pending(dev, vector); 1154 } 1155 } else if (event_notifier_test_and_clear(notifier)) { 1156 msix_set_pending(dev, vector); 1157 } 1158 } 1159 1160 void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueue *vq, 1161 int n, bool assign, 1162 bool with_irqfd) 1163 { 1164 if (n == VIRTIO_CONFIG_IRQ_IDX) { 1165 virtio_config_set_guest_notifier_fd_handler(vdev, assign, with_irqfd); 1166 } else { 1167 virtio_queue_set_guest_notifier_fd_handler(vq, assign, with_irqfd); 1168 } 1169 } 1170 1171 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 1172 bool with_irqfd) 1173 { 1174 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1175 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1176 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1177 VirtQueue *vq = NULL; 1178 EventNotifier *notifier = NULL; 1179 1180 if (n == VIRTIO_CONFIG_IRQ_IDX) { 1181 notifier = virtio_config_get_guest_notifier(vdev); 1182 } else { 1183 vq = virtio_get_queue(vdev, n); 1184 notifier = virtio_queue_get_guest_notifier(vq); 1185 } 1186 1187 if (assign) { 1188 int r = event_notifier_init(notifier, 0); 1189 if (r < 0) { 1190 return r; 1191 } 1192 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, true, with_irqfd); 1193 } else { 1194 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, false, 1195 with_irqfd); 1196 event_notifier_cleanup(notifier); 1197 } 1198 1199 if (!msix_enabled(&proxy->pci_dev) && 1200 vdev->use_guest_notifier_mask && 1201 vdc->guest_notifier_mask) { 1202 vdc->guest_notifier_mask(vdev, n, !assign); 1203 } 1204 1205 return 0; 1206 } 1207 1208 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 1209 { 1210 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1211 return msix_enabled(&proxy->pci_dev); 1212 } 1213 1214 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 1215 { 1216 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1217 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1218 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1219 int r, n; 1220 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 1221 kvm_msi_via_irqfd_enabled(); 1222 1223 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 1224 1225 /* 1226 * When deassigning, pass a consistent nvqs value to avoid leaking 1227 * notifiers. But first check we've actually been configured, exit 1228 * early if we haven't. 1229 */ 1230 if (!assign && !proxy->nvqs_with_notifiers) { 1231 return 0; 1232 } 1233 assert(assign || nvqs == proxy->nvqs_with_notifiers); 1234 1235 proxy->nvqs_with_notifiers = nvqs; 1236 1237 /* Must unset vector notifier while guest notifier is still assigned */ 1238 if ((proxy->vector_irqfd || 1239 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) && 1240 !assign) { 1241 msix_unset_vector_notifiers(&proxy->pci_dev); 1242 if (proxy->vector_irqfd) { 1243 kvm_virtio_pci_vector_vq_release(proxy, nvqs); 1244 kvm_virtio_pci_vector_config_release(proxy); 1245 g_free(proxy->vector_irqfd); 1246 proxy->vector_irqfd = NULL; 1247 } 1248 } 1249 1250 for (n = 0; n < nvqs; n++) { 1251 if (!virtio_queue_get_num(vdev, n)) { 1252 break; 1253 } 1254 1255 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 1256 if (r < 0) { 1257 goto assign_error; 1258 } 1259 } 1260 r = virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, assign, 1261 with_irqfd); 1262 if (r < 0) { 1263 goto config_assign_error; 1264 } 1265 /* Must set vector notifier after guest notifier has been assigned */ 1266 if ((with_irqfd || 1267 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) && 1268 assign) { 1269 if (with_irqfd) { 1270 proxy->vector_irqfd = 1271 g_malloc0(sizeof(*proxy->vector_irqfd) * 1272 msix_nr_vectors_allocated(&proxy->pci_dev)); 1273 r = kvm_virtio_pci_vector_vq_use(proxy, nvqs); 1274 if (r < 0) { 1275 goto config_assign_error; 1276 } 1277 r = kvm_virtio_pci_vector_config_use(proxy); 1278 if (r < 0) { 1279 goto config_error; 1280 } 1281 } 1282 1283 r = msix_set_vector_notifiers(&proxy->pci_dev, virtio_pci_vector_unmask, 1284 virtio_pci_vector_mask, 1285 virtio_pci_vector_poll); 1286 if (r < 0) { 1287 goto notifiers_error; 1288 } 1289 } 1290 1291 return 0; 1292 1293 notifiers_error: 1294 if (with_irqfd) { 1295 assert(assign); 1296 kvm_virtio_pci_vector_vq_release(proxy, nvqs); 1297 } 1298 config_error: 1299 if (with_irqfd) { 1300 kvm_virtio_pci_vector_config_release(proxy); 1301 } 1302 config_assign_error: 1303 virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, !assign, 1304 with_irqfd); 1305 assign_error: 1306 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1307 assert(assign); 1308 while (--n >= 0) { 1309 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1310 } 1311 g_free(proxy->vector_irqfd); 1312 proxy->vector_irqfd = NULL; 1313 return r; 1314 } 1315 1316 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n, 1317 MemoryRegion *mr, bool assign) 1318 { 1319 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1320 int offset; 1321 1322 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) || 1323 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) { 1324 return -1; 1325 } 1326 1327 if (assign) { 1328 offset = virtio_pci_queue_mem_mult(proxy) * n; 1329 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1); 1330 } else { 1331 memory_region_del_subregion(&proxy->notify.mr, mr); 1332 } 1333 1334 return 0; 1335 } 1336 1337 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1338 { 1339 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1340 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1341 1342 if (running) { 1343 /* Old QEMU versions did not set bus master enable on status write. 1344 * Detect DRIVER set and enable it. 1345 */ 1346 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1347 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1348 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1349 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1350 proxy->pci_dev.config[PCI_COMMAND] | 1351 PCI_COMMAND_MASTER, 1); 1352 } 1353 virtio_pci_start_ioeventfd(proxy); 1354 } else { 1355 virtio_pci_stop_ioeventfd(proxy); 1356 } 1357 } 1358 1359 /* 1360 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1361 */ 1362 1363 static int virtio_pci_query_nvectors(DeviceState *d) 1364 { 1365 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1366 1367 return proxy->nvectors; 1368 } 1369 1370 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d) 1371 { 1372 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1373 PCIDevice *dev = &proxy->pci_dev; 1374 1375 return pci_get_address_space(dev); 1376 } 1377 1378 static bool virtio_pci_iommu_enabled(DeviceState *d) 1379 { 1380 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1381 PCIDevice *dev = &proxy->pci_dev; 1382 AddressSpace *dma_as = pci_device_iommu_address_space(dev); 1383 1384 if (dma_as == &address_space_memory) { 1385 return false; 1386 } 1387 1388 return true; 1389 } 1390 1391 static bool virtio_pci_queue_enabled(DeviceState *d, int n) 1392 { 1393 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1394 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1395 1396 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) { 1397 return proxy->vqs[n].enabled; 1398 } 1399 1400 return virtio_queue_enabled_legacy(vdev, n); 1401 } 1402 1403 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1404 struct virtio_pci_cap *cap) 1405 { 1406 PCIDevice *dev = &proxy->pci_dev; 1407 int offset; 1408 1409 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, 1410 cap->cap_len, &error_abort); 1411 1412 assert(cap->cap_len >= sizeof *cap); 1413 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1414 cap->cap_len - PCI_CAP_FLAGS); 1415 1416 return offset; 1417 } 1418 1419 static void virtio_pci_set_vector(VirtIODevice *vdev, 1420 VirtIOPCIProxy *proxy, 1421 int queue_no, uint16_t old_vector, 1422 uint16_t new_vector) 1423 { 1424 bool kvm_irqfd = (vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) && 1425 msix_enabled(&proxy->pci_dev) && kvm_msi_via_irqfd_enabled(); 1426 1427 if (new_vector == old_vector) { 1428 return; 1429 } 1430 1431 /* 1432 * If the device uses irqfd and the vector changes after DRIVER_OK is 1433 * set, we need to release the old vector and set up the new one. 1434 * Otherwise just need to set the new vector on the device. 1435 */ 1436 if (kvm_irqfd && old_vector != VIRTIO_NO_VECTOR) { 1437 kvm_virtio_pci_vector_release_one(proxy, queue_no); 1438 } 1439 /* Set the new vector on the device. */ 1440 if (queue_no == VIRTIO_CONFIG_IRQ_IDX) { 1441 vdev->config_vector = new_vector; 1442 } else { 1443 virtio_queue_set_vector(vdev, queue_no, new_vector); 1444 } 1445 /* If the new vector changed need to set it up. */ 1446 if (kvm_irqfd && new_vector != VIRTIO_NO_VECTOR) { 1447 kvm_virtio_pci_vector_use_one(proxy, queue_no); 1448 } 1449 } 1450 1451 int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, 1452 uint8_t bar, uint64_t offset, uint64_t length, 1453 uint8_t id) 1454 { 1455 struct virtio_pci_cap64 cap = { 1456 .cap.cap_len = sizeof cap, 1457 .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, 1458 }; 1459 1460 cap.cap.bar = bar; 1461 cap.cap.length = cpu_to_le32(length); 1462 cap.length_hi = cpu_to_le32(length >> 32); 1463 cap.cap.offset = cpu_to_le32(offset); 1464 cap.offset_hi = cpu_to_le32(offset >> 32); 1465 cap.cap.id = id; 1466 return virtio_pci_add_mem_cap(proxy, &cap.cap); 1467 } 1468 1469 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1470 unsigned size) 1471 { 1472 VirtIOPCIProxy *proxy = opaque; 1473 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1474 uint32_t val = 0; 1475 int i; 1476 1477 if (vdev == NULL) { 1478 return UINT64_MAX; 1479 } 1480 1481 switch (addr) { 1482 case VIRTIO_PCI_COMMON_DFSELECT: 1483 val = proxy->dfselect; 1484 break; 1485 case VIRTIO_PCI_COMMON_DF: 1486 if (proxy->dfselect <= 1) { 1487 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1488 1489 val = (vdev->host_features & ~vdc->legacy_features) >> 1490 (32 * proxy->dfselect); 1491 } 1492 break; 1493 case VIRTIO_PCI_COMMON_GFSELECT: 1494 val = proxy->gfselect; 1495 break; 1496 case VIRTIO_PCI_COMMON_GF: 1497 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1498 val = proxy->guest_features[proxy->gfselect]; 1499 } 1500 break; 1501 case VIRTIO_PCI_COMMON_MSIX: 1502 val = vdev->config_vector; 1503 break; 1504 case VIRTIO_PCI_COMMON_NUMQ: 1505 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1506 if (virtio_queue_get_num(vdev, i)) { 1507 val = i + 1; 1508 } 1509 } 1510 break; 1511 case VIRTIO_PCI_COMMON_STATUS: 1512 val = vdev->status; 1513 break; 1514 case VIRTIO_PCI_COMMON_CFGGENERATION: 1515 val = vdev->generation; 1516 break; 1517 case VIRTIO_PCI_COMMON_Q_SELECT: 1518 val = vdev->queue_sel; 1519 break; 1520 case VIRTIO_PCI_COMMON_Q_SIZE: 1521 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1522 break; 1523 case VIRTIO_PCI_COMMON_Q_MSIX: 1524 val = virtio_queue_vector(vdev, vdev->queue_sel); 1525 break; 1526 case VIRTIO_PCI_COMMON_Q_ENABLE: 1527 val = proxy->vqs[vdev->queue_sel].enabled; 1528 break; 1529 case VIRTIO_PCI_COMMON_Q_NOFF: 1530 /* Simply map queues in order */ 1531 val = vdev->queue_sel; 1532 break; 1533 case VIRTIO_PCI_COMMON_Q_DESCLO: 1534 val = proxy->vqs[vdev->queue_sel].desc[0]; 1535 break; 1536 case VIRTIO_PCI_COMMON_Q_DESCHI: 1537 val = proxy->vqs[vdev->queue_sel].desc[1]; 1538 break; 1539 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1540 val = proxy->vqs[vdev->queue_sel].avail[0]; 1541 break; 1542 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1543 val = proxy->vqs[vdev->queue_sel].avail[1]; 1544 break; 1545 case VIRTIO_PCI_COMMON_Q_USEDLO: 1546 val = proxy->vqs[vdev->queue_sel].used[0]; 1547 break; 1548 case VIRTIO_PCI_COMMON_Q_USEDHI: 1549 val = proxy->vqs[vdev->queue_sel].used[1]; 1550 break; 1551 case VIRTIO_PCI_COMMON_Q_RESET: 1552 val = proxy->vqs[vdev->queue_sel].reset; 1553 break; 1554 default: 1555 val = 0; 1556 } 1557 1558 return val; 1559 } 1560 1561 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1562 uint64_t val, unsigned size) 1563 { 1564 VirtIOPCIProxy *proxy = opaque; 1565 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1566 uint16_t vector; 1567 1568 if (vdev == NULL) { 1569 return; 1570 } 1571 1572 switch (addr) { 1573 case VIRTIO_PCI_COMMON_DFSELECT: 1574 proxy->dfselect = val; 1575 break; 1576 case VIRTIO_PCI_COMMON_GFSELECT: 1577 proxy->gfselect = val; 1578 break; 1579 case VIRTIO_PCI_COMMON_GF: 1580 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1581 proxy->guest_features[proxy->gfselect] = val; 1582 virtio_set_features(vdev, 1583 (((uint64_t)proxy->guest_features[1]) << 32) | 1584 proxy->guest_features[0]); 1585 } 1586 break; 1587 case VIRTIO_PCI_COMMON_MSIX: 1588 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 1589 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1590 } 1591 /* Make it possible for guest to discover an error took place. */ 1592 if (val < proxy->nvectors) { 1593 msix_vector_use(&proxy->pci_dev, val); 1594 } else { 1595 val = VIRTIO_NO_VECTOR; 1596 } 1597 virtio_pci_set_vector(vdev, proxy, VIRTIO_CONFIG_IRQ_IDX, 1598 vdev->config_vector, val); 1599 break; 1600 case VIRTIO_PCI_COMMON_STATUS: 1601 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1602 virtio_pci_stop_ioeventfd(proxy); 1603 } 1604 1605 virtio_set_status(vdev, val & 0xFF); 1606 1607 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1608 virtio_pci_start_ioeventfd(proxy); 1609 } 1610 1611 if (vdev->status == 0) { 1612 virtio_pci_reset(DEVICE(proxy)); 1613 } 1614 1615 break; 1616 case VIRTIO_PCI_COMMON_Q_SELECT: 1617 if (val < VIRTIO_QUEUE_MAX) { 1618 vdev->queue_sel = val; 1619 } 1620 break; 1621 case VIRTIO_PCI_COMMON_Q_SIZE: 1622 proxy->vqs[vdev->queue_sel].num = val; 1623 virtio_queue_set_num(vdev, vdev->queue_sel, 1624 proxy->vqs[vdev->queue_sel].num); 1625 virtio_init_region_cache(vdev, vdev->queue_sel); 1626 break; 1627 case VIRTIO_PCI_COMMON_Q_MSIX: 1628 vector = virtio_queue_vector(vdev, vdev->queue_sel); 1629 if (vector != VIRTIO_NO_VECTOR) { 1630 msix_vector_unuse(&proxy->pci_dev, vector); 1631 } 1632 /* Make it possible for guest to discover an error took place. */ 1633 if (val < proxy->nvectors) { 1634 msix_vector_use(&proxy->pci_dev, val); 1635 } else { 1636 val = VIRTIO_NO_VECTOR; 1637 } 1638 virtio_pci_set_vector(vdev, proxy, vdev->queue_sel, vector, val); 1639 break; 1640 case VIRTIO_PCI_COMMON_Q_ENABLE: 1641 if (val == 1) { 1642 virtio_queue_set_num(vdev, vdev->queue_sel, 1643 proxy->vqs[vdev->queue_sel].num); 1644 virtio_queue_set_rings(vdev, vdev->queue_sel, 1645 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1646 proxy->vqs[vdev->queue_sel].desc[0], 1647 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1648 proxy->vqs[vdev->queue_sel].avail[0], 1649 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1650 proxy->vqs[vdev->queue_sel].used[0]); 1651 proxy->vqs[vdev->queue_sel].enabled = 1; 1652 proxy->vqs[vdev->queue_sel].reset = 0; 1653 virtio_queue_enable(vdev, vdev->queue_sel); 1654 } else { 1655 virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val); 1656 } 1657 break; 1658 case VIRTIO_PCI_COMMON_Q_DESCLO: 1659 proxy->vqs[vdev->queue_sel].desc[0] = val; 1660 break; 1661 case VIRTIO_PCI_COMMON_Q_DESCHI: 1662 proxy->vqs[vdev->queue_sel].desc[1] = val; 1663 break; 1664 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1665 proxy->vqs[vdev->queue_sel].avail[0] = val; 1666 break; 1667 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1668 proxy->vqs[vdev->queue_sel].avail[1] = val; 1669 break; 1670 case VIRTIO_PCI_COMMON_Q_USEDLO: 1671 proxy->vqs[vdev->queue_sel].used[0] = val; 1672 break; 1673 case VIRTIO_PCI_COMMON_Q_USEDHI: 1674 proxy->vqs[vdev->queue_sel].used[1] = val; 1675 break; 1676 case VIRTIO_PCI_COMMON_Q_RESET: 1677 if (val == 1) { 1678 proxy->vqs[vdev->queue_sel].reset = 1; 1679 1680 virtio_queue_reset(vdev, vdev->queue_sel); 1681 1682 proxy->vqs[vdev->queue_sel].reset = 0; 1683 proxy->vqs[vdev->queue_sel].enabled = 0; 1684 } 1685 break; 1686 default: 1687 break; 1688 } 1689 } 1690 1691 1692 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1693 unsigned size) 1694 { 1695 VirtIOPCIProxy *proxy = opaque; 1696 if (virtio_bus_get_device(&proxy->bus) == NULL) { 1697 return UINT64_MAX; 1698 } 1699 1700 return 0; 1701 } 1702 1703 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1704 uint64_t val, unsigned size) 1705 { 1706 VirtIOPCIProxy *proxy = opaque; 1707 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1708 1709 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); 1710 1711 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) { 1712 trace_virtio_pci_notify_write(addr, val, size); 1713 virtio_queue_notify(vdev, queue); 1714 } 1715 } 1716 1717 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1718 uint64_t val, unsigned size) 1719 { 1720 VirtIOPCIProxy *proxy = opaque; 1721 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1722 1723 unsigned queue = val; 1724 1725 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) { 1726 trace_virtio_pci_notify_write_pio(addr, val, size); 1727 virtio_queue_notify(vdev, queue); 1728 } 1729 } 1730 1731 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1732 unsigned size) 1733 { 1734 VirtIOPCIProxy *proxy = opaque; 1735 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1736 uint64_t val; 1737 1738 if (vdev == NULL) { 1739 return UINT64_MAX; 1740 } 1741 1742 val = qatomic_xchg(&vdev->isr, 0); 1743 pci_irq_deassert(&proxy->pci_dev); 1744 return val; 1745 } 1746 1747 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1748 uint64_t val, unsigned size) 1749 { 1750 } 1751 1752 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1753 unsigned size) 1754 { 1755 VirtIOPCIProxy *proxy = opaque; 1756 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1757 uint64_t val; 1758 1759 if (vdev == NULL) { 1760 return UINT64_MAX; 1761 } 1762 1763 switch (size) { 1764 case 1: 1765 val = virtio_config_modern_readb(vdev, addr); 1766 break; 1767 case 2: 1768 val = virtio_config_modern_readw(vdev, addr); 1769 break; 1770 case 4: 1771 val = virtio_config_modern_readl(vdev, addr); 1772 break; 1773 default: 1774 val = 0; 1775 break; 1776 } 1777 return val; 1778 } 1779 1780 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1781 uint64_t val, unsigned size) 1782 { 1783 VirtIOPCIProxy *proxy = opaque; 1784 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1785 1786 if (vdev == NULL) { 1787 return; 1788 } 1789 1790 switch (size) { 1791 case 1: 1792 virtio_config_modern_writeb(vdev, addr, val); 1793 break; 1794 case 2: 1795 virtio_config_modern_writew(vdev, addr, val); 1796 break; 1797 case 4: 1798 virtio_config_modern_writel(vdev, addr, val); 1799 break; 1800 } 1801 } 1802 1803 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy, 1804 const char *vdev_name) 1805 { 1806 static const MemoryRegionOps common_ops = { 1807 .read = virtio_pci_common_read, 1808 .write = virtio_pci_common_write, 1809 .impl = { 1810 .min_access_size = 1, 1811 .max_access_size = 4, 1812 }, 1813 .endianness = DEVICE_LITTLE_ENDIAN, 1814 }; 1815 static const MemoryRegionOps isr_ops = { 1816 .read = virtio_pci_isr_read, 1817 .write = virtio_pci_isr_write, 1818 .impl = { 1819 .min_access_size = 1, 1820 .max_access_size = 4, 1821 }, 1822 .endianness = DEVICE_LITTLE_ENDIAN, 1823 }; 1824 static const MemoryRegionOps device_ops = { 1825 .read = virtio_pci_device_read, 1826 .write = virtio_pci_device_write, 1827 .impl = { 1828 .min_access_size = 1, 1829 .max_access_size = 4, 1830 }, 1831 .endianness = DEVICE_LITTLE_ENDIAN, 1832 }; 1833 static const MemoryRegionOps notify_ops = { 1834 .read = virtio_pci_notify_read, 1835 .write = virtio_pci_notify_write, 1836 .impl = { 1837 .min_access_size = 1, 1838 .max_access_size = 4, 1839 }, 1840 .endianness = DEVICE_LITTLE_ENDIAN, 1841 }; 1842 static const MemoryRegionOps notify_pio_ops = { 1843 .read = virtio_pci_notify_read, 1844 .write = virtio_pci_notify_write_pio, 1845 .impl = { 1846 .min_access_size = 1, 1847 .max_access_size = 4, 1848 }, 1849 .endianness = DEVICE_LITTLE_ENDIAN, 1850 }; 1851 g_autoptr(GString) name = g_string_new(NULL); 1852 1853 g_string_printf(name, "virtio-pci-common-%s", vdev_name); 1854 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1855 &common_ops, 1856 proxy, 1857 name->str, 1858 proxy->common.size); 1859 1860 g_string_printf(name, "virtio-pci-isr-%s", vdev_name); 1861 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1862 &isr_ops, 1863 proxy, 1864 name->str, 1865 proxy->isr.size); 1866 1867 g_string_printf(name, "virtio-pci-device-%s", vdev_name); 1868 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1869 &device_ops, 1870 proxy, 1871 name->str, 1872 proxy->device.size); 1873 1874 g_string_printf(name, "virtio-pci-notify-%s", vdev_name); 1875 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1876 ¬ify_ops, 1877 proxy, 1878 name->str, 1879 proxy->notify.size); 1880 1881 g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name); 1882 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1883 ¬ify_pio_ops, 1884 proxy, 1885 name->str, 1886 proxy->notify_pio.size); 1887 } 1888 1889 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1890 VirtIOPCIRegion *region, 1891 struct virtio_pci_cap *cap, 1892 MemoryRegion *mr, 1893 uint8_t bar) 1894 { 1895 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1896 1897 cap->cfg_type = region->type; 1898 cap->bar = bar; 1899 cap->offset = cpu_to_le32(region->offset); 1900 cap->length = cpu_to_le32(region->size); 1901 virtio_pci_add_mem_cap(proxy, cap); 1902 1903 } 1904 1905 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1906 VirtIOPCIRegion *region, 1907 struct virtio_pci_cap *cap) 1908 { 1909 virtio_pci_modern_region_map(proxy, region, cap, 1910 &proxy->modern_bar, proxy->modern_mem_bar_idx); 1911 } 1912 1913 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1914 VirtIOPCIRegion *region, 1915 struct virtio_pci_cap *cap) 1916 { 1917 virtio_pci_modern_region_map(proxy, region, cap, 1918 &proxy->io_bar, proxy->modern_io_bar_idx); 1919 } 1920 1921 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1922 VirtIOPCIRegion *region) 1923 { 1924 memory_region_del_subregion(&proxy->modern_bar, 1925 ®ion->mr); 1926 } 1927 1928 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1929 VirtIOPCIRegion *region) 1930 { 1931 memory_region_del_subregion(&proxy->io_bar, 1932 ®ion->mr); 1933 } 1934 1935 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) 1936 { 1937 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1938 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1939 1940 if (virtio_pci_modern(proxy)) { 1941 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1942 } 1943 1944 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1945 } 1946 1947 /* This is called by virtio-bus just after the device is plugged. */ 1948 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1949 { 1950 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1951 VirtioBusState *bus = &proxy->bus; 1952 bool legacy = virtio_pci_legacy(proxy); 1953 bool modern; 1954 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1955 uint8_t *config; 1956 uint32_t size; 1957 VirtIODevice *vdev = virtio_bus_get_device(bus); 1958 1959 /* 1960 * Virtio capabilities present without 1961 * VIRTIO_F_VERSION_1 confuses guests 1962 */ 1963 if (!proxy->ignore_backend_features && 1964 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { 1965 virtio_pci_disable_modern(proxy); 1966 1967 if (!legacy) { 1968 error_setg(errp, "Device doesn't support modern mode, and legacy" 1969 " mode is disabled"); 1970 error_append_hint(errp, "Set disable-legacy to off\n"); 1971 1972 return; 1973 } 1974 } 1975 1976 modern = virtio_pci_modern(proxy); 1977 1978 config = proxy->pci_dev.config; 1979 if (proxy->class_code) { 1980 pci_config_set_class(config, proxy->class_code); 1981 } 1982 1983 if (legacy) { 1984 if (!virtio_legacy_allowed(vdev)) { 1985 /* 1986 * To avoid migration issues, we allow legacy mode when legacy 1987 * check is disabled in the old machine types (< 5.1). 1988 */ 1989 if (virtio_legacy_check_disabled(vdev)) { 1990 warn_report("device is modern-only, but for backward " 1991 "compatibility legacy is allowed"); 1992 } else { 1993 error_setg(errp, 1994 "device is modern-only, use disable-legacy=on"); 1995 return; 1996 } 1997 } 1998 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) { 1999 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by" 2000 " neither legacy nor transitional device"); 2001 return; 2002 } 2003 /* 2004 * Legacy and transitional devices use specific subsystem IDs. 2005 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID) 2006 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default. 2007 */ 2008 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 2009 if (proxy->trans_devid) { 2010 pci_config_set_device_id(config, proxy->trans_devid); 2011 } 2012 } else { 2013 /* pure virtio-1.0 */ 2014 pci_set_word(config + PCI_VENDOR_ID, 2015 PCI_VENDOR_ID_REDHAT_QUMRANET); 2016 pci_set_word(config + PCI_DEVICE_ID, 2017 PCI_DEVICE_ID_VIRTIO_10_BASE + virtio_bus_get_vdev_id(bus)); 2018 pci_config_set_revision(config, 1); 2019 } 2020 config[PCI_INTERRUPT_PIN] = 1; 2021 2022 2023 if (modern) { 2024 struct virtio_pci_cap cap = { 2025 .cap_len = sizeof cap, 2026 }; 2027 struct virtio_pci_notify_cap notify = { 2028 .cap.cap_len = sizeof notify, 2029 .notify_off_multiplier = 2030 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), 2031 }; 2032 struct virtio_pci_cfg_cap cfg = { 2033 .cap.cap_len = sizeof cfg, 2034 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 2035 }; 2036 struct virtio_pci_notify_cap notify_pio = { 2037 .cap.cap_len = sizeof notify, 2038 .notify_off_multiplier = cpu_to_le32(0x0), 2039 }; 2040 2041 struct virtio_pci_cfg_cap *cfg_mask; 2042 2043 virtio_pci_modern_regions_init(proxy, vdev->name); 2044 2045 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 2046 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 2047 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 2048 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 2049 2050 if (modern_pio) { 2051 memory_region_init(&proxy->io_bar, OBJECT(proxy), 2052 "virtio-pci-io", 0x4); 2053 2054 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, 2055 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 2056 2057 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 2058 ¬ify_pio.cap); 2059 } 2060 2061 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, 2062 PCI_BASE_ADDRESS_SPACE_MEMORY | 2063 PCI_BASE_ADDRESS_MEM_PREFETCH | 2064 PCI_BASE_ADDRESS_MEM_TYPE_64, 2065 &proxy->modern_bar); 2066 2067 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 2068 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 2069 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 2070 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 2071 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 2072 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 2073 } 2074 2075 if (proxy->nvectors) { 2076 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 2077 proxy->msix_bar_idx, NULL); 2078 if (err) { 2079 /* Notice when a system that supports MSIx can't initialize it */ 2080 if (err != -ENOTSUP) { 2081 warn_report("unable to init msix vectors to %" PRIu32, 2082 proxy->nvectors); 2083 } 2084 proxy->nvectors = 0; 2085 } 2086 } 2087 2088 proxy->pci_dev.config_write = virtio_write_config; 2089 proxy->pci_dev.config_read = virtio_read_config; 2090 2091 if (legacy) { 2092 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 2093 + virtio_bus_get_vdev_config_len(bus); 2094 size = pow2ceil(size); 2095 2096 memory_region_init_io(&proxy->bar, OBJECT(proxy), 2097 &virtio_pci_config_ops, 2098 proxy, "virtio-pci", size); 2099 2100 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, 2101 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 2102 } 2103 } 2104 2105 static void virtio_pci_device_unplugged(DeviceState *d) 2106 { 2107 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 2108 bool modern = virtio_pci_modern(proxy); 2109 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 2110 2111 virtio_pci_stop_ioeventfd(proxy); 2112 2113 if (modern) { 2114 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 2115 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 2116 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 2117 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 2118 if (modern_pio) { 2119 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 2120 } 2121 } 2122 } 2123 2124 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 2125 { 2126 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 2127 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 2128 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 2129 !pci_bus_is_root(pci_get_bus(pci_dev)); 2130 2131 /* fd-based ioevents can't be synchronized in record/replay */ 2132 if (replay_mode != REPLAY_MODE_NONE) { 2133 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 2134 } 2135 2136 /* 2137 * virtio pci bar layout used by default. 2138 * subclasses can re-arrange things if needed. 2139 * 2140 * region 0 -- virtio legacy io bar 2141 * region 1 -- msi-x bar 2142 * region 2 -- virtio modern io bar (off by default) 2143 * region 4+5 -- virtio modern memory (64bit) bar 2144 * 2145 */ 2146 proxy->legacy_io_bar_idx = 0; 2147 proxy->msix_bar_idx = 1; 2148 proxy->modern_io_bar_idx = 2; 2149 proxy->modern_mem_bar_idx = 4; 2150 2151 proxy->common.offset = 0x0; 2152 proxy->common.size = 0x1000; 2153 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 2154 2155 proxy->isr.offset = 0x1000; 2156 proxy->isr.size = 0x1000; 2157 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 2158 2159 proxy->device.offset = 0x2000; 2160 proxy->device.size = 0x1000; 2161 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 2162 2163 proxy->notify.offset = 0x3000; 2164 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; 2165 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 2166 2167 proxy->notify_pio.offset = 0x0; 2168 proxy->notify_pio.size = 0x4; 2169 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 2170 2171 /* subclasses can enforce modern, so do this unconditionally */ 2172 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 2173 /* PCI BAR regions must be powers of 2 */ 2174 pow2ceil(proxy->notify.offset + proxy->notify.size)); 2175 2176 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { 2177 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 2178 } 2179 2180 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { 2181 error_setg(errp, "device cannot work as neither modern nor legacy mode" 2182 " is enabled"); 2183 error_append_hint(errp, "Set either disable-modern or disable-legacy" 2184 " to off\n"); 2185 return; 2186 } 2187 2188 if (pcie_port && pci_is_express(pci_dev)) { 2189 int pos; 2190 uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE; 2191 2192 pos = pcie_endpoint_cap_init(pci_dev, 0); 2193 assert(pos > 0); 2194 2195 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, 2196 PCI_PM_SIZEOF, errp); 2197 if (pos < 0) { 2198 return; 2199 } 2200 2201 pci_dev->exp.pm_cap = pos; 2202 2203 /* 2204 * Indicates that this function complies with revision 1.2 of the 2205 * PCI Power Management Interface Specification. 2206 */ 2207 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 2208 2209 if (proxy->flags & VIRTIO_PCI_FLAG_AER) { 2210 pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset, 2211 PCI_ERR_SIZEOF, NULL); 2212 last_pcie_cap_offset += PCI_ERR_SIZEOF; 2213 } 2214 2215 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { 2216 /* Init error enabling flags */ 2217 pcie_cap_deverr_init(pci_dev); 2218 } 2219 2220 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { 2221 /* Init Link Control Register */ 2222 pcie_cap_lnkctl_init(pci_dev); 2223 } 2224 2225 if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) { 2226 pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, 2227 PCI_PM_CTRL_NO_SOFT_RESET); 2228 } 2229 2230 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { 2231 /* Init Power Management Control Register */ 2232 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, 2233 PCI_PM_CTRL_STATE_MASK); 2234 } 2235 2236 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 2237 pcie_ats_init(pci_dev, last_pcie_cap_offset, 2238 proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED); 2239 last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; 2240 } 2241 2242 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { 2243 /* Set Function Level Reset capability bit */ 2244 pcie_cap_flr_init(pci_dev); 2245 } 2246 } else { 2247 /* 2248 * make future invocations of pci_is_express() return false 2249 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 2250 */ 2251 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 2252 } 2253 2254 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 2255 if (k->realize) { 2256 k->realize(proxy, errp); 2257 } 2258 } 2259 2260 static void virtio_pci_exit(PCIDevice *pci_dev) 2261 { 2262 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 2263 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 2264 !pci_bus_is_root(pci_get_bus(pci_dev)); 2265 2266 msix_uninit_exclusive_bar(pci_dev); 2267 if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port && 2268 pci_is_express(pci_dev)) { 2269 pcie_aer_exit(pci_dev); 2270 } 2271 } 2272 2273 static void virtio_pci_reset(DeviceState *qdev) 2274 { 2275 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 2276 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 2277 int i; 2278 2279 virtio_bus_reset(bus); 2280 msix_unuse_all_vectors(&proxy->pci_dev); 2281 2282 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 2283 proxy->vqs[i].enabled = 0; 2284 proxy->vqs[i].reset = 0; 2285 proxy->vqs[i].num = 0; 2286 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0; 2287 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; 2288 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; 2289 } 2290 } 2291 2292 static bool virtio_pci_no_soft_reset(PCIDevice *dev) 2293 { 2294 uint16_t pmcsr; 2295 2296 if (!pci_is_express(dev) || !dev->exp.pm_cap) { 2297 return false; 2298 } 2299 2300 pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL); 2301 2302 /* 2303 * When No_Soft_Reset bit is set and the device 2304 * is in D3hot state, don't reset device 2305 */ 2306 return (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) && 2307 (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; 2308 } 2309 2310 static void virtio_pci_bus_reset_hold(Object *obj, ResetType type) 2311 { 2312 PCIDevice *dev = PCI_DEVICE(obj); 2313 DeviceState *qdev = DEVICE(obj); 2314 2315 if (virtio_pci_no_soft_reset(dev)) { 2316 return; 2317 } 2318 2319 virtio_pci_reset(qdev); 2320 2321 if (pci_is_express(dev)) { 2322 VirtIOPCIProxy *proxy = VIRTIO_PCI(dev); 2323 2324 pcie_cap_deverr_reset(dev); 2325 pcie_cap_lnkctl_reset(dev); 2326 2327 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { 2328 pci_word_test_and_clear_mask( 2329 dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 2330 PCI_PM_CTRL_STATE_MASK); 2331 } 2332 } 2333 } 2334 2335 static Property virtio_pci_properties[] = { 2336 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 2337 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 2338 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 2339 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 2340 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 2341 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 2342 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 2343 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 2344 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, 2345 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), 2346 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, 2347 ignore_backend_features, false), 2348 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, 2349 VIRTIO_PCI_FLAG_ATS_BIT, false), 2350 DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags, 2351 VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true), 2352 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, 2353 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), 2354 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, 2355 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), 2356 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, 2357 VIRTIO_PCI_FLAG_INIT_PM_BIT, true), 2358 DEFINE_PROP_BIT("x-pcie-pm-no-soft-reset", VirtIOPCIProxy, flags, 2359 VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, false), 2360 DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, 2361 VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), 2362 DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, 2363 VIRTIO_PCI_FLAG_AER_BIT, false), 2364 DEFINE_PROP_END_OF_LIST(), 2365 }; 2366 2367 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 2368 { 2369 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 2370 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 2371 PCIDevice *pci_dev = &proxy->pci_dev; 2372 2373 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 2374 virtio_pci_modern(proxy)) { 2375 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 2376 } 2377 2378 vpciklass->parent_dc_realize(qdev, errp); 2379 } 2380 2381 static void virtio_pci_class_init(ObjectClass *klass, void *data) 2382 { 2383 DeviceClass *dc = DEVICE_CLASS(klass); 2384 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2385 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 2386 ResettableClass *rc = RESETTABLE_CLASS(klass); 2387 2388 device_class_set_props(dc, virtio_pci_properties); 2389 k->realize = virtio_pci_realize; 2390 k->exit = virtio_pci_exit; 2391 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2392 k->revision = VIRTIO_PCI_ABI_VERSION; 2393 k->class_id = PCI_CLASS_OTHERS; 2394 device_class_set_parent_realize(dc, virtio_pci_dc_realize, 2395 &vpciklass->parent_dc_realize); 2396 rc->phases.hold = virtio_pci_bus_reset_hold; 2397 } 2398 2399 static const TypeInfo virtio_pci_info = { 2400 .name = TYPE_VIRTIO_PCI, 2401 .parent = TYPE_PCI_DEVICE, 2402 .instance_size = sizeof(VirtIOPCIProxy), 2403 .class_init = virtio_pci_class_init, 2404 .class_size = sizeof(VirtioPCIClass), 2405 .abstract = true, 2406 }; 2407 2408 static Property virtio_pci_generic_properties[] = { 2409 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, 2410 ON_OFF_AUTO_AUTO), 2411 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), 2412 DEFINE_PROP_END_OF_LIST(), 2413 }; 2414 2415 static void virtio_pci_base_class_init(ObjectClass *klass, void *data) 2416 { 2417 const VirtioPCIDeviceTypeInfo *t = data; 2418 if (t->class_init) { 2419 t->class_init(klass, NULL); 2420 } 2421 } 2422 2423 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data) 2424 { 2425 DeviceClass *dc = DEVICE_CLASS(klass); 2426 2427 device_class_set_props(dc, virtio_pci_generic_properties); 2428 } 2429 2430 static void virtio_pci_transitional_instance_init(Object *obj) 2431 { 2432 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 2433 2434 proxy->disable_legacy = ON_OFF_AUTO_OFF; 2435 proxy->disable_modern = false; 2436 } 2437 2438 static void virtio_pci_non_transitional_instance_init(Object *obj) 2439 { 2440 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 2441 2442 proxy->disable_legacy = ON_OFF_AUTO_ON; 2443 proxy->disable_modern = false; 2444 } 2445 2446 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t) 2447 { 2448 char *base_name = NULL; 2449 TypeInfo base_type_info = { 2450 .name = t->base_name, 2451 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI, 2452 .instance_size = t->instance_size, 2453 .instance_init = t->instance_init, 2454 .instance_finalize = t->instance_finalize, 2455 .class_size = t->class_size, 2456 .abstract = true, 2457 .interfaces = t->interfaces, 2458 }; 2459 TypeInfo generic_type_info = { 2460 .name = t->generic_name, 2461 .parent = base_type_info.name, 2462 .class_init = virtio_pci_generic_class_init, 2463 .interfaces = (InterfaceInfo[]) { 2464 { INTERFACE_PCIE_DEVICE }, 2465 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2466 { } 2467 }, 2468 }; 2469 2470 if (!base_type_info.name) { 2471 /* No base type -> register a single generic device type */ 2472 /* use intermediate %s-base-type to add generic device props */ 2473 base_name = g_strdup_printf("%s-base-type", t->generic_name); 2474 base_type_info.name = base_name; 2475 base_type_info.class_init = virtio_pci_generic_class_init; 2476 2477 generic_type_info.parent = base_name; 2478 generic_type_info.class_init = virtio_pci_base_class_init; 2479 generic_type_info.class_data = (void *)t; 2480 2481 assert(!t->non_transitional_name); 2482 assert(!t->transitional_name); 2483 } else { 2484 base_type_info.class_init = virtio_pci_base_class_init; 2485 base_type_info.class_data = (void *)t; 2486 } 2487 2488 type_register(&base_type_info); 2489 if (generic_type_info.name) { 2490 type_register(&generic_type_info); 2491 } 2492 2493 if (t->non_transitional_name) { 2494 const TypeInfo non_transitional_type_info = { 2495 .name = t->non_transitional_name, 2496 .parent = base_type_info.name, 2497 .instance_init = virtio_pci_non_transitional_instance_init, 2498 .interfaces = (InterfaceInfo[]) { 2499 { INTERFACE_PCIE_DEVICE }, 2500 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2501 { } 2502 }, 2503 }; 2504 type_register(&non_transitional_type_info); 2505 } 2506 2507 if (t->transitional_name) { 2508 const TypeInfo transitional_type_info = { 2509 .name = t->transitional_name, 2510 .parent = base_type_info.name, 2511 .instance_init = virtio_pci_transitional_instance_init, 2512 .interfaces = (InterfaceInfo[]) { 2513 /* 2514 * Transitional virtio devices work only as Conventional PCI 2515 * devices because they require PIO ports. 2516 */ 2517 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2518 { } 2519 }, 2520 }; 2521 type_register(&transitional_type_info); 2522 } 2523 g_free(base_name); 2524 } 2525 2526 unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues) 2527 { 2528 /* 2529 * 1:1 vq to vCPU mapping is ideal because the same vCPU that submitted 2530 * virtqueue buffers can handle their completion. When a different vCPU 2531 * handles completion it may need to IPI the vCPU that submitted the 2532 * request and this adds overhead. 2533 * 2534 * Virtqueues consume guest RAM and MSI-X vectors. This is wasteful in 2535 * guests with very many vCPUs and a device that is only used by a few 2536 * vCPUs. Unfortunately optimizing that case requires manual pinning inside 2537 * the guest, so those users might as well manually set the number of 2538 * queues. There is no upper limit that can be applied automatically and 2539 * doing so arbitrarily would result in a sudden performance drop once the 2540 * threshold number of vCPUs is exceeded. 2541 */ 2542 unsigned num_queues = current_machine->smp.cpus; 2543 2544 /* 2545 * The maximum number of MSI-X vectors is PCI_MSIX_FLAGS_QSIZE + 1, but the 2546 * config change interrupt and the fixed virtqueues must be taken into 2547 * account too. 2548 */ 2549 num_queues = MIN(num_queues, PCI_MSIX_FLAGS_QSIZE - fixed_queues); 2550 2551 /* 2552 * There is a limit to how many virtqueues a device can have. 2553 */ 2554 return MIN(num_queues, VIRTIO_QUEUE_MAX - fixed_queues); 2555 } 2556 2557 /* virtio-pci-bus */ 2558 2559 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2560 VirtIOPCIProxy *dev) 2561 { 2562 DeviceState *qdev = DEVICE(dev); 2563 char virtio_bus_name[] = "virtio-bus"; 2564 2565 qbus_init(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, virtio_bus_name); 2566 } 2567 2568 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2569 { 2570 BusClass *bus_class = BUS_CLASS(klass); 2571 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2572 bus_class->max_dev = 1; 2573 k->notify = virtio_pci_notify; 2574 k->save_config = virtio_pci_save_config; 2575 k->load_config = virtio_pci_load_config; 2576 k->save_queue = virtio_pci_save_queue; 2577 k->load_queue = virtio_pci_load_queue; 2578 k->save_extra_state = virtio_pci_save_extra_state; 2579 k->load_extra_state = virtio_pci_load_extra_state; 2580 k->has_extra_state = virtio_pci_has_extra_state; 2581 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2582 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2583 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr; 2584 k->vmstate_change = virtio_pci_vmstate_change; 2585 k->pre_plugged = virtio_pci_pre_plugged; 2586 k->device_plugged = virtio_pci_device_plugged; 2587 k->device_unplugged = virtio_pci_device_unplugged; 2588 k->query_nvectors = virtio_pci_query_nvectors; 2589 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; 2590 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2591 k->get_dma_as = virtio_pci_get_dma_as; 2592 k->iommu_enabled = virtio_pci_iommu_enabled; 2593 k->queue_enabled = virtio_pci_queue_enabled; 2594 } 2595 2596 static const TypeInfo virtio_pci_bus_info = { 2597 .name = TYPE_VIRTIO_PCI_BUS, 2598 .parent = TYPE_VIRTIO_BUS, 2599 .instance_size = sizeof(VirtioPCIBusState), 2600 .class_size = sizeof(VirtioPCIBusClass), 2601 .class_init = virtio_pci_bus_class_init, 2602 }; 2603 2604 static void virtio_pci_register_types(void) 2605 { 2606 /* Base types: */ 2607 type_register_static(&virtio_pci_bus_info); 2608 type_register_static(&virtio_pci_info); 2609 } 2610 2611 type_init(virtio_pci_register_types) 2612 2613