18ac98aedSDavid Woodhouse /* SPDX-License-Identifier: MIT */ 250c88402SJoao Martins /****************************************************************************** 350c88402SJoao Martins * arch-arm.h 450c88402SJoao Martins * 550c88402SJoao Martins * Guest OS interface to ARM Xen. 650c88402SJoao Martins * 750c88402SJoao Martins * Copyright 2011 (C) Citrix Systems 850c88402SJoao Martins */ 950c88402SJoao Martins 1050c88402SJoao Martins #ifndef __XEN_PUBLIC_ARCH_ARM_H__ 1150c88402SJoao Martins #define __XEN_PUBLIC_ARCH_ARM_H__ 1250c88402SJoao Martins 1350c88402SJoao Martins /* 1450c88402SJoao Martins * `incontents 50 arm_abi Hypercall Calling Convention 1550c88402SJoao Martins * 1650c88402SJoao Martins * A hypercall is issued using the ARM HVC instruction. 1750c88402SJoao Martins * 1850c88402SJoao Martins * A hypercall can take up to 5 arguments. These are passed in 1950c88402SJoao Martins * registers, the first argument in x0/r0 (for arm64/arm32 guests 2050c88402SJoao Martins * respectively irrespective of whether the underlying hypervisor is 2150c88402SJoao Martins * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2, 2250c88402SJoao Martins * the forth in x3/r3 and the fifth in x4/r4. 2350c88402SJoao Martins * 2450c88402SJoao Martins * The hypercall number is passed in r12 (arm) or x16 (arm64). In both 2550c88402SJoao Martins * cases the relevant ARM procedure calling convention specifies this 2650c88402SJoao Martins * is an inter-procedure-call scratch register (e.g. for use in linker 2750c88402SJoao Martins * stubs). This use does not conflict with use during a hypercall. 2850c88402SJoao Martins * 2950c88402SJoao Martins * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG. 3050c88402SJoao Martins * 3150c88402SJoao Martins * The return value is in x0/r0. 3250c88402SJoao Martins * 3350c88402SJoao Martins * The hypercall will clobber x16/r12 and the argument registers used 3450c88402SJoao Martins * by that hypercall (except r0 which is the return value) i.e. in 3550c88402SJoao Martins * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a 3650c88402SJoao Martins * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3. 3750c88402SJoao Martins * 3850c88402SJoao Martins * Parameter structs passed to hypercalls are laid out according to 3950c88402SJoao Martins * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA 4050c88402SJoao Martins * EABI) and Procedure Call Standard for the ARM 64-bit Architecture 4150c88402SJoao Martins * (AAPCS64). Where there is a conflict the 64-bit standard should be 4250c88402SJoao Martins * used regardless of guest type. Structures which are passed as 4350c88402SJoao Martins * hypercall arguments are always little endian. 4450c88402SJoao Martins * 4550c88402SJoao Martins * All memory which is shared with other entities in the system 4650c88402SJoao Martins * (including the hypervisor and other guests) must reside in memory 4750c88402SJoao Martins * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable. 4850c88402SJoao Martins * This applies to: 4950c88402SJoao Martins * - hypercall arguments passed via a pointer to guest memory. 5050c88402SJoao Martins * - memory shared via the grant table mechanism (including PV I/O 5150c88402SJoao Martins * rings etc). 5250c88402SJoao Martins * - memory shared with the hypervisor (struct shared_info, struct 5350c88402SJoao Martins * vcpu_info, the grant table, etc). 5450c88402SJoao Martins * 5550c88402SJoao Martins * Any cache allocation hints are acceptable. 5650c88402SJoao Martins */ 5750c88402SJoao Martins 5850c88402SJoao Martins /* 5950c88402SJoao Martins * `incontents 55 arm_hcall Supported Hypercalls 6050c88402SJoao Martins * 6150c88402SJoao Martins * Xen on ARM makes extensive use of hardware facilities and therefore 6250c88402SJoao Martins * only a subset of the potential hypercalls are required. 6350c88402SJoao Martins * 6450c88402SJoao Martins * Since ARM uses second stage paging any machine/physical addresses 6550c88402SJoao Martins * passed to hypercalls are Guest Physical Addresses (Intermediate 6650c88402SJoao Martins * Physical Addresses) unless otherwise noted. 6750c88402SJoao Martins * 6850c88402SJoao Martins * The following hypercalls (and sub operations) are supported on the 6950c88402SJoao Martins * ARM platform. Other hypercalls should be considered 7050c88402SJoao Martins * unavailable/unsupported. 7150c88402SJoao Martins * 7250c88402SJoao Martins * HYPERVISOR_memory_op 7350c88402SJoao Martins * All generic sub-operations 7450c88402SJoao Martins * 7550c88402SJoao Martins * HYPERVISOR_domctl 7650c88402SJoao Martins * All generic sub-operations, with the exception of: 7750c88402SJoao Martins * * XEN_DOMCTL_irq_permission (not yet implemented) 7850c88402SJoao Martins * 7950c88402SJoao Martins * HYPERVISOR_sched_op 8050c88402SJoao Martins * All generic sub-operations, with the exception of: 8150c88402SJoao Martins * * SCHEDOP_block -- prefer wfi hardware instruction 8250c88402SJoao Martins * 8350c88402SJoao Martins * HYPERVISOR_console_io 8450c88402SJoao Martins * All generic sub-operations 8550c88402SJoao Martins * 8650c88402SJoao Martins * HYPERVISOR_xen_version 8750c88402SJoao Martins * All generic sub-operations 8850c88402SJoao Martins * 8950c88402SJoao Martins * HYPERVISOR_event_channel_op 9050c88402SJoao Martins * All generic sub-operations 9150c88402SJoao Martins * 9250c88402SJoao Martins * HYPERVISOR_physdev_op 9350c88402SJoao Martins * Exactly these sub-operations are supported: 9450c88402SJoao Martins * PHYSDEVOP_pci_device_add 9550c88402SJoao Martins * PHYSDEVOP_pci_device_remove 9650c88402SJoao Martins * 9750c88402SJoao Martins * HYPERVISOR_sysctl 9850c88402SJoao Martins * All generic sub-operations, with the exception of: 9950c88402SJoao Martins * * XEN_SYSCTL_page_offline_op 10050c88402SJoao Martins * * XEN_SYSCTL_get_pmstat 10150c88402SJoao Martins * * XEN_SYSCTL_pm_op 10250c88402SJoao Martins * 10350c88402SJoao Martins * HYPERVISOR_hvm_op 10450c88402SJoao Martins * Exactly these sub-operations are supported: 10550c88402SJoao Martins * * HVMOP_set_param 10650c88402SJoao Martins * * HVMOP_get_param 10750c88402SJoao Martins * 10850c88402SJoao Martins * HYPERVISOR_grant_table_op 10950c88402SJoao Martins * All generic sub-operations 11050c88402SJoao Martins * 11150c88402SJoao Martins * HYPERVISOR_vcpu_op 11250c88402SJoao Martins * Exactly these sub-operations are supported: 11350c88402SJoao Martins * * VCPUOP_register_vcpu_info 11450c88402SJoao Martins * * VCPUOP_register_runstate_memory_area 11550c88402SJoao Martins * 11650c88402SJoao Martins * HYPERVISOR_argo_op 11750c88402SJoao Martins * All generic sub-operations 11850c88402SJoao Martins * 11950c88402SJoao Martins * Other notes on the ARM ABI: 12050c88402SJoao Martins * 12150c88402SJoao Martins * - struct start_info is not exported to ARM guests. 12250c88402SJoao Martins * 12350c88402SJoao Martins * - struct shared_info is mapped by ARM guests using the 12450c88402SJoao Martins * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing 12550c88402SJoao Martins * XENMAPSPACE_shared_info as space parameter. 12650c88402SJoao Martins * 12750c88402SJoao Martins * - All the per-cpu struct vcpu_info are mapped by ARM guests using the 12850c88402SJoao Martins * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0 12950c88402SJoao Martins * struct vcpu_info. 13050c88402SJoao Martins * 13150c88402SJoao Martins * - The grant table is mapped using the HYPERVISOR_memory_op sub-op 13250c88402SJoao Martins * XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space 13350c88402SJoao Martins * parameter. The memory range specified under the Xen compatible 13450c88402SJoao Martins * hypervisor node on device tree can be used as target gpfn for the 13550c88402SJoao Martins * mapping. 13650c88402SJoao Martins * 13750c88402SJoao Martins * - Xenstore is initialized by using the two hvm_params 13850c88402SJoao Martins * HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read 13950c88402SJoao Martins * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 14050c88402SJoao Martins * 14150c88402SJoao Martins * - The paravirtualized console is initialized by using the two 14250c88402SJoao Martins * hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They 14350c88402SJoao Martins * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 14450c88402SJoao Martins * 14550c88402SJoao Martins * - Event channel notifications are delivered using the percpu GIC 14650c88402SJoao Martins * interrupt specified under the Xen compatible hypervisor node on 14750c88402SJoao Martins * device tree. 14850c88402SJoao Martins * 14950c88402SJoao Martins * - The device tree Xen compatible node is fully described under Linux 15050c88402SJoao Martins * at Documentation/devicetree/bindings/arm/xen.txt. 15150c88402SJoao Martins */ 15250c88402SJoao Martins 15350c88402SJoao Martins #define XEN_HYPERCALL_TAG 0XEA1 15450c88402SJoao Martins 15550c88402SJoao Martins #define int64_aligned_t int64_t __attribute__((aligned(8))) 15650c88402SJoao Martins #define uint64_aligned_t uint64_t __attribute__((aligned(8))) 15750c88402SJoao Martins 15850c88402SJoao Martins #ifndef __ASSEMBLY__ 15950c88402SJoao Martins #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 16050c88402SJoao Martins typedef union { type *p; unsigned long q; } \ 16150c88402SJoao Martins __guest_handle_ ## name; \ 16250c88402SJoao Martins typedef union { type *p; uint64_aligned_t q; } \ 16350c88402SJoao Martins __guest_handle_64_ ## name 16450c88402SJoao Martins 16550c88402SJoao Martins /* 16650c88402SJoao Martins * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field 16750c88402SJoao Martins * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes 16850c88402SJoao Martins * aligned. 16950c88402SJoao Martins * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an 17050c88402SJoao Martins * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64. 17150c88402SJoao Martins */ 17250c88402SJoao Martins #define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 17350c88402SJoao Martins ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 17450c88402SJoao Martins ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 17550c88402SJoao Martins #define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 17650c88402SJoao Martins #define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name 17750c88402SJoao Martins #define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) 17850c88402SJoao Martins #define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name 17950c88402SJoao Martins #define set_xen_guest_handle_raw(hnd, val) \ 18050c88402SJoao Martins do { \ 18150c88402SJoao Martins __typeof__(&(hnd)) _sxghr_tmp = &(hnd); \ 18250c88402SJoao Martins _sxghr_tmp->q = 0; \ 18350c88402SJoao Martins _sxghr_tmp->p = val; \ 18450c88402SJoao Martins } while ( 0 ) 18550c88402SJoao Martins #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) 18650c88402SJoao Martins 18750c88402SJoao Martins typedef uint64_t xen_pfn_t; 18850c88402SJoao Martins #define PRI_xen_pfn PRIx64 18950c88402SJoao Martins #define PRIu_xen_pfn PRIu64 19050c88402SJoao Martins 19150c88402SJoao Martins /* 19250c88402SJoao Martins * Maximum number of virtual CPUs in legacy multi-processor guests. 19350c88402SJoao Martins * Only one. All other VCPUS must use VCPUOP_register_vcpu_info. 19450c88402SJoao Martins */ 19550c88402SJoao Martins #define XEN_LEGACY_MAX_VCPUS 1 19650c88402SJoao Martins 19750c88402SJoao Martins typedef uint64_t xen_ulong_t; 19850c88402SJoao Martins #define PRI_xen_ulong PRIx64 19950c88402SJoao Martins 20050c88402SJoao Martins #if defined(__XEN__) || defined(__XEN_TOOLS__) 20150c88402SJoao Martins #if defined(__GNUC__) && !defined(__STRICT_ANSI__) 20250c88402SJoao Martins /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ 20350c88402SJoao Martins # define __DECL_REG(n64, n32) union { \ 20450c88402SJoao Martins uint64_t n64; \ 20550c88402SJoao Martins uint32_t n32; \ 20650c88402SJoao Martins } 20750c88402SJoao Martins #else 20850c88402SJoao Martins /* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */ 20950c88402SJoao Martins #define __DECL_REG(n64, n32) uint64_t n64 21050c88402SJoao Martins #endif 21150c88402SJoao Martins 21250c88402SJoao Martins struct vcpu_guest_core_regs 21350c88402SJoao Martins { 21450c88402SJoao Martins /* Aarch64 Aarch32 */ 21550c88402SJoao Martins __DECL_REG(x0, r0_usr); 21650c88402SJoao Martins __DECL_REG(x1, r1_usr); 21750c88402SJoao Martins __DECL_REG(x2, r2_usr); 21850c88402SJoao Martins __DECL_REG(x3, r3_usr); 21950c88402SJoao Martins __DECL_REG(x4, r4_usr); 22050c88402SJoao Martins __DECL_REG(x5, r5_usr); 22150c88402SJoao Martins __DECL_REG(x6, r6_usr); 22250c88402SJoao Martins __DECL_REG(x7, r7_usr); 22350c88402SJoao Martins __DECL_REG(x8, r8_usr); 22450c88402SJoao Martins __DECL_REG(x9, r9_usr); 22550c88402SJoao Martins __DECL_REG(x10, r10_usr); 22650c88402SJoao Martins __DECL_REG(x11, r11_usr); 22750c88402SJoao Martins __DECL_REG(x12, r12_usr); 22850c88402SJoao Martins 22950c88402SJoao Martins __DECL_REG(x13, sp_usr); 23050c88402SJoao Martins __DECL_REG(x14, lr_usr); 23150c88402SJoao Martins 23250c88402SJoao Martins __DECL_REG(x15, __unused_sp_hyp); 23350c88402SJoao Martins 23450c88402SJoao Martins __DECL_REG(x16, lr_irq); 23550c88402SJoao Martins __DECL_REG(x17, sp_irq); 23650c88402SJoao Martins 23750c88402SJoao Martins __DECL_REG(x18, lr_svc); 23850c88402SJoao Martins __DECL_REG(x19, sp_svc); 23950c88402SJoao Martins 24050c88402SJoao Martins __DECL_REG(x20, lr_abt); 24150c88402SJoao Martins __DECL_REG(x21, sp_abt); 24250c88402SJoao Martins 24350c88402SJoao Martins __DECL_REG(x22, lr_und); 24450c88402SJoao Martins __DECL_REG(x23, sp_und); 24550c88402SJoao Martins 24650c88402SJoao Martins __DECL_REG(x24, r8_fiq); 24750c88402SJoao Martins __DECL_REG(x25, r9_fiq); 24850c88402SJoao Martins __DECL_REG(x26, r10_fiq); 24950c88402SJoao Martins __DECL_REG(x27, r11_fiq); 25050c88402SJoao Martins __DECL_REG(x28, r12_fiq); 25150c88402SJoao Martins 25250c88402SJoao Martins __DECL_REG(x29, sp_fiq); 25350c88402SJoao Martins __DECL_REG(x30, lr_fiq); 25450c88402SJoao Martins 25550c88402SJoao Martins /* Return address and mode */ 25650c88402SJoao Martins __DECL_REG(pc64, pc32); /* ELR_EL2 */ 25750c88402SJoao Martins uint64_t cpsr; /* SPSR_EL2 */ 25850c88402SJoao Martins 25950c88402SJoao Martins union { 26050c88402SJoao Martins uint64_t spsr_el1; /* AArch64 */ 26150c88402SJoao Martins uint32_t spsr_svc; /* AArch32 */ 26250c88402SJoao Martins }; 26350c88402SJoao Martins 26450c88402SJoao Martins /* AArch32 guests only */ 26550c88402SJoao Martins uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt; 26650c88402SJoao Martins 26750c88402SJoao Martins /* AArch64 guests only */ 26850c88402SJoao Martins uint64_t sp_el0; 26950c88402SJoao Martins uint64_t sp_el1, elr_el1; 27050c88402SJoao Martins }; 27150c88402SJoao Martins typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t; 27250c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t); 27350c88402SJoao Martins 27450c88402SJoao Martins #undef __DECL_REG 27550c88402SJoao Martins 27650c88402SJoao Martins struct vcpu_guest_context { 27750c88402SJoao Martins #define _VGCF_online 0 27850c88402SJoao Martins #define VGCF_online (1<<_VGCF_online) 27950c88402SJoao Martins uint32_t flags; /* VGCF_* */ 28050c88402SJoao Martins 28150c88402SJoao Martins struct vcpu_guest_core_regs user_regs; /* Core CPU registers */ 28250c88402SJoao Martins 28350c88402SJoao Martins uint64_t sctlr; 28450c88402SJoao Martins uint64_t ttbcr, ttbr0, ttbr1; 28550c88402SJoao Martins }; 28650c88402SJoao Martins typedef struct vcpu_guest_context vcpu_guest_context_t; 28750c88402SJoao Martins DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 28850c88402SJoao Martins 28950c88402SJoao Martins /* 29050c88402SJoao Martins * struct xen_arch_domainconfig's ABI is covered by 29150c88402SJoao Martins * XEN_DOMCTL_INTERFACE_VERSION. 29250c88402SJoao Martins */ 29350c88402SJoao Martins #define XEN_DOMCTL_CONFIG_GIC_NATIVE 0 29450c88402SJoao Martins #define XEN_DOMCTL_CONFIG_GIC_V2 1 29550c88402SJoao Martins #define XEN_DOMCTL_CONFIG_GIC_V3 2 29650c88402SJoao Martins 29750c88402SJoao Martins #define XEN_DOMCTL_CONFIG_TEE_NONE 0 29850c88402SJoao Martins #define XEN_DOMCTL_CONFIG_TEE_OPTEE 1 29950c88402SJoao Martins 30050c88402SJoao Martins struct xen_arch_domainconfig { 30150c88402SJoao Martins /* IN/OUT */ 30250c88402SJoao Martins uint8_t gic_version; 30350c88402SJoao Martins /* IN */ 30450c88402SJoao Martins uint16_t tee_type; 30550c88402SJoao Martins /* IN */ 30650c88402SJoao Martins uint32_t nr_spis; 30750c88402SJoao Martins /* 30850c88402SJoao Martins * OUT 30950c88402SJoao Martins * Based on the property clock-frequency in the DT timer node. 31050c88402SJoao Martins * The property may be present when the bootloader/firmware doesn't 31150c88402SJoao Martins * set correctly CNTFRQ which hold the timer frequency. 31250c88402SJoao Martins * 31350c88402SJoao Martins * As it's not possible to trap this register, we have to replicate 31450c88402SJoao Martins * the value in the guest DT. 31550c88402SJoao Martins * 31650c88402SJoao Martins * = 0 => property not present 31750c88402SJoao Martins * > 0 => Value of the property 31850c88402SJoao Martins * 31950c88402SJoao Martins */ 32050c88402SJoao Martins uint32_t clock_frequency; 32150c88402SJoao Martins }; 32250c88402SJoao Martins #endif /* __XEN__ || __XEN_TOOLS__ */ 32350c88402SJoao Martins 32450c88402SJoao Martins struct arch_vcpu_info { 32550c88402SJoao Martins }; 32650c88402SJoao Martins typedef struct arch_vcpu_info arch_vcpu_info_t; 32750c88402SJoao Martins 32850c88402SJoao Martins struct arch_shared_info { 32950c88402SJoao Martins }; 33050c88402SJoao Martins typedef struct arch_shared_info arch_shared_info_t; 33150c88402SJoao Martins typedef uint64_t xen_callback_t; 33250c88402SJoao Martins 33350c88402SJoao Martins #endif 33450c88402SJoao Martins 33550c88402SJoao Martins #if defined(__XEN__) || defined(__XEN_TOOLS__) 33650c88402SJoao Martins 33750c88402SJoao Martins /* PSR bits (CPSR, SPSR) */ 33850c88402SJoao Martins 33950c88402SJoao Martins #define PSR_THUMB (1<<5) /* Thumb Mode enable */ 34050c88402SJoao Martins #define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ 34150c88402SJoao Martins #define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ 34250c88402SJoao Martins #define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ 34350c88402SJoao Martins #define PSR_BIG_ENDIAN (1<<9) /* arm32: Big Endian Mode */ 34450c88402SJoao Martins #define PSR_DBG_MASK (1<<9) /* arm64: Debug Exception mask */ 34550c88402SJoao Martins #define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */ 34650c88402SJoao Martins #define PSR_JAZELLE (1<<24) /* Jazelle Mode */ 3478ac98aedSDavid Woodhouse #define PSR_Z (1<<30) /* Zero condition flag */ 34850c88402SJoao Martins 34950c88402SJoao Martins /* 32 bit modes */ 35050c88402SJoao Martins #define PSR_MODE_USR 0x10 35150c88402SJoao Martins #define PSR_MODE_FIQ 0x11 35250c88402SJoao Martins #define PSR_MODE_IRQ 0x12 35350c88402SJoao Martins #define PSR_MODE_SVC 0x13 35450c88402SJoao Martins #define PSR_MODE_MON 0x16 35550c88402SJoao Martins #define PSR_MODE_ABT 0x17 35650c88402SJoao Martins #define PSR_MODE_HYP 0x1a 35750c88402SJoao Martins #define PSR_MODE_UND 0x1b 35850c88402SJoao Martins #define PSR_MODE_SYS 0x1f 35950c88402SJoao Martins 36050c88402SJoao Martins /* 64 bit modes */ 36150c88402SJoao Martins #define PSR_MODE_BIT 0x10 /* Set iff AArch32 */ 36250c88402SJoao Martins #define PSR_MODE_EL3h 0x0d 36350c88402SJoao Martins #define PSR_MODE_EL3t 0x0c 36450c88402SJoao Martins #define PSR_MODE_EL2h 0x09 36550c88402SJoao Martins #define PSR_MODE_EL2t 0x08 36650c88402SJoao Martins #define PSR_MODE_EL1h 0x05 36750c88402SJoao Martins #define PSR_MODE_EL1t 0x04 36850c88402SJoao Martins #define PSR_MODE_EL0t 0x00 36950c88402SJoao Martins 3708ac98aedSDavid Woodhouse /* 3718ac98aedSDavid Woodhouse * We set PSR_Z to be able to boot Linux kernel versions with an invalid 3728ac98aedSDavid Woodhouse * encoding of the first 8 NOP instructions. See commit a92882a4d270 in 3738ac98aedSDavid Woodhouse * Linux. 3748ac98aedSDavid Woodhouse * 3758ac98aedSDavid Woodhouse * Note that PSR_Z is also set by U-Boot and QEMU -kernel when loading 3768ac98aedSDavid Woodhouse * zImage kernels on aarch32. 3778ac98aedSDavid Woodhouse */ 3788ac98aedSDavid Woodhouse #define PSR_GUEST32_INIT (PSR_Z|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC) 37950c88402SJoao Martins #define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h) 38050c88402SJoao Martins 38150c88402SJoao Martins #define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078) 38250c88402SJoao Martins 38350c88402SJoao Martins /* 38450c88402SJoao Martins * Virtual machine platform (memory layout, interrupts) 38550c88402SJoao Martins * 38650c88402SJoao Martins * These are defined for consistency between the tools and the 38750c88402SJoao Martins * hypervisor. Guests must not rely on these hardcoded values but 38850c88402SJoao Martins * should instead use the FDT. 38950c88402SJoao Martins */ 39050c88402SJoao Martins 39150c88402SJoao Martins /* Physical Address Space */ 39250c88402SJoao Martins 3938ac98aedSDavid Woodhouse /* Virtio MMIO mappings */ 3948ac98aedSDavid Woodhouse #define GUEST_VIRTIO_MMIO_BASE xen_mk_ullong(0x02000000) 3958ac98aedSDavid Woodhouse #define GUEST_VIRTIO_MMIO_SIZE xen_mk_ullong(0x00100000) 3968ac98aedSDavid Woodhouse 39750c88402SJoao Martins /* 39850c88402SJoao Martins * vGIC mappings: Only one set of mapping is used by the guest. 39950c88402SJoao Martins * Therefore they can overlap. 40050c88402SJoao Martins */ 40150c88402SJoao Martins 40250c88402SJoao Martins /* vGIC v2 mappings */ 40350c88402SJoao Martins #define GUEST_GICD_BASE xen_mk_ullong(0x03001000) 40450c88402SJoao Martins #define GUEST_GICD_SIZE xen_mk_ullong(0x00001000) 40550c88402SJoao Martins #define GUEST_GICC_BASE xen_mk_ullong(0x03002000) 40650c88402SJoao Martins #define GUEST_GICC_SIZE xen_mk_ullong(0x00002000) 40750c88402SJoao Martins 40850c88402SJoao Martins /* vGIC v3 mappings */ 40950c88402SJoao Martins #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000) 41050c88402SJoao Martins #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000) 41150c88402SJoao Martins 41250c88402SJoao Martins #define GUEST_GICV3_RDIST_REGIONS 1 41350c88402SJoao Martins 41450c88402SJoao Martins #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ 41550c88402SJoao Martins #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000) 41650c88402SJoao Martins 41750c88402SJoao Martins /* 41850c88402SJoao Martins * 256 MB is reserved for VPCI configuration space based on calculation 41950c88402SJoao Martins * 256 buses x 32 devices x 8 functions x 4 KB = 256 MB 42050c88402SJoao Martins */ 42150c88402SJoao Martins #define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000) 42250c88402SJoao Martins #define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000) 42350c88402SJoao Martins 42450c88402SJoao Martins /* ACPI tables physical address */ 42550c88402SJoao Martins #define GUEST_ACPI_BASE xen_mk_ullong(0x20000000) 42650c88402SJoao Martins #define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000) 42750c88402SJoao Martins 42850c88402SJoao Martins /* PL011 mappings */ 42950c88402SJoao Martins #define GUEST_PL011_BASE xen_mk_ullong(0x22000000) 43050c88402SJoao Martins #define GUEST_PL011_SIZE xen_mk_ullong(0x00001000) 43150c88402SJoao Martins 43250c88402SJoao Martins /* Guest PCI-PCIe memory space where config space and BAR will be available.*/ 43350c88402SJoao Martins #define GUEST_VPCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000) 43450c88402SJoao Martins #define GUEST_VPCI_MEM_ADDR xen_mk_ullong(0x23000000) 43550c88402SJoao Martins #define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x10000000) 43650c88402SJoao Martins 43750c88402SJoao Martins /* 43850c88402SJoao Martins * 16MB == 4096 pages reserved for guest to use as a region to map its 43950c88402SJoao Martins * grant table in. 44050c88402SJoao Martins */ 44150c88402SJoao Martins #define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000) 44250c88402SJoao Martins #define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000) 44350c88402SJoao Martins 44450c88402SJoao Martins #define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) 44550c88402SJoao Martins #define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) 44650c88402SJoao Martins 44750c88402SJoao Martins #define GUEST_RAM_BANKS 2 44850c88402SJoao Martins 44950c88402SJoao Martins /* 45050c88402SJoao Martins * The way to find the extended regions (to be exposed to the guest as unused 45150c88402SJoao Martins * address space) relies on the fact that the regions reserved for the RAM 45250c88402SJoao Martins * below are big enough to also accommodate such regions. 45350c88402SJoao Martins */ 45450c88402SJoao Martins #define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */ 45550c88402SJoao Martins #define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000) 45650c88402SJoao Martins 45750c88402SJoao Martins /* 4GB @ 4GB Prefetch Memory for VPCI */ 45850c88402SJoao Martins #define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x42000000) 45950c88402SJoao Martins #define GUEST_VPCI_PREFETCH_MEM_ADDR xen_mk_ullong(0x100000000) 46050c88402SJoao Martins #define GUEST_VPCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x100000000) 46150c88402SJoao Martins 46250c88402SJoao Martins #define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */ 46350c88402SJoao Martins #define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000) 46450c88402SJoao Martins 46550c88402SJoao Martins #define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ 46650c88402SJoao Martins /* Largest amount of actual RAM, not including holes */ 46750c88402SJoao Martins #define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) 46850c88402SJoao Martins /* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */ 46950c88402SJoao Martins #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } 47050c88402SJoao Martins #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } 47150c88402SJoao Martins 47250c88402SJoao Martins /* Current supported guest VCPUs */ 47350c88402SJoao Martins #define GUEST_MAX_VCPUS 128 47450c88402SJoao Martins 47550c88402SJoao Martins /* Interrupts */ 47650c88402SJoao Martins #define GUEST_TIMER_VIRT_PPI 27 47750c88402SJoao Martins #define GUEST_TIMER_PHYS_S_PPI 29 47850c88402SJoao Martins #define GUEST_TIMER_PHYS_NS_PPI 30 47950c88402SJoao Martins #define GUEST_EVTCHN_PPI 31 48050c88402SJoao Martins 48150c88402SJoao Martins #define GUEST_VPL011_SPI 32 48250c88402SJoao Martins 4838ac98aedSDavid Woodhouse #define GUEST_VIRTIO_MMIO_SPI_FIRST 33 4848ac98aedSDavid Woodhouse #define GUEST_VIRTIO_MMIO_SPI_LAST 43 4858ac98aedSDavid Woodhouse 48650c88402SJoao Martins /* PSCI functions */ 48750c88402SJoao Martins #define PSCI_cpu_suspend 0 48850c88402SJoao Martins #define PSCI_cpu_off 1 48950c88402SJoao Martins #define PSCI_cpu_on 2 49050c88402SJoao Martins #define PSCI_migrate 3 49150c88402SJoao Martins 49250c88402SJoao Martins #endif 49350c88402SJoao Martins 49450c88402SJoao Martins #ifndef __ASSEMBLY__ 49550c88402SJoao Martins /* Stub definition of PMU structure */ 49650c88402SJoao Martins typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; 49750c88402SJoao Martins #endif 49850c88402SJoao Martins 49950c88402SJoao Martins #endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ 50050c88402SJoao Martins 50150c88402SJoao Martins /* 50250c88402SJoao Martins * Local variables: 50350c88402SJoao Martins * mode: C 50450c88402SJoao Martins * c-file-style: "BSD" 50550c88402SJoao Martins * c-basic-offset: 4 50650c88402SJoao Martins * tab-width: 4 50750c88402SJoao Martins * indent-tabs-mode: nil 50850c88402SJoao Martins * End: 50950c88402SJoao Martins */ 510