1d3582cfdSPhilippe Mathieu-Daudé /* 2d3582cfdSPhilippe Mathieu-Daudé * Tiny Code Generator for QEMU 3d3582cfdSPhilippe Mathieu-Daudé * 4d3582cfdSPhilippe Mathieu-Daudé * Copyright (c) 2008 Fabrice Bellard 5d3582cfdSPhilippe Mathieu-Daudé * 6d3582cfdSPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 7d3582cfdSPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 8d3582cfdSPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 9d3582cfdSPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10d3582cfdSPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 11d3582cfdSPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 12d3582cfdSPhilippe Mathieu-Daudé * 13d3582cfdSPhilippe Mathieu-Daudé * The above copyright notice and this permission notice shall be included in 14d3582cfdSPhilippe Mathieu-Daudé * all copies or substantial portions of the Software. 15d3582cfdSPhilippe Mathieu-Daudé * 16d3582cfdSPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17d3582cfdSPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18d3582cfdSPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19d3582cfdSPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20d3582cfdSPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21d3582cfdSPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22d3582cfdSPhilippe Mathieu-Daudé * THE SOFTWARE. 23d3582cfdSPhilippe Mathieu-Daudé */ 24d3582cfdSPhilippe Mathieu-Daudé 25d3582cfdSPhilippe Mathieu-Daudé /* 26d3582cfdSPhilippe Mathieu-Daudé * DEF(name, oargs, iargs, cargs, flags) 27d3582cfdSPhilippe Mathieu-Daudé */ 28d3582cfdSPhilippe Mathieu-Daudé 29d3582cfdSPhilippe Mathieu-Daudé /* predefined ops */ 30d3582cfdSPhilippe Mathieu-Daudé DEF(discard, 1, 0, 0, TCG_OPF_NOT_PRESENT) 31d3582cfdSPhilippe Mathieu-Daudé DEF(set_label, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT) 32d3582cfdSPhilippe Mathieu-Daudé 33d3582cfdSPhilippe Mathieu-Daudé /* variable number of parameters */ 34d3582cfdSPhilippe Mathieu-Daudé DEF(call, 0, 0, 3, TCG_OPF_CALL_CLOBBER | TCG_OPF_NOT_PRESENT) 35d3582cfdSPhilippe Mathieu-Daudé 36d3582cfdSPhilippe Mathieu-Daudé DEF(br, 0, 0, 1, TCG_OPF_BB_END) 37d3582cfdSPhilippe Mathieu-Daudé 38d3582cfdSPhilippe Mathieu-Daudé #define IMPL(X) (__builtin_constant_p(X) && (X) <= 0 ? TCG_OPF_NOT_PRESENT : 0) 39d3582cfdSPhilippe Mathieu-Daudé #if TCG_TARGET_REG_BITS == 32 40d3582cfdSPhilippe Mathieu-Daudé # define IMPL64 TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT 41d3582cfdSPhilippe Mathieu-Daudé #else 42d3582cfdSPhilippe Mathieu-Daudé # define IMPL64 TCG_OPF_64BIT 43d3582cfdSPhilippe Mathieu-Daudé #endif 44d3582cfdSPhilippe Mathieu-Daudé 45d3582cfdSPhilippe Mathieu-Daudé DEF(mb, 0, 0, 1, 0) 46d3582cfdSPhilippe Mathieu-Daudé 47d3582cfdSPhilippe Mathieu-Daudé DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT) 48d3582cfdSPhilippe Mathieu-Daudé DEF(setcond_i32, 1, 2, 1, 0) 49d3582cfdSPhilippe Mathieu-Daudé DEF(movcond_i32, 1, 4, 1, IMPL(TCG_TARGET_HAS_movcond_i32)) 50d3582cfdSPhilippe Mathieu-Daudé /* load/store */ 51d3582cfdSPhilippe Mathieu-Daudé DEF(ld8u_i32, 1, 1, 1, 0) 52d3582cfdSPhilippe Mathieu-Daudé DEF(ld8s_i32, 1, 1, 1, 0) 53d3582cfdSPhilippe Mathieu-Daudé DEF(ld16u_i32, 1, 1, 1, 0) 54d3582cfdSPhilippe Mathieu-Daudé DEF(ld16s_i32, 1, 1, 1, 0) 55d3582cfdSPhilippe Mathieu-Daudé DEF(ld_i32, 1, 1, 1, 0) 56d3582cfdSPhilippe Mathieu-Daudé DEF(st8_i32, 0, 2, 1, 0) 57d3582cfdSPhilippe Mathieu-Daudé DEF(st16_i32, 0, 2, 1, 0) 58d3582cfdSPhilippe Mathieu-Daudé DEF(st_i32, 0, 2, 1, 0) 59d3582cfdSPhilippe Mathieu-Daudé /* arith */ 60d3582cfdSPhilippe Mathieu-Daudé DEF(add_i32, 1, 2, 0, 0) 61d3582cfdSPhilippe Mathieu-Daudé DEF(sub_i32, 1, 2, 0, 0) 62d3582cfdSPhilippe Mathieu-Daudé DEF(mul_i32, 1, 2, 0, 0) 63d3582cfdSPhilippe Mathieu-Daudé DEF(div_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_div_i32)) 64d3582cfdSPhilippe Mathieu-Daudé DEF(divu_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_div_i32)) 65d3582cfdSPhilippe Mathieu-Daudé DEF(rem_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_rem_i32)) 66d3582cfdSPhilippe Mathieu-Daudé DEF(remu_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_rem_i32)) 67d3582cfdSPhilippe Mathieu-Daudé DEF(div2_i32, 2, 3, 0, IMPL(TCG_TARGET_HAS_div2_i32)) 68d3582cfdSPhilippe Mathieu-Daudé DEF(divu2_i32, 2, 3, 0, IMPL(TCG_TARGET_HAS_div2_i32)) 69d3582cfdSPhilippe Mathieu-Daudé DEF(and_i32, 1, 2, 0, 0) 70d3582cfdSPhilippe Mathieu-Daudé DEF(or_i32, 1, 2, 0, 0) 71d3582cfdSPhilippe Mathieu-Daudé DEF(xor_i32, 1, 2, 0, 0) 72d3582cfdSPhilippe Mathieu-Daudé /* shifts/rotates */ 73d3582cfdSPhilippe Mathieu-Daudé DEF(shl_i32, 1, 2, 0, 0) 74d3582cfdSPhilippe Mathieu-Daudé DEF(shr_i32, 1, 2, 0, 0) 75d3582cfdSPhilippe Mathieu-Daudé DEF(sar_i32, 1, 2, 0, 0) 76d3582cfdSPhilippe Mathieu-Daudé DEF(rotl_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_rot_i32)) 77d3582cfdSPhilippe Mathieu-Daudé DEF(rotr_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_rot_i32)) 78d3582cfdSPhilippe Mathieu-Daudé DEF(deposit_i32, 1, 2, 2, IMPL(TCG_TARGET_HAS_deposit_i32)) 79d3582cfdSPhilippe Mathieu-Daudé DEF(extract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_extract_i32)) 80d3582cfdSPhilippe Mathieu-Daudé DEF(sextract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_sextract_i32)) 81d3582cfdSPhilippe Mathieu-Daudé DEF(extract2_i32, 1, 2, 1, IMPL(TCG_TARGET_HAS_extract2_i32)) 82d3582cfdSPhilippe Mathieu-Daudé 83b4cb76e6SRichard Henderson DEF(brcond_i32, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH) 84d3582cfdSPhilippe Mathieu-Daudé 85d3582cfdSPhilippe Mathieu-Daudé DEF(add2_i32, 2, 4, 0, IMPL(TCG_TARGET_HAS_add2_i32)) 86d3582cfdSPhilippe Mathieu-Daudé DEF(sub2_i32, 2, 4, 0, IMPL(TCG_TARGET_HAS_sub2_i32)) 87d3582cfdSPhilippe Mathieu-Daudé DEF(mulu2_i32, 2, 2, 0, IMPL(TCG_TARGET_HAS_mulu2_i32)) 88d3582cfdSPhilippe Mathieu-Daudé DEF(muls2_i32, 2, 2, 0, IMPL(TCG_TARGET_HAS_muls2_i32)) 89d3582cfdSPhilippe Mathieu-Daudé DEF(muluh_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_muluh_i32)) 90d3582cfdSPhilippe Mathieu-Daudé DEF(mulsh_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i32)) 91b4cb76e6SRichard Henderson DEF(brcond2_i32, 0, 4, 2, 92b4cb76e6SRichard Henderson TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | IMPL(TCG_TARGET_REG_BITS == 32)) 93d3582cfdSPhilippe Mathieu-Daudé DEF(setcond2_i32, 1, 4, 1, IMPL(TCG_TARGET_REG_BITS == 32)) 94d3582cfdSPhilippe Mathieu-Daudé 95d3582cfdSPhilippe Mathieu-Daudé DEF(ext8s_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ext8s_i32)) 96d3582cfdSPhilippe Mathieu-Daudé DEF(ext16s_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ext16s_i32)) 97d3582cfdSPhilippe Mathieu-Daudé DEF(ext8u_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ext8u_i32)) 98d3582cfdSPhilippe Mathieu-Daudé DEF(ext16u_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ext16u_i32)) 99587195bdSRichard Henderson DEF(bswap16_i32, 1, 1, 1, IMPL(TCG_TARGET_HAS_bswap16_i32)) 100587195bdSRichard Henderson DEF(bswap32_i32, 1, 1, 1, IMPL(TCG_TARGET_HAS_bswap32_i32)) 101d3582cfdSPhilippe Mathieu-Daudé DEF(not_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_not_i32)) 102d3582cfdSPhilippe Mathieu-Daudé DEF(neg_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_neg_i32)) 103d3582cfdSPhilippe Mathieu-Daudé DEF(andc_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_andc_i32)) 104d3582cfdSPhilippe Mathieu-Daudé DEF(orc_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_orc_i32)) 105d3582cfdSPhilippe Mathieu-Daudé DEF(eqv_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_eqv_i32)) 106d3582cfdSPhilippe Mathieu-Daudé DEF(nand_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_nand_i32)) 107d3582cfdSPhilippe Mathieu-Daudé DEF(nor_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_nor_i32)) 108d3582cfdSPhilippe Mathieu-Daudé DEF(clz_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_clz_i32)) 109d3582cfdSPhilippe Mathieu-Daudé DEF(ctz_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_ctz_i32)) 110d3582cfdSPhilippe Mathieu-Daudé DEF(ctpop_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ctpop_i32)) 111d3582cfdSPhilippe Mathieu-Daudé 112d3582cfdSPhilippe Mathieu-Daudé DEF(mov_i64, 1, 1, 0, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT) 113d3582cfdSPhilippe Mathieu-Daudé DEF(setcond_i64, 1, 2, 1, IMPL64) 114d3582cfdSPhilippe Mathieu-Daudé DEF(movcond_i64, 1, 4, 1, IMPL64 | IMPL(TCG_TARGET_HAS_movcond_i64)) 115d3582cfdSPhilippe Mathieu-Daudé /* load/store */ 116d3582cfdSPhilippe Mathieu-Daudé DEF(ld8u_i64, 1, 1, 1, IMPL64) 117d3582cfdSPhilippe Mathieu-Daudé DEF(ld8s_i64, 1, 1, 1, IMPL64) 118d3582cfdSPhilippe Mathieu-Daudé DEF(ld16u_i64, 1, 1, 1, IMPL64) 119d3582cfdSPhilippe Mathieu-Daudé DEF(ld16s_i64, 1, 1, 1, IMPL64) 120d3582cfdSPhilippe Mathieu-Daudé DEF(ld32u_i64, 1, 1, 1, IMPL64) 121d3582cfdSPhilippe Mathieu-Daudé DEF(ld32s_i64, 1, 1, 1, IMPL64) 122d3582cfdSPhilippe Mathieu-Daudé DEF(ld_i64, 1, 1, 1, IMPL64) 123d3582cfdSPhilippe Mathieu-Daudé DEF(st8_i64, 0, 2, 1, IMPL64) 124d3582cfdSPhilippe Mathieu-Daudé DEF(st16_i64, 0, 2, 1, IMPL64) 125d3582cfdSPhilippe Mathieu-Daudé DEF(st32_i64, 0, 2, 1, IMPL64) 126d3582cfdSPhilippe Mathieu-Daudé DEF(st_i64, 0, 2, 1, IMPL64) 127d3582cfdSPhilippe Mathieu-Daudé /* arith */ 128d3582cfdSPhilippe Mathieu-Daudé DEF(add_i64, 1, 2, 0, IMPL64) 129d3582cfdSPhilippe Mathieu-Daudé DEF(sub_i64, 1, 2, 0, IMPL64) 130d3582cfdSPhilippe Mathieu-Daudé DEF(mul_i64, 1, 2, 0, IMPL64) 131d3582cfdSPhilippe Mathieu-Daudé DEF(div_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_div_i64)) 132d3582cfdSPhilippe Mathieu-Daudé DEF(divu_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_div_i64)) 133d3582cfdSPhilippe Mathieu-Daudé DEF(rem_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rem_i64)) 134d3582cfdSPhilippe Mathieu-Daudé DEF(remu_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rem_i64)) 135d3582cfdSPhilippe Mathieu-Daudé DEF(div2_i64, 2, 3, 0, IMPL64 | IMPL(TCG_TARGET_HAS_div2_i64)) 136d3582cfdSPhilippe Mathieu-Daudé DEF(divu2_i64, 2, 3, 0, IMPL64 | IMPL(TCG_TARGET_HAS_div2_i64)) 137d3582cfdSPhilippe Mathieu-Daudé DEF(and_i64, 1, 2, 0, IMPL64) 138d3582cfdSPhilippe Mathieu-Daudé DEF(or_i64, 1, 2, 0, IMPL64) 139d3582cfdSPhilippe Mathieu-Daudé DEF(xor_i64, 1, 2, 0, IMPL64) 140d3582cfdSPhilippe Mathieu-Daudé /* shifts/rotates */ 141d3582cfdSPhilippe Mathieu-Daudé DEF(shl_i64, 1, 2, 0, IMPL64) 142d3582cfdSPhilippe Mathieu-Daudé DEF(shr_i64, 1, 2, 0, IMPL64) 143d3582cfdSPhilippe Mathieu-Daudé DEF(sar_i64, 1, 2, 0, IMPL64) 144d3582cfdSPhilippe Mathieu-Daudé DEF(rotl_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rot_i64)) 145d3582cfdSPhilippe Mathieu-Daudé DEF(rotr_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rot_i64)) 146d3582cfdSPhilippe Mathieu-Daudé DEF(deposit_i64, 1, 2, 2, IMPL64 | IMPL(TCG_TARGET_HAS_deposit_i64)) 147d3582cfdSPhilippe Mathieu-Daudé DEF(extract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_extract_i64)) 148d3582cfdSPhilippe Mathieu-Daudé DEF(sextract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_sextract_i64)) 149d3582cfdSPhilippe Mathieu-Daudé DEF(extract2_i64, 1, 2, 1, IMPL64 | IMPL(TCG_TARGET_HAS_extract2_i64)) 150d3582cfdSPhilippe Mathieu-Daudé 151d3582cfdSPhilippe Mathieu-Daudé /* size changing ops */ 152d3582cfdSPhilippe Mathieu-Daudé DEF(ext_i32_i64, 1, 1, 0, IMPL64) 153d3582cfdSPhilippe Mathieu-Daudé DEF(extu_i32_i64, 1, 1, 0, IMPL64) 154d3582cfdSPhilippe Mathieu-Daudé DEF(extrl_i64_i32, 1, 1, 0, 155d3582cfdSPhilippe Mathieu-Daudé IMPL(TCG_TARGET_HAS_extrl_i64_i32) 156d3582cfdSPhilippe Mathieu-Daudé | (TCG_TARGET_REG_BITS == 32 ? TCG_OPF_NOT_PRESENT : 0)) 157d3582cfdSPhilippe Mathieu-Daudé DEF(extrh_i64_i32, 1, 1, 0, 158d3582cfdSPhilippe Mathieu-Daudé IMPL(TCG_TARGET_HAS_extrh_i64_i32) 159d3582cfdSPhilippe Mathieu-Daudé | (TCG_TARGET_REG_BITS == 32 ? TCG_OPF_NOT_PRESENT : 0)) 160d3582cfdSPhilippe Mathieu-Daudé 161b4cb76e6SRichard Henderson DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | IMPL64) 162d3582cfdSPhilippe Mathieu-Daudé DEF(ext8s_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext8s_i64)) 163d3582cfdSPhilippe Mathieu-Daudé DEF(ext16s_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext16s_i64)) 164d3582cfdSPhilippe Mathieu-Daudé DEF(ext32s_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext32s_i64)) 165d3582cfdSPhilippe Mathieu-Daudé DEF(ext8u_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext8u_i64)) 166d3582cfdSPhilippe Mathieu-Daudé DEF(ext16u_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext16u_i64)) 167d3582cfdSPhilippe Mathieu-Daudé DEF(ext32u_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext32u_i64)) 168587195bdSRichard Henderson DEF(bswap16_i64, 1, 1, 1, IMPL64 | IMPL(TCG_TARGET_HAS_bswap16_i64)) 169587195bdSRichard Henderson DEF(bswap32_i64, 1, 1, 1, IMPL64 | IMPL(TCG_TARGET_HAS_bswap32_i64)) 170587195bdSRichard Henderson DEF(bswap64_i64, 1, 1, 1, IMPL64 | IMPL(TCG_TARGET_HAS_bswap64_i64)) 171d3582cfdSPhilippe Mathieu-Daudé DEF(not_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_not_i64)) 172d3582cfdSPhilippe Mathieu-Daudé DEF(neg_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_neg_i64)) 173d3582cfdSPhilippe Mathieu-Daudé DEF(andc_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_andc_i64)) 174d3582cfdSPhilippe Mathieu-Daudé DEF(orc_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_orc_i64)) 175d3582cfdSPhilippe Mathieu-Daudé DEF(eqv_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_eqv_i64)) 176d3582cfdSPhilippe Mathieu-Daudé DEF(nand_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_nand_i64)) 177d3582cfdSPhilippe Mathieu-Daudé DEF(nor_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_nor_i64)) 178d3582cfdSPhilippe Mathieu-Daudé DEF(clz_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_clz_i64)) 179d3582cfdSPhilippe Mathieu-Daudé DEF(ctz_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ctz_i64)) 180d3582cfdSPhilippe Mathieu-Daudé DEF(ctpop_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ctpop_i64)) 181d3582cfdSPhilippe Mathieu-Daudé 182d3582cfdSPhilippe Mathieu-Daudé DEF(add2_i64, 2, 4, 0, IMPL64 | IMPL(TCG_TARGET_HAS_add2_i64)) 183d3582cfdSPhilippe Mathieu-Daudé DEF(sub2_i64, 2, 4, 0, IMPL64 | IMPL(TCG_TARGET_HAS_sub2_i64)) 184d3582cfdSPhilippe Mathieu-Daudé DEF(mulu2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_mulu2_i64)) 185d3582cfdSPhilippe Mathieu-Daudé DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64)) 186d3582cfdSPhilippe Mathieu-Daudé DEF(muluh_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muluh_i64)) 187d3582cfdSPhilippe Mathieu-Daudé DEF(mulsh_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_mulsh_i64)) 188d3582cfdSPhilippe Mathieu-Daudé 189d3582cfdSPhilippe Mathieu-Daudé #define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) 190d3582cfdSPhilippe Mathieu-Daudé #define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) 191d3582cfdSPhilippe Mathieu-Daudé 192d3582cfdSPhilippe Mathieu-Daudé /* QEMU specific */ 193d3582cfdSPhilippe Mathieu-Daudé DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS, 194d3582cfdSPhilippe Mathieu-Daudé TCG_OPF_NOT_PRESENT) 195d3582cfdSPhilippe Mathieu-Daudé DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END) 196d3582cfdSPhilippe Mathieu-Daudé DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END) 197f4e01e30SRichard Henderson DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_EXIT | TCG_OPF_BB_END) 198d3582cfdSPhilippe Mathieu-Daudé 199d3582cfdSPhilippe Mathieu-Daudé DEF(plugin_cb_start, 0, 0, 3, TCG_OPF_NOT_PRESENT) 200d3582cfdSPhilippe Mathieu-Daudé DEF(plugin_cb_end, 0, 0, 0, TCG_OPF_NOT_PRESENT) 201d3582cfdSPhilippe Mathieu-Daudé 202d3582cfdSPhilippe Mathieu-Daudé DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1, 203d3582cfdSPhilippe Mathieu-Daudé TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) 204d3582cfdSPhilippe Mathieu-Daudé DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 1, 205d3582cfdSPhilippe Mathieu-Daudé TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) 206d3582cfdSPhilippe Mathieu-Daudé DEF(qemu_ld_i64, DATA64_ARGS, TLADDR_ARGS, 1, 207d3582cfdSPhilippe Mathieu-Daudé TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT) 208d3582cfdSPhilippe Mathieu-Daudé DEF(qemu_st_i64, 0, TLADDR_ARGS + DATA64_ARGS, 1, 209d3582cfdSPhilippe Mathieu-Daudé TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT) 210d3582cfdSPhilippe Mathieu-Daudé 21107ce0b05SRichard Henderson /* Only used by i386 to cope with stupid register constraints. */ 21207ce0b05SRichard Henderson DEF(qemu_st8_i32, 0, TLADDR_ARGS + 1, 1, 21307ce0b05SRichard Henderson TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | 21407ce0b05SRichard Henderson IMPL(TCG_TARGET_HAS_qemu_st8_i32)) 21507ce0b05SRichard Henderson 216*12fde9bcSRichard Henderson /* Only for 64-bit hosts at the moment. */ 217*12fde9bcSRichard Henderson DEF(qemu_ld_i128, 2, 1, 1, 218*12fde9bcSRichard Henderson TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT | 219*12fde9bcSRichard Henderson IMPL(TCG_TARGET_HAS_qemu_ldst_i128)) 220*12fde9bcSRichard Henderson DEF(qemu_st_i128, 0, 3, 1, 221*12fde9bcSRichard Henderson TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT | 222*12fde9bcSRichard Henderson IMPL(TCG_TARGET_HAS_qemu_ldst_i128)) 223*12fde9bcSRichard Henderson 224d3582cfdSPhilippe Mathieu-Daudé /* Host vector support. */ 225d3582cfdSPhilippe Mathieu-Daudé 226d3582cfdSPhilippe Mathieu-Daudé #define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec) 227d3582cfdSPhilippe Mathieu-Daudé 228d3582cfdSPhilippe Mathieu-Daudé DEF(mov_vec, 1, 1, 0, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT) 229d3582cfdSPhilippe Mathieu-Daudé 230d3582cfdSPhilippe Mathieu-Daudé DEF(dup_vec, 1, 1, 0, IMPLVEC) 231d3582cfdSPhilippe Mathieu-Daudé DEF(dup2_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_REG_BITS == 32)) 232d3582cfdSPhilippe Mathieu-Daudé 233d3582cfdSPhilippe Mathieu-Daudé DEF(ld_vec, 1, 1, 1, IMPLVEC) 234d3582cfdSPhilippe Mathieu-Daudé DEF(st_vec, 0, 2, 1, IMPLVEC) 235d3582cfdSPhilippe Mathieu-Daudé DEF(dupm_vec, 1, 1, 1, IMPLVEC) 236d3582cfdSPhilippe Mathieu-Daudé 237d3582cfdSPhilippe Mathieu-Daudé DEF(add_vec, 1, 2, 0, IMPLVEC) 238d3582cfdSPhilippe Mathieu-Daudé DEF(sub_vec, 1, 2, 0, IMPLVEC) 239d3582cfdSPhilippe Mathieu-Daudé DEF(mul_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_mul_vec)) 240d3582cfdSPhilippe Mathieu-Daudé DEF(neg_vec, 1, 1, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_neg_vec)) 241d3582cfdSPhilippe Mathieu-Daudé DEF(abs_vec, 1, 1, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_abs_vec)) 242d3582cfdSPhilippe Mathieu-Daudé DEF(ssadd_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec)) 243d3582cfdSPhilippe Mathieu-Daudé DEF(usadd_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec)) 244d3582cfdSPhilippe Mathieu-Daudé DEF(sssub_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec)) 245d3582cfdSPhilippe Mathieu-Daudé DEF(ussub_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_sat_vec)) 246d3582cfdSPhilippe Mathieu-Daudé DEF(smin_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec)) 247d3582cfdSPhilippe Mathieu-Daudé DEF(umin_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec)) 248d3582cfdSPhilippe Mathieu-Daudé DEF(smax_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec)) 249d3582cfdSPhilippe Mathieu-Daudé DEF(umax_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_minmax_vec)) 250d3582cfdSPhilippe Mathieu-Daudé 251d3582cfdSPhilippe Mathieu-Daudé DEF(and_vec, 1, 2, 0, IMPLVEC) 252d3582cfdSPhilippe Mathieu-Daudé DEF(or_vec, 1, 2, 0, IMPLVEC) 253d3582cfdSPhilippe Mathieu-Daudé DEF(xor_vec, 1, 2, 0, IMPLVEC) 254d3582cfdSPhilippe Mathieu-Daudé DEF(andc_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_andc_vec)) 255d3582cfdSPhilippe Mathieu-Daudé DEF(orc_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_orc_vec)) 256ed523473SRichard Henderson DEF(nand_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_nand_vec)) 257ed523473SRichard Henderson DEF(nor_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_nor_vec)) 258ed523473SRichard Henderson DEF(eqv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_eqv_vec)) 259d3582cfdSPhilippe Mathieu-Daudé DEF(not_vec, 1, 1, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_not_vec)) 260d3582cfdSPhilippe Mathieu-Daudé 261d3582cfdSPhilippe Mathieu-Daudé DEF(shli_vec, 1, 1, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_shi_vec)) 262d3582cfdSPhilippe Mathieu-Daudé DEF(shri_vec, 1, 1, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_shi_vec)) 263d3582cfdSPhilippe Mathieu-Daudé DEF(sari_vec, 1, 1, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_shi_vec)) 264b0f7e744SRichard Henderson DEF(rotli_vec, 1, 1, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_roti_vec)) 265d3582cfdSPhilippe Mathieu-Daudé 266d3582cfdSPhilippe Mathieu-Daudé DEF(shls_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) 267d3582cfdSPhilippe Mathieu-Daudé DEF(shrs_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) 268d3582cfdSPhilippe Mathieu-Daudé DEF(sars_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shs_vec)) 26923850a74SRichard Henderson DEF(rotls_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_rots_vec)) 270d3582cfdSPhilippe Mathieu-Daudé 271d3582cfdSPhilippe Mathieu-Daudé DEF(shlv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec)) 272d3582cfdSPhilippe Mathieu-Daudé DEF(shrv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec)) 273d3582cfdSPhilippe Mathieu-Daudé DEF(sarv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec)) 2745d0ceda9SRichard Henderson DEF(rotlv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_rotv_vec)) 2755d0ceda9SRichard Henderson DEF(rotrv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_rotv_vec)) 276d3582cfdSPhilippe Mathieu-Daudé 277d3582cfdSPhilippe Mathieu-Daudé DEF(cmp_vec, 1, 2, 1, IMPLVEC) 278d3582cfdSPhilippe Mathieu-Daudé 279d3582cfdSPhilippe Mathieu-Daudé DEF(bitsel_vec, 1, 3, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_bitsel_vec)) 280d3582cfdSPhilippe Mathieu-Daudé DEF(cmpsel_vec, 1, 4, 1, IMPLVEC | IMPL(TCG_TARGET_HAS_cmpsel_vec)) 281d3582cfdSPhilippe Mathieu-Daudé 282d3582cfdSPhilippe Mathieu-Daudé DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) 283d3582cfdSPhilippe Mathieu-Daudé 284d3582cfdSPhilippe Mathieu-Daudé #if TCG_TARGET_MAYBE_vec 285d3582cfdSPhilippe Mathieu-Daudé #include "tcg-target.opc.h" 286d3582cfdSPhilippe Mathieu-Daudé #endif 287d3582cfdSPhilippe Mathieu-Daudé 2881bd1af98SRichard Henderson #ifdef TCG_TARGET_INTERPRETER 2891bd1af98SRichard Henderson /* These opcodes are only for use between the tci generator and interpreter. */ 29065089889SRichard Henderson DEF(tci_movi, 1, 0, 1, TCG_OPF_NOT_PRESENT) 29165089889SRichard Henderson DEF(tci_movl, 1, 0, 1, TCG_OPF_NOT_PRESENT) 2921bd1af98SRichard Henderson #endif 2931bd1af98SRichard Henderson 294d3582cfdSPhilippe Mathieu-Daudé #undef TLADDR_ARGS 295d3582cfdSPhilippe Mathieu-Daudé #undef DATA64_ARGS 296d3582cfdSPhilippe Mathieu-Daudé #undef IMPL 297d3582cfdSPhilippe Mathieu-Daudé #undef IMPL64 298d3582cfdSPhilippe Mathieu-Daudé #undef IMPLVEC 299d3582cfdSPhilippe Mathieu-Daudé #undef DEF 300