1*51800e43SRichard Henderson /* SPDX-License-Identifier: MIT */ 2*51800e43SRichard Henderson /* 3*51800e43SRichard Henderson * Define MIPS target-specific operand constraints. 4*51800e43SRichard Henderson * Copyright (c) 2021 Linaro 5*51800e43SRichard Henderson */ 6*51800e43SRichard Henderson 7*51800e43SRichard Henderson /* 8*51800e43SRichard Henderson * Define constraint letters for register sets: 9*51800e43SRichard Henderson * REGS(letter, register_mask) 10*51800e43SRichard Henderson */ 11*51800e43SRichard Henderson REGS('r', ALL_GENERAL_REGS) 12*51800e43SRichard Henderson 13*51800e43SRichard Henderson /* 14*51800e43SRichard Henderson * Define constraint letters for constants: 15*51800e43SRichard Henderson * CONST(letter, TCG_CT_CONST_* bit set) 16*51800e43SRichard Henderson */ 17*51800e43SRichard Henderson CONST('I', TCG_CT_CONST_U16) 18*51800e43SRichard Henderson CONST('J', TCG_CT_CONST_S16) 19*51800e43SRichard Henderson CONST('K', TCG_CT_CONST_P2M1) 20*51800e43SRichard Henderson CONST('N', TCG_CT_CONST_N16) 21*51800e43SRichard Henderson CONST('W', TCG_CT_CONST_WSZ) 22*51800e43SRichard Henderson CONST('Z', TCG_CT_CONST_ZERO) 23