xref: /reactos/dll/win32/dbghelp/cpu_arm.c (revision c2c66aff)
1 /*
2  * File cpu_arm.c
3  *
4  * Copyright (C) 2009 Eric Pouech
5  * Copyright (C) 2010, 2011 André Hentschel
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
20  */
21 
22 #include "dbghelp_private.h"
23 
24 WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
25 
26 static BOOL arm_get_addr(HANDLE hThread, const CONTEXT* ctx,
27                          enum cpu_addr ca, ADDRESS64* addr)
28 {
29     addr->Mode    = AddrModeFlat;
30     addr->Segment = 0; /* don't need segment */
31     switch (ca)
32     {
33 #ifdef __arm__
34     case cpu_addr_pc:    addr->Offset = ctx->Pc; return TRUE;
35     case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
36 #ifdef __REACTOS__
37     case cpu_addr_frame: addr->Offset = ctx->R11; return TRUE;
38 #else
39     case cpu_addr_frame: addr->Offset = ctx->Fp; return TRUE;
40 #endif
41 #endif
42     default: addr->Mode = -1;
43         return FALSE;
44     }
45 }
46 
47 #ifdef __arm__
48 enum st_mode {stm_start, stm_arm, stm_done};
49 
50 /* indexes in Reserved array */
51 #define __CurrentModeCount      0
52 
53 #define curr_mode   (frame->Reserved[__CurrentModeCount] & 0x0F)
54 #define curr_count  (frame->Reserved[__CurrentModeCount] >> 4)
55 
56 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);}
57 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10)
58 
59 /* fetch_next_frame()
60  *
61  * modify (at least) context.Pc using unwind information
62  * either out of debug info (dwarf), or simple Lr trace
63  */
64 static BOOL fetch_next_frame(struct cpu_stack_walk* csw,
65                                CONTEXT* context, DWORD_PTR curr_pc)
66 {
67     DWORD_PTR               xframe;
68     DWORD                   oldReturn = context->Lr;
69 
70     if (dwarf2_virtual_unwind(csw, curr_pc, context, &xframe))
71     {
72         context->Sp = xframe;
73         context->Pc = oldReturn;
74         return TRUE;
75     }
76 
77     if (context->Pc == context->Lr) return FALSE;
78     context->Pc = oldReturn;
79 
80     return TRUE;
81 }
82 
83 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
84 {
85     unsigned    deltapc = curr_count <= 1 ? 0 : 4;
86 
87     /* sanity check */
88     if (curr_mode >= stm_done) return FALSE;
89 
90     TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n",
91           wine_dbgstr_addr(&frame->AddrPC),
92           wine_dbgstr_addr(&frame->AddrFrame),
93           wine_dbgstr_addr(&frame->AddrReturn),
94           wine_dbgstr_addr(&frame->AddrStack),
95           curr_mode == stm_start ? "start" : "ARM",
96           wine_dbgstr_longlong(curr_count));
97 
98     if (curr_mode == stm_start)
99     {
100         /* Init done */
101         set_curr_mode(stm_arm);
102         frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat;
103         /* don't set up AddrStack on first call. Either the caller has set it up, or
104          * we will get it in the next frame
105          */
106         memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore));
107     }
108     else
109     {
110         if (context->Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n");
111         if (context->Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n");
112 
113         if (frame->AddrReturn.Offset == 0) goto done_err;
114         if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc))
115             goto done_err;
116     }
117 
118     memset(&frame->Params, 0, sizeof(frame->Params));
119 
120     /* set frame information */
121     frame->AddrStack.Offset = context->Sp;
122     frame->AddrReturn.Offset = context->Lr;
123 #ifdef __REACTOS__
124     frame->AddrFrame.Offset = context->R11;
125 #else
126     frame->AddrFrame.Offset = context->Fp;
127 #endif
128     frame->AddrPC.Offset = context->Pc;
129 
130     frame->Far = TRUE;
131     frame->Virtual = TRUE;
132     inc_curr_count();
133 
134     TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n",
135           wine_dbgstr_addr(&frame->AddrPC),
136           wine_dbgstr_addr(&frame->AddrFrame),
137           wine_dbgstr_addr(&frame->AddrReturn),
138           wine_dbgstr_addr(&frame->AddrStack),
139           curr_mode == stm_start ? "start" : "ARM",
140           wine_dbgstr_longlong(curr_count),
141           frame->FuncTableEntry);
142 
143     return TRUE;
144 done_err:
145     set_curr_mode(stm_done);
146     return FALSE;
147 }
148 #else
149 static BOOL arm_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
150 {
151     return FALSE;
152 }
153 #endif
154 
155 static unsigned arm_map_dwarf_register(unsigned regno, BOOL eh_frame)
156 {
157     if (regno <= 15) return CV_ARM_R0 + regno;
158     if (regno == 128) return CV_ARM_CPSR;
159 
160     FIXME("Don't know how to map register %d\n", regno);
161     return CV_ARM_NOREG;
162 }
163 
164 static void* arm_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* size)
165 {
166 #ifdef __arm__
167     switch (regno)
168     {
169     case CV_ARM_R0 +  0: *size = sizeof(ctx->R0); return &ctx->R0;
170     case CV_ARM_R0 +  1: *size = sizeof(ctx->R1); return &ctx->R1;
171     case CV_ARM_R0 +  2: *size = sizeof(ctx->R2); return &ctx->R2;
172     case CV_ARM_R0 +  3: *size = sizeof(ctx->R3); return &ctx->R3;
173     case CV_ARM_R0 +  4: *size = sizeof(ctx->R4); return &ctx->R4;
174     case CV_ARM_R0 +  5: *size = sizeof(ctx->R5); return &ctx->R5;
175     case CV_ARM_R0 +  6: *size = sizeof(ctx->R6); return &ctx->R6;
176     case CV_ARM_R0 +  7: *size = sizeof(ctx->R7); return &ctx->R7;
177     case CV_ARM_R0 +  8: *size = sizeof(ctx->R8); return &ctx->R8;
178     case CV_ARM_R0 +  9: *size = sizeof(ctx->R9); return &ctx->R9;
179     case CV_ARM_R0 + 10: *size = sizeof(ctx->R10); return &ctx->R10;
180 #ifdef __REACTOS__
181     case CV_ARM_R0 + 11: *size = sizeof(ctx->R11); return &ctx->R11;
182     case CV_ARM_R0 + 12: *size = sizeof(ctx->R12); return &ctx->R12;
183 #else
184     case CV_ARM_R0 + 11: *size = sizeof(ctx->Fp); return &ctx->Fp;
185     case CV_ARM_R0 + 12: *size = sizeof(ctx->Ip); return &ctx->Ip;
186 #endif
187 
188     case CV_ARM_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
189     case CV_ARM_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
190     case CV_ARM_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
191     case CV_ARM_CPSR: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
192     }
193 #endif
194     FIXME("Unknown register %x\n", regno);
195     return NULL;
196 }
197 
198 static const char* arm_fetch_regname(unsigned regno)
199 {
200     switch (regno)
201     {
202     case CV_ARM_R0 +  0: return "r0";
203     case CV_ARM_R0 +  1: return "r1";
204     case CV_ARM_R0 +  2: return "r2";
205     case CV_ARM_R0 +  3: return "r3";
206     case CV_ARM_R0 +  4: return "r4";
207     case CV_ARM_R0 +  5: return "r5";
208     case CV_ARM_R0 +  6: return "r6";
209     case CV_ARM_R0 +  7: return "r7";
210     case CV_ARM_R0 +  8: return "r8";
211     case CV_ARM_R0 +  9: return "r9";
212     case CV_ARM_R0 + 10: return "r10";
213     case CV_ARM_R0 + 11: return "r11";
214     case CV_ARM_R0 + 12: return "r12";
215 
216     case CV_ARM_SP: return "sp";
217     case CV_ARM_LR: return "lr";
218     case CV_ARM_PC: return "pc";
219     case CV_ARM_CPSR: return "cpsr";
220     }
221     FIXME("Unknown register %x\n", regno);
222     return NULL;
223 }
224 
225 static BOOL arm_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
226 {
227     if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
228     {
229         /* FIXME: crop values across module boundaries, */
230 #ifdef __arm__
231         ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
232         minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
233 #endif
234     }
235 
236     return TRUE;
237 }
238 
239 static BOOL arm_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
240 {
241     /* FIXME: actually, we should probably take care of FPO data, unless it's stored in
242      * function table minidump stream
243      */
244     return FALSE;
245 }
246 
247 DECLSPEC_HIDDEN struct cpu cpu_arm = {
248     IMAGE_FILE_MACHINE_ARMNT,
249     4,
250     CV_ARM_R0 + 11,
251     arm_get_addr,
252     arm_stack_walk,
253     NULL,
254     arm_map_dwarf_register,
255     arm_fetch_context_reg,
256     arm_fetch_regname,
257     arm_fetch_minidump_thread,
258     arm_fetch_minidump_module,
259 };
260