1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2021, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 48 /******************************************************************************* 49 * 50 * Additional ACPI Tables (2) 51 * 52 * These tables are not consumed directly by the ACPICA subsystem, but are 53 * included here to support device drivers and the AML disassembler. 54 * 55 ******************************************************************************/ 56 57 58 /* 59 * Values for description table header signatures for tables defined in this 60 * file. Useful because they make it more difficult to inadvertently type in 61 * the wrong signature. 62 */ 63 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 64 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 65 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 66 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 67 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 68 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 69 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 70 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 71 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 72 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 73 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 74 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 75 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 76 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 77 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 78 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 79 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 80 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 81 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 82 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 83 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 84 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 85 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 86 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 87 88 89 /* 90 * All tables must be byte-packed to match the ACPI specification, since 91 * the tables are provided by the system BIOS. 92 */ 93 #pragma pack(1) 94 95 /* 96 * Note: C bitfields are not used for this reason: 97 * 98 * "Bitfields are great and easy to read, but unfortunately the C language 99 * does not specify the layout of bitfields in memory, which means they are 100 * essentially useless for dealing with packed data in on-disk formats or 101 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 102 * this decision was a design error in C. Ritchie could have picked an order 103 * and stuck with it." Norman Ramsey. 104 * See http://stackoverflow.com/a/1053662/41661 105 */ 106 107 108 /******************************************************************************* 109 * 110 * AEST - Arm Error Source Table 111 * 112 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 113 * September 2020. 114 * 115 ******************************************************************************/ 116 117 typedef struct acpi_table_aest 118 { 119 ACPI_TABLE_HEADER Header; 120 void *NodeArray[]; 121 122 } ACPI_TABLE_AEST; 123 124 /* Common Subtable header - one per Node Structure (Subtable) */ 125 126 typedef struct acpi_aest_hdr 127 { 128 UINT8 Type; 129 UINT16 Length; 130 UINT8 Reserved; 131 UINT32 NodeSpecificOffset; 132 UINT32 NodeInterfaceOffset; 133 UINT32 NodeInterruptOffset; 134 UINT32 NodeInterruptCount; 135 UINT64 TimestampRate; 136 UINT64 Reserved1; 137 UINT64 ErrorInjectionRate; 138 139 } ACPI_AEST_HEADER; 140 141 /* Values for Type above */ 142 143 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 144 #define ACPI_AEST_MEMORY_ERROR_NODE 1 145 #define ACPI_AEST_SMMU_ERROR_NODE 2 146 #define ACPI_AEST_VENDOR_ERROR_NODE 3 147 #define ACPI_AEST_GIC_ERROR_NODE 4 148 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 149 150 151 /* 152 * AEST subtables (Error nodes) 153 */ 154 155 /* 0: Processor Error */ 156 157 typedef struct acpi_aest_processor 158 { 159 UINT32 ProcessorId; 160 UINT8 ResourceType; 161 UINT8 Reserved; 162 UINT8 Flags; 163 UINT8 Revision; 164 UINT64 ProcessorAffinity; 165 166 } ACPI_AEST_PROCESSOR; 167 168 /* Values for ResourceType above, related structs below */ 169 170 #define ACPI_AEST_CACHE_RESOURCE 0 171 #define ACPI_AEST_TLB_RESOURCE 1 172 #define ACPI_AEST_GENERIC_RESOURCE 2 173 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 174 175 /* 0R: Processor Cache Resource Substructure */ 176 177 typedef struct acpi_aest_processor_cache 178 { 179 UINT32 CacheReference; 180 UINT32 Reserved; 181 182 } ACPI_AEST_PROCESSOR_CACHE; 183 184 /* Values for CacheType above */ 185 186 #define ACPI_AEST_CACHE_DATA 0 187 #define ACPI_AEST_CACHE_INSTRUCTION 1 188 #define ACPI_AEST_CACHE_UNIFIED 2 189 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 190 191 /* 1R: Processor TLB Resource Substructure */ 192 193 typedef struct acpi_aest_processor_tlb 194 { 195 UINT32 TlbLevel; 196 UINT32 Reserved; 197 198 } ACPI_AEST_PROCESSOR_TLB; 199 200 /* 2R: Processor Generic Resource Substructure */ 201 202 typedef struct acpi_aest_processor_generic 203 { 204 UINT8 *Resource; 205 206 } ACPI_AEST_PROCESSOR_GENERIC; 207 208 /* 1: Memory Error */ 209 210 typedef struct acpi_aest_memory 211 { 212 UINT32 SratProximityDomain; 213 214 } ACPI_AEST_MEMORY; 215 216 /* 2: Smmu Error */ 217 218 typedef struct acpi_aest_smmu 219 { 220 UINT32 IortNodeReference; 221 UINT32 SubcomponentReference; 222 223 } ACPI_AEST_SMMU; 224 225 /* 3: Vendor Defined */ 226 227 typedef struct acpi_aest_vendor 228 { 229 UINT32 AcpiHid; 230 UINT32 AcpiUid; 231 UINT8 VendorSpecificData[16]; 232 233 } ACPI_AEST_VENDOR; 234 235 /* 4: Gic Error */ 236 237 typedef struct acpi_aest_gic 238 { 239 UINT32 InterfaceType; 240 UINT32 InstanceId; 241 242 } ACPI_AEST_GIC; 243 244 /* Values for InterfaceType above */ 245 246 #define ACPI_AEST_GIC_CPU 0 247 #define ACPI_AEST_GIC_DISTRIBUTOR 1 248 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 249 #define ACPI_AEST_GIC_ITS 3 250 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 251 252 253 /* Node Interface Structure */ 254 255 typedef struct acpi_aest_node_interface 256 { 257 UINT8 Type; 258 UINT8 Reserved[3]; 259 UINT32 Flags; 260 UINT64 Address; 261 UINT32 ErrorRecordIndex; 262 UINT32 ErrorRecordCount; 263 UINT64 ErrorRecordImplemented; 264 UINT64 ErrorStatusReporting; 265 UINT64 AddressingMode; 266 267 } ACPI_AEST_NODE_INTERFACE; 268 269 /* Values for Type field above */ 270 271 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 272 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 273 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 274 275 /* Node Interrupt Structure */ 276 277 typedef struct acpi_aest_node_interrupt 278 { 279 UINT8 Type; 280 UINT8 Reserved[2]; 281 UINT8 Flags; 282 UINT32 Gsiv; 283 UINT8 IortId; 284 UINT8 Reserved1[3]; 285 286 } ACPI_AEST_NODE_INTERRUPT; 287 288 /* Values for Type field above */ 289 290 #define ACPI_AEST_NODE_FAULT_HANDLING 0 291 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 292 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 293 294 295 /******************************************************************************* 296 * 297 * BDAT - BIOS Data ACPI Table 298 * 299 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 300 * Nov 2020 301 * 302 ******************************************************************************/ 303 304 typedef struct acpi_table_bdat 305 { 306 ACPI_TABLE_HEADER Header; 307 ACPI_GENERIC_ADDRESS Gas; 308 309 } ACPI_TABLE_BDAT; 310 311 312 /******************************************************************************* 313 * 314 * IORT - IO Remapping Table 315 * 316 * Conforms to "IO Remapping Table System Software on ARM Platforms", 317 * Document number: ARM DEN 0049E.b, Feb 2021 318 * 319 ******************************************************************************/ 320 321 typedef struct acpi_table_iort 322 { 323 ACPI_TABLE_HEADER Header; 324 UINT32 NodeCount; 325 UINT32 NodeOffset; 326 UINT32 Reserved; 327 328 } ACPI_TABLE_IORT; 329 330 331 /* 332 * IORT subtables 333 */ 334 typedef struct acpi_iort_node 335 { 336 UINT8 Type; 337 UINT16 Length; 338 UINT8 Revision; 339 UINT32 Identifier; 340 UINT32 MappingCount; 341 UINT32 MappingOffset; 342 char NodeData[1]; 343 344 } ACPI_IORT_NODE; 345 346 /* Values for subtable Type above */ 347 348 enum AcpiIortNodeType 349 { 350 ACPI_IORT_NODE_ITS_GROUP = 0x00, 351 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 352 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 353 ACPI_IORT_NODE_SMMU = 0x03, 354 ACPI_IORT_NODE_SMMU_V3 = 0x04, 355 ACPI_IORT_NODE_PMCG = 0x05, 356 ACPI_IORT_NODE_RMR = 0x06, 357 }; 358 359 360 typedef struct acpi_iort_id_mapping 361 { 362 UINT32 InputBase; /* Lowest value in input range */ 363 UINT32 IdCount; /* Number of IDs */ 364 UINT32 OutputBase; /* Lowest value in output range */ 365 UINT32 OutputReference; /* A reference to the output node */ 366 UINT32 Flags; 367 368 } ACPI_IORT_ID_MAPPING; 369 370 /* Masks for Flags field above for IORT subtable */ 371 372 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 373 374 375 typedef struct acpi_iort_memory_access 376 { 377 UINT32 CacheCoherency; 378 UINT8 Hints; 379 UINT16 Reserved; 380 UINT8 MemoryFlags; 381 382 } ACPI_IORT_MEMORY_ACCESS; 383 384 /* Values for CacheCoherency field above */ 385 386 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 387 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 388 389 /* Masks for Hints field above */ 390 391 #define ACPI_IORT_HT_TRANSIENT (1) 392 #define ACPI_IORT_HT_WRITE (1<<1) 393 #define ACPI_IORT_HT_READ (1<<2) 394 #define ACPI_IORT_HT_OVERRIDE (1<<3) 395 396 /* Masks for MemoryFlags field above */ 397 398 #define ACPI_IORT_MF_COHERENCY (1) 399 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 400 401 402 /* 403 * IORT node specific subtables 404 */ 405 typedef struct acpi_iort_its_group 406 { 407 UINT32 ItsCount; 408 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 409 410 } ACPI_IORT_ITS_GROUP; 411 412 413 typedef struct acpi_iort_named_component 414 { 415 UINT32 NodeFlags; 416 UINT64 MemoryProperties; /* Memory access properties */ 417 UINT8 MemoryAddressLimit; /* Memory address size limit */ 418 char DeviceName[1]; /* Path of namespace object */ 419 420 } ACPI_IORT_NAMED_COMPONENT; 421 422 /* Masks for Flags field above */ 423 424 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 425 #define ACPI_IORT_NC_PASID_BITS (31<<1) 426 427 typedef struct acpi_iort_root_complex 428 { 429 UINT64 MemoryProperties; /* Memory access properties */ 430 UINT32 AtsAttribute; 431 UINT32 PciSegmentNumber; 432 UINT8 MemoryAddressLimit; /* Memory address size limit */ 433 UINT8 Reserved[3]; /* Reserved, must be zero */ 434 435 } ACPI_IORT_ROOT_COMPLEX; 436 437 /* Masks for AtsAttribute field above */ 438 439 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 440 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 441 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 442 443 444 typedef struct acpi_iort_smmu 445 { 446 UINT64 BaseAddress; /* SMMU base address */ 447 UINT64 Span; /* Length of memory range */ 448 UINT32 Model; 449 UINT32 Flags; 450 UINT32 GlobalInterruptOffset; 451 UINT32 ContextInterruptCount; 452 UINT32 ContextInterruptOffset; 453 UINT32 PmuInterruptCount; 454 UINT32 PmuInterruptOffset; 455 UINT64 Interrupts[1]; /* Interrupt array */ 456 457 } ACPI_IORT_SMMU; 458 459 /* Values for Model field above */ 460 461 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 462 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 463 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 464 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 465 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 466 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 467 468 /* Masks for Flags field above */ 469 470 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 471 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 472 473 /* Global interrupt format */ 474 475 typedef struct acpi_iort_smmu_gsi 476 { 477 UINT32 NSgIrpt; 478 UINT32 NSgIrptFlags; 479 UINT32 NSgCfgIrpt; 480 UINT32 NSgCfgIrptFlags; 481 482 } ACPI_IORT_SMMU_GSI; 483 484 485 typedef struct acpi_iort_smmu_v3 486 { 487 UINT64 BaseAddress; /* SMMUv3 base address */ 488 UINT32 Flags; 489 UINT32 Reserved; 490 UINT64 VatosAddress; 491 UINT32 Model; 492 UINT32 EventGsiv; 493 UINT32 PriGsiv; 494 UINT32 GerrGsiv; 495 UINT32 SyncGsiv; 496 UINT32 Pxm; 497 UINT32 IdMappingIndex; 498 499 } ACPI_IORT_SMMU_V3; 500 501 /* Values for Model field above */ 502 503 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 504 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 505 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 506 507 /* Masks for Flags field above */ 508 509 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 510 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 511 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 512 513 typedef struct acpi_iort_pmcg 514 { 515 UINT64 Page0BaseAddress; 516 UINT32 OverflowGsiv; 517 UINT32 NodeReference; 518 UINT64 Page1BaseAddress; 519 520 } ACPI_IORT_PMCG; 521 522 typedef struct acpi_iort_rmr { 523 UINT32 Flags; 524 UINT32 RmrCount; 525 UINT32 RmrOffset; 526 527 } ACPI_IORT_RMR; 528 529 typedef struct acpi_iort_rmr_desc { 530 UINT64 BaseAddress; 531 UINT64 Length; 532 UINT32 Reserved; 533 534 } ACPI_IORT_RMR_DESC; 535 536 /******************************************************************************* 537 * 538 * IVRS - I/O Virtualization Reporting Structure 539 * Version 1 540 * 541 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 542 * Revision 1.26, February 2009. 543 * 544 ******************************************************************************/ 545 546 typedef struct acpi_table_ivrs 547 { 548 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 549 UINT32 Info; /* Common virtualization info */ 550 UINT64 Reserved; 551 552 } ACPI_TABLE_IVRS; 553 554 /* Values for Info field above */ 555 556 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 557 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 558 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 559 560 561 /* IVRS subtable header */ 562 563 typedef struct acpi_ivrs_header 564 { 565 UINT8 Type; /* Subtable type */ 566 UINT8 Flags; 567 UINT16 Length; /* Subtable length */ 568 UINT16 DeviceId; /* ID of IOMMU */ 569 570 } ACPI_IVRS_HEADER; 571 572 /* Values for subtable Type above */ 573 574 enum AcpiIvrsType 575 { 576 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 577 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 578 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 579 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 580 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 581 ACPI_IVRS_TYPE_MEMORY3 = 0x22 582 }; 583 584 /* Masks for Flags field above for IVHD subtable */ 585 586 #define ACPI_IVHD_TT_ENABLE (1) 587 #define ACPI_IVHD_PASS_PW (1<<1) 588 #define ACPI_IVHD_RES_PASS_PW (1<<2) 589 #define ACPI_IVHD_ISOC (1<<3) 590 #define ACPI_IVHD_IOTLB (1<<4) 591 592 /* Masks for Flags field above for IVMD subtable */ 593 594 #define ACPI_IVMD_UNITY (1) 595 #define ACPI_IVMD_READ (1<<1) 596 #define ACPI_IVMD_WRITE (1<<2) 597 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 598 599 600 /* 601 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 602 */ 603 604 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 605 606 typedef struct acpi_ivrs_hardware_10 607 { 608 ACPI_IVRS_HEADER Header; 609 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 610 UINT64 BaseAddress; /* IOMMU control registers */ 611 UINT16 PciSegmentGroup; 612 UINT16 Info; /* MSI number and unit ID */ 613 UINT32 FeatureReporting; 614 615 } ACPI_IVRS_HARDWARE1; 616 617 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 618 619 typedef struct acpi_ivrs_hardware_11 620 { 621 ACPI_IVRS_HEADER Header; 622 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 623 UINT64 BaseAddress; /* IOMMU control registers */ 624 UINT16 PciSegmentGroup; 625 UINT16 Info; /* MSI number and unit ID */ 626 UINT32 Attributes; 627 UINT64 EfrRegisterImage; 628 UINT64 Reserved; 629 } ACPI_IVRS_HARDWARE2; 630 631 /* Masks for Info field above */ 632 633 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 634 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 635 636 637 /* 638 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 639 * Upper two bits of the Type field are the (encoded) length of the structure. 640 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 641 * are reserved for future use but not defined. 642 */ 643 typedef struct acpi_ivrs_de_header 644 { 645 UINT8 Type; 646 UINT16 Id; 647 UINT8 DataSetting; 648 649 } ACPI_IVRS_DE_HEADER; 650 651 /* Length of device entry is in the top two bits of Type field above */ 652 653 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 654 655 /* Values for device entry Type field above */ 656 657 enum AcpiIvrsDeviceEntryType 658 { 659 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 660 661 ACPI_IVRS_TYPE_PAD4 = 0, 662 ACPI_IVRS_TYPE_ALL = 1, 663 ACPI_IVRS_TYPE_SELECT = 2, 664 ACPI_IVRS_TYPE_START = 3, 665 ACPI_IVRS_TYPE_END = 4, 666 667 /* 8-byte device entries */ 668 669 ACPI_IVRS_TYPE_PAD8 = 64, 670 ACPI_IVRS_TYPE_NOT_USED = 65, 671 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 672 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 673 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 674 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 675 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 676 677 /* Variable-length device entries */ 678 679 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 680 }; 681 682 /* Values for Data field above */ 683 684 #define ACPI_IVHD_INIT_PASS (1) 685 #define ACPI_IVHD_EINT_PASS (1<<1) 686 #define ACPI_IVHD_NMI_PASS (1<<2) 687 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 688 #define ACPI_IVHD_LINT0_PASS (1<<6) 689 #define ACPI_IVHD_LINT1_PASS (1<<7) 690 691 692 /* Types 0-4: 4-byte device entry */ 693 694 typedef struct acpi_ivrs_device4 695 { 696 ACPI_IVRS_DE_HEADER Header; 697 698 } ACPI_IVRS_DEVICE4; 699 700 /* Types 66-67: 8-byte device entry */ 701 702 typedef struct acpi_ivrs_device8a 703 { 704 ACPI_IVRS_DE_HEADER Header; 705 UINT8 Reserved1; 706 UINT16 UsedId; 707 UINT8 Reserved2; 708 709 } ACPI_IVRS_DEVICE8A; 710 711 /* Types 70-71: 8-byte device entry */ 712 713 typedef struct acpi_ivrs_device8b 714 { 715 ACPI_IVRS_DE_HEADER Header; 716 UINT32 ExtendedData; 717 718 } ACPI_IVRS_DEVICE8B; 719 720 /* Values for ExtendedData above */ 721 722 #define ACPI_IVHD_ATS_DISABLED (1<<31) 723 724 /* Type 72: 8-byte device entry */ 725 726 typedef struct acpi_ivrs_device8c 727 { 728 ACPI_IVRS_DE_HEADER Header; 729 UINT8 Handle; 730 UINT16 UsedId; 731 UINT8 Variety; 732 733 } ACPI_IVRS_DEVICE8C; 734 735 /* Values for Variety field above */ 736 737 #define ACPI_IVHD_IOAPIC 1 738 #define ACPI_IVHD_HPET 2 739 740 /* Type 240: variable-length device entry */ 741 742 typedef struct acpi_ivrs_device_hid 743 { 744 ACPI_IVRS_DE_HEADER Header; 745 UINT64 AcpiHid; 746 UINT64 AcpiCid; 747 UINT8 UidType; 748 UINT8 UidLength; 749 750 } ACPI_IVRS_DEVICE_HID; 751 752 /* Values for UidType above */ 753 754 #define ACPI_IVRS_UID_NOT_PRESENT 0 755 #define ACPI_IVRS_UID_IS_INTEGER 1 756 #define ACPI_IVRS_UID_IS_STRING 2 757 758 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 759 760 typedef struct acpi_ivrs_memory 761 { 762 ACPI_IVRS_HEADER Header; 763 UINT16 AuxData; 764 UINT64 Reserved; 765 UINT64 StartAddress; 766 UINT64 MemoryLength; 767 768 } ACPI_IVRS_MEMORY; 769 770 771 /******************************************************************************* 772 * 773 * LPIT - Low Power Idle Table 774 * 775 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 776 * 777 ******************************************************************************/ 778 779 typedef struct acpi_table_lpit 780 { 781 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 782 783 } ACPI_TABLE_LPIT; 784 785 786 /* LPIT subtable header */ 787 788 typedef struct acpi_lpit_header 789 { 790 UINT32 Type; /* Subtable type */ 791 UINT32 Length; /* Subtable length */ 792 UINT16 UniqueId; 793 UINT16 Reserved; 794 UINT32 Flags; 795 796 } ACPI_LPIT_HEADER; 797 798 /* Values for subtable Type above */ 799 800 enum AcpiLpitType 801 { 802 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 803 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 804 }; 805 806 /* Masks for Flags field above */ 807 808 #define ACPI_LPIT_STATE_DISABLED (1) 809 #define ACPI_LPIT_NO_COUNTER (1<<1) 810 811 /* 812 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 813 */ 814 815 /* 0x00: Native C-state instruction based LPI structure */ 816 817 typedef struct acpi_lpit_native 818 { 819 ACPI_LPIT_HEADER Header; 820 ACPI_GENERIC_ADDRESS EntryTrigger; 821 UINT32 Residency; 822 UINT32 Latency; 823 ACPI_GENERIC_ADDRESS ResidencyCounter; 824 UINT64 CounterFrequency; 825 826 } ACPI_LPIT_NATIVE; 827 828 829 /******************************************************************************* 830 * 831 * MADT - Multiple APIC Description Table 832 * Version 3 833 * 834 ******************************************************************************/ 835 836 typedef struct acpi_table_madt 837 { 838 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 839 UINT32 Address; /* Physical address of local APIC */ 840 UINT32 Flags; 841 842 } ACPI_TABLE_MADT; 843 844 /* Masks for Flags field above */ 845 846 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 847 848 /* Values for PCATCompat flag */ 849 850 #define ACPI_MADT_DUAL_PIC 1 851 #define ACPI_MADT_MULTIPLE_APIC 0 852 853 854 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 855 856 enum AcpiMadtType 857 { 858 ACPI_MADT_TYPE_LOCAL_APIC = 0, 859 ACPI_MADT_TYPE_IO_APIC = 1, 860 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 861 ACPI_MADT_TYPE_NMI_SOURCE = 3, 862 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 863 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 864 ACPI_MADT_TYPE_IO_SAPIC = 6, 865 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 866 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 867 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 868 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 869 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 870 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 871 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 872 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 873 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 874 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 875 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 876 }; 877 878 879 /* 880 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 881 */ 882 883 /* 0: Processor Local APIC */ 884 885 typedef struct acpi_madt_local_apic 886 { 887 ACPI_SUBTABLE_HEADER Header; 888 UINT8 ProcessorId; /* ACPI processor id */ 889 UINT8 Id; /* Processor's local APIC id */ 890 UINT32 LapicFlags; 891 892 } ACPI_MADT_LOCAL_APIC; 893 894 895 /* 1: IO APIC */ 896 897 typedef struct acpi_madt_io_apic 898 { 899 ACPI_SUBTABLE_HEADER Header; 900 UINT8 Id; /* I/O APIC ID */ 901 UINT8 Reserved; /* Reserved - must be zero */ 902 UINT32 Address; /* APIC physical address */ 903 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 904 905 } ACPI_MADT_IO_APIC; 906 907 908 /* 2: Interrupt Override */ 909 910 typedef struct acpi_madt_interrupt_override 911 { 912 ACPI_SUBTABLE_HEADER Header; 913 UINT8 Bus; /* 0 - ISA */ 914 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 915 UINT32 GlobalIrq; /* Global system interrupt */ 916 UINT16 IntiFlags; 917 918 } ACPI_MADT_INTERRUPT_OVERRIDE; 919 920 921 /* 3: NMI Source */ 922 923 typedef struct acpi_madt_nmi_source 924 { 925 ACPI_SUBTABLE_HEADER Header; 926 UINT16 IntiFlags; 927 UINT32 GlobalIrq; /* Global system interrupt */ 928 929 } ACPI_MADT_NMI_SOURCE; 930 931 932 /* 4: Local APIC NMI */ 933 934 typedef struct acpi_madt_local_apic_nmi 935 { 936 ACPI_SUBTABLE_HEADER Header; 937 UINT8 ProcessorId; /* ACPI processor id */ 938 UINT16 IntiFlags; 939 UINT8 Lint; /* LINTn to which NMI is connected */ 940 941 } ACPI_MADT_LOCAL_APIC_NMI; 942 943 944 /* 5: Address Override */ 945 946 typedef struct acpi_madt_local_apic_override 947 { 948 ACPI_SUBTABLE_HEADER Header; 949 UINT16 Reserved; /* Reserved, must be zero */ 950 UINT64 Address; /* APIC physical address */ 951 952 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 953 954 955 /* 6: I/O Sapic */ 956 957 typedef struct acpi_madt_io_sapic 958 { 959 ACPI_SUBTABLE_HEADER Header; 960 UINT8 Id; /* I/O SAPIC ID */ 961 UINT8 Reserved; /* Reserved, must be zero */ 962 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 963 UINT64 Address; /* SAPIC physical address */ 964 965 } ACPI_MADT_IO_SAPIC; 966 967 968 /* 7: Local Sapic */ 969 970 typedef struct acpi_madt_local_sapic 971 { 972 ACPI_SUBTABLE_HEADER Header; 973 UINT8 ProcessorId; /* ACPI processor id */ 974 UINT8 Id; /* SAPIC ID */ 975 UINT8 Eid; /* SAPIC EID */ 976 UINT8 Reserved[3]; /* Reserved, must be zero */ 977 UINT32 LapicFlags; 978 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 979 char UidString[1]; /* String UID - ACPI 3.0 */ 980 981 } ACPI_MADT_LOCAL_SAPIC; 982 983 984 /* 8: Platform Interrupt Source */ 985 986 typedef struct acpi_madt_interrupt_source 987 { 988 ACPI_SUBTABLE_HEADER Header; 989 UINT16 IntiFlags; 990 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 991 UINT8 Id; /* Processor ID */ 992 UINT8 Eid; /* Processor EID */ 993 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 994 UINT32 GlobalIrq; /* Global system interrupt */ 995 UINT32 Flags; /* Interrupt Source Flags */ 996 997 } ACPI_MADT_INTERRUPT_SOURCE; 998 999 /* Masks for Flags field above */ 1000 1001 #define ACPI_MADT_CPEI_OVERRIDE (1) 1002 1003 1004 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1005 1006 typedef struct acpi_madt_local_x2apic 1007 { 1008 ACPI_SUBTABLE_HEADER Header; 1009 UINT16 Reserved; /* Reserved - must be zero */ 1010 UINT32 LocalApicId; /* Processor x2APIC ID */ 1011 UINT32 LapicFlags; 1012 UINT32 Uid; /* ACPI processor UID */ 1013 1014 } ACPI_MADT_LOCAL_X2APIC; 1015 1016 1017 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1018 1019 typedef struct acpi_madt_local_x2apic_nmi 1020 { 1021 ACPI_SUBTABLE_HEADER Header; 1022 UINT16 IntiFlags; 1023 UINT32 Uid; /* ACPI processor UID */ 1024 UINT8 Lint; /* LINTn to which NMI is connected */ 1025 UINT8 Reserved[3]; /* Reserved - must be zero */ 1026 1027 } ACPI_MADT_LOCAL_X2APIC_NMI; 1028 1029 1030 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1031 1032 typedef struct acpi_madt_generic_interrupt 1033 { 1034 ACPI_SUBTABLE_HEADER Header; 1035 UINT16 Reserved; /* Reserved - must be zero */ 1036 UINT32 CpuInterfaceNumber; 1037 UINT32 Uid; 1038 UINT32 Flags; 1039 UINT32 ParkingVersion; 1040 UINT32 PerformanceInterrupt; 1041 UINT64 ParkedAddress; 1042 UINT64 BaseAddress; 1043 UINT64 GicvBaseAddress; 1044 UINT64 GichBaseAddress; 1045 UINT32 VgicInterrupt; 1046 UINT64 GicrBaseAddress; 1047 UINT64 ArmMpidr; 1048 UINT8 EfficiencyClass; 1049 UINT8 Reserved2[1]; 1050 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1051 1052 } ACPI_MADT_GENERIC_INTERRUPT; 1053 1054 /* Masks for Flags field above */ 1055 1056 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1057 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1058 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1059 1060 1061 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1062 1063 typedef struct acpi_madt_generic_distributor 1064 { 1065 ACPI_SUBTABLE_HEADER Header; 1066 UINT16 Reserved; /* Reserved - must be zero */ 1067 UINT32 GicId; 1068 UINT64 BaseAddress; 1069 UINT32 GlobalIrqBase; 1070 UINT8 Version; 1071 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1072 1073 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1074 1075 /* Values for Version field above */ 1076 1077 enum AcpiMadtGicVersion 1078 { 1079 ACPI_MADT_GIC_VERSION_NONE = 0, 1080 ACPI_MADT_GIC_VERSION_V1 = 1, 1081 ACPI_MADT_GIC_VERSION_V2 = 2, 1082 ACPI_MADT_GIC_VERSION_V3 = 3, 1083 ACPI_MADT_GIC_VERSION_V4 = 4, 1084 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1085 }; 1086 1087 1088 /* 13: Generic MSI Frame (ACPI 5.1) */ 1089 1090 typedef struct acpi_madt_generic_msi_frame 1091 { 1092 ACPI_SUBTABLE_HEADER Header; 1093 UINT16 Reserved; /* Reserved - must be zero */ 1094 UINT32 MsiFrameId; 1095 UINT64 BaseAddress; 1096 UINT32 Flags; 1097 UINT16 SpiCount; 1098 UINT16 SpiBase; 1099 1100 } ACPI_MADT_GENERIC_MSI_FRAME; 1101 1102 /* Masks for Flags field above */ 1103 1104 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1105 1106 1107 /* 14: Generic Redistributor (ACPI 5.1) */ 1108 1109 typedef struct acpi_madt_generic_redistributor 1110 { 1111 ACPI_SUBTABLE_HEADER Header; 1112 UINT16 Reserved; /* reserved - must be zero */ 1113 UINT64 BaseAddress; 1114 UINT32 Length; 1115 1116 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1117 1118 1119 /* 15: Generic Translator (ACPI 6.0) */ 1120 1121 typedef struct acpi_madt_generic_translator 1122 { 1123 ACPI_SUBTABLE_HEADER Header; 1124 UINT16 Reserved; /* reserved - must be zero */ 1125 UINT32 TranslationId; 1126 UINT64 BaseAddress; 1127 UINT32 Reserved2; 1128 1129 } ACPI_MADT_GENERIC_TRANSLATOR; 1130 1131 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1132 1133 typedef struct acpi_madt_multiproc_wakeup 1134 { 1135 ACPI_SUBTABLE_HEADER Header; 1136 UINT16 MailboxVersion; 1137 UINT32 Reserved; /* reserved - must be zero */ 1138 UINT64 BaseAddress; 1139 1140 } ACPI_MADT_MULTIPROC_WAKEUP; 1141 1142 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1143 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1144 1145 typedef struct acpi_madt_multiproc_wakeup_mailbox 1146 { 1147 UINT16 Command; 1148 UINT16 Reserved; /* reserved - must be zero */ 1149 UINT32 ApicId; 1150 UINT64 WakeupVector; 1151 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1152 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1153 1154 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1155 1156 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1157 1158 1159 /* 1160 * Common flags fields for MADT subtables 1161 */ 1162 1163 /* MADT Local APIC flags */ 1164 1165 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1166 1167 /* MADT MPS INTI flags (IntiFlags) */ 1168 1169 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1170 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1171 1172 /* Values for MPS INTI flags */ 1173 1174 #define ACPI_MADT_POLARITY_CONFORMS 0 1175 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1176 #define ACPI_MADT_POLARITY_RESERVED 2 1177 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1178 1179 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1180 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1181 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1182 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1183 1184 1185 /******************************************************************************* 1186 * 1187 * MCFG - PCI Memory Mapped Configuration table and subtable 1188 * Version 1 1189 * 1190 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1191 * 1192 ******************************************************************************/ 1193 1194 typedef struct acpi_table_mcfg 1195 { 1196 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1197 UINT8 Reserved[8]; 1198 1199 } ACPI_TABLE_MCFG; 1200 1201 1202 /* Subtable */ 1203 1204 typedef struct acpi_mcfg_allocation 1205 { 1206 UINT64 Address; /* Base address, processor-relative */ 1207 UINT16 PciSegment; /* PCI segment group number */ 1208 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1209 UINT8 EndBusNumber; /* Final PCI Bus number */ 1210 UINT32 Reserved; 1211 1212 } ACPI_MCFG_ALLOCATION; 1213 1214 1215 /******************************************************************************* 1216 * 1217 * MCHI - Management Controller Host Interface Table 1218 * Version 1 1219 * 1220 * Conforms to "Management Component Transport Protocol (MCTP) Host 1221 * Interface Specification", Revision 1.0.0a, October 13, 2009 1222 * 1223 ******************************************************************************/ 1224 1225 typedef struct acpi_table_mchi 1226 { 1227 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1228 UINT8 InterfaceType; 1229 UINT8 Protocol; 1230 UINT64 ProtocolData; 1231 UINT8 InterruptType; 1232 UINT8 Gpe; 1233 UINT8 PciDeviceFlag; 1234 UINT32 GlobalInterrupt; 1235 ACPI_GENERIC_ADDRESS ControlRegister; 1236 UINT8 PciSegment; 1237 UINT8 PciBus; 1238 UINT8 PciDevice; 1239 UINT8 PciFunction; 1240 1241 } ACPI_TABLE_MCHI; 1242 1243 1244 /******************************************************************************* 1245 * 1246 * MPST - Memory Power State Table (ACPI 5.0) 1247 * Version 1 1248 * 1249 ******************************************************************************/ 1250 1251 #define ACPI_MPST_CHANNEL_INFO \ 1252 UINT8 ChannelId; \ 1253 UINT8 Reserved1[3]; \ 1254 UINT16 PowerNodeCount; \ 1255 UINT16 Reserved2; 1256 1257 /* Main table */ 1258 1259 typedef struct acpi_table_mpst 1260 { 1261 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1262 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1263 1264 } ACPI_TABLE_MPST; 1265 1266 1267 /* Memory Platform Communication Channel Info */ 1268 1269 typedef struct acpi_mpst_channel 1270 { 1271 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1272 1273 } ACPI_MPST_CHANNEL; 1274 1275 1276 /* Memory Power Node Structure */ 1277 1278 typedef struct acpi_mpst_power_node 1279 { 1280 UINT8 Flags; 1281 UINT8 Reserved1; 1282 UINT16 NodeId; 1283 UINT32 Length; 1284 UINT64 RangeAddress; 1285 UINT64 RangeLength; 1286 UINT32 NumPowerStates; 1287 UINT32 NumPhysicalComponents; 1288 1289 } ACPI_MPST_POWER_NODE; 1290 1291 /* Values for Flags field above */ 1292 1293 #define ACPI_MPST_ENABLED 1 1294 #define ACPI_MPST_POWER_MANAGED 2 1295 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1296 1297 1298 /* Memory Power State Structure (follows POWER_NODE above) */ 1299 1300 typedef struct acpi_mpst_power_state 1301 { 1302 UINT8 PowerState; 1303 UINT8 InfoIndex; 1304 1305 } ACPI_MPST_POWER_STATE; 1306 1307 1308 /* Physical Component ID Structure (follows POWER_STATE above) */ 1309 1310 typedef struct acpi_mpst_component 1311 { 1312 UINT16 ComponentId; 1313 1314 } ACPI_MPST_COMPONENT; 1315 1316 1317 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1318 1319 typedef struct acpi_mpst_data_hdr 1320 { 1321 UINT16 CharacteristicsCount; 1322 UINT16 Reserved; 1323 1324 } ACPI_MPST_DATA_HDR; 1325 1326 typedef struct acpi_mpst_power_data 1327 { 1328 UINT8 StructureId; 1329 UINT8 Flags; 1330 UINT16 Reserved1; 1331 UINT32 AveragePower; 1332 UINT32 PowerSaving; 1333 UINT64 ExitLatency; 1334 UINT64 Reserved2; 1335 1336 } ACPI_MPST_POWER_DATA; 1337 1338 /* Values for Flags field above */ 1339 1340 #define ACPI_MPST_PRESERVE 1 1341 #define ACPI_MPST_AUTOENTRY 2 1342 #define ACPI_MPST_AUTOEXIT 4 1343 1344 1345 /* Shared Memory Region (not part of an ACPI table) */ 1346 1347 typedef struct acpi_mpst_shared 1348 { 1349 UINT32 Signature; 1350 UINT16 PccCommand; 1351 UINT16 PccStatus; 1352 UINT32 CommandRegister; 1353 UINT32 StatusRegister; 1354 UINT32 PowerStateId; 1355 UINT32 PowerNodeId; 1356 UINT64 EnergyConsumed; 1357 UINT64 AveragePower; 1358 1359 } ACPI_MPST_SHARED; 1360 1361 1362 /******************************************************************************* 1363 * 1364 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1365 * Version 1 1366 * 1367 ******************************************************************************/ 1368 1369 typedef struct acpi_table_msct 1370 { 1371 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1372 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1373 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1374 UINT32 MaxClockDomains; /* Max number of clock domains */ 1375 UINT64 MaxAddress; /* Max physical address in system */ 1376 1377 } ACPI_TABLE_MSCT; 1378 1379 1380 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1381 1382 typedef struct acpi_msct_proximity 1383 { 1384 UINT8 Revision; 1385 UINT8 Length; 1386 UINT32 RangeStart; /* Start of domain range */ 1387 UINT32 RangeEnd; /* End of domain range */ 1388 UINT32 ProcessorCapacity; 1389 UINT64 MemoryCapacity; /* In bytes */ 1390 1391 } ACPI_MSCT_PROXIMITY; 1392 1393 1394 /******************************************************************************* 1395 * 1396 * MSDM - Microsoft Data Management table 1397 * 1398 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1399 * November 29, 2011. Copyright 2011 Microsoft 1400 * 1401 ******************************************************************************/ 1402 1403 /* Basic MSDM table is only the common ACPI header */ 1404 1405 typedef struct acpi_table_msdm 1406 { 1407 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1408 1409 } ACPI_TABLE_MSDM; 1410 1411 1412 /******************************************************************************* 1413 * 1414 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1415 * Version 1 1416 * 1417 ******************************************************************************/ 1418 1419 typedef struct acpi_table_nfit 1420 { 1421 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1422 UINT32 Reserved; /* Reserved, must be zero */ 1423 1424 } ACPI_TABLE_NFIT; 1425 1426 /* Subtable header for NFIT */ 1427 1428 typedef struct acpi_nfit_header 1429 { 1430 UINT16 Type; 1431 UINT16 Length; 1432 1433 } ACPI_NFIT_HEADER; 1434 1435 1436 /* Values for subtable type in ACPI_NFIT_HEADER */ 1437 1438 enum AcpiNfitType 1439 { 1440 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1441 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1442 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1443 ACPI_NFIT_TYPE_SMBIOS = 3, 1444 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1445 ACPI_NFIT_TYPE_DATA_REGION = 5, 1446 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1447 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1448 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1449 }; 1450 1451 /* 1452 * NFIT Subtables 1453 */ 1454 1455 /* 0: System Physical Address Range Structure */ 1456 1457 typedef struct acpi_nfit_system_address 1458 { 1459 ACPI_NFIT_HEADER Header; 1460 UINT16 RangeIndex; 1461 UINT16 Flags; 1462 UINT32 Reserved; /* Reserved, must be zero */ 1463 UINT32 ProximityDomain; 1464 UINT8 RangeGuid[16]; 1465 UINT64 Address; 1466 UINT64 Length; 1467 UINT64 MemoryMapping; 1468 UINT64 LocationCookie; /* ACPI 6.4 */ 1469 1470 } ACPI_NFIT_SYSTEM_ADDRESS; 1471 1472 /* Flags */ 1473 1474 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1475 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1476 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1477 1478 /* Range Type GUIDs appear in the include/acuuid.h file */ 1479 1480 1481 /* 1: Memory Device to System Address Range Map Structure */ 1482 1483 typedef struct acpi_nfit_memory_map 1484 { 1485 ACPI_NFIT_HEADER Header; 1486 UINT32 DeviceHandle; 1487 UINT16 PhysicalId; 1488 UINT16 RegionId; 1489 UINT16 RangeIndex; 1490 UINT16 RegionIndex; 1491 UINT64 RegionSize; 1492 UINT64 RegionOffset; 1493 UINT64 Address; 1494 UINT16 InterleaveIndex; 1495 UINT16 InterleaveWays; 1496 UINT16 Flags; 1497 UINT16 Reserved; /* Reserved, must be zero */ 1498 1499 } ACPI_NFIT_MEMORY_MAP; 1500 1501 /* Flags */ 1502 1503 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1504 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1505 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1506 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1507 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1508 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1509 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1510 1511 1512 /* 2: Interleave Structure */ 1513 1514 typedef struct acpi_nfit_interleave 1515 { 1516 ACPI_NFIT_HEADER Header; 1517 UINT16 InterleaveIndex; 1518 UINT16 Reserved; /* Reserved, must be zero */ 1519 UINT32 LineCount; 1520 UINT32 LineSize; 1521 UINT32 LineOffset[1]; /* Variable length */ 1522 1523 } ACPI_NFIT_INTERLEAVE; 1524 1525 1526 /* 3: SMBIOS Management Information Structure */ 1527 1528 typedef struct acpi_nfit_smbios 1529 { 1530 ACPI_NFIT_HEADER Header; 1531 UINT32 Reserved; /* Reserved, must be zero */ 1532 UINT8 Data[1]; /* Variable length */ 1533 1534 } ACPI_NFIT_SMBIOS; 1535 1536 1537 /* 4: NVDIMM Control Region Structure */ 1538 1539 typedef struct acpi_nfit_control_region 1540 { 1541 ACPI_NFIT_HEADER Header; 1542 UINT16 RegionIndex; 1543 UINT16 VendorId; 1544 UINT16 DeviceId; 1545 UINT16 RevisionId; 1546 UINT16 SubsystemVendorId; 1547 UINT16 SubsystemDeviceId; 1548 UINT16 SubsystemRevisionId; 1549 UINT8 ValidFields; 1550 UINT8 ManufacturingLocation; 1551 UINT16 ManufacturingDate; 1552 UINT8 Reserved[2]; /* Reserved, must be zero */ 1553 UINT32 SerialNumber; 1554 UINT16 Code; 1555 UINT16 Windows; 1556 UINT64 WindowSize; 1557 UINT64 CommandOffset; 1558 UINT64 CommandSize; 1559 UINT64 StatusOffset; 1560 UINT64 StatusSize; 1561 UINT16 Flags; 1562 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1563 1564 } ACPI_NFIT_CONTROL_REGION; 1565 1566 /* Flags */ 1567 1568 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1569 1570 /* ValidFields bits */ 1571 1572 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1573 1574 1575 /* 5: NVDIMM Block Data Window Region Structure */ 1576 1577 typedef struct acpi_nfit_data_region 1578 { 1579 ACPI_NFIT_HEADER Header; 1580 UINT16 RegionIndex; 1581 UINT16 Windows; 1582 UINT64 Offset; 1583 UINT64 Size; 1584 UINT64 Capacity; 1585 UINT64 StartAddress; 1586 1587 } ACPI_NFIT_DATA_REGION; 1588 1589 1590 /* 6: Flush Hint Address Structure */ 1591 1592 typedef struct acpi_nfit_flush_address 1593 { 1594 ACPI_NFIT_HEADER Header; 1595 UINT32 DeviceHandle; 1596 UINT16 HintCount; 1597 UINT8 Reserved[6]; /* Reserved, must be zero */ 1598 UINT64 HintAddress[1]; /* Variable length */ 1599 1600 } ACPI_NFIT_FLUSH_ADDRESS; 1601 1602 1603 /* 7: Platform Capabilities Structure */ 1604 1605 typedef struct acpi_nfit_capabilities 1606 { 1607 ACPI_NFIT_HEADER Header; 1608 UINT8 HighestCapability; 1609 UINT8 Reserved[3]; /* Reserved, must be zero */ 1610 UINT32 Capabilities; 1611 UINT32 Reserved2; 1612 1613 } ACPI_NFIT_CAPABILITIES; 1614 1615 /* Capabilities Flags */ 1616 1617 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1618 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1619 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1620 1621 1622 /* 1623 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1624 */ 1625 typedef struct nfit_device_handle 1626 { 1627 UINT32 Handle; 1628 1629 } NFIT_DEVICE_HANDLE; 1630 1631 /* Device handle construction and extraction macros */ 1632 1633 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1634 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1635 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1636 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1637 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1638 1639 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1640 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1641 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1642 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1643 #define ACPI_NFIT_NODE_ID_OFFSET 16 1644 1645 /* Macro to construct a NFIT/NVDIMM device handle */ 1646 1647 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1648 ((dimm) | \ 1649 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1650 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1651 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1652 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1653 1654 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1655 1656 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1657 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1658 1659 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1660 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1661 1662 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1663 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1664 1665 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1666 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1667 1668 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1669 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1670 1671 1672 /******************************************************************************* 1673 * 1674 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1675 * Version 2 (ACPI 6.2) 1676 * 1677 ******************************************************************************/ 1678 1679 typedef struct acpi_table_pcct 1680 { 1681 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1682 UINT32 Flags; 1683 UINT64 Reserved; 1684 1685 } ACPI_TABLE_PCCT; 1686 1687 /* Values for Flags field above */ 1688 1689 #define ACPI_PCCT_DOORBELL 1 1690 1691 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1692 1693 enum AcpiPcctType 1694 { 1695 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1696 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1697 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1698 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1699 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1700 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1701 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1702 }; 1703 1704 /* 1705 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1706 */ 1707 1708 /* 0: Generic Communications Subspace */ 1709 1710 typedef struct acpi_pcct_subspace 1711 { 1712 ACPI_SUBTABLE_HEADER Header; 1713 UINT8 Reserved[6]; 1714 UINT64 BaseAddress; 1715 UINT64 Length; 1716 ACPI_GENERIC_ADDRESS DoorbellRegister; 1717 UINT64 PreserveMask; 1718 UINT64 WriteMask; 1719 UINT32 Latency; 1720 UINT32 MaxAccessRate; 1721 UINT16 MinTurnaroundTime; 1722 1723 } ACPI_PCCT_SUBSPACE; 1724 1725 1726 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1727 1728 typedef struct acpi_pcct_hw_reduced 1729 { 1730 ACPI_SUBTABLE_HEADER Header; 1731 UINT32 PlatformInterrupt; 1732 UINT8 Flags; 1733 UINT8 Reserved; 1734 UINT64 BaseAddress; 1735 UINT64 Length; 1736 ACPI_GENERIC_ADDRESS DoorbellRegister; 1737 UINT64 PreserveMask; 1738 UINT64 WriteMask; 1739 UINT32 Latency; 1740 UINT32 MaxAccessRate; 1741 UINT16 MinTurnaroundTime; 1742 1743 } ACPI_PCCT_HW_REDUCED; 1744 1745 1746 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1747 1748 typedef struct acpi_pcct_hw_reduced_type2 1749 { 1750 ACPI_SUBTABLE_HEADER Header; 1751 UINT32 PlatformInterrupt; 1752 UINT8 Flags; 1753 UINT8 Reserved; 1754 UINT64 BaseAddress; 1755 UINT64 Length; 1756 ACPI_GENERIC_ADDRESS DoorbellRegister; 1757 UINT64 PreserveMask; 1758 UINT64 WriteMask; 1759 UINT32 Latency; 1760 UINT32 MaxAccessRate; 1761 UINT16 MinTurnaroundTime; 1762 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1763 UINT64 AckPreserveMask; 1764 UINT64 AckWriteMask; 1765 1766 } ACPI_PCCT_HW_REDUCED_TYPE2; 1767 1768 1769 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1770 1771 typedef struct acpi_pcct_ext_pcc_master 1772 { 1773 ACPI_SUBTABLE_HEADER Header; 1774 UINT32 PlatformInterrupt; 1775 UINT8 Flags; 1776 UINT8 Reserved1; 1777 UINT64 BaseAddress; 1778 UINT32 Length; 1779 ACPI_GENERIC_ADDRESS DoorbellRegister; 1780 UINT64 PreserveMask; 1781 UINT64 WriteMask; 1782 UINT32 Latency; 1783 UINT32 MaxAccessRate; 1784 UINT32 MinTurnaroundTime; 1785 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1786 UINT64 AckPreserveMask; 1787 UINT64 AckSetMask; 1788 UINT64 Reserved2; 1789 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1790 UINT64 CmdCompleteMask; 1791 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1792 UINT64 CmdUpdatePreserveMask; 1793 UINT64 CmdUpdateSetMask; 1794 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1795 UINT64 ErrorStatusMask; 1796 1797 } ACPI_PCCT_EXT_PCC_MASTER; 1798 1799 1800 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1801 1802 typedef struct acpi_pcct_ext_pcc_slave 1803 { 1804 ACPI_SUBTABLE_HEADER Header; 1805 UINT32 PlatformInterrupt; 1806 UINT8 Flags; 1807 UINT8 Reserved1; 1808 UINT64 BaseAddress; 1809 UINT32 Length; 1810 ACPI_GENERIC_ADDRESS DoorbellRegister; 1811 UINT64 PreserveMask; 1812 UINT64 WriteMask; 1813 UINT32 Latency; 1814 UINT32 MaxAccessRate; 1815 UINT32 MinTurnaroundTime; 1816 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1817 UINT64 AckPreserveMask; 1818 UINT64 AckSetMask; 1819 UINT64 Reserved2; 1820 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1821 UINT64 CmdCompleteMask; 1822 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1823 UINT64 CmdUpdatePreserveMask; 1824 UINT64 CmdUpdateSetMask; 1825 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1826 UINT64 ErrorStatusMask; 1827 1828 } ACPI_PCCT_EXT_PCC_SLAVE; 1829 1830 /* 5: HW Registers based Communications Subspace */ 1831 1832 typedef struct acpi_pcct_hw_reg 1833 { 1834 ACPI_SUBTABLE_HEADER Header; 1835 UINT16 Version; 1836 UINT64 BaseAddress; 1837 UINT64 Length; 1838 ACPI_GENERIC_ADDRESS DoorbellRegister; 1839 UINT64 DoorbellPreserve; 1840 UINT64 DoorbellWrite; 1841 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1842 UINT64 CmdCompleteMask; 1843 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1844 UINT64 ErrorStatusMask; 1845 UINT32 NominalLatency; 1846 UINT32 MinTurnaroundTime; 1847 1848 } ACPI_PCCT_HW_REG; 1849 1850 1851 /* Values for doorbell flags above */ 1852 1853 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1854 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1855 1856 1857 /* 1858 * PCC memory structures (not part of the ACPI table) 1859 */ 1860 1861 /* Shared Memory Region */ 1862 1863 typedef struct acpi_pcct_shared_memory 1864 { 1865 UINT32 Signature; 1866 UINT16 Command; 1867 UINT16 Status; 1868 1869 } ACPI_PCCT_SHARED_MEMORY; 1870 1871 1872 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1873 1874 typedef struct acpi_pcct_ext_pcc_shared_memory 1875 { 1876 UINT32 Signature; 1877 UINT32 Flags; 1878 UINT32 Length; 1879 UINT32 Command; 1880 1881 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1882 1883 1884 /******************************************************************************* 1885 * 1886 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1887 * Version 0 1888 * 1889 ******************************************************************************/ 1890 1891 typedef struct acpi_table_pdtt 1892 { 1893 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1894 UINT8 TriggerCount; 1895 UINT8 Reserved[3]; 1896 UINT32 ArrayOffset; 1897 1898 } ACPI_TABLE_PDTT; 1899 1900 1901 /* 1902 * PDTT Communication Channel Identifier Structure. 1903 * The number of these structures is defined by TriggerCount above, 1904 * starting at ArrayOffset. 1905 */ 1906 typedef struct acpi_pdtt_channel 1907 { 1908 UINT8 SubchannelId; 1909 UINT8 Flags; 1910 1911 } ACPI_PDTT_CHANNEL; 1912 1913 /* Flags for above */ 1914 1915 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1916 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1917 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1918 1919 1920 /******************************************************************************* 1921 * 1922 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1923 * Version 1 1924 * 1925 ******************************************************************************/ 1926 1927 typedef struct acpi_table_phat 1928 { 1929 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1930 1931 } ACPI_TABLE_PHAT; 1932 1933 /* Common header for PHAT subtables that follow main table */ 1934 1935 typedef struct acpi_phat_header 1936 { 1937 UINT16 Type; 1938 UINT16 Length; 1939 UINT8 Revision; 1940 1941 } ACPI_PHAT_HEADER; 1942 1943 1944 /* Values for Type field above */ 1945 1946 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1947 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1948 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1949 1950 /* 1951 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 1952 */ 1953 1954 /* 0: Firmware Version Data Record */ 1955 1956 typedef struct acpi_phat_version_data 1957 { 1958 ACPI_PHAT_HEADER Header; 1959 UINT8 Reserved[3]; 1960 UINT32 ElementCount; 1961 1962 } ACPI_PHAT_VERSION_DATA; 1963 1964 typedef struct acpi_phat_version_element 1965 { 1966 UINT8 Guid[16]; 1967 UINT64 VersionValue; 1968 UINT32 ProducerId; 1969 1970 } ACPI_PHAT_VERSION_ELEMENT; 1971 1972 1973 /* 1: Firmware Health Data Record */ 1974 1975 typedef struct acpi_phat_health_data 1976 { 1977 ACPI_PHAT_HEADER Header; 1978 UINT8 Reserved[2]; 1979 UINT8 Health; 1980 UINT8 DeviceGuid[16]; 1981 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 1982 1983 } ACPI_PHAT_HEALTH_DATA; 1984 1985 /* Values for Health field above */ 1986 1987 #define ACPI_PHAT_ERRORS_FOUND 0 1988 #define ACPI_PHAT_NO_ERRORS 1 1989 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1990 #define ACPI_PHAT_ADVISORY 3 1991 1992 1993 /******************************************************************************* 1994 * 1995 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1996 * Version 1 1997 * 1998 ******************************************************************************/ 1999 2000 typedef struct acpi_table_pmtt 2001 { 2002 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2003 UINT32 MemoryDeviceCount; 2004 /* 2005 * Immediately followed by: 2006 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2007 */ 2008 2009 } ACPI_TABLE_PMTT; 2010 2011 2012 /* Common header for PMTT subtables that follow main table */ 2013 2014 typedef struct acpi_pmtt_header 2015 { 2016 UINT8 Type; 2017 UINT8 Reserved1; 2018 UINT16 Length; 2019 UINT16 Flags; 2020 UINT16 Reserved2; 2021 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2022 /* 2023 * Immediately followed by: 2024 * UINT8 TypeSpecificData[] 2025 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2026 */ 2027 2028 } ACPI_PMTT_HEADER; 2029 2030 /* Values for Type field above */ 2031 2032 #define ACPI_PMTT_TYPE_SOCKET 0 2033 #define ACPI_PMTT_TYPE_CONTROLLER 1 2034 #define ACPI_PMTT_TYPE_DIMM 2 2035 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2036 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2037 2038 /* Values for Flags field above */ 2039 2040 #define ACPI_PMTT_TOP_LEVEL 0x0001 2041 #define ACPI_PMTT_PHYSICAL 0x0002 2042 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2043 2044 2045 /* 2046 * PMTT subtables, correspond to Type in acpi_pmtt_header 2047 */ 2048 2049 2050 /* 0: Socket Structure */ 2051 2052 typedef struct acpi_pmtt_socket 2053 { 2054 ACPI_PMTT_HEADER Header; 2055 UINT16 SocketId; 2056 UINT16 Reserved; 2057 2058 } ACPI_PMTT_SOCKET; 2059 /* 2060 * Immediately followed by: 2061 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2062 */ 2063 2064 2065 /* 1: Memory Controller subtable */ 2066 2067 typedef struct acpi_pmtt_controller 2068 { 2069 ACPI_PMTT_HEADER Header; 2070 UINT16 ControllerId; 2071 UINT16 Reserved; 2072 2073 } ACPI_PMTT_CONTROLLER; 2074 /* 2075 * Immediately followed by: 2076 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2077 */ 2078 2079 2080 /* 2: Physical Component Identifier (DIMM) */ 2081 2082 typedef struct acpi_pmtt_physical_component 2083 { 2084 ACPI_PMTT_HEADER Header; 2085 UINT32 BiosHandle; 2086 2087 } ACPI_PMTT_PHYSICAL_COMPONENT; 2088 2089 2090 /* 0xFF: Vendor Specific Data */ 2091 2092 typedef struct acpi_pmtt_vendor_specific 2093 { 2094 ACPI_PMTT_HEADER Header; 2095 UINT8 TypeUuid[16]; 2096 UINT8 Specific[]; 2097 /* 2098 * Immediately followed by: 2099 * UINT8 VendorSpecificData[]; 2100 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2101 */ 2102 2103 } ACPI_PMTT_VENDOR_SPECIFIC; 2104 2105 2106 /******************************************************************************* 2107 * 2108 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2109 * Version 1 2110 * 2111 ******************************************************************************/ 2112 2113 typedef struct acpi_table_pptt 2114 { 2115 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2116 2117 } ACPI_TABLE_PPTT; 2118 2119 /* Values for Type field above */ 2120 2121 enum AcpiPpttType 2122 { 2123 ACPI_PPTT_TYPE_PROCESSOR = 0, 2124 ACPI_PPTT_TYPE_CACHE = 1, 2125 ACPI_PPTT_TYPE_ID = 2, 2126 ACPI_PPTT_TYPE_RESERVED = 3 2127 }; 2128 2129 2130 /* 0: Processor Hierarchy Node Structure */ 2131 2132 typedef struct acpi_pptt_processor 2133 { 2134 ACPI_SUBTABLE_HEADER Header; 2135 UINT16 Reserved; 2136 UINT32 Flags; 2137 UINT32 Parent; 2138 UINT32 AcpiProcessorId; 2139 UINT32 NumberOfPrivResources; 2140 2141 } ACPI_PPTT_PROCESSOR; 2142 2143 /* Flags */ 2144 2145 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2146 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2147 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2148 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2149 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2150 2151 2152 /* 1: Cache Type Structure */ 2153 2154 typedef struct acpi_pptt_cache 2155 { 2156 ACPI_SUBTABLE_HEADER Header; 2157 UINT16 Reserved; 2158 UINT32 Flags; 2159 UINT32 NextLevelOfCache; 2160 UINT32 Size; 2161 UINT32 NumberOfSets; 2162 UINT8 Associativity; 2163 UINT8 Attributes; 2164 UINT16 LineSize; 2165 2166 } ACPI_PPTT_CACHE; 2167 2168 /* 1: Cache Type Structure for PPTT version 3 */ 2169 2170 typedef struct acpi_pptt_cache_v1 2171 { 2172 UINT32 CacheId; 2173 2174 } ACPI_PPTT_CACHE_V1; 2175 2176 2177 /* Flags */ 2178 2179 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2180 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2181 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2182 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2183 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2184 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2185 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2186 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2187 2188 /* Masks for Attributes */ 2189 2190 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2191 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2192 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2193 2194 /* Attributes describing cache */ 2195 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2196 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2197 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2198 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2199 2200 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2201 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2202 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2203 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2204 2205 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2206 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2207 2208 /* 2: ID Structure */ 2209 2210 typedef struct acpi_pptt_id 2211 { 2212 ACPI_SUBTABLE_HEADER Header; 2213 UINT16 Reserved; 2214 UINT32 VendorId; 2215 UINT64 Level1Id; 2216 UINT64 Level2Id; 2217 UINT16 MajorRev; 2218 UINT16 MinorRev; 2219 UINT16 SpinRev; 2220 2221 } ACPI_PPTT_ID; 2222 2223 2224 /******************************************************************************* 2225 * 2226 * PRMT - Platform Runtime Mechanism Table 2227 * Version 1 2228 * 2229 ******************************************************************************/ 2230 2231 typedef struct acpi_table_prmt 2232 { 2233 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2234 2235 } ACPI_TABLE_PRMT; 2236 2237 typedef struct acpi_table_prmt_header 2238 { 2239 UINT8 PlatformGuid[16]; 2240 UINT32 ModuleInfoOffset; 2241 UINT32 ModuleInfoCount; 2242 2243 } ACPI_TABLE_PRMT_HEADER; 2244 2245 typedef struct acpi_prmt_module_header 2246 { 2247 UINT16 Revision; 2248 UINT16 Length; 2249 2250 } ACPI_PRMT_MODULE_HEADER; 2251 2252 typedef struct acpi_prmt_module_info 2253 { 2254 UINT16 Revision; 2255 UINT16 Length; 2256 UINT8 ModuleGuid[16]; 2257 UINT16 MajorRev; 2258 UINT16 MinorRev; 2259 UINT16 HandlerInfoCount; 2260 UINT32 HandlerInfoOffset; 2261 UINT64 MmioListPointer; 2262 2263 } ACPI_PRMT_MODULE_INFO; 2264 2265 typedef struct acpi_prmt_handler_info 2266 { 2267 UINT16 Revision; 2268 UINT16 Length; 2269 UINT8 HandlerGuid[16]; 2270 UINT64 HandlerAddress; 2271 UINT64 StaticDataBufferAddress; 2272 UINT64 AcpiParamBufferAddress; 2273 2274 } ACPI_PRMT_HANDLER_INFO; 2275 2276 2277 /******************************************************************************* 2278 * 2279 * RASF - RAS Feature Table (ACPI 5.0) 2280 * Version 1 2281 * 2282 ******************************************************************************/ 2283 2284 typedef struct acpi_table_rasf 2285 { 2286 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2287 UINT8 ChannelId[12]; 2288 2289 } ACPI_TABLE_RASF; 2290 2291 /* RASF Platform Communication Channel Shared Memory Region */ 2292 2293 typedef struct acpi_rasf_shared_memory 2294 { 2295 UINT32 Signature; 2296 UINT16 Command; 2297 UINT16 Status; 2298 UINT16 Version; 2299 UINT8 Capabilities[16]; 2300 UINT8 SetCapabilities[16]; 2301 UINT16 NumParameterBlocks; 2302 UINT32 SetCapabilitiesStatus; 2303 2304 } ACPI_RASF_SHARED_MEMORY; 2305 2306 /* RASF Parameter Block Structure Header */ 2307 2308 typedef struct acpi_rasf_parameter_block 2309 { 2310 UINT16 Type; 2311 UINT16 Version; 2312 UINT16 Length; 2313 2314 } ACPI_RASF_PARAMETER_BLOCK; 2315 2316 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2317 2318 typedef struct acpi_rasf_patrol_scrub_parameter 2319 { 2320 ACPI_RASF_PARAMETER_BLOCK Header; 2321 UINT16 PatrolScrubCommand; 2322 UINT64 RequestedAddressRange[2]; 2323 UINT64 ActualAddressRange[2]; 2324 UINT16 Flags; 2325 UINT8 RequestedSpeed; 2326 2327 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2328 2329 /* Masks for Flags and Speed fields above */ 2330 2331 #define ACPI_RASF_SCRUBBER_RUNNING 1 2332 #define ACPI_RASF_SPEED (7<<1) 2333 #define ACPI_RASF_SPEED_SLOW (0<<1) 2334 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2335 #define ACPI_RASF_SPEED_FAST (7<<1) 2336 2337 /* Channel Commands */ 2338 2339 enum AcpiRasfCommands 2340 { 2341 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2342 }; 2343 2344 /* Platform RAS Capabilities */ 2345 2346 enum AcpiRasfCapabiliities 2347 { 2348 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2349 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2350 }; 2351 2352 /* Patrol Scrub Commands */ 2353 2354 enum AcpiRasfPatrolScrubCommands 2355 { 2356 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2357 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2358 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2359 }; 2360 2361 /* Channel Command flags */ 2362 2363 #define ACPI_RASF_GENERATE_SCI (1<<15) 2364 2365 /* Status values */ 2366 2367 enum AcpiRasfStatus 2368 { 2369 ACPI_RASF_SUCCESS = 0, 2370 ACPI_RASF_NOT_VALID = 1, 2371 ACPI_RASF_NOT_SUPPORTED = 2, 2372 ACPI_RASF_BUSY = 3, 2373 ACPI_RASF_FAILED = 4, 2374 ACPI_RASF_ABORTED = 5, 2375 ACPI_RASF_INVALID_DATA = 6 2376 }; 2377 2378 /* Status flags */ 2379 2380 #define ACPI_RASF_COMMAND_COMPLETE (1) 2381 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2382 #define ACPI_RASF_ERROR (1<<2) 2383 #define ACPI_RASF_STATUS (0x1F<<3) 2384 2385 2386 /******************************************************************************* 2387 * 2388 * RGRT - Regulatory Graphics Resource Table 2389 * Version 1 2390 * 2391 * Conforms to "ACPI RGRT" available at: 2392 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 2393 * 2394 ******************************************************************************/ 2395 2396 typedef struct acpi_table_rgrt 2397 { 2398 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2399 UINT16 Version; 2400 UINT8 ImageType; 2401 UINT8 Reserved; 2402 UINT8 Image[0]; 2403 2404 } ACPI_TABLE_RGRT; 2405 2406 /* ImageType values */ 2407 2408 enum AcpiRgrtImageType 2409 { 2410 ACPI_RGRT_TYPE_RESERVED0 = 0, 2411 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2412 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2413 }; 2414 2415 2416 /******************************************************************************* 2417 * 2418 * SBST - Smart Battery Specification Table 2419 * Version 1 2420 * 2421 ******************************************************************************/ 2422 2423 typedef struct acpi_table_sbst 2424 { 2425 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2426 UINT32 WarningLevel; 2427 UINT32 LowLevel; 2428 UINT32 CriticalLevel; 2429 2430 } ACPI_TABLE_SBST; 2431 2432 2433 /******************************************************************************* 2434 * 2435 * SDEI - Software Delegated Exception Interface Descriptor Table 2436 * 2437 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2438 * May 8th, 2017. Copyright 2017 ARM Ltd. 2439 * 2440 ******************************************************************************/ 2441 2442 typedef struct acpi_table_sdei 2443 { 2444 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2445 2446 } ACPI_TABLE_SDEI; 2447 2448 2449 /******************************************************************************* 2450 * 2451 * SDEV - Secure Devices Table (ACPI 6.2) 2452 * Version 1 2453 * 2454 ******************************************************************************/ 2455 2456 typedef struct acpi_table_sdev 2457 { 2458 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2459 2460 } ACPI_TABLE_SDEV; 2461 2462 2463 typedef struct acpi_sdev_header 2464 { 2465 UINT8 Type; 2466 UINT8 Flags; 2467 UINT16 Length; 2468 2469 } ACPI_SDEV_HEADER; 2470 2471 2472 /* Values for subtable type above */ 2473 2474 enum AcpiSdevType 2475 { 2476 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2477 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2478 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2479 }; 2480 2481 /* Values for flags above */ 2482 2483 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2484 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2485 2486 /* 2487 * SDEV subtables 2488 */ 2489 2490 /* 0: Namespace Device Based Secure Device Structure */ 2491 2492 typedef struct acpi_sdev_namespace 2493 { 2494 ACPI_SDEV_HEADER Header; 2495 UINT16 DeviceIdOffset; 2496 UINT16 DeviceIdLength; 2497 UINT16 VendorDataOffset; 2498 UINT16 VendorDataLength; 2499 2500 } ACPI_SDEV_NAMESPACE; 2501 2502 typedef struct acpi_sdev_secure_component 2503 { 2504 UINT16 SecureComponentOffset; 2505 UINT16 SecureComponentLength; 2506 2507 } ACPI_SDEV_SECURE_COMPONENT; 2508 2509 2510 /* 2511 * SDEV sub-subtables ("Components") for above 2512 */ 2513 typedef struct acpi_sdev_component 2514 { 2515 ACPI_SDEV_HEADER Header; 2516 2517 } ACPI_SDEV_COMPONENT; 2518 2519 2520 /* Values for sub-subtable type above */ 2521 2522 enum AcpiSacType 2523 { 2524 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2525 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2526 }; 2527 2528 typedef struct acpi_sdev_id_component 2529 { 2530 ACPI_SDEV_HEADER Header; 2531 UINT16 HardwareIdOffset; 2532 UINT16 HardwareIdLength; 2533 UINT16 SubsystemIdOffset; 2534 UINT16 SubsystemIdLength; 2535 UINT16 HardwareRevision; 2536 UINT8 HardwareRevPresent; 2537 UINT8 ClassCodePresent; 2538 UINT8 PciBaseClass; 2539 UINT8 PciSubClass; 2540 UINT8 PciProgrammingXface; 2541 2542 } ACPI_SDEV_ID_COMPONENT; 2543 2544 typedef struct acpi_sdev_mem_component 2545 { 2546 ACPI_SDEV_HEADER Header; 2547 UINT32 Reserved; 2548 UINT64 MemoryBaseAddress; 2549 UINT64 MemoryLength; 2550 2551 } ACPI_SDEV_MEM_COMPONENT; 2552 2553 2554 /* 1: PCIe Endpoint Device Based Device Structure */ 2555 2556 typedef struct acpi_sdev_pcie 2557 { 2558 ACPI_SDEV_HEADER Header; 2559 UINT16 Segment; 2560 UINT16 StartBus; 2561 UINT16 PathOffset; 2562 UINT16 PathLength; 2563 UINT16 VendorDataOffset; 2564 UINT16 VendorDataLength; 2565 2566 } ACPI_SDEV_PCIE; 2567 2568 /* 1a: PCIe Endpoint path entry */ 2569 2570 typedef struct acpi_sdev_pcie_path 2571 { 2572 UINT8 Device; 2573 UINT8 Function; 2574 2575 } ACPI_SDEV_PCIE_PATH; 2576 2577 2578 /******************************************************************************* 2579 * 2580 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2581 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2582 * Trust Domain Extensions (Intel TDX)". 2583 * Version 1 2584 * 2585 ******************************************************************************/ 2586 2587 typedef struct acpi_table_svkl 2588 { 2589 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2590 UINT32 Count; 2591 2592 } ACPI_TABLE_SVKL; 2593 2594 typedef struct acpi_svkl_key 2595 { 2596 UINT16 Type; 2597 UINT16 Format; 2598 UINT32 Size; 2599 UINT64 Address; 2600 2601 } ACPI_SVKL_KEY; 2602 2603 enum acpi_svkl_type 2604 { 2605 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2606 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2607 }; 2608 2609 enum acpi_svkl_format 2610 { 2611 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2612 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2613 }; 2614 2615 2616 /* Reset to default packing */ 2617 2618 #pragma pack() 2619 2620 #endif /* __ACTBL2_H__ */ 2621