1 /* 2 * kernel internal memory management definitions for x86 3 */ 4 #pragma once 5 6 #ifdef _PAE_ 7 #define _MI_PAGING_LEVELS 3 8 #else 9 #define _MI_PAGING_LEVELS 2 10 #endif 11 12 /* Memory layout base addresses */ 13 #define MI_USER_PROBE_ADDRESS (PVOID)0x7FFF0000 14 #define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0x80000000 15 #ifndef PAE 16 #define HYPER_SPACE 0xC0400000 17 #define HYPER_SPACE_END 0xC07FFFFF 18 #else 19 #define HYPER_SPACE 0xC0800000 20 #define HYPER_SPACE_END 0xC0BFFFFF 21 #endif 22 #define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000 23 #define MI_PAGED_POOL_START (PVOID)0xE1000000 24 #define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000 25 #define MI_DEBUG_MAPPING (PVOID)0xFFBFF000 26 #define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFF 27 28 /* FIXME: These are different for PAE */ 29 #define PTE_BASE 0xC0000000 30 #define PDE_BASE 0xC0300000 31 #define PDE_TOP 0xC0300FFF 32 #define PTE_TOP 0xC03FFFFF 33 34 #define PTE_PER_PAGE 0x400 35 #define PDE_PER_PAGE 0x400 36 #define PPE_PER_PAGE 1 37 38 /* Misc address definitions */ 39 #define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL) 40 #define MM_HIGHEST_VAD_ADDRESS \ 41 (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE)) 42 #define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE 43 #define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \ 44 MI_HYPERSPACE_PTES * PAGE_SIZE) 45 #define MI_DUMMY_PTE (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \ 46 PAGE_SIZE) 47 #define MI_VAD_BITMAP (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \ 48 PAGE_SIZE) 49 #define MI_WORKING_SET_LIST (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \ 50 PAGE_SIZE) 51 52 /* Memory sizes */ 53 #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255 * _1MB) >> PAGE_SHIFT) 54 #define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19 * _1MB) >> PAGE_SHIFT) 55 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32 * _1MB) >> PAGE_SHIFT) 56 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST ((256 * _1MB) >> PAGE_SHIFT) 57 #define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB) 58 #define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * _1MB) 59 #define MI_MAX_NONPAGED_POOL_SIZE (128 * _1MB) 60 #define MI_SYSTEM_VIEW_SIZE (32 * _1MB) 61 #define MI_SESSION_VIEW_SIZE (48 * _1MB) 62 #define MI_SESSION_POOL_SIZE (16 * _1MB) 63 #define MI_SESSION_IMAGE_SIZE (8 * _1MB) 64 #define MI_SESSION_WORKING_SET_SIZE (4 * _1MB) 65 #define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \ 66 MI_SESSION_POOL_SIZE + \ 67 MI_SESSION_IMAGE_SIZE + \ 68 MI_SESSION_WORKING_SET_SIZE) 69 #define MI_MIN_ALLOCATION_FRAGMENT (4 * _1KB) 70 #define MI_ALLOCATION_FRAGMENT (64 * _1KB) 71 #define MI_MAX_ALLOCATION_FRAGMENT (2 * _1MB) 72 73 /* Misc constants */ 74 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5 75 #define MI_MIN_SECONDARY_COLORS 8 76 #define MI_SECONDARY_COLORS 64 77 #define MI_MAX_SECONDARY_COLORS 1024 78 #define MI_MAX_FREE_PAGE_LISTS 4 79 #define MI_HYPERSPACE_PTES (256 - 1) 80 #define MI_ZERO_PTES (32) 81 #define MI_MAX_ZERO_BITS 21 82 #define SESSION_POOL_LOOKASIDES 26 83 84 /* MMPTE related defines */ 85 #define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF) 86 #define MM_EMPTY_LIST ((ULONG_PTR)-1) 87 88 89 /* Easy accessing PFN in PTE */ 90 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) 91 92 /* Macros for portable PTE modification */ 93 #define MI_MAKE_DIRTY_PAGE(x) ((x)->u.Hard.Dirty = 1) 94 #define MI_MAKE_CLEAN_PAGE(x) ((x)->u.Hard.Dirty = 0) 95 #define MI_MAKE_ACCESSED_PAGE(x) ((x)->u.Hard.Accessed = 1) 96 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.CacheDisable = 1) 97 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.WriteThrough = 1) 98 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.WriteThrough = 0) 99 #define MI_IS_PAGE_LARGE(x) ((x)->u.Hard.LargePage == 1) 100 #if !defined(CONFIG_SMP) 101 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Write == 1) 102 #else 103 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Writable == 1) 104 #endif 105 #define MI_IS_PAGE_COPY_ON_WRITE(x)((x)->u.Hard.CopyOnWrite == 1) 106 #define MI_IS_PAGE_DIRTY(x) ((x)->u.Hard.Dirty == 1) 107 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1) 108 #if !defined(CONFIG_SMP) 109 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Write = 1) 110 #else 111 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1) 112 #endif 113 114 /* On x86, these two are the same */ 115 #define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE 116 117 /* Convert an address to a corresponding PTE */ 118 #define MiAddressToPte(x) \ 119 ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) 120 121 /* Convert an address to a corresponding PDE */ 122 #define MiAddressToPde(x) \ 123 ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) 124 125 /* Convert an address to a corresponding PTE offset/index */ 126 #define MiAddressToPteOffset(x) \ 127 ((((ULONG)(x)) << 10) >> 22) 128 129 /* Convert an address to a corresponding PDE offset/index */ 130 #define MiAddressToPdeOffset(x) \ 131 (((ULONG)(x)) / (1024 * PAGE_SIZE)) 132 #define MiGetPdeOffset MiAddressToPdeOffset 133 134 /* Convert a PTE/PDE into a corresponding address */ 135 #define MiPteToAddress(_Pte) ((PVOID)((ULONG)(_Pte) << 10)) 136 #define MiPdeToAddress(_Pde) ((PVOID)((ULONG)(_Pde) << 20)) 137 138 /* Translate between P*Es */ 139 #define MiPdeToPte(_Pde) ((PMMPTE)MiPteToAddress(_Pde)) 140 #define MiPteToPde(_Pte) ((PMMPDE)MiAddressToPte(_Pte)) 141 142 /* Check P*E boundaries */ 143 #define MiIsPteOnPdeBoundary(PointerPte) \ 144 ((((ULONG_PTR)PointerPte) & (PAGE_SIZE - 1)) == 0) 145 146 // 147 // Decodes a Prototype PTE into the underlying PTE 148 // 149 #define MiProtoPteToPte(x) \ 150 (PMMPTE)((ULONG_PTR)MmPagedPoolStart + \ 151 (((x)->u.Proto.ProtoAddressHigh << 9) | (x)->u.Proto.ProtoAddressLow << 2)) 152 153 // 154 // Decodes a Prototype PTE into the underlying PTE 155 // 156 #define MiSubsectionPteToSubsection(x) \ 157 ((x)->u.Subsect.WhichPool == PagedPool) ? \ 158 (PMMPTE)((ULONG_PTR)MmSubsectionBase + \ 159 (((x)->u.Subsect.SubsectionAddressHigh << 7) | \ 160 (x)->u.Subsect.SubsectionAddressLow << 3)) : \ 161 (PMMPTE)((ULONG_PTR)MmNonPagedPoolEnd - \ 162 (((x)->u.Subsect.SubsectionAddressHigh << 7) | \ 163 (x)->u.Subsect.SubsectionAddressLow << 3)) 164