1 /*++ NDK Version: 0098 2 3 Copyright (c) Alex Ionescu. All rights reserved. 4 5 Header Name: 6 7 ketypes.h (AMD64) 8 9 Abstract: 10 11 amd64 Type definitions for the Kernel services. 12 13 Author: 14 15 Alex Ionescu (alexi@tinykrnl.org) - Updated - 27-Feb-2006 16 Timo Kreuzer (timo.kreuzer@reactos.org) - Updated - 14-Aug-2008 17 18 --*/ 19 20 #ifndef _AMD64_KETYPES_H 21 #define _AMD64_KETYPES_H 22 23 // 24 // Dependencies 25 // 26 27 // 28 // Kernel Feature Bits 29 // See https://www.geoffchappell.com/studies/windows/km/ntoskrnl/structs/kprcb/featurebits.htm?tx=61&ts=0,1400 30 // 31 #define KF_SMEP 0x00000001 // Win 6.2 32 #define KF_RDTSC 0x00000002 // From ks386.inc, ksamd64.inc 33 #define KF_CR4 0x00000004 // From ks386.inc, ksamd64.inc 34 #define KF_CMOV 0x00000008 35 #define KF_GLOBAL_PAGE 0x00000010 // From ks386.inc, ksamd64.inc 36 #define KF_LARGE_PAGE 0x00000020 // From ks386.inc, ksamd64.inc 37 #define KF_MTRR 0x00000040 38 #define KF_CMPXCHG8B 0x00000080 // From ks386.inc, ksamd64.inc 39 #define KF_MMX 0x00000100 40 #define KF_DTS 0x00000200 // Win 5.2-6.2 41 #define KF_PAT 0x00000400 42 #define KF_FXSR 0x00000800 43 #define KF_FAST_SYSCALL 0x00001000 // From ks386.inc, ksamd64.inc 44 #define KF_XMMI 0x00002000 // SSE 45 #define KF_3DNOW 0x00004000 46 #define KF_AMDK6MTRR 0x00008000 // Win 5.0-6.1 47 #define KF_XSAVEOPT 0x00008000 // From KF_XSAVEOPT_BIT 48 #define KF_XMMI64 0x00010000 // SSE2 49 #define KF_BRANCH 0x00020000 // From ksamd64.inc, Win 6.1-6.2 50 #define KF_00040000 0x00040000 // Unclear 51 #define KF_SSE3 0x00080000 // Win 6.0+ 52 #define KF_CMPXCHG16B 0x00100000 // Win 6.0-6.2 53 #define KF_AUTHENTICAMD 0x00200000 // Win 6.1+ 54 #define KF_ACNT2 0x00400000 // Win 6.1+ 55 #define KF_XSTATE 0x00800000 // From ksamd64.inc, Win 6.1+ 56 #define KF_GENUINE_INTEL 0x01000000 // Win 6.1+ 57 #define KF_02000000 0x02000000 // Unclear 58 #define KF_SLAT 0x04000000 // Win 6.2+, Intel: EPT supported 59 #define KF_VIRT_FIRMWARE_ENABLED 0x08000000 // Win 6.2+ 60 #define KF_RDWRFSGSBASE 0x10000000 // From ksamd64.inc KF_RDWRFSGSBASE_BIT (0x1C) 61 #define KF_NX_BIT 0x20000000 62 #define KF_NX_DISABLED 0x40000000 63 #define KF_NX_ENABLED 0x80000000 64 #define KF_RDRAND 0x0000000100000000ULL // Win 10.0+ 65 #define KF_SMAP 0x0000000200000000ULL // From ksamd64.inc 66 #define KF_RDTSCP 0x0000000400000000ULL // Win 10.0+ 67 #define KF_HUGEPAGE 0x0000002000000000ULL // Win 10.0 1607+ 68 #define KF_XSAVES 0x0000004000000000ULL // From ksamd64.inc KF_XSAVES_BIT (0x26) 69 #define KF_FPU_LEAKAGE 0x0000020000000000ULL // From ksamd64.inc KF_FPU_LEAKAGE_BIT (0x29) 70 #define KF_CAT 0x0000100000000000ULL // From ksamd64.inc KF_CAT_BIT (0x02C) 71 #define KF_CET_SS 0x0000400000000000ULL // From ksamd64.inc 72 #define KF_SSSE3 0x0000800000000000ULL 73 #define KF_SSE4_1 0x0001000000000000ULL 74 #define KF_SSE4_2 0x0002000000000000ULL 75 76 #define KF_XSAVEOPT_BIT 15 // From ksamd64.inc (0x0F -> 0x8000) 77 #define KF_XSTATE_BIT 23 // From ksamd64.inc (0x17 -> 0x800000) 78 #define KF_RDWRFSGSBASE_BIT 28 // From ksamd64.inc (0x1C -> 0x10000000) 79 #define KF_XSAVES_BIT 38 // From ksamd64.inc (0x26 -> 0x4000000000) 80 #define KF_FPU_LEAKAGE_BIT 41 // From ksamd64.inc (0x29 -> 0x20000000000) 81 #define KF_CAT_BIT 44 // From ksamd64.inc (0x2C -> 0x100000000000) 82 83 // 84 // KPCR Access for non-IA64 builds 85 // 86 //#define K0IPCR ((ULONG_PTR)(KIP0PCRADDRESS)) 87 //#define PCR ((volatile KPCR * const)K0IPCR) 88 #define PCR ((volatile KPCR * const)__readgsqword(FIELD_OFFSET(KPCR, Self))) 89 //#if defined(CONFIG_SMP) || defined(NT_BUILD) 90 //#undef KeGetPcr 91 //#define KeGetPcr() ((volatile KPCR * const)__readfsdword(0x1C)) 92 //#endif 93 94 // 95 // Double fault stack size 96 // 97 #define DOUBLE_FAULT_STACK_SIZE 0x2000 98 99 // 100 // CPU Vendors 101 // 102 typedef enum 103 { 104 CPU_UNKNOWN, 105 CPU_AMD, 106 CPU_INTEL, 107 CPU_VIA 108 } CPU_VENDORS; 109 110 // 111 // Machine Types 112 // 113 #define MACHINE_TYPE_ISA 0x0000 114 #define MACHINE_TYPE_EISA 0x0001 115 #define MACHINE_TYPE_MCA 0x0002 116 117 // 118 // X86 80386 Segment Types 119 // 120 #define I386_TASK_GATE 0x5 121 #define I386_TSS 0x9 122 #define I386_ACTIVE_TSS 0xB 123 #define I386_CALL_GATE 0xC 124 #define I386_INTERRUPT_GATE 0xE 125 #define I386_TRAP_GATE 0xF 126 127 // 128 // Selector Names 129 // 130 #define RPL_MASK 0x0003 131 #define MODE_MASK 0x0001 132 #define KGDT64_NULL 0x0000 133 #define KGDT64_R0_CODE 0x0010 134 #define KGDT64_R0_DATA 0x0018 135 #define KGDT64_R3_CMCODE 0x0020 136 #define KGDT64_R3_DATA 0x0028 137 #define KGDT64_R3_CODE 0x0030 138 #define KGDT64_SYS_TSS 0x0040 139 #define KGDT64_R3_CMTEB 0x0050 140 #define KGDT64_R0_LDT 0x0060 141 142 // 143 // CR4 144 // 145 #define CR4_VME 0x1 146 #define CR4_PVI 0x2 147 #define CR4_TSD 0x4 148 #define CR4_DE 0x8 149 #define CR4_PSE 0x10 150 #define CR4_PAE 0x20 151 #define CR4_MCE 0x40 152 #define CR4_PGE 0x80 153 #define CR4_FXSR 0x200 154 #define CR4_XMMEXCPT 0x400 155 #define CR4_CHANNELS 0x800 156 #define CR4_XSAVE 0x40000 157 158 // 159 // DR7 160 // 161 #define DR7_LEGAL 0xFFFF0355 162 #define DR7_ACTIVE 0x00000355 163 #define DR7_TRACE_BRANCH 0x00000200 164 #define DR7_LAST_BRANCH 0x00000100 165 166 // 167 // Debug flags 168 // 169 #define DEBUG_ACTIVE_DR7 0x0001 170 #define DEBUG_ACTIVE_INSTRUMENTED 0x0002 171 #define DEBUG_ACTIVE_DBG_INSTRUMENTED 0x0003 172 #define DEBUG_ACTIVE_MINIMAL_THREAD 0x0004 173 #define DEBUG_ACTIVE_PRIMARY_THREAD 0x0080 174 #define DEBUG_ACTIVE_PRIMARY_THREAD_BIT 0x0007 175 #define DEBUG_ACTIVE_PRIMARY_THREAD_LOCK_BIT 0x001F 176 #define DEBUG_ACTIVE_SCHEDULED_THREAD 0x0040 177 #define DEBUG_ACTIVE_SCHEDULED_THREAD_BIT 0x0006 178 #define DEBUG_ACTIVE_SCHEDULED_THREAD_LOCK_BIT 0x001E 179 #define DEBUG_ACTIVE_SCHEDULED_THREAD_LOCK 0x40000000 180 181 // 182 // EFlags 183 // 184 #define EFLAGS_CF 0x01L 185 #define EFLAGS_ZF 0x40L 186 #define EFLAGS_TF 0x100L 187 #define EFLAGS_INTERRUPT_MASK 0x200L 188 #define EFLAGS_DF 0x400L 189 #define EFLAGS_IOPL 0x3000L 190 #define EFLAGS_NESTED_TASK 0x4000L 191 //#define EFLAGS_NF 0x4000 192 #define EFLAGS_RF 0x10000 193 #define EFLAGS_V86_MASK 0x20000 194 #define EFLAGS_ALIGN_CHECK 0x40000 195 #define EFLAGS_VIF 0x80000 196 #define EFLAGS_VIP 0x100000 197 #define EFLAGS_ID 0x200000 198 #define EFLAGS_USER_SANITIZE 0x3F4DD7 199 #define EFLAG_SIGN 0x8000 200 #define EFLAG_ZERO 0x4000 201 #define EFLAGS_TF_MASK 0x0100 202 #define EFLAGS_TF_SHIFT 0x0008 203 #define EFLAGS_ID_MASK 0x200000 204 #define EFLAGS_IF_MASK 0x0200 205 #define EFLAGS_IF_SHIFT 0x0009 206 207 // 208 // MXCSR Floating Control/Status Bit Masks 209 // 210 #define XSW_INVALID_OPERATION 0x0001 211 #define XSW_DENORMAL 0x0002 212 #define XSW_ZERO_DIVIDE 0x0004 213 #define XSW_OVERFLOW 0x0008 214 #define XSW_UNDERFLOW 0x0010 215 #define XSW_PRECISION 0x0020 216 #define XCW_INVALID_OPERATION 0x0080 217 #define XCW_DENORMAL 0x0100 218 #define XCW_ZERO_DIVIDE 0x0200 219 #define XCW_OVERFLOW 0x0400 220 #define XCW_UNDERFLOW 0x0800 221 #define XCW_PRECISION 0x1000 222 #define XCW_ROUND_CONTROL 0x6000 223 #define XCW_FLUSH_ZERO 0x8000 224 #define XSW_ERROR_MASK 0x003F 225 #define XSW_ERROR_SHIFT 7 226 227 // 228 // Legacy floating status word bit masks. 229 // 230 #define FSW_INVALID_OPERATION 0x0001 231 #define FSW_DENORMAL 0x0002 232 #define FSW_ZERO_DIVIDE 0x0004 233 #define FSW_OVERFLOW 0x0008 234 #define FSW_UNDERFLOW 0x0010 235 #define FSW_PRECISION 0x0020 236 #define FSW_STACK_FAULT 0x0040 237 #define FSW_ERROR_SUMMARY 0x0080 238 #define FSW_CONDITION_CODE_0 0x0100 239 #define FSW_CONDITION_CODE_1 0x0200 240 #define FSW_CONDITION_CODE_2 0x0400 241 #define FSW_CONDITION_CODE_3 0x4000 242 #define FSW_ERROR_MASK 0x003F 243 244 // 245 // Machine Specific Registers 246 // 247 #define MSR_EFER 0xC0000080 248 #define MSR_STAR 0xC0000081 249 #define MSR_LSTAR 0xC0000082 250 #define MSR_CSTAR 0xC0000083 251 #define MSR_SYSCALL_MASK 0xC0000084 252 #define MSR_FS_BASE 0xC0000100 253 #define MSR_GS_BASE 0xC0000101 254 #define MSR_GS_SWAP 0xC0000102 255 #define MSR_MCG_STATUS 0x017A 256 #define MSR_AMD_ACCESS 0x9C5A203A 257 #define MSR_IA32_MISC_ENABLE 0x000001A0 258 #define MSR_LAST_BRANCH_FROM 0x01DB 259 #define MSR_LAST_BRANCH_TO 0x01DC 260 #define MSR_LAST_EXCEPTION_FROM 0x01DD 261 #define MSR_LAST_EXCEPTION_TO 0x01DE 262 263 // 264 // Caching values for the PAT MSR 265 // 266 #define PAT_UC 0ULL 267 #define PAT_WC 1ULL 268 #define PAT_WT 4ULL 269 #define PAT_WP 5ULL 270 #define PAT_WB 6ULL 271 #define PAT_UCM 7ULL 272 273 // 274 // Flags in MSR_EFER 275 // 276 #define MSR_SCE 0x0001 277 #define MSR_LME 0x0100 278 #define MSR_LMA 0x0400 279 #define MSR_NXE 0x0800 280 #define MSR_PAT 0x0277 281 #define MSR_DEBUG_CTL 0x01D9 282 283 // 284 // Flags in MSR_IA32_MISC_ENABLE 285 // 286 #define MSR_XD_ENABLE_MASK 0xFFFFFFFB 287 288 // 289 // Flags in MSR_DEBUG_CTL 290 // 291 #define MSR_DEBUG_CTL_LBR 0x0001 292 #define MSR_DEBUG_CTL_BTF 0x0002 293 294 // 295 // IPI Types 296 // 297 #define IPI_APC 1 298 #define IPI_DPC 2 299 #define IPI_FREEZE 4 300 #define IPI_PACKET_READY 8 301 #define IPI_SYNCH_REQUEST 16 302 303 // 304 // PRCB Flags 305 // 306 #define PRCB_MINOR_VERSION 1 307 #define PRCB_MAJOR_VERSION 1 308 #define PRCB_BUILD_DEBUG 1 309 #define PRCB_BUILD_UNIPROCESSOR 2 310 311 // 312 // Exception active flags 313 // 314 #define KEXCEPTION_ACTIVE_INTERRUPT_FRAME 0x0000 315 #define KEXCEPTION_ACTIVE_EXCEPTION_FRAME 0x0001 316 #define KEXCEPTION_ACTIVE_SERVICE_FRAME 0x0002 317 318 // 319 // HAL Variables 320 // 321 #define INITIAL_STALL_COUNT 100 322 #define MM_HAL_VA_START 0xFFFFFFFFFFC00000ULL /* This is Vista+ */ 323 #define MM_HAL_VA_END 0xFFFFFFFFFFFFFFFFULL 324 #define APIC_BASE 0xFFFFFFFFFFFE0000ULL 325 326 // 327 // IOPM Definitions 328 // 329 #define IO_ACCESS_MAP_NONE 0 330 #define IOPM_OFFSET FIELD_OFFSET(KTSS, IoMaps[0].IoMap) 331 #define KiComputeIopmOffset(MapNumber) \ 332 (MapNumber == IO_ACCESS_MAP_NONE) ? \ 333 (USHORT)(sizeof(KTSS)) : \ 334 (USHORT)(FIELD_OFFSET(KTSS, IoMaps[MapNumber-1].IoMap)) 335 336 // 337 // Static Kernel-Mode Address start (use MM_KSEG0_BASE for actual) 338 // 339 #define KSEG0_BASE 0xfffff80000000000ULL 340 341 #define NMI_STACK_SIZE 0x2000 342 #define ISR_STACK_SIZE 0x6000 343 344 // 345 // Synchronization-level IRQL 346 // 347 #ifndef CONFIG_SMP 348 #define SYNCH_LEVEL DISPATCH_LEVEL 349 #else 350 #define SYNCH_LEVEL (IPI_LEVEL - 2) 351 #endif 352 353 // 354 // Number of pool lookaside lists per pool in the PRCB 355 // 356 #define NUMBER_POOL_LOOKASIDE_LISTS 32 357 358 // 359 // Structure for CPUID 360 // 361 typedef union _CPU_INFO 362 { 363 UINT32 AsUINT32[4]; 364 struct 365 { 366 ULONG Eax; 367 ULONG Ebx; 368 ULONG Ecx; 369 ULONG Edx; 370 }; 371 } CPU_INFO, *PCPU_INFO; 372 373 // 374 // Trap Frame Definition 375 // 376 typedef struct _KTRAP_FRAME 377 { 378 UINT64 P1Home; 379 UINT64 P2Home; 380 UINT64 P3Home; 381 UINT64 P4Home; 382 UINT64 P5; 383 CHAR PreviousMode; 384 UCHAR PreviousIrql; 385 UCHAR FaultIndicator; 386 UCHAR ExceptionActive; 387 ULONG MxCsr; 388 UINT64 Rax; 389 UINT64 Rcx; 390 UINT64 Rdx; 391 UINT64 R8; 392 UINT64 R9; 393 UINT64 R10; 394 UINT64 R11; 395 union 396 { 397 UINT64 GsBase; 398 UINT64 GsSwap; 399 }; 400 M128A Xmm0; 401 M128A Xmm1; 402 M128A Xmm2; 403 M128A Xmm3; 404 M128A Xmm4; 405 M128A Xmm5; 406 union 407 { 408 UINT64 FaultAddress; 409 UINT64 ContextRecord; 410 UINT64 TimeStampCKCL; 411 }; 412 UINT64 Dr0; 413 UINT64 Dr1; 414 UINT64 Dr2; 415 UINT64 Dr3; 416 UINT64 Dr6; 417 UINT64 Dr7; 418 union 419 { 420 struct 421 { 422 UINT64 DebugControl; 423 UINT64 LastBranchToRip; 424 UINT64 LastBranchFromRip; 425 UINT64 LastExceptionToRip; 426 UINT64 LastExceptionFromRip; 427 }; 428 struct 429 { 430 UINT64 LastBranchControl; 431 ULONG LastBranchMSR; 432 }; 433 }; 434 USHORT SegDs; 435 USHORT SegEs; 436 USHORT SegFs; 437 USHORT SegGs; 438 UINT64 TrapFrame; 439 UINT64 Rbx; 440 UINT64 Rdi; 441 UINT64 Rsi; 442 UINT64 Rbp; 443 union 444 { 445 UINT64 ErrorCode; 446 UINT64 ExceptionFrame; 447 UINT64 TimeStampKlog; 448 }; 449 UINT64 Rip; 450 USHORT SegCs; 451 UCHAR Fill0; 452 UCHAR Logging; 453 USHORT Fill1[2]; 454 ULONG EFlags; 455 ULONG Fill2; 456 UINT64 Rsp; 457 USHORT SegSs; 458 USHORT Fill3; 459 LONG CodePatchCycle; 460 } KTRAP_FRAME, *PKTRAP_FRAME; 461 462 // 463 // Dummy LDT_ENTRY 464 // 465 #ifndef _LDT_ENTRY_DEFINED 466 #define _LDT_ENTRY_DEFINED 467 typedef ULONG LDT_ENTRY; 468 #endif 469 470 // 471 // GDT Entry Definition 472 // 473 typedef union _KGDTENTRY64 474 { 475 struct 476 { 477 USHORT LimitLow; 478 USHORT BaseLow; 479 union 480 { 481 struct 482 { 483 UCHAR BaseMiddle; 484 UCHAR Flags1; 485 UCHAR Flags2; 486 UCHAR BaseHigh; 487 } Bytes; 488 struct 489 { 490 ULONG BaseMiddle:8; 491 ULONG Type:5; 492 ULONG Dpl:2; 493 ULONG Present:1; 494 ULONG LimitHigh:4; 495 ULONG System:1; 496 ULONG LongMode:1; 497 ULONG DefaultBig:1; 498 ULONG Granularity:1; 499 ULONG BaseHigh:8; 500 } Bits; 501 }; 502 ULONG BaseUpper; 503 ULONG MustBeZero; 504 }; 505 UINT64 Alignment; 506 } KGDTENTRY64, *PKGDTENTRY64; 507 #define KGDTENTRY KGDTENTRY64 508 #define PKGDTENTRY PKGDTENTRY64 509 510 // 511 // IDT Entry Access Definition 512 // 513 typedef struct _KIDT_ACCESS 514 { 515 union 516 { 517 struct 518 { 519 UCHAR Reserved; 520 UCHAR SegmentType:4; 521 UCHAR SystemSegmentFlag:1; 522 UCHAR Dpl:2; 523 UCHAR Present:1; 524 }; 525 USHORT Value; 526 }; 527 } KIDT_ACCESS, *PKIDT_ACCESS; 528 529 // 530 // IDT Entry Definition 531 // 532 typedef union _KIDTENTRY64 533 { 534 struct 535 { 536 USHORT OffsetLow; 537 USHORT Selector; 538 USHORT IstIndex:3; 539 USHORT Reserved0:5; 540 USHORT Type:5; 541 USHORT Dpl:2; 542 USHORT Present:1; 543 USHORT OffsetMiddle; 544 ULONG OffsetHigh; 545 ULONG Reserved1; 546 }; 547 UINT64 Alignment; 548 } KIDTENTRY64, *PKIDTENTRY64; 549 #define KIDTENTRY KIDTENTRY64 550 #define PKIDTENTRY PKIDTENTRY64 551 552 typedef struct _KDESCRIPTOR 553 { 554 USHORT Pad[3]; 555 USHORT Limit; 556 PVOID Base; 557 } KDESCRIPTOR, *PKDESCRIPTOR; 558 559 #ifndef NTOS_MODE_USER 560 561 // 562 // Special Registers Structure (outside of CONTEXT) 563 // 564 typedef struct _KSPECIAL_REGISTERS 565 { 566 ULONG64 Cr0; 567 ULONG64 Cr2; 568 ULONG64 Cr3; 569 ULONG64 Cr4; 570 ULONG64 KernelDr0; 571 ULONG64 KernelDr1; 572 ULONG64 KernelDr2; 573 ULONG64 KernelDr3; 574 ULONG64 KernelDr6; 575 ULONG64 KernelDr7; 576 KDESCRIPTOR Gdtr; 577 KDESCRIPTOR Idtr; 578 USHORT Tr; 579 USHORT Ldtr; 580 ULONG MxCsr; 581 ULONG64 DebugControl; 582 ULONG64 LastBranchToRip; 583 ULONG64 LastBranchFromRip; 584 ULONG64 LastExceptionToRip; 585 ULONG64 LastExceptionFromRip; 586 ULONG64 Cr8; 587 ULONG64 MsrGsBase; 588 ULONG64 MsrGsSwap; 589 ULONG64 MsrStar; 590 ULONG64 MsrLStar; 591 ULONG64 MsrCStar; 592 ULONG64 MsrSyscallMask; 593 } KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS; 594 595 // 596 // Processor State Data 597 // 598 typedef struct _KPROCESSOR_STATE 599 { 600 KSPECIAL_REGISTERS SpecialRegisters; 601 CONTEXT ContextFrame; 602 } KPROCESSOR_STATE, *PKPROCESSOR_STATE; 603 604 #if (NTDDI_VERSION < NTDDI_LONGHORN) 605 #define GENERAL_LOOKASIDE_POOL PP_LOOKASIDE_LIST 606 #endif 607 608 typedef struct _KREQUEST_PACKET 609 { 610 PVOID CurrentPacket[3]; 611 PVOID WorkerRoutine; 612 } KREQUEST_PACKET, *PKREQUEST_PACKET; 613 614 typedef struct _REQUEST_MAILBOX 615 { 616 INT64 RequestSummary; 617 KREQUEST_PACKET RequestPacket; 618 PVOID Virtual[7]; 619 } REQUEST_MAILBOX, *PREQUEST_MAILBOX; 620 621 // 622 // Processor Region Control Block 623 // 624 typedef struct _KPRCB 625 { 626 ULONG MxCsr; 627 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 628 USHORT Number; 629 #else 630 UCHAR Number; 631 UCHAR NestingLevel; 632 #endif 633 UCHAR InterruptRequest; 634 UCHAR IdleHalt; 635 struct _KTHREAD *CurrentThread; 636 struct _KTHREAD *NextThread; 637 struct _KTHREAD *IdleThread; 638 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 639 UCHAR NestingLevel; 640 UCHAR Group; 641 UCHAR PrcbPad00[6]; 642 #else 643 UINT64 UserRsp; 644 #endif 645 UINT64 RspBase; 646 UINT64 PrcbLock; 647 UINT64 SetMember; 648 KPROCESSOR_STATE ProcessorState; 649 CHAR CpuType; 650 CHAR CpuID; 651 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 652 union 653 { 654 USHORT CpuStep; 655 struct 656 { 657 UCHAR CpuStepping; 658 UCHAR CpuModel; 659 }; 660 }; 661 #else 662 USHORT CpuStep; 663 #endif 664 ULONG MHz; 665 UINT64 HalReserved[8]; 666 USHORT MinorVersion; 667 USHORT MajorVersion; 668 UCHAR BuildType; 669 UCHAR CpuVendor; 670 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 671 UCHAR CoresPerPhysicalProcessor; 672 UCHAR LogicalProcessorsPerCore; 673 #else 674 UCHAR InitialApicId; 675 UCHAR LogicalProcessorsPerPhysicalProcessor; 676 #endif 677 ULONG ApicMask; 678 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 679 ULONG CFlushSize; 680 #else 681 UCHAR CFlushSize; 682 UCHAR PrcbPad0x[3]; 683 #endif 684 PVOID AcpiReserved; 685 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 686 ULONG InitialApicId; 687 ULONG Stride; 688 UINT64 PrcbPad01[3]; 689 #else 690 UINT64 PrcbPad00[4]; 691 #endif 692 KSPIN_LOCK_QUEUE LockQueue[LockQueueMaximumLock]; // 2003: 33, vista:49 693 PP_LOOKASIDE_LIST PPLookasideList[16]; 694 GENERAL_LOOKASIDE_POOL PPNPagedLookasideList[NUMBER_POOL_LOOKASIDE_LISTS]; 695 GENERAL_LOOKASIDE_POOL PPPagedLookasideList[NUMBER_POOL_LOOKASIDE_LISTS]; 696 UINT64 PacketBarrier; 697 SINGLE_LIST_ENTRY DeferredReadyListHead; 698 LONG MmPageFaultCount; 699 LONG MmCopyOnWriteCount; 700 LONG MmTransitionCount; 701 #if (NTDDI_VERSION < NTDDI_LONGHORN) 702 LONG MmCacheTransitionCount; 703 #endif 704 LONG MmDemandZeroCount; 705 LONG MmPageReadCount; 706 LONG MmPageReadIoCount; 707 #if (NTDDI_VERSION < NTDDI_LONGHORN) 708 LONG MmCacheReadCount; 709 LONG MmCacheIoCount; 710 #endif 711 LONG MmDirtyPagesWriteCount; 712 LONG MmDirtyWriteIoCount; 713 LONG MmMappedPagesWriteCount; 714 LONG MmMappedWriteIoCount; 715 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 716 ULONG KeSystemCalls; 717 ULONG KeContextSwitches; 718 ULONG CcFastReadNoWait; 719 ULONG CcFastReadWait; 720 ULONG CcFastReadNotPossible; 721 ULONG CcCopyReadNoWait; 722 ULONG CcCopyReadWait; 723 ULONG CcCopyReadNoWaitMiss; 724 LONG LookasideIrpFloat; 725 #else 726 LONG LookasideIrpFloat; 727 ULONG KeSystemCalls; 728 #endif 729 LONG IoReadOperationCount; 730 LONG IoWriteOperationCount; 731 LONG IoOtherOperationCount; 732 LARGE_INTEGER IoReadTransferCount; 733 LARGE_INTEGER IoWriteTransferCount; 734 LARGE_INTEGER IoOtherTransferCount; 735 #if (NTDDI_VERSION < NTDDI_LONGHORN) 736 ULONG KeContextSwitches; 737 UCHAR PrcbPad2[12]; 738 #endif 739 UINT64 TargetSet; 740 ULONG IpiFrozen; 741 UCHAR PrcbPad3[116]; 742 REQUEST_MAILBOX RequestMailbox[64]; 743 UINT64 SenderSummary; 744 UCHAR PrcbPad4[120]; 745 KDPC_DATA DpcData[2]; 746 PVOID DpcStack; 747 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 748 PVOID SparePtr0; 749 #else 750 PVOID SavedRsp; 751 #endif 752 LONG MaximumDpcQueueDepth; 753 ULONG DpcRequestRate; 754 ULONG MinimumDpcRate; 755 UCHAR DpcInterruptRequested; 756 UCHAR DpcThreadRequested; 757 UCHAR DpcRoutineActive; 758 UCHAR DpcThreadActive; 759 UINT64 TimerHand; 760 UINT64 TimerRequest; 761 LONG TickOffset; 762 LONG MasterOffset; 763 ULONG DpcLastCount; 764 UCHAR ThreadDpcEnable; 765 UCHAR QuantumEnd; 766 UCHAR PrcbPad50; 767 UCHAR IdleSchedule; 768 LONG DpcSetEventRequest; 769 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 770 ULONG KeExceptionDispatchCount; 771 #else 772 LONG PrcbPad40; 773 PVOID DpcThread; 774 #endif 775 KEVENT DpcEvent; 776 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 777 PVOID PrcbPad51; 778 #endif 779 KDPC CallDpc; 780 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 781 LONG ClockKeepAlive; 782 UCHAR ClockCheckSlot; 783 UCHAR ClockPollCycle; 784 UCHAR PrcbPad6[2]; 785 LONG DpcWatchdogPeriod; 786 LONG DpcWatchdogCount; 787 UINT64 PrcbPad70[2]; 788 #else 789 UINT64 PrcbPad7[4]; 790 #endif 791 LIST_ENTRY WaitListHead; 792 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 793 UINT64 WaitLock; 794 #endif 795 ULONG ReadySummary; 796 ULONG QueueIndex; 797 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 798 UINT64 PrcbPad71[12]; 799 #endif 800 LIST_ENTRY DispatcherReadyListHead[32]; 801 ULONG InterruptCount; 802 ULONG KernelTime; 803 ULONG UserTime; 804 ULONG DpcTime; 805 ULONG InterruptTime; 806 ULONG AdjustDpcThreshold; 807 UCHAR SkipTick; 808 UCHAR DebuggerSavedIRQL; 809 UCHAR PollSlot; 810 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 811 UCHAR PrcbPad80[5]; 812 ULONG DpcTimeCount; 813 ULONG DpcTimeLimit; 814 ULONG PeriodicCount; 815 ULONG PeriodicBias; 816 UINT64 PrcbPad81[2]; 817 #else 818 UCHAR PrcbPad8[13]; 819 #endif 820 struct _KNODE *ParentNode; 821 UINT64 MultiThreadProcessorSet; 822 struct _KPRCB *MultiThreadSetMaster; 823 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 824 UINT64 StartCycles; 825 LONG MmSpinLockOrdering; 826 ULONG PageColor; 827 ULONG NodeColor; 828 ULONG NodeShiftedColor; 829 ULONG SecondaryColorMask; 830 #endif 831 LONG Sleeping; 832 #if (NTDDI_VERSION >= NTDDI_LONGHORN) 833 UINT64 CycleTime; 834 ULONG CcFastMdlReadNoWait; 835 ULONG CcFastMdlReadWait; 836 ULONG CcFastMdlReadNotPossible; 837 ULONG CcMapDataNoWait; 838 ULONG CcMapDataWait; 839 ULONG CcPinMappedDataCount; 840 ULONG CcPinReadNoWait; 841 ULONG CcPinReadWait; 842 ULONG CcMdlReadNoWait; 843 ULONG CcMdlReadWait; 844 ULONG CcLazyWriteHotSpots; 845 ULONG CcLazyWriteIos; 846 ULONG CcLazyWritePages; 847 ULONG CcDataFlushes; 848 ULONG CcDataPages; 849 ULONG CcLostDelayedWrites; 850 ULONG CcFastReadResourceMiss; 851 ULONG CcCopyReadWaitMiss; 852 ULONG CcFastMdlReadResourceMiss; 853 ULONG CcMapDataNoWaitMiss; 854 ULONG CcMapDataWaitMiss; 855 ULONG CcPinReadNoWaitMiss; 856 ULONG CcPinReadWaitMiss; 857 ULONG CcMdlReadNoWaitMiss; 858 ULONG CcMdlReadWaitMiss; 859 ULONG CcReadAheadIos; 860 LONG MmCacheTransitionCount; 861 LONG MmCacheReadCount; 862 LONG MmCacheIoCount; 863 ULONG PrcbPad91[3]; 864 PROCESSOR_POWER_STATE PowerState; 865 ULONG KeAlignmentFixupCount; 866 UCHAR VendorString[13]; 867 UCHAR PrcbPad10[3]; 868 ULONG FeatureBits; 869 LARGE_INTEGER UpdateSignature; 870 KDPC DpcWatchdogDpc; 871 KTIMER DpcWatchdogTimer; 872 CACHE_DESCRIPTOR Cache[5]; 873 ULONG CacheCount; 874 ULONG CachedCommit; 875 ULONG CachedResidentAvailable; 876 PVOID HyperPte; 877 PVOID WheaInfo; 878 PVOID EtwSupport; 879 SLIST_HEADER InterruptObjectPool; 880 SLIST_HEADER HypercallPageList; 881 PVOID HypercallPageVirtual; 882 PVOID VirtualApicAssist; 883 UINT64* StatisticsPage; 884 PVOID RateControl; 885 UINT64 CacheProcessorMask[5]; 886 UINT64 PackageProcessorSet; 887 UINT64 CoreProcessorSet; 888 #else 889 ULONG PrcbPad90[1]; 890 ULONG DebugDpcTime; 891 ULONG PageColor; 892 ULONG NodeColor; 893 ULONG NodeShiftedColor; 894 ULONG SecondaryColorMask; 895 UCHAR PrcbPad9[12]; 896 ULONG CcFastReadNoWait; 897 ULONG CcFastReadWait; 898 ULONG CcFastReadNotPossible; 899 ULONG CcCopyReadNoWait; 900 ULONG CcCopyReadWait; 901 ULONG CcCopyReadNoWaitMiss; 902 ULONG KeAlignmentFixupCount; 903 ULONG KeDcacheFlushCount; 904 ULONG KeExceptionDispatchCount; 905 ULONG KeFirstLevelTbFills; 906 ULONG KeFloatingEmulationCount; 907 ULONG KeIcacheFlushCount; 908 ULONG KeSecondLevelTbFills; 909 UCHAR VendorString[13]; 910 UCHAR PrcbPad10[2]; 911 ULONG FeatureBits; 912 LARGE_INTEGER UpdateSignature; 913 PROCESSOR_POWER_STATE PowerState; 914 CACHE_DESCRIPTOR Cache[5]; 915 ULONG CacheCount; 916 #endif 917 #ifdef __REACTOS__ 918 ULONG FeatureBitsHigh; 919 #endif 920 } KPRCB, *PKPRCB; 921 922 // 923 // Processor Control Region 924 // 925 typedef struct _KIPCR 926 { 927 union 928 { 929 NT_TIB NtTib; 930 struct 931 { 932 union _KGDTENTRY64 *GdtBase; 933 struct _KTSS64 *TssBase; 934 ULONG64 UserRsp; 935 struct _KPCR *Self; 936 struct _KPRCB *CurrentPrcb; 937 PKSPIN_LOCK_QUEUE LockArray; 938 PVOID Used_Self; 939 }; 940 }; 941 union _KIDTENTRY64 *IdtBase; 942 ULONG64 Unused[2]; 943 KIRQL Irql; 944 UCHAR SecondLevelCacheAssociativity; 945 UCHAR ObsoleteNumber; 946 UCHAR Fill0; 947 ULONG Unused0[3]; 948 USHORT MajorVersion; 949 USHORT MinorVersion; 950 ULONG StallScaleFactor; 951 PVOID Unused1[3]; 952 ULONG KernelReserved[15]; 953 ULONG SecondLevelCacheSize; 954 ULONG HalReserved[16]; 955 ULONG Unused2; 956 ULONG Fill1; 957 PVOID KdVersionBlock; // 0x108 958 PVOID Unused3; 959 ULONG PcrAlign1[24]; 960 ULONG Fill2[2]; // 0x178 961 KPRCB Prcb; // 0x180 962 963 // hack: 964 ULONG ContextSwitches; 965 966 } KIPCR, *PKIPCR; 967 968 // 969 // TSS Definition 970 // 971 typedef struct _KiIoAccessMap 972 { 973 UCHAR DirectionMap[32]; 974 UCHAR IoMap[8196]; 975 } KIIO_ACCESS_MAP; 976 977 978 #pragma pack(push,4) 979 typedef struct _KTSS64 980 { 981 /* 000 */ ULONG Reserved0; 982 /* 004 */ UINT64 Rsp0; 983 /* 00c */ UINT64 Rsp1; 984 /* 014 */ UINT64 Rsp2; 985 /* 01c */ UINT64 Ist[8]; 986 /* 05c */ UINT64 Reserved1; 987 /* 064 */ USHORT Reserved2; 988 /* 066 */ USHORT IoMapBase; 989 } KTSS64, *PKTSS64; 990 #pragma pack(pop) 991 #define KTSS KTSS64 992 #define PKTSS PKTSS64 993 994 // 995 // KEXCEPTION_FRAME 996 // 997 typedef struct _KEXCEPTION_FRAME 998 { 999 ULONG64 P1Home; 1000 ULONG64 P2Home; 1001 ULONG64 P3Home; 1002 ULONG64 P4Home; 1003 ULONG64 P5; 1004 #if (NTDDI_VERSION >= NTDDI_WIN8) 1005 ULONG64 Spare1; 1006 #else 1007 ULONG64 InitialStack; 1008 #endif 1009 M128A Xmm6; 1010 M128A Xmm7; 1011 M128A Xmm8; 1012 M128A Xmm9; 1013 M128A Xmm10; 1014 M128A Xmm11; 1015 M128A Xmm12; 1016 M128A Xmm13; 1017 M128A Xmm14; 1018 M128A Xmm15; 1019 ULONG64 TrapFrame; 1020 #if (NTDDI_VERSION < NTDDI_WIN8) 1021 ULONG64 CallbackStack; 1022 #endif 1023 ULONG64 OutputBuffer; 1024 ULONG64 OutputLength; 1025 #if (NTDDI_VERSION >= NTDDI_WIN8) 1026 ULONG64 Spare2; 1027 #endif 1028 ULONG64 MxCsr; 1029 ULONG64 Rbp; 1030 ULONG64 Rbx; 1031 ULONG64 Rdi; 1032 ULONG64 Rsi; 1033 ULONG64 R12; 1034 ULONG64 R13; 1035 ULONG64 R14; 1036 ULONG64 R15; 1037 ULONG64 Return; 1038 } KEXCEPTION_FRAME, *PKEXCEPTION_FRAME; 1039 1040 typedef struct _MACHINE_FRAME 1041 { 1042 ULONG64 Rip; 1043 USHORT SegCs; 1044 USHORT Fill1[3]; 1045 ULONG EFlags; 1046 ULONG Fill2; 1047 ULONG64 Rsp; 1048 USHORT SegSs; 1049 USHORT Fill3[3]; 1050 } MACHINE_FRAME, *PMACHINE_FRAME; 1051 1052 // 1053 // Defines the Callback Stack Layout for User Mode Callbacks 1054 // 1055 typedef KEXCEPTION_FRAME KCALLOUT_FRAME, *PKCALLOUT_FRAME; 1056 1057 // 1058 // User side callout frame 1059 // 1060 typedef struct _UCALLOUT_FRAME 1061 { 1062 ULONG64 P1Home; 1063 ULONG64 P2Home; 1064 ULONG64 P3Home; 1065 ULONG64 P4Home; 1066 PVOID Buffer; 1067 ULONG Length; 1068 ULONG ApiNumber; 1069 MACHINE_FRAME MachineFrame; 1070 } UCALLOUT_FRAME, *PUCALLOUT_FRAME; // size = 0x0058 1071 1072 // 1073 // Stack frame layout for KiUserExceptionDispatcher 1074 // The name is totally made up 1075 // 1076 typedef struct _KUSER_EXCEPTION_STACK 1077 { 1078 CONTEXT Context; 1079 EXCEPTION_RECORD ExceptionRecord; 1080 ULONG64 Alignment; 1081 MACHINE_FRAME MachineFrame; 1082 } KUSER_EXCEPTION_STACK, * PKUSER_EXCEPTION_STACK; 1083 1084 typedef struct _DISPATCHER_CONTEXT 1085 { 1086 ULONG64 ControlPc; 1087 ULONG64 ImageBase; 1088 struct _RUNTIME_FUNCTION *FunctionEntry; 1089 ULONG64 EstablisherFrame; 1090 ULONG64 TargetIp; 1091 PCONTEXT ContextRecord; 1092 PEXCEPTION_ROUTINE LanguageHandler; 1093 PVOID HandlerData; 1094 struct _UNWIND_HISTORY_TABLE *HistoryTable; 1095 ULONG ScopeIndex; 1096 ULONG Fill0; 1097 } DISPATCHER_CONTEXT, *PDISPATCHER_CONTEXT; 1098 1099 typedef struct _KSTART_FRAME 1100 { 1101 ULONG64 P1Home; 1102 ULONG64 P2Home; 1103 ULONG64 P3Home; 1104 ULONG64 P4Home; 1105 ULONG64 Reserved; 1106 ULONG64 Return; 1107 } KSTART_FRAME, *PKSTART_FRAME; 1108 1109 typedef struct _KSWITCH_FRAME 1110 { 1111 ULONG64 P1Home; 1112 ULONG64 P2Home; 1113 ULONG64 P3Home; 1114 ULONG64 P4Home; 1115 ULONG64 P5Home; 1116 KIRQL ApcBypass; 1117 UCHAR Fill1[7]; 1118 ULONG64 Rbp; 1119 ULONG64 Return; 1120 } KSWITCH_FRAME, *PKSWITCH_FRAME; 1121 1122 #define PROCESSOR_START_FLAG_FORCE_ENABLE_NX 0x0001 1123 typedef struct _KPROCESSOR_START_BLOCK 1124 { 1125 ULONG CompletionFlag; // 0x0004 1126 ULONG Flags; // 0x0008 1127 ULONG Gdt32; // 0x000C 1128 ULONG Idt32; // 0x0012 1129 PVOID Gdt; // 0x0018 1130 // ??? 1131 ULONG64 TiledMemoryMap; // 0x0058 1132 UCHAR PmTarget[6]; // 0x0060 1133 UCHAR LmIdentityTarget[6]; // 0x0066 1134 ULONG64 LmTarget; // 0x0070 1135 struct _KPROCESSOR_START_BLOCK *SelfMap; // 0x0078 1136 ULONG64 MsrPat; // 0x0080 1137 ULONG64 MsrEFER; // 0x0088 1138 KPROCESSOR_STATE ProcessorState; // 0x0090 1139 } KPROCESSOR_START_BLOCK, *PKPROCESSOR_START_BLOCK; // size 00640 1140 1141 // 1142 // Inline function to get current KPRCB 1143 // 1144 FORCEINLINE 1145 struct _KPRCB * 1146 KeGetCurrentPrcb(VOID) 1147 { 1148 return (struct _KPRCB *)__readgsqword(FIELD_OFFSET(KIPCR, CurrentPrcb)); 1149 } 1150 1151 #endif 1152 #endif 1153