1/* $XFree86: mit/server/ddx/x386/vga256/drivers/pvga1/bank.s,v 1.11 1993/02/24 10:42:49 dawes Exp $ */
2/*
3 * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
4 *
5 * Permission to use, copy, modify, distribute, and sell this software and its
6 * documentation for any purpose is hereby granted without fee, provided that
7 * the above copyright notice appear in all copies and that both that
8 * copyright notice and this permission notice appear in supporting
9 * documentation, and that the name of Thomas Roell not be used in
10 * advertising or publicity pertaining to distribution of the software without
11 * specific, written prior permission.  Thomas Roell makes no representations
12 * about the suitability of this software for any purpose.  It is provided
13 * "as is" without express or implied warranty.
14 *
15 * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
16 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
17 * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
19 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
20 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
21 * PERFORMANCE OF THIS SOFTWARE.
22 *
23 * Author:  Thomas Roell, roell@informatik.tu-muenchen.de
24 *
25 * $Header: /proj/X11/mit/server/ddx/x386/drivers/pvga1/RCS/bank.s,v 1.1 1991/06/02 22:37:18 root Exp $
26 */
27
28/*
29 * These are here the very lowlevel VGA bankswitching routines.
30 * The segment to switch to is passed via %eax. Only %eax and %edx my be used
31 * without saving the original contents.
32 *
33 * WHY ASSEMBLY LANGUAGE ???
34 *
35 * These routines must be callable by other assembly routines. But I don't
36 * want to have the overhead of pushing and poping the normal stack-frame.
37 */
38
39/*
40 * what happens really here ?
41 *
42 * PRA and PRB are segmentpointers to out two segments. They have a granularity
43 * of 4096. That means we have to multiply the segmentnumber by 8, if we are
44 * working with 32k segments. But since PRA and PRB are 'indexed' registers,
45 * the index must be emitted first. This is accomplished by loading %al with
46 * the index and %ah with the value. Therefor we must shift the logical
47 * segmentnumber by 11.
48 *
49 * Another quirk is PRA. It's physical VGA mapping starts at 0xA0000, but it is
50 * only visible starting form 0xA8000 to 0xAFFFF. That means PRA has to be
51 * loaded with a value that points to the previous logical segment.
52 *
53 * The latter FEATURE was mentioned correctly (but somewhat not understandable)
54 * in the registerdoc of the PVGA1A. But it was COMPLETELY WRONG shown in their
55 * programming examples....
56 */
57
58#include "assyntax.h"
59
60	FILE("pvga1bank.s")
61
62	AS_BEGIN
63	SEG_TEXT
64
65/*
66 * for ReadWrite operations, we are using only PR0B as pointer to a 32k
67 * window.
68 */
69	ALIGNTEXT4
70	GLOBL	GLNAME(PVGA1SetReadWrite)
71GLNAME(PVGA1SetReadWrite):
72	SHL_L	(CONST(11),EAX)            /* combined %al*8 & movb %al,%ah */
73	MOV_B	(CONST(10),AL)
74	MOV_L	(CONST(0x3CE),EDX)
75	OUT_W
76	RET
77
78/*
79 * for Write operations, we are using PR0B as write pointer to a 32k
80 * window.
81 */
82	ALIGNTEXT4
83	GLOBL	GLNAME(PVGA1SetWrite)
84GLNAME(PVGA1SetWrite):
85	SHL_L	(CONST(11),EAX)
86	MOV_B	(CONST(10),AL)
87	MOV_L	(CONST(0x3CE),EDX)
88	OUT_W
89	RET
90
91/*
92 * for Read operations, we are using PR0A as read pointer to a 32k
93 * window.
94 */
95	ALIGNTEXT4
96	GLOBL	GLNAME(PVGA1SetRead)
97GLNAME(PVGA1SetRead):
98	DEC_L	(EAX)			/* segment wrap ... */
99	SHL_L	(CONST(11),EAX)
100	MOV_B	(CONST(9),AL)
101	MOV_L	(CONST(0x3CE),EDX)
102	OUT_W
103	RET
104