xref: /386bsd/usr/X386/lib/X11/etc/README.trident (revision a2142627)
1		Information for Trident Chipset Users
2		-------------------------------------
3
4Contents
5--------
6	1) Supported chipsets
7	2) Special considerations for 512k boards
8	3) Additional notes
9
101 - Supported chipsets
11----------------------
12  The Trident driver has undergone major work between XFree86 1.2 and
13XFree86 1.3.  Because of this work, all of the Trident SVGA chipsets, except
14the very first one, are supported by both the color and monochrome servers.
15Specifically, the following chipsets are supported:
16
17	8800CS
18	8900B
19	8900C
20	8900CL
21	9000
22
23The original Trident chipset, 8800BR, cannot be supported as an SVGA chipset
24by either the color or monochrome servers.  The chip is supported, however,
25by the "generic" driver for the monochrome server.
26
272 - Special considerations for 512k boards
28------------------------------------------
29  512k cards require the clocks in the ModeDB entries to be double the normal
30value when operating in 256 color mode.  This doubled clock must be a clock
31value on the card.  The reason for this is that each pixel takes two clock
32cycles in 256 color mode.
33
34To create timings for the color modes, take the timings for the corresponding
35monochrome mode, and double the clock.  For example:
36
37	monochrome timings (taken from Xconfig.sample):
38	 "640x480"     25      640  664  760  800    480  491  493  525
39	 "800x600"     36      800  824  896 1024    600  601  603  625
40
41	color timings:
42	 "640x480c"    50      640  664  760  800    480  491  493  525
43	 "800x600c"    72      800  824  896 1024    600  601  603  625
44
45Be aware that older Trident chipsets support a maximum clock of 65Mhz.  Hence
46the best actual clock available to the color server is 32.5Mhz.  This means,
47in broad terms, that the color server will require an interlaced mode to be
48defined for resolutions above 640x480.  Newer chipsets (8900CL and 9000)
49support up to 16 clocks, and can support much higher clocks, which will allow
50800x600 modes, non-interlaced.
51
523 - Additional Notes
53--------------------
54  We have had reports of the server failing to detect the amount of installed
55memory and the correct dot-clocks on older TVGA8900 boards.  If the server
56fails to detect the correct amount of memory, use the "Videoram" keyword in
57your Xconfig file to specify it.  (e.g. Videoram 512 or Videoram 1024).  If
58the server has problems detecting the dot-clocks, try adding the following
59line to your Xconfig file:
60
61	Clocks	25 28 45 36 57 65 50 40
62
63This line gives the clock values provided by older Trident clock synthesizer
64chipsets.  This also appears to be the standard first 8 clocks for the newer
65clock synthesizers, but you should have no problems on newer boards.
66
67  Some newer Trident 8900B/C boards are apparently being built with the clock
68synthesizers used on the 9000 and 8900CL boards.  If your board has a chip
69labeled "Trident TCK900x" ("x" has been seen as 2 or 4; there may be others),
70your board may actually have a 4th clock select bit.  The 9002 has twelve
71distinct clocks (the other 4 are duplicates); the 9004 has 16 clocks (the
72same 12 as the 9002 + 4 others).  If you see such a chip on a board with
73an 8900B or 8900C, put the following line in your Xconfig file after the
74"vga256" and/or "vga2" line:
75
76	Option "16clocks"
77
78This will cause the same clock selection code as is used for the 8900CL to
79be used for the board.
80
81  While developing the Trident driver, an interesting and perturbing hardware
82phenomenon was discovered.  When using the default board jumper configuration,
83dot-clocks above 57Mhz would frequently lock up the machine.  There appear
84to be jumpers on all of the Trident boards that determine whether the
85board will operate in zero-wait-state mode on the ISA bus.  Disabling the
86zero-wait-state mode via jumpers cured the lockups, but at the expense
87of performance.  Whether or not a given system will experience this problem
88is likely a combination of (a) bus speed, (b) video memory speed, and (c) dot
89clock speed.  So be prepared for this phenomenon to occur, and have the board
90documentation handy.
91
92$XFree86: mit/server/ddx/x386/etc/README.trident,v 1.8 1993/05/04 10:18:10 dawes Exp $
93