1 /* 2 * Copyright (c) 1994 William F. Jolitz. 3 * 386BSD Copyright Restrictions Apply. All Other Rights Reserved. 4 * 5 * $Id$ 6 * ATAPI definitions 7 */ 8 9 /* Redefined task file registers for ATAPI devices */ 10 #define atapi_bcrlo wd_cyl_lo /* byte count, low byte (R/W) */ 11 #define atapi_bcrhi wd_cyl_hi /* byte count, high byte (R/W) */ 12 #define atapi_iir wd_seccnt /* interrupt source (R) */ 13 #define ata_featr wd_error /* feature register (W) */ 14 15 /* 16 * ATAPI Status register bits. 17 */ 18 #define ATAPI_STS_BUSY 0x80 /* Command Block accessed drive. */ 19 #define ATAPI_STS_DRDY 0x40 /* Can accept ATA commands. */ 20 #define ATAPI_STS_DSC 0x10 /* Seek complete. */ 21 #define ATAPI_STS_DRQ 0x08 /* Data request bit. */ 22 #define ATAPI_STS_CORR 0x04 /* Correctable error occured. */ 23 #define ATAPI_STS_CHECK 0x01 /* Error occured, error reg has sense key. */ 24 25 #define ATAPI_STS_BITS "\020\010busy\006rdy\005seekdone\004drq\003corr\001check" 26 27 /* 28 * ATAPI Error register bits. 29 */ 30 #define ATAPI_ERR_SENSE(s) ((s) & 0xf0) /* sense key */ 31 #define ATAPI_ERR_MCR 0x08 /* media change request */ 32 #define ATAPI_ERR_ABORT 0x04 /* ATA command aborted */ 33 #define ATAPI_ERR_EOM 0x02 /* end of media */ 34 #define ATAPI_ERR_ILI 0x01 /* illegal length indicator */ 35 36 #define ATAPI_ERR_BITS "\020\005mcr\003abort\002eom\001ili" 37 38 /* 39 * ATAPI Interrupt Identification register. 40 */ 41 #define ATAPI_IIR_CoD 0x01 /* Command(1) or Data(0) */ 42 #define ATAPI_IIR_IO 0x02 /* Data Direction (r/w 1/0) */ 43 44 /* 45 * ATAPI Feature Register 46 */ 47 #define ATAPI_FEATR_DMA 0x01 /* DMA(1) or PIO(0) data transfer */ 48 49 /* 50 * Commands for ATAPI devices 51 */ 52 #define ATAPI_PKT 0xA0 /* send SCSI packet command */ 53 #define ATAPI_IDENT 0xA1 /* do an ATAPI device identify */ 54 #define ATAPI_SRST 0x08 /* do an ATAPI soft reset */ 55 56 /* 57 * ATAPI Device Identification 58 */ 59 struct atapi_params { 60 /* drive info */ 61 short atp_config; /* general configuration */ 62 #define ATAPI_CFG_CMDPKTSZ(s) ((s) & 3) /* cmd packet size in PKT CMD */ 63 #define ATAPI_CFG_CMDDRQTYP(s) ((s) & 0x60) /* kind of DRQ signal */ 64 #define ATAPI_CFG_DRQSLOW 0x00 /* 3ms (polled) DRQ */ 65 #define ATAPI_CFG_DRQINTR 0x20 /* DRQ with IRQ */ 66 #define ATAPI_CFG_DRQACCEL 0x40 /* 50us (accelerated) DRQ */ 67 #define ATAPI_CFG_RMV 0x80 /* removable media */ 68 #define ATAPI_CFG_DEVTYP(s) ((s) & 0x1f00) /* kind of ATAPI device */ 69 #define ATAPI_CFG_DEVCDROM 0x500 /* ATAPI CDROM device */ 70 #define ATAPI_CFG_PROTOTYP(s) ((s) & 0xc000) /* kind of protocol */ 71 #define ATAPI_CFG_ATAPIPROTO 0x8000 /* ATAPI protocol */ 72 #define ATAPI_CFG_ATA_1 0x0000 /* ATA protocol */ 73 #define ATAPI_CFG_ATA_2 0x4000 /* ATA protocol */ 74 75 short _reserved1[9]; 76 char atp_serial[20]; /* serial number */ 77 short _reserved2[3]; 78 char atp_rev[8]; /* firmware revision */ 79 char atp_model[40]; /* model name */ 80 short _reserved3[2]; 81 short atp_cap; /* device capabilities */ 82 #define ATAP_CAP_TSTD 0x2000 /* ATA stndard stndby timer values */ 83 #define ATAP_CAP_IORDY 0x0800 /* IORDY supported */ 84 #define ATAP_CAP_IORDYD 0x0400 /* IORDY can be disabled */ 85 #define ATAP_CAP_LBA 0x0200 /* LBA supported */ 86 #define ATAP_CAP_DMA 0x0100 /* DMA supported */ 87 short _reserved4; 88 short atp_piocycle; /* programmed I/O cycle time, in nanoseconds */ 89 short atp_dmacycle; /* DMA I/O cycle time, in nanoseconds */ 90 short atp_fields; /* fields valid */ 91 #define ATAP_FLD_ADV 0x0002 /* Advanced PIO/DMA fields valid (DMA > 1)*/ 92 #define ATAP_FLD_CUR 0x0001 /* Current log. mapping fields valid(PIO >=3)*/ 93 short atap_logcyl; /* current translations number of cyls. */ 94 short atap_logheads; /* current translations number of heads */ 95 short atap_logsec; /* current translations number of sectors */ 96 long atap_lsectors; /* current capacity of CHS sectors */ 97 char atap_cnsecperint; /* current sectors per interrupt */ 98 char atap_cnflags; 99 #define ATAP_CNF_VALID 0x01 /* Current sectors per intr. fields valid */ 100 long atap_sectors; /* capacity of LBA sectors */ 101 char atp_swdmamds; /* single-word DMA modes supported */ 102 char atp_swdmamda; /* single-word DMA mode current */ 103 char atp_mwdmamds; /* multiple-word DMA modes supported */ 104 char atp_mwdmamda; /* multiple-word DMA mode current */ 105 short atp_blindcycle; /* blind PIO minimum cycle time, in ns */ 106 }; 107 108 int atapi_cmdpktsz[4] = { 12, 16, -1, -1 }; /* size in bytes */ 109 110 /* ATAPI SCSI command packets */ 111 struct atapi_read_10 { 112 u_char ac_cmd; /* operation code - 0x28 */ 113 u_char ac_rsv1; 114 u_char ac_lba[4]; /* logical block number address (MSB first) */ 115 u_char ac_rsv2; 116 u_char ac_tfr[2]; /* transfer length (MSB first) */ 117 u_char ac_rsv3[3]; 118 }; 119 #define ATAPI10OP 0x28 120