1 /* Definitions of target machine for GNU compiler for Intel 80386. 2 Copyright (C) 1988, 1992 Free Software Foundation, Inc. 3 4 This file is part of GNU CC. 5 6 GNU CC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2, or (at your option) 9 any later version. 10 11 GNU CC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GNU CC; see the file COPYING. If not, write to 18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19 20 21 /* The purpose of this file is to define the characteristics of the i386, 22 independent of assembler syntax or operating system. 23 24 Three other files build on this one to describe a specific assembler syntax: 25 bsd386.h, att386.h, and sun386.h. 26 27 The actual tm.h file for a particular system should include 28 this file, and then the file for the appropriate assembler syntax. 29 30 Many macros that specify assembler syntax are omitted entirely from 31 this file because they really belong in the files for particular 32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE, 33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, 34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */ 35 36 /* Names to predefine in the preprocessor for this target machine. */ 37 38 #define I386 1 39 40 /* Stubs for half-pic support if not OSF/1 reference platform. */ 41 42 #ifndef HALF_PIC_P 43 #define HALF_PIC_P() 0 44 #define HALF_PIC_NUMBER_PTRS 0 45 #define HALF_PIC_NUMBER_REFS 0 46 #define HALF_PIC_ENCODE(DECL) 47 #define HALF_PIC_DECLARE(NAME) 48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.") 49 #define HALF_PIC_ADDRESS_P(X) 0 50 #define HALF_PIC_PTR(X) X 51 #define HALF_PIC_FINISH(STREAM) 52 #endif 53 54 /* Run-time compilation parameters selecting different hardware subsets. */ 55 56 extern int target_flags; 57 58 /* Macros used in the machine description to test the flags. */ 59 60 /* configure can arrage to make this 2, to force a 486. */ 61 #ifndef TARGET_CPU_DEFAULT 62 #define TARGET_CPU_DEFAULT 0 63 #endif 64 65 /* Compile 80387 insns for floating point (not library calls). */ 66 #define TARGET_80387 (target_flags & 1) 67 /* Compile code for an i486. */ 68 #define TARGET_486 (target_flags & 2) 69 /* Compile using ret insn that pops args. 70 This will not work unless you use prototypes at least 71 for all functions that can take varying numbers of args. */ 72 #define TARGET_RTD (target_flags & 8) 73 /* Compile passing first two args in regs 0 and 1. 74 This exists only to test compiler features that will 75 be needed for RISC chips. It is not usable 76 and is not intended to be usable on this cpu. */ 77 #define TARGET_REGPARM (target_flags & 020) 78 79 /* Put uninitialized locals into bss, not data. 80 Meaningful only on svr3. */ 81 #define TARGET_SVR3_SHLIB (target_flags & 040) 82 83 /* Use IEEE floating point comparisons. These handle correctly the cases 84 where the result of a comparison is unordered. Normally SIGFPE is 85 generated in such cases, in which case this isn't needed. */ 86 #define TARGET_IEEE_FP (target_flags & 0100) 87 88 /* Functions that return a floating point value may return that value 89 in the 387 FPU or in 386 integer registers. If set, this flag causes 90 the 387 to be used, which is compatible with most calling conventions. */ 91 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200) 92 93 /* Macro to define tables used to set the flags. 94 This is a list in braces of pairs in braces, 95 each pair being { "NAME", VALUE } 96 where VALUE is the bits to set or minus the bits to clear. 97 An empty string NAME is used to identify the default VALUE. */ 98 99 #define TARGET_SWITCHES \ 100 { { "80387", 1}, \ 101 { "no-80387", -1}, \ 102 { "soft-float", -1}, \ 103 { "no-soft-float", 1}, \ 104 { "486", 2}, \ 105 { "no-486", -2}, \ 106 { "386", -2}, \ 107 { "rtd", 8}, \ 108 { "no-rtd", -8}, \ 109 { "regparm", 020}, \ 110 { "no-regparm", -020}, \ 111 { "svr3-shlib", 040}, \ 112 { "no-svr3-shlib", -040}, \ 113 { "ieee-fp", 0100}, \ 114 { "no-ieee-fp", -0100}, \ 115 { "fp-ret-in-387", 0200}, \ 116 { "no-fp-ret-in-387", -0200}, \ 117 SUBTARGET_SWITCHES \ 118 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}} 119 120 /* This is meant to be redefined in the host dependent files */ 121 #define SUBTARGET_SWITCHES 122 123 124 /* target machine storage layout */ 125 126 /* Define this if most significant byte of a word is the lowest numbered. */ 127 /* That is true on the 80386. */ 128 129 #define BITS_BIG_ENDIAN 0 130 131 /* Define this if most significant byte of a word is the lowest numbered. */ 132 /* That is not true on the 80386. */ 133 #define BYTES_BIG_ENDIAN 0 134 135 /* Define this if most significant word of a multiword number is the lowest 136 numbered. */ 137 /* Not true for 80386 */ 138 #define WORDS_BIG_ENDIAN 0 139 140 /* number of bits in an addressable storage unit */ 141 #define BITS_PER_UNIT 8 142 143 /* Width in bits of a "word", which is the contents of a machine register. 144 Note that this is not necessarily the width of data type `int'; 145 if using 16-bit ints on a 80386, this would still be 32. 146 But on a machine with 16-bit registers, this would be 16. */ 147 #define BITS_PER_WORD 32 148 149 /* Width of a word, in units (bytes). */ 150 #define UNITS_PER_WORD 4 151 152 /* Width in bits of a pointer. 153 See also the macro `Pmode' defined below. */ 154 #define POINTER_SIZE 32 155 156 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 157 #define PARM_BOUNDARY 32 158 159 /* Boundary (in *bits*) on which stack pointer should be aligned. */ 160 #define STACK_BOUNDARY 32 161 162 /* Allocation boundary (in *bits*) for the code of a function. 163 For i486, we get better performance by aligning to a cache 164 line (i.e. 16 byte) boundary. */ 165 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32) 166 167 /* Alignment of field after `int : 0' in a structure. */ 168 169 #define EMPTY_FIELD_BOUNDARY 32 170 171 /* Minimum size in bits of the largest boundary to which any 172 and all fundamental data types supported by the hardware 173 might need to be aligned. No data type wants to be aligned 174 rounder than this. The i386 supports 64-bit floating point 175 quantities, but these can be aligned on any 32-bit boundary. */ 176 #define BIGGEST_ALIGNMENT 32 177 178 /* Set this non-zero if move instructions will actually fail to work 179 when given unaligned data. */ 180 #define STRICT_ALIGNMENT 0 181 182 /* If bit field type is int, don't let it cross an int, 183 and give entire struct the alignment of an int. */ 184 /* Required on the 386 since it doesn't have bitfield insns. */ 185 #define PCC_BITFIELD_TYPE_MATTERS 1 186 187 /* Align loop starts for optimal branching. */ 188 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ 189 ASM_OUTPUT_ALIGN (FILE, 2) 190 191 /* This is how to align an instruction for optimal branching. 192 On i486 we'll get better performance by aligning on a 193 cache line (i.e. 16 byte) boundary. */ 194 #define ASM_OUTPUT_ALIGN_CODE(FILE) \ 195 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2)) 196 197 /* Standard register usage. */ 198 199 /* This processor has special stack-like registers. See reg-stack.c 200 for details. */ 201 202 #define STACK_REGS 203 204 /* Number of actual hardware registers. 205 The hardware registers are assigned numbers for the compiler 206 from 0 to just below FIRST_PSEUDO_REGISTER. 207 All registers that the compiler knows about must be given numbers, 208 even those that are not normally considered general registers. 209 210 In the 80386 we give the 8 general purpose registers the numbers 0-7. 211 We number the floating point registers 8-15. 212 Note that registers 0-7 can be accessed as a short or int, 213 while only 0-3 may be used with byte `mov' instructions. 214 215 Reg 16 does not correspond to any hardware register, but instead 216 appears in the RTL as an argument pointer prior to reload, and is 217 eliminated during reloading in favor of either the stack or frame 218 pointer. */ 219 220 #define FIRST_PSEUDO_REGISTER 17 221 222 /* 1 for registers that have pervasive standard uses 223 and are not available for the register allocator. 224 On the 80386, the stack pointer is such, as is the arg pointer. */ 225 #define FIXED_REGISTERS \ 226 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ 227 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 } 228 229 /* 1 for registers not available across function calls. 230 These must include the FIXED_REGISTERS and also any 231 registers that can be used without being saved. 232 The latter must include the registers where values are returned 233 and the register where structure-value addresses are passed. 234 Aside from that, you can include as many other registers as you like. */ 235 236 #define CALL_USED_REGISTERS \ 237 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \ 238 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } 239 240 /* Macro to conditionally modify fixed_regs/call_used_regs. */ 241 #define CONDITIONAL_REGISTER_USAGE \ 242 { \ 243 if (flag_pic) \ 244 { \ 245 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 246 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 247 } \ 248 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \ 249 { \ 250 int i; \ 251 HARD_REG_SET x; \ 252 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \ 253 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ 254 if (TEST_HARD_REG_BIT (x, i)) \ 255 fixed_regs[i] = call_used_regs[i] = 1; \ 256 } \ 257 } 258 259 /* Return number of consecutive hard regs needed starting at reg REGNO 260 to hold something of mode MODE. 261 This is ordinarily the length in words of a value of mode MODE 262 but can be less for certain modes in special long registers. 263 264 Actually there are no two word move instructions for consecutive 265 registers. And only registers 0-3 may have mov byte instructions 266 applied to them. 267 */ 268 269 #define HARD_REGNO_NREGS(REGNO, MODE) \ 270 (FP_REGNO_P (REGNO) ? 1 \ 271 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 272 273 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 274 On the 80386, the first 4 cpu registers can hold any mode 275 while the floating point registers may hold only floating point. 276 Make it clear that the fp regs could not hold a 16-byte float. */ 277 278 /* The casts to int placate a compiler on a microvax, 279 for cross-compiler testing. */ 280 281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 282 ((REGNO) < 2 ? 1 \ 283 : (REGNO) < 4 ? 1 \ 284 : FP_REGNO_P ((REGNO)) \ 285 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \ 286 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \ 287 && GET_MODE_UNIT_SIZE (MODE) <= 12) \ 288 : (int) (MODE) != (int) QImode) 289 290 /* Value is 1 if it is a good idea to tie two pseudo registers 291 when one has mode MODE1 and one has mode MODE2. 292 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 293 for any hard reg, then this must be 0 for correct output. */ 294 295 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2)) 296 297 /* A C expression returning the cost of moving data from a register of class 298 CLASS1 to one of CLASS2. 299 300 On the i386, copying between floating-point and fixed-point 301 registers is expensive. */ 302 303 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ 304 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \ 305 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \ 306 : 2) 307 308 /* Specify the registers used for certain standard purposes. 309 The values of these macros are register numbers. */ 310 311 /* on the 386 the pc register is %eip, and is not usable as a general 312 register. The ordinary mov instructions won't work */ 313 /* #define PC_REGNUM */ 314 315 /* Register to use for pushing function arguments. */ 316 #define STACK_POINTER_REGNUM 7 317 318 /* Base register for access to local variables of the function. */ 319 #define FRAME_POINTER_REGNUM 6 320 321 /* First floating point reg */ 322 #define FIRST_FLOAT_REG 8 323 324 /* First & last stack-like regs */ 325 #define FIRST_STACK_REG FIRST_FLOAT_REG 326 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 327 328 /* Value should be nonzero if functions must have frame pointers. 329 Zero means the frame pointer need not be set up (and parms 330 may be accessed via the stack pointer) in functions that seem suitable. 331 This is computed in `reload', in reload1.c. */ 332 #define FRAME_POINTER_REQUIRED 0 333 334 /* Base register for access to arguments of the function. */ 335 #define ARG_POINTER_REGNUM 16 336 337 /* Register in which static-chain is passed to a function. */ 338 #define STATIC_CHAIN_REGNUM 2 339 340 /* Register to hold the addressing base for position independent 341 code access to data items. */ 342 #define PIC_OFFSET_TABLE_REGNUM 3 343 344 /* Register in which address to store a structure value 345 arrives in the function. On the 386, the prologue 346 copies this from the stack to register %eax. */ 347 #define STRUCT_VALUE_INCOMING 0 348 349 /* Place in which caller passes the structure value address. 350 0 means push the value on the stack like an argument. */ 351 #define STRUCT_VALUE 0 352 353 /* Define the classes of registers for register constraints in the 354 machine description. Also define ranges of constants. 355 356 One of the classes must always be named ALL_REGS and include all hard regs. 357 If there is more than one class, another class must be named NO_REGS 358 and contain no registers. 359 360 The name GENERAL_REGS must be the name of a class (or an alias for 361 another name such as ALL_REGS). This is the class of registers 362 that is allowed by "g" or "r" in a register constraint. 363 Also, registers outside this class are allocated only when 364 instructions express preferences for them. 365 366 The classes must be numbered in nondecreasing order; that is, 367 a larger-numbered class must never be contained completely 368 in a smaller-numbered class. 369 370 For any two classes, it is very desirable that there be another 371 class that represents their union. 372 373 It might seem that class BREG is unnecessary, since no useful 386 374 opcode needs reg %ebx. But some systems pass args to the OS in ebx, 375 and the "b" register constraint is useful in asms for syscalls. */ 376 377 enum reg_class 378 { 379 NO_REGS, 380 AREG, DREG, CREG, BREG, 381 Q_REGS, /* %eax %ebx %ecx %edx */ 382 SIREG, DIREG, 383 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 384 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 385 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 386 FLOAT_REGS, 387 ALL_REGS, LIM_REG_CLASSES 388 }; 389 390 #define N_REG_CLASSES (int) LIM_REG_CLASSES 391 392 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS)) 393 394 /* Give names of register classes as strings for dump file. */ 395 396 #define REG_CLASS_NAMES \ 397 { "NO_REGS", \ 398 "AREG", "DREG", "CREG", "BREG", \ 399 "Q_REGS", \ 400 "SIREG", "DIREG", \ 401 "INDEX_REGS", \ 402 "GENERAL_REGS", \ 403 "FP_TOP_REG", "FP_SECOND_REG", \ 404 "FLOAT_REGS", \ 405 "ALL_REGS" } 406 407 /* Define which registers fit in which classes. 408 This is an initializer for a vector of HARD_REG_SET 409 of length N_REG_CLASSES. */ 410 411 #define REG_CLASS_CONTENTS \ 412 { 0, \ 413 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \ 414 0xf, /* Q_REGS */ \ 415 0x10, 0x20, /* SIREG, DIREG */ \ 416 0x1007f, /* INDEX_REGS */ \ 417 0x100ff, /* GENERAL_REGS */ \ 418 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \ 419 0xff00, /* FLOAT_REGS */ \ 420 0x1ffff } 421 422 /* The same information, inverted: 423 Return the class number of the smallest class containing 424 reg number REGNO. This could be a conditional expression 425 or could index an array. */ 426 427 extern enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; 428 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 429 430 /* When defined, the compiler allows registers explicitly used in the 431 rtl to be used as spill registers but prevents the compiler from 432 extending the lifetime of these registers. */ 433 434 #define SMALL_REGISTER_CLASSES 435 436 #define QI_REG_P(X) \ 437 (REG_P (X) && REGNO (X) < 4) 438 #define NON_QI_REG_P(X) \ 439 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER) 440 441 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 442 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG) 443 444 #define STACK_REG_P(xop) (REG_P (xop) && \ 445 REGNO (xop) >= FIRST_STACK_REG && \ 446 REGNO (xop) <= LAST_STACK_REG) 447 448 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop)) 449 450 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG) 451 452 /* Try to maintain the accuracy of the death notes for regs satisfying the 453 following. Important for stack like regs, to know when to pop. */ 454 455 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */ 456 457 /* 1 if register REGNO can magically overlap other regs. 458 Note that nonzero values work only in very special circumstances. */ 459 460 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */ 461 462 /* The class value for index registers, and the one for base regs. */ 463 464 #define INDEX_REG_CLASS INDEX_REGS 465 #define BASE_REG_CLASS GENERAL_REGS 466 467 /* Get reg_class from a letter such as appears in the machine description. */ 468 469 #define REG_CLASS_FROM_LETTER(C) \ 470 ((C) == 'r' ? GENERAL_REGS : \ 471 (C) == 'q' ? Q_REGS : \ 472 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 473 ? FLOAT_REGS \ 474 : NO_REGS) : \ 475 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 476 ? FP_TOP_REG \ 477 : NO_REGS) : \ 478 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \ 479 ? FP_SECOND_REG \ 480 : NO_REGS) : \ 481 (C) == 'a' ? AREG : \ 482 (C) == 'b' ? BREG : \ 483 (C) == 'c' ? CREG : \ 484 (C) == 'd' ? DREG : \ 485 (C) == 'D' ? DIREG : \ 486 (C) == 'S' ? SIREG : NO_REGS) 487 488 /* The letters I, J, K, L and M in a register constraint string 489 can be used to stand for particular ranges of immediate operands. 490 This macro defines what the ranges are. 491 C is the letter, and VALUE is a constant value. 492 Return 1 if VALUE is in the range specified by C. 493 494 I is for non-DImode shifts. 495 J is for DImode shifts. 496 K and L are for an `andsi' optimization. 497 M is for shifts that can be executed by the "lea" opcode. 498 */ 499 500 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 501 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \ 502 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \ 503 (C) == 'K' ? (VALUE) == 0xff : \ 504 (C) == 'L' ? (VALUE) == 0xffff : \ 505 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \ 506 0) 507 508 /* Similar, but for floating constants, and defining letters G and H. 509 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if 510 TARGET_387 isn't set, because the stack register converter may need to 511 load 0.0 into the function value register. */ 512 513 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 514 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0) 515 516 /* Place additional restrictions on the register class to use when it 517 is necessary to be able to hold a value of mode MODE in a reload 518 register for which class CLASS would ordinarily be used. */ 519 520 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 521 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \ 522 ? Q_REGS : (CLASS)) 523 524 /* Given an rtx X being reloaded into a reg required to be 525 in class CLASS, return the class of reg to actually use. 526 In general this is just CLASS; but on some machines 527 in some cases it is preferable to use a more restrictive class. 528 On the 80386 series, we prevent floating constants from being 529 reloaded into floating registers (since no move-insn can do that) 530 and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 531 532 /* Put float CONST_DOUBLE in the constant pool instead of fp regs. 533 QImode must go into class Q_REGS. 534 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 535 movdf to do mem-to-mem moves through integer regs. */ 536 537 #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 538 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \ 539 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \ 540 : ((CLASS) == ALL_REGS \ 541 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \ 542 : (CLASS)) 543 544 /* If we are copying between general and FP registers, we need a memory 545 location. */ 546 547 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ 548 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \ 549 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) 550 551 /* Return the maximum number of consecutive registers 552 needed to represent mode MODE in a register of class CLASS. */ 553 /* On the 80386, this is the size of MODE in words, 554 except in the FP regs, where a single reg is always enough. */ 555 #define CLASS_MAX_NREGS(CLASS, MODE) \ 556 (FLOAT_CLASS_P (CLASS) ? 1 : \ 557 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 558 559 /* Stack layout; function entry, exit and calling. */ 560 561 /* Define this if pushing a word on the stack 562 makes the stack pointer a smaller address. */ 563 #define STACK_GROWS_DOWNWARD 564 565 /* Define this if the nominal address of the stack frame 566 is at the high-address end of the local variables; 567 that is, each additional local variable allocated 568 goes at a more negative offset in the frame. */ 569 #define FRAME_GROWS_DOWNWARD 570 571 /* Offset within stack frame to start allocating local variables at. 572 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 573 first local allocated. Otherwise, it is the offset to the BEGINNING 574 of the first local allocated. */ 575 #define STARTING_FRAME_OFFSET 0 576 577 /* If we generate an insn to push BYTES bytes, 578 this says how many the stack pointer really advances by. 579 On 386 pushw decrements by exactly 2 no matter what the position was. 580 On the 386 there is no pushb; we use pushw instead, and this 581 has the effect of rounding up to 2. */ 582 583 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2)) 584 585 /* Offset of first parameter from the argument pointer register value. */ 586 #define FIRST_PARM_OFFSET(FNDECL) 0 587 588 /* Value is the number of bytes of arguments automatically 589 popped when returning from a subroutine call. 590 FUNTYPE is the data type of the function (as a tree), 591 or for a library call it is an identifier node for the subroutine name. 592 SIZE is the number of bytes of arguments passed on the stack. 593 594 On the 80386, the RTD insn may be used to pop them if the number 595 of args is fixed, but if the number is variable then the caller 596 must pop them all. RTD can't be used for library calls now 597 because the library is compiled with the Unix compiler. 598 Use of RTD is a selectable option, since it is incompatible with 599 standard Unix calling sequences. If the option is not selected, 600 the caller must always pop the args. */ 601 602 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \ 603 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \ 604 : (TARGET_RTD \ 605 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ 606 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ 607 == void_type_node))) ? (SIZE) \ 608 : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0) 609 610 /* Define how to find the value returned by a function. 611 VALTYPE is the data type of the value (as a tree). 612 If the precise function being called is known, FUNC is its FUNCTION_DECL; 613 otherwise, FUNC is 0. */ 614 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 615 gen_rtx (REG, TYPE_MODE (VALTYPE), \ 616 VALUE_REGNO (TYPE_MODE (VALTYPE))) 617 618 /* Define how to find the value returned by a library function 619 assuming the value has mode MODE. */ 620 621 #define LIBCALL_VALUE(MODE) \ 622 gen_rtx (REG, MODE, VALUE_REGNO (MODE)) 623 624 /* Define the size of the result block used for communication between 625 untyped_call and untyped_return. The block contains a DImode value 626 followed by the block used by fnsave and frstor. */ 627 628 #define APPLY_RESULT_SIZE (8+108) 629 630 /* 1 if N is a possible register number for function argument passing. 631 On the 80386, no registers are used in this way. 632 *NOTE* -mregparm does not work. 633 It exists only to test register calling conventions. */ 634 635 #define FUNCTION_ARG_REGNO_P(N) 0 636 637 /* Define a data type for recording info about an argument list 638 during the scan of that argument list. This data type should 639 hold all necessary information about the function itself 640 and about the args processed so far, enough to enable macros 641 such as FUNCTION_ARG to determine where the next arg should go. 642 643 On the 80386, this is a single integer, which is a number of bytes 644 of arguments scanned so far. */ 645 646 #define CUMULATIVE_ARGS int 647 648 /* Initialize a variable CUM of type CUMULATIVE_ARGS 649 for a call to a function whose data type is FNTYPE. 650 For a library call, FNTYPE is 0. 651 652 On the 80386, the offset starts at 0. */ 653 654 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ 655 ((CUM) = 0) 656 657 /* Update the data in CUM to advance over an argument 658 of mode MODE and data type TYPE. 659 (TYPE is null for libcalls where that information may not be available.) */ 660 661 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 662 ((CUM) += ((MODE) != BLKmode \ 663 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 664 : (int_size_in_bytes (TYPE) + 3) & ~3)) 665 666 /* Define where to put the arguments to a function. 667 Value is zero to push the argument on the stack, 668 or a hard register in which to store the argument. 669 670 MODE is the argument's machine mode. 671 TYPE is the data type of the argument (as a tree). 672 This is null for libcalls where that information may 673 not be available. 674 CUM is a variable of type CUMULATIVE_ARGS which gives info about 675 the preceding args and about the function being called. 676 NAMED is nonzero if this argument is a named parameter 677 (otherwise it is an extra parameter matching an ellipsis). */ 678 679 680 /* On the 80386 all args are pushed, except if -mregparm is specified 681 then the first two words of arguments are passed in EAX, EDX. 682 *NOTE* -mregparm does not work. 683 It exists only to test register calling conventions. */ 684 685 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 686 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) 687 688 /* For an arg passed partly in registers and partly in memory, 689 this is the number of registers used. 690 For args passed entirely in registers or entirely in memory, zero. */ 691 692 693 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 694 ((TARGET_REGPARM && (CUM) < 8 \ 695 && 8 < ((CUM) + ((MODE) == BLKmode \ 696 ? int_size_in_bytes (TYPE) \ 697 : GET_MODE_SIZE (MODE)))) \ 698 ? 2 - (CUM) / 4 : 0) 699 700 /* This macro generates the assembly code for function entry. 701 FILE is a stdio stream to output the code to. 702 SIZE is an int: how many units of temporary storage to allocate. 703 Refer to the array `regs_ever_live' to determine which registers 704 to save; `regs_ever_live[I]' is nonzero if register number I 705 is ever used in the function. This macro is responsible for 706 knowing which registers should not be saved even if used. */ 707 708 #define FUNCTION_PROLOGUE(FILE, SIZE) \ 709 function_prologue (FILE, SIZE) 710 711 /* Output assembler code to FILE to increment profiler label # LABELNO 712 for profiling a function entry. */ 713 714 #define FUNCTION_PROFILER(FILE, LABELNO) \ 715 { \ 716 if (flag_pic) \ 717 { \ 718 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \ 719 LPREFIX, (LABELNO)); \ 720 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \ 721 } \ 722 else \ 723 { \ 724 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \ 725 fprintf (FILE, "\tcall _mcount\n"); \ 726 } \ 727 } 728 729 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 730 the stack pointer does not matter. The value is tested only in 731 functions that have frame pointers. 732 No definition is equivalent to always zero. */ 733 /* Note on the 386 it might be more efficient not to define this since 734 we have to restore it ourselves from the frame pointer, in order to 735 use pop */ 736 737 #define EXIT_IGNORE_STACK 1 738 739 /* This macro generates the assembly code for function exit, 740 on machines that need it. If FUNCTION_EPILOGUE is not defined 741 then individual return instructions are generated for each 742 return statement. Args are same as for FUNCTION_PROLOGUE. 743 744 The function epilogue should not depend on the current stack pointer! 745 It should use the frame pointer only. This is mandatory because 746 of alloca; we also take advantage of it to omit stack adjustments 747 before returning. 748 749 If the last non-note insn in the function is a BARRIER, then there 750 is no need to emit a function prologue, because control does not fall 751 off the end. This happens if the function ends in an "exit" call, or 752 if a `return' insn is emitted directly into the function. */ 753 754 #define FUNCTION_EPILOGUE(FILE, SIZE) \ 755 do { \ 756 rtx last = get_last_insn (); \ 757 if (last && GET_CODE (last) == NOTE) \ 758 last = prev_nonnote_insn (last); \ 759 if (! last || GET_CODE (last) != BARRIER) \ 760 function_epilogue (FILE, SIZE); \ 761 } while (0) 762 763 /* Output assembler code for a block containing the constant parts 764 of a trampoline, leaving space for the variable parts. */ 765 766 /* On the 386, the trampoline contains three instructions: 767 mov #STATIC,ecx 768 mov #FUNCTION,eax 769 jmp @eax */ 770 #define TRAMPOLINE_TEMPLATE(FILE) \ 771 { \ 772 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \ 773 ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 774 ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 775 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \ 776 ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 777 ASM_OUTPUT_SHORT (FILE, const0_rtx); \ 778 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \ 779 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \ 780 } 781 782 /* Length in units of the trampoline for entering a nested function. */ 783 784 #define TRAMPOLINE_SIZE 12 785 786 /* Emit RTL insns to initialize the variable parts of a trampoline. 787 FNADDR is an RTX for the address of the function's pure code. 788 CXT is an RTX for the static chain value for the function. */ 789 790 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 791 { \ 792 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \ 793 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \ 794 } 795 796 /* Definitions for register eliminations. 797 798 This is an array of structures. Each structure initializes one pair 799 of eliminable registers. The "from" register number is given first, 800 followed by "to". Eliminations of the same "from" register are listed 801 in order of preference. 802 803 We have two registers that can be eliminated on the i386. First, the 804 frame pointer register can often be eliminated in favor of the stack 805 pointer register. Secondly, the argument pointer register can always be 806 eliminated; it is replaced with either the stack or frame pointer. */ 807 808 #define ELIMINABLE_REGS \ 809 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 810 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 811 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 812 813 /* Given FROM and TO register numbers, say whether this elimination is allowed. 814 Frame pointer elimination is automatically handled. 815 816 For the i386, if frame pointer elimination is being done, we would like to 817 convert ap into sp, not fp. 818 819 All other eliminations are valid. */ 820 821 #define CAN_ELIMINATE(FROM, TO) \ 822 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ 823 ? ! frame_pointer_needed \ 824 : 1) 825 826 /* Define the offset between two registers, one to be eliminated, and the other 827 its replacement, at the start of a routine. */ 828 829 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 830 { \ 831 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ 832 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \ 833 else \ 834 { \ 835 int regno; \ 836 int offset = 0; \ 837 \ 838 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ 839 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \ 840 || (current_function_uses_pic_offset_table \ 841 && regno == PIC_OFFSET_TABLE_REGNUM)) \ 842 offset += 4; \ 843 \ 844 (OFFSET) = offset + get_frame_size (); \ 845 \ 846 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ 847 (OFFSET) += 4; /* Skip saved PC */ \ 848 } \ 849 } 850 851 /* Addressing modes, and classification of registers for them. */ 852 853 /* #define HAVE_POST_INCREMENT */ 854 /* #define HAVE_POST_DECREMENT */ 855 856 /* #define HAVE_PRE_DECREMENT */ 857 /* #define HAVE_PRE_INCREMENT */ 858 859 /* Macros to check register numbers against specific register classes. */ 860 861 /* These assume that REGNO is a hard or pseudo reg number. 862 They give nonzero only if REGNO is a hard reg of the suitable class 863 or a pseudo reg currently allocated to a suitable hard reg. 864 Since they use reg_renumber, they are safe only once reg_renumber 865 has been allocated, which happens in local-alloc.c. */ 866 867 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 868 ((REGNO) < STACK_POINTER_REGNUM \ 869 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM) 870 871 #define REGNO_OK_FOR_BASE_P(REGNO) \ 872 ((REGNO) <= STACK_POINTER_REGNUM \ 873 || (REGNO) == ARG_POINTER_REGNUM \ 874 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM) 875 876 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4) 877 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5) 878 879 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 880 and check its validity for a certain class. 881 We have two alternate definitions for each of them. 882 The usual definition accepts all pseudo regs; the other rejects 883 them unless they have been allocated suitable hard regs. 884 The symbol REG_OK_STRICT causes the latter definition to be used. 885 886 Most source files want to accept pseudo regs in the hope that 887 they will get allocated to the class that the insn wants them to be in. 888 Source files for reload pass need to be strict. 889 After reload, it makes no difference, since pseudo regs have 890 been eliminated by then. */ 891 892 #ifndef REG_OK_STRICT 893 894 /* Nonzero if X is a hard reg that can be used as an index or if 895 it is a pseudo reg. */ 896 897 #define REG_OK_FOR_INDEX_P(X) \ 898 (REGNO (X) < STACK_POINTER_REGNUM \ 899 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 900 901 /* Nonzero if X is a hard reg that can be used as a base reg 902 of if it is a pseudo reg. */ 903 /* ?wfs */ 904 905 #define REG_OK_FOR_BASE_P(X) \ 906 (REGNO (X) <= STACK_POINTER_REGNUM \ 907 || REGNO (X) == ARG_POINTER_REGNUM \ 908 || REGNO(X) >= FIRST_PSEUDO_REGISTER) 909 910 #define REG_OK_FOR_STRREG_P(X) \ 911 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER) 912 913 #else 914 915 /* Nonzero if X is a hard reg that can be used as an index. */ 916 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 917 /* Nonzero if X is a hard reg that can be used as a base reg. */ 918 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 919 #define REG_OK_FOR_STRREG_P(X) \ 920 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X))) 921 922 #endif 923 924 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 925 that is a valid memory address for an instruction. 926 The MODE argument is the machine mode for the MEM expression 927 that wants to use this address. 928 929 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 930 except for CONSTANT_ADDRESS_P which is usually machine-independent. 931 932 See legitimize_pic_address in i386.c for details as to what 933 constitutes a legitimate address when -fpic is used. */ 934 935 #define MAX_REGS_PER_ADDRESS 2 936 937 #define CONSTANT_ADDRESS_P(X) \ 938 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 939 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 940 || GET_CODE (X) == HIGH) 941 942 /* Nonzero if the constant value X is a legitimate general operand. 943 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 944 945 #define LEGITIMATE_CONSTANT_P(X) 1 946 947 #define GO_IF_INDEXABLE_BASE(X, ADDR) \ 948 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR 949 950 #define LEGITIMATE_INDEX_REG_P(X) \ 951 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) 952 953 /* Return 1 if X is an index or an index times a scale. */ 954 955 #define LEGITIMATE_INDEX_P(X) \ 956 (LEGITIMATE_INDEX_REG_P (X) \ 957 || (GET_CODE (X) == MULT \ 958 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ 959 && GET_CODE (XEXP (X, 1)) == CONST_INT \ 960 && (INTVAL (XEXP (X, 1)) == 2 \ 961 || INTVAL (XEXP (X, 1)) == 4 \ 962 || INTVAL (XEXP (X, 1)) == 8))) 963 964 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */ 965 966 #define GO_IF_INDEXING(X, ADDR) \ 967 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \ 968 GO_IF_INDEXABLE_BASE (X, ADDR); \ 969 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ 970 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ 971 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ 972 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } } 973 974 /* We used to allow this, but it isn't ever used. 975 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \ 976 && REG_P (XEXP (X, 0)) \ 977 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \ 978 */ 979 980 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 981 { \ 982 if (CONSTANT_ADDRESS_P (X) \ 983 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \ 984 goto ADDR; \ 985 GO_IF_INDEXING (X, ADDR); \ 986 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 987 { \ 988 rtx x0 = XEXP (X, 0); \ 989 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \ 990 { GO_IF_INDEXING (x0, ADDR); } \ 991 else if (x0 == pic_offset_table_rtx) \ 992 goto ADDR; \ 993 else if (GET_CODE (x0) == PLUS) \ 994 { \ 995 if (XEXP (x0, 0) == pic_offset_table_rtx) \ 996 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \ 997 if (XEXP (x0, 1) == pic_offset_table_rtx) \ 998 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \ 999 } \ 1000 } \ 1001 } 1002 1003 /* Try machine-dependent ways of modifying an illegitimate address 1004 to be legitimate. If we find one, return the new, valid address. 1005 This macro is used in only one place: `memory_address' in explow.c. 1006 1007 OLDX is the address as it was before break_out_memory_refs was called. 1008 In some cases it is useful to look at this to decide what needs to be done. 1009 1010 MODE and WIN are passed so that this macro can use 1011 GO_IF_LEGITIMATE_ADDRESS. 1012 1013 It is always safe for this macro to do nothing. It exists to recognize 1014 opportunities to optimize the output. 1015 1016 For the 80386, we handle X+REG by loading X into a register R and 1017 using R+REG. R will go in a general reg and indexing will be used. 1018 However, if REG is a broken-out memory address or multiplication, 1019 nothing needs to be done because REG can certainly go in a general reg. 1020 1021 When -fpic is used, special handling is needed for symbolic references. 1022 See comments by legitimize_pic_address in i386.c for details. */ 1023 1024 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ 1025 { extern rtx legitimize_pic_address (); \ 1026 int ch = (X) != (OLDX); \ 1027 if (flag_pic && SYMBOLIC_CONST (X)) \ 1028 { \ 1029 (X) = legitimize_pic_address (X, 0); \ 1030 if (memory_address_p (MODE, X)) \ 1031 goto WIN; \ 1032 } \ 1033 if (GET_CODE (X) == PLUS) \ 1034 { if (GET_CODE (XEXP (X, 0)) == MULT) \ 1035 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \ 1036 if (GET_CODE (XEXP (X, 1)) == MULT) \ 1037 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \ 1038 if (ch && GET_CODE (XEXP (X, 1)) == REG \ 1039 && GET_CODE (XEXP (X, 0)) == REG) \ 1040 goto WIN; \ 1041 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \ 1042 ch = 1, (X) = legitimize_pic_address (X, 0); \ 1043 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ 1044 if (GET_CODE (XEXP (X, 0)) == REG) \ 1045 { register rtx temp = gen_reg_rtx (Pmode); \ 1046 register rtx val = force_operand (XEXP (X, 1), temp); \ 1047 if (val != temp) emit_move_insn (temp, val); \ 1048 XEXP (X, 1) = temp; \ 1049 goto WIN; } \ 1050 else if (GET_CODE (XEXP (X, 1)) == REG) \ 1051 { register rtx temp = gen_reg_rtx (Pmode); \ 1052 register rtx val = force_operand (XEXP (X, 0), temp); \ 1053 if (val != temp) emit_move_insn (temp, val); \ 1054 XEXP (X, 0) = temp; \ 1055 goto WIN; }}} 1056 1057 /* Nonzero if the constant value X is a legitimate general operand 1058 when generating PIC code. It is given that flag_pic is on and 1059 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1060 1061 #define LEGITIMATE_PIC_OPERAND_P(X) \ 1062 (! SYMBOLIC_CONST (X) \ 1063 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))) 1064 1065 #define SYMBOLIC_CONST(X) \ 1066 (GET_CODE (X) == SYMBOL_REF \ 1067 || GET_CODE (X) == LABEL_REF \ 1068 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 1069 1070 /* Go to LABEL if ADDR (a legitimate address expression) 1071 has an effect that depends on the machine mode it is used for. 1072 On the 80386, only postdecrement and postincrement address depend thus 1073 (the amount of decrement or increment being the length of the operand). */ 1074 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 1075 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL 1076 1077 /* Define this macro if references to a symbol must be treated 1078 differently depending on something about the variable or 1079 function named by the symbol (such as what section it is in). 1080 1081 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol 1082 so that we may access it directly in the GOT. */ 1083 1084 #define ENCODE_SECTION_INFO(DECL) \ 1085 do \ 1086 { \ 1087 if (flag_pic) \ 1088 { \ 1089 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 1090 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ 1091 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ 1092 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ 1093 || ! TREE_PUBLIC (DECL)); \ 1094 } \ 1095 } \ 1096 while (0) 1097 1098 /* Initialize data used by insn expanders. This is called from 1099 init_emit, once for each function, before code is generated. 1100 For 386, clear stack slot assignments remembered from previous 1101 functions. */ 1102 1103 #define INIT_EXPANDERS clear_386_stack_locals () 1104 1105 /* Specify the machine mode that this machine uses 1106 for the index in the tablejump instruction. */ 1107 #define CASE_VECTOR_MODE Pmode 1108 1109 /* Define this if the tablejump instruction expects the table 1110 to contain offsets from the address of the table. 1111 Do not define this if the table should contain absolute addresses. */ 1112 /* #define CASE_VECTOR_PC_RELATIVE */ 1113 1114 /* Specify the tree operation to be used to convert reals to integers. 1115 This should be changed to take advantage of fist --wfs ?? 1116 */ 1117 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR 1118 1119 /* This is the kind of divide that is easiest to do in the general case. */ 1120 #define EASY_DIV_EXPR TRUNC_DIV_EXPR 1121 1122 /* Define this as 1 if `char' should by default be signed; else as 0. */ 1123 #define DEFAULT_SIGNED_CHAR 1 1124 1125 /* Max number of bytes we can move from memory to memory 1126 in one reasonably fast instruction. */ 1127 #define MOVE_MAX 4 1128 1129 /* MOVE_RATIO is the number of move instructions that is better than a 1130 block move. Make this large on i386, since the block move is very 1131 inefficient with small blocks, and the hard register needs of the 1132 block move require much reload work. */ 1133 #define MOVE_RATIO 5 1134 1135 /* Define this if zero-extension is slow (more than one real instruction). */ 1136 /* #define SLOW_ZERO_EXTEND */ 1137 1138 /* Nonzero if access to memory by bytes is slow and undesirable. */ 1139 #define SLOW_BYTE_ACCESS 0 1140 1141 /* Define if shifts truncate the shift count 1142 which implies one can omit a sign-extension or zero-extension 1143 of a shift count. */ 1144 /* One i386, shifts do truncate the count. But bit opcodes don't. */ 1145 1146 /* #define SHIFT_COUNT_TRUNCATED */ 1147 1148 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1149 is done just by pretending it is already truncated. */ 1150 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1151 1152 /* We assume that the store-condition-codes instructions store 0 for false 1153 and some other value for true. This is the value stored for true. */ 1154 1155 #define STORE_FLAG_VALUE 1 1156 1157 /* When a prototype says `char' or `short', really pass an `int'. 1158 (The 386 can't easily push less than an int.) */ 1159 1160 #define PROMOTE_PROTOTYPES 1161 1162 /* Specify the machine mode that pointers have. 1163 After generation of rtl, the compiler makes no further distinction 1164 between pointers and any other objects of this machine mode. */ 1165 #define Pmode SImode 1166 1167 /* A function address in a call instruction 1168 is a byte address (for indexing purposes) 1169 so give the MEM rtx a byte's mode. */ 1170 #define FUNCTION_MODE QImode 1171 1172 /* Define this if addresses of constant functions 1173 shouldn't be put through pseudo regs where they can be cse'd. 1174 Desirable on the 386 because a CALL with a constant address is 1175 not much slower than one with a register address. */ 1176 #define NO_FUNCTION_CSE 1177 1178 /* Provide the costs of a rtl expression. This is in the body of a 1179 switch on CODE. */ 1180 1181 #define RTX_COSTS(X,CODE,OUTER_CODE) \ 1182 case MULT: \ 1183 return COSTS_N_INSNS (10); \ 1184 case DIV: \ 1185 case UDIV: \ 1186 case MOD: \ 1187 case UMOD: \ 1188 return COSTS_N_INSNS (40); \ 1189 case PLUS: \ 1190 if (GET_CODE (XEXP (X, 0)) == REG \ 1191 && GET_CODE (XEXP (X, 1)) == CONST_INT) \ 1192 return 1; \ 1193 break; 1194 1195 1196 /* Compute the cost of computing a constant rtl expression RTX 1197 whose rtx-code is CODE. The body of this macro is a portion 1198 of a switch statement. If the code is computed here, 1199 return it with a return statement. Otherwise, break from the switch. */ 1200 1201 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 1202 case CONST_INT: \ 1203 case CONST: \ 1204 case LABEL_REF: \ 1205 case SYMBOL_REF: \ 1206 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \ 1207 case CONST_DOUBLE: \ 1208 { \ 1209 int code; \ 1210 if (GET_MODE (RTX) == VOIDmode) \ 1211 return 2; \ 1212 code = standard_80387_constant_p (RTX); \ 1213 return code == 1 ? 0 : \ 1214 code == 2 ? 1 : \ 1215 2; \ 1216 } 1217 1218 /* Compute the cost of an address. This is meant to approximate the size 1219 and/or execution delay of an insn using that address. If the cost is 1220 approximated by the RTL complexity, including CONST_COSTS above, as 1221 is usually the case for CISC machines, this macro should not be defined. 1222 For aggressively RISCy machines, only one insn format is allowed, so 1223 this macro should be a constant. The value of this macro only matters 1224 for valid addresses. 1225 1226 For i386, it is better to use a complex address than let gcc copy 1227 the address into a reg and make a new pseudo. But not if the address 1228 requires to two regs - that would mean more pseudos with longer 1229 lifetimes. */ 1230 1231 #define ADDRESS_COST(RTX) \ 1232 ((CONSTANT_P (RTX) \ 1233 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \ 1234 && REG_P (XEXP (RTX, 0)))) ? 0 \ 1235 : REG_P (RTX) ? 1 \ 1236 : 2) 1237 1238 /* Add any extra modes needed to represent the condition code. 1239 1240 For the i386, we need separate modes when floating-point equality 1241 comparisons are being done. */ 1242 1243 #define EXTRA_CC_MODES CCFPEQmode 1244 1245 /* Define the names for the modes specified above. */ 1246 #define EXTRA_CC_NAMES "CCFPEQ" 1247 1248 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 1249 return the mode to be used for the comparison. 1250 1251 For floating-point equality comparisons, CCFPEQmode should be used. 1252 VOIDmode should be used in all other cases. */ 1253 1254 #define SELECT_CC_MODE(OP,X,Y) \ 1255 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ 1256 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode) 1257 1258 /* Define the information needed to generate branch and scc insns. This is 1259 stored from the compare operation. Note that we can't use "rtx" here 1260 since it hasn't been defined! */ 1261 1262 extern struct rtx_def *i386_compare_op0, *i386_compare_op1; 1263 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)(); 1264 1265 /* Tell final.c how to eliminate redundant test instructions. */ 1266 1267 /* Here we define machine-dependent flags and fields in cc_status 1268 (see `conditions.h'). */ 1269 1270 /* Set if the cc value is actually in the 80387, so a floating point 1271 conditional branch must be output. */ 1272 #define CC_IN_80387 04000 1273 1274 /* Set if the CC value was stored in a nonstandard way, so that 1275 the state of equality is indicated by zero in the carry bit. */ 1276 #define CC_Z_IN_NOT_C 010000 1277 1278 /* Store in cc_status the expressions 1279 that the condition codes will describe 1280 after execution of an instruction whose pattern is EXP. 1281 Do not alter them if the instruction would not alter the cc's. */ 1282 1283 #define NOTICE_UPDATE_CC(EXP, INSN) \ 1284 notice_update_cc((EXP)) 1285 1286 /* Output a signed jump insn. Use template NORMAL ordinarily, or 1287 FLOAT following a floating point comparison. 1288 Use NO_OV following an arithmetic insn that set the cc's 1289 before a test insn that was deleted. 1290 NO_OV may be zero, meaning final should reinsert the test insn 1291 because the jump cannot be handled properly without it. */ 1292 1293 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ 1294 { \ 1295 if (cc_prev_status.flags & CC_IN_80387) \ 1296 return FLOAT; \ 1297 if (cc_prev_status.flags & CC_NO_OVERFLOW) \ 1298 return NO_OV; \ 1299 return NORMAL; \ 1300 } 1301 1302 /* Control the assembler format that we output, to the extent 1303 this does not vary between assemblers. */ 1304 1305 /* How to refer to registers in assembler output. 1306 This sequence is indexed by compiler's hard-register-number (see above). */ 1307 1308 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e" 1309 For non floating point regs, the following are the HImode names. 1310 1311 For float regs, the stack top is sometimes referred to as "%st(0)" 1312 instead of just "%st". PRINT_REG handles this with the "y" code. */ 1313 1314 #define HI_REGISTER_NAMES \ 1315 {"ax","dx","cx","bx","si","di","bp","sp", \ 1316 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" } 1317 1318 #define REGISTER_NAMES HI_REGISTER_NAMES 1319 1320 /* Table of additional register names to use in user input. */ 1321 1322 #define ADDITIONAL_REGISTER_NAMES \ 1323 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \ 1324 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \ 1325 "al", 0, "dl", 1, "cl", 2, "bl", 3, \ 1326 "ah", 0, "dh", 1, "ch", 2, "bh", 3 } 1327 1328 /* Note we are omitting these since currently I don't know how 1329 to get gcc to use these, since they want the same but different 1330 number as al, and ax. 1331 */ 1332 1333 /* note the last four are not really qi_registers, but 1334 the md will have to never output movb into one of them 1335 only a movw . There is no movb into the last four regs */ 1336 1337 #define QI_REGISTER_NAMES \ 1338 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",} 1339 1340 /* These parallel the array above, and can be used to access bits 8:15 1341 of regs 0 through 3. */ 1342 1343 #define QI_HIGH_REGISTER_NAMES \ 1344 {"ah", "dh", "ch", "bh", } 1345 1346 /* How to renumber registers for dbx and gdb. */ 1347 1348 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */ 1349 #define DBX_REGISTER_NUMBER(n) \ 1350 ((n) == 0 ? 0 : \ 1351 (n) == 1 ? 2 : \ 1352 (n) == 2 ? 1 : \ 1353 (n) == 3 ? 3 : \ 1354 (n) == 4 ? 6 : \ 1355 (n) == 5 ? 7 : \ 1356 (n) == 6 ? 4 : \ 1357 (n) == 7 ? 5 : \ 1358 (n) + 4) 1359 1360 /* This is how to output the definition of a user-level label named NAME, 1361 such as the label on a static function or variable NAME. */ 1362 1363 #define ASM_OUTPUT_LABEL(FILE,NAME) \ 1364 (assemble_name (FILE, NAME), fputs (":\n", FILE)) 1365 1366 /* This is how to output an assembler line defining a `double' constant. */ 1367 1368 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ 1369 fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE)) 1370 1371 1372 /* This is how to output an assembler line defining a `float' constant. */ 1373 1374 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ 1375 do { union { float f; long l;} tem; \ 1376 tem.f = (VALUE); \ 1377 fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \ 1378 } while (0) 1379 1380 1381 /* Store in OUTPUT a string (made with alloca) containing 1382 an assembler-name for a local static variable named NAME. 1383 LABELNO is an integer which is different for each call. */ 1384 1385 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1386 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1387 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1388 1389 1390 1391 /* This is how to output an assembler line defining an `int' constant. */ 1392 1393 #define ASM_OUTPUT_INT(FILE,VALUE) \ 1394 ( fprintf (FILE, "%s ", ASM_LONG), \ 1395 output_addr_const (FILE,(VALUE)), \ 1396 putc('\n',FILE)) 1397 1398 /* Likewise for `char' and `short' constants. */ 1399 /* is this supposed to do align too?? */ 1400 1401 #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1402 ( fprintf (FILE, "%s ", ASM_SHORT), \ 1403 output_addr_const (FILE,(VALUE)), \ 1404 putc('\n',FILE)) 1405 1406 /* 1407 #define ASM_OUTPUT_SHORT(FILE,VALUE) \ 1408 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ 1409 output_addr_const (FILE,(VALUE)), \ 1410 fputs (",", FILE), \ 1411 output_addr_const (FILE,(VALUE)), \ 1412 fputs (" >> 8\n",FILE)) 1413 */ 1414 1415 1416 #define ASM_OUTPUT_CHAR(FILE,VALUE) \ 1417 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \ 1418 output_addr_const (FILE, (VALUE)), \ 1419 putc ('\n', FILE)) 1420 1421 /* This is how to output an assembler line for a numeric constant byte. */ 1422 1423 #define ASM_OUTPUT_BYTE(FILE,VALUE) \ 1424 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE)) 1425 1426 /* This is how to output an insn to push a register on the stack. 1427 It need not be very fast code. */ 1428 1429 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1430 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO]) 1431 1432 /* This is how to output an insn to pop a register from the stack. 1433 It need not be very fast code. */ 1434 1435 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1436 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO]) 1437 1438 /* This is how to output an element of a case-vector that is absolute. 1439 */ 1440 1441 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1442 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE) 1443 1444 /* This is how to output an element of a case-vector that is relative. 1445 We don't use these on the 386 yet, because the ATT assembler can't do 1446 forward reference the differences. 1447 */ 1448 1449 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ 1450 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL) 1451 1452 /* Define the parentheses used to group arithmetic operations 1453 in assembler code. */ 1454 1455 #define ASM_OPEN_PAREN "" 1456 #define ASM_CLOSE_PAREN "" 1457 1458 /* Define results of standard character escape sequences. */ 1459 #define TARGET_BELL 007 1460 #define TARGET_BS 010 1461 #define TARGET_TAB 011 1462 #define TARGET_NEWLINE 012 1463 #define TARGET_VT 013 1464 #define TARGET_FF 014 1465 #define TARGET_CR 015 1466 1467 /* Print operand X (an rtx) in assembler syntax to file FILE. 1468 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 1469 The CODE z takes the size of operand from the following digit, and 1470 outputs b,w,or l respectively. 1471 1472 On the 80386, we use several such letters: 1473 f -- float insn (print a CONST_DOUBLE as a float rather than in hex). 1474 L,W,B,Q,S -- print the opcode suffix for specified size of operand. 1475 R -- print the prefix for register names. 1476 z -- print the opcode suffix for the size of the current operand. 1477 * -- print a star (in certain assembler syntax) 1478 w -- print the operand as if it's a "word" (HImode) even if it isn't. 1479 b -- print the operand as if it's a byte (QImode) even if it isn't. 1480 c -- don't print special prefixes before constant operands. */ 1481 1482 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1483 ((CODE) == '*') 1484 1485 /* Print the name of a register based on its machine mode and number. 1486 If CODE is 'w', pretend the mode is HImode. 1487 If CODE is 'b', pretend the mode is QImode. 1488 If CODE is 'k', pretend the mode is SImode. 1489 If CODE is 'h', pretend the reg is the `high' byte register. 1490 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */ 1491 1492 extern char *hi_reg_name[]; 1493 extern char *qi_reg_name[]; 1494 extern char *qi_high_reg_name[]; 1495 1496 #define PRINT_REG(X, CODE, FILE) \ 1497 do { if (REGNO (X) == ARG_POINTER_REGNUM) \ 1498 abort (); \ 1499 fprintf (FILE, "%s", RP); \ 1500 switch ((CODE == 'w' ? 2 \ 1501 : CODE == 'b' ? 1 \ 1502 : CODE == 'k' ? 4 \ 1503 : CODE == 'y' ? 3 \ 1504 : CODE == 'h' ? 0 \ 1505 : GET_MODE_SIZE (GET_MODE (X)))) \ 1506 { \ 1507 case 3: \ 1508 if (STACK_TOP_P (X)) \ 1509 { \ 1510 fputs ("st(0)", FILE); \ 1511 break; \ 1512 } \ 1513 case 4: \ 1514 case 8: \ 1515 if (! FP_REG_P (X)) fputs ("e", FILE); \ 1516 case 2: \ 1517 fputs (hi_reg_name[REGNO (X)], FILE); \ 1518 break; \ 1519 case 1: \ 1520 fputs (qi_reg_name[REGNO (X)], FILE); \ 1521 break; \ 1522 case 0: \ 1523 fputs (qi_high_reg_name[REGNO (X)], FILE); \ 1524 break; \ 1525 } \ 1526 } while (0) 1527 1528 #define PRINT_OPERAND(FILE, X, CODE) \ 1529 print_operand (FILE, X, CODE) 1530 1531 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1532 print_operand_address (FILE, ADDR) 1533 1534 /* Print the name of a register for based on its machine mode and number. 1535 This macro is used to print debugging output. 1536 This macro is different from PRINT_REG in that it may be used in 1537 programs that are not linked with aux-output.o. */ 1538 1539 #define DEBUG_PRINT_REG(X, CODE, FILE) \ 1540 do { static char *hi_name[] = HI_REGISTER_NAMES; \ 1541 static char *qi_name[] = QI_REGISTER_NAMES; \ 1542 fprintf (FILE, "%d %s", REGNO (X), RP); \ 1543 if (REGNO (X) == ARG_POINTER_REGNUM) \ 1544 { fputs ("argp", FILE); break; } \ 1545 if (STACK_TOP_P (X)) \ 1546 { fputs ("st(0)", FILE); break; } \ 1547 switch (GET_MODE_SIZE (GET_MODE (X))) \ 1548 { \ 1549 case 8: \ 1550 case 4: \ 1551 if (! FP_REG_P (X)) fputs ("e", FILE); \ 1552 case 2: \ 1553 fputs (hi_name[REGNO (X)], FILE); \ 1554 break; \ 1555 case 1: \ 1556 fputs (qi_name[REGNO (X)], FILE); \ 1557 break; \ 1558 } \ 1559 } while (0) 1560 1561 /* Output the prefix for an immediate operand, or for an offset operand. */ 1562 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE)) 1563 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE)) 1564 1565 /* Routines in libgcc that return floats must return them in an fp reg, 1566 just as other functions do which return such values. 1567 These macros make that happen. */ 1568 1569 #define FLOAT_VALUE_TYPE float 1570 #define INTIFY(FLOATVAL) FLOATVAL 1571 1572 /* Nonzero if INSN magically clobbers register REGNO. */ 1573 1574 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \ 1575 (FP_REGNO_P (REGNO) \ 1576 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER)) 1577 */ 1578 1579 /* a letter which is not needed by the normal asm syntax, which 1580 we can use for operand syntax in the extended asm */ 1581 1582 #define ASM_OPERAND_LETTER '#' 1583 1584 #define RET return "" 1585 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx)) 1586 1587 /* 1588 Local variables: 1589 version-control: t 1590 End: 1591 */ 1592