1 /* @(#)scsimmc.h 1.19 06/12/02 Copyright 1997-2006 J. Schilling */ 2 /* 3 * Definitions for SCSI/mmc compliant drives 4 * 5 * Copyright (c) 1997-2006 J. Schilling 6 */ 7 /* 8 * The contents of this file are subject to the terms of the 9 * Common Development and Distribution License, Version 1.0 only 10 * (the "License"). You may not use this file except in compliance 11 * with the License. 12 * 13 * See the file CDDL.Schily.txt in this distribution for details. 14 * A copy of the CDDL is also available via the Internet at 15 * http://www.opensource.org/licenses/cddl1.txt 16 * 17 * When distributing Covered Code, include this CDDL HEADER in each 18 * file and include the License file CDDL.Schily.txt from this distribution. 19 */ 20 21 #ifndef _SCSIMMC_H 22 #define _SCSIMMC_H 23 24 #include <schily/utypes.h> 25 #include <schily/btorder.h> 26 27 typedef struct opc { 28 Uchar opc_speed[2]; 29 Uchar opc_val[6]; 30 } opc_t; 31 32 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 33 34 struct disk_info { 35 Uchar data_len[2]; /* Data len without this info */ 36 Ucbit disk_status : 2; /* Status of the disk */ 37 Ucbit sess_status : 2; /* Status of last session */ 38 Ucbit erasable : 1; /* Disk is erasable */ 39 Ucbit dtype : 3; /* Disk information data type */ 40 Uchar first_track; /* # of first track on disk */ 41 Uchar numsess; /* # of sessions */ 42 Uchar first_track_ls; /* First track in last session */ 43 Uchar last_track_ls; /* Last track in last session */ 44 Ucbit bg_format_stat : 2; /* Background format status */ 45 Ucbit dbit : 1; /* Dirty Bit of defect table */ 46 Ucbit res7_3 : 1; /* Reserved */ 47 Ucbit dac_v : 1; /* Disk application code valid */ 48 Ucbit uru : 1; /* This is an unrestricted disk */ 49 Ucbit dbc_v : 1; /* Disk bar code valid */ 50 Ucbit did_v : 1; /* Disk id valid */ 51 Uchar disk_type; /* Disk type */ 52 Uchar numsess_msb; /* # of sessions (MSB) */ 53 Uchar first_track_ls_msb; /* First tr. in last ses. (MSB) */ 54 Uchar last_track_ls_msb; /* Last tr. in last ses. (MSB) */ 55 Uchar disk_id[4]; /* Disk identification */ 56 Uchar last_lead_in[4]; /* Last session lead in time */ 57 Uchar last_lead_out[4]; /* Last session lead out time */ 58 Uchar disk_barcode[8]; /* Disk bar code */ 59 Uchar disk_appl_code; /* Disk application code */ 60 Uchar num_opc_entries; /* # of OPC table entries */ 61 opc_t opc_table[1]; /* OPC table */ 62 }; 63 64 #else /* Motorola bitorder */ 65 66 struct disk_info { 67 Uchar data_len[2]; /* Data len without this info */ 68 Ucbit dtype : 3; /* Disk information data type */ 69 Ucbit erasable : 1; /* Disk is erasable */ 70 Ucbit sess_status : 2; /* Status of last session */ 71 Ucbit disk_status : 2; /* Status of the disk */ 72 Uchar first_track; /* # of first track on disk */ 73 Uchar numsess; /* # of sessions */ 74 Uchar first_track_ls; /* First track in last session */ 75 Uchar last_track_ls; /* Last track in last session */ 76 Ucbit did_v : 1; /* Disk id valid */ 77 Ucbit dbc_v : 1; /* Disk bar code valid */ 78 Ucbit uru : 1; /* This is an unrestricted disk */ 79 Ucbit dac_v : 1; /* Disk application code valid */ 80 Ucbit res7_3 : 1; /* Reserved */ 81 Ucbit dbit : 1; /* Dirty Bit of defect table */ 82 Ucbit bg_format_stat : 2; /* Background format status */ 83 Uchar disk_type; /* Disk type */ 84 Uchar numsess_msb; /* # of sessions (MSB) */ 85 Uchar first_track_ls_msb; /* First tr. in last ses. (MSB) */ 86 Uchar last_track_ls_msb; /* Last tr. in last ses. (MSB) */ 87 Uchar disk_id[4]; /* Disk identification */ 88 Uchar last_lead_in[4]; /* Last session lead in time */ 89 Uchar last_lead_out[4]; /* Last session lead out time */ 90 Uchar disk_barcode[8]; /* Disk bar code */ 91 Uchar disk_appl_code; /* Disk application code */ 92 Uchar num_opc_entries; /* # of OPC table entries */ 93 opc_t opc_table[1]; /* OPC table */ 94 }; 95 96 #endif 97 98 struct cd_mode_data { 99 struct scsi_mode_header header; 100 union cd_pagex { 101 struct cd_mode_page_05 page05; 102 struct cd_mode_page_2A page2A; 103 } pagex; 104 }; 105 106 struct tocheader { 107 Uchar len[2]; 108 Uchar first; 109 Uchar last; 110 }; 111 112 /* 113 * Full TOC entry 114 */ 115 struct ftrackdesc { 116 Uchar sess_number; 117 118 #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ 119 Ucbit control : 4; 120 Ucbit adr : 4; 121 #else /* Motorola byteorder */ 122 Ucbit adr : 4; 123 Ucbit control : 4; 124 #endif 125 126 Uchar track; 127 Uchar point; 128 Uchar amin; 129 Uchar asec; 130 Uchar aframe; 131 Uchar res7; 132 Uchar pmin; 133 Uchar psec; 134 Uchar pframe; 135 }; 136 137 struct fdiskinfo { 138 struct tocheader hd; 139 struct ftrackdesc desc[1]; 140 }; 141 142 143 144 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 145 146 struct atipdesc { 147 Ucbit ref_speed : 3; /* Reference speed */ 148 Ucbit res4_3 : 1; /* Reserved */ 149 Ucbit ind_wr_power : 3; /* Indicative tgt writing power */ 150 Ucbit res4_7 : 1; /* Reserved (must be "1") */ 151 Ucbit res5_05 : 6; /* Reserved */ 152 Ucbit uru : 1; /* Disk is for unrestricted use */ 153 Ucbit res5_7 : 1; /* Reserved (must be "0") */ 154 Ucbit a3_v : 1; /* A 3 Values valid */ 155 Ucbit a2_v : 1; /* A 2 Values valid */ 156 Ucbit a1_v : 1; /* A 1 Values valid */ 157 Ucbit sub_type : 3; /* Disc sub type */ 158 Ucbit erasable : 1; /* Disk is erasable */ 159 Ucbit res6_7 : 1; /* Reserved (must be "1") */ 160 Uchar lead_in[4]; /* Lead in time */ 161 Uchar lead_out[4]; /* Lead out time */ 162 Uchar res15; /* Reserved */ 163 Ucbit clv_high : 4; /* Highes usable CLV recording speed */ 164 Ucbit clv_low : 3; /* Lowest usable CLV recording speed */ 165 Ucbit res16_7 : 1; /* Reserved (must be "0") */ 166 Ucbit res17_0 : 1; /* Reserved */ 167 Ucbit tgt_y_pow : 3; /* Tgt y val of the power mod fun */ 168 Ucbit power_mult : 3; /* Power multiplication factor */ 169 Ucbit res17_7 : 1; /* Reserved (must be "0") */ 170 Ucbit res_18_30 : 4; /* Reserved */ 171 Ucbit rerase_pwr_ratio: 3; /* Recommended erase/write power*/ 172 Ucbit res18_7 : 1; /* Reserved (must be "1") */ 173 Uchar res19; /* Reserved */ 174 Uchar a2[3]; /* A 2 Values */ 175 Uchar res23; /* Reserved */ 176 Uchar a3[3]; /* A 3 Vaules */ 177 Uchar res27; /* Reserved */ 178 }; 179 180 #else /* Motorola bitorder */ 181 182 struct atipdesc { 183 Ucbit res4_7 : 1; /* Reserved (must be "1") */ 184 Ucbit ind_wr_power : 3; /* Indicative tgt writing power */ 185 Ucbit res4_3 : 1; /* Reserved */ 186 Ucbit ref_speed : 3; /* Reference speed */ 187 Ucbit res5_7 : 1; /* Reserved (must be "0") */ 188 Ucbit uru : 1; /* Disk is for unrestricted use */ 189 Ucbit res5_05 : 6; /* Reserved */ 190 Ucbit res6_7 : 1; /* Reserved (must be "1") */ 191 Ucbit erasable : 1; /* Disk is erasable */ 192 Ucbit sub_type : 3; /* Disc sub type */ 193 Ucbit a1_v : 1; /* A 1 Values valid */ 194 Ucbit a2_v : 1; /* A 2 Values valid */ 195 Ucbit a3_v : 1; /* A 3 Values valid */ 196 Uchar lead_in[4]; /* Lead in time */ 197 Uchar lead_out[4]; /* Lead out time */ 198 Uchar res15; /* Reserved */ 199 Ucbit res16_7 : 1; /* Reserved (must be "0") */ 200 Ucbit clv_low : 3; /* Lowest usable CLV recording speed */ 201 Ucbit clv_high : 4; /* Highes usable CLV recording speed */ 202 Ucbit res17_7 : 1; /* Reserved (must be "0") */ 203 Ucbit power_mult : 3; /* Power multiplication factor */ 204 Ucbit tgt_y_pow : 3; /* Tgt y val of the power mod fun */ 205 Ucbit res17_0 : 1; /* Reserved */ 206 Ucbit res18_7 : 1; /* Reserved (must be "1") */ 207 Ucbit rerase_pwr_ratio: 3; /* Recommended erase/write power*/ 208 Ucbit res_18_30 : 4; /* Reserved */ 209 Uchar res19; /* Reserved */ 210 Uchar a2[3]; /* A 2 Values */ 211 Uchar res23; /* Reserved */ 212 Uchar a3[3]; /* A 3 Vaules */ 213 Uchar res27; /* Reserved */ 214 }; 215 216 #endif 217 218 struct atipinfo { 219 struct tocheader hd; 220 struct atipdesc desc; 221 }; 222 223 /* 224 * XXX Check how we may merge Track_info & Rzone_info 225 */ 226 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 227 228 struct track_info { 229 Uchar data_len[2]; /* Data len without this info */ 230 Uchar track_number; /* Track number for this info */ 231 Uchar session_number; /* Session number for this info */ 232 Uchar res4; /* Reserved */ 233 Ucbit track_mode : 4; /* Track mode (Q-sub control) */ 234 Ucbit copy : 1; /* This track is a higher copy */ 235 Ucbit damage : 1; /* if 1 & nwa_valid 0: inc track*/ 236 Ucbit res5_67 : 2; /* Reserved */ 237 Ucbit data_mode : 4; /* Data mode of this track */ 238 Ucbit fp : 1; /* This is a fixed packet track */ 239 Ucbit packet : 1; /* This track is in packet mode */ 240 Ucbit blank : 1; /* This is an invisible track */ 241 Ucbit rt : 1; /* This is a reserved track */ 242 Ucbit nwa_valid : 1; /* Next writable addr valid */ 243 Ucbit res7_17 : 7; /* Reserved */ 244 Uchar track_start[4]; /* Track start address */ 245 Uchar next_writable_addr[4]; /* Next writable address */ 246 Uchar free_blocks[4]; /* Free usr blocks in this track*/ 247 Uchar packet_size[4]; /* Packet size if in fixed mode */ 248 Uchar track_size[4]; /* # of user data blocks in trk */ 249 }; 250 251 #else /* Motorola bitorder */ 252 253 struct track_info { 254 Uchar data_len[2]; /* Data len without this info */ 255 Uchar track_number; /* Track number for this info */ 256 Uchar session_number; /* Session number for this info */ 257 Uchar res4; /* Reserved */ 258 Ucbit res5_67 : 2; /* Reserved */ 259 Ucbit damage : 1; /* if 1 & nwa_valid 0: inc track*/ 260 Ucbit copy : 1; /* This track is a higher copy */ 261 Ucbit track_mode : 4; /* Track mode (Q-sub control) */ 262 Ucbit rt : 1; /* This is a reserved track */ 263 Ucbit blank : 1; /* This is an invisible track */ 264 Ucbit packet : 1; /* This track is in packet mode */ 265 Ucbit fp : 1; /* This is a fixed packet track */ 266 Ucbit data_mode : 4; /* Data mode of this track */ 267 Ucbit res7_17 : 7; /* Reserved */ 268 Ucbit nwa_valid : 1; /* Next writable addr valid */ 269 Uchar track_start[4]; /* Track start address */ 270 Uchar next_writable_addr[4]; /* Next writable address */ 271 Uchar free_blocks[4]; /* Free usr blocks in this track*/ 272 Uchar packet_size[4]; /* Packet size if in fixed mode */ 273 Uchar track_size[4]; /* # of user data blocks in trk */ 274 }; 275 276 #endif 277 278 /* 279 * XXX Check how we may merge Track_info & Rzone_info 280 */ 281 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 282 283 struct rzone_info { 284 Uchar data_len[2]; /* Data len without this info */ 285 Uchar rzone_num_lsb; /* RZone number LSB */ 286 Uchar border_num_lsb; /* Border number LSB */ 287 Uchar res_4; /* Reserved */ 288 Ucbit trackmode : 4; /* Track mode */ 289 Ucbit copy : 1; /* Higher generation CD copy */ 290 Ucbit damage : 1; /* Damaged RZone */ 291 Ucbit ljrs : 2; /* Layer jump recording status */ 292 Ucbit datamode : 4; /* Data mode */ 293 Ucbit fp : 1; /* Fixed packet */ 294 Ucbit incremental : 1; /* RZone is to be written incremental */ 295 Ucbit blank : 1; /* RZone is blank */ 296 Ucbit rt : 1; /* RZone is reserved */ 297 Ucbit nwa_v : 1; /* Next WR address is valid */ 298 Ucbit lra_v : 1; /* Last rec address is valid */ 299 Ucbit res7_27 : 6; /* Reserved */ 300 Uchar rzone_start[4]; /* RZone start address */ 301 Uchar next_recordable_addr[4]; /* Next recordable address */ 302 Uchar free_blocks[4]; /* Free blocks in RZone */ 303 Uchar block_factor[4]; /* # of sectors of disc acc unit */ 304 Uchar rzone_size[4]; /* RZone size */ 305 Uchar last_recorded_addr[4]; /* Last Recorded addr in RZone */ 306 Uchar rzone_num_msb; /* RZone number MSB */ 307 Uchar border_num_msb; /* Border number MSB */ 308 Uchar res_34_35[2]; /* Reserved */ 309 Uchar read_compat_lba[4]; /* Read Compatibilty LBA */ 310 Uchar next_layer_jump[4]; /* Next layer jump address */ 311 Uchar last_layer_jump[4]; /* Last layer jump address */ 312 }; 313 314 #else /* Motorola bitorder */ 315 316 struct rzone_info { 317 Uchar data_len[2]; /* Data len without this info */ 318 Uchar rzone_num_lsb; /* RZone number LSB */ 319 Uchar border_num_lsb; /* Border number LSB */ 320 Uchar res_4; /* Reserved */ 321 Ucbit ljrs : 2; /* Layer jump recording status */ 322 Ucbit damage : 1; /* Damaged RZone */ 323 Ucbit copy : 1; /* Higher generation CD copy */ 324 Ucbit trackmode : 4; /* Track mode */ 325 Ucbit rt : 1; /* RZone is reserved */ 326 Ucbit blank : 1; /* RZone is blank */ 327 Ucbit incremental : 1; /* RZone is to be written incremental */ 328 Ucbit fp : 1; /* Fixed packet */ 329 Ucbit datamode : 4; /* Data mode */ 330 Ucbit res7_27 : 6; /* Reserved */ 331 Ucbit lra_v : 1; /* Last rec address is valid */ 332 Ucbit nwa_v : 1; /* Next WR address is valid */ 333 Uchar rzone_start[4]; /* RZone start address */ 334 Uchar next_recordable_addr[4]; /* Next recordable address */ 335 Uchar free_blocks[4]; /* Free blocks in RZone */ 336 Uchar block_factor[4]; /* # of sectors of disc acc unit */ 337 Uchar rzone_size[4]; /* RZone size */ 338 Uchar last_recorded_addr[4]; /* Last Recorded addr in RZone */ 339 Uchar rzone_num_msb; /* RZone number MSB */ 340 Uchar border_num_msb; /* Border number MSB */ 341 Uchar res_34_35[2]; /* Reserved */ 342 Uchar read_compat_lba[4]; /* Read Compatibilty LBA */ 343 Uchar next_layer_jump[4]; /* Next layer jump address */ 344 Uchar last_layer_jump[4]; /* Last layer jump address */ 345 }; 346 347 #endif 348 349 /* 350 * The lrjs values: 351 */ 352 #define LRJS_NONE 0 /* DAO/Incremental/Blank */ 353 #define LRJS_UNSPEC 1 /* WT == LJ but layerjump not set */ 354 #define LRJS_MANUAL 2 /* Manual layer jump set */ 355 #define LRJS_INTERVAL 3 /* Jump interval size set */ 356 357 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 358 359 struct dvd_structure_00 { 360 Uchar data_len[2]; /* Data len without this info */ 361 Uchar res23[2]; /* Reserved */ 362 Ucbit book_version : 4; /* DVD Book version */ 363 Ucbit book_type : 4; /* DVD Book type */ 364 Ucbit maximum_rate : 4; /* Maximum data rate (coded) */ 365 Ucbit disc_size : 4; /* Disc size (coded) */ 366 Ucbit layer_type : 4; /* Layer type */ 367 Ucbit track_path : 1; /* 0 = parallel, 1 = opposit dir*/ 368 Ucbit numlayers : 2; /* Number of Layers (0 == 1) */ 369 Ucbit res2_7 : 1; /* Reserved */ 370 Ucbit track_density : 4; /* Track density (coded) */ 371 Ucbit linear_density : 4; /* Linear data density (coded) */ 372 Uchar res8; /* Reserved */ 373 Uchar phys_start[3]; /* Starting Physical sector # */ 374 Uchar res12; /* Reserved */ 375 Uchar phys_end[3]; /* End physical data sector # */ 376 Uchar res16; /* Reserved */ 377 Uchar end_layer0[3]; /* End sector # in layer */ 378 Ucbit res20 : 7; /* Reserved */ 379 Ucbit bca : 1; /* BCA flag bit */ 380 }; 381 382 #else /* Motorola bitorder */ 383 384 struct dvd_structure_00 { 385 Uchar data_len[2]; /* Data len without this info */ 386 Uchar res23[2]; /* Reserved */ 387 Ucbit book_type : 4; /* DVD Book type */ 388 Ucbit book_version : 4; /* DVD Book version */ 389 Ucbit disc_size : 4; /* Disc size (coded) */ 390 Ucbit maximum_rate : 4; /* Maximum data rate (coded) */ 391 Ucbit res2_7 : 1; /* Reserved */ 392 Ucbit numlayers : 2; /* Number of Layers (0 == 1) */ 393 Ucbit track_path : 1; /* 0 = parallel, 1 = opposit dir*/ 394 Ucbit layer_type : 4; /* Layer type */ 395 Ucbit linear_density : 4; /* Linear data density (coded) */ 396 Ucbit track_density : 4; /* Track density (coded) */ 397 Uchar res8; /* Reserved */ 398 Uchar phys_start[3]; /* Starting Physical sector # */ 399 Uchar res12; /* Reserved */ 400 Uchar phys_end[3]; /* End physical data sector # */ 401 Uchar res16; /* Reserved */ 402 Uchar end_layer0[3]; /* End sector # in layer */ 403 Ucbit bca : 1; /* BCA flag bit */ 404 Ucbit res20 : 7; /* Reserved */ 405 }; 406 407 #endif 408 409 struct dvd_structure_01 { 410 Uchar data_len[2]; /* Data len without this info */ 411 Uchar res23[2]; /* Reserved */ 412 Uchar copyr_prot_type; /* Copyright prot system type */ 413 Uchar region_mgt_info; /* Region management info */ 414 Uchar res67[2]; /* Reserved */ 415 }; 416 417 struct dvd_structure_02 { 418 Uchar data_len[2]; /* Data len without this info */ 419 Uchar res23[2]; /* Reserved */ 420 Uchar key_data[2048]; /* Disc Key data */ 421 }; 422 423 struct dvd_structure_03 { 424 Uchar data_len[2]; /* Data len without this info */ 425 Uchar res23[2]; /* Reserved */ 426 Uchar bca_info[1]; /* BCA information (12-188 bytes)*/ 427 }; 428 429 struct dvd_structure_04 { 430 Uchar data_len[2]; /* Data len without this info */ 431 Uchar res23[2]; /* Reserved */ 432 Uchar man_info[2048]; /* Disc manufacturing info */ 433 }; 434 435 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 436 437 struct dvd_structure_05 { 438 Uchar data_len[2]; /* Data len without this info */ 439 Uchar res23[2]; /* Reserved */ 440 Ucbit res4_03 : 4; /* Reserved */ 441 Ucbit cgms : 2; /* CGMS (see below) */ 442 Ucbit res4_6 : 1; /* Reserved */ 443 Ucbit cpm : 1; /* This is copyrighted material */ 444 Uchar res57[3]; /* Reserved */ 445 }; 446 447 #else /* Motorola bitorder */ 448 449 struct dvd_structure_05 { 450 Uchar data_len[2]; /* Data len without this info */ 451 Uchar res23[2]; /* Reserved */ 452 Ucbit cpm : 1; /* This is copyrighted material */ 453 Ucbit res4_6 : 1; /* Reserved */ 454 Ucbit cgms : 2; /* CGMS (see below) */ 455 Ucbit res4_03 : 4; /* Reserved */ 456 Uchar res57[3]; /* Reserved */ 457 }; 458 459 #endif 460 461 #define CGMS_PERMITTED 0 /* Unlimited copy permitted */ 462 #define CGMS_RES 1 /* Reserved */ 463 #define CGMS_ONE_COPY 2 /* One copy permitted */ 464 #define CGMS_NO_COPY 3 /* No copy permitted */ 465 466 struct dvd_structure_0D { 467 Uchar data_len[2]; /* Data len without this info */ 468 Uchar res23[2]; /* Reserved */ 469 Uchar last_rma_sector[2]; /* Last recorded RMA sector # */ 470 Uchar rmd_bytes[1]; /* Content of Record man area */ 471 }; 472 473 struct dvd_structure_0E { 474 Uchar data_len[2]; /* Data len without this info */ 475 Uchar res23[2]; /* Reserved */ 476 Uchar field_id; /* Field ID (1) */ 477 Uchar application_code; /* Disc Application code */ 478 Uchar phys_data; /* Disc Phisical Data */ 479 Uchar last_recordable_addr[3]; /* Last addr of recordable area */ 480 Uchar res_a[2]; /* Reserved */ 481 Uchar field_id_2; /* Field ID (2) */ 482 Uchar ind_wr_power; /* Recommended writing power */ 483 Uchar ind_wavelength; /* Wavelength for ind_wr_power */ 484 Uchar opt_wr_strategy[4]; /* Optimum write Strategy */ 485 Uchar res_b[1]; /* Reserved */ 486 Uchar field_id_3; /* Field ID (3) */ 487 Uchar man_id[6]; /* Manufacturer ID */ 488 Uchar res_m1; /* Reserved */ 489 Uchar field_id_4; /* Field ID (4) */ 490 Uchar man_id2[6]; /* Manufacturer ID */ 491 Uchar res_m2; /* Reserved */ 492 }; 493 494 struct dvd_structure_0F { 495 Uchar data_len[2]; /* Data len without this info */ 496 Uchar res23[2]; /* Reserved */ 497 Uchar res45[2]; /* Reserved */ 498 Uchar random[2]; /* Random number */ 499 Uchar year[4]; /* Year (ascii) */ 500 Uchar month[2]; /* Month (ascii) */ 501 Uchar day[2]; /* Day (ascii) */ 502 Uchar hour[2]; /* Hour (ascii) */ 503 Uchar minute[2]; /* Minute (ascii) */ 504 Uchar second[2]; /* Second (ascii) */ 505 }; 506 507 struct dvd_structure_0F_w { 508 Uchar data_len[2]; /* Data len without this info */ 509 Uchar res23[2]; /* Reserved */ 510 Uchar res45[2]; /* Reserved */ 511 Uchar year[4]; /* Year (ascii) */ 512 Uchar month[2]; /* Month (ascii) */ 513 Uchar day[2]; /* Day (ascii) */ 514 Uchar hour[2]; /* Hour (ascii) */ 515 Uchar minute[2]; /* Minute (ascii) */ 516 Uchar second[2]; /* Second (ascii) */ 517 }; 518 519 struct dvd_structure_20 { 520 Uchar data_len[2]; /* Data len without this info */ 521 Uchar res23[2]; /* Reserved */ 522 Uchar res47[4]; /* Reserved */ 523 Uchar l0_area_cap[4]; /* Layer 0 area capacity */ 524 }; 525 526 struct dvd_structure_22 { 527 Uchar data_len[2]; /* Data len without this info */ 528 Uchar res23[2]; /* Reserved */ 529 Uchar res47[4]; /* Reserved */ 530 Uchar jump_interval_size[4]; /* Jump interval size */ 531 }; 532 533 struct dvd_structure_23 { 534 Uchar data_len[2]; /* Data len without this info */ 535 Uchar res23[2]; /* Reserved */ 536 Uchar res47[4]; /* Reserved */ 537 Uchar jump_lba[4]; /* Jump logical block address */ 538 }; 539 540 struct mmc_cue { 541 Uchar cs_ctladr; /* CTL/ADR for this track */ 542 Uchar cs_tno; /* This track number */ 543 Uchar cs_index; /* Index within this track */ 544 Uchar cs_dataform; /* Data form */ 545 Uchar cs_scms; /* Serial copy management */ 546 Uchar cs_min; /* Absolute time minutes */ 547 Uchar cs_sec; /* Absolute time seconds */ 548 Uchar cs_frame; /* Absolute time frames */ 549 }; 550 551 struct mmc_performance_header { 552 Uchar p_datalen[4]; /* Performance Data length */ 553 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 554 Ucbit p_exept :1; /* Nominal vs. Exept. conditions*/ 555 Ucbit p_write :1; /* Write vs. Read performance */ 556 Ucbit p_res_4 :6; /* Reserved bits... */ 557 #else /* Motorola bitorder */ 558 Ucbit p_res_4 :6; /* Reserved bits... */ 559 Ucbit p_write :1; /* Write vs. Read performance */ 560 Ucbit p_exept :1; /* Nominal vs. Exept. conditions*/ 561 #endif 562 Uchar p_res[3]; /* Reserved bytes */ 563 }; 564 565 566 struct mmc_performance { /* Type == 00 (nominal) */ 567 Uchar start_lba[4]; /* Starting LBA */ 568 Uchar start_perf[4]; /* Start Performance */ 569 Uchar end_lba[4]; /* Ending LBA */ 570 Uchar end_perf[4]; /* Ending Performance */ 571 }; 572 573 struct mmc_exceptions { /* Type == 00 (exceptions) */ 574 Uchar lba[4]; /* LBA */ 575 Uchar time[2]; /* Time */ 576 }; 577 578 struct mmc_write_speed { /* Type == 00 (write speed) */ 579 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 580 Ucbit p_mrw :1; /* Suitable for mixed read/write*/ 581 Ucbit p_exact :1; /* Speed count for whole media */ 582 Ucbit p_rdd :1; /* Media rotational control */ 583 Ucbit p_wrc :2; /* Write rotational control */ 584 Ucbit p_res :3; /* Reserved bits... */ 585 #else /* Motorola bitorder */ 586 Ucbit p_res :3; /* Reserved bits... */ 587 Ucbit p_wrc :2; /* Write rotational control */ 588 Ucbit p_rdd :1; /* Media rotational control */ 589 Ucbit p_exact :1; /* Speed count for whole media */ 590 Ucbit p_mrw :1; /* Suitable for mixed read/write*/ 591 #endif 592 Uchar res[3]; /* Reserved Bytes */ 593 Uchar end_lba[4]; /* Ending LBA */ 594 Uchar read_speed[4]; /* Read Speed */ 595 Uchar write_speed[4]; /* Write Speed */ 596 }; 597 598 #define WRC_DEF_RC 0 /* Media default rotational control */ 599 #define WRC_CAV 1 /* CAV */ 600 601 602 struct mmc_streaming { /* Performance for set streaming*/ 603 #if defined(_BIT_FIELDS_LTOH) /* Intel bitorder */ 604 Ucbit p_ra :1; /* Random Acess */ 605 Ucbit p_exact :1; /* Set values exactly */ 606 Ucbit p_rdd :1; /* Restore unit defaults */ 607 Ucbit p_wrc :2; /* Write rotational control */ 608 Ucbit p_res :3; /* Reserved bits... */ 609 #else /* Motorola bitorder */ 610 Ucbit p_res :3; /* Reserved bits... */ 611 Ucbit p_wrc :2; /* Write rotational control */ 612 Ucbit p_rdd :1; /* Restore unit defaults */ 613 Ucbit p_exact :1; /* Set values exactly */ 614 Ucbit p_ra :1; /* Random Acess */ 615 #endif 616 Uchar res[3]; /* Reserved Bytes */ 617 Uchar start_lba[4]; /* Starting LBA */ 618 Uchar end_lba[4]; /* Ending LBA */ 619 Uchar read_size[4]; /* Read Size */ 620 Uchar read_time[4]; /* Read Time */ 621 Uchar write_size[4]; /* Write Size */ 622 Uchar write_time[4]; /* Write Time */ 623 }; 624 625 #endif /* _SCSIMMC_H */ 626