1 /*
2 Permission is granted to anyone to use this software for any purpose,
3 including commercial applications. To alter this software and redistribute it freely,
4 if the origin of this software is not misrepresented.
5 */
6
7 /* This software has been heavily modified for VRC7. To get a stock YM2413 emulator, download
8 MSXplug.
9 */
10
11 /***********************************************************************************
12
13 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
14
15 2001 01-08 : Version 0.10 -- 1st version.
16 2001 01-15 : Version 0.20 -- semi-public version.
17 2001 01-16 : Version 0.30 -- 1st public version.
18 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
19 : Version 0.32 -- LPF implemented.
20 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
21 -- Fixed the LFO bug.
22 2001 01-24 : Version 0.35 -- Fixed the drum problem,
23 support undocumented EG behavior.
24 2001 02-02 : Version 0.38 -- Improved the performance.
25 Fixed the hi-hat and cymbal model.
26 Fixed the default percussive datas.
27 Noise reduction.
28 Fixed the feedback problem.
29 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
30 Improved the performance.
31 2001 03-04 : Version 0.40 -- Improved the feedback.
32 Change the default table size.
33 Clock and Rate can be changed during play.
34 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
35 Added VRC7 patch (OPLL_reset_patch is changed).
36 Fixed OPLL_reset() bug.
37 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
38 Added OPLL_writeIO.
39 2001 09-28 : Version 0.51 -- Removed the noise table.
40 2002 01-28 : Version 0.52 -- Added Stereo mode.
41 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
42 2002 02-20 : Version 0.54 -- Added the best quality mode.
43 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
44 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
45
46 2004 01-24 : Modified by xodnizel to remove code not needed for the VRC7, among other things.
47
48 References:
49 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
50 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
51 s_opl.c -- 2001 written by Mamiya (NEZplug development).
52 fmgen.cpp -- 1999,2000 written by cisc.
53 fmpac.ill -- 2000 created by NARUTO.
54 MSX-Datapack
55 YMU757 data sheet
56 YM2143 data sheet
57
58 **************************************************************************************/
59 #include <stdio.h>
60 #include <stdlib.h>
61 #include <string.h>
62 #include <math.h>
63 #include "emu2413.h"
64
65 static const unsigned char default_inst[15][8] = {
66 #include "vrc7tone.h"
67 };
68
69 #define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
70 #define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
71 #define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
72
73 #define DB_POS(x) (e_uint32)((x)/DB_STEP)
74 #define DB_NEG(x) (e_uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
75
76 /* Bits for liner value */
77 #define DB2LIN_AMP_BITS 11
78 #define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
79
80 /* Bits for envelope phase incremental counter */
81 #define EG_DP_BITS 22
82 #define EG_DP_WIDTH (1<<EG_DP_BITS)
83
84 /* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
85 #define PM_AMP_BITS 8
86 #define PM_AMP (1<<PM_AMP_BITS)
87
88 /* PM speed(Hz) and depth(cent) */
89 #define PM_SPEED 6.4
90 #define PM_DEPTH 13.75
91
92 /* AM speed(Hz) and depth(dB) */
93 #define AM_SPEED 3.7
94 //#define AM_DEPTH 4.8
95 #define AM_DEPTH 2.4
96
97 /* Cut the lower b bit(s) off. */
98 #define HIGHBITS(c,b) ((c)>>(b))
99
100 /* Leave the lower b bit(s). */
101 #define LOWBITS(c,b) ((c)&((1<<(b))-1))
102
103 /* Expand x which is s bits to d bits. */
104 #define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
105
106 /* Expand x which is s bits to d bits and fill expanded bits '1' */
107 #define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
108
109 #define MOD(o,x) (&(o)->slot[(x)<<1])
110 #define CAR(o,x) (&(o)->slot[((x)<<1)|1])
111
112 #define BIT(s,b) (((s)>>(b))&1)
113
114 /* Definition of envelope mode */
115 enum
116 { SETTLE, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, FINISH };
117
118 /***************************************************
119
120 Create tables
121
122 ****************************************************/
Min(e_int32 i,e_int32 j)123 INLINE static e_int32 Min (e_int32 i, e_int32 j)
124 {
125 if (i < j)
126 return i;
127 else
128 return j;
129 }
130
131 /* Table for AR to LogCurve. */
makeAdjustTable(OPLL * opll)132 static void makeAdjustTable (OPLL * opll)
133 {
134 e_int32 i;
135
136 opll->AR_ADJUST_TABLE[0] = (1 << EG_BITS);
137 for (i = 1; i < 128; i++)
138 opll->AR_ADJUST_TABLE[i] = (e_uint16) ((double) (1 << EG_BITS) - 1 - (1 << EG_BITS) * log (i) / log (128));
139 }
140
141
142 /* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
makeDB2LinTable(OPLL * opll)143 static void makeDB2LinTable (OPLL * opll)
144 {
145 e_int32 i;
146
147 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
148 {
149 opll->DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
150 if (i >= DB_MUTE) opll->DB2LIN_TABLE[i] = 0;
151 //printf("%d\n",DB2LIN_TABLE[i]);
152 opll->DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-opll->DB2LIN_TABLE[i]);
153 }
154 }
155
156 /* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
lin2db(double d)157 static e_int32 lin2db (double d)
158 {
159 if (d == 0)
160 return (DB_MUTE - 1);
161 else
162 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
163 }
164
165
166 /* Sin Table */
makeSinTable(OPLL * opll)167 static void makeSinTable (OPLL * opll)
168 {
169 e_int32 i;
170
171 for (i = 0; i < PG_WIDTH / 4; i++)
172 {
173 opll->fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
174 }
175
176 for (i = 0; i < PG_WIDTH / 4; i++)
177 {
178 opll->fullsintable[PG_WIDTH / 2 - 1 - i] = opll->fullsintable[i];
179 }
180
181 for (i = 0; i < PG_WIDTH / 2; i++)
182 {
183 opll->fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + opll->fullsintable[i]);
184 }
185
186 for (i = 0; i < PG_WIDTH / 2; i++)
187 opll->halfsintable[i] = opll->fullsintable[i];
188 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
189 opll->halfsintable[i] = opll->fullsintable[0];
190 }
191
192 /* Table for Pitch Modulator */
makePmTable(OPLL * opll)193 static void makePmTable (OPLL * opll)
194 {
195 e_int32 i;
196
197 for (i = 0; i < PM_PG_WIDTH; i++)
198 opll->pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200));
199 }
200
201 /* Table for Amp Modulator */
makeAmTable(OPLL * opll)202 static void makeAmTable (OPLL * opll)
203 {
204 e_int32 i;
205
206 for (i = 0; i < AM_PG_WIDTH; i++)
207 opll->amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH)));
208 }
209
210 /* Phase increment counter table */
makeDphaseTable(OPLL * opll)211 static void makeDphaseTable (OPLL * opll)
212 {
213 e_uint32 fnum, block, ML;
214 e_uint32 mltable[16] =
215 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
216
217 for (fnum = 0; fnum < 512; fnum++)
218 for (block = 0; block < 8; block++)
219 for (ML = 0; ML < 16; ML++)
220 opll->dphaseTable[fnum][block][ML] = (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
221 }
222
makeTllTable(OPLL * opll)223 static void makeTllTable (OPLL *opll)
224 {
225 #define dB2(x) ((x)*2)
226
227 static const double kltable[16] = {
228 dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
229 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
230 };
231
232 e_int32 tmp;
233 e_int32 fnum, block, TL, KL;
234
235 for (fnum = 0; fnum < 16; fnum++)
236 for (block = 0; block < 8; block++)
237 for (TL = 0; TL < 64; TL++)
238 for (KL = 0; KL < 4; KL++)
239 {
240 if (KL == 0)
241 {
242 opll->tllTable[fnum][block][TL][KL] = TL2EG (TL);
243 }
244 else
245 {
246 tmp = (e_int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
247 if (tmp <= 0)
248 opll->tllTable[fnum][block][TL][KL] = TL2EG (TL);
249 else
250 opll->tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
251 }
252 }
253 }
254
255 #ifdef USE_SPEC_ENV_SPEED
256 static const double attacktime[16][4] = {
257 {0, 0, 0, 0},
258 {1730.15, 1400.60, 1153.43, 988.66},
259 {865.08, 700.30, 576.72, 494.33},
260 {432.54, 350.15, 288.36, 247.16},
261 {216.27, 175.07, 144.18, 123.58},
262 {108.13, 87.54, 72.09, 61.79},
263 {54.07, 43.77, 36.04, 30.90},
264 {27.03, 21.88, 18.02, 15.45},
265 {13.52, 10.94, 9.01, 7.72},
266 {6.76, 5.47, 4.51, 3.86},
267 {3.38, 2.74, 2.25, 1.93},
268 {1.69, 1.37, 1.13, 0.97},
269 {0.84, 0.70, 0.60, 0.54},
270 {0.50, 0.42, 0.34, 0.30},
271 {0.28, 0.22, 0.18, 0.14},
272 {0.00, 0.00, 0.00, 0.00}
273 };
274
275 static const double decaytime[16][4] = {
276 {0, 0, 0, 0},
277 {20926.60, 16807.20, 14006.00, 12028.60},
278 {10463.30, 8403.58, 7002.98, 6014.32},
279 {5231.64, 4201.79, 3501.49, 3007.16},
280 {2615.82, 2100.89, 1750.75, 1503.58},
281 {1307.91, 1050.45, 875.37, 751.79},
282 {653.95, 525.22, 437.69, 375.90},
283 {326.98, 262.61, 218.84, 187.95},
284 {163.49, 131.31, 109.42, 93.97},
285 {81.74, 65.65, 54.71, 46.99},
286 {40.87, 32.83, 27.36, 23.49},
287 {20.44, 16.41, 13.68, 11.75},
288 {10.22, 8.21, 6.84, 5.87},
289 {5.11, 4.10, 3.42, 2.94},
290 {2.55, 2.05, 1.71, 1.47},
291 {1.27, 1.27, 1.27, 1.27}
292 };
293 #endif
294
295 /* Rate Table for Attack */
makeDphaseARTable(OPLL * opll)296 static void makeDphaseARTable(OPLL * opll)
297 {
298 e_int32 AR, Rks, RM, RL;
299 #ifdef USE_SPEC_ENV_SPEED
300 e_uint32 attacktable[16][4];
301
302 for (RM = 0; RM < 16; RM++)
303 for (RL = 0; RL < 4; RL++)
304 {
305 if (RM == 0)
306 attacktable[RM][RL] = 0;
307 else if (RM == 15)
308 attacktable[RM][RL] = EG_DP_WIDTH;
309 else
310 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
311
312 }
313 #endif
314
315 for (AR = 0; AR < 16; AR++)
316 for (Rks = 0; Rks < 16; Rks++)
317 {
318 RM = AR + (Rks >> 2);
319 RL = Rks & 3;
320 if (RM > 15)
321 RM = 15;
322 switch (AR)
323 {
324 case 0:
325 opll->dphaseARTable[AR][Rks] = 0;
326 break;
327 case 15:
328 opll->dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
329 break;
330 default:
331 #ifdef USE_SPEC_ENV_SPEED
332 opll->dphaseARTable[AR][Rks] = (attacktable[RM][RL]);
333 #else
334 opll->dphaseARTable[AR][Rks] = ((3 * (RL + 4) << (RM + 1)));
335 #endif
336 break;
337 }
338 }
339 }
340
341 /* Rate Table for Decay and Release */
makeDphaseDRTable(OPLL * opll)342 static void makeDphaseDRTable (OPLL * opll)
343 {
344 e_int32 DR, Rks, RM, RL;
345
346 #ifdef USE_SPEC_ENV_SPEED
347 e_uint32 decaytable[16][4];
348
349 for (RM = 0; RM < 16; RM++)
350 for (RL = 0; RL < 4; RL++)
351 if (RM == 0)
352 decaytable[RM][RL] = 0;
353 else
354 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
355 #endif
356
357 for (DR = 0; DR < 16; DR++)
358 for (Rks = 0; Rks < 16; Rks++)
359 {
360 RM = DR + (Rks >> 2);
361 RL = Rks & 3;
362 if (RM > 15)
363 RM = 15;
364 switch (DR)
365 {
366 case 0:
367 opll->dphaseDRTable[DR][Rks] = 0;
368 break;
369 default:
370 #ifdef USE_SPEC_ENV_SPEED
371 opll->dphaseDRTable[DR][Rks] = (decaytable[RM][RL]);
372 #else
373 opll->dphaseDRTable[DR][Rks] = ((RL + 4) << (RM - 1));
374 #endif
375 break;
376 }
377 }
378 }
379
makeRksTable(OPLL * opll)380 static void makeRksTable (OPLL *opll)
381 {
382
383 e_int32 fnum8, block, KR;
384
385 for (fnum8 = 0; fnum8 < 2; fnum8++)
386 for (block = 0; block < 8; block++)
387 for (KR = 0; KR < 2; KR++)
388 {
389 if (KR != 0)
390 opll->rksTable[fnum8][block][KR] = (block << 1) + fnum8;
391 else
392 opll->rksTable[fnum8][block][KR] = block >> 1;
393 }
394 }
395
396 /************************************************************
397
398 Calc Parameters
399
400 ************************************************************/
401
calc_eg_dphase(OPLL * opll,OPLL_SLOT * slot)402 INLINE static e_uint32 calc_eg_dphase (OPLL *opll, OPLL_SLOT * slot)
403 {
404
405 switch (slot->eg_mode)
406 {
407 case ATTACK:
408 return opll->dphaseARTable[slot->patch.AR][slot->rks];
409
410 case DECAY:
411 return opll->dphaseDRTable[slot->patch.DR][slot->rks];
412
413 case SUSHOLD:
414 return 0;
415
416 case SUSTINE:
417 return opll->dphaseDRTable[slot->patch.RR][slot->rks];
418
419 case RELEASE:
420 if (slot->sustine)
421 return opll->dphaseDRTable[5][slot->rks];
422 else if (slot->patch.EG)
423 return opll->dphaseDRTable[slot->patch.RR][slot->rks];
424 else
425 return opll->dphaseDRTable[7][slot->rks];
426
427 case FINISH:
428 return 0;
429
430 default:
431 return 0;
432 }
433 }
434
435 /*************************************************************
436
437 OPLL internal interfaces
438
439 *************************************************************/
440
441 #define UPDATE_PG(S) (S)->dphase = opll->dphaseTable[(S)->fnum][(S)->block][(S)->patch.ML]
442 #define UPDATE_TLL(S)\
443 (((S)->type==0)?\
444 ((S)->tll = opll->tllTable[((S)->fnum)>>5][(S)->block][(S)->patch.TL][(S)->patch.KL]):\
445 ((S)->tll = opll->tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch.KL]))
446 #define UPDATE_RKS(S) (S)->rks = opll->rksTable[((S)->fnum)>>8][(S)->block][(S)->patch.KR]
447 #define UPDATE_WF(S) (S)->sintbl = opll->waveform[(S)->patch.WF]
448 #define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(opll,S)
449 #define UPDATE_ALL(S)\
450 UPDATE_PG(S);\
451 UPDATE_TLL(S);\
452 UPDATE_RKS(S);\
453 UPDATE_WF(S); \
454 UPDATE_EG(S) /* EG should be updated last. */
455
456
457 /* Slot key on */
slotOn(OPLL_SLOT * slot)458 INLINE static void slotOn (OPLL_SLOT * slot)
459 {
460 slot->eg_mode = ATTACK;
461 slot->eg_phase = 0;
462 slot->phase = 0;
463 }
464
465 /* Slot key on without reseting the phase */
slotOn2(OPLL_SLOT * slot)466 INLINE static void slotOn2 (OPLL_SLOT * slot)
467 {
468 slot->eg_mode = ATTACK;
469 slot->eg_phase = 0;
470 }
471
472 /* Slot key off */
slotOff(OPLL * opll,OPLL_SLOT * slot)473 INLINE static void slotOff (OPLL *opll, OPLL_SLOT * slot)
474 {
475 if (slot->eg_mode == ATTACK)
476 slot->eg_phase = EXPAND_BITS (opll->AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
477 slot->eg_mode = RELEASE;
478 }
479
480 /* Channel key on */
keyOn(OPLL * opll,e_int32 i)481 INLINE static void keyOn (OPLL * opll, e_int32 i)
482 {
483 if (!opll->slot_on_flag[i * 2])
484 slotOn (MOD(opll,i));
485 if (!opll->slot_on_flag[i * 2 + 1])
486 slotOn (CAR(opll,i));
487 opll->key_status[i] = 1;
488 }
489
490 /* Channel key off */
keyOff(OPLL * opll,e_int32 i)491 INLINE static void keyOff (OPLL * opll, e_int32 i)
492 {
493 if (opll->slot_on_flag[i * 2 + 1])
494 slotOff (opll, CAR(opll,i));
495 opll->key_status[i] = 0;
496 }
497
498 /* Set sustine parameter */
setSustine(OPLL * opll,e_int32 c,e_int32 sustine)499 INLINE static void setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
500 {
501 CAR(opll,c)->sustine = sustine;
502 if (MOD(opll,c)->type)
503 MOD(opll,c)->sustine = sustine;
504 }
505
506 /* Volume : 6bit ( Volume register << 2 ) */
setVolume(OPLL * opll,e_int32 c,e_int32 volume)507 INLINE static void setVolume (OPLL * opll, e_int32 c, e_int32 volume)
508 {
509 CAR(opll,c)->volume = volume;
510 }
511
setSlotVolume(OPLL_SLOT * slot,e_int32 volume)512 INLINE static void setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
513 {
514 slot->volume = volume;
515 }
516
517 /* Set F-Number ( fnum : 9bit ) */
setFnumber(OPLL * opll,e_int32 c,e_int32 fnum)518 INLINE static void setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
519 {
520 CAR(opll,c)->fnum = fnum;
521 MOD(opll,c)->fnum = fnum;
522 }
523
524 /* Set Block data (block : 3bit ) */
setBlock(OPLL * opll,e_int32 c,e_int32 block)525 INLINE static void setBlock (OPLL * opll, e_int32 c, e_int32 block)
526 {
527 CAR(opll,c)->block = block;
528 MOD(opll,c)->block = block;
529 }
530
update_key_status(OPLL * opll)531 INLINE static void update_key_status (OPLL * opll)
532 {
533 int ch;
534
535 for (ch = 0; ch < 6; ch++)
536 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->HiFreq[ch]) & 0x10;
537 }
538
539 /***********************************************************
540
541 Initializing
542
543 ***********************************************************/
544
OPLL_SLOT_reset(OPLL * opll,OPLL_SLOT * slot,int type)545 static void OPLL_SLOT_reset (OPLL *opll, OPLL_SLOT * slot, int type)
546 {
547 slot->type = type;
548 slot->sintbl = opll->waveform[0];
549 slot->phase = 0;
550 slot->dphase = 0;
551 slot->output[0] = 0;
552 slot->output[1] = 0;
553 slot->feedback = 0;
554 slot->eg_mode = SETTLE;
555 slot->eg_phase = EG_DP_WIDTH;
556 slot->eg_dphase = 0;
557 slot->rks = 0;
558 slot->tll = 0;
559 slot->sustine = 0;
560 slot->fnum = 0;
561 slot->block = 0;
562 slot->volume = 0;
563 slot->pgout = 0;
564 slot->egout = 0;
565 }
566
internal_refresh(OPLL * opll)567 static void internal_refresh (OPLL *opll)
568 {
569 makeDphaseTable (opll);
570 makeDphaseARTable (opll);
571 makeDphaseDRTable (opll);
572 opll->pm_dphase = (e_uint32) (PM_SPEED * PM_DP_WIDTH / (opll->clk / 72));
573 opll->am_dphase = (e_uint32) (AM_SPEED * AM_DP_WIDTH / (opll->clk / 72));
574 }
575
maketables(OPLL * opll,e_uint32 c)576 static void maketables (OPLL *opll, e_uint32 c)
577 {
578 opll->clk = c;
579 makePmTable (opll);
580 makeAmTable (opll);
581 makeDB2LinTable (opll);
582 makeAdjustTable (opll);
583 makeTllTable (opll);
584 makeRksTable (opll);
585 makeSinTable (opll);
586 //makeDefaultPatch ();
587 internal_refresh (opll);
588 }
589
OPLL_new(e_uint32 clk)590 OPLL *OPLL_new (e_uint32 clk)
591 {
592 OPLL *opll;
593
594 opll = (OPLL *) calloc (sizeof (OPLL), 1);
595 if (opll == NULL)
596 return NULL;
597 maketables(opll,clk);
598
599 opll->waveform[0]=opll->fullsintable;
600 opll->waveform[1]=opll->halfsintable;
601
602 opll->mask = 0;
603
604 OPLL_reset (opll);
605
606 return opll;
607 }
608
609
OPLL_delete(OPLL * opll)610 void OPLL_delete (OPLL * opll)
611 {
612 free (opll);
613 }
614
615 /* Reset whole of OPLL except patch datas. */
OPLL_reset(OPLL * opll)616 void OPLL_reset (OPLL * opll)
617 {
618 e_int32 i;
619
620 if (!opll)
621 return;
622
623 opll->adr = 0;
624 opll->out = 0;
625
626 opll->pm_phase = 0;
627 opll->am_phase = 0;
628
629 opll->mask = 0;
630
631 for (i = 0; i < 12; i++)
632 OPLL_SLOT_reset(opll, &opll->slot[i], i%2);
633
634 for (i = 0; i < 6; i++)
635 {
636 opll->key_status[i] = 0;
637 //setPatch (opll, i, 0);
638 }
639
640 for (i = 0; i < 0x40; i++)
641 OPLL_writeReg (opll, i, 0);
642 }
643
644 /* Force Refresh (When external program changes some parameters). */
OPLL_forceRefresh(OPLL * opll)645 void OPLL_forceRefresh (OPLL * opll)
646 {
647 e_int32 i;
648
649 if (opll == NULL)
650 return;
651
652 for (i = 0; i < 12; i++)
653 {
654 UPDATE_PG (&opll->slot[i]);
655 UPDATE_RKS (&opll->slot[i]);
656 UPDATE_TLL (&opll->slot[i]);
657 UPDATE_WF (&opll->slot[i]);
658 UPDATE_EG (&opll->slot[i]);
659 }
660 }
661
OPLL_set_rate(OPLL * opll,e_uint32 r)662 void OPLL_set_rate (OPLL * opll, e_uint32 r)
663 {
664 internal_refresh (opll);
665 }
666
667 /*********************************************************
668
669 Generate wave data
670
671 *********************************************************/
672 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
673 #if ( SLOT_AMP_BITS - PG_BITS ) > 0
674 #define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
675 #else
676 #define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
677 #endif
678
679 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
680 #if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
681 #define wave2_4pi(e) (e)
682 #elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
683 #define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
684 #else
685 #define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
686 #endif
687
688 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
689 #if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
690 #define wave2_8pi(e) (e)
691 #elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
692 #define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
693 #else
694 #define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
695 #endif
696
697
698
699 /* Update AM, PM unit */
update_ampm(OPLL * opll)700 static void update_ampm (OPLL * opll)
701 {
702 opll->pm_phase = (opll->pm_phase + opll->pm_dphase) & (PM_DP_WIDTH - 1);
703 opll->am_phase = (opll->am_phase + opll->am_dphase) & (AM_DP_WIDTH - 1);
704 opll->lfo_am = opll->amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
705 opll->lfo_pm = opll->pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
706 }
707
708 /* PG */
709 INLINE static void
calc_phase(OPLL_SLOT * slot,e_int32 lfo)710 calc_phase (OPLL_SLOT * slot, e_int32 lfo)
711 {
712 if (slot->patch.PM)
713 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
714 else
715 slot->phase += slot->dphase;
716
717 slot->phase &= (DP_WIDTH - 1);
718
719 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
720 }
721
722 /* EG */
calc_envelope(OPLL * opll,OPLL_SLOT * slot,e_int32 lfo)723 static void calc_envelope(OPLL *opll, OPLL_SLOT * slot, e_int32 lfo)
724 {
725 #define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
726
727 static const e_uint32 SL[16] = {
728 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
729 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
730 };
731
732 e_uint32 egout;
733
734 switch (slot->eg_mode)
735 {
736
737 case ATTACK:
738 egout = opll->AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
739 slot->eg_phase += slot->eg_dphase;
740 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch.AR==15))
741 {
742 egout = 0;
743 slot->eg_phase = 0;
744 slot->eg_mode = DECAY;
745 UPDATE_EG (slot);
746 }
747 break;
748
749 case DECAY:
750 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
751 slot->eg_phase += slot->eg_dphase;
752 if (slot->eg_phase >= SL[slot->patch.SL])
753 {
754 if (slot->patch.EG)
755 {
756 slot->eg_phase = SL[slot->patch.SL];
757 slot->eg_mode = SUSHOLD;
758 UPDATE_EG (slot);
759 }
760 else
761 {
762 slot->eg_phase = SL[slot->patch.SL];
763 slot->eg_mode = SUSTINE;
764 UPDATE_EG (slot);
765 }
766 }
767 break;
768
769 case SUSHOLD:
770 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
771 if (slot->patch.EG == 0)
772 {
773 slot->eg_mode = SUSTINE;
774 UPDATE_EG (slot);
775 }
776 break;
777
778 case SUSTINE:
779 case RELEASE:
780 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
781 slot->eg_phase += slot->eg_dphase;
782 if (egout >= (1 << EG_BITS))
783 {
784 slot->eg_mode = FINISH;
785 egout = (1 << EG_BITS) - 1;
786 }
787 break;
788
789 case FINISH:
790 egout = (1 << EG_BITS) - 1;
791 break;
792
793 default:
794 egout = (1 << EG_BITS) - 1;
795 break;
796 }
797
798 if (slot->patch.AM)
799 egout = EG2DB (egout + slot->tll) + lfo;
800 else
801 egout = EG2DB (egout + slot->tll);
802
803 if (egout >= DB_MUTE)
804 egout = DB_MUTE - 1;
805
806 slot->egout = egout;
807 }
808
809 /* CARRIOR */
calc_slot_car(OPLL * opll,OPLL_SLOT * slot,e_int32 fm)810 INLINE static e_int32 calc_slot_car(OPLL *opll, OPLL_SLOT * slot, e_int32 fm)
811 {
812 slot->output[1] = slot->output[0];
813
814 if (slot->egout >= (DB_MUTE - 1))
815 {
816 slot->output[0] = 0;
817 }
818 else
819 {
820 slot->output[0] = opll->DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
821 }
822
823 return (slot->output[1] + slot->output[0]) >> 1;
824 }
825
826 /* MODULATOR */
calc_slot_mod(OPLL * opll,OPLL_SLOT * slot)827 INLINE static e_int32 calc_slot_mod(OPLL *opll, OPLL_SLOT * slot)
828 {
829 e_int32 fm;
830
831 slot->output[1] = slot->output[0];
832
833 if (slot->egout >= (DB_MUTE - 1))
834 {
835 slot->output[0] = 0;
836 }
837 else if (slot->patch.FB != 0)
838 {
839 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch.FB);
840 slot->output[0] = opll->DB2LIN_TABLE[slot->sintbl[(slot->pgout + fm)&(PG_WIDTH-1)] + slot->egout];
841 }
842 else
843 {
844 slot->output[0] = opll->DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
845 }
846
847 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
848
849 return slot->feedback;
850
851 }
852
calc(OPLL * opll)853 static INLINE e_int16 calc (OPLL * opll)
854 {
855 e_int32 inst = 0, out = 0;
856 e_int32 i;
857
858 update_ampm (opll);
859
860 for (i = 0; i < 12; i++)
861 {
862 calc_phase(&opll->slot[i],opll->lfo_pm);
863 calc_envelope(opll, &opll->slot[i],opll->lfo_am);
864 }
865
866 for (i = 0; i < 6; i++)
867 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
868 inst += calc_slot_car (opll, CAR(opll,i), calc_slot_mod(opll,MOD(opll,i)));
869
870 out = inst;
871 return (e_int16) out;
872 }
873
OPLL_calc(OPLL * opll)874 e_int16 OPLL_calc (OPLL * opll)
875 {
876 return calc (opll);
877 }
878
879 e_uint32
OPLL_setMask(OPLL * opll,e_uint32 mask)880 OPLL_setMask (OPLL * opll, e_uint32 mask)
881 {
882 e_uint32 ret;
883
884 if (opll)
885 {
886 ret = opll->mask;
887 opll->mask = mask;
888 return ret;
889 }
890 else
891 return 0;
892 }
893
894 e_uint32
OPLL_toggleMask(OPLL * opll,e_uint32 mask)895 OPLL_toggleMask (OPLL * opll, e_uint32 mask)
896 {
897 e_uint32 ret;
898
899 if (opll)
900 {
901 ret = opll->mask;
902 opll->mask ^= mask;
903 return ret;
904 }
905 else
906 return 0;
907 }
908
909 /****************************************************
910
911 I/O Ctrl
912
913 *****************************************************/
914
setInstrument(OPLL * opll,e_uint i,e_uint inst)915 static void setInstrument(OPLL * opll, e_uint i, e_uint inst)
916 {
917 const e_uint8 *src;
918 OPLL_PATCH *modp, *carp;
919
920 opll->patch_number[i]=inst;
921
922 if(inst)
923 src=default_inst[inst-1];
924 else
925 src=opll->CustInst;
926
927 modp=&MOD(opll,i)->patch;
928 carp=&CAR(opll,i)->patch;
929
930 modp->AM=(src[0]>>7)&1;
931 modp->PM=(src[0]>>6)&1;
932 modp->EG=(src[0]>>5)&1;
933 modp->KR=(src[0]>>4)&1;
934 modp->ML=(src[0]&0xF);
935
936 carp->AM=(src[1]>>7)&1;
937 carp->PM=(src[1]>>6)&1;
938 carp->EG=(src[1]>>5)&1;
939 carp->KR=(src[1]>>4)&1;
940 carp->ML=(src[1]&0xF);
941
942 modp->KL=(src[2]>>6)&3;
943 modp->TL=(src[2]&0x3F);
944
945 carp->KL = (src[3] >> 6) & 3;
946 carp->WF = (src[3] >> 4) & 1;
947
948 modp->WF = (src[3] >> 3) & 1;
949
950 modp->FB = (src[3]) & 7;
951
952 modp->AR = (src[4]>>4)&0xF;
953 modp->DR = (src[4]&0xF);
954
955 carp->AR = (src[5]>>4)&0xF;
956 carp->DR = (src[5]&0xF);
957
958 modp->SL = (src[6]>>4)&0xF;
959 modp->RR = (src[6]&0xF);
960
961 carp->SL = (src[7]>>4)&0xF;
962 carp->RR = (src[7]&0xF);
963 }
964
965
OPLL_writeReg(OPLL * opll,e_uint32 reg,e_uint32 data)966 void OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
967 {
968
969 e_int32 i, v, ch;
970
971 data = data & 0xff;
972 reg = reg & 0x3f;
973
974 switch (reg)
975 {
976 case 0x00:
977 opll->CustInst[0]=data;
978 for (i = 0; i < 6; i++)
979 {
980 if (opll->patch_number[i] == 0)
981 {
982 setInstrument(opll, i, 0);
983 UPDATE_PG (MOD(opll,i));
984 UPDATE_RKS (MOD(opll,i));
985 UPDATE_EG (MOD(opll,i));
986 }
987 }
988 break;
989
990 case 0x01:
991 opll->CustInst[1]=data;
992 for (i = 0; i < 6; i++)
993 {
994 if (opll->patch_number[i] == 0)
995 {
996 setInstrument(opll, i, 0);
997 UPDATE_PG (CAR(opll,i));
998 UPDATE_RKS (CAR(opll,i));
999 UPDATE_EG (CAR(opll,i));
1000 }
1001 }
1002 break;
1003
1004 case 0x02:
1005 opll->CustInst[2]=data;
1006 for (i = 0; i < 6; i++)
1007 {
1008 if (opll->patch_number[i] == 0)
1009 {
1010 setInstrument(opll, i, 0);
1011 UPDATE_TLL(MOD(opll,i));
1012 }
1013 }
1014 break;
1015
1016 case 0x03:
1017 opll->CustInst[3]=data;
1018 for (i = 0; i < 6; i++)
1019 {
1020 if (opll->patch_number[i] == 0)
1021 {
1022 setInstrument(opll, i, 0);
1023 UPDATE_WF(MOD(opll,i));
1024 UPDATE_WF(CAR(opll,i));
1025 }
1026 }
1027 break;
1028
1029 case 0x04:
1030 opll->CustInst[4]=data;
1031 for (i = 0; i < 6; i++)
1032 {
1033 if (opll->patch_number[i] == 0)
1034 {
1035 setInstrument(opll, i, 0);
1036 UPDATE_EG (MOD(opll,i));
1037 }
1038 }
1039 break;
1040
1041 case 0x05:
1042 opll->CustInst[5]=data;
1043 for (i = 0; i < 6; i++)
1044 {
1045 if (opll->patch_number[i] == 0)
1046 {
1047 setInstrument(opll, i, 0);
1048 UPDATE_EG(CAR(opll,i));
1049 }
1050 }
1051 break;
1052
1053 case 0x06:
1054 opll->CustInst[6]=data;
1055 for (i = 0; i < 6; i++)
1056 {
1057 if (opll->patch_number[i] == 0)
1058 {
1059 setInstrument(opll, i, 0);
1060 UPDATE_EG (MOD(opll,i));
1061 }
1062 }
1063 break;
1064
1065 case 0x07:
1066 opll->CustInst[7]=data;
1067 for (i = 0; i < 6; i++)
1068 {
1069 if (opll->patch_number[i] == 0)
1070 {
1071 setInstrument(opll, i, 0);
1072 UPDATE_EG (CAR(opll,i));
1073 }
1074 }
1075 break;
1076
1077 case 0x10:
1078 case 0x11:
1079 case 0x12:
1080 case 0x13:
1081 case 0x14:
1082 case 0x15:
1083 ch = reg - 0x10;
1084 opll->LowFreq[ch]=data;
1085 setFnumber (opll, ch, data + ((opll->HiFreq[ch] & 1) << 8));
1086 UPDATE_ALL (MOD(opll,ch));
1087 UPDATE_ALL (CAR(opll,ch));
1088 break;
1089
1090 case 0x20:
1091 case 0x21:
1092 case 0x22:
1093 case 0x23:
1094 case 0x24:
1095 case 0x25:
1096 ch = reg - 0x20;
1097 opll->HiFreq[ch]=data;
1098
1099 setFnumber (opll, ch, ((data & 1) << 8) + opll->LowFreq[ch]);
1100 setBlock (opll, ch, (data >> 1) & 7);
1101 setSustine (opll, ch, (data >> 5) & 1);
1102 if (data & 0x10)
1103 keyOn (opll, ch);
1104 else
1105 keyOff (opll, ch);
1106 UPDATE_ALL (MOD(opll,ch));
1107 UPDATE_ALL (CAR(opll,ch));
1108 update_key_status (opll);
1109 break;
1110
1111 case 0x30:
1112 case 0x31:
1113 case 0x32:
1114 case 0x33:
1115 case 0x34:
1116 case 0x35:
1117 opll->InstVol[reg-0x30]=data;
1118 i = (data >> 4) & 15;
1119 v = data & 15;
1120 setInstrument(opll, reg-0x30, i);
1121 setVolume (opll, reg - 0x30, v << 2);
1122 UPDATE_ALL (MOD(opll,reg - 0x30));
1123 UPDATE_ALL (CAR(opll,reg - 0x30));
1124 break;
1125
1126 default:
1127 break;
1128
1129 }
1130 }
1131
OPLL_writeIO(OPLL * opll,e_uint32 adr,e_uint32 val)1132 void OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1133 {
1134 if (adr & 1)
1135 OPLL_writeReg (opll, opll->adr, val);
1136 else
1137 opll->adr = val;
1138 }
1139
1140