1 // Copyright 2017 Emilie Gillet.
2 //
3 // Author: Emilie Gillet (emilie.o.gillet@gmail.com)
4 //
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
11 //
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
14 //
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
22 //
23 // See http://creativecommons.org/licenses/MIT/ for more information.
24 //
25 // -----------------------------------------------------------------------------
26 //
27 // Lightweight DAC driver used for the firmware update procedure.
28 // Initializes the I2S port as SPI, and relies on a timer for clock generation.
29
30 #include "stages/drivers/firmware_update_dac.h"
31
32 namespace stages {
33
34 /* static */
35 FirmwareUpdateDac* FirmwareUpdateDac::instance_;
36
Init(int sample_rate)37 void FirmwareUpdateDac::Init(int sample_rate) {
38 instance_ = this;
39
40 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
41 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
42 RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
43
44 // Initialize SS pin.
45 GPIO_InitTypeDef gpio_init;
46 gpio_init.GPIO_Mode = GPIO_Mode_OUT;
47 gpio_init.GPIO_OType = GPIO_OType_PP;
48 gpio_init.GPIO_Speed = GPIO_Speed_2MHz;
49 gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;
50 gpio_init.GPIO_Pin = GPIO_Pin_15;
51 GPIO_Init(GPIOA, &gpio_init);
52
53 // Initialize MOSI and SCK pins.
54 gpio_init.GPIO_Mode = GPIO_Mode_AF;
55 gpio_init.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
56 gpio_init.GPIO_OType = GPIO_OType_PP;
57 gpio_init.GPIO_Speed = GPIO_Speed_2MHz;
58 gpio_init.GPIO_PuPd = GPIO_PuPd_NOPULL;
59 GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_6);
60 GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_6);
61 GPIO_Init(GPIOC, &gpio_init);
62
63 // Initialize SPI.
64 SPI_InitTypeDef spi_init;
65 spi_init.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
66 spi_init.SPI_Mode = SPI_Mode_Master;
67 spi_init.SPI_DataSize = SPI_DataSize_16b;
68 spi_init.SPI_CPOL = SPI_CPOL_High;
69 spi_init.SPI_CPHA = SPI_CPHA_1Edge;
70 spi_init.SPI_NSS = SPI_NSS_Soft;
71 spi_init.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
72 spi_init.SPI_FirstBit = SPI_FirstBit_MSB;
73 spi_init.SPI_CRCPolynomial = 7;
74 SPI_Init(SPI3, &spi_init);
75 SPI_Cmd(SPI3, ENABLE);
76
77 // Initialize timer.
78 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
79 TIM_TimeBaseInitTypeDef timer_init;
80 timer_init.TIM_Period = F_CPU / int(sample_rate);
81 timer_init.TIM_Prescaler = 0;
82 timer_init.TIM_ClockDivision = TIM_CKD_DIV1;
83 timer_init.TIM_CounterMode = TIM_CounterMode_Up;
84 timer_init.TIM_RepetitionCounter = 0;
85 TIM_TimeBaseInit(TIM2, &timer_init);
86 TIM_Cmd(TIM2, ENABLE);
87
88 NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); // 2.2 priority split.
89 NVIC_InitTypeDef timer_interrupt;
90 timer_interrupt.NVIC_IRQChannel = TIM2_IRQn;
91 timer_interrupt.NVIC_IRQChannelPreemptionPriority = 0;
92 timer_interrupt.NVIC_IRQChannelSubPriority = 0;
93 timer_interrupt.NVIC_IRQChannelCmd = ENABLE;
94 NVIC_Init(&timer_interrupt);
95
96 GPIOA->BSRR = GPIO_Pin_15;
97 GPIOA->BRR = GPIO_Pin_15;
98 SPI3->DR = 0x090a;
99 Wait<64>();
100 SPI3->DR = 0x0000;
101 }
102
103 } // namespace stages
104
105 extern "C" {
106
TIM2_IRQHandler()107 void TIM2_IRQHandler() {
108 if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
109 TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
110 stages::FirmwareUpdateDac::GetInstance()->NextSample();
111 }
112 }
113
114 }