1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32H7xx_HAL_UART_EX_H 22 #define STM32H7xx_HAL_UART_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32h7xx_hal_def.h" 30 31 /** @addtogroup STM32H7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UARTEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART wake up from stop mode parameters 46 */ 47 typedef struct 48 { 49 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 50 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 51 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 52 be filled up. */ 53 54 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 55 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 56 57 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 58 } UART_WakeUpTypeDef; 59 60 /** 61 * @} 62 */ 63 64 /* Exported constants --------------------------------------------------------*/ 65 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 66 * @{ 67 */ 68 69 /** @defgroup UARTEx_Word_Length UARTEx Word Length 70 * @{ 71 */ 72 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 73 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 74 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 75 /** 76 * @} 77 */ 78 79 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 80 * @{ 81 */ 82 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 83 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 84 /** 85 * @} 86 */ 87 88 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 89 * @brief UART FIFO mode 90 * @{ 91 */ 92 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 93 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 94 /** 95 * @} 96 */ 97 98 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 99 * @brief UART TXFIFO threshold level 100 * @{ 101 */ 102 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 107 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 108 /** 109 * @} 110 */ 111 112 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 113 * @brief UART RXFIFO threshold level 114 * @{ 115 */ 116 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 121 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 122 /** 123 * @} 124 */ 125 126 /** 127 * @} 128 */ 129 130 /* Exported macros -----------------------------------------------------------*/ 131 /* Exported functions --------------------------------------------------------*/ 132 /** @addtogroup UARTEx_Exported_Functions 133 * @{ 134 */ 135 136 /** @addtogroup UARTEx_Exported_Functions_Group1 137 * @{ 138 */ 139 140 /* Initialization and de-initialization functions ****************************/ 141 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 142 uint32_t DeassertionTime); 143 144 /** 145 * @} 146 */ 147 148 /** @addtogroup UARTEx_Exported_Functions_Group2 149 * @{ 150 */ 151 152 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 153 154 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 155 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 156 157 /** 158 * @} 159 */ 160 161 /** @addtogroup UARTEx_Exported_Functions_Group3 162 * @{ 163 */ 164 165 /* Peripheral Control functions **********************************************/ 166 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 167 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 168 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 169 170 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 171 172 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 174 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 176 177 /** 178 * @} 179 */ 180 181 /** 182 * @} 183 */ 184 185 /* Private macros ------------------------------------------------------------*/ 186 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 187 * @{ 188 */ 189 190 /** @brief Report the UART clock source. 191 * @param __HANDLE__ specifies the UART Handle. 192 * @param __CLOCKSOURCE__ output variable. 193 * @retval UART clocking source, written in __CLOCKSOURCE__. 194 */ 195 #if defined(UART9) && defined(USART10) 196 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 197 do { \ 198 if((__HANDLE__)->Instance == USART1) \ 199 { \ 200 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 201 { \ 202 case RCC_USART1CLKSOURCE_D2PCLK2: \ 203 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 204 break; \ 205 case RCC_USART1CLKSOURCE_PLL2: \ 206 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 207 break; \ 208 case RCC_USART1CLKSOURCE_PLL3: \ 209 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 210 break; \ 211 case RCC_USART1CLKSOURCE_HSI: \ 212 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 213 break; \ 214 case RCC_USART1CLKSOURCE_CSI: \ 215 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 216 break; \ 217 case RCC_USART1CLKSOURCE_LSE: \ 218 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 219 break; \ 220 default: \ 221 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 222 break; \ 223 } \ 224 } \ 225 else if((__HANDLE__)->Instance == USART2) \ 226 { \ 227 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 228 { \ 229 case RCC_USART2CLKSOURCE_D2PCLK1: \ 230 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 231 break; \ 232 case RCC_USART2CLKSOURCE_PLL2: \ 233 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 234 break; \ 235 case RCC_USART2CLKSOURCE_PLL3: \ 236 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 237 break; \ 238 case RCC_USART2CLKSOURCE_HSI: \ 239 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 240 break; \ 241 case RCC_USART2CLKSOURCE_CSI: \ 242 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 243 break; \ 244 case RCC_USART2CLKSOURCE_LSE: \ 245 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 246 break; \ 247 default: \ 248 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 249 break; \ 250 } \ 251 } \ 252 else if((__HANDLE__)->Instance == USART3) \ 253 { \ 254 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 255 { \ 256 case RCC_USART3CLKSOURCE_D2PCLK1: \ 257 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 258 break; \ 259 case RCC_USART3CLKSOURCE_PLL2: \ 260 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 261 break; \ 262 case RCC_USART3CLKSOURCE_PLL3: \ 263 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 264 break; \ 265 case RCC_USART3CLKSOURCE_HSI: \ 266 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 267 break; \ 268 case RCC_USART3CLKSOURCE_CSI: \ 269 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 270 break; \ 271 case RCC_USART3CLKSOURCE_LSE: \ 272 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 273 break; \ 274 default: \ 275 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 276 break; \ 277 } \ 278 } \ 279 else if((__HANDLE__)->Instance == UART4) \ 280 { \ 281 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 282 { \ 283 case RCC_UART4CLKSOURCE_D2PCLK1: \ 284 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 285 break; \ 286 case RCC_UART4CLKSOURCE_PLL2: \ 287 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 288 break; \ 289 case RCC_UART4CLKSOURCE_PLL3: \ 290 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 291 break; \ 292 case RCC_UART4CLKSOURCE_HSI: \ 293 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 294 break; \ 295 case RCC_UART4CLKSOURCE_CSI: \ 296 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 297 break; \ 298 case RCC_UART4CLKSOURCE_LSE: \ 299 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 300 break; \ 301 default: \ 302 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 303 break; \ 304 } \ 305 } \ 306 else if ((__HANDLE__)->Instance == UART5) \ 307 { \ 308 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 309 { \ 310 case RCC_UART5CLKSOURCE_D2PCLK1: \ 311 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 312 break; \ 313 case RCC_UART5CLKSOURCE_PLL2: \ 314 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 315 break; \ 316 case RCC_UART5CLKSOURCE_PLL3: \ 317 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 318 break; \ 319 case RCC_UART5CLKSOURCE_HSI: \ 320 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 321 break; \ 322 case RCC_UART5CLKSOURCE_CSI: \ 323 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 324 break; \ 325 case RCC_UART5CLKSOURCE_LSE: \ 326 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 327 break; \ 328 default: \ 329 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 330 break; \ 331 } \ 332 } \ 333 else if((__HANDLE__)->Instance == USART6) \ 334 { \ 335 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 336 { \ 337 case RCC_USART6CLKSOURCE_D2PCLK2: \ 338 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 339 break; \ 340 case RCC_USART6CLKSOURCE_PLL2: \ 341 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 342 break; \ 343 case RCC_USART6CLKSOURCE_PLL3: \ 344 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 345 break; \ 346 case RCC_USART6CLKSOURCE_HSI: \ 347 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 348 break; \ 349 case RCC_USART6CLKSOURCE_CSI: \ 350 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 351 break; \ 352 case RCC_USART6CLKSOURCE_LSE: \ 353 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 354 break; \ 355 default: \ 356 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 357 break; \ 358 } \ 359 } \ 360 else if((__HANDLE__)->Instance == UART7) \ 361 { \ 362 switch(__HAL_RCC_GET_UART7_SOURCE()) \ 363 { \ 364 case RCC_UART7CLKSOURCE_D2PCLK1: \ 365 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 366 break; \ 367 case RCC_UART7CLKSOURCE_PLL2: \ 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 369 break; \ 370 case RCC_UART7CLKSOURCE_PLL3: \ 371 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 372 break; \ 373 case RCC_UART7CLKSOURCE_HSI: \ 374 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 375 break; \ 376 case RCC_UART7CLKSOURCE_CSI: \ 377 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 378 break; \ 379 case RCC_UART7CLKSOURCE_LSE: \ 380 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 381 break; \ 382 default: \ 383 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 384 break; \ 385 } \ 386 } \ 387 else if((__HANDLE__)->Instance == UART8) \ 388 { \ 389 switch(__HAL_RCC_GET_UART8_SOURCE()) \ 390 { \ 391 case RCC_UART8CLKSOURCE_D2PCLK1: \ 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 393 break; \ 394 case RCC_UART8CLKSOURCE_PLL2: \ 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 396 break; \ 397 case RCC_UART8CLKSOURCE_PLL3: \ 398 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 399 break; \ 400 case RCC_UART8CLKSOURCE_HSI: \ 401 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 402 break; \ 403 case RCC_UART8CLKSOURCE_CSI: \ 404 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 405 break; \ 406 case RCC_UART8CLKSOURCE_LSE: \ 407 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 408 break; \ 409 default: \ 410 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 411 break; \ 412 } \ 413 } \ 414 else if((__HANDLE__)->Instance == UART9) \ 415 { \ 416 switch(__HAL_RCC_GET_UART9_SOURCE()) \ 417 { \ 418 case RCC_UART9CLKSOURCE_D2PCLK2: \ 419 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 420 break; \ 421 case RCC_UART9CLKSOURCE_PLL2: \ 422 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 423 break; \ 424 case RCC_UART9CLKSOURCE_PLL3: \ 425 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 426 break; \ 427 case RCC_UART9CLKSOURCE_HSI: \ 428 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 429 break; \ 430 case RCC_UART9CLKSOURCE_CSI: \ 431 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 432 break; \ 433 case RCC_UART9CLKSOURCE_LSE: \ 434 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 435 break; \ 436 default: \ 437 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 438 break; \ 439 } \ 440 } \ 441 else if((__HANDLE__)->Instance == USART10) \ 442 { \ 443 switch(__HAL_RCC_GET_USART10_SOURCE()) \ 444 { \ 445 case RCC_USART10CLKSOURCE_D2PCLK2: \ 446 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 447 break; \ 448 case RCC_USART10CLKSOURCE_PLL2: \ 449 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 450 break; \ 451 case RCC_USART10CLKSOURCE_PLL3: \ 452 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 453 break; \ 454 case RCC_USART10CLKSOURCE_HSI: \ 455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 456 break; \ 457 case RCC_USART10CLKSOURCE_CSI: \ 458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 459 break; \ 460 case RCC_USART10CLKSOURCE_LSE: \ 461 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 462 break; \ 463 default: \ 464 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 465 break; \ 466 } \ 467 } \ 468 else if((__HANDLE__)->Instance == LPUART1) \ 469 { \ 470 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 471 { \ 472 case RCC_LPUART1CLKSOURCE_D3PCLK1: \ 473 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \ 474 break; \ 475 case RCC_LPUART1CLKSOURCE_PLL2: \ 476 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 477 break; \ 478 case RCC_LPUART1CLKSOURCE_PLL3: \ 479 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 480 break; \ 481 case RCC_LPUART1CLKSOURCE_HSI: \ 482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 483 break; \ 484 case RCC_LPUART1CLKSOURCE_CSI: \ 485 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 486 break; \ 487 case RCC_LPUART1CLKSOURCE_LSE: \ 488 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 489 break; \ 490 default: \ 491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 492 break; \ 493 } \ 494 } \ 495 else \ 496 { \ 497 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 498 } \ 499 } while(0U) 500 #else 501 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 502 do { \ 503 if((__HANDLE__)->Instance == USART1) \ 504 { \ 505 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 506 { \ 507 case RCC_USART1CLKSOURCE_D2PCLK2: \ 508 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 509 break; \ 510 case RCC_USART1CLKSOURCE_PLL2: \ 511 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 512 break; \ 513 case RCC_USART1CLKSOURCE_PLL3: \ 514 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 515 break; \ 516 case RCC_USART1CLKSOURCE_HSI: \ 517 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 518 break; \ 519 case RCC_USART1CLKSOURCE_CSI: \ 520 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 521 break; \ 522 case RCC_USART1CLKSOURCE_LSE: \ 523 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 524 break; \ 525 default: \ 526 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 527 break; \ 528 } \ 529 } \ 530 else if((__HANDLE__)->Instance == USART2) \ 531 { \ 532 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 533 { \ 534 case RCC_USART2CLKSOURCE_D2PCLK1: \ 535 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 536 break; \ 537 case RCC_USART2CLKSOURCE_PLL2: \ 538 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 539 break; \ 540 case RCC_USART2CLKSOURCE_PLL3: \ 541 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 542 break; \ 543 case RCC_USART2CLKSOURCE_HSI: \ 544 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 545 break; \ 546 case RCC_USART2CLKSOURCE_CSI: \ 547 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 548 break; \ 549 case RCC_USART2CLKSOURCE_LSE: \ 550 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 551 break; \ 552 default: \ 553 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 554 break; \ 555 } \ 556 } \ 557 else if((__HANDLE__)->Instance == USART3) \ 558 { \ 559 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 560 { \ 561 case RCC_USART3CLKSOURCE_D2PCLK1: \ 562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 563 break; \ 564 case RCC_USART3CLKSOURCE_PLL2: \ 565 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 566 break; \ 567 case RCC_USART3CLKSOURCE_PLL3: \ 568 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 569 break; \ 570 case RCC_USART3CLKSOURCE_HSI: \ 571 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 572 break; \ 573 case RCC_USART3CLKSOURCE_CSI: \ 574 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 575 break; \ 576 case RCC_USART3CLKSOURCE_LSE: \ 577 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 578 break; \ 579 default: \ 580 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 581 break; \ 582 } \ 583 } \ 584 else if((__HANDLE__)->Instance == UART4) \ 585 { \ 586 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 587 { \ 588 case RCC_UART4CLKSOURCE_D2PCLK1: \ 589 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 590 break; \ 591 case RCC_UART4CLKSOURCE_PLL2: \ 592 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 593 break; \ 594 case RCC_UART4CLKSOURCE_PLL3: \ 595 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 596 break; \ 597 case RCC_UART4CLKSOURCE_HSI: \ 598 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 599 break; \ 600 case RCC_UART4CLKSOURCE_CSI: \ 601 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 602 break; \ 603 case RCC_UART4CLKSOURCE_LSE: \ 604 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 605 break; \ 606 default: \ 607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 608 break; \ 609 } \ 610 } \ 611 else if ((__HANDLE__)->Instance == UART5) \ 612 { \ 613 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 614 { \ 615 case RCC_UART5CLKSOURCE_D2PCLK1: \ 616 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 617 break; \ 618 case RCC_UART5CLKSOURCE_PLL2: \ 619 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 620 break; \ 621 case RCC_UART5CLKSOURCE_PLL3: \ 622 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 623 break; \ 624 case RCC_UART5CLKSOURCE_HSI: \ 625 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 626 break; \ 627 case RCC_UART5CLKSOURCE_CSI: \ 628 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 629 break; \ 630 case RCC_UART5CLKSOURCE_LSE: \ 631 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 632 break; \ 633 default: \ 634 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 635 break; \ 636 } \ 637 } \ 638 else if((__HANDLE__)->Instance == USART6) \ 639 { \ 640 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 641 { \ 642 case RCC_USART6CLKSOURCE_D2PCLK2: \ 643 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \ 644 break; \ 645 case RCC_USART6CLKSOURCE_PLL2: \ 646 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 647 break; \ 648 case RCC_USART6CLKSOURCE_PLL3: \ 649 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 650 break; \ 651 case RCC_USART6CLKSOURCE_HSI: \ 652 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 653 break; \ 654 case RCC_USART6CLKSOURCE_CSI: \ 655 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 656 break; \ 657 case RCC_USART6CLKSOURCE_LSE: \ 658 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 659 break; \ 660 default: \ 661 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 662 break; \ 663 } \ 664 } \ 665 else if((__HANDLE__)->Instance == UART7) \ 666 { \ 667 switch(__HAL_RCC_GET_UART7_SOURCE()) \ 668 { \ 669 case RCC_UART7CLKSOURCE_D2PCLK1: \ 670 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 671 break; \ 672 case RCC_UART7CLKSOURCE_PLL2: \ 673 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 674 break; \ 675 case RCC_UART7CLKSOURCE_PLL3: \ 676 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 677 break; \ 678 case RCC_UART7CLKSOURCE_HSI: \ 679 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 680 break; \ 681 case RCC_UART7CLKSOURCE_CSI: \ 682 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 683 break; \ 684 case RCC_UART7CLKSOURCE_LSE: \ 685 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 686 break; \ 687 default: \ 688 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 689 break; \ 690 } \ 691 } \ 692 else if((__HANDLE__)->Instance == UART8) \ 693 { \ 694 switch(__HAL_RCC_GET_UART8_SOURCE()) \ 695 { \ 696 case RCC_UART8CLKSOURCE_D2PCLK1: \ 697 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \ 698 break; \ 699 case RCC_UART8CLKSOURCE_PLL2: \ 700 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 701 break; \ 702 case RCC_UART8CLKSOURCE_PLL3: \ 703 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 704 break; \ 705 case RCC_UART8CLKSOURCE_HSI: \ 706 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 707 break; \ 708 case RCC_UART8CLKSOURCE_CSI: \ 709 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 710 break; \ 711 case RCC_UART8CLKSOURCE_LSE: \ 712 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 713 break; \ 714 default: \ 715 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 716 break; \ 717 } \ 718 } \ 719 else if((__HANDLE__)->Instance == LPUART1) \ 720 { \ 721 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 722 { \ 723 case RCC_LPUART1CLKSOURCE_D3PCLK1: \ 724 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \ 725 break; \ 726 case RCC_LPUART1CLKSOURCE_PLL2: \ 727 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \ 728 break; \ 729 case RCC_LPUART1CLKSOURCE_PLL3: \ 730 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \ 731 break; \ 732 case RCC_LPUART1CLKSOURCE_HSI: \ 733 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 734 break; \ 735 case RCC_LPUART1CLKSOURCE_CSI: \ 736 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 737 break; \ 738 case RCC_LPUART1CLKSOURCE_LSE: \ 739 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 740 break; \ 741 default: \ 742 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 743 break; \ 744 } \ 745 } \ 746 else \ 747 { \ 748 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 749 } \ 750 } while(0U) 751 #endif /* UART9 && USART10 */ 752 753 /** @brief Report the UART mask to apply to retrieve the received data 754 * according to the word length and to the parity bits activation. 755 * @note If PCE = 1, the parity bit is not included in the data extracted 756 * by the reception API(). 757 * This masking operation is not carried out in the case of 758 * DMA transfers. 759 * @param __HANDLE__ specifies the UART Handle. 760 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 761 */ 762 #define UART_MASK_COMPUTATION(__HANDLE__) \ 763 do { \ 764 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 765 { \ 766 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 767 { \ 768 (__HANDLE__)->Mask = 0x01FFU ; \ 769 } \ 770 else \ 771 { \ 772 (__HANDLE__)->Mask = 0x00FFU ; \ 773 } \ 774 } \ 775 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 776 { \ 777 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 778 { \ 779 (__HANDLE__)->Mask = 0x00FFU ; \ 780 } \ 781 else \ 782 { \ 783 (__HANDLE__)->Mask = 0x007FU ; \ 784 } \ 785 } \ 786 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 787 { \ 788 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 789 { \ 790 (__HANDLE__)->Mask = 0x007FU ; \ 791 } \ 792 else \ 793 { \ 794 (__HANDLE__)->Mask = 0x003FU ; \ 795 } \ 796 } \ 797 else \ 798 { \ 799 (__HANDLE__)->Mask = 0x0000U; \ 800 } \ 801 } while(0U) 802 803 /** 804 * @brief Ensure that UART frame length is valid. 805 * @param __LENGTH__ UART frame length. 806 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 807 */ 808 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 809 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 810 ((__LENGTH__) == UART_WORDLENGTH_9B)) 811 812 /** 813 * @brief Ensure that UART wake-up address length is valid. 814 * @param __ADDRESS__ UART wake-up address length. 815 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 816 */ 817 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 818 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 819 820 /** 821 * @brief Ensure that UART TXFIFO threshold level is valid. 822 * @param __THRESHOLD__ UART TXFIFO threshold level. 823 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 824 */ 825 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 826 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 827 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 828 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 829 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 830 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 831 832 /** 833 * @brief Ensure that UART RXFIFO threshold level is valid. 834 * @param __THRESHOLD__ UART RXFIFO threshold level. 835 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 836 */ 837 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 838 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 839 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 840 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 841 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 842 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 843 844 /** 845 * @} 846 */ 847 848 /* Private functions ---------------------------------------------------------*/ 849 850 /** 851 * @} 852 */ 853 854 /** 855 * @} 856 */ 857 858 #ifdef __cplusplus 859 } 860 #endif 861 862 #endif /* STM32H7xx_HAL_UART_EX_H */ 863 864 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 865