1 /***********************************************************************************
2
3 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
4
5 2001 01-08 : Version 0.10 -- 1st version.
6 2001 01-15 : Version 0.20 -- semi-public version.
7 2001 01-16 : Version 0.30 -- 1st public version.
8 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
9 : Version 0.32 -- LPF implemented.
10 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
11 -- Fixed the LFO bug.
12 2001 01-24 : Version 0.35 -- Fixed the drum problem,
13 support undocumented EG behavior.
14 2001 02-02 : Version 0.38 -- Improved the performance.
15 Fixed the hi-hat and cymbal model.
16 Fixed the default percussive datas.
17 Noise reduction.
18 Fixed the feedback problem.
19 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
20 Improved the performance.
21 2001 03-04 : Version 0.40 -- Improved the feedback.
22 Change the default table size.
23 Clock and Rate can be changed during play.
24 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
25 Added VRC7 patch (OPLL_reset_patch is changed).
26 Fixed OPLL_reset() bug.
27 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
28 Added OPLL_writeIO.
29 2001 09-28 : Version 0.51 -- Removed the noise table.
30 2002 01-28 : Version 0.52 -- Added Stereo mode.
31 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
32 2002 02-20 : Version 0.54 -- Added the best quality mode.
33 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
34 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
35 2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin).
36
37 References:
38 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
39 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
40 s_opl.c -- 2001 written by Mamiya (NEZplug development).
41 fmgen.cpp -- 1999,2000 written by cisc.
42 fmpac.ill -- 2000 created by NARUTO.
43 MSX-Datapack
44 YMU757 data sheet
45 YM2143 data sheet
46
47 **************************************************************************************/
48
49 /**
50 * Additions by Maxim:
51 * - per-channel panning
52 *
53 **/
54 #include <stdio.h>
55 #include <stdlib.h>
56 #include <string.h>
57 #include <math.h>
58 #include "mamedef.h"
59 #include "emu2413.h"
60 #include "panning.h" // Maxim
61
62 /*#ifdef EMU2413_COMPACTION
63 #define OPLL_TONE_NUM 1
64 static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
65 {
66 #include "2413tone.h"
67 }
68 };
69 #else
70 #define OPLL_TONE_NUM 3
71 static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
72 {
73 #include "2413tone.h"
74 },
75 {
76 #include "vrc7tone.h"
77 },
78 {
79 #include "281btone.h"
80 }
81 };
82 #endif*/
83
84 // Note: Dump size changed to 8 per instrument, since 9-15 were unused. -VB
85 #define OPLL_TONE_NUM 1
86 static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 8] = {
87 {
88 #include "2413tone.h"
89 }
90 };
91
92 /* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */
93 #define PG_BITS 9
94 #define PG_WIDTH (1<<PG_BITS)
95
96 /* Phase increment counter */
97 #define DP_BITS 18
98 #define DP_WIDTH (1<<DP_BITS)
99 #define DP_BASE_BITS (DP_BITS - PG_BITS)
100
101 /* Dynamic range (Accuracy of sin table) */
102 #define DB_BITS 8
103 #define DB_STEP (48.0/(1<<DB_BITS))
104 #define DB_MUTE (1<<DB_BITS)
105
106 /* Dynamic range of envelope */
107 #define EG_STEP 0.375
108 #define EG_BITS 7
109 #define EG_MUTE (1<<EG_BITS)
110
111 /* Dynamic range of total level */
112 #define TL_STEP 0.75
113 #define TL_BITS 6
114 #define TL_MUTE (1<<TL_BITS)
115
116 /* Dynamic range of sustine level */
117 #define SL_STEP 3.0
118 #define SL_BITS 4
119 #define SL_MUTE (1<<SL_BITS)
120
121 #define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
122 #define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
123 #define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
124
125 #define DB_POS(x) (e_uint32)((x)/DB_STEP)
126 #define DB_NEG(x) (e_uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
127
128 /* Bits for liner value */
129 #define DB2LIN_AMP_BITS 8
130 #define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
131
132 /* Bits for envelope phase incremental counter */
133 #define EG_DP_BITS 22
134 #define EG_DP_WIDTH (1<<EG_DP_BITS)
135
136 /* Bits for Pitch and Amp modulator */
137 #define PM_PG_BITS 8
138 #define PM_PG_WIDTH (1<<PM_PG_BITS)
139 #define PM_DP_BITS 16
140 #define PM_DP_WIDTH (1<<PM_DP_BITS)
141 #define AM_PG_BITS 8
142 #define AM_PG_WIDTH (1<<AM_PG_BITS)
143 #define AM_DP_BITS 16
144 #define AM_DP_WIDTH (1<<AM_DP_BITS)
145
146 /* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
147 #define PM_AMP_BITS 8
148 #define PM_AMP (1<<PM_AMP_BITS)
149
150 /* PM speed(Hz) and depth(cent) */
151 #define PM_SPEED 6.4
152 #define PM_DEPTH 13.75
153
154 /* AM speed(Hz) and depth(dB) */
155 #define AM_SPEED 3.6413
156 #define AM_DEPTH 4.875
157
158 /* Cut the lower b bit(s) off. */
159 #define HIGHBITS(c,b) ((c)>>(b))
160
161 /* Leave the lower b bit(s). */
162 #define LOWBITS(c,b) ((c)&((1<<(b))-1))
163
164 /* Expand x which is s bits to d bits. */
165 #define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
166
167 /* Expand x which is s bits to d bits and fill expanded bits '1' */
168 #define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
169
170 /* Adjust envelope speed which depends on sampling rate. */
171 #define RATE_ADJUST(x) (rate==49716?x:(e_uint32)((double)(x)*clk/72/rate + 0.5)) /* added 0.5 to round the value*/
172
173 #define MOD(o,x) (&(o)->slot[(x)<<1])
174 #define CAR(o,x) (&(o)->slot[((x)<<1)|1])
175
176 #define BIT(s,b) (((s)>>(b))&1)
177
178 /* Input clock */
179 static e_uint32 clk = 844451141;
180 /* Sampling rate */
181 static e_uint32 rate = 3354932;
182
183 /* WaveTable for each envelope amp */
184 static e_uint16 fullsintable[PG_WIDTH];
185 static e_uint16 halfsintable[PG_WIDTH];
186
187 static e_uint16 *waveform[2] = { fullsintable, halfsintable };
188
189 /* LFO Table */
190 static e_int32 pmtable[PM_PG_WIDTH];
191 static e_int32 amtable[AM_PG_WIDTH];
192
193 /* Phase delta for LFO */
194 static e_uint32 pm_dphase;
195 static e_uint32 am_dphase;
196
197 /* dB to Liner table */
198 static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
199
200 /* Liner to Log curve conversion table (for Attack rate). */
201 static e_uint16 AR_ADJUST_TABLE[1 << EG_BITS];
202
203 /* Empty voice data */
204 static OPLL_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
205
206 /* Basic voice Data */
207 static OPLL_PATCH default_patch[OPLL_TONE_NUM][(16 + 3) * 2];
208
209 /* Definition of envelope mode */
210 enum OPLL_EG_STATE
211 { READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH };
212
213 /* Phase incr table for Attack */
214 static e_uint32 dphaseARTable[16][16];
215 /* Phase incr table for Decay and Release */
216 static e_uint32 dphaseDRTable[16][16];
217
218 /* KSL + TL Table */
219 static e_uint32 tllTable[16][8][1 << TL_BITS][4];
220 static e_int32 rksTable[2][8][2];
221
222 /* Phase incr table for PG */
223 static e_uint32 dphaseTable[512][8][16];
224
225 /***************************************************
226
227 Create tables
228
229 ****************************************************/
230 INLINE e_int32
Min(e_int32 i,e_int32 j)231 Min (e_int32 i, e_int32 j)
232 {
233 if (i < j)
234 return i;
235 else
236 return j;
237 }
238
239 /* Table for AR to LogCurve. */
240 static void
makeAdjustTable(void)241 makeAdjustTable (void)
242 {
243 e_int32 i;
244
245 AR_ADJUST_TABLE[0] = (1 << EG_BITS) - 1;
246 for (i = 1; i < (1<<EG_BITS); i++)
247 AR_ADJUST_TABLE[i] = (e_uint16) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127));
248 }
249
250
251 /* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
252 static void
makeDB2LinTable(void)253 makeDB2LinTable (void)
254 {
255 e_int32 i;
256
257 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
258 {
259 DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
260 if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
261 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]);
262 }
263 }
264
265 /* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
266 static e_int32
lin2db(double d)267 lin2db (double d)
268 {
269 if (d == 0)
270 return (DB_MUTE - 1);
271 else
272 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
273 }
274
275
276 /* Sin Table */
277 static void
makeSinTable(void)278 makeSinTable (void)
279 {
280 e_int32 i;
281
282 for (i = 0; i < PG_WIDTH / 4; i++)
283 {
284 fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
285 }
286
287 for (i = 0; i < PG_WIDTH / 4; i++)
288 {
289 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
290 }
291
292 for (i = 0; i < PG_WIDTH / 2; i++)
293 {
294 fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
295 }
296
297 for (i = 0; i < PG_WIDTH / 2; i++)
298 halfsintable[i] = fullsintable[i];
299 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
300 halfsintable[i] = fullsintable[0];
301 }
302
saw(double phase)303 static double saw(double phase)
304 {
305 if(phase <= PI/2)
306 return phase * 2 / PI ;
307 else if(phase <= PI*3/2)
308 return 2.0 - ( phase * 2 / PI );
309 else
310 return -4.0 + phase * 2 / PI;
311 }
312
313 /* Table for Pitch Modulator */
314 static void
makePmTable(void)315 makePmTable (void)
316 {
317 e_int32 i;
318
319 for (i = 0; i < PM_PG_WIDTH; i++)
320 /* pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */
321 pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200));
322 }
323
324 /* Table for Amp Modulator */
325 static void
makeAmTable(void)326 makeAmTable (void)
327 {
328 e_int32 i;
329
330 for (i = 0; i < AM_PG_WIDTH; i++)
331 /* amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */
332 amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH)));
333 }
334
335 /* Phase increment counter table */
336 static void
makeDphaseTable(void)337 makeDphaseTable (void)
338 {
339 e_uint32 fnum, block, ML;
340 e_uint32 mltable[16] =
341 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
342
343 for (fnum = 0; fnum < 512; fnum++)
344 for (block = 0; block < 8; block++)
345 for (ML = 0; ML < 16; ML++)
346 dphaseTable[fnum][block][ML] = RATE_ADJUST (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
347 }
348
349 static void
makeTllTable(void)350 makeTllTable (void)
351 {
352 #define dB2(x) ((x)*2)
353
354 static double kltable[16] = {
355 dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
356 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
357 };
358
359 e_int32 tmp;
360 e_int32 fnum, block, TL, KL;
361
362 for (fnum = 0; fnum < 16; fnum++)
363 for (block = 0; block < 8; block++)
364 for (TL = 0; TL < 64; TL++)
365 for (KL = 0; KL < 4; KL++)
366 {
367 if (KL == 0)
368 {
369 tllTable[fnum][block][TL][KL] = TL2EG (TL);
370 }
371 else
372 {
373 tmp = (e_int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
374 if (tmp <= 0)
375 tllTable[fnum][block][TL][KL] = TL2EG (TL);
376 else
377 tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
378 }
379 }
380 }
381
382 #ifdef USE_SPEC_ENV_SPEED
383 static double attacktime[16][4] = {
384 {0, 0, 0, 0},
385 {1730.15, 1400.60, 1153.43, 988.66},
386 {865.08, 700.30, 576.72, 494.33},
387 {432.54, 350.15, 288.36, 247.16},
388 {216.27, 175.07, 144.18, 123.58},
389 {108.13, 87.54, 72.09, 61.79},
390 {54.07, 43.77, 36.04, 30.90},
391 {27.03, 21.88, 18.02, 15.45},
392 {13.52, 10.94, 9.01, 7.72},
393 {6.76, 5.47, 4.51, 3.86},
394 {3.38, 2.74, 2.25, 1.93},
395 {1.69, 1.37, 1.13, 0.97},
396 {0.84, 0.70, 0.60, 0.54},
397 {0.50, 0.42, 0.34, 0.30},
398 {0.28, 0.22, 0.18, 0.14},
399 {0.00, 0.00, 0.00, 0.00}
400 };
401
402 static double decaytime[16][4] = {
403 {0, 0, 0, 0},
404 {20926.60, 16807.20, 14006.00, 12028.60},
405 {10463.30, 8403.58, 7002.98, 6014.32},
406 {5231.64, 4201.79, 3501.49, 3007.16},
407 {2615.82, 2100.89, 1750.75, 1503.58},
408 {1307.91, 1050.45, 875.37, 751.79},
409 {653.95, 525.22, 437.69, 375.90},
410 {326.98, 262.61, 218.84, 187.95},
411 {163.49, 131.31, 109.42, 93.97},
412 {81.74, 65.65, 54.71, 46.99},
413 {40.87, 32.83, 27.36, 23.49},
414 {20.44, 16.41, 13.68, 11.75},
415 {10.22, 8.21, 6.84, 5.87},
416 {5.11, 4.10, 3.42, 2.94},
417 {2.55, 2.05, 1.71, 1.47},
418 {1.27, 1.27, 1.27, 1.27}
419 };
420 #endif
421
422 /* Rate Table for Attack */
423 static void
makeDphaseARTable(void)424 makeDphaseARTable (void)
425 {
426 e_int32 AR, Rks, RM, RL;
427
428 #ifdef USE_SPEC_ENV_SPEED
429 e_uint32 attacktable[16][4];
430
431 for (RM = 0; RM < 16; RM++)
432 for (RL = 0; RL < 4; RL++)
433 {
434 if (RM == 0)
435 attacktable[RM][RL] = 0;
436 else if (RM == 15)
437 attacktable[RM][RL] = EG_DP_WIDTH;
438 else
439 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
440
441 }
442 #endif
443
444 for (AR = 0; AR < 16; AR++)
445 for (Rks = 0; Rks < 16; Rks++)
446 {
447 RM = AR + (Rks >> 2);
448 RL = Rks & 3;
449 if (RM > 15)
450 RM = 15;
451 switch (AR)
452 {
453 case 0:
454 dphaseARTable[AR][Rks] = 0;
455 break;
456 case 15:
457 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
458 break;
459 default:
460 #ifdef USE_SPEC_ENV_SPEED
461 dphaseARTable[AR][Rks] = RATE_ADJUST (attacktable[RM][RL]);
462 #else
463 dphaseARTable[AR][Rks] = RATE_ADJUST ((3 * (RL + 4) << (RM + 1)));
464 #endif
465 break;
466 }
467 }
468 }
469
470 /* Rate Table for Decay and Release */
471 static void
makeDphaseDRTable(void)472 makeDphaseDRTable (void)
473 {
474 e_int32 DR, Rks, RM, RL;
475
476 #ifdef USE_SPEC_ENV_SPEED
477 e_uint32 decaytable[16][4];
478
479 for (RM = 0; RM < 16; RM++)
480 for (RL = 0; RL < 4; RL++)
481 if (RM == 0)
482 decaytable[RM][RL] = 0;
483 else
484 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
485 #endif
486
487 for (DR = 0; DR < 16; DR++)
488 for (Rks = 0; Rks < 16; Rks++)
489 {
490 RM = DR + (Rks >> 2);
491 RL = Rks & 3;
492 if (RM > 15)
493 RM = 15;
494 switch (DR)
495 {
496 case 0:
497 dphaseDRTable[DR][Rks] = 0;
498 break;
499 default:
500 #ifdef USE_SPEC_ENV_SPEED
501 dphaseDRTable[DR][Rks] = RATE_ADJUST (decaytable[RM][RL]);
502 #else
503 dphaseDRTable[DR][Rks] = RATE_ADJUST ((RL + 4) << (RM - 1));
504 #endif
505 break;
506 }
507 }
508 }
509
510 static void
makeRksTable(void)511 makeRksTable (void)
512 {
513
514 e_int32 fnum8, block, KR;
515
516 for (fnum8 = 0; fnum8 < 2; fnum8++)
517 for (block = 0; block < 8; block++)
518 for (KR = 0; KR < 2; KR++)
519 {
520 if (KR != 0)
521 rksTable[fnum8][block][KR] = (block << 1) + fnum8;
522 else
523 rksTable[fnum8][block][KR] = block >> 1;
524 }
525 }
526
527 void
OPLL_dump2patch(const e_uint8 * dump,OPLL_PATCH * patch)528 OPLL_dump2patch (const e_uint8 * dump, OPLL_PATCH * patch)
529 {
530 patch[0].AM = (dump[0] >> 7) & 1;
531 patch[1].AM = (dump[1] >> 7) & 1;
532 patch[0].PM = (dump[0] >> 6) & 1;
533 patch[1].PM = (dump[1] >> 6) & 1;
534 patch[0].EG = (dump[0] >> 5) & 1;
535 patch[1].EG = (dump[1] >> 5) & 1;
536 patch[0].KR = (dump[0] >> 4) & 1;
537 patch[1].KR = (dump[1] >> 4) & 1;
538 patch[0].ML = (dump[0]) & 15;
539 patch[1].ML = (dump[1]) & 15;
540 patch[0].KL = (dump[2] >> 6) & 3;
541 patch[1].KL = (dump[3] >> 6) & 3;
542 patch[0].TL = (dump[2]) & 63;
543 patch[0].FB = (dump[3]) & 7;
544 patch[0].WF = (dump[3] >> 3) & 1;
545 patch[1].WF = (dump[3] >> 4) & 1;
546 patch[0].AR = (dump[4] >> 4) & 15;
547 patch[1].AR = (dump[5] >> 4) & 15;
548 patch[0].DR = (dump[4]) & 15;
549 patch[1].DR = (dump[5]) & 15;
550 patch[0].SL = (dump[6] >> 4) & 15;
551 patch[1].SL = (dump[7] >> 4) & 15;
552 patch[0].RR = (dump[6]) & 15;
553 patch[1].RR = (dump[7]) & 15;
554 }
555
556 void
OPLL_getDefaultPatch(e_int32 type,e_int32 num,OPLL_PATCH * patch)557 OPLL_getDefaultPatch (e_int32 type, e_int32 num, OPLL_PATCH * patch)
558 {
559 OPLL_dump2patch (default_inst[type] + num * 8, patch);
560 }
561
562 static void
makeDefaultPatch()563 makeDefaultPatch ()
564 {
565 e_int32 i, j;
566
567 for (i = 0; i < OPLL_TONE_NUM; i++)
568 for (j = 0; j < 19; j++)
569 OPLL_getDefaultPatch (i, j, &default_patch[i][j * 2]);
570
571 }
572
573 void
OPLL_setPatch(OPLL * opll,const e_uint8 * dump)574 OPLL_setPatch (OPLL * opll, const e_uint8 * dump)
575 {
576 OPLL_PATCH patch[2];
577 int i;
578
579 for (i = 0; i < 19; i++)
580 {
581 OPLL_dump2patch (dump + i * 8, patch);
582 memcpy (&opll->patch[i*2+0], &patch[0], sizeof (OPLL_PATCH));
583 memcpy (&opll->patch[i*2+1], &patch[1], sizeof (OPLL_PATCH));
584 }
585 }
586
587 void
OPLL_patch2dump(const OPLL_PATCH * patch,e_uint8 * dump)588 OPLL_patch2dump (const OPLL_PATCH * patch, e_uint8 * dump)
589 {
590 dump[0] = (e_uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML);
591 dump[1] = (e_uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML);
592 dump[2] = (e_uint8) ((patch[0].KL << 6) + patch[0].TL);
593 dump[3] = (e_uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB);
594 dump[4] = (e_uint8) ((patch[0].AR << 4) + patch[0].DR);
595 dump[5] = (e_uint8) ((patch[1].AR << 4) + patch[1].DR);
596 dump[6] = (e_uint8) ((patch[0].SL << 4) + patch[0].RR);
597 dump[7] = (e_uint8) ((patch[1].SL << 4) + patch[1].RR);
598 dump[8] = 0;
599 dump[9] = 0;
600 dump[10] = 0;
601 dump[11] = 0;
602 dump[12] = 0;
603 dump[13] = 0;
604 dump[14] = 0;
605 dump[15] = 0;
606 }
607
608 /************************************************************
609
610 Calc Parameters
611
612 ************************************************************/
613
614 INLINE e_uint32
calc_eg_dphase(OPLL_SLOT * slot)615 calc_eg_dphase (OPLL_SLOT * slot)
616 {
617
618 switch (slot->eg_mode)
619 {
620 case ATTACK:
621 return dphaseARTable[slot->patch->AR][slot->rks];
622
623 case DECAY:
624 return dphaseDRTable[slot->patch->DR][slot->rks];
625
626 case SUSHOLD:
627 return 0;
628
629 case SUSTINE:
630 return dphaseDRTable[slot->patch->RR][slot->rks];
631
632 case RELEASE:
633 if (slot->sustine)
634 return dphaseDRTable[5][slot->rks];
635 else if (slot->patch->EG)
636 return dphaseDRTable[slot->patch->RR][slot->rks];
637 else
638 return dphaseDRTable[7][slot->rks];
639
640 case SETTLE:
641 return dphaseDRTable[15][0];
642
643 case FINISH:
644 return 0;
645
646 default:
647 return 0;
648 }
649 }
650
651 /*************************************************************
652
653 OPLL internal interfaces
654
655 *************************************************************/
656 #define SLOT_BD1 12
657 #define SLOT_BD2 13
658 #define SLOT_HH 14
659 #define SLOT_SD 15
660 #define SLOT_TOM 16
661 #define SLOT_CYM 17
662
663 #define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML]
664 #define UPDATE_TLL(S)\
665 (((S)->type==0)?\
666 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\
667 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL]))
668 #define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR]
669 #define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch->WF]
670 #define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S)
671 #define UPDATE_ALL(S)\
672 UPDATE_PG(S);\
673 UPDATE_TLL(S);\
674 UPDATE_RKS(S);\
675 UPDATE_WF(S); \
676 UPDATE_EG(S) /* EG should be updated last. */
677
678
679 /* Slot key on */
680 INLINE void
slotOn(OPLL_SLOT * slot)681 slotOn (OPLL_SLOT * slot)
682 {
683 slot->eg_mode = ATTACK;
684 slot->eg_phase = 0;
685 slot->phase = 0;
686 UPDATE_EG(slot);
687 }
688
689 /* Slot key on without reseting the phase */
690 INLINE void
slotOn2(OPLL_SLOT * slot)691 slotOn2 (OPLL_SLOT * slot)
692 {
693 slot->eg_mode = ATTACK;
694 slot->eg_phase = 0;
695 UPDATE_EG(slot);
696 }
697
698 /* Slot key off */
699 INLINE void
slotOff(OPLL_SLOT * slot)700 slotOff (OPLL_SLOT * slot)
701 {
702 if (slot->eg_mode == ATTACK)
703 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
704 slot->eg_mode = RELEASE;
705 UPDATE_EG(slot);
706 }
707
708 /* Channel key on */
709 INLINE void
keyOn(OPLL * opll,e_int32 i)710 keyOn (OPLL * opll, e_int32 i)
711 {
712 if (!opll->slot_on_flag[i * 2])
713 slotOn (MOD(opll,i));
714 if (!opll->slot_on_flag[i * 2 + 1])
715 slotOn (CAR(opll,i));
716 opll->key_status[i] = 1;
717 }
718
719 /* Channel key off */
720 INLINE void
keyOff(OPLL * opll,e_int32 i)721 keyOff (OPLL * opll, e_int32 i)
722 {
723 if (opll->slot_on_flag[i * 2 + 1])
724 slotOff (CAR(opll,i));
725 opll->key_status[i] = 0;
726 }
727
728 INLINE void
keyOn_BD(OPLL * opll)729 keyOn_BD (OPLL * opll)
730 {
731 keyOn (opll, 6);
732 }
733 INLINE void
keyOn_SD(OPLL * opll)734 keyOn_SD (OPLL * opll)
735 {
736 if (!opll->slot_on_flag[SLOT_SD])
737 slotOn (CAR(opll,7));
738 }
739 INLINE void
keyOn_TOM(OPLL * opll)740 keyOn_TOM (OPLL * opll)
741 {
742 if (!opll->slot_on_flag[SLOT_TOM])
743 slotOn (MOD(opll,8));
744 }
745 INLINE void
keyOn_HH(OPLL * opll)746 keyOn_HH (OPLL * opll)
747 {
748 if (!opll->slot_on_flag[SLOT_HH])
749 slotOn2 (MOD(opll,7));
750 }
751 INLINE void
keyOn_CYM(OPLL * opll)752 keyOn_CYM (OPLL * opll)
753 {
754 if (!opll->slot_on_flag[SLOT_CYM])
755 slotOn2 (CAR(opll,8));
756 }
757
758 /* Drum key off */
759 INLINE void
keyOff_BD(OPLL * opll)760 keyOff_BD (OPLL * opll)
761 {
762 keyOff (opll, 6);
763 }
764 INLINE void
keyOff_SD(OPLL * opll)765 keyOff_SD (OPLL * opll)
766 {
767 if (opll->slot_on_flag[SLOT_SD])
768 slotOff (CAR(opll,7));
769 }
770 INLINE void
keyOff_TOM(OPLL * opll)771 keyOff_TOM (OPLL * opll)
772 {
773 if (opll->slot_on_flag[SLOT_TOM])
774 slotOff (MOD(opll,8));
775 }
776 INLINE void
keyOff_HH(OPLL * opll)777 keyOff_HH (OPLL * opll)
778 {
779 if (opll->slot_on_flag[SLOT_HH])
780 slotOff (MOD(opll,7));
781 }
782 INLINE void
keyOff_CYM(OPLL * opll)783 keyOff_CYM (OPLL * opll)
784 {
785 if (opll->slot_on_flag[SLOT_CYM])
786 slotOff (CAR(opll,8));
787 }
788
789 /* Change a voice */
790 INLINE void
setPatch(OPLL * opll,e_int32 i,e_int32 num)791 setPatch (OPLL * opll, e_int32 i, e_int32 num)
792 {
793 opll->patch_number[i] = num;
794 MOD(opll,i)->patch = &opll->patch[num * 2 + 0];
795 CAR(opll,i)->patch = &opll->patch[num * 2 + 1];
796 }
797
798 /* Change a rhythm voice */
799 INLINE void
setSlotPatch(OPLL_SLOT * slot,OPLL_PATCH * patch)800 setSlotPatch (OPLL_SLOT * slot, OPLL_PATCH * patch)
801 {
802 slot->patch = patch;
803 }
804
805 /* Set sustine parameter */
806 INLINE void
setSustine(OPLL * opll,e_int32 c,e_int32 sustine)807 setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
808 {
809 CAR(opll,c)->sustine = sustine;
810 if (MOD(opll,c)->type)
811 MOD(opll,c)->sustine = sustine;
812 }
813
814 /* Volume : 6bit ( Volume register << 2 ) */
815 INLINE void
setVolume(OPLL * opll,e_int32 c,e_int32 volume)816 setVolume (OPLL * opll, e_int32 c, e_int32 volume)
817 {
818 CAR(opll,c)->volume = volume;
819 }
820
821 INLINE void
setSlotVolume(OPLL_SLOT * slot,e_int32 volume)822 setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
823 {
824 slot->volume = volume;
825 }
826
827 /* Set F-Number ( fnum : 9bit ) */
828 INLINE void
setFnumber(OPLL * opll,e_int32 c,e_int32 fnum)829 setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
830 {
831 CAR(opll,c)->fnum = fnum;
832 MOD(opll,c)->fnum = fnum;
833 }
834
835 /* Set Block data (block : 3bit ) */
836 INLINE void
setBlock(OPLL * opll,e_int32 c,e_int32 block)837 setBlock (OPLL * opll, e_int32 c, e_int32 block)
838 {
839 CAR(opll,c)->block = block;
840 MOD(opll,c)->block = block;
841 }
842
843 /* Change Rhythm Mode */
844 INLINE void
update_rhythm_mode(OPLL * opll)845 update_rhythm_mode (OPLL * opll)
846 {
847 if (opll->patch_number[6] & 0x10)
848 {
849 if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 0x20)))
850 {
851 opll->slot[SLOT_BD1].eg_mode = FINISH;
852 opll->slot[SLOT_BD2].eg_mode = FINISH;
853 setPatch (opll, 6, opll->reg[0x36] >> 4);
854 }
855 }
856 else if (opll->reg[0x0e] & 0x20)
857 {
858 opll->patch_number[6] = 16;
859 opll->slot[SLOT_BD1].eg_mode = FINISH;
860 opll->slot[SLOT_BD2].eg_mode = FINISH;
861 setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]);
862 setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]);
863 }
864
865 if (opll->patch_number[7] & 0x10)
866 {
867 if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 0x20)))
868 {
869 opll->slot[SLOT_HH].type = 0;
870 opll->slot[SLOT_HH].eg_mode = FINISH;
871 opll->slot[SLOT_SD].eg_mode = FINISH;
872 setPatch (opll, 7, opll->reg[0x37] >> 4);
873 }
874 }
875 else if (opll->reg[0x0e] & 0x20)
876 {
877 opll->patch_number[7] = 17;
878 opll->slot[SLOT_HH].type = 1;
879 opll->slot[SLOT_HH].eg_mode = FINISH;
880 opll->slot[SLOT_SD].eg_mode = FINISH;
881 setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]);
882 setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]);
883 }
884
885 if (opll->patch_number[8] & 0x10)
886 {
887 if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 0x20)))
888 {
889 opll->slot[SLOT_TOM].type = 0;
890 opll->slot[SLOT_TOM].eg_mode = FINISH;
891 opll->slot[SLOT_CYM].eg_mode = FINISH;
892 setPatch (opll, 8, opll->reg[0x38] >> 4);
893 }
894 }
895 else if (opll->reg[0x0e] & 0x20)
896 {
897 opll->patch_number[8] = 18;
898 opll->slot[SLOT_TOM].type = 1;
899 opll->slot[SLOT_TOM].eg_mode = FINISH;
900 opll->slot[SLOT_CYM].eg_mode = FINISH;
901 setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]);
902 setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]);
903 }
904 }
905
906 INLINE void
update_key_status(OPLL * opll)907 update_key_status (OPLL * opll)
908 {
909 int ch;
910
911 for (ch = 0; ch < 9; ch++)
912 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10;
913
914 if (opll->reg[0x0e] & 0x20)
915 {
916 opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10);
917 opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10);
918 opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08);
919 opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01);
920 opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04);
921 opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02);
922 }
923 }
924
925 void
OPLL_copyPatch(OPLL * opll,e_int32 num,OPLL_PATCH * patch)926 OPLL_copyPatch (OPLL * opll, e_int32 num, OPLL_PATCH * patch)
927 {
928 memcpy (&opll->patch[num], patch, sizeof (OPLL_PATCH));
929 }
930
931 /***********************************************************
932
933 Initializing
934
935 ***********************************************************/
936
937 static void
OPLL_SLOT_reset(OPLL_SLOT * slot,int type)938 OPLL_SLOT_reset (OPLL_SLOT * slot, int type)
939 {
940 slot->type = type;
941 slot->sintbl = waveform[0];
942 slot->phase = 0;
943 slot->dphase = 0;
944 slot->output[0] = 0;
945 slot->output[1] = 0;
946 slot->feedback = 0;
947 slot->eg_mode = FINISH;
948 slot->eg_phase = EG_DP_WIDTH;
949 slot->eg_dphase = 0;
950 slot->rks = 0;
951 slot->tll = 0;
952 slot->sustine = 0;
953 slot->fnum = 0;
954 slot->block = 0;
955 slot->volume = 0;
956 slot->pgout = 0;
957 slot->egout = 0;
958 slot->patch = &null_patch;
959 }
960
961 static void
internal_refresh(void)962 internal_refresh (void)
963 {
964 makeDphaseTable ();
965 makeDphaseARTable ();
966 makeDphaseDRTable ();
967 pm_dphase = (e_uint32) RATE_ADJUST (PM_SPEED * PM_DP_WIDTH / (clk / 72));
968 am_dphase = (e_uint32) RATE_ADJUST (AM_SPEED * AM_DP_WIDTH / (clk / 72));
969 }
970
971 static void
maketables(e_uint32 c,e_uint32 r)972 maketables (e_uint32 c, e_uint32 r)
973 {
974 if (c != clk)
975 {
976 clk = c;
977 makePmTable ();
978 makeAmTable ();
979 makeDB2LinTable ();
980 makeAdjustTable ();
981 makeTllTable ();
982 makeRksTable ();
983 makeSinTable ();
984 makeDefaultPatch ();
985 }
986
987 if (r != rate)
988 {
989 rate = r;
990 internal_refresh ();
991 }
992 }
993
994 OPLL *
OPLL_new(e_uint32 clk,e_uint32 rate)995 OPLL_new (e_uint32 clk, e_uint32 rate)
996 {
997 OPLL *opll;
998 e_int32 i;
999
1000 maketables (clk, rate);
1001
1002 opll = (OPLL *) calloc (sizeof (OPLL), 1);
1003 if (opll == NULL)
1004 return NULL;
1005
1006 opll->vrc7_mode = 0x00;
1007
1008 for (i = 0; i < 19 * 2; i++)
1009 memcpy(&opll->patch[i],&null_patch,sizeof(OPLL_PATCH));
1010 for (i = 0; i < 14; i++)
1011 centre_panning( opll->pan[i] );
1012
1013 opll->mask = 0;
1014
1015 OPLL_reset (opll);
1016 OPLL_reset_patch (opll, 0);
1017
1018 return opll;
1019 }
1020
1021
1022 void
OPLL_delete(OPLL * opll)1023 OPLL_delete (OPLL * opll)
1024 {
1025 free (opll);
1026 }
1027
1028
1029 /* Reset patch datas by system default. */
1030 void
OPLL_reset_patch(OPLL * opll,e_int32 type)1031 OPLL_reset_patch (OPLL * opll, e_int32 type)
1032 {
1033 e_int32 i;
1034
1035 for (i = 0; i < 19 * 2; i++)
1036 OPLL_copyPatch (opll, i, &default_patch[type % OPLL_TONE_NUM][i]);
1037 }
1038
1039 /* Reset whole of OPLL except patch datas. */
1040 void
OPLL_reset(OPLL * opll)1041 OPLL_reset (OPLL * opll)
1042 {
1043 e_int32 i;
1044
1045 if (!opll)
1046 return;
1047
1048 opll->adr = 0;
1049 opll->out = 0;
1050
1051 opll->pm_phase = 0;
1052 opll->am_phase = 0;
1053
1054 opll->noise_seed = 0xffff;
1055 //opll->mask = 0;
1056
1057 for (i = 0; i <18; i++)
1058 OPLL_SLOT_reset(&opll->slot[i], i%2);
1059
1060 for (i = 0; i < 9; i++)
1061 {
1062 opll->key_status[i] = 0;
1063 setPatch (opll, i, 0);
1064 }
1065
1066 for (i = 0; i < 0x40; i++)
1067 OPLL_writeReg (opll, i, 0);
1068
1069 #ifndef EMU2413_COMPACTION
1070 opll->realstep = (e_uint32) ((1 << 31) / rate);
1071 opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72));
1072 opll->oplltime = 0;
1073 /*for (i = 0; i < 14; i++)
1074 {
1075 //centre_panning( opll->pan[i] );
1076 opll->pan[i][0] = 1.0f;
1077 opll->pan[i][1] = 1.0f;
1078 }*/
1079 opll->sprev[0] = opll->sprev[1] = 0;
1080 opll->snext[0] = opll->snext[1] = 0;
1081 #endif
1082 }
1083
1084 /* Force Refresh (When external program changes some parameters). */
1085 void
OPLL_forceRefresh(OPLL * opll)1086 OPLL_forceRefresh (OPLL * opll)
1087 {
1088 e_int32 i;
1089
1090 if (opll == NULL)
1091 return;
1092
1093 for (i = 0; i < 9; i++)
1094 setPatch(opll,i,opll->patch_number[i]);
1095
1096 for (i = 0; i < 18; i++)
1097 {
1098 UPDATE_PG (&opll->slot[i]);
1099 UPDATE_RKS (&opll->slot[i]);
1100 UPDATE_TLL (&opll->slot[i]);
1101 UPDATE_WF (&opll->slot[i]);
1102 UPDATE_EG (&opll->slot[i]);
1103 }
1104 }
1105
1106 void
OPLL_set_rate(OPLL * opll,e_uint32 r)1107 OPLL_set_rate (OPLL * opll, e_uint32 r)
1108 {
1109 if (opll->quality)
1110 rate = 49716;
1111 else
1112 rate = r;
1113 internal_refresh ();
1114 rate = r;
1115 }
1116
1117 void
OPLL_set_quality(OPLL * opll,e_uint32 q)1118 OPLL_set_quality (OPLL * opll, e_uint32 q)
1119 {
1120 opll->quality = q;
1121 OPLL_set_rate (opll, rate);
1122 }
1123
1124 /*********************************************************
1125
1126 Generate wave data
1127
1128 *********************************************************/
1129 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
1130 #if ( SLOT_AMP_BITS - PG_BITS ) > 0
1131 #define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
1132 #else
1133 #define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
1134 #endif
1135
1136 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
1137 #if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
1138 #define wave2_4pi(e) (e)
1139 #elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
1140 #define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
1141 #else
1142 #define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
1143 #endif
1144
1145 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
1146 #if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
1147 #define wave2_8pi(e) (e)
1148 #elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
1149 #define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
1150 #else
1151 #define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
1152 #endif
1153
1154 /* Update AM, PM unit */
1155 static void
update_ampm(OPLL * opll)1156 update_ampm (OPLL * opll)
1157 {
1158 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
1159 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
1160 opll->lfo_am = amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
1161 opll->lfo_pm = pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
1162 }
1163
1164 /* PG */
1165 INLINE void
calc_phase(OPLL_SLOT * slot,e_int32 lfo)1166 calc_phase (OPLL_SLOT * slot, e_int32 lfo)
1167 {
1168 if (slot->patch->PM)
1169 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
1170 else
1171 slot->phase += slot->dphase;
1172
1173 slot->phase &= (DP_WIDTH - 1);
1174
1175 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
1176 }
1177
1178 /* Update Noise unit */
1179 static void
update_noise(OPLL * opll)1180 update_noise (OPLL * opll)
1181 {
1182 if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020;
1183 opll->noise_seed >>= 1;
1184 }
1185
1186 /* EG */
1187 static void
calc_envelope(OPLL_SLOT * slot,e_int32 lfo)1188 calc_envelope (OPLL_SLOT * slot, e_int32 lfo)
1189 {
1190 #define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
1191
1192 static e_uint32 SL[16] = {
1193 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
1194 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
1195 };
1196
1197 e_uint32 egout;
1198
1199 switch (slot->eg_mode)
1200 {
1201 case ATTACK:
1202 egout = AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
1203 slot->eg_phase += slot->eg_dphase;
1204 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15))
1205 {
1206 egout = 0;
1207 slot->eg_phase = 0;
1208 slot->eg_mode = DECAY;
1209 UPDATE_EG (slot);
1210 }
1211 break;
1212
1213 case DECAY:
1214 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1215 slot->eg_phase += slot->eg_dphase;
1216 if (slot->eg_phase >= SL[slot->patch->SL])
1217 {
1218 if (slot->patch->EG)
1219 {
1220 slot->eg_phase = SL[slot->patch->SL];
1221 slot->eg_mode = SUSHOLD;
1222 UPDATE_EG (slot);
1223 }
1224 else
1225 {
1226 slot->eg_phase = SL[slot->patch->SL];
1227 slot->eg_mode = SUSTINE;
1228 UPDATE_EG (slot);
1229 }
1230 }
1231 break;
1232
1233 case SUSHOLD:
1234 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1235 if (slot->patch->EG == 0)
1236 {
1237 slot->eg_mode = SUSTINE;
1238 UPDATE_EG (slot);
1239 }
1240 break;
1241
1242 case SUSTINE:
1243 case RELEASE:
1244 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1245 slot->eg_phase += slot->eg_dphase;
1246 if (egout >= (1 << EG_BITS))
1247 {
1248 slot->eg_mode = FINISH;
1249 egout = (1 << EG_BITS) - 1;
1250 }
1251 break;
1252
1253 case SETTLE:
1254 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1255 slot->eg_phase += slot->eg_dphase;
1256 if (egout >= (1 << EG_BITS))
1257 {
1258 slot->eg_mode = ATTACK;
1259 egout = (1 << EG_BITS) - 1;
1260 UPDATE_EG(slot);
1261 }
1262 break;
1263
1264 case FINISH:
1265 egout = (1 << EG_BITS) - 1;
1266 break;
1267
1268 default:
1269 egout = (1 << EG_BITS) - 1;
1270 break;
1271 }
1272
1273 if (slot->patch->AM)
1274 egout = EG2DB (egout + slot->tll) + lfo;
1275 else
1276 egout = EG2DB (egout + slot->tll);
1277
1278 if (egout >= DB_MUTE)
1279 egout = DB_MUTE - 1;
1280
1281 slot->egout = egout | 3;
1282 }
1283
1284 /* CARRIOR */
1285 INLINE e_int32
calc_slot_car(OPLL_SLOT * slot,e_int32 fm)1286 calc_slot_car (OPLL_SLOT * slot, e_int32 fm)
1287 {
1288 if (slot->egout >= (DB_MUTE - 1))
1289 {
1290 slot->output[0] = 0;
1291 }
1292 else
1293 {
1294 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
1295 }
1296
1297 slot->output[1] = (slot->output[1] + slot->output[0]) >> 1;
1298 return slot->output[1];
1299 }
1300
1301 /* MODULATOR */
1302 INLINE e_int32
calc_slot_mod(OPLL_SLOT * slot)1303 calc_slot_mod (OPLL_SLOT * slot)
1304 {
1305 e_int32 fm;
1306
1307 slot->output[1] = slot->output[0];
1308
1309 if (slot->egout >= (DB_MUTE - 1))
1310 {
1311 slot->output[0] = 0;
1312 }
1313 else if (slot->patch->FB != 0)
1314 {
1315 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB);
1316 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout];
1317 }
1318 else
1319 {
1320 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1321 }
1322
1323 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
1324
1325 return slot->feedback;
1326
1327 }
1328
1329 /* TOM */
1330 INLINE e_int32
calc_slot_tom(OPLL_SLOT * slot)1331 calc_slot_tom (OPLL_SLOT * slot)
1332 {
1333 if (slot->egout >= (DB_MUTE - 1))
1334 return 0;
1335
1336 return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1337
1338 }
1339
1340 /* SNARE */
1341 INLINE e_int32
calc_slot_snare(OPLL_SLOT * slot,e_uint32 noise)1342 calc_slot_snare (OPLL_SLOT * slot, e_uint32 noise)
1343 {
1344 if(slot->egout>=(DB_MUTE-1))
1345 return 0;
1346
1347 if(BIT(slot->pgout,7))
1348 return DB2LIN_TABLE[(noise?DB_POS(0.0):DB_POS(15.0))+slot->egout];
1349 else
1350 return DB2LIN_TABLE[(noise?DB_NEG(0.0):DB_NEG(15.0))+slot->egout];
1351 }
1352
1353 /*
1354 TOP-CYM
1355 */
1356 INLINE e_int32
calc_slot_cym(OPLL_SLOT * slot,e_uint32 pgout_hh)1357 calc_slot_cym (OPLL_SLOT * slot, e_uint32 pgout_hh)
1358 {
1359 e_uint32 dbout;
1360
1361 if (slot->egout >= (DB_MUTE - 1))
1362 return 0;
1363 else if(
1364 /* the same as fmopl.c */
1365 ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^
1366 /* different from fmopl.c */
1367 (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5))
1368 )
1369 dbout = DB_NEG(3.0);
1370 else
1371 dbout = DB_POS(3.0);
1372
1373 return DB2LIN_TABLE[dbout + slot->egout];
1374 }
1375
1376 /*
1377 HI-HAT
1378 */
1379 INLINE e_int32
calc_slot_hat(OPLL_SLOT * slot,e_int32 pgout_cym,e_uint32 noise)1380 calc_slot_hat (OPLL_SLOT *slot, e_int32 pgout_cym, e_uint32 noise)
1381 {
1382 e_uint32 dbout;
1383
1384 if (slot->egout >= (DB_MUTE - 1))
1385 return 0;
1386 else if(
1387 /* the same as fmopl.c */
1388 ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^
1389 /* different from fmopl.c */
1390 (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5))
1391 )
1392 {
1393 if(noise)
1394 dbout = DB_NEG(12.0);
1395 else
1396 dbout = DB_NEG(24.0);
1397 }
1398 else
1399 {
1400 if(noise)
1401 dbout = DB_POS(12.0);
1402 else
1403 dbout = DB_POS(24.0);
1404 }
1405
1406 return DB2LIN_TABLE[dbout + slot->egout];
1407 }
1408
1409 static e_int16
calc(OPLL * opll)1410 calc (OPLL * opll)
1411 {
1412 e_int32 inst = 0, perc = 0, out = 0;
1413 e_int32 i;
1414
1415 update_ampm (opll);
1416 update_noise (opll);
1417
1418 for (i = 0; i < 18; i++)
1419 {
1420 calc_phase(&opll->slot[i],opll->lfo_pm);
1421 calc_envelope(&opll->slot[i],opll->lfo_am);
1422 }
1423
1424 for (i = 0; i < 6; i++)
1425 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1426 inst += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
1427
1428 if (! opll->vrc7_mode)
1429 {
1430 /* CH6 */
1431 if (opll->patch_number[6] <= 15)
1432 {
1433 if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1434 inst += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1435 }
1436 else
1437 {
1438 if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1439 perc += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1440 }
1441
1442 /* CH7 */
1443 if (opll->patch_number[7] <= 15)
1444 {
1445 if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH))
1446 inst += calc_slot_car (CAR(opll,7), calc_slot_mod(MOD(opll,7)));
1447 }
1448 else
1449 {
1450 if (!(opll->mask & OPLL_MASK_HH) && (MOD(opll,7)->eg_mode != FINISH))
1451 perc += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1452 if (!(opll->mask & OPLL_MASK_SD) && (CAR(opll,7)->eg_mode != FINISH))
1453 perc -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1);
1454 }
1455
1456 /* CH8 */
1457 if (opll->patch_number[8] <= 15)
1458 {
1459 if (!(opll->mask & OPLL_MASK_CH(8)) && (CAR(opll,8)->eg_mode != FINISH))
1460 inst += calc_slot_car (CAR(opll,8), calc_slot_mod (MOD(opll,8)));
1461 }
1462 else
1463 {
1464 if (!(opll->mask & OPLL_MASK_TOM) && (MOD(opll,8)->eg_mode != FINISH))
1465 perc += calc_slot_tom (MOD(opll,8));
1466 if (!(opll->mask & OPLL_MASK_CYM) && (CAR(opll,8)->eg_mode != FINISH))
1467 perc -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout);
1468 }
1469 } // end if (! opll->vrc7_mode)
1470
1471 out = inst + (perc << 1);
1472 return (e_int16) out;
1473 }
1474
1475 #ifdef EMU2413_COMPACTION
1476 e_int16
OPLL_calc(OPLL * opll)1477 OPLL_calc (OPLL * opll)
1478 {
1479 return calc (opll);
1480 }
1481 #else
1482 e_int16
OPLL_calc(OPLL * opll)1483 OPLL_calc (OPLL * opll)
1484 {
1485 if (!opll->quality)
1486 return calc (opll);
1487
1488 while (opll->realstep > opll->oplltime)
1489 {
1490 opll->oplltime += opll->opllstep;
1491 opll->prev = opll->next;
1492 opll->next = calc (opll);
1493 }
1494
1495 opll->oplltime -= opll->realstep;
1496 opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime)
1497 + (double) opll->prev * opll->oplltime) / opll->opllstep);
1498
1499 return (e_int16) opll->out;
1500 }
1501 #endif
1502
1503 /*e_uint32
1504 OPLL_setMask (OPLL * opll, e_uint32 mask)
1505 {
1506 e_uint32 ret;
1507
1508 if (opll)
1509 {
1510 ret = opll->mask;
1511 opll->mask = mask;
1512 return ret;
1513 }
1514 else
1515 return 0;
1516 }*/
1517
OPLL_SetMuteMask(OPLL * opll,e_uint32 MuteMask)1518 void OPLL_SetMuteMask(OPLL* opll, e_uint32 MuteMask)
1519 {
1520 unsigned char CurChn;
1521 e_uint32 ChnMsk;
1522
1523 for (CurChn = 0; CurChn < 14; CurChn ++)
1524 {
1525 if (CurChn < 9)
1526 {
1527 ChnMsk = OPLL_MASK_CH(CurChn);
1528 }
1529 else
1530 {
1531 switch(CurChn)
1532 {
1533 case 9:
1534 ChnMsk = OPLL_MASK_BD;
1535 break;
1536 case 10:
1537 ChnMsk = OPLL_MASK_SD;
1538 break;
1539 case 11:
1540 ChnMsk = OPLL_MASK_TOM;
1541 break;
1542 case 12:
1543 ChnMsk = OPLL_MASK_CYM;
1544 break;
1545 case 13:
1546 ChnMsk = OPLL_MASK_HH;
1547 break;
1548 default:
1549 ChnMsk = 0;
1550 break;
1551 }
1552 }
1553 if ((MuteMask >> CurChn) & 0x01)
1554 opll->mask |= ChnMsk;
1555 else
1556 opll->mask &= ~ChnMsk;
1557 }
1558
1559 return;
1560 }
1561
1562 /*e_uint32
1563 OPLL_toggleMask (OPLL * opll, e_uint32 mask)
1564 {
1565 e_uint32 ret;
1566
1567 if (opll)
1568 {
1569 ret = opll->mask;
1570 opll->mask ^= mask;
1571 return ret;
1572 }
1573 else
1574 return 0;
1575 }*/
1576
OPLL_SetChipMode(OPLL * opll,e_uint8 Mode)1577 void OPLL_SetChipMode(OPLL* opll, e_uint8 Mode)
1578 {
1579 // Enable/Disable VRC7 Mode (with only 6 instead of 9 channels and no rhythm part)
1580 opll->vrc7_mode = Mode;
1581
1582 return;
1583 }
1584
1585 /****************************************************
1586
1587 I/O Ctrl
1588
1589 *****************************************************/
1590
1591 void
OPLL_writeReg(OPLL * opll,e_uint32 reg,e_uint32 data)1592 OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
1593 {
1594 e_int32 i, v, ch;
1595
1596 data = data & 0xff;
1597 reg = reg & 0x3f;
1598 opll->reg[reg] = (e_uint8) data;
1599
1600 switch (reg)
1601 {
1602 case 0x00:
1603 opll->patch[0].AM = (data >> 7) & 1;
1604 opll->patch[0].PM = (data >> 6) & 1;
1605 opll->patch[0].EG = (data >> 5) & 1;
1606 opll->patch[0].KR = (data >> 4) & 1;
1607 opll->patch[0].ML = (data) & 15;
1608 for (i = 0; i < 9; i++)
1609 {
1610 if (opll->patch_number[i] == 0)
1611 {
1612 UPDATE_PG (MOD(opll,i));
1613 UPDATE_RKS (MOD(opll,i));
1614 UPDATE_EG (MOD(opll,i));
1615 }
1616 }
1617 break;
1618
1619 case 0x01:
1620 opll->patch[1].AM = (data >> 7) & 1;
1621 opll->patch[1].PM = (data >> 6) & 1;
1622 opll->patch[1].EG = (data >> 5) & 1;
1623 opll->patch[1].KR = (data >> 4) & 1;
1624 opll->patch[1].ML = (data) & 15;
1625 for (i = 0; i < 9; i++)
1626 {
1627 if (opll->patch_number[i] == 0)
1628 {
1629 UPDATE_PG (CAR(opll,i));
1630 UPDATE_RKS (CAR(opll,i));
1631 UPDATE_EG (CAR(opll,i));
1632 }
1633 }
1634 break;
1635
1636 case 0x02:
1637 opll->patch[0].KL = (data >> 6) & 3;
1638 opll->patch[0].TL = (data) & 63;
1639 for (i = 0; i < 9; i++)
1640 {
1641 if (opll->patch_number[i] == 0)
1642 {
1643 UPDATE_TLL(MOD(opll,i));
1644 }
1645 }
1646 break;
1647
1648 case 0x03:
1649 opll->patch[1].KL = (data >> 6) & 3;
1650 opll->patch[1].WF = (data >> 4) & 1;
1651 opll->patch[0].WF = (data >> 3) & 1;
1652 opll->patch[0].FB = (data) & 7;
1653 for (i = 0; i < 9; i++)
1654 {
1655 if (opll->patch_number[i] == 0)
1656 {
1657 UPDATE_WF(MOD(opll,i));
1658 UPDATE_WF(CAR(opll,i));
1659 }
1660 }
1661 break;
1662
1663 case 0x04:
1664 opll->patch[0].AR = (data >> 4) & 15;
1665 opll->patch[0].DR = (data) & 15;
1666 for (i = 0; i < 9; i++)
1667 {
1668 if (opll->patch_number[i] == 0)
1669 {
1670 UPDATE_EG (MOD(opll,i));
1671 }
1672 }
1673 break;
1674
1675 case 0x05:
1676 opll->patch[1].AR = (data >> 4) & 15;
1677 opll->patch[1].DR = (data) & 15;
1678 for (i = 0; i < 9; i++)
1679 {
1680 if (opll->patch_number[i] == 0)
1681 {
1682 UPDATE_EG(CAR(opll,i));
1683 }
1684 }
1685 break;
1686
1687 case 0x06:
1688 opll->patch[0].SL = (data >> 4) & 15;
1689 opll->patch[0].RR = (data) & 15;
1690 for (i = 0; i < 9; i++)
1691 {
1692 if (opll->patch_number[i] == 0)
1693 {
1694 UPDATE_EG (MOD(opll,i));
1695 }
1696 }
1697 break;
1698
1699 case 0x07:
1700 opll->patch[1].SL = (data >> 4) & 15;
1701 opll->patch[1].RR = (data) & 15;
1702 for (i = 0; i < 9; i++)
1703 {
1704 if (opll->patch_number[i] == 0)
1705 {
1706 UPDATE_EG (CAR(opll,i));
1707 }
1708 }
1709 break;
1710
1711 case 0x0e:
1712 if (opll->vrc7_mode)
1713 break;
1714 update_rhythm_mode (opll);
1715 if (data & 0x20)
1716 {
1717 if (data & 0x10)
1718 keyOn_BD (opll);
1719 else
1720 keyOff_BD (opll);
1721 if (data & 0x8)
1722 keyOn_SD (opll);
1723 else
1724 keyOff_SD (opll);
1725 if (data & 0x4)
1726 keyOn_TOM (opll);
1727 else
1728 keyOff_TOM (opll);
1729 if (data & 0x2)
1730 keyOn_CYM (opll);
1731 else
1732 keyOff_CYM (opll);
1733 if (data & 0x1)
1734 keyOn_HH (opll);
1735 else
1736 keyOff_HH (opll);
1737 }
1738 update_key_status (opll);
1739
1740 UPDATE_ALL (MOD(opll,6));
1741 UPDATE_ALL (CAR(opll,6));
1742 UPDATE_ALL (MOD(opll,7));
1743 UPDATE_ALL (CAR(opll,7));
1744 UPDATE_ALL (MOD(opll,8));
1745 UPDATE_ALL (CAR(opll,8));
1746
1747 break;
1748
1749 case 0x0f:
1750 break;
1751
1752 case 0x10:
1753 case 0x11:
1754 case 0x12:
1755 case 0x13:
1756 case 0x14:
1757 case 0x15:
1758 case 0x16:
1759 case 0x17:
1760 case 0x18:
1761 ch = reg - 0x10;
1762 if (opll->vrc7_mode && ch >= 6)
1763 break;
1764 setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8));
1765 UPDATE_ALL (MOD(opll,ch));
1766 UPDATE_ALL (CAR(opll,ch));
1767 break;
1768
1769 case 0x20:
1770 case 0x21:
1771 case 0x22:
1772 case 0x23:
1773 case 0x24:
1774 case 0x25:
1775 case 0x26:
1776 case 0x27:
1777 case 0x28:
1778 ch = reg - 0x20;
1779 if (opll->vrc7_mode && ch >= 6)
1780 break;
1781 setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]);
1782 setBlock (opll, ch, (data >> 1) & 7);
1783 setSustine (opll, ch, (data >> 5) & 1);
1784 if (ch < 0x06 || ! (opll->reg[0x0E] & 0x20))
1785 {
1786 // Valley Bell Fix: prevent commands 0x26-0x28 from turning
1787 // the drums (BD, SD, CYM) off
1788 if (data & 0x10)
1789 keyOn (opll, ch);
1790 else
1791 keyOff (opll, ch);
1792 }
1793 UPDATE_ALL (MOD(opll,ch));
1794 UPDATE_ALL (CAR(opll,ch));
1795 update_key_status (opll);
1796 update_rhythm_mode (opll);
1797 break;
1798
1799 case 0x30:
1800 case 0x31:
1801 case 0x32:
1802 case 0x33:
1803 case 0x34:
1804 case 0x35:
1805 case 0x36:
1806 case 0x37:
1807 case 0x38:
1808 if (opll->vrc7_mode && reg >= 0x36)
1809 break;
1810 i = (data >> 4) & 15;
1811 v = data & 15;
1812 if ((opll->reg[0x0e] & 0x20) && (reg >= 0x36))
1813 {
1814 switch (reg)
1815 {
1816 case 0x37:
1817 setSlotVolume (MOD(opll,7), i << 2);
1818 break;
1819 case 0x38:
1820 setSlotVolume (MOD(opll,8), i << 2);
1821 break;
1822 default:
1823 break;
1824 }
1825 }
1826 else
1827 {
1828 setPatch (opll, reg - 0x30, i);
1829 }
1830 setVolume (opll, reg - 0x30, v << 2);
1831 UPDATE_ALL (MOD(opll,reg - 0x30));
1832 UPDATE_ALL (CAR(opll,reg - 0x30));
1833 break;
1834
1835 default:
1836 break;
1837
1838 }
1839 }
1840
1841 void
OPLL_writeIO(OPLL * opll,e_uint32 adr,e_uint32 val)1842 OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1843 {
1844 if (adr & 1)
1845 OPLL_writeReg (opll, opll->adr, val);
1846 else
1847 opll->adr = val;
1848 }
1849
1850 #ifndef EMU2413_COMPACTION
1851 /* STEREO MODE (OPT) */
1852 void
OPLL_set_pan(OPLL * opll,e_uint32 ch,e_int32 pan)1853 OPLL_set_pan (OPLL * opll, e_uint32 ch, e_int32 pan)
1854 {
1855 e_uint32 fnl_ch;
1856
1857 if (ch >= 14)
1858 return;
1859
1860 if (ch < 9)
1861 fnl_ch = ch;
1862 else
1863 fnl_ch = 13 - (ch - 9);
1864 calc_panning( opll->pan[fnl_ch], pan ); // Maxim
1865 }
1866
1867 static void
calc_stereo(OPLL * opll,e_int32 out[2])1868 calc_stereo (OPLL * opll, e_int32 out[2])
1869 {
1870 /* Maxim: added stereo control (multiply each side by a float in opll->pan[ch][side]) */
1871 e_int32 l=0,r=0;
1872 // e_int32 b[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1873 // e_int32 r[4] = { 0, 0, 0, 0 }; /* Ignore, Right, Left, Center */
1874 e_int32 i;
1875 e_int32 channel;
1876
1877 update_ampm (opll);
1878 update_noise (opll);
1879
1880 for(i=0;i<18;i++)
1881 {
1882 calc_phase(&opll->slot[i],opll->lfo_pm);
1883 calc_envelope(&opll->slot[i],opll->lfo_am);
1884 }
1885
1886 for (i = 0; i < 6; i++)
1887 if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1888 {
1889 channel = calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i)));
1890 if ( opll->pan[i][0] == 1.0f )
1891 {
1892 l += channel;
1893 r += channel;
1894 }
1895 else
1896 {
1897 l += (e_int32)( channel * opll->pan[i][0] );
1898 r += (e_int32)( channel * opll->pan[i][1] );
1899 }
1900 }
1901
1902
1903 if (! opll->vrc7_mode)
1904 {
1905 if (opll->patch_number[6] <= 15)
1906 {
1907 if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1908 {
1909 channel = calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1910 if ( opll->pan[6][0] == 1.0f )
1911 {
1912 l += channel;
1913 r += channel;
1914 }
1915 else
1916 {
1917 l += (e_int32)( channel * opll->pan[6][0] );
1918 r += (e_int32)( channel * opll->pan[6][1] );
1919 }
1920
1921 }
1922 }
1923 else
1924 {
1925 if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1926 {
1927 channel = calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6))) << 1;
1928 if ( opll->pan[9][0] == 1.0f )
1929 {
1930 l += channel;
1931 r += channel;
1932 }
1933 else
1934 {
1935 l += (e_int32)( channel * opll->pan[9][0] );
1936 r += (e_int32)( channel * opll->pan[9][1] );
1937 }
1938 }
1939 }
1940
1941 if (opll->patch_number[7] <= 15)
1942 {
1943 if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH))
1944 {
1945 channel = calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7)));
1946 if ( opll->pan[7][0] == 1.0f )
1947 {
1948 l += channel;
1949 r += channel;
1950 }
1951 else
1952 {
1953 l += (e_int32)( channel * opll->pan[7][0] );
1954 r += (e_int32)( channel * opll->pan[7][1] );
1955 }
1956 }
1957 }
1958 else
1959 {
1960 if (!(opll->mask & OPLL_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH))
1961 {
1962 channel = calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1) << 1;
1963 if ( opll->pan[10][0] == 1.0f )
1964 {
1965 l += channel;
1966 r += channel;
1967 }
1968 else
1969 {
1970 l += (e_int32)( channel * opll->pan[10][0] );
1971 r += (e_int32)( channel * opll->pan[10][1] );
1972 }
1973 }
1974 if (!(opll->mask & OPLL_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH))
1975 {
1976 channel = -(calc_slot_snare (CAR (opll,7), opll->noise_seed&1) << 1); // this one is negated
1977 if ( opll->pan[11][0] == 1.0f )
1978 {
1979 l += channel;
1980 r += channel;
1981 }
1982 else
1983 {
1984 l += (e_int32)( channel * opll->pan[11][0] );
1985 r += (e_int32)( channel * opll->pan[11][1] );
1986 }
1987 }
1988 }
1989
1990 if (opll->patch_number[8] <= 15)
1991 {
1992 if (!(opll->mask & OPLL_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH))
1993 {
1994 channel = calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8)));
1995 if ( opll->pan[8][0] == 1.0f )
1996 {
1997 l += channel;
1998 r += channel;
1999 }
2000 else
2001 {
2002 l += (e_int32)( channel * opll->pan[8][0] );
2003 r += (e_int32)( channel * opll->pan[8][1] );
2004 }
2005 }
2006 }
2007 else
2008 {
2009 if (!(opll->mask & OPLL_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH))
2010 {
2011 channel = calc_slot_tom (MOD (opll,8)) << 1;
2012 if ( opll->pan[12][0] == 1.0f )
2013 {
2014 l += channel;
2015 r += channel;
2016 }
2017 else
2018 {
2019 l += (e_int32)( channel * opll->pan[12][0] );
2020 r += (e_int32)( channel * opll->pan[12][1] );
2021 }
2022 }
2023 if (!(opll->mask & OPLL_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH))
2024 {
2025 channel = -(calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout) << 1); // negated
2026 if ( opll->pan[13][0] == 1.0f )
2027 {
2028 l += channel;
2029 r += channel;
2030 }
2031 else
2032 {
2033 l += (e_int32)( channel * opll->pan[13][0] );
2034 r += (e_int32)( channel * opll->pan[13][1] );
2035 }
2036 }
2037 }
2038 } // end if (! opll->vrc7_mode)
2039 /*
2040 out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1)) <<3;
2041 out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1)) <<3;
2042 */
2043 out[0] = l << 3;
2044 out[1] = r << 3;
2045 }
2046
2047 /*void
2048 OPLL_calc_stereo (OPLL * opll, e_int32 out[2], samples)
2049 {
2050 if (!opll->quality)
2051 {
2052 calc_stereo (opll, out);
2053 return;
2054 }
2055
2056 while (opll->realstep > opll->oplltime)
2057 {
2058 opll->oplltime += opll->opllstep;
2059 opll->sprev[0] = opll->snext[0];
2060 opll->sprev[1] = opll->snext[1];
2061 calc_stereo (opll, opll->snext);
2062 }
2063
2064 opll->oplltime -= opll->realstep;
2065 out[0] = (e_int16) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime)
2066 + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep);
2067 out[1] = (e_int16) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime)
2068 + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep);
2069 }*/
2070 void
OPLL_calc_stereo(OPLL * opll,e_int32 ** out,e_int32 samples)2071 OPLL_calc_stereo (OPLL * opll, e_int32 **out, e_int32 samples)
2072 {
2073 e_int32 *bufMO = out[0];
2074 e_int32 *bufRO = out[1];
2075 e_int32 buffers[2];
2076
2077 int i;
2078
2079 for( i=0; i < samples ; i++ )
2080 {
2081 if (!opll->quality)
2082 {
2083 calc_stereo (opll, buffers);
2084 bufMO[i] = buffers[0];
2085 bufRO[i] = buffers[1];
2086 }
2087 else
2088 {
2089 while (opll->realstep > opll->oplltime)
2090 {
2091 opll->oplltime += opll->opllstep;
2092 opll->sprev[0] = opll->snext[0];
2093 opll->sprev[1] = opll->snext[1];
2094 calc_stereo (opll, opll->snext);
2095 }
2096
2097 opll->oplltime -= opll->realstep;
2098 bufMO[i] = (e_int32) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime)
2099 + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep);
2100 bufRO[i] = (e_int32) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime)
2101 + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep);
2102 }
2103 }
2104 }
2105 #endif /* EMU2413_COMPACTION */
2106