1 2-- Copyright (C) 2000-2002 The University of Cincinnati. 3-- All rights reserved. 4 5-- This file is part of VESTs (Vhdl tESTs). 6 7-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE 8-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE 9-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, 10-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY 11-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR 12-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. 13 14-- By using or copying this Software, Licensee agrees to abide by the 15-- intellectual property laws, and all other applicable laws of the U.S., 16-- and the terms of this license. 17 18-- You may modify, distribute, and use the software contained in this 19-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, 20-- June 1991. A copy of this license agreement can be found in the file 21-- "COPYING", distributed with this archive. 22 23-- You should have received a copy of the GNU General Public License 24-- along with VESTs; if not, write to the Free Software Foundation, 25-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 26 27-- --------------------------------------------------------------------- 28-- 29-- $Id: test125.ams,v 1.1 2002-03-27 22:11:18 paw Exp $ 30-- $Revision: 1.1 $ 31-- 32-- --------------------------------------------------------------------- 33 34-- this model tests for the correst implementation of the 'above 35-- statement. 36PACKAGE electricalSystem IS 37 NATURE electrical IS real ACROSS real THROUGH; 38 FUNCTION SIN(X : real) RETURN real; 39 alias ground is electrical'reference; 40END PACKAGE electricalSystem; 41 42use work.electricalsystem.all; 43 44entity product is 45generic(bound:real:=1.0); 46port( 47 quantity out1:real); 48end product; 49 50architecture pro of product is 51constant in1:real:=10.0; 52constant in2:real:=1.0; 53signal outofbound:out boolean; 54 55begin 56 outofbound<=true; 57 out1== in1*in2; 58 outofbound<=out1'above(1.0); 59 60end pro; 61