1 2-- Copyright (C) 2001-2002 The University of Cincinnati. 3-- All rights reserved. 4 5-- This file is part of VESTs (Vhdl tESTs). 6 7-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE 8-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE 9-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, 10-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY 11-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR 12-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. 13 14-- By using or copying this Software, Licensee agrees to abide by the 15-- intellectual property laws, and all other applicable laws of the U.S., 16-- and the terms of this license. 17 18-- You may modify, distribute, and use the software contained in this 19-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, 20-- June 1991. A copy of this license agreement can be found in the file 21-- "COPYING", distributed with this archive. 22 23-- You should have received a copy of the GNU General Public License 24-- along with VESTs; if not, write to the Free Software Foundation, 25-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 26 27-- --------------------------------------------------------------------- 28-- 29-- $Id: test144.ams,v 1.1 2002-03-27 22:11:18 paw Exp $ 30-- $Revision: 1.1 $ 31-- 32-- --------------------------------------------------------------------- 33 34------------------------------------------------------------------------- 35-- SIERRA REGRESSION TESTING MODEL 36-- Develooped at: 37-- Distriburted Processing Laboratory 38-- University of cincinnati 39-- Cincinnati 40------------------------------------------------------------------------- 41-- File : test144.ams 42-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu) 43-- Created : May 2001 44---------------------------------------------------------------------------- 45-- Description : 46----------------------------------------------------------------------------- 47-- the test checks for the correctness of the ATTRIBUTE declaration 48-- also checks function, real_vector and quantity vector declarations 49-- the integer range<> is used instead of specifying the actaul range 50-- or size of the matrix. 51-- 1 D and 2 D matrix operations are verified. 52-- the test performs the matrix dot product caluculation and also 53-- product of a 2 D matrix with a column vector. 54---------------------------------------------------------------------- 55 56PACKAGE electrical_system IS 57 58 -- declare attribute to hold units 59 ATTRIBUTE unit : string; 60 NATURE electrical IS 61 real ACROSS 62 real THROUGH; 63 NATURE electrical_vector IS ARRAY(integer range<>) OF electrical; 64 FUNCTION SIN(X : real) RETURN real; 65 FUNCTION EXP(X : real) RETURN real; 66 FUNCTION SQRT(X : real) RETURN real; 67 FUNCTION POW(X,Y : real) RETURN real; 68 NATURE real_vector IS ARRAY(integer range<>) of real; 69END PACKAGE electrical_system; 70 71PACKAGE real_aux IS 72 TYPE real_vector IS ARRAY(integer range<>) OF real; 73 TYPE real_matrix IS ARRAY(integer range<>, integer range<>) OF real; 74 75 -- scalar := (row_)vector * (column_)vector 76 77 FUNCTION "*"(v1, v2 : real_vector) RETURN real IS 78 VARIABLE result : real := 0.0; 79 BEGIN 80 ASSERT v1'range = v2'range; -- to ensure correct dot product evaluation 81 FOR i IN v1'range LOOP 82 result := result + v1(i) * v2(i); 83 END LOOP; 84 RETURN result; 85 END FUNCTION "*"; 86 87 -- (column_)vector := matrix * (column_)vector 88 89 FUNCTION "*"(m : real_matrix; v : real_vector) RETURN real_vector IS 90 VARIABLE result : real_vector(m'range(1)); 91 BEGIN 92 ASSERT m'range(2) = v'range; 93 FOR i IN result'range LOOP 94 result(i) = 0.0; 95 FOR j IN v'range LOOP 96 result(i) := result(i) + m(i,j) * v(j); 97 END LOOP; 98 END LOOP; 99 RETURN result; 100 END FUNCTION "*"; 101END PACKAGE real_aux; 102 103use work.electrical_system.all; 104-- ideal multiplier 105 106ENTITY mult IS 107 PORT (TERMINAL in1, in2, output, ref : electrical); 108END ENTITY mult; 109 110ARCHITECTURE ideal OF mult IS 111 QUANTITY vout ACROSS iout THROUGH output TO ref; 112 QUANTITY vin1 ACROSS in1 TO ref; 113 QUANTITY vin2 ACROSS in2 TO ref; 114BEGIN 115 vout == vin1 * vin2; 116END ARCHITECTURE ideal; 117 118USE work.electrical_system.all; 119USE work.real_aux.all; 120 121ENTITY xfrm IS 122 GENERIC (ml : real_matrix); -- self/mutual inductances 123 PORT (TERMINAL p, m : electrical_vector); 124END ENTITY xfrm; 125 126ARCHITECTURE one OF xfrm IS 127 QUANTITY v ACROSS i THROUGH p TO m; -- arrays! 128BEGIN 129 v == ml*real_vector(i'dot); 130END ARCHITECTURE one; 131