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5-- This file is part of VESTs (Vhdl tESTs).
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20-- June 1991. A copy of this license agreement can be found in the file
21-- "COPYING", distributed with this archive.
22
23-- You should have received a copy of the GNU General Public License
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26
27-- ---------------------------------------------------------------------
28--
29-- $Id: test141.ams,v 1.1 2002-03-27 22:11:19 paw Exp $
30-- $Revision: 1.1 $
31--
32-- ---------------------------------------------------------------------
33
34----------------------------------------------------------------------
35-- SIERRA REGRESSION TESTING MODEL
36-- Develooped at:
37-- Distriburted Processing Laboratory
38-- University of cincinnati
39-- Cincinnati
40----------------------------------------------------------------------
41-- File          : test141.ams
42-- Author(s)     : Geeta Balarkishnan(gbalakri@ececs.uc.edu)
43-- Created       : May 2001
44----------------------------------------------------------------------
45-- Description :
46-- this is the behavioral model of a simple error amplifier.
47-- the entity consists of a quatity port and the architecture consists
48-- of a simple simultaneos statement
49----------------------------------------------------------------------
50PACKAGE electricalSystem IS
51    NATURE electrical IS real ACROSS real THROUGH ground reference;
52    FUNCTION SIN(X : real) RETURN real;
53    FUNCTION EXP(X : real) RETURN real;
54    FUNCTION SQRT(X : real) RETURN real;
55    FUNCTION POW(X,Y : real) RETURN real;
56--    subtype voltage is real;
57END PACKAGE electricalSystem;
58use work.electricalSystem.all;
59
60entity ErrorAmplifier is
61  generic( Gain : REAL := 10.0 -- amplifier gain
62         );
63  port( terminal P_T,N_T: electrical; -- analog input pins
64        quantity Vout : out real      -- analog output
65      );
66end entity ErrorAmplifier;
67
68architecture Behavior of ErrorAmplifier is
69
70quantity DeltaV across P_T through N_T; -- differential input voltage
71begin
72e1:  DeltaV== 1.0* sin(2.0 * 3.141592 *10000.0 * real(time'pos(now))*1.0e-12);
73e2:  Vout == Gain*DeltaV;
74
75end architecture Behavior;
76