1 2-- Copyright (C) 2001-2002 The University of Cincinnati. 3-- All rights reserved. 4 5-- This file is part of VESTs (Vhdl tESTs). 6 7-- UC MAKES NO REPRESENTATIONS OR WARRANTIES ABOUT THE SUITABILITY OF THE 8-- SOFTWARE, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE 9-- IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, 10-- OR NON-INFRINGEMENT. UC SHALL NOT BE LIABLE FOR ANY DAMAGES SUFFERED BY 11-- LICENSEE AS A RESULT OF USING, RESULT OF USING, MODIFYING OR 12-- DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. 13 14-- By using or copying this Software, Licensee agrees to abide by the 15-- intellectual property laws, and all other applicable laws of the U.S., 16-- and the terms of this license. 17 18-- You may modify, distribute, and use the software contained in this 19-- package under the terms of the "GNU GENERAL PUBLIC LICENSE" version 2, 20-- June 1991. A copy of this license agreement can be found in the file 21-- "COPYING", distributed with this archive. 22 23-- You should have received a copy of the GNU General Public License 24-- along with VESTs; if not, write to the Free Software Foundation, 25-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 26 27-- --------------------------------------------------------------------- 28-- 29-- $Id: test161.ams,v 1.1 2002-03-27 22:11:19 paw Exp $ 30-- $Revision: 1.1 $ 31-- 32-- --------------------------------------------------------------------- 33 34---------------------------------------------------------------------- 35-- SIERRA REGRESSION TESTING MODEL 36-- Develooped at: 37-- Distriburted Processing Laboratory 38-- University of Cincinnati 39---------------------------------------------------------------------- 40-- File : test150.ams 41-- Author(s) : Geeta Balarkishnan(gbalakri@ececs.uc.edu) 42-- Created : May 2001 43---------------------------------------------------------------------- 44-- Description : 45---------------------------------------------------------------------- 46-- A simple RC model... 47-- the test is done for checking the correct implementation 48--of the simple simultaneous equation statement with 'dot expression on RHS. 49--it checks nature declaration, terminal and quantity declarations. 50 51PACKAGE electricalSystem IS 52 NATURE electrical IS real ACROSS real THROUGH; 53 FUNCTION SIN(X : real) RETURN real; 54 FUNCTION EXP(X : real) RETURN real; 55END PACKAGE electricalSystem; 56use work.electricalSystem.all; 57 58entity test is 59end entity; 60 61architecture atest of test is 62terminal T1,T2:electrical; 63quantity V1 across I1 through T1 to T2; 64quantity V2 across I2 through T2; 65quantity VS across T1; 66 67begin 68 69e1: V1 == I1*10.0; 70e2: V2 == I1'integ/1.0e-12; 71 72esource: VS == 5.0 * sin(2.0 *3.141592 *10000.0 * real(time'pos(now))*1.0e-12); 73 74end architecture atest; 75