1
2 %{
3 /*
4 * Copyright (c) 1998-2020 Stephen Williams (steve@icarus.com)
5 * Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
6 *
7 * This source code is free software; you can redistribute it
8 * and/or modify it in source code form under the terms of the GNU
9 * General Public License as published by the Free Software
10 * Foundation; either version 2 of the License, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 */
22
23 # include "config.h"
24
25 # include "parse_misc.h"
26 # include "compiler.h"
27 # include "pform.h"
28 # include "Statement.h"
29 # include "PSpec.h"
30 # include <stack>
31 # include <cstring>
32 # include <sstream>
33
34 class PSpecPath;
35
36 extern void lex_end_table();
37
38 static list<pform_range_t>* param_active_range = 0;
39 static bool param_active_signed = false;
40 static ivl_variable_type_t param_active_type = IVL_VT_LOGIC;
41
42 /* Port declaration lists use this structure for context. */
43 static struct {
44 NetNet::Type port_net_type;
45 NetNet::PortType port_type;
46 data_type_t* data_type;
47 } port_declaration_context = {NetNet::NONE, NetNet::NOT_A_PORT, 0};
48
49 /* Modport port declaration lists use this structure for context. */
50 enum modport_port_type_t { MP_NONE, MP_SIMPLE, MP_TF, MP_CLOCKING };
51 static struct {
52 modport_port_type_t type;
53 union {
54 NetNet::PortType direction;
55 bool is_import;
56 };
57 } last_modport_port = { MP_NONE, {NetNet::NOT_A_PORT}};
58
59 /* The task and function rules need to briefly hold the pointer to the
60 task/function that is currently in progress. */
61 static PTask* current_task = 0;
62 static PFunction* current_function = 0;
63 static stack<PBlock*> current_block_stack;
64
65 /* The variable declaration rules need to know if a lifetime has been
66 specified. */
67 static LexicalScope::lifetime_t var_lifetime;
68
pform_create_this(void)69 static pform_name_t* pform_create_this(void)
70 {
71 name_component_t name (perm_string::literal("@"));
72 pform_name_t*res = new pform_name_t;
73 res->push_back(name);
74 return res;
75 }
76
pform_create_super(void)77 static pform_name_t* pform_create_super(void)
78 {
79 name_component_t name (perm_string::literal("#"));
80 pform_name_t*res = new pform_name_t;
81 res->push_back(name);
82 return res;
83 }
84
85 /* This is used to keep track of the extra arguments after the notifier
86 * in the $setuphold and $recrem timing checks. This allows us to print
87 * a warning message that the delayed signals will not be created. We
88 * need to do this since not driving these signals creates real
89 * simulation issues. */
90 static unsigned args_after_notifier;
91
92 /* The rules sometimes push attributes into a global context where
93 sub-rules may grab them. This makes parser rules a little easier to
94 write in some cases. */
95 static list<named_pexpr_t>*attributes_in_context = 0;
96
97 /* Later version of bison (including 1.35) will not compile in stack
98 extension if the output is compiled with C++ and either the YYSTYPE
99 or YYLTYPE are provided by the source code. However, I can get the
100 old behavior back by defining these symbols. */
101 # define YYSTYPE_IS_TRIVIAL 1
102 # define YYLTYPE_IS_TRIVIAL 1
103
104 /* Recent version of bison expect that the user supply a
105 YYLLOC_DEFAULT macro that makes up a yylloc value from existing
106 values. I need to supply an explicit version to account for the
107 text field, that otherwise won't be copied.
108
109 The YYLLOC_DEFAULT blends the file range for the tokens of Rhs
110 rule, which has N tokens.
111 */
112 # define YYLLOC_DEFAULT(Current, Rhs, N) do { \
113 if (N) { \
114 (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
115 (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
116 (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
117 (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
118 (Current).text = YYRHSLOC (Rhs, 1).text; \
119 } else { \
120 (Current).first_line = YYRHSLOC (Rhs, 0).last_line; \
121 (Current).first_column = YYRHSLOC (Rhs, 0).last_column; \
122 (Current).last_line = YYRHSLOC (Rhs, 0).last_line; \
123 (Current).last_column = YYRHSLOC (Rhs, 0).last_column; \
124 (Current).text = YYRHSLOC (Rhs, 0).text; \
125 } \
126 } while (0)
127
128 /*
129 * These are some common strength pairs that are used as defaults when
130 * the user is not otherwise specific.
131 */
132 static const struct str_pair_t pull_strength = { IVL_DR_PULL, IVL_DR_PULL };
133 static const struct str_pair_t str_strength = { IVL_DR_STRONG, IVL_DR_STRONG };
134
make_port_list(char * id,list<pform_range_t> * udims,PExpr * expr)135 static list<pform_port_t>* make_port_list(char*id, list<pform_range_t>*udims, PExpr*expr)
136 {
137 list<pform_port_t>*tmp = new list<pform_port_t>;
138 tmp->push_back(pform_port_t(lex_strings.make(id), udims, expr));
139 delete[]id;
140 return tmp;
141 }
make_port_list(list<pform_port_t> * tmp,char * id,list<pform_range_t> * udims,PExpr * expr)142 static list<pform_port_t>* make_port_list(list<pform_port_t>*tmp,
143 char*id, list<pform_range_t>*udims, PExpr*expr)
144 {
145 tmp->push_back(pform_port_t(lex_strings.make(id), udims, expr));
146 delete[]id;
147 return tmp;
148 }
149
make_range_from_width(uint64_t wid)150 list<pform_range_t>* make_range_from_width(uint64_t wid)
151 {
152 pform_range_t range;
153 range.first = new PENumber(new verinum(wid-1, integer_width));
154 range.second = new PENumber(new verinum((uint64_t)0, integer_width));
155
156 list<pform_range_t>*rlist = new list<pform_range_t>;
157 rlist->push_back(range);
158 return rlist;
159 }
160
list_from_identifier(char * id)161 static list<perm_string>* list_from_identifier(char*id)
162 {
163 list<perm_string>*tmp = new list<perm_string>;
164 tmp->push_back(lex_strings.make(id));
165 delete[]id;
166 return tmp;
167 }
168
list_from_identifier(list<perm_string> * tmp,char * id)169 static list<perm_string>* list_from_identifier(list<perm_string>*tmp, char*id)
170 {
171 tmp->push_back(lex_strings.make(id));
172 delete[]id;
173 return tmp;
174 }
175
copy_range(list<pform_range_t> * orig)176 list<pform_range_t>* copy_range(list<pform_range_t>* orig)
177 {
178 list<pform_range_t>*copy = 0;
179
180 if (orig)
181 copy = new list<pform_range_t> (*orig);
182
183 return copy;
184 }
185
append(vector<T> & out,const vector<T> & in)186 template <class T> void append(vector<T>&out, const vector<T>&in)
187 {
188 for (size_t idx = 0 ; idx < in.size() ; idx += 1)
189 out.push_back(in[idx]);
190 }
191
192 /*
193 * Look at the list and pull null pointers off the end.
194 */
strip_tail_items(list<PExpr * > * lst)195 static void strip_tail_items(list<PExpr*>*lst)
196 {
197 while (! lst->empty()) {
198 if (lst->back() != 0)
199 return;
200 lst->pop_back();
201 }
202 }
203
204 /*
205 * This is a shorthand for making a PECallFunction that takes a single
206 * arg. This is used by some of the code that detects built-ins.
207 */
make_call_function(perm_string tn,PExpr * arg)208 static PECallFunction*make_call_function(perm_string tn, PExpr*arg)
209 {
210 vector<PExpr*> parms(1);
211 parms[0] = arg;
212 PECallFunction*tmp = new PECallFunction(tn, parms);
213 return tmp;
214 }
215
make_call_function(perm_string tn,PExpr * arg1,PExpr * arg2)216 static PECallFunction*make_call_function(perm_string tn, PExpr*arg1, PExpr*arg2)
217 {
218 vector<PExpr*> parms(2);
219 parms[0] = arg1;
220 parms[1] = arg2;
221 PECallFunction*tmp = new PECallFunction(tn, parms);
222 return tmp;
223 }
224
225 static list<named_pexpr_t>* make_named_numbers(perm_string name, long first, long last, PExpr*val =0)
226 {
227 list<named_pexpr_t>*lst = new list<named_pexpr_t>;
228 named_pexpr_t tmp;
229 // We are counting up.
230 if (first <= last) {
231 for (long idx = first ; idx <= last ; idx += 1) {
232 ostringstream buf;
233 buf << name.str() << idx << ends;
234 tmp.name = lex_strings.make(buf.str());
235 tmp.parm = val;
236 val = 0;
237 lst->push_back(tmp);
238 }
239 // We are counting down.
240 } else {
241 for (long idx = first ; idx >= last ; idx -= 1) {
242 ostringstream buf;
243 buf << name.str() << idx << ends;
244 tmp.name = lex_strings.make(buf.str());
245 tmp.parm = val;
246 val = 0;
247 lst->push_back(tmp);
248 }
249 }
250 return lst;
251 }
252
253 static list<named_pexpr_t>* make_named_number(perm_string name, PExpr*val =0)
254 {
255 list<named_pexpr_t>*lst = new list<named_pexpr_t>;
256 named_pexpr_t tmp;
257 tmp.name = name;
258 tmp.parm = val;
259 lst->push_back(tmp);
260 return lst;
261 }
262
check_enum_seq_value(const YYLTYPE & loc,verinum * arg,bool zero_ok)263 static long check_enum_seq_value(const YYLTYPE&loc, verinum *arg, bool zero_ok)
264 {
265 long value = 1;
266 // We can never have an undefined value in an enumeration name
267 // declaration sequence.
268 if (! arg->is_defined()) {
269 yyerror(loc, "error: undefined value used in enum name sequence.");
270 // We can never have a negative value in an enumeration name
271 // declaration sequence.
272 } else if (arg->is_negative()) {
273 yyerror(loc, "error: negative value used in enum name sequence.");
274 } else {
275 value = arg->as_ulong();
276 // We cannot have a zero enumeration name declaration count.
277 if (! zero_ok && (value == 0)) {
278 yyerror(loc, "error: zero count used in enum name sequence.");
279 value = 1;
280 }
281 }
282 return value;
283 }
284
current_task_set_statement(const YYLTYPE & loc,vector<Statement * > * s)285 static void current_task_set_statement(const YYLTYPE&loc, vector<Statement*>*s)
286 {
287 if (s == 0) {
288 /* if the statement list is null, then the parser
289 detected the case that there are no statements in the
290 task. If this is SystemVerilog, handle it as an
291 an empty block. */
292 if (!gn_system_verilog()) {
293 yyerror(loc, "error: Support for empty tasks requires SystemVerilog.");
294 }
295 PBlock*tmp = new PBlock(PBlock::BL_SEQ);
296 FILE_NAME(tmp, loc);
297 current_task->set_statement(tmp);
298 return;
299 }
300 assert(s);
301
302 /* An empty vector represents one or more null statements. Handle
303 this as a simple null statement. */
304 if (s->empty())
305 return;
306
307 /* A vector of 1 is handled as a simple statement. */
308 if (s->size() == 1) {
309 current_task->set_statement((*s)[0]);
310 return;
311 }
312
313 if (!gn_system_verilog()) {
314 yyerror(loc, "error: Task body with multiple statements requires SystemVerilog.");
315 }
316
317 PBlock*tmp = new PBlock(PBlock::BL_SEQ);
318 FILE_NAME(tmp, loc);
319 tmp->set_statement(*s);
320 current_task->set_statement(tmp);
321 }
322
current_function_set_statement(const YYLTYPE & loc,vector<Statement * > * s)323 static void current_function_set_statement(const YYLTYPE&loc, vector<Statement*>*s)
324 {
325 if (s == 0) {
326 /* if the statement list is null, then the parser
327 detected the case that there are no statements in the
328 task. If this is SystemVerilog, handle it as an
329 an empty block. */
330 if (!gn_system_verilog()) {
331 yyerror(loc, "error: Support for empty functions requires SystemVerilog.");
332 }
333 PBlock*tmp = new PBlock(PBlock::BL_SEQ);
334 FILE_NAME(tmp, loc);
335 current_function->set_statement(tmp);
336 return;
337 }
338 assert(s);
339
340 /* An empty vector represents one or more null statements. Handle
341 this as a simple null statement. */
342 if (s->empty())
343 return;
344
345 /* A vector of 1 is handled as a simple statement. */
346 if (s->size() == 1) {
347 current_function->set_statement((*s)[0]);
348 return;
349 }
350
351 if (!gn_system_verilog()) {
352 yyerror(loc, "error: Function body with multiple statements requires SystemVerilog.");
353 }
354
355 PBlock*tmp = new PBlock(PBlock::BL_SEQ);
356 FILE_NAME(tmp, loc);
357 tmp->set_statement(*s);
358 current_function->set_statement(tmp);
359 }
360
361 %}
362
363 %union {
364 bool flag;
365
366 char letter;
367 int int_val;
368
369 /* text items are C strings allocated by the lexor using
370 strdup. They can be put into lists with the texts type. */
371 char*text;
372 list<perm_string>*perm_strings;
373
374 list<pform_port_t>*port_list;
375
376 vector<pform_tf_port_t>* tf_ports;
377
378 pform_name_t*pform_name;
379
380 ivl_discipline_t discipline;
381
382 hname_t*hier;
383
384 list<string>*strings;
385
386 struct str_pair_t drive;
387
388 PCase::Item*citem;
389 svector<PCase::Item*>*citems;
390
391 lgate*gate;
392 svector<lgate>*gates;
393
394 Module::port_t *mport;
395 LexicalScope::range_t* value_range;
396 vector<Module::port_t*>*mports;
397
398 named_number_t* named_number;
399 list<named_number_t>* named_numbers;
400
401 named_pexpr_t*named_pexpr;
402 list<named_pexpr_t>*named_pexprs;
403 struct parmvalue_t*parmvalue;
404 list<pform_range_t>*ranges;
405
406 PExpr*expr;
407 list<PExpr*>*exprs;
408
409 svector<PEEvent*>*event_expr;
410
411 ivl_case_quality_t case_quality;
412 NetNet::Type nettype;
413 PGBuiltin::Type gatetype;
414 NetNet::PortType porttype;
415 ivl_variable_type_t vartype;
416 PBlock::BL_TYPE join_keyword;
417
418 PWire*wire;
419 vector<PWire*>*wires;
420
421 PEventStatement*event_statement;
422 Statement*statement;
423 vector<Statement*>*statement_list;
424
425 net_decl_assign_t*net_decl_assign;
426 enum_type_t*enum_type;
427
428 decl_assignment_t*decl_assignment;
429 list<decl_assignment_t*>*decl_assignments;
430
431 struct_member_t*struct_member;
432 list<struct_member_t*>*struct_members;
433 struct_type_t*struct_type;
434
435 data_type_t*data_type;
436 class_type_t*class_type;
437 real_type_t::type_t real_type;
438 property_qualifier_t property_qualifier;
439 PPackage*package;
440
441 struct {
442 char*text;
443 data_type_t*type;
444 } type_identifier;
445
446 struct {
447 data_type_t*type;
448 list<PExpr*>*exprs;
449 } class_declaration_extends;
450
451 struct {
452 char*text;
453 PExpr*expr;
454 } genvar_iter;
455
456 verinum* number;
457
458 verireal* realtime;
459
460 PSpecPath* specpath;
461 list<index_component_t> *dimensions;
462
463 LexicalScope::lifetime_t lifetime;
464 };
465
466 %token <text> IDENTIFIER SYSTEM_IDENTIFIER STRING TIME_LITERAL
467 %token <type_identifier> TYPE_IDENTIFIER
468 %token <package> PACKAGE_IDENTIFIER
469 %token <discipline> DISCIPLINE_IDENTIFIER
470 %token <text> PATHPULSE_IDENTIFIER
471 %token <number> BASED_NUMBER DEC_NUMBER UNBASED_NUMBER
472 %token <realtime> REALTIME
473 %token K_PLUS_EQ K_MINUS_EQ K_INCR K_DECR
474 %token K_LE K_GE K_EG K_EQ K_NE K_CEQ K_CNE K_WEQ K_WNE K_LP K_LS K_RS K_RSS K_SG
475 /* K_CONTRIBUTE is <+, the contribution assign. */
476 %token K_CONTRIBUTE
477 %token K_PO_POS K_PO_NEG K_POW
478 %token K_PSTAR K_STARP K_DOTSTAR
479 %token K_LOR K_LAND K_NAND K_NOR K_NXOR K_TRIGGER K_LEQUIV
480 %token K_SCOPE_RES
481 %token K_edge_descriptor
482
483 /* The base tokens from 1364-1995. */
484 %token K_always K_and K_assign K_begin K_buf K_bufif0 K_bufif1 K_case
485 %token K_casex K_casez K_cmos K_deassign K_default K_defparam K_disable
486 %token K_edge K_else K_end K_endcase K_endfunction K_endmodule
487 %token K_endprimitive K_endspecify K_endtable K_endtask K_event K_for
488 %token K_force K_forever K_fork K_function K_highz0 K_highz1 K_if
489 %token K_ifnone K_initial K_inout K_input K_integer K_join K_large
490 %token K_macromodule K_medium K_module K_nand K_negedge K_nmos K_nor
491 %token K_not K_notif0 K_notif1 K_or K_output K_parameter K_pmos K_posedge
492 %token K_primitive K_pull0 K_pull1 K_pulldown K_pullup K_rcmos K_real
493 %token K_realtime K_reg K_release K_repeat K_rnmos K_rpmos K_rtran
494 %token K_rtranif0 K_rtranif1 K_scalared K_small K_specify K_specparam
495 %token K_strong0 K_strong1 K_supply0 K_supply1 K_table K_task K_time
496 %token K_tran K_tranif0 K_tranif1 K_tri K_tri0 K_tri1 K_triand K_trior
497 %token K_trireg K_vectored K_wait K_wand K_weak0 K_weak1 K_while K_wire
498 %token K_wor K_xnor K_xor
499
500 %token K_Shold K_Snochange K_Speriod K_Srecovery K_Ssetup K_Ssetuphold
501 %token K_Sskew K_Swidth
502
503 /* Icarus specific tokens. */
504 %token KK_attribute K_bool K_logic
505
506 /* The new tokens from 1364-2001. */
507 %token K_automatic K_endgenerate K_generate K_genvar K_localparam
508 %token K_noshowcancelled K_pulsestyle_onevent K_pulsestyle_ondetect
509 %token K_showcancelled K_signed K_unsigned
510
511 %token K_Sfullskew K_Srecrem K_Sremoval K_Stimeskew
512
513 /* The 1364-2001 configuration tokens. */
514 %token K_cell K_config K_design K_endconfig K_incdir K_include K_instance
515 %token K_liblist K_library K_use
516
517 /* The new tokens from 1364-2005. */
518 %token K_wone K_uwire
519
520 /* The new tokens from 1800-2005. */
521 %token K_alias K_always_comb K_always_ff K_always_latch K_assert
522 %token K_assume K_before K_bind K_bins K_binsof K_bit K_break K_byte
523 %token K_chandle K_class K_clocking K_const K_constraint K_context
524 %token K_continue K_cover K_covergroup K_coverpoint K_cross K_dist K_do
525 %token K_endclass K_endclocking K_endgroup K_endinterface K_endpackage
526 %token K_endprogram K_endproperty K_endsequence K_enum K_expect K_export
527 %token K_extends K_extern K_final K_first_match K_foreach K_forkjoin
528 %token K_iff K_ignore_bins K_illegal_bins K_import K_inside K_int
529 /* Icarus already has defined "logic" above! */
530 %token K_interface K_intersect K_join_any K_join_none K_local
531 %token K_longint K_matches K_modport K_new K_null K_package K_packed
532 %token K_priority K_program K_property K_protected K_pure K_rand K_randc
533 %token K_randcase K_randsequence K_ref K_return K_sequence K_shortint
534 %token K_shortreal K_solve K_static K_string K_struct K_super
535 %token K_tagged K_this K_throughout K_timeprecision K_timeunit K_type
536 %token K_typedef K_union K_unique K_var K_virtual K_void K_wait_order
537 %token K_wildcard K_with K_within
538
539 /* The new tokens from 1800-2009. */
540 %token K_accept_on K_checker K_endchecker K_eventually K_global K_implies
541 %token K_let K_nexttime K_reject_on K_restrict K_s_always K_s_eventually
542 %token K_s_nexttime K_s_until K_s_until_with K_strong K_sync_accept_on
543 %token K_sync_reject_on K_unique0 K_until K_until_with K_untyped K_weak
544
545 /* The new tokens from 1800-2012. */
546 %token K_implements K_interconnect K_nettype K_soft
547
548 /* The new tokens for Verilog-AMS 2.3. */
549 %token K_above K_abs K_absdelay K_abstol K_access K_acos K_acosh
550 /* 1800-2005 has defined "assert" above! */
551 %token K_ac_stim K_aliasparam K_analog K_analysis K_asin K_asinh
552 %token K_atan K_atan2 K_atanh K_branch K_ceil K_connect K_connectmodule
553 %token K_connectrules K_continuous K_cos K_cosh K_ddt K_ddt_nature K_ddx
554 %token K_discipline K_discrete K_domain K_driver_update K_endconnectrules
555 %token K_enddiscipline K_endnature K_endparamset K_exclude K_exp
556 %token K_final_step K_flicker_noise K_floor K_flow K_from K_ground
557 %token K_hypot K_idt K_idtmod K_idt_nature K_inf K_initial_step
558 %token K_laplace_nd K_laplace_np K_laplace_zd K_laplace_zp
559 %token K_last_crossing K_limexp K_ln K_log K_max K_merged K_min K_nature
560 %token K_net_resolution K_noise_table K_paramset K_potential K_pow
561 /* 1800-2005 has defined "string" above! */
562 %token K_resolveto K_sin K_sinh K_slew K_split K_sqrt K_tan K_tanh
563 %token K_timer K_transition K_units K_white_noise K_wreal
564 %token K_zi_nd K_zi_np K_zi_zd K_zi_zp
565
566 %type <flag> from_exclude block_item_decls_opt
567 %type <number> number pos_neg_number
568 %type <flag> signing unsigned_signed_opt signed_unsigned_opt
569 %type <flag> import_export
570 %type <flag> K_genvar_opt K_packed_opt K_reg_opt K_static_opt K_virtual_opt
571 %type <flag> udp_reg_opt edge_operator
572 %type <drive> drive_strength drive_strength_opt dr_strength0 dr_strength1
573 %type <letter> udp_input_sym udp_output_sym
574 %type <text> udp_input_list udp_sequ_entry udp_comb_entry
575 %type <perm_strings> udp_input_declaration_list
576 %type <strings> udp_entry_list udp_comb_entry_list udp_sequ_entry_list
577 %type <strings> udp_body
578 %type <perm_strings> udp_port_list
579 %type <wires> udp_port_decl udp_port_decls
580 %type <statement> udp_initial udp_init_opt
581 %type <expr> udp_initial_expr_opt
582
583 %type <text> register_variable net_variable event_variable endlabel_opt class_declaration_endlabel_opt
584 %type <text> block_identifier_opt
585 %type <perm_strings> register_variable_list net_variable_list event_variable_list
586 %type <perm_strings> list_of_identifiers loop_variables
587 %type <port_list> list_of_port_identifiers list_of_variable_port_identifiers
588
589 %type <net_decl_assign> net_decl_assign net_decl_assigns
590
591 %type <mport> port port_opt port_reference port_reference_list
592 %type <mport> port_declaration
593 %type <mports> list_of_ports module_port_list_opt list_of_port_declarations module_attribute_foreign
594 %type <value_range> parameter_value_range parameter_value_ranges
595 %type <value_range> parameter_value_ranges_opt
596 %type <expr> tf_port_item_expr_opt value_range_expression
597
598 %type <named_pexprs> enum_name_list enum_name
599 %type <enum_type> enum_data_type
600
601 %type <tf_ports> function_item function_item_list function_item_list_opt
602 %type <tf_ports> task_item task_item_list task_item_list_opt
603 %type <tf_ports> tf_port_declaration tf_port_item tf_port_item_list tf_port_list tf_port_list_opt
604
605 %type <named_pexpr> modport_simple_port port_name parameter_value_byname
606 %type <named_pexprs> port_name_list parameter_value_byname_list
607 %type <exprs> port_conn_expression_list_with_nuls
608
609 %type <named_pexpr> attribute
610 %type <named_pexprs> attribute_list attribute_instance_list attribute_list_opt
611
612 %type <citem> case_item
613 %type <citems> case_items
614
615 %type <gate> gate_instance
616 %type <gates> gate_instance_list
617
618 %type <pform_name> hierarchy_identifier implicit_class_handle
619 %type <expr> assignment_pattern expression expr_mintypmax
620 %type <expr> expr_primary_or_typename expr_primary
621 %type <expr> class_new dynamic_array_new
622 %type <expr> inc_or_dec_expression inside_expression lpvalue
623 %type <expr> branch_probe_expression streaming_concatenation
624 %type <expr> delay_value delay_value_simple
625 %type <exprs> delay1 delay3 delay3_opt delay_value_list
626 %type <exprs> expression_list_with_nuls expression_list_proper
627 %type <exprs> cont_assign cont_assign_list
628
629 %type <decl_assignment> variable_decl_assignment
630 %type <decl_assignments> list_of_variable_decl_assignments
631
632 %type <data_type> data_type data_type_or_implicit data_type_or_implicit_or_void
633 %type <data_type> simple_type_or_string
634 %type <class_type> class_identifier
635 %type <struct_member> struct_union_member
636 %type <struct_members> struct_union_member_list
637 %type <struct_type> struct_data_type
638
639 %type <class_declaration_extends> class_declaration_extends_opt
640
641 %type <property_qualifier> class_item_qualifier property_qualifier
642 %type <property_qualifier> class_item_qualifier_list property_qualifier_list
643 %type <property_qualifier> class_item_qualifier_opt property_qualifier_opt
644 %type <property_qualifier> random_qualifier
645
646 %type <ranges> variable_dimension
647 %type <ranges> dimensions_opt dimensions
648
649 %type <nettype> net_type net_type_opt
650 %type <gatetype> gatetype switchtype
651 %type <porttype> port_direction port_direction_opt
652 %type <vartype> bit_logic bit_logic_opt
653 %type <vartype> integer_vector_type
654 %type <parmvalue> parameter_value_opt
655
656 %type <event_expr> event_expression_list
657 %type <event_expr> event_expression
658 %type <event_statement> event_control
659 %type <statement> statement statement_item statement_or_null
660 %type <statement> compressed_statement
661 %type <statement> loop_statement for_step jump_statement
662 %type <statement> concurrent_assertion_statement
663 %type <statement> deferred_immediate_assertion_statement
664 %type <statement> simple_immediate_assertion_statement
665 %type <statement> procedural_assertion_statement
666 %type <statement_list> statement_or_null_list statement_or_null_list_opt
667
668 %type <statement> analog_statement
669
670 %type <join_keyword> join_keyword
671
672 %type <letter> spec_polarity
673 %type <perm_strings> specify_path_identifiers
674
675 %type <specpath> specify_simple_path specify_simple_path_decl
676 %type <specpath> specify_edge_path specify_edge_path_decl
677
678 %type <real_type> non_integer_type
679 %type <int_val> assert_or_assume
680 %type <int_val> deferred_mode
681 %type <int_val> atom2_type
682 %type <int_val> module_start module_end
683
684 %type <lifetime> lifetime lifetime_opt
685
686 %type <case_quality> unique_priority
687
688 %type <genvar_iter> genvar_iteration
689
690 %token K_TAND
691 %nonassoc K_PLUS_EQ K_MINUS_EQ K_MUL_EQ K_DIV_EQ K_MOD_EQ K_AND_EQ K_OR_EQ
692 %nonassoc K_XOR_EQ K_LS_EQ K_RS_EQ K_RSS_EQ
693 %right K_TRIGGER K_LEQUIV
694 %right '?' ':' K_inside
695 %left K_LOR
696 %left K_LAND
697 %left '|'
698 %left '^' K_NXOR K_NOR
699 %left '&' K_NAND
700 %left K_EQ K_NE K_CEQ K_CNE K_WEQ K_WNE
701 %left K_GE K_LE '<' '>'
702 %left K_LS K_RS K_RSS
703 %left '+' '-'
704 %left '*' '/' '%'
705 %left K_POW
706 %left UNARY_PREC
707
708
709 /* to resolve dangling else ambiguity. */
710 %nonassoc less_than_K_else
711 %nonassoc K_else
712
713 /* to resolve exclude (... ambiguity */
714 %nonassoc '('
715 %nonassoc K_exclude
716
717 /* to resolve timeunits declaration/redeclaration ambiguity */
718 %nonassoc no_timeunits_declaration
719 %nonassoc one_timeunits_declaration
720 %nonassoc K_timeunit K_timeprecision
721
722 %%
723
724
725 /* IEEE1800-2005: A.1.2 */
726 /* source_text ::= [ timeunits_declaration ] { description } */
727 source_text
728 : timeunits_declaration_opt
729 { pform_set_scope_timescale(yyloc); }
730 description_list
731 | /* empty */
732 ;
733
734 assert_or_assume
735 : K_assert
736 { $$ = 1; } /* IEEE1800-2012: Table 20-7 */
737 | K_assume
738 { $$ = 4; } /* IEEE1800-2012: Table 20-7 */
739 ;
740
741 assertion_item /* IEEE1800-2012: A.6.10 */
742 : concurrent_assertion_item
743 | deferred_immediate_assertion_item
744 ;
745
746 assignment_pattern /* IEEE1800-2005: A.6.7.1 */
747 : K_LP expression_list_proper '}'
748 { PEAssignPattern*tmp = new PEAssignPattern(*$2);
749 FILE_NAME(tmp, @1);
750 delete $2;
751 $$ = tmp;
752 }
753 | K_LP '}'
754 { PEAssignPattern*tmp = new PEAssignPattern;
755 FILE_NAME(tmp, @1);
756 $$ = tmp;
757 }
758 ;
759
760 /* Some rules have a ... [ block_identifier ':' ] ... part. This
761 implements it in a LALR way. */
762 block_identifier_opt /* */
763 : IDENTIFIER ':'
764 { $$ = $1; }
765 |
766 { $$ = 0; }
767 ;
768
769 class_declaration /* IEEE1800-2005: A.1.2 */
770 : K_virtual_opt K_class lifetime_opt class_identifier class_declaration_extends_opt ';'
771 { pform_start_class_declaration(@2, $4, $5.type, $5.exprs, $3); }
772 class_items_opt K_endclass
773 { // Process a class.
774 pform_end_class_declaration(@9);
775 }
776 class_declaration_endlabel_opt
777 { // Wrap up the class.
778 if ($11 && $4 && $4->name != $11) {
779 yyerror(@11, "error: Class end label doesn't match class name.");
780 delete[]$11;
781 }
782 }
783 ;
784
785 class_constraint /* IEEE1800-2005: A.1.8 */
786 : constraint_prototype
787 | constraint_declaration
788 ;
789
790 class_identifier
791 : IDENTIFIER
792 { // Create a synthetic typedef for the class name so that the
793 // lexor detects the name as a type.
794 perm_string name = lex_strings.make($1);
795 class_type_t*tmp = new class_type_t(name);
796 FILE_NAME(tmp, @1);
797 pform_set_typedef(name, tmp, NULL);
798 delete[]$1;
799 $$ = tmp;
800 }
801 | TYPE_IDENTIFIER
802 { class_type_t*tmp = dynamic_cast<class_type_t*>($1.type);
803 if (tmp == 0) {
804 yyerror(@1, "Type name \"%s\"is not a predeclared class name.", $1.text);
805 }
806 delete[]$1.text;
807 $$ = tmp;
808 }
809 ;
810
811 /* The endlabel after a class declaration is a little tricky because
812 the class name is detected by the lexor as a TYPE_IDENTIFIER if it
813 does indeed match a name. */
814 class_declaration_endlabel_opt
815 : ':' TYPE_IDENTIFIER
816 { class_type_t*tmp = dynamic_cast<class_type_t*> ($2.type);
817 if (tmp == 0) {
818 yyerror(@2, "error: class declaration endlabel \"%s\" is not a class name\n", $2.text);
819 $$ = 0;
820 } else {
821 $$ = strdupnew(tmp->name.str());
822 }
823 delete[]$2.text;
824 }
825 | ':' IDENTIFIER
826 { $$ = $2; }
827 |
828 { $$ = 0; }
829 ;
830
831 /* This rule implements [ extends class_type ] in the
832 class_declaration. It is not a rule of its own in the LRM.
833
834 Note that for this to be correct, the identifier after the
835 extends keyword must be a class name. Therefore, match
836 TYPE_IDENTIFIER instead of IDENTIFIER, and this rule will return
837 a data_type. */
838
839 class_declaration_extends_opt /* IEEE1800-2005: A.1.2 */
840 : K_extends TYPE_IDENTIFIER
841 { pform_set_type_referenced(@2, $2.text);
842 $$.type = $2.type;
843 $$.exprs= 0;
844 delete[]$2.text;
845 }
846 | K_extends TYPE_IDENTIFIER '(' expression_list_with_nuls ')'
847 { pform_set_type_referenced(@2, $2.text);
848 $$.type = $2.type;
849 $$.exprs = $4;
850 delete[]$2.text;
851 }
852 |
853 { $$.type = 0; $$.exprs = 0; }
854 ;
855
856 /* The class_items_opt and class_items rules together implement the
857 rule snippet { class_item } (zero or more class_item) of the
858 class_declaration. */
859 class_items_opt /* IEEE1800-2005: A.1.2 */
860 : class_items
861 |
862 ;
863
864 class_items /* IEEE1800-2005: A.1.2 */
865 : class_items class_item
866 | class_item
867 ;
868
869 class_item /* IEEE1800-2005: A.1.8 */
870
871 /* IEEE1800 A.1.8: class_constructor_declaration */
872 : method_qualifier_opt K_function K_new
873 { assert(current_function==0);
874 current_function = pform_push_constructor_scope(@3);
875 }
876 '(' tf_port_list_opt ')' ';'
877 function_item_list_opt
878 statement_or_null_list_opt
879 K_endfunction endnew_opt
880 { current_function->set_ports($6);
881 pform_set_constructor_return(current_function);
882 pform_set_this_class(@3, current_function);
883 current_function_set_statement(@3, $10);
884 pform_pop_scope();
885 current_function = 0;
886 }
887
888 /* IEEE1800-2017: A.1.9 Class items: Class properties... */
889
890 | property_qualifier_opt data_type list_of_variable_decl_assignments ';'
891 { pform_class_property(@2, $1, $2, $3); }
892
893 | K_const class_item_qualifier_opt data_type list_of_variable_decl_assignments ';'
894 { pform_class_property(@1, $2 | property_qualifier_t::make_const(), $3, $4); }
895
896 /* IEEEE1800-2017: A.1.9 Class items: class_item ::= { property_qualifier} data_declaration */
897
898 | property_qualifier_opt K_typedef data_type IDENTIFIER dimensions_opt ';'
899 { perm_string name = lex_strings.make($4);
900 delete[]$4;
901 pform_set_typedef(name, $3, $5);
902 }
903
904 /* IEEE1800-1017: A.1.9 Class items: Class methods... */
905
906 | method_qualifier_opt task_declaration
907 { /* The task_declaration rule puts this into the class */ }
908
909 | method_qualifier_opt function_declaration
910 { /* The function_declaration rule puts this into the class */ }
911
912 /* External class method definitions... */
913
914 | K_extern method_qualifier_opt K_function K_new ';'
915 { yyerror(@1, "sorry: External constructors are not yet supported."); }
916 | K_extern method_qualifier_opt K_function K_new '(' tf_port_list_opt ')' ';'
917 { yyerror(@1, "sorry: External constructors are not yet supported."); }
918 | K_extern method_qualifier_opt K_function data_type_or_implicit_or_void
919 IDENTIFIER ';'
920 { yyerror(@1, "sorry: External methods are not yet supported.");
921 delete[] $5;
922 }
923 | K_extern method_qualifier_opt K_function data_type_or_implicit_or_void
924 IDENTIFIER '(' tf_port_list_opt ')' ';'
925 { yyerror(@1, "sorry: External methods are not yet supported.");
926 delete[] $5;
927 }
928 | K_extern method_qualifier_opt K_task IDENTIFIER ';'
929 { yyerror(@1, "sorry: External methods are not yet supported.");
930 delete[] $4;
931 }
932 | K_extern method_qualifier_opt K_task IDENTIFIER '(' tf_port_list_opt ')' ';'
933 { yyerror(@1, "sorry: External methods are not yet supported.");
934 delete[] $4;
935 }
936
937 /* Class constraints... */
938
939 | class_constraint
940
941 /* Here are some error matching rules to help recover from various
942 syntax errors within a class declaration. */
943
944 | property_qualifier_opt data_type error ';'
945 { yyerror(@3, "error: Errors in variable names after data type.");
946 yyerrok;
947 }
948
949 | property_qualifier_opt IDENTIFIER error ';'
950 { yyerror(@3, "error: %s doesn't name a type.", $2);
951 yyerrok;
952 }
953
954 | method_qualifier_opt K_function K_new error K_endfunction endnew_opt
955 { yyerror(@1, "error: I give up on this class constructor declaration.");
956 yyerrok;
957 }
958
959 | error ';'
960 { yyerror(@2, "error: invalid class item.");
961 yyerrok;
962 }
963
964 ;
965
966 class_item_qualifier /* IEEE1800-2005 A.1.8 */
967 : K_static { $$ = property_qualifier_t::make_static(); }
968 | K_protected { $$ = property_qualifier_t::make_protected(); }
969 | K_local { $$ = property_qualifier_t::make_local(); }
970 ;
971
972 class_item_qualifier_list
973 : class_item_qualifier_list class_item_qualifier { $$ = $1 | $2; }
974 | class_item_qualifier { $$ = $1; }
975 ;
976
977 class_item_qualifier_opt
978 : class_item_qualifier_list { $$ = $1; }
979 | { $$ = property_qualifier_t::make_none(); }
980 ;
981
982 class_new /* IEEE1800-2005 A.2.4 */
983 : K_new '(' expression_list_with_nuls ')'
984 { list<PExpr*>*expr_list = $3;
985 strip_tail_items(expr_list);
986 PENewClass*tmp = new PENewClass(*expr_list);
987 FILE_NAME(tmp, @1);
988 delete $3;
989 $$ = tmp;
990 }
991 | K_new hierarchy_identifier
992 { PEIdent*tmpi = new PEIdent(*$2);
993 FILE_NAME(tmpi, @2);
994 PENewCopy*tmp = new PENewCopy(tmpi);
995 FILE_NAME(tmp, @1);
996 delete $2;
997 $$ = tmp;
998 }
999 | K_new
1000 { PENewClass*tmp = new PENewClass;
1001 FILE_NAME(tmp, @1);
1002 $$ = tmp;
1003 }
1004 ;
1005
1006 /* The concurrent_assertion_item pulls together the
1007 concurrent_assertion_statement and checker_instantiation rules. */
1008
1009 concurrent_assertion_item /* IEEE1800-2012 A.2.10 */
1010 : block_identifier_opt concurrent_assertion_statement
1011 { delete $1;
1012 delete $2;
1013 }
1014 ;
1015
1016 concurrent_assertion_statement /* IEEE1800-2012 A.2.10 */
1017 : assert_or_assume K_property '(' property_spec ')' statement_or_null %prec less_than_K_else
1018 { /* */
1019 if (gn_unsupported_assertions_flag) {
1020 yyerror(@1, "sorry: concurrent_assertion_item not supported."
1021 " Try -gno-assertions or -gsupported-assertions"
1022 " to turn this message off.");
1023 }
1024 $$ = 0;
1025 }
1026 | assert_or_assume K_property '(' property_spec ')' K_else statement_or_null
1027 { /* */
1028 if (gn_unsupported_assertions_flag) {
1029 yyerror(@1, "sorry: concurrent_assertion_item not supported."
1030 " Try -gno-assertions or -gsupported-assertions"
1031 " to turn this message off.");
1032 }
1033 $$ = 0;
1034 }
1035 | assert_or_assume K_property '(' property_spec ')' statement_or_null K_else statement_or_null
1036 { /* */
1037 if (gn_unsupported_assertions_flag) {
1038 yyerror(@1, "sorry: concurrent_assertion_item not supported."
1039 " Try -gno-assertions or -gsupported-assertions"
1040 " to turn this message off.");
1041 }
1042 $$ = 0;
1043 }
1044 | K_cover K_property '(' property_spec ')' statement_or_null
1045 { /* */
1046 if (gn_unsupported_assertions_flag) {
1047 yyerror(@1, "sorry: concurrent_assertion_item not supported."
1048 " Try -gno-assertions or -gsupported-assertions"
1049 " to turn this message off.");
1050 }
1051 $$ = 0;
1052 }
1053 /* For now, cheat, and use property_spec for the sequence specification.
1054 They are syntactically identical. */
1055 | K_cover K_sequence '(' property_spec ')' statement_or_null
1056 { /* */
1057 if (gn_unsupported_assertions_flag) {
1058 yyerror(@1, "sorry: concurrent_assertion_item not supported."
1059 " Try -gno-assertions or -gsupported-assertions"
1060 " to turn this message off.");
1061 }
1062 $$ = 0;
1063 }
1064 | K_restrict K_property '(' property_spec ')' ';'
1065 { /* */
1066 if (gn_unsupported_assertions_flag) {
1067 yyerror(@2, "sorry: concurrent_assertion_item not supported."
1068 " Try -gno-assertions or -gsupported-assertions"
1069 " to turn this message off.");
1070 }
1071 $$ = 0;
1072 }
1073 | assert_or_assume K_property '(' error ')' statement_or_null %prec less_than_K_else
1074 { yyerrok;
1075 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1076 $$ = 0;
1077 }
1078 | assert_or_assume K_property '(' error ')' K_else statement_or_null
1079 { yyerrok;
1080 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1081 $$ = 0;
1082 }
1083 | assert_or_assume K_property '(' error ')' statement_or_null K_else statement_or_null
1084 { yyerrok;
1085 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1086 $$ = 0;
1087 }
1088 | K_cover K_property '(' error ')' statement_or_null
1089 { yyerrok;
1090 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1091 $$ = 0;
1092 }
1093 | K_cover K_sequence '(' error ')' statement_or_null
1094 { yyerrok;
1095 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1096 $$ = 0;
1097 }
1098 | K_restrict K_property '(' error ')' ';'
1099 { yyerrok;
1100 yyerror(@2, "error: Error in property_spec of concurrent assertion item.");
1101 $$ = 0;
1102 }
1103 ;
1104
1105 constraint_block_item /* IEEE1800-2005 A.1.9 */
1106 : constraint_expression
1107 ;
1108
1109 constraint_block_item_list
1110 : constraint_block_item_list constraint_block_item
1111 | constraint_block_item
1112 ;
1113
1114 constraint_block_item_list_opt
1115 :
1116 | constraint_block_item_list
1117 ;
1118
1119 constraint_declaration /* IEEE1800-2005: A.1.9 */
1120 : K_static_opt K_constraint IDENTIFIER '{' constraint_block_item_list_opt '}'
1121 { yyerror(@2, "sorry: Constraint declarations not supported."); }
1122
1123 /* Error handling rules... */
1124
1125 | K_static_opt K_constraint IDENTIFIER '{' error '}'
1126 { yyerror(@4, "error: Errors in the constraint block item list."); }
1127 ;
1128
1129 constraint_expression /* IEEE1800-2005 A.1.9 */
1130 : expression ';'
1131 | expression K_dist '{' '}' ';'
1132 | expression K_TRIGGER constraint_set
1133 | K_if '(' expression ')' constraint_set %prec less_than_K_else
1134 | K_if '(' expression ')' constraint_set K_else constraint_set
1135 | K_foreach '(' IDENTIFIER '[' loop_variables ']' ')' constraint_set
1136 ;
1137
1138 constraint_expression_list /* */
1139 : constraint_expression_list constraint_expression
1140 | constraint_expression
1141 ;
1142
1143 constraint_prototype /* IEEE1800-2005: A.1.9 */
1144 : K_static_opt K_constraint IDENTIFIER ';'
1145 { yyerror(@2, "sorry: Constraint prototypes not supported."); }
1146 ;
1147
1148 constraint_set /* IEEE1800-2005 A.1.9 */
1149 : constraint_expression
1150 | '{' constraint_expression_list '}'
1151 ;
1152
1153 data_declaration /* IEEE1800-2005: A.2.1.3 */
1154 : attribute_list_opt data_type_or_implicit list_of_variable_decl_assignments ';'
1155 { data_type_t*data_type = $2;
1156 if (data_type == 0) {
1157 data_type = new vector_type_t(IVL_VT_LOGIC, false, 0);
1158 FILE_NAME(data_type, @2);
1159 }
1160 pform_makewire(@2, 0, str_strength, $3, NetNet::IMPLICIT_REG, data_type);
1161 }
1162 | attribute_list_opt K_event event_variable_list ';'
1163 { if ($3) pform_make_events($3, @2.text, @2.first_line);
1164 }
1165 | attribute_list_opt package_import_declaration
1166 ;
1167
1168 data_type /* IEEE1800-2005: A.2.2.1 */
1169 : integer_vector_type unsigned_signed_opt dimensions_opt
1170 { ivl_variable_type_t use_vtype = $1;
1171 bool reg_flag = false;
1172 if (use_vtype == IVL_VT_NO_TYPE) {
1173 use_vtype = IVL_VT_LOGIC;
1174 reg_flag = true;
1175 }
1176 vector_type_t*tmp = new vector_type_t(use_vtype, $2, $3);
1177 tmp->reg_flag = reg_flag;
1178 FILE_NAME(tmp, @1);
1179 $$ = tmp;
1180 }
1181 | non_integer_type
1182 { real_type_t*tmp = new real_type_t($1);
1183 FILE_NAME(tmp, @1);
1184 $$ = tmp;
1185 }
1186 | struct_data_type
1187 { if (!$1->packed_flag) {
1188 yyerror(@1, "sorry: Unpacked structs not supported.");
1189 }
1190 $$ = $1;
1191 }
1192 | enum_data_type
1193 { $$ = $1; }
1194 | atom2_type signed_unsigned_opt
1195 { atom2_type_t*tmp = new atom2_type_t($1, $2);
1196 FILE_NAME(tmp, @1);
1197 $$ = tmp;
1198 }
1199 | K_integer signed_unsigned_opt
1200 { list<pform_range_t>*pd = make_range_from_width(integer_width);
1201 vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, $2, pd);
1202 tmp->reg_flag = true;
1203 tmp->integer_flag = true;
1204 $$ = tmp;
1205 }
1206 | K_time unsigned_signed_opt
1207 { list<pform_range_t>*pd = make_range_from_width(64);
1208 vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, $2, pd);
1209 tmp->reg_flag = !gn_system_verilog();
1210 $$ = tmp;
1211 }
1212 | TYPE_IDENTIFIER dimensions_opt
1213 { pform_set_type_referenced(@1, $1.text);
1214 if ($2) {
1215 parray_type_t*tmp = new parray_type_t($1.type, $2);
1216 FILE_NAME(tmp, @1);
1217 $$ = tmp;
1218 } else $$ = $1.type;
1219 delete[]$1.text;
1220 }
1221 | PACKAGE_IDENTIFIER K_SCOPE_RES
1222 { lex_in_package_scope($1); }
1223 TYPE_IDENTIFIER
1224 { lex_in_package_scope(0);
1225 $$ = $4.type;
1226 delete[]$4.text;
1227 }
1228 | K_string
1229 { string_type_t*tmp = new string_type_t;
1230 FILE_NAME(tmp, @1);
1231 $$ = tmp;
1232 }
1233 ;
1234
1235 /* The data_type_or_implicit rule is a little more complex then the
1236 rule documented in the IEEE format syntax in order to allow for
1237 signaling the special case that the data_type is completely
1238 absent. The context may need that information to decide to resort
1239 to left context. */
1240
1241 data_type_or_implicit /* IEEE1800-2005: A.2.2.1 */
1242 : data_type
1243 { $$ = $1; }
1244 | signing dimensions_opt
1245 { vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, $1, $2);
1246 tmp->implicit_flag = true;
1247 FILE_NAME(tmp, @1);
1248 $$ = tmp;
1249 }
1250 | dimensions
1251 { vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, false, $1);
1252 tmp->implicit_flag = true;
1253 FILE_NAME(tmp, @1);
1254 $$ = tmp;
1255 }
1256 |
1257 { $$ = 0; }
1258 ;
1259
1260
1261 data_type_or_implicit_or_void
1262 : data_type_or_implicit
1263 { $$ = $1; }
1264 | K_void
1265 { void_type_t*tmp = new void_type_t;
1266 FILE_NAME(tmp, @1);
1267 $$ = tmp;
1268 }
1269 ;
1270
1271 deferred_immediate_assertion_item /* IEEE1800-2012: A.6.10 */
1272 : block_identifier_opt deferred_immediate_assertion_statement
1273 { delete $1;
1274 delete $2;
1275 }
1276 ;
1277
1278 deferred_immediate_assertion_statement /* IEEE1800-2012 A.6.10 */
1279 : assert_or_assume deferred_mode '(' expression ')' statement_or_null %prec less_than_K_else
1280 {
1281 if (gn_unsupported_assertions_flag) {
1282 yyerror(@1, "sorry: Deferred assertions are not supported."
1283 " Try -gno-assertions or -gsupported-assertions"
1284 " to turn this message off.");
1285 }
1286 delete $4;
1287 delete $6;
1288 $$ = 0;
1289 }
1290 | assert_or_assume deferred_mode '(' expression ')' K_else statement_or_null
1291 {
1292 if (gn_unsupported_assertions_flag) {
1293 yyerror(@1, "sorry: Deferred assertions are not supported."
1294 " Try -gno-assertions or -gsupported-assertions"
1295 " to turn this message off.");
1296 }
1297 delete $4;
1298 delete $7;
1299 $$ = 0;
1300 }
1301 | assert_or_assume deferred_mode '(' expression ')' statement_or_null K_else statement_or_null
1302 {
1303 if (gn_unsupported_assertions_flag) {
1304 yyerror(@1, "sorry: Deferred assertions are not supported."
1305 " Try -gno-assertions or -gsupported-assertions"
1306 " to turn this message off.");
1307 }
1308 delete $4;
1309 delete $6;
1310 delete $8;
1311 $$ = 0;
1312 }
1313 | K_cover deferred_mode '(' expression ')' statement_or_null
1314 {
1315 /* Coverage collection is not currently supported. */
1316 delete $4;
1317 delete $6;
1318 $$ = 0;
1319 }
1320 | assert_or_assume deferred_mode '(' error ')' statement_or_null %prec less_than_K_else
1321 { yyerror(@1, "error: Malformed conditional expression.");
1322 $$ = $6;
1323 }
1324 | assert_or_assume deferred_mode '(' error ')' K_else statement_or_null
1325 { yyerror(@1, "error: Malformed conditional expression.");
1326 $$ = $7;
1327 }
1328 | assert_or_assume deferred_mode '(' error ')' statement_or_null K_else statement_or_null
1329 { yyerror(@1, "error: Malformed conditional expression.");
1330 $$ = $6;
1331 }
1332 | K_cover deferred_mode '(' error ')' statement_or_null
1333 { yyerror(@1, "error: Malformed conditional expression.");
1334 $$ = $6;
1335 }
1336 ;
1337
1338 deferred_mode
1339 : '#' DEC_NUMBER
1340 { if (!$2->is_zero()) {
1341 yyerror(@2, "error: Delay value must be zero for deferred assertion.");
1342 }
1343 delete $2;
1344 $$ = 0; }
1345 | K_final
1346 { $$ = 1; }
1347 ;
1348
1349 /* NOTE: The "module" rule of the description combines the
1350 module_declaration, program_declaration, and interface_declaration
1351 rules from the standard description. */
1352
1353 description /* IEEE1800-2005: A.1.2 */
1354 : module
1355 | udp_primitive
1356 | config_declaration
1357 | nature_declaration
1358 | package_declaration
1359 | discipline_declaration
1360 | package_item
1361 | KK_attribute '(' IDENTIFIER ',' STRING ',' STRING ')'
1362 { perm_string tmp3 = lex_strings.make($3);
1363 pform_set_type_attrib(tmp3, $5, $7);
1364 delete[] $3;
1365 delete[] $5;
1366 }
1367 ;
1368
1369 description_list
1370 : description
1371 | description_list description
1372 ;
1373
1374
1375 /* This implements the [ : IDENTIFIER ] part of the constructor
1376 rule documented in IEEE1800-2005: A.1.8 */
1377 endnew_opt : ':' K_new | ;
1378
1379 /* The dynamic_array_new rule is kinda like an expression, but it is
1380 treated differently by rules that use this "expression". Watch out! */
1381
1382 dynamic_array_new /* IEEE1800-2005: A.2.4 */
1383 : K_new '[' expression ']'
1384 { $$ = new PENewArray($3, 0);
1385 FILE_NAME($$, @1);
1386 }
1387 | K_new '[' expression ']' '(' expression ')'
1388 { $$ = new PENewArray($3, $6);
1389 FILE_NAME($$, @1);
1390 }
1391 ;
1392
1393 for_step /* IEEE1800-2005: A.6.8 */
1394 : lpvalue '=' expression
1395 { PAssign*tmp = new PAssign($1,$3);
1396 FILE_NAME(tmp, @1);
1397 $$ = tmp;
1398 }
1399 | inc_or_dec_expression
1400 { $$ = pform_compressed_assign_from_inc_dec(@1, $1); }
1401 | compressed_statement
1402 { $$ = $1; }
1403 ;
1404
1405
1406 /* The function declaration rule matches the function declaration
1407 header, then pushes the function scope. This causes the
1408 definitions in the func_body to take on the scope of the function
1409 instead of the module. */
1410 function_declaration /* IEEE1800-2005: A.2.6 */
1411 : K_function lifetime_opt data_type_or_implicit_or_void IDENTIFIER ';'
1412 { assert(current_function == 0);
1413 current_function = pform_push_function_scope(@1, $4, $2);
1414 }
1415 function_item_list_opt statement_or_null_list_opt
1416 K_endfunction
1417 { current_function->set_ports($7);
1418 current_function->set_return($3);
1419 current_function_set_statement($8? @8 : @4, $8);
1420 pform_set_this_class(@4, current_function);
1421 pform_pop_scope();
1422 current_function = 0;
1423 }
1424 endlabel_opt
1425 { // Last step: check any closing name.
1426 if ($11) {
1427 if (strcmp($4,$11) != 0) {
1428 yyerror(@11, "error: End label doesn't match "
1429 "function name");
1430 }
1431 if (! gn_system_verilog()) {
1432 yyerror(@11, "error: Function end labels require "
1433 "SystemVerilog.");
1434 }
1435 delete[]$11;
1436 }
1437 delete[]$4;
1438 }
1439
1440 | K_function lifetime_opt data_type_or_implicit_or_void IDENTIFIER
1441 { assert(current_function == 0);
1442 current_function = pform_push_function_scope(@1, $4, $2);
1443 }
1444 '(' tf_port_list_opt ')' ';'
1445 block_item_decls_opt
1446 statement_or_null_list_opt
1447 K_endfunction
1448 { current_function->set_ports($7);
1449 current_function->set_return($3);
1450 current_function_set_statement($11? @11 : @4, $11);
1451 pform_set_this_class(@4, current_function);
1452 pform_pop_scope();
1453 current_function = 0;
1454 if ($7==0 && !gn_system_verilog()) {
1455 yyerror(@4, "error: Empty parenthesis syntax requires SystemVerilog.");
1456 }
1457 }
1458 endlabel_opt
1459 { // Last step: check any closing name.
1460 if ($14) {
1461 if (strcmp($4,$14) != 0) {
1462 yyerror(@14, "error: End label doesn't match "
1463 "function name");
1464 }
1465 if (! gn_system_verilog()) {
1466 yyerror(@14, "error: Function end labels require "
1467 "SystemVerilog.");
1468 }
1469 delete[]$14;
1470 }
1471 delete[]$4;
1472 }
1473
1474 /* Detect and recover from some errors. */
1475
1476 | K_function lifetime_opt data_type_or_implicit_or_void IDENTIFIER error K_endfunction
1477 { /* */
1478 if (current_function) {
1479 pform_pop_scope();
1480 current_function = 0;
1481 }
1482 assert(current_function == 0);
1483 yyerror(@1, "error: Syntax error defining function.");
1484 yyerrok;
1485 }
1486 endlabel_opt
1487 { // Last step: check any closing name.
1488 if ($8) {
1489 if (strcmp($4,$8) != 0) {
1490 yyerror(@8, "error: End label doesn't match function name");
1491 }
1492 if (! gn_system_verilog()) {
1493 yyerror(@8, "error: Function end labels require "
1494 "SystemVerilog.");
1495 }
1496 delete[]$8;
1497 }
1498 delete[]$4;
1499 }
1500
1501 ;
1502
1503 genvar_iteration /* IEEE1800-2012: A.4.2 */
1504 : IDENTIFIER '=' expression
1505 { $$.text = $1;
1506 $$.expr = $3;
1507 }
1508 | IDENTIFIER K_INCR
1509 { $$.text = $1;
1510 $$.expr = pform_genvar_inc_dec(@1, $1, true);
1511 }
1512 | IDENTIFIER K_DECR
1513 { $$.text = $1;
1514 $$.expr = pform_genvar_inc_dec(@1, $1, false);
1515 }
1516 | K_INCR IDENTIFIER
1517 { $$.text = $2;
1518 $$.expr = pform_genvar_inc_dec(@1, $2, true);
1519 }
1520 | K_DECR IDENTIFIER
1521 { $$.text = $2;
1522 $$.expr = pform_genvar_inc_dec(@1, $2, false);
1523 }
1524 ;
1525
1526 import_export /* IEEE1800-2012: A.2.9 */
1527 : K_import { $$ = true; }
1528 | K_export { $$ = false; }
1529 ;
1530
1531 implicit_class_handle /* IEEE1800-2005: A.8.4 */
1532 : K_this { $$ = pform_create_this(); }
1533 | K_super { $$ = pform_create_super(); }
1534 ;
1535
1536 /* SystemVerilog adds support for the increment/decrement
1537 expressions, which look like a++, --a, etc. These are primaries
1538 but are in their own rules because they can also be
1539 statements. Note that the operator can only take l-value
1540 expressions. */
1541
1542 inc_or_dec_expression /* IEEE1800-2005: A.4.3 */
1543 : K_INCR lpvalue %prec UNARY_PREC
1544 { PEUnary*tmp = new PEUnary('I', $2);
1545 FILE_NAME(tmp, @2);
1546 $$ = tmp;
1547 }
1548 | lpvalue K_INCR %prec UNARY_PREC
1549 { PEUnary*tmp = new PEUnary('i', $1);
1550 FILE_NAME(tmp, @1);
1551 $$ = tmp;
1552 }
1553 | K_DECR lpvalue %prec UNARY_PREC
1554 { PEUnary*tmp = new PEUnary('D', $2);
1555 FILE_NAME(tmp, @2);
1556 $$ = tmp;
1557 }
1558 | lpvalue K_DECR %prec UNARY_PREC
1559 { PEUnary*tmp = new PEUnary('d', $1);
1560 FILE_NAME(tmp, @1);
1561 $$ = tmp;
1562 }
1563 ;
1564
1565 inside_expression /* IEEE1800-2005 A.8.3 */
1566 : expression K_inside '{' open_range_list '}'
1567 { yyerror(@2, "sorry: \"inside\" expressions not supported yet.");
1568 $$ = 0;
1569 }
1570 ;
1571
1572 integer_vector_type /* IEEE1800-2005: A.2.2.1 */
1573 : K_reg { $$ = IVL_VT_NO_TYPE; } /* Usually a synonym for logic. */
1574 | K_bit { $$ = IVL_VT_BOOL; }
1575 | K_logic { $$ = IVL_VT_LOGIC; }
1576 | K_bool { $$ = IVL_VT_BOOL; } /* Icarus Verilog xtypes extension */
1577 ;
1578
1579 join_keyword /* IEEE1800-2005: A.6.3 */
1580 : K_join
1581 { $$ = PBlock::BL_PAR; }
1582 | K_join_none
1583 { $$ = PBlock::BL_JOIN_NONE; }
1584 | K_join_any
1585 { $$ = PBlock::BL_JOIN_ANY; }
1586 ;
1587
1588 jump_statement /* IEEE1800-2005: A.6.5 */
1589 : K_break ';'
1590 { yyerror(@1, "sorry: break statements not supported.");
1591 $$ = 0;
1592 }
1593 | K_return ';'
1594 { PReturn*tmp = new PReturn(0);
1595 FILE_NAME(tmp, @1);
1596 $$ = tmp;
1597 }
1598 | K_return expression ';'
1599 { PReturn*tmp = new PReturn($2);
1600 FILE_NAME(tmp, @1);
1601 $$ = tmp;
1602 }
1603 ;
1604
1605 lifetime /* IEEE1800-2005: A.2.1.3 */
1606 : K_automatic { $$ = LexicalScope::AUTOMATIC; }
1607 | K_static { $$ = LexicalScope::STATIC; }
1608 ;
1609
1610 lifetime_opt /* IEEE1800-2005: A.2.1.3 */
1611 : lifetime { $$ = $1; }
1612 | { $$ = LexicalScope::INHERITED; }
1613 ;
1614
1615 /* Loop statements are kinds of statements. */
1616
1617 loop_statement /* IEEE1800-2005: A.6.8 */
1618 : K_for '(' lpvalue '=' expression ';' expression ';' for_step ')'
1619 statement_or_null
1620 { PForStatement*tmp = new PForStatement($3, $5, $7, $9, $11);
1621 FILE_NAME(tmp, @1);
1622 $$ = tmp;
1623 }
1624
1625 // Handle for_variable_declaration syntax by wrapping the for(...)
1626 // statement in a synthetic named block. We can name the block
1627 // after the variable that we are creating, that identifier is
1628 // safe in the controlling scope.
1629 | K_for '(' data_type IDENTIFIER '=' expression ';' expression ';' for_step ')'
1630 { static unsigned for_counter = 0;
1631 char for_block_name [64];
1632 snprintf(for_block_name, sizeof for_block_name, "$ivl_for_loop%u", for_counter);
1633 for_counter += 1;
1634 PBlock*tmp = pform_push_block_scope(@1, for_block_name, PBlock::BL_SEQ);
1635 current_block_stack.push(tmp);
1636
1637 list<decl_assignment_t*>assign_list;
1638 decl_assignment_t*tmp_assign = new decl_assignment_t;
1639 tmp_assign->name = lex_strings.make($4);
1640 assign_list.push_back(tmp_assign);
1641 pform_makewire(@4, 0, str_strength, &assign_list, NetNet::REG, $3);
1642 }
1643 statement_or_null
1644 { pform_name_t tmp_hident;
1645 tmp_hident.push_back(name_component_t(lex_strings.make($4)));
1646
1647 PEIdent*tmp_ident = pform_new_ident(@4, tmp_hident);
1648 FILE_NAME(tmp_ident, @4);
1649
1650 PForStatement*tmp_for = new PForStatement(tmp_ident, $6, $8, $10, $13);
1651 FILE_NAME(tmp_for, @1);
1652
1653 pform_pop_scope();
1654 vector<Statement*>tmp_for_list (1);
1655 tmp_for_list[0] = tmp_for;
1656 PBlock*tmp_blk = current_block_stack.top();
1657 current_block_stack.pop();
1658 tmp_blk->set_statement(tmp_for_list);
1659 $$ = tmp_blk;
1660 delete[]$4;
1661 }
1662
1663 | K_forever statement_or_null
1664 { PForever*tmp = new PForever($2);
1665 FILE_NAME(tmp, @1);
1666 $$ = tmp;
1667 }
1668
1669 | K_repeat '(' expression ')' statement_or_null
1670 { PRepeat*tmp = new PRepeat($3, $5);
1671 FILE_NAME(tmp, @1);
1672 $$ = tmp;
1673 }
1674
1675 | K_while '(' expression ')' statement_or_null
1676 { PWhile*tmp = new PWhile($3, $5);
1677 FILE_NAME(tmp, @1);
1678 $$ = tmp;
1679 }
1680
1681 | K_do statement_or_null K_while '(' expression ')' ';'
1682 { PDoWhile*tmp = new PDoWhile($5, $2);
1683 FILE_NAME(tmp, @1);
1684 $$ = tmp;
1685 }
1686
1687 // When matching a foreach loop, implicitly create a named block
1688 // to hold the definitions for the index variables.
1689 | K_foreach '(' IDENTIFIER '[' loop_variables ']' ')'
1690 { static unsigned foreach_counter = 0;
1691 char for_block_name[64];
1692 snprintf(for_block_name, sizeof for_block_name, "$ivl_foreach%u", foreach_counter);
1693 foreach_counter += 1;
1694
1695 PBlock*tmp = pform_push_block_scope(@1, for_block_name, PBlock::BL_SEQ);
1696 current_block_stack.push(tmp);
1697
1698 pform_make_foreach_declarations(@1, $5);
1699 }
1700 statement_or_null
1701 { PForeach*tmp_for = pform_make_foreach(@1, $3, $5, $9);
1702
1703 pform_pop_scope();
1704 vector<Statement*>tmp_for_list(1);
1705 tmp_for_list[0] = tmp_for;
1706 PBlock*tmp_blk = current_block_stack.top();
1707 current_block_stack.pop();
1708 tmp_blk->set_statement(tmp_for_list);
1709 $$ = tmp_blk;
1710 }
1711
1712 /* Error forms for loop statements. */
1713
1714 | K_for '(' lpvalue '=' expression ';' expression ';' error ')'
1715 statement_or_null
1716 { $$ = 0;
1717 yyerror(@1, "error: Error in for loop step assignment.");
1718 }
1719
1720 | K_for '(' lpvalue '=' expression ';' error ';' for_step ')'
1721 statement_or_null
1722 { $$ = 0;
1723 yyerror(@1, "error: Error in for loop condition expression.");
1724 }
1725
1726 | K_for '(' error ')' statement_or_null
1727 { $$ = 0;
1728 yyerror(@1, "error: Incomprehensible for loop.");
1729 }
1730
1731 | K_while '(' error ')' statement_or_null
1732 { $$ = 0;
1733 yyerror(@1, "error: Error in while loop condition.");
1734 }
1735
1736 | K_do statement_or_null K_while '(' error ')' ';'
1737 { $$ = 0;
1738 yyerror(@1, "error: Error in do/while loop condition.");
1739 }
1740
1741 | K_foreach '(' IDENTIFIER '[' error ']' ')' statement_or_null
1742 { $$ = 0;
1743 yyerror(@4, "error: Errors in foreach loop variables list.");
1744 }
1745 ;
1746
1747
1748 /* TODO: Replace register_variable_list with list_of_variable_decl_assignments. */
1749 list_of_variable_decl_assignments /* IEEE1800-2005 A.2.3 */
1750 : variable_decl_assignment
1751 { list<decl_assignment_t*>*tmp = new list<decl_assignment_t*>;
1752 tmp->push_back($1);
1753 $$ = tmp;
1754 }
1755 | list_of_variable_decl_assignments ',' variable_decl_assignment
1756 { list<decl_assignment_t*>*tmp = $1;
1757 tmp->push_back($3);
1758 $$ = tmp;
1759 }
1760 ;
1761
1762 variable_decl_assignment /* IEEE1800-2005 A.2.3 */
1763 : IDENTIFIER dimensions_opt
1764 { decl_assignment_t*tmp = new decl_assignment_t;
1765 tmp->name = lex_strings.make($1);
1766 if ($2) {
1767 tmp->index = *$2;
1768 delete $2;
1769 }
1770 delete[]$1;
1771 $$ = tmp;
1772 }
1773 | IDENTIFIER '=' expression
1774 { decl_assignment_t*tmp = new decl_assignment_t;
1775 tmp->name = lex_strings.make($1);
1776 tmp->expr .reset($3);
1777 delete[]$1;
1778 $$ = tmp;
1779 }
1780 | IDENTIFIER '=' class_new
1781 { decl_assignment_t*tmp = new decl_assignment_t;
1782 tmp->name = lex_strings.make($1);
1783 tmp->expr .reset($3);
1784 delete[]$1;
1785 $$ = tmp;
1786 }
1787 | IDENTIFIER dimensions '=' dynamic_array_new
1788 { decl_assignment_t*tmp = new decl_assignment_t;
1789 tmp->name = lex_strings.make($1);
1790 tmp->index = *$2;
1791 tmp->expr .reset($4);
1792 delete $2;
1793 delete[]$1;
1794 $$ = tmp;
1795 }
1796 ;
1797
1798
1799 loop_variables /* IEEE1800-2005: A.6.8 */
1800 : loop_variables ',' IDENTIFIER
1801 { list<perm_string>*tmp = $1;
1802 tmp->push_back(lex_strings.make($3));
1803 delete[]$3;
1804 $$ = tmp;
1805 }
1806 | IDENTIFIER
1807 { list<perm_string>*tmp = new list<perm_string>;
1808 tmp->push_back(lex_strings.make($1));
1809 delete[]$1;
1810 $$ = tmp;
1811 }
1812 ;
1813
1814 method_qualifier /* IEEE1800-2005: A.1.8 */
1815 : K_virtual
1816 | class_item_qualifier
1817 ;
1818
1819 method_qualifier_opt
1820 : method_qualifier
1821 |
1822 ;
1823
1824 modport_declaration /* IEEE1800-2012: A.2.9 */
1825 : K_modport
1826 { if (!pform_in_interface())
1827 yyerror(@1, "error: modport declarations are only allowed "
1828 "in interfaces.");
1829 }
1830 modport_item_list ';'
1831
1832 modport_item_list
1833 : modport_item
1834 | modport_item_list ',' modport_item
1835 ;
1836
1837 modport_item
1838 : IDENTIFIER
1839 { pform_start_modport_item(@1, $1); }
1840 '(' modport_ports_list ')'
1841 { pform_end_modport_item(@1); }
1842 ;
1843
1844 /* The modport_ports_list is a LALR(2) grammar. When the parser sees a
1845 ',' it needs to look ahead to the next token to decide whether it is
1846 a continuation of the preceding modport_ports_declaration, or the
1847 start of a new modport_ports_declaration. bison only supports LALR(1),
1848 so we have to handcraft a mini parser for this part of the syntax.
1849 last_modport_port holds the state for this mini parser.*/
1850
1851 modport_ports_list
1852 : modport_ports_declaration
1853 | modport_ports_list ',' modport_ports_declaration
1854 | modport_ports_list ',' modport_simple_port
1855 { if (last_modport_port.type == MP_SIMPLE) {
1856 pform_add_modport_port(@3, last_modport_port.direction,
1857 $3->name, $3->parm);
1858 } else {
1859 yyerror(@3, "error: modport expression not allowed here.");
1860 }
1861 delete $3;
1862 }
1863 | modport_ports_list ',' modport_tf_port
1864 { if (last_modport_port.type != MP_TF)
1865 yyerror(@3, "error: task/function declaration not allowed here.");
1866 }
1867 | modport_ports_list ',' IDENTIFIER
1868 { if (last_modport_port.type == MP_SIMPLE) {
1869 pform_add_modport_port(@3, last_modport_port.direction,
1870 lex_strings.make($3), 0);
1871 } else if (last_modport_port.type != MP_TF) {
1872 yyerror(@3, "error: list of identifiers not allowed here.");
1873 }
1874 delete[] $3;
1875 }
1876 | modport_ports_list ','
1877 { yyerror(@2, "error: Superfluous comma in port declaration list."); }
1878 ;
1879
1880 modport_ports_declaration
1881 : attribute_list_opt port_direction IDENTIFIER
1882 { last_modport_port.type = MP_SIMPLE;
1883 last_modport_port.direction = $2;
1884 pform_add_modport_port(@3, $2, lex_strings.make($3), 0);
1885 delete[] $3;
1886 delete $1;
1887 }
1888 | attribute_list_opt port_direction modport_simple_port
1889 { last_modport_port.type = MP_SIMPLE;
1890 last_modport_port.direction = $2;
1891 pform_add_modport_port(@3, $2, $3->name, $3->parm);
1892 delete $3;
1893 delete $1;
1894 }
1895 | attribute_list_opt import_export IDENTIFIER
1896 { last_modport_port.type = MP_TF;
1897 last_modport_port.is_import = $2;
1898 yyerror(@3, "sorry: modport task/function ports are not yet supported.");
1899 delete[] $3;
1900 delete $1;
1901 }
1902 | attribute_list_opt import_export modport_tf_port
1903 { last_modport_port.type = MP_TF;
1904 last_modport_port.is_import = $2;
1905 yyerror(@3, "sorry: modport task/function ports are not yet supported.");
1906 delete $1;
1907 }
1908 | attribute_list_opt K_clocking IDENTIFIER
1909 { last_modport_port.type = MP_CLOCKING;
1910 last_modport_port.direction = NetNet::NOT_A_PORT;
1911 yyerror(@3, "sorry: modport clocking declaration is not yet supported.");
1912 delete[] $3;
1913 delete $1;
1914 }
1915 ;
1916
1917 modport_simple_port
1918 : '.' IDENTIFIER '(' expression ')'
1919 { named_pexpr_t*tmp = new named_pexpr_t;
1920 tmp->name = lex_strings.make($2);
1921 tmp->parm = $4;
1922 delete[]$2;
1923 $$ = tmp;
1924 }
1925 ;
1926
1927 modport_tf_port
1928 : K_task IDENTIFIER
1929 | K_task IDENTIFIER '(' tf_port_list_opt ')'
1930 | K_function data_type_or_implicit_or_void IDENTIFIER
1931 | K_function data_type_or_implicit_or_void IDENTIFIER '(' tf_port_list_opt ')'
1932 ;
1933
1934 non_integer_type /* IEEE1800-2005: A.2.2.1 */
1935 : K_real { $$ = real_type_t::REAL; }
1936 | K_realtime { $$ = real_type_t::REAL; }
1937 | K_shortreal { $$ = real_type_t::SHORTREAL; }
1938 ;
1939
1940 number : BASED_NUMBER
1941 { $$ = $1; based_size = 0;}
1942 | DEC_NUMBER
1943 { $$ = $1; based_size = 0;}
1944 | DEC_NUMBER BASED_NUMBER
1945 { $$ = pform_verinum_with_size($1,$2, @2.text, @2.first_line);
1946 based_size = 0; }
1947 | UNBASED_NUMBER
1948 { $$ = $1; based_size = 0;}
1949 | DEC_NUMBER UNBASED_NUMBER
1950 { yyerror(@1, "error: Unbased SystemVerilog literal cannot have "
1951 "a size.");
1952 $$ = $1; based_size = 0;}
1953 ;
1954
1955 open_range_list /* IEEE1800-2005 A.2.11 */
1956 : open_range_list ',' value_range
1957 | value_range
1958 ;
1959
1960 package_declaration /* IEEE1800-2005 A.1.2 */
1961 : K_package lifetime_opt IDENTIFIER ';'
1962 { pform_start_package_declaration(@1, $3, $2); }
1963 timeunits_declaration_opt
1964 { pform_set_scope_timescale(@1); }
1965 package_item_list_opt
1966 K_endpackage endlabel_opt
1967 { pform_end_package_declaration(@1);
1968 // If an end label is present make sure it match the package name.
1969 if ($10) {
1970 if (strcmp($3,$10) != 0) {
1971 yyerror(@10, "error: End label doesn't match package name");
1972 }
1973 delete[]$10;
1974 }
1975 delete[]$3;
1976 }
1977 ;
1978
1979 module_package_import_list_opt
1980 :
1981 | package_import_list
1982 ;
1983
1984 package_import_list
1985 : package_import_declaration
1986 | package_import_list package_import_declaration
1987 ;
1988
1989 package_import_declaration /* IEEE1800-2005 A.2.1.3 */
1990 : K_import package_import_item_list ';'
1991 { }
1992 ;
1993
1994 package_import_item
1995 : PACKAGE_IDENTIFIER K_SCOPE_RES IDENTIFIER
1996 { pform_package_import(@2, $1, $3);
1997 delete[]$3;
1998 }
1999 | PACKAGE_IDENTIFIER K_SCOPE_RES '*'
2000 { pform_package_import(@2, $1, 0);
2001 }
2002 ;
2003
2004 package_import_item_list
2005 : package_import_item_list',' package_import_item
2006 | package_import_item
2007 ;
2008
2009 package_item /* IEEE1800-2005 A.1.10 */
2010 : timeunits_declaration
2011 | K_parameter param_type parameter_assign_list ';'
2012 | K_localparam param_type localparam_assign_list ';'
2013 | type_declaration
2014 | function_declaration
2015 | task_declaration
2016 | data_declaration
2017 | class_declaration
2018 ;
2019
2020 package_item_list
2021 : package_item_list package_item
2022 | package_item
2023 ;
2024
2025 package_item_list_opt : package_item_list | ;
2026
2027 port_direction /* IEEE1800-2005 A.1.3 */
2028 : K_input { $$ = NetNet::PINPUT; }
2029 | K_output { $$ = NetNet::POUTPUT; }
2030 | K_inout { $$ = NetNet::PINOUT; }
2031 | K_ref
2032 { $$ = NetNet::PREF;
2033 if (!gn_system_verilog()) {
2034 yyerror(@1, "error: Reference ports (ref) require SystemVerilog.");
2035 $$ = NetNet::PINPUT;
2036 }
2037 }
2038 ;
2039
2040 /* port_direction_opt is used in places where the port direction is
2041 optional. The default direction is selected by the context,
2042 which needs to notice the PIMPLICIT direction. */
2043
2044 port_direction_opt
2045 : port_direction { $$ = $1; }
2046 | { $$ = NetNet::PIMPLICIT; }
2047 ;
2048
2049 procedural_assertion_statement /* IEEE1800-2012 A.6.10 */
2050 : concurrent_assertion_statement
2051 { $$ = $1; }
2052 | simple_immediate_assertion_statement
2053 { $$ = $1; }
2054 | deferred_immediate_assertion_statement
2055 { $$ = $1; }
2056 ;
2057
2058 property_expr /* IEEE1800-2012 A.2.10 */
2059 : expression
2060 ;
2061
2062 /* The property_qualifier rule is as literally described in the LRM,
2063 but the use is usually as { property_qualifier }, which is
2064 implemented by the property_qualifier_opt rule below. */
2065
2066 property_qualifier /* IEEE1800-2005 A.1.8 */
2067 : class_item_qualifier
2068 | random_qualifier
2069 ;
2070
2071 property_qualifier_opt /* IEEE1800-2005 A.1.8: ... { property_qualifier } */
2072 : property_qualifier_list { $$ = $1; }
2073 | { $$ = property_qualifier_t::make_none(); }
2074 ;
2075
2076 property_qualifier_list /* IEEE1800-2005 A.1.8 */
2077 : property_qualifier_list property_qualifier { $$ = $1 | $2; }
2078 | property_qualifier { $$ = $1; }
2079 ;
2080
2081 /* The property_spec rule uses some helper rules to implement this
2082 rule from the LRM:
2083 [ clocking_event ] [ disable iff ( expression_or_dist ) ] property_expr
2084 This does it is a YACC friendly way. */
2085
2086 property_spec /* IEEE1800-2012 A.2.10 */
2087 : clocking_event_opt property_spec_disable_iff_opt property_expr
2088 ;
2089
2090 property_spec_disable_iff_opt /* */
2091 : K_disable K_iff '(' expression ')'
2092 |
2093 ;
2094
2095 random_qualifier /* IEEE1800-2005 A.1.8 */
2096 : K_rand { $$ = property_qualifier_t::make_rand(); }
2097 | K_randc { $$ = property_qualifier_t::make_randc(); }
2098 ;
2099
2100 /* real and realtime are exactly the same so save some code
2101 * with a common matching rule. */
2102 real_or_realtime
2103 : K_real
2104 | K_realtime
2105 ;
2106
2107 signing /* IEEE1800-2005: A.2.2.1 */
2108 : K_signed { $$ = true; }
2109 | K_unsigned { $$ = false; }
2110 ;
2111
2112 simple_immediate_assertion_statement /* IEEE1800-2012 A.6.10 */
2113 : assert_or_assume '(' expression ')' statement_or_null %prec less_than_K_else
2114 {
2115 if (gn_supported_assertions_flag) {
2116 list<PExpr*>arg_list;
2117 PCallTask*tmp1 = new PCallTask(lex_strings.make("$error"), arg_list);
2118 FILE_NAME(tmp1, @1);
2119 PCondit*tmp2 = new PCondit($3, $5, tmp1);
2120 FILE_NAME(tmp2, @1);
2121 $$ = tmp2;
2122 } else {
2123 delete $3;
2124 delete $5;
2125 $$ = 0;
2126 }
2127 }
2128 | assert_or_assume '(' expression ')' K_else statement_or_null
2129 {
2130 if (gn_supported_assertions_flag) {
2131 PCondit*tmp = new PCondit($3, 0, $6);
2132 FILE_NAME(tmp, @1);
2133 $$ = tmp;
2134 } else {
2135 delete $3;
2136 delete $6;
2137 $$ = 0;
2138 }
2139 }
2140 | assert_or_assume '(' expression ')' statement_or_null K_else statement_or_null
2141 {
2142 if (gn_supported_assertions_flag) {
2143 PCondit*tmp = new PCondit($3, $5, $7);
2144 FILE_NAME(tmp, @1);
2145 $$ = tmp;
2146 } else {
2147 delete $3;
2148 delete $5;
2149 delete $7;
2150 $$ = 0;
2151 }
2152 }
2153 | K_cover '(' expression ')' statement_or_null
2154 {
2155 /* Coverage collection is not currently supported. */
2156 delete $3;
2157 delete $5;
2158 $$ = 0;
2159 }
2160 | assert_or_assume '(' error ')' statement_or_null %prec less_than_K_else
2161 { yyerror(@1, "error: Malformed conditional expression.");
2162 $$ = $5;
2163 }
2164 | assert_or_assume '(' error ')' K_else statement_or_null
2165 { yyerror(@1, "error: Malformed conditional expression.");
2166 $$ = $6;
2167 }
2168 | assert_or_assume '(' error ')' statement_or_null K_else statement_or_null
2169 { yyerror(@1, "error: Malformed conditional expression.");
2170 $$ = $5;
2171 }
2172 | K_cover '(' error ')' statement_or_null
2173 { yyerror(@1, "error: Malformed conditional expression.");
2174 $$ = $5;
2175 }
2176 ;
2177
2178 simple_type_or_string /* IEEE1800-2005: A.2.2.1 */
2179 : integer_vector_type
2180 { ivl_variable_type_t use_vtype = $1;
2181 bool reg_flag = false;
2182 if (use_vtype == IVL_VT_NO_TYPE) {
2183 use_vtype = IVL_VT_LOGIC;
2184 reg_flag = true;
2185 }
2186 vector_type_t*tmp = new vector_type_t(use_vtype, false, 0);
2187 tmp->reg_flag = reg_flag;
2188 FILE_NAME(tmp, @1);
2189 $$ = tmp;
2190 }
2191 | non_integer_type
2192 { real_type_t*tmp = new real_type_t($1);
2193 FILE_NAME(tmp, @1);
2194 $$ = tmp;
2195 }
2196 | atom2_type
2197 { atom2_type_t*tmp = new atom2_type_t($1, true);
2198 FILE_NAME(tmp, @1);
2199 $$ = tmp;
2200 }
2201 | K_integer
2202 { list<pform_range_t>*pd = make_range_from_width(integer_width);
2203 vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, true, pd);
2204 tmp->reg_flag = true;
2205 tmp->integer_flag = true;
2206 $$ = tmp;
2207 }
2208 | K_time
2209 { list<pform_range_t>*pd = make_range_from_width(64);
2210 vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, false, pd);
2211 tmp->reg_flag = !gn_system_verilog();
2212 $$ = tmp;
2213 }
2214 | TYPE_IDENTIFIER
2215 { pform_set_type_referenced(@1, $1.text);
2216 $$ = $1.type;
2217 delete[]$1.text;
2218 }
2219 | PACKAGE_IDENTIFIER K_SCOPE_RES
2220 { lex_in_package_scope($1); }
2221 TYPE_IDENTIFIER
2222 { lex_in_package_scope(0);
2223 $$ = $4.type;
2224 delete[]$4.text;
2225 }
2226 | K_string
2227 { string_type_t*tmp = new string_type_t;
2228 FILE_NAME(tmp, @1);
2229 $$ = tmp;
2230 }
2231 ;
2232
2233 statement /* IEEE1800-2005: A.6.4 */
2234 : attribute_list_opt statement_item
2235 { pform_bind_attributes($2->attributes, $1);
2236 $$ = $2;
2237 }
2238 ;
2239
2240 /* Many places where statements are allowed can actually take a
2241 statement or a null statement marked with a naked semi-colon. */
2242
2243 statement_or_null /* IEEE1800-2005: A.6.4 */
2244 : statement
2245 { $$ = $1; }
2246 | attribute_list_opt ';'
2247 { $$ = 0; }
2248 ;
2249
2250 stream_expression
2251 : expression
2252 ;
2253
2254 stream_expression_list
2255 : stream_expression_list ',' stream_expression
2256 | stream_expression
2257 ;
2258
2259 stream_operator
2260 : K_LS
2261 | K_RS
2262 ;
2263
2264 streaming_concatenation /* IEEE1800-2005: A.8.1 */
2265 : '{' stream_operator '{' stream_expression_list '}' '}'
2266 { /* streaming concatenation is a SystemVerilog thing. */
2267 if (gn_system_verilog()) {
2268 yyerror(@2, "sorry: Streaming concatenation not supported.");
2269 $$ = 0;
2270 } else {
2271 yyerror(@2, "error: Streaming concatenation requires SystemVerilog");
2272 $$ = 0;
2273 }
2274 }
2275 ;
2276
2277 /* The task declaration rule matches the task declaration
2278 header, then pushes the function scope. This causes the
2279 definitions in the task_body to take on the scope of the task
2280 instead of the module. */
2281
2282 task_declaration /* IEEE1800-2005: A.2.7 */
2283
2284 : K_task lifetime_opt IDENTIFIER ';'
2285 { assert(current_task == 0);
2286 current_task = pform_push_task_scope(@1, $3, $2);
2287 }
2288 task_item_list_opt
2289 statement_or_null_list_opt
2290 K_endtask
2291 { current_task->set_ports($6);
2292 current_task_set_statement(@3, $7);
2293 pform_set_this_class(@3, current_task);
2294 pform_pop_scope();
2295 current_task = 0;
2296 if ($7 && $7->size() > 1 && !gn_system_verilog()) {
2297 yyerror(@7, "error: Task body with multiple statements requires SystemVerilog.");
2298 }
2299 delete $7;
2300 }
2301 endlabel_opt
2302 { // Last step: check any closing name. This is done late so
2303 // that the parser can look ahead to detect the present
2304 // endlabel_opt but still have the pform_endmodule() called
2305 // early enough that the lexor can know we are outside the
2306 // module.
2307 if ($10) {
2308 if (strcmp($3,$10) != 0) {
2309 yyerror(@10, "error: End label doesn't match task name");
2310 }
2311 if (! gn_system_verilog()) {
2312 yyerror(@10, "error: Task end labels require "
2313 "SystemVerilog.");
2314 }
2315 delete[]$10;
2316 }
2317 delete[]$3;
2318 }
2319
2320 | K_task lifetime_opt IDENTIFIER '('
2321 { assert(current_task == 0);
2322 current_task = pform_push_task_scope(@1, $3, $2);
2323 }
2324 tf_port_list ')' ';'
2325 block_item_decls_opt
2326 statement_or_null_list_opt
2327 K_endtask
2328 { current_task->set_ports($6);
2329 current_task_set_statement(@3, $10);
2330 pform_set_this_class(@3, current_task);
2331 pform_pop_scope();
2332 current_task = 0;
2333 if ($10) delete $10;
2334 }
2335 endlabel_opt
2336 { // Last step: check any closing name. This is done late so
2337 // that the parser can look ahead to detect the present
2338 // endlabel_opt but still have the pform_endmodule() called
2339 // early enough that the lexor can know we are outside the
2340 // module.
2341 if ($13) {
2342 if (strcmp($3,$13) != 0) {
2343 yyerror(@13, "error: End label doesn't match task name");
2344 }
2345 if (! gn_system_verilog()) {
2346 yyerror(@13, "error: Task end labels require "
2347 "SystemVerilog.");
2348 }
2349 delete[]$13;
2350 }
2351 delete[]$3;
2352 }
2353
2354 | K_task lifetime_opt IDENTIFIER '(' ')' ';'
2355 { assert(current_task == 0);
2356 current_task = pform_push_task_scope(@1, $3, $2);
2357 }
2358 block_item_decls_opt
2359 statement_or_null_list
2360 K_endtask
2361 { current_task->set_ports(0);
2362 current_task_set_statement(@3, $9);
2363 pform_set_this_class(@3, current_task);
2364 if (! current_task->method_of()) {
2365 cerr << @3 << ": warning: task definition for \"" << $3
2366 << "\" has an empty port declaration list!" << endl;
2367 }
2368 pform_pop_scope();
2369 current_task = 0;
2370 if ($9->size() > 1 && !gn_system_verilog()) {
2371 yyerror(@9, "error: Task body with multiple statements requires SystemVerilog.");
2372 }
2373 delete $9;
2374 }
2375 endlabel_opt
2376 { // Last step: check any closing name. This is done late so
2377 // that the parser can look ahead to detect the present
2378 // endlabel_opt but still have the pform_endmodule() called
2379 // early enough that the lexor can know we are outside the
2380 // module.
2381 if ($12) {
2382 if (strcmp($3,$12) != 0) {
2383 yyerror(@12, "error: End label doesn't match task name");
2384 }
2385 if (! gn_system_verilog()) {
2386 yyerror(@12, "error: Task end labels require "
2387 "SystemVerilog.");
2388 }
2389 delete[]$12;
2390 }
2391 delete[]$3;
2392 }
2393
2394 | K_task lifetime_opt IDENTIFIER error K_endtask
2395 {
2396 if (current_task) {
2397 pform_pop_scope();
2398 current_task = 0;
2399 }
2400 }
2401 endlabel_opt
2402 { // Last step: check any closing name. This is done late so
2403 // that the parser can look ahead to detect the present
2404 // endlabel_opt but still have the pform_endmodule() called
2405 // early enough that the lexor can know we are outside the
2406 // module.
2407 if ($7) {
2408 if (strcmp($3,$7) != 0) {
2409 yyerror(@7, "error: End label doesn't match task name");
2410 }
2411 if (! gn_system_verilog()) {
2412 yyerror(@7, "error: Task end labels require "
2413 "SystemVerilog.");
2414 }
2415 delete[]$7;
2416 }
2417 delete[]$3;
2418 }
2419
2420 ;
2421
2422
2423 tf_port_declaration /* IEEE1800-2005: A.2.7 */
2424 : port_direction K_reg_opt unsigned_signed_opt dimensions_opt list_of_identifiers ';'
2425 { vector<pform_tf_port_t>*tmp = pform_make_task_ports(@1, $1,
2426 $2 ? IVL_VT_LOGIC :
2427 IVL_VT_NO_TYPE,
2428 $3, $4, $5);
2429 $$ = tmp;
2430 }
2431
2432 /* When the port is an integer, infer a signed vector of the integer
2433 shape. Generate a range ([31:0]) to make it work. */
2434
2435 | port_direction K_integer list_of_identifiers ';'
2436 { list<pform_range_t>*range_stub = make_range_from_width(integer_width);
2437 vector<pform_tf_port_t>*tmp = pform_make_task_ports(@1, $1, IVL_VT_LOGIC, true,
2438 range_stub, $3, true);
2439 $$ = tmp;
2440 }
2441
2442 /* Ports can be time with a width of [63:0] (unsigned). */
2443
2444 | port_direction K_time list_of_identifiers ';'
2445 { list<pform_range_t>*range_stub = make_range_from_width(64);
2446 vector<pform_tf_port_t>*tmp = pform_make_task_ports(@1, $1, IVL_VT_LOGIC, false,
2447 range_stub, $3);
2448 $$ = tmp;
2449 }
2450
2451 /* Ports can be real or realtime. */
2452
2453 | port_direction real_or_realtime list_of_identifiers ';'
2454 { vector<pform_tf_port_t>*tmp = pform_make_task_ports(@1, $1, IVL_VT_REAL, true,
2455 0, $3);
2456 $$ = tmp;
2457 }
2458
2459
2460 /* Ports can be string. */
2461
2462 | port_direction K_string list_of_identifiers ';'
2463 { vector<pform_tf_port_t>*tmp = pform_make_task_ports(@1, $1, IVL_VT_STRING, true,
2464 0, $3);
2465 $$ = tmp;
2466 }
2467
2468 ;
2469
2470
2471 /* These rules for tf_port_item are slightly expanded from the
2472 strict rules in the LRM to help with LALR parsing.
2473
2474 NOTE: Some of these rules should be folded into the "data_type"
2475 variant which uses the data_type rule to match data type
2476 declarations. That some rules do not use the data_type production
2477 is a consequence of legacy. */
2478
2479 tf_port_item /* IEEE1800-2005: A.2.7 */
2480
2481 : port_direction_opt data_type_or_implicit IDENTIFIER dimensions_opt tf_port_item_expr_opt
2482 { vector<pform_tf_port_t>*tmp;
2483 NetNet::PortType use_port_type = $1;
2484 if ((use_port_type == NetNet::PIMPLICIT) && (gn_system_verilog() || ($2 == 0)))
2485 use_port_type = port_declaration_context.port_type;
2486 perm_string name = lex_strings.make($3);
2487 list<perm_string>* ilist = list_from_identifier($3);
2488
2489 if (use_port_type == NetNet::PIMPLICIT) {
2490 yyerror(@1, "error: missing task/function port direction.");
2491 use_port_type = NetNet::PINPUT; // for error recovery
2492 }
2493 if (($2 == 0) && ($1==NetNet::PIMPLICIT)) {
2494 // Detect special case this is an undecorated
2495 // identifier and we need to get the declaration from
2496 // left context.
2497 if ($4 != 0) {
2498 yyerror(@4, "internal error: How can there be an unpacked range here?\n");
2499 }
2500 tmp = pform_make_task_ports(@3, use_port_type,
2501 port_declaration_context.data_type,
2502 ilist);
2503
2504 } else {
2505 // Otherwise, the decorations for this identifier
2506 // indicate the type. Save the type for any right
2507 // context that may come later.
2508 port_declaration_context.port_type = use_port_type;
2509 if ($2 == 0) {
2510 $2 = new vector_type_t(IVL_VT_LOGIC, false, 0);
2511 FILE_NAME($2, @3);
2512 }
2513 port_declaration_context.data_type = $2;
2514 tmp = pform_make_task_ports(@3, use_port_type, $2, ilist);
2515 }
2516 if ($4 != 0) {
2517 if (gn_system_verilog()) {
2518 pform_set_reg_idx(name, $4);
2519 } else {
2520 yyerror(@4, "error: Task/function port with unpacked dimensions requires SystemVerilog.");
2521 }
2522 }
2523
2524 $$ = tmp;
2525 if ($5) {
2526 assert(tmp->size()==1);
2527 tmp->front().defe = $5;
2528 }
2529 }
2530
2531 /* Rules to match error cases... */
2532
2533 | port_direction_opt data_type_or_implicit IDENTIFIER error
2534 { yyerror(@3, "error: Error in task/function port item after port name %s.", $3);
2535 yyerrok;
2536 $$ = 0;
2537 }
2538 ;
2539
2540 /* This rule matches the [ = <expression> ] part of the tf_port_item rules. */
2541
2542 tf_port_item_expr_opt
2543 : '=' expression
2544 { if (! gn_system_verilog()) {
2545 yyerror(@1, "error: Task/function default arguments require "
2546 "SystemVerilog.");
2547 }
2548 $$ = $2;
2549 }
2550 | { $$ = 0; }
2551 ;
2552
2553 tf_port_list /* IEEE1800-2005: A.2.7 */
2554 : { port_declaration_context.port_type = gn_system_verilog() ? NetNet::PINPUT : NetNet::PIMPLICIT;
2555 port_declaration_context.data_type = 0;
2556 }
2557 tf_port_item_list
2558 { $$ = $2; }
2559 ;
2560
2561 tf_port_item_list
2562 : tf_port_item_list ',' tf_port_item
2563 { vector<pform_tf_port_t>*tmp;
2564 if ($1 && $3) {
2565 size_t s1 = $1->size();
2566 tmp = $1;
2567 tmp->resize(tmp->size()+$3->size());
2568 for (size_t idx = 0 ; idx < $3->size() ; idx += 1)
2569 tmp->at(s1+idx) = $3->at(idx);
2570 delete $3;
2571 } else if ($1) {
2572 tmp = $1;
2573 } else {
2574 tmp = $3;
2575 }
2576 $$ = tmp;
2577 }
2578
2579 | tf_port_item
2580 { $$ = $1; }
2581
2582 /* Rules to handle some errors in tf_port_list items. */
2583
2584 | error ',' tf_port_item
2585 { yyerror(@2, "error: Syntax error in task/function port declaration.");
2586 $$ = $3;
2587 }
2588 | tf_port_item_list ','
2589 { yyerror(@2, "error: Superfluous comma in port declaration list.");
2590 $$ = $1;
2591 }
2592 | tf_port_item_list ';'
2593 { yyerror(@2, "error: ';' is an invalid port declaration separator.");
2594 $$ = $1;
2595 }
2596 ;
2597
2598 timeunits_declaration /* IEEE1800-2005: A.1.2 */
2599 : K_timeunit TIME_LITERAL ';'
2600 { pform_set_timeunit($2, allow_timeunit_decl); }
2601 | K_timeunit TIME_LITERAL '/' TIME_LITERAL ';'
2602 { bool initial_decl = allow_timeunit_decl && allow_timeprec_decl;
2603 pform_set_timeunit($2, initial_decl);
2604 pform_set_timeprec($4, initial_decl);
2605 }
2606 | K_timeprecision TIME_LITERAL ';'
2607 { pform_set_timeprec($2, allow_timeprec_decl); }
2608 ;
2609
2610 /* Allow zero, one, or two declarations. The second declaration might
2611 be a repeat declaration, but the pform functions take care of that. */
2612 timeunits_declaration_opt
2613 : /* empty */ %prec no_timeunits_declaration
2614 | timeunits_declaration %prec one_timeunits_declaration
2615 | timeunits_declaration timeunits_declaration
2616 ;
2617
2618 value_range /* IEEE1800-2005: A.8.3 */
2619 : expression
2620 { }
2621 | '[' expression ':' expression ']'
2622 { }
2623 ;
2624
2625 variable_dimension /* IEEE1800-2005: A.2.5 */
2626 : '[' expression ':' expression ']'
2627 { list<pform_range_t> *tmp = new list<pform_range_t>;
2628 pform_range_t index ($2,$4);
2629 tmp->push_back(index);
2630 $$ = tmp;
2631 }
2632 | '[' expression ']'
2633 { // SystemVerilog canonical range
2634 if (!gn_system_verilog()) {
2635 warn_count += 1;
2636 cerr << @2 << ": warning: Use of SystemVerilog [size] dimension. "
2637 << "Use at least -g2005-sv to remove this warning." << endl;
2638 }
2639 list<pform_range_t> *tmp = new list<pform_range_t>;
2640 pform_range_t index ($2,0);
2641 tmp->push_back(index);
2642 $$ = tmp;
2643 }
2644 | '[' ']'
2645 { list<pform_range_t> *tmp = new list<pform_range_t>;
2646 pform_range_t index (0,0);
2647 tmp->push_back(index);
2648 $$ = tmp;
2649 }
2650 | '[' '$' ']'
2651 { // SystemVerilog queue
2652 list<pform_range_t> *tmp = new list<pform_range_t>;
2653 pform_range_t index (new PENull,0);
2654 if (!gn_system_verilog()) {
2655 yyerror("error: Queue declarations require SystemVerilog.");
2656 }
2657 tmp->push_back(index);
2658 $$ = tmp;
2659 }
2660 | '[' '$' ':' expression ']'
2661 { // SystemVerilog queue with a max size
2662 list<pform_range_t> *tmp = new list<pform_range_t>;
2663 pform_range_t index (new PENull,$4);
2664 if (!gn_system_verilog()) {
2665 yyerror("error: Queue declarations require SystemVerilog.");
2666 }
2667 tmp->push_back(index);
2668 $$ = tmp;
2669 }
2670 ;
2671
2672 variable_lifetime
2673 : lifetime
2674 { if (!gn_system_verilog()) {
2675 yyerror(@1, "error: overriding the default variable lifetime "
2676 "requires SystemVerilog.");
2677 } else if ($1 != pform_peek_scope()->default_lifetime) {
2678 yyerror(@1, "sorry: overriding the default variable lifetime "
2679 "is not yet supported.");
2680 }
2681 var_lifetime = $1;
2682 }
2683 ;
2684
2685 /* Verilog-2001 supports attribute lists, which can be attached to a
2686 variety of different objects. The syntax inside the (* *) is a
2687 comma separated list of names or names with assigned values. */
2688 attribute_list_opt
2689 : attribute_instance_list
2690 { $$ = $1; }
2691 |
2692 { $$ = 0; }
2693 ;
2694
2695 attribute_instance_list
2696 : K_PSTAR K_STARP { $$ = 0; }
2697 | K_PSTAR attribute_list K_STARP { $$ = $2; }
2698 | attribute_instance_list K_PSTAR K_STARP { $$ = $1; }
2699 | attribute_instance_list K_PSTAR attribute_list K_STARP
2700 { list<named_pexpr_t>*tmp = $1;
2701 if (tmp) {
2702 tmp->splice(tmp->end(), *$3);
2703 delete $3;
2704 $$ = tmp;
2705 } else $$ = $3;
2706 }
2707 ;
2708
2709 attribute_list
2710 : attribute_list ',' attribute
2711 { list<named_pexpr_t>*tmp = $1;
2712 tmp->push_back(*$3);
2713 delete $3;
2714 $$ = tmp;
2715 }
2716 | attribute
2717 { list<named_pexpr_t>*tmp = new list<named_pexpr_t>;
2718 tmp->push_back(*$1);
2719 delete $1;
2720 $$ = tmp;
2721 }
2722 ;
2723
2724
2725 attribute
2726 : IDENTIFIER
2727 { named_pexpr_t*tmp = new named_pexpr_t;
2728 tmp->name = lex_strings.make($1);
2729 tmp->parm = 0;
2730 delete[]$1;
2731 $$ = tmp;
2732 }
2733 | IDENTIFIER '=' expression
2734 { PExpr*tmp = $3;
2735 named_pexpr_t*tmp2 = new named_pexpr_t;
2736 tmp2->name = lex_strings.make($1);
2737 tmp2->parm = tmp;
2738 delete[]$1;
2739 $$ = tmp2;
2740 }
2741 ;
2742
2743
2744 /* The block_item_decl is used in function definitions, task
2745 definitions, module definitions and named blocks. Wherever a new
2746 scope is entered, the source may declare new registers and
2747 integers. This rule matches those declarations. The containing
2748 rule has presumably set up the scope. */
2749
2750 block_item_decl
2751
2752 /* variable declarations. Note that data_type can be 0 if we are
2753 recovering from an error. */
2754
2755 : data_type register_variable_list ';'
2756 { if ($1) pform_set_data_type(@1, $1, $2, NetNet::REG, attributes_in_context);
2757 }
2758
2759 | variable_lifetime data_type register_variable_list ';'
2760 { if ($2) pform_set_data_type(@2, $2, $3, NetNet::REG, attributes_in_context);
2761 var_lifetime = LexicalScope::INHERITED;
2762 }
2763
2764 | K_reg data_type register_variable_list ';'
2765 { if ($2) pform_set_data_type(@2, $2, $3, NetNet::REG, attributes_in_context);
2766 }
2767
2768 | variable_lifetime K_reg data_type register_variable_list ';'
2769 { if ($3) pform_set_data_type(@3, $3, $4, NetNet::REG, attributes_in_context);
2770 var_lifetime = LexicalScope::INHERITED;
2771 }
2772
2773 | K_event event_variable_list ';'
2774 { if ($2) pform_make_events($2, @1.text, @1.first_line);
2775 }
2776
2777 | K_parameter param_type parameter_assign_list ';'
2778 | K_localparam param_type localparam_assign_list ';'
2779
2780 /* Blocks can have type declarations. */
2781
2782 | type_declaration
2783
2784 /* Blocks can have imports. */
2785
2786 | package_import_declaration
2787
2788 /* Recover from errors that happen within variable lists. Use the
2789 trailing semi-colon to resync the parser. */
2790
2791 | K_integer error ';'
2792 { yyerror(@1, "error: syntax error in integer variable list.");
2793 yyerrok;
2794 }
2795
2796 | K_time error ';'
2797 { yyerror(@1, "error: syntax error in time variable list.");
2798 yyerrok;
2799 }
2800
2801 | K_parameter error ';'
2802 { yyerror(@1, "error: syntax error in parameter list.");
2803 yyerrok;
2804 }
2805 | K_localparam error ';'
2806 { yyerror(@1, "error: syntax error localparam list.");
2807 yyerrok;
2808 }
2809 ;
2810
2811 block_item_decls
2812 : block_item_decl
2813 | block_item_decls block_item_decl
2814 ;
2815
2816 block_item_decls_opt
2817 : block_item_decls { $$ = true; }
2818 | { $$ = false; }
2819 ;
2820
2821 /* Type declarations are parsed here. The rule actions call pform
2822 functions that add the declaration to the current lexical scope. */
2823 type_declaration
2824 : K_typedef data_type IDENTIFIER dimensions_opt ';'
2825 { perm_string name = lex_strings.make($3);
2826 pform_set_typedef(name, $2, $4);
2827 delete[]$3;
2828 }
2829
2830 /* If the IDENTIFIER already is a typedef, it is possible for this
2831 code to override the definition, but only if the typedef is
2832 inherited from a different scope. */
2833 | K_typedef data_type TYPE_IDENTIFIER ';'
2834 { perm_string name = lex_strings.make($3.text);
2835 if (pform_test_type_identifier_local(name)) {
2836 yyerror(@3, "error: Typedef identifier \"%s\" is already a type name.", $3.text);
2837
2838 } else {
2839 pform_set_typedef(name, $2, NULL);
2840 }
2841 delete[]$3.text;
2842 }
2843
2844 /* These are forward declarations... */
2845
2846 | K_typedef K_class IDENTIFIER ';'
2847 { // Create a synthetic typedef for the class name so that the
2848 // lexor detects the name as a type.
2849 perm_string name = lex_strings.make($3);
2850 class_type_t*tmp = new class_type_t(name);
2851 FILE_NAME(tmp, @3);
2852 pform_set_typedef(name, tmp, NULL);
2853 delete[]$3;
2854 }
2855 | K_typedef K_enum IDENTIFIER ';'
2856 { yyerror(@1, "sorry: Enum forward declarations not supported yet."); }
2857 | K_typedef K_struct IDENTIFIER ';'
2858 { yyerror(@1, "sorry: Struct forward declarations not supported yet."); }
2859 | K_typedef K_union IDENTIFIER ';'
2860 { yyerror(@1, "sorry: Union forward declarations not supported yet."); }
2861 | K_typedef IDENTIFIER ';'
2862 { // Create a synthetic typedef for the class name so that the
2863 // lexor detects the name as a type.
2864 perm_string name = lex_strings.make($2);
2865 class_type_t*tmp = new class_type_t(name);
2866 FILE_NAME(tmp, @2);
2867 pform_set_typedef(name, tmp, NULL);
2868 delete[]$2;
2869 }
2870
2871 | K_typedef error ';'
2872 { yyerror(@2, "error: Syntax error in typedef clause.");
2873 yyerrok;
2874 }
2875
2876 ;
2877
2878 /* The structure for an enumeration data type is the keyword "enum",
2879 followed by the enumeration values in curly braces. Also allow
2880 for an optional base type. The default base type is "int", but it
2881 can be any of the integral or vector types. */
2882
2883 enum_data_type
2884 : K_enum '{' enum_name_list '}'
2885 { enum_type_t*enum_type = new enum_type_t;
2886 FILE_NAME(enum_type, @1);
2887 enum_type->names .reset($3);
2888 enum_type->base_type = IVL_VT_BOOL;
2889 enum_type->signed_flag = true;
2890 enum_type->integer_flag = false;
2891 enum_type->range.reset(make_range_from_width(32));
2892 $$ = enum_type;
2893 }
2894 | K_enum atom2_type signed_unsigned_opt '{' enum_name_list '}'
2895 { enum_type_t*enum_type = new enum_type_t;
2896 FILE_NAME(enum_type, @1);
2897 enum_type->names .reset($5);
2898 enum_type->base_type = IVL_VT_BOOL;
2899 enum_type->signed_flag = $3;
2900 enum_type->integer_flag = false;
2901 enum_type->range.reset(make_range_from_width($2));
2902 $$ = enum_type;
2903 }
2904 | K_enum K_integer signed_unsigned_opt '{' enum_name_list '}'
2905 { enum_type_t*enum_type = new enum_type_t;
2906 FILE_NAME(enum_type, @1);
2907 enum_type->names .reset($5);
2908 enum_type->base_type = IVL_VT_LOGIC;
2909 enum_type->signed_flag = $3;
2910 enum_type->integer_flag = true;
2911 enum_type->range.reset(make_range_from_width(integer_width));
2912 $$ = enum_type;
2913 }
2914 | K_enum K_logic unsigned_signed_opt dimensions_opt '{' enum_name_list '}'
2915 { enum_type_t*enum_type = new enum_type_t;
2916 FILE_NAME(enum_type, @1);
2917 enum_type->names .reset($6);
2918 enum_type->base_type = IVL_VT_LOGIC;
2919 enum_type->signed_flag = $3;
2920 enum_type->integer_flag = false;
2921 enum_type->range.reset($4 ? $4 : make_range_from_width(1));
2922 $$ = enum_type;
2923 }
2924 | K_enum K_reg unsigned_signed_opt dimensions_opt '{' enum_name_list '}'
2925 { enum_type_t*enum_type = new enum_type_t;
2926 FILE_NAME(enum_type, @1);
2927 enum_type->names .reset($6);
2928 enum_type->base_type = IVL_VT_LOGIC;
2929 enum_type->signed_flag = $3;
2930 enum_type->integer_flag = false;
2931 enum_type->range.reset($4 ? $4 : make_range_from_width(1));
2932 $$ = enum_type;
2933 }
2934 | K_enum K_bit unsigned_signed_opt dimensions_opt '{' enum_name_list '}'
2935 { enum_type_t*enum_type = new enum_type_t;
2936 FILE_NAME(enum_type, @1);
2937 enum_type->names .reset($6);
2938 enum_type->base_type = IVL_VT_BOOL;
2939 enum_type->signed_flag = $3;
2940 enum_type->integer_flag = false;
2941 enum_type->range.reset($4 ? $4 : make_range_from_width(1));
2942 $$ = enum_type;
2943 }
2944 ;
2945
2946 enum_name_list
2947 : enum_name
2948 { $$ = $1;
2949 }
2950 | enum_name_list ',' enum_name
2951 { list<named_pexpr_t>*lst = $1;
2952 lst->splice(lst->end(), *$3);
2953 delete $3;
2954 $$ = lst;
2955 }
2956 ;
2957
2958 pos_neg_number
2959 : number
2960 { $$ = $1;
2961 }
2962 | '-' number
2963 { verinum tmp = -(*($2));
2964 *($2) = tmp;
2965 $$ = $2;
2966 }
2967 ;
2968
2969 enum_name
2970 : IDENTIFIER
2971 { perm_string name = lex_strings.make($1);
2972 delete[]$1;
2973 $$ = make_named_number(name);
2974 }
2975 | IDENTIFIER '[' pos_neg_number ']'
2976 { perm_string name = lex_strings.make($1);
2977 long count = check_enum_seq_value(@1, $3, false);
2978 delete[]$1;
2979 $$ = make_named_numbers(name, 0, count-1);
2980 delete $3;
2981 }
2982 | IDENTIFIER '[' pos_neg_number ':' pos_neg_number ']'
2983 { perm_string name = lex_strings.make($1);
2984 $$ = make_named_numbers(name, check_enum_seq_value(@1, $3, true),
2985 check_enum_seq_value(@1, $5, true));
2986 delete[]$1;
2987 delete $3;
2988 delete $5;
2989 }
2990 | IDENTIFIER '=' expression
2991 { perm_string name = lex_strings.make($1);
2992 delete[]$1;
2993 $$ = make_named_number(name, $3);
2994 }
2995 | IDENTIFIER '[' pos_neg_number ']' '=' expression
2996 { perm_string name = lex_strings.make($1);
2997 long count = check_enum_seq_value(@1, $3, false);
2998 $$ = make_named_numbers(name, 0, count-1, $6);
2999 delete[]$1;
3000 delete $3;
3001 }
3002 | IDENTIFIER '[' pos_neg_number ':' pos_neg_number ']' '=' expression
3003 { perm_string name = lex_strings.make($1);
3004 $$ = make_named_numbers(name, check_enum_seq_value(@1, $3, true),
3005 check_enum_seq_value(@1, $5, true), $8);
3006 delete[]$1;
3007 delete $3;
3008 delete $5;
3009 }
3010 ;
3011
3012 struct_data_type
3013 : K_struct K_packed_opt '{' struct_union_member_list '}'
3014 { struct_type_t*tmp = new struct_type_t;
3015 FILE_NAME(tmp, @1);
3016 tmp->packed_flag = $2;
3017 tmp->union_flag = false;
3018 tmp->members .reset($4);
3019 $$ = tmp;
3020 }
3021 | K_union K_packed_opt '{' struct_union_member_list '}'
3022 { struct_type_t*tmp = new struct_type_t;
3023 FILE_NAME(tmp, @1);
3024 tmp->packed_flag = $2;
3025 tmp->union_flag = true;
3026 tmp->members .reset($4);
3027 $$ = tmp;
3028 }
3029 | K_struct K_packed_opt '{' error '}'
3030 { yyerror(@3, "error: Errors in struct member list.");
3031 yyerrok;
3032 struct_type_t*tmp = new struct_type_t;
3033 FILE_NAME(tmp, @1);
3034 tmp->packed_flag = $2;
3035 tmp->union_flag = false;
3036 $$ = tmp;
3037 }
3038 | K_union K_packed_opt '{' error '}'
3039 { yyerror(@3, "error: Errors in union member list.");
3040 yyerrok;
3041 struct_type_t*tmp = new struct_type_t;
3042 FILE_NAME(tmp, @1);
3043 tmp->packed_flag = $2;
3044 tmp->union_flag = true;
3045 $$ = tmp;
3046 }
3047 ;
3048
3049 /* This is an implementation of the rule snippet:
3050 struct_union_member { struct_union_member }
3051 that is used in the rule matching struct and union types
3052 in IEEE 1800-2012 A.2.2.1. */
3053 struct_union_member_list
3054 : struct_union_member_list struct_union_member
3055 { list<struct_member_t*>*tmp = $1;
3056 tmp->push_back($2);
3057 $$ = tmp;
3058 }
3059 | struct_union_member
3060 { list<struct_member_t*>*tmp = new list<struct_member_t*>;
3061 tmp->push_back($1);
3062 $$ = tmp;
3063 }
3064 ;
3065
3066 struct_union_member /* IEEE 1800-2012 A.2.2.1 */
3067 : attribute_list_opt data_type list_of_variable_decl_assignments ';'
3068 { struct_member_t*tmp = new struct_member_t;
3069 FILE_NAME(tmp, @2);
3070 tmp->type .reset($2);
3071 tmp->names .reset($3);
3072 $$ = tmp;
3073 }
3074 | error ';'
3075 { yyerror(@2, "Error in struct/union member.");
3076 yyerrok;
3077 $$ = 0;
3078 }
3079 ;
3080
3081 case_item
3082 : expression_list_proper ':' statement_or_null
3083 { PCase::Item*tmp = new PCase::Item;
3084 tmp->expr = *$1;
3085 tmp->stat = $3;
3086 delete $1;
3087 $$ = tmp;
3088 }
3089 | K_default ':' statement_or_null
3090 { PCase::Item*tmp = new PCase::Item;
3091 tmp->stat = $3;
3092 $$ = tmp;
3093 }
3094 | K_default statement_or_null
3095 { PCase::Item*tmp = new PCase::Item;
3096 tmp->stat = $2;
3097 $$ = tmp;
3098 }
3099 | error ':' statement_or_null
3100 { yyerror(@2, "error: Incomprehensible case expression.");
3101 yyerrok;
3102 }
3103 ;
3104
3105 case_items
3106 : case_items case_item
3107 { svector<PCase::Item*>*tmp;
3108 tmp = new svector<PCase::Item*>(*$1, $2);
3109 delete $1;
3110 $$ = tmp;
3111 }
3112 | case_item
3113 { svector<PCase::Item*>*tmp = new svector<PCase::Item*>(1);
3114 (*tmp)[0] = $1;
3115 $$ = tmp;
3116 }
3117 ;
3118
3119 charge_strength
3120 : '(' K_small ')'
3121 | '(' K_medium ')'
3122 | '(' K_large ')'
3123 ;
3124
3125 charge_strength_opt
3126 : charge_strength
3127 |
3128 ;
3129
3130 defparam_assign
3131 : hierarchy_identifier '=' expression
3132 { pform_set_defparam(*$1, $3);
3133 delete $1;
3134 }
3135 ;
3136
3137 defparam_assign_list
3138 : defparam_assign
3139 | dimensions defparam_assign
3140 { yyerror(@1, "error: defparam may not include a range.");
3141 delete $1;
3142 }
3143 | defparam_assign_list ',' defparam_assign
3144 ;
3145
3146 delay1
3147 : '#' delay_value_simple
3148 { list<PExpr*>*tmp = new list<PExpr*>;
3149 tmp->push_back($2);
3150 $$ = tmp;
3151 }
3152 | '#' '(' delay_value ')'
3153 { list<PExpr*>*tmp = new list<PExpr*>;
3154 tmp->push_back($3);
3155 $$ = tmp;
3156 }
3157 ;
3158
3159 delay3
3160 : '#' delay_value_simple
3161 { list<PExpr*>*tmp = new list<PExpr*>;
3162 tmp->push_back($2);
3163 $$ = tmp;
3164 }
3165 | '#' '(' delay_value ')'
3166 { list<PExpr*>*tmp = new list<PExpr*>;
3167 tmp->push_back($3);
3168 $$ = tmp;
3169 }
3170 | '#' '(' delay_value ',' delay_value ')'
3171 { list<PExpr*>*tmp = new list<PExpr*>;
3172 tmp->push_back($3);
3173 tmp->push_back($5);
3174 $$ = tmp;
3175 }
3176 | '#' '(' delay_value ',' delay_value ',' delay_value ')'
3177 { list<PExpr*>*tmp = new list<PExpr*>;
3178 tmp->push_back($3);
3179 tmp->push_back($5);
3180 tmp->push_back($7);
3181 $$ = tmp;
3182 }
3183 ;
3184
3185 delay3_opt
3186 : delay3 { $$ = $1; }
3187 | { $$ = 0; }
3188 ;
3189
3190 delay_value_list
3191 : delay_value
3192 { list<PExpr*>*tmp = new list<PExpr*>;
3193 tmp->push_back($1);
3194 $$ = tmp;
3195 }
3196 | delay_value_list ',' delay_value
3197 { list<PExpr*>*tmp = $1;
3198 tmp->push_back($3);
3199 $$ = tmp;
3200 }
3201 ;
3202
3203 delay_value
3204 : expression
3205 { PExpr*tmp = $1;
3206 $$ = tmp;
3207 }
3208 | expression ':' expression ':' expression
3209 { $$ = pform_select_mtm_expr($1, $3, $5); }
3210 ;
3211
3212
3213 delay_value_simple
3214 : DEC_NUMBER
3215 { verinum*tmp = $1;
3216 if (tmp == 0) {
3217 yyerror(@1, "internal error: delay.");
3218 $$ = 0;
3219 } else {
3220 $$ = new PENumber(tmp);
3221 FILE_NAME($$, @1);
3222 }
3223 based_size = 0;
3224 }
3225 | REALTIME
3226 { verireal*tmp = $1;
3227 if (tmp == 0) {
3228 yyerror(@1, "internal error: delay.");
3229 $$ = 0;
3230 } else {
3231 $$ = new PEFNumber(tmp);
3232 FILE_NAME($$, @1);
3233 }
3234 }
3235 | IDENTIFIER
3236 { PEIdent*tmp = new PEIdent(lex_strings.make($1));
3237 FILE_NAME(tmp, @1);
3238 $$ = tmp;
3239 delete[]$1;
3240 }
3241 | TIME_LITERAL
3242 { int unit;
3243
3244 based_size = 0;
3245 $$ = 0;
3246 if ($1 == 0 || !get_time_unit($1, unit))
3247 yyerror(@1, "internal error: delay.");
3248 else {
3249 double p = pow(10.0,
3250 (double)(unit - pform_get_timeunit()));
3251 double time = atof($1) * p;
3252
3253 verireal *v = new verireal(time);
3254 $$ = new PEFNumber(v);
3255 FILE_NAME($$, @1);
3256 }
3257 }
3258 ;
3259
3260 /* The discipline and nature declarations used to take no ';' after
3261 the identifier. The 2.3 LRM adds the ';', but since there are
3262 programs written to the 2.1 and 2.2 standard that don't, we
3263 choose to make the ';' optional in this context. */
3264 optional_semicolon : ';' | ;
3265
3266 discipline_declaration
3267 : K_discipline IDENTIFIER optional_semicolon
3268 { pform_start_discipline($2); }
3269 discipline_items K_enddiscipline
3270 { pform_end_discipline(@1); delete[] $2; }
3271 ;
3272
3273 discipline_items
3274 : discipline_items discipline_item
3275 | discipline_item
3276 ;
3277
3278 discipline_item
3279 : K_domain K_discrete ';'
3280 { pform_discipline_domain(@1, IVL_DIS_DISCRETE); }
3281 | K_domain K_continuous ';'
3282 { pform_discipline_domain(@1, IVL_DIS_CONTINUOUS); }
3283 | K_potential IDENTIFIER ';'
3284 { pform_discipline_potential(@1, $2); delete[] $2; }
3285 | K_flow IDENTIFIER ';'
3286 { pform_discipline_flow(@1, $2); delete[] $2; }
3287 ;
3288
3289 nature_declaration
3290 : K_nature IDENTIFIER optional_semicolon
3291 { pform_start_nature($2); }
3292 nature_items
3293 K_endnature
3294 { pform_end_nature(@1); delete[] $2; }
3295 ;
3296
3297 nature_items
3298 : nature_items nature_item
3299 | nature_item
3300 ;
3301
3302 nature_item
3303 : K_units '=' STRING ';'
3304 { delete[] $3; }
3305 | K_abstol '=' expression ';'
3306 | K_access '=' IDENTIFIER ';'
3307 { pform_nature_access(@1, $3); delete[] $3; }
3308 | K_idt_nature '=' IDENTIFIER ';'
3309 { delete[] $3; }
3310 | K_ddt_nature '=' IDENTIFIER ';'
3311 { delete[] $3; }
3312 ;
3313
3314 config_declaration
3315 : K_config IDENTIFIER ';'
3316 K_design lib_cell_identifiers ';'
3317 list_of_config_rule_statements
3318 K_endconfig
3319 { cerr << @1 << ": sorry: config declarations are not supported and "
3320 "will be skipped." << endl;
3321 delete[] $2;
3322 }
3323 ;
3324
3325 lib_cell_identifiers
3326 : /* The BNF implies this can be blank, but I'm not sure exactly what
3327 * this means. */
3328 | lib_cell_identifiers lib_cell_id
3329 ;
3330
3331 list_of_config_rule_statements
3332 : /* config rules are optional. */
3333 | list_of_config_rule_statements config_rule_statement
3334 ;
3335
3336 config_rule_statement
3337 : K_default K_liblist list_of_libraries ';'
3338 | K_instance hierarchy_identifier K_liblist list_of_libraries ';'
3339 { delete $2; }
3340 | K_instance hierarchy_identifier K_use lib_cell_id opt_config ';'
3341 { delete $2; }
3342 | K_cell lib_cell_id K_liblist list_of_libraries ';'
3343 | K_cell lib_cell_id K_use lib_cell_id opt_config ';'
3344 ;
3345
3346 opt_config
3347 : /* The use clause takes an optional :config. */
3348 | ':' K_config
3349 ;
3350
3351 lib_cell_id
3352 : IDENTIFIER
3353 { delete[] $1; }
3354 | IDENTIFIER '.' IDENTIFIER
3355 { delete[] $1; delete[] $3; }
3356 ;
3357
3358 list_of_libraries
3359 : /* A NULL library means use the parents cell library. */
3360 | list_of_libraries IDENTIFIER
3361 { delete[] $2; }
3362 ;
3363
3364 drive_strength
3365 : '(' dr_strength0 ',' dr_strength1 ')'
3366 { $$.str0 = $2.str0;
3367 $$.str1 = $4.str1;
3368 }
3369 | '(' dr_strength1 ',' dr_strength0 ')'
3370 { $$.str0 = $4.str0;
3371 $$.str1 = $2.str1;
3372 }
3373 | '(' dr_strength0 ',' K_highz1 ')'
3374 { $$.str0 = $2.str0;
3375 $$.str1 = IVL_DR_HiZ;
3376 }
3377 | '(' dr_strength1 ',' K_highz0 ')'
3378 { $$.str0 = IVL_DR_HiZ;
3379 $$.str1 = $2.str1;
3380 }
3381 | '(' K_highz1 ',' dr_strength0 ')'
3382 { $$.str0 = $4.str0;
3383 $$.str1 = IVL_DR_HiZ;
3384 }
3385 | '(' K_highz0 ',' dr_strength1 ')'
3386 { $$.str0 = IVL_DR_HiZ;
3387 $$.str1 = $4.str1;
3388 }
3389 ;
3390
3391 drive_strength_opt
3392 : drive_strength { $$ = $1; }
3393 | { $$.str0 = IVL_DR_STRONG; $$.str1 = IVL_DR_STRONG; }
3394 ;
3395
3396 dr_strength0
3397 : K_supply0 { $$.str0 = IVL_DR_SUPPLY; }
3398 | K_strong0 { $$.str0 = IVL_DR_STRONG; }
3399 | K_pull0 { $$.str0 = IVL_DR_PULL; }
3400 | K_weak0 { $$.str0 = IVL_DR_WEAK; }
3401 ;
3402
3403 dr_strength1
3404 : K_supply1 { $$.str1 = IVL_DR_SUPPLY; }
3405 | K_strong1 { $$.str1 = IVL_DR_STRONG; }
3406 | K_pull1 { $$.str1 = IVL_DR_PULL; }
3407 | K_weak1 { $$.str1 = IVL_DR_WEAK; }
3408 ;
3409
3410 clocking_event_opt /* */
3411 : event_control
3412 |
3413 ;
3414
3415 event_control /* A.K.A. clocking_event */
3416 : '@' hierarchy_identifier
3417 { PEIdent*tmpi = pform_new_ident(@2, *$2);
3418 FILE_NAME(tmpi, @2);
3419 PEEvent*tmpe = new PEEvent(PEEvent::ANYEDGE, tmpi);
3420 PEventStatement*tmps = new PEventStatement(tmpe);
3421 FILE_NAME(tmps, @1);
3422 $$ = tmps;
3423 delete $2;
3424 }
3425 | '@' '(' event_expression_list ')'
3426 { PEventStatement*tmp = new PEventStatement(*$3);
3427 FILE_NAME(tmp, @1);
3428 delete $3;
3429 $$ = tmp;
3430 }
3431 | '@' '(' error ')'
3432 { yyerror(@1, "error: Malformed event control expression.");
3433 $$ = 0;
3434 }
3435 ;
3436
3437 event_expression_list
3438 : event_expression
3439 { $$ = $1; }
3440 | event_expression_list K_or event_expression
3441 { svector<PEEvent*>*tmp = new svector<PEEvent*>(*$1, *$3);
3442 delete $1;
3443 delete $3;
3444 $$ = tmp;
3445 }
3446 | event_expression_list ',' event_expression
3447 { svector<PEEvent*>*tmp = new svector<PEEvent*>(*$1, *$3);
3448 delete $1;
3449 delete $3;
3450 $$ = tmp;
3451 }
3452 ;
3453
3454 event_expression
3455 : K_posedge expression
3456 { PEEvent*tmp = new PEEvent(PEEvent::POSEDGE, $2);
3457 FILE_NAME(tmp, @1);
3458 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
3459 (*tl)[0] = tmp;
3460 $$ = tl;
3461 }
3462 | K_negedge expression
3463 { PEEvent*tmp = new PEEvent(PEEvent::NEGEDGE, $2);
3464 FILE_NAME(tmp, @1);
3465 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
3466 (*tl)[0] = tmp;
3467 $$ = tl;
3468 }
3469 | expression
3470 { PEEvent*tmp = new PEEvent(PEEvent::ANYEDGE, $1);
3471 FILE_NAME(tmp, @1);
3472 svector<PEEvent*>*tl = new svector<PEEvent*>(1);
3473 (*tl)[0] = tmp;
3474 $$ = tl;
3475 }
3476 ;
3477
3478 /* A branch probe expression applies a probe function (potential or
3479 flow) to a branch. The branch may be implicit as a pair of nets
3480 or explicit as a named branch. Elaboration will check that the
3481 function name really is a nature attribute identifier. */
3482 branch_probe_expression
3483 : IDENTIFIER '(' IDENTIFIER ',' IDENTIFIER ')'
3484 { $$ = pform_make_branch_probe_expression(@1, $1, $3, $5); }
3485 | IDENTIFIER '(' IDENTIFIER ')'
3486 { $$ = pform_make_branch_probe_expression(@1, $1, $3); }
3487 ;
3488
3489 expression
3490 : expr_primary_or_typename
3491 { $$ = $1; }
3492 | inc_or_dec_expression
3493 { $$ = $1; }
3494 | inside_expression
3495 { $$ = $1; }
3496 | '+' attribute_list_opt expr_primary %prec UNARY_PREC
3497 { $$ = $3; }
3498 | '-' attribute_list_opt expr_primary %prec UNARY_PREC
3499 { PEUnary*tmp = new PEUnary('-', $3);
3500 FILE_NAME(tmp, @3);
3501 $$ = tmp;
3502 }
3503 | '~' attribute_list_opt expr_primary %prec UNARY_PREC
3504 { PEUnary*tmp = new PEUnary('~', $3);
3505 FILE_NAME(tmp, @3);
3506 $$ = tmp;
3507 }
3508 | '&' attribute_list_opt expr_primary %prec UNARY_PREC
3509 { PEUnary*tmp = new PEUnary('&', $3);
3510 FILE_NAME(tmp, @3);
3511 $$ = tmp;
3512 }
3513 | '!' attribute_list_opt expr_primary %prec UNARY_PREC
3514 { PEUnary*tmp = new PEUnary('!', $3);
3515 FILE_NAME(tmp, @3);
3516 $$ = tmp;
3517 }
3518 | '|' attribute_list_opt expr_primary %prec UNARY_PREC
3519 { PEUnary*tmp = new PEUnary('|', $3);
3520 FILE_NAME(tmp, @3);
3521 $$ = tmp;
3522 }
3523 | '^' attribute_list_opt expr_primary %prec UNARY_PREC
3524 { PEUnary*tmp = new PEUnary('^', $3);
3525 FILE_NAME(tmp, @3);
3526 $$ = tmp;
3527 }
3528 | '~' '&' attribute_list_opt expr_primary %prec UNARY_PREC
3529 { yyerror(@1, "error: '~' '&' is not a valid expression. "
3530 "Please use operator '~&' instead.");
3531 $$ = 0;
3532 }
3533 | '~' '|' attribute_list_opt expr_primary %prec UNARY_PREC
3534 { yyerror(@1, "error: '~' '|' is not a valid expression. "
3535 "Please use operator '~|' instead.");
3536 $$ = 0;
3537 }
3538 | '~' '^' attribute_list_opt expr_primary %prec UNARY_PREC
3539 { yyerror(@1, "error: '~' '^' is not a valid expression. "
3540 "Please use operator '~^' instead.");
3541 $$ = 0;
3542 }
3543 | K_NAND attribute_list_opt expr_primary %prec UNARY_PREC
3544 { PEUnary*tmp = new PEUnary('A', $3);
3545 FILE_NAME(tmp, @3);
3546 $$ = tmp;
3547 }
3548 | K_NOR attribute_list_opt expr_primary %prec UNARY_PREC
3549 { PEUnary*tmp = new PEUnary('N', $3);
3550 FILE_NAME(tmp, @3);
3551 $$ = tmp;
3552 }
3553 | K_NXOR attribute_list_opt expr_primary %prec UNARY_PREC
3554 { PEUnary*tmp = new PEUnary('X', $3);
3555 FILE_NAME(tmp, @3);
3556 $$ = tmp;
3557 }
3558 | '!' error %prec UNARY_PREC
3559 { yyerror(@1, "error: Operand of unary ! "
3560 "is not a primary expression.");
3561 $$ = 0;
3562 }
3563 | '^' error %prec UNARY_PREC
3564 { yyerror(@1, "error: Operand of reduction ^ "
3565 "is not a primary expression.");
3566 $$ = 0;
3567 }
3568 | expression '^' attribute_list_opt expression
3569 { PEBinary*tmp = new PEBinary('^', $1, $4);
3570 FILE_NAME(tmp, @2);
3571 $$ = tmp;
3572 }
3573 | expression K_POW attribute_list_opt expression
3574 { PEBinary*tmp = new PEBPower('p', $1, $4);
3575 FILE_NAME(tmp, @2);
3576 $$ = tmp;
3577 }
3578 | expression '*' attribute_list_opt expression
3579 { PEBinary*tmp = new PEBinary('*', $1, $4);
3580 FILE_NAME(tmp, @2);
3581 $$ = tmp;
3582 }
3583 | expression '/' attribute_list_opt expression
3584 { PEBinary*tmp = new PEBinary('/', $1, $4);
3585 FILE_NAME(tmp, @2);
3586 $$ = tmp;
3587 }
3588 | expression '%' attribute_list_opt expression
3589 { PEBinary*tmp = new PEBinary('%', $1, $4);
3590 FILE_NAME(tmp, @2);
3591 $$ = tmp;
3592 }
3593 | expression '+' attribute_list_opt expression
3594 { PEBinary*tmp = new PEBinary('+', $1, $4);
3595 FILE_NAME(tmp, @2);
3596 $$ = tmp;
3597 }
3598 | expression '-' attribute_list_opt expression
3599 { PEBinary*tmp = new PEBinary('-', $1, $4);
3600 FILE_NAME(tmp, @2);
3601 $$ = tmp;
3602 }
3603 | expression '&' attribute_list_opt expression
3604 { PEBinary*tmp = new PEBinary('&', $1, $4);
3605 FILE_NAME(tmp, @2);
3606 $$ = tmp;
3607 }
3608 | expression '|' attribute_list_opt expression
3609 { PEBinary*tmp = new PEBinary('|', $1, $4);
3610 FILE_NAME(tmp, @2);
3611 $$ = tmp;
3612 }
3613 | expression K_NAND attribute_list_opt expression
3614 { PEBinary*tmp = new PEBinary('A', $1, $4);
3615 FILE_NAME(tmp, @2);
3616 $$ = tmp;
3617 }
3618 | expression K_NOR attribute_list_opt expression
3619 { PEBinary*tmp = new PEBinary('O', $1, $4);
3620 FILE_NAME(tmp, @2);
3621 $$ = tmp;
3622 }
3623 | expression K_NXOR attribute_list_opt expression
3624 { PEBinary*tmp = new PEBinary('X', $1, $4);
3625 FILE_NAME(tmp, @2);
3626 $$ = tmp;
3627 }
3628 | expression '<' attribute_list_opt expression
3629 { PEBinary*tmp = new PEBComp('<', $1, $4);
3630 FILE_NAME(tmp, @2);
3631 $$ = tmp;
3632 }
3633 | expression '>' attribute_list_opt expression
3634 { PEBinary*tmp = new PEBComp('>', $1, $4);
3635 FILE_NAME(tmp, @2);
3636 $$ = tmp;
3637 }
3638 | expression K_LS attribute_list_opt expression
3639 { PEBinary*tmp = new PEBShift('l', $1, $4);
3640 FILE_NAME(tmp, @2);
3641 $$ = tmp;
3642 }
3643 | expression K_RS attribute_list_opt expression
3644 { PEBinary*tmp = new PEBShift('r', $1, $4);
3645 FILE_NAME(tmp, @2);
3646 $$ = tmp;
3647 }
3648 | expression K_RSS attribute_list_opt expression
3649 { PEBinary*tmp = new PEBShift('R', $1, $4);
3650 FILE_NAME(tmp, @2);
3651 $$ = tmp;
3652 }
3653 | expression K_EQ attribute_list_opt expression
3654 { PEBinary*tmp = new PEBComp('e', $1, $4);
3655 FILE_NAME(tmp, @2);
3656 $$ = tmp;
3657 }
3658 | expression K_CEQ attribute_list_opt expression
3659 { PEBinary*tmp = new PEBComp('E', $1, $4);
3660 FILE_NAME(tmp, @2);
3661 $$ = tmp;
3662 }
3663 | expression K_WEQ attribute_list_opt expression
3664 { PEBinary*tmp = new PEBComp('w', $1, $4);
3665 FILE_NAME(tmp, @2);
3666 $$ = tmp;
3667 }
3668 | expression K_LE attribute_list_opt expression
3669 { PEBinary*tmp = new PEBComp('L', $1, $4);
3670 FILE_NAME(tmp, @2);
3671 $$ = tmp;
3672 }
3673 | expression K_GE attribute_list_opt expression
3674 { PEBinary*tmp = new PEBComp('G', $1, $4);
3675 FILE_NAME(tmp, @2);
3676 $$ = tmp;
3677 }
3678 | expression K_NE attribute_list_opt expression
3679 { PEBinary*tmp = new PEBComp('n', $1, $4);
3680 FILE_NAME(tmp, @2);
3681 $$ = tmp;
3682 }
3683 | expression K_CNE attribute_list_opt expression
3684 { PEBinary*tmp = new PEBComp('N', $1, $4);
3685 FILE_NAME(tmp, @2);
3686 $$ = tmp;
3687 }
3688 | expression K_WNE attribute_list_opt expression
3689 { PEBinary*tmp = new PEBComp('W', $1, $4);
3690 FILE_NAME(tmp, @2);
3691 $$ = tmp;
3692 }
3693 | expression K_LOR attribute_list_opt expression
3694 { PEBinary*tmp = new PEBLogic('o', $1, $4);
3695 FILE_NAME(tmp, @2);
3696 $$ = tmp;
3697 }
3698 | expression K_LAND attribute_list_opt expression
3699 { PEBinary*tmp = new PEBLogic('a', $1, $4);
3700 FILE_NAME(tmp, @2);
3701 $$ = tmp;
3702 }
3703 /*
3704 FIXME: This creates shift/reduce issues that need to be solved
3705 | expression K_TRIGGER attribute_list_opt expression
3706 { PEBinary*tmp = new PEBLogic('q', $1, $4);
3707 FILE_NAME(tmp, @2);
3708 $$ = tmp;
3709 }
3710 */
3711 | expression K_LEQUIV attribute_list_opt expression
3712 { PEBinary*tmp = new PEBLogic('Q', $1, $4);
3713 FILE_NAME(tmp, @2);
3714 $$ = tmp;
3715 }
3716 | expression '?' attribute_list_opt expression ':' expression
3717 { PETernary*tmp = new PETernary($1, $4, $6);
3718 FILE_NAME(tmp, @2);
3719 $$ = tmp;
3720 }
3721 ;
3722
3723 expr_mintypmax
3724 : expression
3725 { $$ = $1; }
3726 | expression ':' expression ':' expression
3727 { switch (min_typ_max_flag) {
3728 case MIN:
3729 $$ = $1;
3730 delete $3;
3731 delete $5;
3732 break;
3733 case TYP:
3734 delete $1;
3735 $$ = $3;
3736 delete $5;
3737 break;
3738 case MAX:
3739 delete $1;
3740 delete $3;
3741 $$ = $5;
3742 break;
3743 }
3744 if (min_typ_max_warn > 0) {
3745 cerr << $$->get_fileline() << ": warning: choosing ";
3746 switch (min_typ_max_flag) {
3747 case MIN:
3748 cerr << "min";
3749 break;
3750 case TYP:
3751 cerr << "typ";
3752 break;
3753 case MAX:
3754 cerr << "max";
3755 break;
3756 }
3757 cerr << " expression." << endl;
3758 min_typ_max_warn -= 1;
3759 }
3760 }
3761 ;
3762
3763
3764 /* Many contexts take a comma separated list of expressions. Null
3765 expressions can happen anywhere in the list, so there are two
3766 extra rules in expression_list_with_nuls for parsing and
3767 installing those nulls.
3768
3769 The expression_list_proper rules do not allow null items in the
3770 expression list, so can be used where nul expressions are not allowed. */
3771
3772 expression_list_with_nuls
3773 : expression_list_with_nuls ',' expression
3774 { list<PExpr*>*tmp = $1;
3775 if (tmp->empty()) tmp->push_back(0);
3776 tmp->push_back($3);
3777 $$ = tmp;
3778 }
3779 | expression
3780 { list<PExpr*>*tmp = new list<PExpr*>;
3781 tmp->push_back($1);
3782 $$ = tmp;
3783 }
3784 |
3785 { list<PExpr*>*tmp = new list<PExpr*>;
3786 $$ = tmp;
3787 }
3788 | expression_list_with_nuls ','
3789 { list<PExpr*>*tmp = $1;
3790 if (tmp->empty()) tmp->push_back(0);
3791 tmp->push_back(0);
3792 $$ = tmp;
3793 }
3794 ;
3795
3796 expression_list_proper
3797 : expression_list_proper ',' expression
3798 { list<PExpr*>*tmp = $1;
3799 tmp->push_back($3);
3800 $$ = tmp;
3801 }
3802 | expression
3803 { list<PExpr*>*tmp = new list<PExpr*>;
3804 tmp->push_back($1);
3805 $$ = tmp;
3806 }
3807 ;
3808
3809 expr_primary_or_typename
3810 : expr_primary
3811
3812 /* There are a few special cases (notably $bits argument) where the
3813 expression may be a type name. Let the elaborator sort this out. */
3814 | TYPE_IDENTIFIER
3815 { pform_set_type_referenced(@1, $1.text);
3816 PETypename*tmp = new PETypename($1.type);
3817 FILE_NAME(tmp,@1);
3818 $$ = tmp;
3819 delete[]$1.text;
3820 }
3821
3822 ;
3823
3824 expr_primary
3825 : number
3826 { assert($1);
3827 PENumber*tmp = new PENumber($1);
3828 FILE_NAME(tmp, @1);
3829 $$ = tmp;
3830 }
3831 | REALTIME
3832 { PEFNumber*tmp = new PEFNumber($1);
3833 FILE_NAME(tmp, @1);
3834 $$ = tmp;
3835 }
3836 | STRING
3837 { PEString*tmp = new PEString($1);
3838 FILE_NAME(tmp, @1);
3839 $$ = tmp;
3840 }
3841 | TIME_LITERAL
3842 { int unit;
3843
3844 based_size = 0;
3845 $$ = 0;
3846 if ($1 == 0 || !get_time_unit($1, unit))
3847 yyerror(@1, "internal error: delay.");
3848 else {
3849 double p = pow(10.0, (double)(unit - pform_get_timeunit()));
3850 double time = atof($1) * p;
3851
3852 verireal *v = new verireal(time);
3853 $$ = new PEFNumber(v);
3854 FILE_NAME($$, @1);
3855 }
3856 }
3857 | SYSTEM_IDENTIFIER
3858 { perm_string tn = lex_strings.make($1);
3859 PECallFunction*tmp = new PECallFunction(tn);
3860 FILE_NAME(tmp, @1);
3861 $$ = tmp;
3862 delete[]$1;
3863 }
3864
3865 /* The hierarchy_identifier rule matches simple identifiers as well as
3866 indexed arrays and part selects */
3867
3868 | hierarchy_identifier
3869 { PEIdent*tmp = pform_new_ident(@1, *$1);
3870 FILE_NAME(tmp, @1);
3871 $$ = tmp;
3872 delete $1;
3873 }
3874
3875 | PACKAGE_IDENTIFIER K_SCOPE_RES hierarchy_identifier
3876 { $$ = pform_package_ident(@2, $1, $3);
3877 delete $3;
3878 }
3879
3880 /* An identifier followed by an expression list in parentheses is a
3881 function call. If a system identifier, then a system function
3882 call. It can also be a call to a class method (function). */
3883
3884 | hierarchy_identifier attribute_list_opt '(' expression_list_with_nuls ')'
3885 { list<PExpr*>*expr_list = $4;
3886 strip_tail_items(expr_list);
3887 PECallFunction*tmp = pform_make_call_function(@1, *$1, *expr_list);
3888 delete $1;
3889 delete $2;
3890 $$ = tmp;
3891 }
3892 | implicit_class_handle '.' hierarchy_identifier '(' expression_list_with_nuls ')'
3893 { pform_name_t*t_name = $1;
3894 while (! $3->empty()) {
3895 t_name->push_back($3->front());
3896 $3->pop_front();
3897 }
3898 list<PExpr*>*expr_list = $5;
3899 strip_tail_items(expr_list);
3900 PECallFunction*tmp = pform_make_call_function(@1, *t_name, *expr_list);
3901 delete $1;
3902 delete $3;
3903 $$ = tmp;
3904 }
3905 | SYSTEM_IDENTIFIER '(' expression_list_proper ')'
3906 { perm_string tn = lex_strings.make($1);
3907 PECallFunction*tmp = new PECallFunction(tn, *$3);
3908 FILE_NAME(tmp, @1);
3909 delete[]$1;
3910 $$ = tmp;
3911 }
3912 | PACKAGE_IDENTIFIER K_SCOPE_RES IDENTIFIER '(' expression_list_proper ')'
3913 { perm_string use_name = lex_strings.make($3);
3914 PECallFunction*tmp = new PECallFunction($1, use_name, *$5);
3915 FILE_NAME(tmp, @3);
3916 delete[]$3;
3917 $$ = tmp;
3918 }
3919 | SYSTEM_IDENTIFIER '(' ')'
3920 { perm_string tn = lex_strings.make($1);
3921 const vector<PExpr*>empty;
3922 PECallFunction*tmp = new PECallFunction(tn, empty);
3923 FILE_NAME(tmp, @1);
3924 delete[]$1;
3925 $$ = tmp;
3926 if (!gn_system_verilog()) {
3927 yyerror(@1, "error: Empty function argument list requires SystemVerilog.");
3928 }
3929 }
3930
3931 | implicit_class_handle
3932 { PEIdent*tmp = new PEIdent(*$1);
3933 FILE_NAME(tmp,@1);
3934 delete $1;
3935 $$ = tmp;
3936 }
3937
3938 | implicit_class_handle '.' hierarchy_identifier
3939 { pform_name_t*t_name = $1;
3940 while (! $3->empty()) {
3941 t_name->push_back($3->front());
3942 $3->pop_front();
3943 }
3944 PEIdent*tmp = new PEIdent(*t_name);
3945 FILE_NAME(tmp,@1);
3946 delete $1;
3947 delete $3;
3948 $$ = tmp;
3949 }
3950
3951 /* Many of the VAMS built-in functions are available as builtin
3952 functions with $system_function equivalents. */
3953
3954 | K_acos '(' expression ')'
3955 { perm_string tn = perm_string::literal("$acos");
3956 PECallFunction*tmp = make_call_function(tn, $3);
3957 FILE_NAME(tmp,@1);
3958 $$ = tmp;
3959 }
3960
3961 | K_acosh '(' expression ')'
3962 { perm_string tn = perm_string::literal("$acosh");
3963 PECallFunction*tmp = make_call_function(tn, $3);
3964 FILE_NAME(tmp,@1);
3965 $$ = tmp;
3966 }
3967
3968 | K_asin '(' expression ')'
3969 { perm_string tn = perm_string::literal("$asin");
3970 PECallFunction*tmp = make_call_function(tn, $3);
3971 FILE_NAME(tmp,@1);
3972 $$ = tmp;
3973 }
3974
3975 | K_asinh '(' expression ')'
3976 { perm_string tn = perm_string::literal("$asinh");
3977 PECallFunction*tmp = make_call_function(tn, $3);
3978 FILE_NAME(tmp,@1);
3979 $$ = tmp;
3980 }
3981
3982 | K_atan '(' expression ')'
3983 { perm_string tn = perm_string::literal("$atan");
3984 PECallFunction*tmp = make_call_function(tn, $3);
3985 FILE_NAME(tmp,@1);
3986 $$ = tmp;
3987 }
3988
3989 | K_atanh '(' expression ')'
3990 { perm_string tn = perm_string::literal("$atanh");
3991 PECallFunction*tmp = make_call_function(tn, $3);
3992 FILE_NAME(tmp,@1);
3993 $$ = tmp;
3994 }
3995
3996 | K_atan2 '(' expression ',' expression ')'
3997 { perm_string tn = perm_string::literal("$atan2");
3998 PECallFunction*tmp = make_call_function(tn, $3, $5);
3999 FILE_NAME(tmp,@1);
4000 $$ = tmp;
4001 }
4002
4003 | K_ceil '(' expression ')'
4004 { perm_string tn = perm_string::literal("$ceil");
4005 PECallFunction*tmp = make_call_function(tn, $3);
4006 FILE_NAME(tmp,@1);
4007 $$ = tmp;
4008 }
4009
4010 | K_cos '(' expression ')'
4011 { perm_string tn = perm_string::literal("$cos");
4012 PECallFunction*tmp = make_call_function(tn, $3);
4013 FILE_NAME(tmp,@1);
4014 $$ = tmp;
4015 }
4016
4017 | K_cosh '(' expression ')'
4018 { perm_string tn = perm_string::literal("$cosh");
4019 PECallFunction*tmp = make_call_function(tn, $3);
4020 FILE_NAME(tmp,@1);
4021 $$ = tmp;
4022 }
4023
4024 | K_exp '(' expression ')'
4025 { perm_string tn = perm_string::literal("$exp");
4026 PECallFunction*tmp = make_call_function(tn, $3);
4027 FILE_NAME(tmp,@1);
4028 $$ = tmp;
4029 }
4030
4031 | K_floor '(' expression ')'
4032 { perm_string tn = perm_string::literal("$floor");
4033 PECallFunction*tmp = make_call_function(tn, $3);
4034 FILE_NAME(tmp,@1);
4035 $$ = tmp;
4036 }
4037
4038 | K_hypot '(' expression ',' expression ')'
4039 { perm_string tn = perm_string::literal("$hypot");
4040 PECallFunction*tmp = make_call_function(tn, $3, $5);
4041 FILE_NAME(tmp,@1);
4042 $$ = tmp;
4043 }
4044
4045 | K_ln '(' expression ')'
4046 { perm_string tn = perm_string::literal("$ln");
4047 PECallFunction*tmp = make_call_function(tn, $3);
4048 FILE_NAME(tmp,@1);
4049 $$ = tmp;
4050 }
4051
4052 | K_log '(' expression ')'
4053 { perm_string tn = perm_string::literal("$log10");
4054 PECallFunction*tmp = make_call_function(tn, $3);
4055 FILE_NAME(tmp,@1);
4056 $$ = tmp;
4057 }
4058
4059 | K_pow '(' expression ',' expression ')'
4060 { perm_string tn = perm_string::literal("$pow");
4061 PECallFunction*tmp = make_call_function(tn, $3, $5);
4062 FILE_NAME(tmp,@1);
4063 $$ = tmp;
4064 }
4065
4066 | K_sin '(' expression ')'
4067 { perm_string tn = perm_string::literal("$sin");
4068 PECallFunction*tmp = make_call_function(tn, $3);
4069 FILE_NAME(tmp,@1);
4070 $$ = tmp;
4071 }
4072
4073 | K_sinh '(' expression ')'
4074 { perm_string tn = perm_string::literal("$sinh");
4075 PECallFunction*tmp = make_call_function(tn, $3);
4076 FILE_NAME(tmp,@1);
4077 $$ = tmp;
4078 }
4079
4080 | K_sqrt '(' expression ')'
4081 { perm_string tn = perm_string::literal("$sqrt");
4082 PECallFunction*tmp = make_call_function(tn, $3);
4083 FILE_NAME(tmp,@1);
4084 $$ = tmp;
4085 }
4086
4087 | K_tan '(' expression ')'
4088 { perm_string tn = perm_string::literal("$tan");
4089 PECallFunction*tmp = make_call_function(tn, $3);
4090 FILE_NAME(tmp,@1);
4091 $$ = tmp;
4092 }
4093
4094 | K_tanh '(' expression ')'
4095 { perm_string tn = perm_string::literal("$tanh");
4096 PECallFunction*tmp = make_call_function(tn, $3);
4097 FILE_NAME(tmp,@1);
4098 $$ = tmp;
4099 }
4100
4101 /* These mathematical functions are conveniently expressed as unary
4102 and binary expressions. They behave much like unary/binary
4103 operators, even though they are parsed as functions. */
4104
4105 | K_abs '(' expression ')'
4106 { PEUnary*tmp = new PEUnary('m', $3);
4107 FILE_NAME(tmp,@1);
4108 $$ = tmp;
4109 }
4110
4111 | K_max '(' expression ',' expression ')'
4112 { PEBinary*tmp = new PEBinary('M', $3, $5);
4113 FILE_NAME(tmp,@1);
4114 $$ = tmp;
4115 }
4116
4117 | K_min '(' expression ',' expression ')'
4118 { PEBinary*tmp = new PEBinary('m', $3, $5);
4119 FILE_NAME(tmp,@1);
4120 $$ = tmp;
4121 }
4122
4123 /* Parenthesized expressions are primaries. */
4124
4125 | '(' expr_mintypmax ')'
4126 { $$ = $2; }
4127
4128 /* Various kinds of concatenation expressions. */
4129
4130 | '{' expression_list_proper '}'
4131 { PEConcat*tmp = new PEConcat(*$2);
4132 FILE_NAME(tmp, @1);
4133 delete $2;
4134 $$ = tmp;
4135 }
4136 | '{' expression '{' expression_list_proper '}' '}'
4137 { PExpr*rep = $2;
4138 PEConcat*tmp = new PEConcat(*$4, rep);
4139 FILE_NAME(tmp, @1);
4140 delete $4;
4141 $$ = tmp;
4142 }
4143 | '{' expression '{' expression_list_proper '}' error '}'
4144 { PExpr*rep = $2;
4145 PEConcat*tmp = new PEConcat(*$4, rep);
4146 FILE_NAME(tmp, @1);
4147 delete $4;
4148 $$ = tmp;
4149 yyerror(@5, "error: Syntax error between internal '}' "
4150 "and closing '}' of repeat concatenation.");
4151 yyerrok;
4152 }
4153
4154 | '{' '}'
4155 { // This is the empty queue syntax.
4156 if (gn_system_verilog()) {
4157 list<PExpr*> empty_list;
4158 PEConcat*tmp = new PEConcat(empty_list);
4159 FILE_NAME(tmp, @1);
4160 $$ = tmp;
4161 } else {
4162 yyerror(@1, "error: Concatenations are not allowed to be empty.");
4163 $$ = 0;
4164 }
4165 }
4166
4167 /* Cast expressions are primaries */
4168
4169 | expr_primary '\'' '(' expression ')'
4170 { PExpr*base = $4;
4171 if (gn_system_verilog()) {
4172 PECastSize*tmp = new PECastSize($1, base);
4173 FILE_NAME(tmp, @1);
4174 $$ = tmp;
4175 } else {
4176 yyerror(@1, "error: Size cast requires SystemVerilog.");
4177 $$ = base;
4178 }
4179 }
4180
4181 | simple_type_or_string '\'' '(' expression ')'
4182 { PExpr*base = $4;
4183 if (gn_system_verilog()) {
4184 PECastType*tmp = new PECastType($1, base);
4185 FILE_NAME(tmp, @1);
4186 $$ = tmp;
4187 } else {
4188 yyerror(@1, "error: Type cast requires SystemVerilog.");
4189 $$ = base;
4190 }
4191 }
4192
4193 /* Aggregate literals are primaries. */
4194
4195 | assignment_pattern
4196 { $$ = $1; }
4197
4198 /* SystemVerilog supports streaming concatenation */
4199 | streaming_concatenation
4200 { $$ = $1; }
4201
4202 | K_null
4203 { PENull*tmp = new PENull;
4204 FILE_NAME(tmp, @1);
4205 $$ = tmp;
4206 }
4207 ;
4208
4209 /* A function_item_list borrows the task_port_item run to match
4210 declarations of ports. We check later to make sure there are no
4211 output or inout ports actually used.
4212
4213 The function_item is the same as tf_item_declaration. */
4214 function_item_list_opt
4215 : function_item_list { $$ = $1; }
4216 | { $$ = 0; }
4217 ;
4218
4219 function_item_list
4220 : function_item
4221 { $$ = $1; }
4222 | function_item_list function_item
4223 { /* */
4224 if ($1 && $2) {
4225 vector<pform_tf_port_t>*tmp = $1;
4226 size_t s1 = tmp->size();
4227 tmp->resize(s1 + $2->size());
4228 for (size_t idx = 0 ; idx < $2->size() ; idx += 1)
4229 tmp->at(s1+idx) = $2->at(idx);
4230 delete $2;
4231 $$ = tmp;
4232 } else if ($1) {
4233 $$ = $1;
4234 } else {
4235 $$ = $2;
4236 }
4237 }
4238 ;
4239
4240 function_item
4241 : tf_port_declaration
4242 { $$ = $1; }
4243 | block_item_decl
4244 { $$ = 0; }
4245 ;
4246
4247 /* A gate_instance is a module instantiation or a built in part
4248 type. In any case, the gate has a set of connections to ports. */
4249 gate_instance
4250 : IDENTIFIER '(' port_conn_expression_list_with_nuls ')'
4251 { lgate*tmp = new lgate;
4252 tmp->name = $1;
4253 tmp->parms = $3;
4254 tmp->file = @1.text;
4255 tmp->lineno = @1.first_line;
4256 delete[]$1;
4257 $$ = tmp;
4258 }
4259
4260 | IDENTIFIER dimensions '(' port_conn_expression_list_with_nuls ')'
4261 { lgate*tmp = new lgate;
4262 list<pform_range_t>*rng = $2;
4263 tmp->name = $1;
4264 tmp->parms = $4;
4265 tmp->range = rng->front();
4266 rng->pop_front();
4267 assert(rng->empty());
4268 tmp->file = @1.text;
4269 tmp->lineno = @1.first_line;
4270 delete[]$1;
4271 delete rng;
4272 $$ = tmp;
4273 }
4274
4275 | '(' port_conn_expression_list_with_nuls ')'
4276 { lgate*tmp = new lgate;
4277 tmp->name = "";
4278 tmp->parms = $2;
4279 tmp->file = @1.text;
4280 tmp->lineno = @1.first_line;
4281 $$ = tmp;
4282 }
4283
4284 /* Degenerate modules can have no ports. */
4285
4286 | IDENTIFIER dimensions
4287 { lgate*tmp = new lgate;
4288 list<pform_range_t>*rng = $2;
4289 tmp->name = $1;
4290 tmp->parms = 0;
4291 tmp->parms_by_name = 0;
4292 tmp->range = rng->front();
4293 rng->pop_front();
4294 assert(rng->empty());
4295 tmp->file = @1.text;
4296 tmp->lineno = @1.first_line;
4297 delete[]$1;
4298 delete rng;
4299 $$ = tmp;
4300 }
4301
4302 /* Modules can also take ports by port-name expressions. */
4303
4304 | IDENTIFIER '(' port_name_list ')'
4305 { lgate*tmp = new lgate;
4306 tmp->name = $1;
4307 tmp->parms = 0;
4308 tmp->parms_by_name = $3;
4309 tmp->file = @1.text;
4310 tmp->lineno = @1.first_line;
4311 delete[]$1;
4312 $$ = tmp;
4313 }
4314
4315 | IDENTIFIER dimensions '(' port_name_list ')'
4316 { lgate*tmp = new lgate;
4317 list<pform_range_t>*rng = $2;
4318 tmp->name = $1;
4319 tmp->parms = 0;
4320 tmp->parms_by_name = $4;
4321 tmp->range = rng->front();
4322 rng->pop_front();
4323 assert(rng->empty());
4324 tmp->file = @1.text;
4325 tmp->lineno = @1.first_line;
4326 delete[]$1;
4327 delete rng;
4328 $$ = tmp;
4329 }
4330
4331 | IDENTIFIER '(' error ')'
4332 { lgate*tmp = new lgate;
4333 tmp->name = $1;
4334 tmp->parms = 0;
4335 tmp->parms_by_name = 0;
4336 tmp->file = @1.text;
4337 tmp->lineno = @1.first_line;
4338 yyerror(@2, "error: Syntax error in instance port "
4339 "expression(s).");
4340 delete[]$1;
4341 $$ = tmp;
4342 }
4343
4344 | IDENTIFIER dimensions '(' error ')'
4345 { lgate*tmp = new lgate;
4346 tmp->name = $1;
4347 tmp->parms = 0;
4348 tmp->parms_by_name = 0;
4349 tmp->file = @1.text;
4350 tmp->lineno = @1.first_line;
4351 yyerror(@3, "error: Syntax error in instance port "
4352 "expression(s).");
4353 delete[]$1;
4354 $$ = tmp;
4355 }
4356 ;
4357
4358 gate_instance_list
4359 : gate_instance_list ',' gate_instance
4360 { svector<lgate>*tmp1 = $1;
4361 lgate*tmp2 = $3;
4362 svector<lgate>*out = new svector<lgate> (*tmp1, *tmp2);
4363 delete tmp1;
4364 delete tmp2;
4365 $$ = out;
4366 }
4367 | gate_instance
4368 { svector<lgate>*tmp = new svector<lgate>(1);
4369 (*tmp)[0] = *$1;
4370 delete $1;
4371 $$ = tmp;
4372 }
4373 ;
4374
4375 gatetype
4376 : K_and { $$ = PGBuiltin::AND; }
4377 | K_nand { $$ = PGBuiltin::NAND; }
4378 | K_or { $$ = PGBuiltin::OR; }
4379 | K_nor { $$ = PGBuiltin::NOR; }
4380 | K_xor { $$ = PGBuiltin::XOR; }
4381 | K_xnor { $$ = PGBuiltin::XNOR; }
4382 | K_buf { $$ = PGBuiltin::BUF; }
4383 | K_bufif0 { $$ = PGBuiltin::BUFIF0; }
4384 | K_bufif1 { $$ = PGBuiltin::BUFIF1; }
4385 | K_not { $$ = PGBuiltin::NOT; }
4386 | K_notif0 { $$ = PGBuiltin::NOTIF0; }
4387 | K_notif1 { $$ = PGBuiltin::NOTIF1; }
4388 ;
4389
4390 switchtype
4391 : K_nmos { $$ = PGBuiltin::NMOS; }
4392 | K_rnmos { $$ = PGBuiltin::RNMOS; }
4393 | K_pmos { $$ = PGBuiltin::PMOS; }
4394 | K_rpmos { $$ = PGBuiltin::RPMOS; }
4395 | K_cmos { $$ = PGBuiltin::CMOS; }
4396 | K_rcmos { $$ = PGBuiltin::RCMOS; }
4397 | K_tran { $$ = PGBuiltin::TRAN; }
4398 | K_rtran { $$ = PGBuiltin::RTRAN; }
4399 | K_tranif0 { $$ = PGBuiltin::TRANIF0; }
4400 | K_tranif1 { $$ = PGBuiltin::TRANIF1; }
4401 | K_rtranif0 { $$ = PGBuiltin::RTRANIF0; }
4402 | K_rtranif1 { $$ = PGBuiltin::RTRANIF1; }
4403 ;
4404
4405
4406 /* A general identifier is a hierarchical name, with the right most
4407 name the base of the identifier. This rule builds up a
4408 hierarchical name from the left to the right, forming a list of
4409 names. */
4410
4411 hierarchy_identifier
4412 : IDENTIFIER
4413 { $$ = new pform_name_t;
4414 $$->push_back(name_component_t(lex_strings.make($1)));
4415 delete[]$1;
4416 }
4417 | hierarchy_identifier '.' IDENTIFIER
4418 { pform_name_t * tmp = $1;
4419 tmp->push_back(name_component_t(lex_strings.make($3)));
4420 delete[]$3;
4421 $$ = tmp;
4422 }
4423 | hierarchy_identifier '[' expression ']'
4424 { pform_name_t * tmp = $1;
4425 name_component_t&tail = tmp->back();
4426 index_component_t itmp;
4427 itmp.sel = index_component_t::SEL_BIT;
4428 itmp.msb = $3;
4429 tail.index.push_back(itmp);
4430 $$ = tmp;
4431 }
4432 | hierarchy_identifier '[' '$' ']'
4433 { pform_name_t * tmp = $1;
4434 name_component_t&tail = tmp->back();
4435 if (! gn_system_verilog()) {
4436 yyerror(@3, "error: Last element expression ($) "
4437 "requires SystemVerilog. Try enabling SystemVerilog.");
4438 }
4439 index_component_t itmp;
4440 itmp.sel = index_component_t::SEL_BIT_LAST;
4441 itmp.msb = 0;
4442 itmp.lsb = 0;
4443 tail.index.push_back(itmp);
4444 $$ = tmp;
4445 }
4446 | hierarchy_identifier '[' expression ':' expression ']'
4447 { pform_name_t * tmp = $1;
4448 name_component_t&tail = tmp->back();
4449 index_component_t itmp;
4450 itmp.sel = index_component_t::SEL_PART;
4451 itmp.msb = $3;
4452 itmp.lsb = $5;
4453 tail.index.push_back(itmp);
4454 $$ = tmp;
4455 }
4456 | hierarchy_identifier '[' expression K_PO_POS expression ']'
4457 { pform_name_t * tmp = $1;
4458 name_component_t&tail = tmp->back();
4459 index_component_t itmp;
4460 itmp.sel = index_component_t::SEL_IDX_UP;
4461 itmp.msb = $3;
4462 itmp.lsb = $5;
4463 tail.index.push_back(itmp);
4464 $$ = tmp;
4465 }
4466 | hierarchy_identifier '[' expression K_PO_NEG expression ']'
4467 { pform_name_t * tmp = $1;
4468 name_component_t&tail = tmp->back();
4469 index_component_t itmp;
4470 itmp.sel = index_component_t::SEL_IDX_DO;
4471 itmp.msb = $3;
4472 itmp.lsb = $5;
4473 tail.index.push_back(itmp);
4474 $$ = tmp;
4475 }
4476 ;
4477
4478 /* This is a list of identifiers. The result is a list of strings,
4479 each one of the identifiers in the list. These are simple,
4480 non-hierarchical names separated by ',' characters. */
4481 list_of_identifiers
4482 : IDENTIFIER
4483 { $$ = list_from_identifier($1); }
4484 | list_of_identifiers ',' IDENTIFIER
4485 { $$ = list_from_identifier($1, $3); }
4486 ;
4487
4488 list_of_port_identifiers
4489 : IDENTIFIER dimensions_opt
4490 { $$ = make_port_list($1, $2, 0); }
4491 | list_of_port_identifiers ',' IDENTIFIER dimensions_opt
4492 { $$ = make_port_list($1, $3, $4, 0); }
4493 ;
4494
4495 list_of_variable_port_identifiers
4496 : IDENTIFIER dimensions_opt
4497 { $$ = make_port_list($1, $2, 0); }
4498 | IDENTIFIER dimensions_opt '=' expression
4499 { $$ = make_port_list($1, $2, $4); }
4500 | list_of_variable_port_identifiers ',' IDENTIFIER dimensions_opt
4501 { $$ = make_port_list($1, $3, $4, 0); }
4502 | list_of_variable_port_identifiers ',' IDENTIFIER dimensions_opt '=' expression
4503 { $$ = make_port_list($1, $3, $4, $6); }
4504 ;
4505
4506
4507 /* The list_of_ports and list_of_port_declarations rules are the
4508 port list formats for module ports. The list_of_ports_opt rule is
4509 only used by the module start rule.
4510
4511 The first, the list_of_ports, is the 1364-1995 format, a list of
4512 port names, including .name() syntax.
4513
4514 The list_of_port_declarations the 1364-2001 format, an in-line
4515 declaration of the ports.
4516
4517 In both cases, the list_of_ports and list_of_port_declarations
4518 returns an array of Module::port_t* items that include the name
4519 of the port internally and externally. The actual creation of the
4520 nets/variables is done in the declaration, whether internal to
4521 the port list or in amongst the module items. */
4522
4523 list_of_ports
4524 : port_opt
4525 { vector<Module::port_t*>*tmp
4526 = new vector<Module::port_t*>(1);
4527 (*tmp)[0] = $1;
4528 $$ = tmp;
4529 }
4530 | list_of_ports ',' port_opt
4531 { vector<Module::port_t*>*tmp = $1;
4532 tmp->push_back($3);
4533 $$ = tmp;
4534 }
4535 ;
4536
4537 list_of_port_declarations
4538 : port_declaration
4539 { vector<Module::port_t*>*tmp
4540 = new vector<Module::port_t*>(1);
4541 (*tmp)[0] = $1;
4542 $$ = tmp;
4543 }
4544 | list_of_port_declarations ',' port_declaration
4545 { vector<Module::port_t*>*tmp = $1;
4546 tmp->push_back($3);
4547 $$ = tmp;
4548 }
4549 | list_of_port_declarations ',' IDENTIFIER
4550 { Module::port_t*ptmp;
4551 perm_string name = lex_strings.make($3);
4552 ptmp = pform_module_port_reference(name, @3.text,
4553 @3.first_line);
4554 vector<Module::port_t*>*tmp = $1;
4555 tmp->push_back(ptmp);
4556
4557 /* Get the port declaration details, the port type
4558 and what not, from context data stored by the
4559 last port_declaration rule. */
4560 pform_module_define_port(@3, name,
4561 port_declaration_context.port_type,
4562 port_declaration_context.port_net_type,
4563 port_declaration_context.data_type, 0);
4564 delete[]$3;
4565 $$ = tmp;
4566 }
4567 | list_of_port_declarations ','
4568 {
4569 yyerror(@2, "error: Superfluous comma in port declaration list.");
4570 }
4571 | list_of_port_declarations ';'
4572 {
4573 yyerror(@2, "error: ';' is an invalid port declaration "
4574 "separator.");
4575 }
4576 ;
4577
4578 port_declaration
4579 : attribute_list_opt K_input net_type_opt data_type_or_implicit IDENTIFIER dimensions_opt
4580 { Module::port_t*ptmp;
4581 perm_string name = lex_strings.make($5);
4582 data_type_t*use_type = $4;
4583 if ($6) use_type = new uarray_type_t(use_type, $6);
4584 ptmp = pform_module_port_reference(name, @2.text, @2.first_line);
4585 pform_module_define_port(@2, name, NetNet::PINPUT, $3, use_type, $1);
4586 port_declaration_context.port_type = NetNet::PINPUT;
4587 port_declaration_context.port_net_type = $3;
4588 port_declaration_context.data_type = $4;
4589 delete[]$5;
4590 $$ = ptmp;
4591 }
4592 | attribute_list_opt
4593 K_input K_wreal IDENTIFIER
4594 { Module::port_t*ptmp;
4595 perm_string name = lex_strings.make($4);
4596 ptmp = pform_module_port_reference(name, @2.text,
4597 @2.first_line);
4598 real_type_t*real_type = new real_type_t(real_type_t::REAL);
4599 FILE_NAME(real_type, @3);
4600 pform_module_define_port(@2, name, NetNet::PINPUT,
4601 NetNet::WIRE, real_type, $1);
4602 port_declaration_context.port_type = NetNet::PINPUT;
4603 port_declaration_context.port_net_type = NetNet::WIRE;
4604 port_declaration_context.data_type = real_type;
4605 delete[]$4;
4606 $$ = ptmp;
4607 }
4608 | attribute_list_opt K_inout net_type_opt data_type_or_implicit IDENTIFIER dimensions_opt
4609 { Module::port_t*ptmp;
4610 perm_string name = lex_strings.make($5);
4611 ptmp = pform_module_port_reference(name, @2.text, @2.first_line);
4612 pform_module_define_port(@2, name, NetNet::PINOUT, $3, $4, $1);
4613 port_declaration_context.port_type = NetNet::PINOUT;
4614 port_declaration_context.port_net_type = $3;
4615 port_declaration_context.data_type = $4;
4616 delete[]$5;
4617 if ($6) {
4618 yyerror(@6, "sorry: Inout ports with unpacked dimensions not supported.");
4619 delete $6;
4620 }
4621 $$ = ptmp;
4622 }
4623 | attribute_list_opt
4624 K_inout K_wreal IDENTIFIER
4625 { Module::port_t*ptmp;
4626 perm_string name = lex_strings.make($4);
4627 ptmp = pform_module_port_reference(name, @2.text,
4628 @2.first_line);
4629 real_type_t*real_type = new real_type_t(real_type_t::REAL);
4630 FILE_NAME(real_type, @3);
4631 pform_module_define_port(@2, name, NetNet::PINOUT,
4632 NetNet::WIRE, real_type, $1);
4633 port_declaration_context.port_type = NetNet::PINOUT;
4634 port_declaration_context.port_net_type = NetNet::WIRE;
4635 port_declaration_context.data_type = real_type;
4636 delete[]$4;
4637 $$ = ptmp;
4638 }
4639 | attribute_list_opt K_output net_type_opt data_type_or_implicit IDENTIFIER dimensions_opt
4640 { Module::port_t*ptmp;
4641 perm_string name = lex_strings.make($5);
4642 data_type_t*use_dtype = $4;
4643 if ($6) use_dtype = new uarray_type_t(use_dtype, $6);
4644 NetNet::Type use_type = $3;
4645 if (use_type == NetNet::IMPLICIT) {
4646 if (vector_type_t*dtype = dynamic_cast<vector_type_t*> ($4)) {
4647 if (dtype->reg_flag)
4648 use_type = NetNet::REG;
4649 else if (dtype->implicit_flag)
4650 use_type = NetNet::IMPLICIT;
4651 else
4652 use_type = NetNet::IMPLICIT_REG;
4653
4654 // The SystemVerilog types that can show up as
4655 // output ports are implicitly (on the inside)
4656 // variables because "reg" is not valid syntax
4657 // here.
4658 } else if (dynamic_cast<atom2_type_t*> ($4)) {
4659 use_type = NetNet::IMPLICIT_REG;
4660 } else if (dynamic_cast<struct_type_t*> ($4)) {
4661 use_type = NetNet::IMPLICIT_REG;
4662 } else if (dynamic_cast<enum_type_t*> ($4)) {
4663 use_type = NetNet::IMPLICIT_REG;
4664 }
4665 }
4666 ptmp = pform_module_port_reference(name, @2.text, @2.first_line);
4667 pform_module_define_port(@2, name, NetNet::POUTPUT, use_type, use_dtype, $1);
4668 port_declaration_context.port_type = NetNet::POUTPUT;
4669 port_declaration_context.port_net_type = use_type;
4670 port_declaration_context.data_type = $4;
4671 delete[]$5;
4672 $$ = ptmp;
4673 }
4674 | attribute_list_opt
4675 K_output K_wreal IDENTIFIER
4676 { Module::port_t*ptmp;
4677 perm_string name = lex_strings.make($4);
4678 ptmp = pform_module_port_reference(name, @2.text,
4679 @2.first_line);
4680 real_type_t*real_type = new real_type_t(real_type_t::REAL);
4681 FILE_NAME(real_type, @3);
4682 pform_module_define_port(@2, name, NetNet::POUTPUT,
4683 NetNet::WIRE, real_type, $1);
4684 port_declaration_context.port_type = NetNet::POUTPUT;
4685 port_declaration_context.port_net_type = NetNet::WIRE;
4686 port_declaration_context.data_type = real_type;
4687 delete[]$4;
4688 $$ = ptmp;
4689 }
4690 | attribute_list_opt K_output net_type_opt data_type_or_implicit IDENTIFIER '=' expression
4691 { Module::port_t*ptmp;
4692 perm_string name = lex_strings.make($5);
4693 NetNet::Type use_type = $3;
4694 if (use_type == NetNet::IMPLICIT) {
4695 if (vector_type_t*dtype = dynamic_cast<vector_type_t*> ($4)) {
4696 if (dtype->reg_flag)
4697 use_type = NetNet::REG;
4698 else
4699 use_type = NetNet::IMPLICIT_REG;
4700 } else {
4701 use_type = NetNet::IMPLICIT_REG;
4702 }
4703 }
4704 ptmp = pform_module_port_reference(name, @2.text, @2.first_line);
4705 pform_module_define_port(@2, name, NetNet::POUTPUT, use_type, $4, $1);
4706 port_declaration_context.port_type = NetNet::PINOUT;
4707 port_declaration_context.port_net_type = use_type;
4708 port_declaration_context.data_type = $4;
4709
4710 pform_make_var_init(@5, name, $7);
4711
4712 delete[]$5;
4713 $$ = ptmp;
4714 }
4715 ;
4716
4717
4718
4719 net_type_opt
4720 : net_type { $$ = $1; }
4721 | { $$ = NetNet::IMPLICIT; }
4722 ;
4723
4724 /*
4725 * The signed_opt rule will return "true" if K_signed is present,
4726 * for "false" otherwise. This rule corresponds to the declaration
4727 * defaults for reg/bit/logic.
4728 *
4729 * The signed_unsigned_opt rule with match K_signed or K_unsigned
4730 * and return true or false as appropriate. The default is
4731 * "true". This corresponds to the declaration defaults for
4732 * byte/shortint/int/longint.
4733 */
4734 unsigned_signed_opt
4735 : K_signed { $$ = true; }
4736 | K_unsigned { $$ = false; }
4737 | { $$ = false; }
4738 ;
4739
4740 signed_unsigned_opt
4741 : K_signed { $$ = true; }
4742 | K_unsigned { $$ = false; }
4743 | { $$ = true; }
4744 ;
4745
4746 /*
4747 * In some places we can take any of the 4 2-value atom-type
4748 * names. All the context needs to know if that type is its width.
4749 */
4750 atom2_type
4751 : K_byte { $$ = 8; }
4752 | K_shortint { $$ = 16; }
4753 | K_int { $$ = 32; }
4754 | K_longint { $$ = 64; }
4755 ;
4756
4757 /* An lpvalue is the expression that can go on the left side of a
4758 procedural assignment. This rule handles only procedural
4759 assignments. It is more limited than the general expr_primary
4760 rule to reflect the rules for assignment l-values. */
4761 lpvalue
4762 : hierarchy_identifier
4763 { PEIdent*tmp = pform_new_ident(@1, *$1);
4764 FILE_NAME(tmp, @1);
4765 $$ = tmp;
4766 delete $1;
4767 }
4768
4769 | implicit_class_handle '.' hierarchy_identifier
4770 { pform_name_t*t_name = $1;
4771 while (!$3->empty()) {
4772 t_name->push_back($3->front());
4773 $3->pop_front();
4774 }
4775 PEIdent*tmp = new PEIdent(*t_name);
4776 FILE_NAME(tmp, @1);
4777 $$ = tmp;
4778 delete $1;
4779 delete $3;
4780 }
4781
4782 | '{' expression_list_proper '}'
4783 { PEConcat*tmp = new PEConcat(*$2);
4784 FILE_NAME(tmp, @1);
4785 delete $2;
4786 $$ = tmp;
4787 }
4788
4789 | streaming_concatenation
4790 { yyerror(@1, "sorry: streaming concatenation not supported in l-values.");
4791 $$ = 0;
4792 }
4793 ;
4794
4795
4796 /* Continuous assignments have a list of individual assignments. */
4797
4798 cont_assign
4799 : lpvalue '=' expression
4800 { list<PExpr*>*tmp = new list<PExpr*>;
4801 tmp->push_back($1);
4802 tmp->push_back($3);
4803 $$ = tmp;
4804 }
4805 ;
4806
4807 cont_assign_list
4808 : cont_assign_list ',' cont_assign
4809 { list<PExpr*>*tmp = $1;
4810 tmp->splice(tmp->end(), *$3);
4811 delete $3;
4812 $$ = tmp;
4813 }
4814 | cont_assign
4815 { $$ = $1; }
4816 ;
4817
4818 /* This is the global structure of a module. A module is a start
4819 section, with optional ports, then an optional list of module
4820 items, and finally an end marker. */
4821
4822 module
4823 : attribute_list_opt module_start lifetime_opt IDENTIFIER
4824 { pform_startmodule(@2, $4, $2==K_program, $2==K_interface, $3, $1); }
4825 module_package_import_list_opt
4826 module_parameter_port_list_opt
4827 module_port_list_opt
4828 module_attribute_foreign ';'
4829 { pform_module_set_ports($8); }
4830 timeunits_declaration_opt
4831 { pform_set_scope_timescale(@2); }
4832 module_item_list_opt
4833 module_end
4834 { Module::UCDriveType ucd;
4835 // The lexor detected `unconnected_drive directives and
4836 // marked what it found in the uc_drive variable. Use that
4837 // to generate a UCD flag for the module.
4838 switch (uc_drive) {
4839 case UCD_NONE:
4840 default:
4841 ucd = Module::UCD_NONE;
4842 break;
4843 case UCD_PULL0:
4844 ucd = Module::UCD_PULL0;
4845 break;
4846 case UCD_PULL1:
4847 ucd = Module::UCD_PULL1;
4848 break;
4849 }
4850 // Check that program/endprogram and module/endmodule
4851 // keywords match.
4852 if ($2 != $15) {
4853 switch ($2) {
4854 case K_module:
4855 yyerror(@15, "error: module not closed by endmodule.");
4856 break;
4857 case K_program:
4858 yyerror(@15, "error: program not closed by endprogram.");
4859 break;
4860 case K_interface:
4861 yyerror(@15, "error: interface not closed by endinterface.");
4862 break;
4863 default:
4864 break;
4865 }
4866 }
4867 pform_endmodule($4, in_celldefine, ucd);
4868 }
4869 endlabel_opt
4870 { // Last step: check any closing name. This is done late so
4871 // that the parser can look ahead to detect the present
4872 // endlabel_opt but still have the pform_endmodule() called
4873 // early enough that the lexor can know we are outside the
4874 // module.
4875 if ($17) {
4876 if (strcmp($4,$17) != 0) {
4877 switch ($2) {
4878 case K_module:
4879 yyerror(@17, "error: End label doesn't match "
4880 "module name.");
4881 break;
4882 case K_program:
4883 yyerror(@17, "error: End label doesn't match "
4884 "program name.");
4885 break;
4886 case K_interface:
4887 yyerror(@17, "error: End label doesn't match "
4888 "interface name.");
4889 break;
4890 default:
4891 break;
4892 }
4893 }
4894 if (($2 == K_module) && (! gn_system_verilog())) {
4895 yyerror(@8, "error: Module end labels require "
4896 "SystemVerilog.");
4897 }
4898 delete[]$17;
4899 }
4900 delete[]$4;
4901 }
4902 ;
4903
4904 /* Modules start with a module/macromodule, program, or interface
4905 keyword, and end with a endmodule, endprogram, or endinterface
4906 keyword. The syntax for modules programs, and interfaces is
4907 almost identical, so let semantics sort out the differences. */
4908 module_start
4909 : K_module { $$ = K_module; }
4910 | K_macromodule { $$ = K_module; }
4911 | K_program { $$ = K_program; }
4912 | K_interface { $$ = K_interface; }
4913 ;
4914
4915 module_end
4916 : K_endmodule { $$ = K_module; }
4917 | K_endprogram { $$ = K_program; }
4918 | K_endinterface { $$ = K_interface; }
4919 ;
4920
4921 endlabel_opt
4922 : ':' IDENTIFIER { $$ = $2; }
4923 | { $$ = 0; }
4924 ;
4925
4926 module_attribute_foreign
4927 : K_PSTAR IDENTIFIER K_integer IDENTIFIER '=' STRING ';' K_STARP { $$ = 0; }
4928 | { $$ = 0; }
4929 ;
4930
4931 module_port_list_opt
4932 : '(' list_of_ports ')' { $$ = $2; }
4933 | '(' list_of_port_declarations ')' { $$ = $2; }
4934 | { $$ = 0; }
4935 | '(' error ')'
4936 { yyerror(@2, "Errors in port declarations.");
4937 yyerrok;
4938 $$ = 0;
4939 }
4940 ;
4941
4942 /* Module declarations include optional ANSI style module parameter
4943 ports. These are simply advance ways to declare parameters, so
4944 that the port declarations may use them. */
4945 module_parameter_port_list_opt
4946 :
4947 | '#' '(' module_parameter_port_list ')'
4948 ;
4949
4950 module_parameter_port_list
4951 : K_parameter param_type parameter_assign
4952 | K_localparam param_type localparam_assign
4953 { if (!gn_system_verilog()) {
4954 yyerror(@1, "error: Local parameters in module parameter "
4955 "port lists requires SystemVerilog.");
4956 }
4957 }
4958 | module_parameter_port_list ',' parameter_assign
4959 | module_parameter_port_list ',' K_parameter param_type parameter_assign
4960 | module_parameter_port_list ',' K_localparam param_type localparam_assign
4961 { if (!gn_system_verilog()) {
4962 yyerror(@3, "error: Local parameters in module parameter "
4963 "port lists requires SystemVerilog.");
4964 }
4965 }
4966 ;
4967
4968 module_item
4969
4970 /* Modules can contain further sub-module definitions. */
4971 : module
4972
4973 | attribute_list_opt net_type data_type_or_implicit delay3_opt net_variable_list ';'
4974
4975 { data_type_t*data_type = $3;
4976 if (data_type == 0) {
4977 data_type = new vector_type_t(IVL_VT_LOGIC, false, 0);
4978 FILE_NAME(data_type, @2);
4979 }
4980 pform_set_data_type(@2, data_type, $5, $2, $1);
4981 if ($4 != 0) {
4982 yyerror(@2, "sorry: net delays not supported.");
4983 delete $4;
4984 }
4985 delete $1;
4986 }
4987
4988 | attribute_list_opt K_wreal delay3 net_variable_list ';'
4989 { real_type_t*tmpt = new real_type_t(real_type_t::REAL);
4990 pform_set_data_type(@2, tmpt, $4, NetNet::WIRE, $1);
4991 if ($3 != 0) {
4992 yyerror(@3, "sorry: net delays not supported.");
4993 delete $3;
4994 }
4995 delete $1;
4996 }
4997
4998 | attribute_list_opt K_wreal net_variable_list ';'
4999 { real_type_t*tmpt = new real_type_t(real_type_t::REAL);
5000 pform_set_data_type(@2, tmpt, $3, NetNet::WIRE, $1);
5001 delete $1;
5002 }
5003
5004 /* Very similar to the rule above, but this takes a list of
5005 net_decl_assigns, which are <name> = <expr> assignment
5006 declarations. */
5007
5008 | attribute_list_opt net_type data_type_or_implicit delay3_opt net_decl_assigns ';'
5009 { data_type_t*data_type = $3;
5010 if (data_type == 0) {
5011 data_type = new vector_type_t(IVL_VT_LOGIC, false, 0);
5012 FILE_NAME(data_type, @2);
5013 }
5014 pform_makewire(@2, $4, str_strength, $5, $2, data_type);
5015 if ($1) {
5016 yywarn(@2, "Attributes are not supported on net declaration "
5017 "assignments and will be discarded.");
5018 delete $1;
5019 }
5020 }
5021
5022 /* This form doesn't have the range, but does have strengths. This
5023 gives strength to the assignment drivers. */
5024
5025 | attribute_list_opt net_type data_type_or_implicit drive_strength net_decl_assigns ';'
5026 { data_type_t*data_type = $3;
5027 if (data_type == 0) {
5028 data_type = new vector_type_t(IVL_VT_LOGIC, false, 0);
5029 FILE_NAME(data_type, @2);
5030 }
5031 pform_makewire(@2, 0, $4, $5, $2, data_type);
5032 if ($1) {
5033 yywarn(@2, "Attributes are not supported on net declaration "
5034 "assignments and will be discarded.");
5035 delete $1;
5036 }
5037 }
5038
5039 | attribute_list_opt K_wreal net_decl_assigns ';'
5040 { real_type_t*data_type = new real_type_t(real_type_t::REAL);
5041 pform_makewire(@2, 0, str_strength, $3, NetNet::WIRE, data_type);
5042 if ($1) {
5043 yywarn(@2, "Attributes are not supported on net declaration "
5044 "assignments and will be discarded.");
5045 delete $1;
5046 }
5047 }
5048
5049 | K_trireg charge_strength_opt dimensions_opt delay3_opt list_of_identifiers ';'
5050 { yyerror(@1, "sorry: trireg nets not supported.");
5051 delete $3;
5052 delete $4;
5053 }
5054
5055
5056 /* The next two rules handle port declarations that include a net type, e.g.
5057 input wire signed [h:l] <list>;
5058 This creates the wire and sets the port type all at once. */
5059
5060 | attribute_list_opt port_direction net_type data_type_or_implicit list_of_port_identifiers ';'
5061 { pform_module_define_port(@2, $5, $2, $3, $4, $1); }
5062
5063 | attribute_list_opt port_direction K_wreal list_of_port_identifiers ';'
5064 { real_type_t*real_type = new real_type_t(real_type_t::REAL);
5065 pform_module_define_port(@2, $4, $2, NetNet::WIRE, real_type, $1);
5066 }
5067
5068 /* The next three rules handle port declarations that include a variable
5069 type, e.g.
5070 output reg signed [h:l] <list>;
5071 and also handle incomplete port declarations, e.g.
5072 input signed [h:l] <list>;
5073 */
5074 | attribute_list_opt K_inout data_type_or_implicit list_of_port_identifiers ';'
5075 { NetNet::Type use_type = $3 ? NetNet::IMPLICIT : NetNet::NONE;
5076 if (vector_type_t*dtype = dynamic_cast<vector_type_t*> ($3)) {
5077 if (dtype->implicit_flag)
5078 use_type = NetNet::NONE;
5079 }
5080 if (use_type == NetNet::NONE)
5081 pform_set_port_type(@2, $4, NetNet::PINOUT, $3, $1);
5082 else
5083 pform_module_define_port(@2, $4, NetNet::PINOUT, use_type, $3, $1);
5084 }
5085
5086 | attribute_list_opt K_input data_type_or_implicit list_of_port_identifiers ';'
5087 { NetNet::Type use_type = $3 ? NetNet::IMPLICIT : NetNet::NONE;
5088 if (vector_type_t*dtype = dynamic_cast<vector_type_t*> ($3)) {
5089 if (dtype->implicit_flag)
5090 use_type = NetNet::NONE;
5091 }
5092 if (use_type == NetNet::NONE)
5093 pform_set_port_type(@2, $4, NetNet::PINPUT, $3, $1);
5094 else
5095 pform_module_define_port(@2, $4, NetNet::PINPUT, use_type, $3, $1);
5096 }
5097
5098 | attribute_list_opt K_output data_type_or_implicit list_of_variable_port_identifiers ';'
5099 { NetNet::Type use_type = $3 ? NetNet::IMPLICIT : NetNet::NONE;
5100 if (vector_type_t*dtype = dynamic_cast<vector_type_t*> ($3)) {
5101 if (dtype->implicit_flag)
5102 use_type = NetNet::NONE;
5103 else if (dtype->reg_flag)
5104 use_type = NetNet::REG;
5105 else
5106 use_type = NetNet::IMPLICIT_REG;
5107
5108 // The SystemVerilog types that can show up as
5109 // output ports are implicitly (on the inside)
5110 // variables because "reg" is not valid syntax
5111 // here.
5112 } else if (dynamic_cast<atom2_type_t*> ($3)) {
5113 use_type = NetNet::IMPLICIT_REG;
5114 } else if (dynamic_cast<struct_type_t*> ($3)) {
5115 use_type = NetNet::IMPLICIT_REG;
5116 } else if (enum_type_t*etype = dynamic_cast<enum_type_t*> ($3)) {
5117 if(etype->base_type == IVL_VT_LOGIC)
5118 use_type = NetNet::IMPLICIT_REG;
5119 }
5120 if (use_type == NetNet::NONE)
5121 pform_set_port_type(@2, $4, NetNet::POUTPUT, $3, $1);
5122 else
5123 pform_module_define_port(@2, $4, NetNet::POUTPUT, use_type, $3, $1);
5124 }
5125
5126 | attribute_list_opt port_direction net_type data_type_or_implicit error ';'
5127 { yyerror(@2, "error: Invalid variable list in port declaration.");
5128 if ($1) delete $1;
5129 if ($4) delete $4;
5130 yyerrok;
5131 }
5132
5133 | attribute_list_opt K_inout data_type_or_implicit error ';'
5134 { yyerror(@2, "error: Invalid variable list in port declaration.");
5135 if ($1) delete $1;
5136 if ($3) delete $3;
5137 yyerrok;
5138 }
5139
5140 | attribute_list_opt K_input data_type_or_implicit error ';'
5141 { yyerror(@2, "error: Invalid variable list in port declaration.");
5142 if ($1) delete $1;
5143 if ($3) delete $3;
5144 yyerrok;
5145 }
5146
5147 | attribute_list_opt K_output data_type_or_implicit error ';'
5148 { yyerror(@2, "error: Invalid variable list in port declaration.");
5149 if ($1) delete $1;
5150 if ($3) delete $3;
5151 yyerrok;
5152 }
5153
5154 /* Maybe this is a discipline declaration? If so, then the lexor
5155 will see the discipline name as an identifier. We match it to the
5156 discipline or type name semantically. */
5157 | DISCIPLINE_IDENTIFIER list_of_identifiers ';'
5158 { pform_attach_discipline(@1, $1, $2); }
5159
5160 /* block_item_decl rule is shared with task blocks and named
5161 begin/end. Careful to pass attributes to the block_item_decl. */
5162
5163 | attribute_list_opt { attributes_in_context = $1; } block_item_decl
5164 { delete attributes_in_context;
5165 attributes_in_context = 0;
5166 }
5167
5168 /* */
5169
5170 | K_defparam
5171 { if (pform_in_interface())
5172 yyerror(@1, "error: Parameter overrides are not allowed "
5173 "in interfaces.");
5174 }
5175 defparam_assign_list ';'
5176
5177 /* Most gate types have an optional drive strength and optional
5178 two/three-value delay. These rules handle the different cases.
5179 We check that the actual number of delays is correct later. */
5180
5181 | attribute_list_opt gatetype gate_instance_list ';'
5182 { pform_makegates(@2, $2, str_strength, 0, $3, $1); }
5183
5184 | attribute_list_opt gatetype delay3 gate_instance_list ';'
5185 { pform_makegates(@2, $2, str_strength, $3, $4, $1); }
5186
5187 | attribute_list_opt gatetype drive_strength gate_instance_list ';'
5188 { pform_makegates(@2, $2, $3, 0, $4, $1); }
5189
5190 | attribute_list_opt gatetype drive_strength delay3 gate_instance_list ';'
5191 { pform_makegates(@2, $2, $3, $4, $5, $1); }
5192
5193 /* The switch type gates do not support a strength. */
5194 | attribute_list_opt switchtype gate_instance_list ';'
5195 { pform_makegates(@2, $2, str_strength, 0, $3, $1); }
5196
5197 | attribute_list_opt switchtype delay3 gate_instance_list ';'
5198 { pform_makegates(@2, $2, str_strength, $3, $4, $1); }
5199
5200 /* Pullup and pulldown devices cannot have delays, and their
5201 strengths are limited. */
5202
5203 | K_pullup gate_instance_list ';'
5204 { pform_makegates(@1, PGBuiltin::PULLUP, pull_strength, 0, $2, 0); }
5205 | K_pulldown gate_instance_list ';'
5206 { pform_makegates(@1, PGBuiltin::PULLDOWN, pull_strength, 0, $2, 0); }
5207
5208 | K_pullup '(' dr_strength1 ')' gate_instance_list ';'
5209 { pform_makegates(@1, PGBuiltin::PULLUP, $3, 0, $5, 0); }
5210
5211 | K_pullup '(' dr_strength1 ',' dr_strength0 ')' gate_instance_list ';'
5212 { pform_makegates(@1, PGBuiltin::PULLUP, $3, 0, $7, 0); }
5213
5214 | K_pullup '(' dr_strength0 ',' dr_strength1 ')' gate_instance_list ';'
5215 { pform_makegates(@1, PGBuiltin::PULLUP, $5, 0, $7, 0); }
5216
5217 | K_pulldown '(' dr_strength0 ')' gate_instance_list ';'
5218 { pform_makegates(@1, PGBuiltin::PULLDOWN, $3, 0, $5, 0); }
5219
5220 | K_pulldown '(' dr_strength1 ',' dr_strength0 ')' gate_instance_list ';'
5221 { pform_makegates(@1, PGBuiltin::PULLDOWN, $5, 0, $7, 0); }
5222
5223 | K_pulldown '(' dr_strength0 ',' dr_strength1 ')' gate_instance_list ';'
5224 { pform_makegates(@1, PGBuiltin::PULLDOWN, $3, 0, $7, 0); }
5225
5226 /* This rule handles instantiations of modules and user defined
5227 primitives. These devices to not have delay lists or strengths,
5228 but then can have parameter lists. */
5229
5230 | attribute_list_opt
5231 IDENTIFIER parameter_value_opt gate_instance_list ';'
5232 { perm_string tmp1 = lex_strings.make($2);
5233 pform_make_modgates(@2, tmp1, $3, $4, $1);
5234 delete[]$2;
5235 }
5236
5237 | attribute_list_opt
5238 IDENTIFIER parameter_value_opt error ';'
5239 { yyerror(@2, "error: Invalid module instantiation");
5240 delete[]$2;
5241 if ($1) delete $1;
5242 }
5243
5244 /* Continuous assignment can have an optional drive strength, then
5245 an optional delay3 that applies to all the assignments in the
5246 cont_assign_list. */
5247
5248 | K_assign drive_strength_opt delay3_opt cont_assign_list ';'
5249 { pform_make_pgassign_list($4, $3, $2, @1.text, @1.first_line); }
5250
5251 /* Always and initial items are behavioral processes. */
5252
5253 | attribute_list_opt K_always statement_item
5254 { PProcess*tmp = pform_make_behavior(IVL_PR_ALWAYS, $3, $1);
5255 FILE_NAME(tmp, @2);
5256 }
5257 | attribute_list_opt K_always_comb statement_item
5258 { PProcess*tmp = pform_make_behavior(IVL_PR_ALWAYS_COMB, $3, $1);
5259 FILE_NAME(tmp, @2);
5260 }
5261 | attribute_list_opt K_always_ff statement_item
5262 { PProcess*tmp = pform_make_behavior(IVL_PR_ALWAYS_FF, $3, $1);
5263 FILE_NAME(tmp, @2);
5264 }
5265 | attribute_list_opt K_always_latch statement_item
5266 { PProcess*tmp = pform_make_behavior(IVL_PR_ALWAYS_LATCH, $3, $1);
5267 FILE_NAME(tmp, @2);
5268 }
5269 | attribute_list_opt K_initial statement_item
5270 { PProcess*tmp = pform_make_behavior(IVL_PR_INITIAL, $3, $1);
5271 FILE_NAME(tmp, @2);
5272 }
5273 | attribute_list_opt K_final statement_item
5274 { PProcess*tmp = pform_make_behavior(IVL_PR_FINAL, $3, $1);
5275 FILE_NAME(tmp, @2);
5276 }
5277
5278 | attribute_list_opt K_analog analog_statement
5279 { pform_make_analog_behavior(@2, IVL_PR_ALWAYS, $3); }
5280
5281 | attribute_list_opt assertion_item
5282
5283 | timeunits_declaration
5284
5285 | class_declaration
5286
5287 | task_declaration
5288
5289 | function_declaration
5290
5291 /* A generate region can contain further module items. Actually, it
5292 is supposed to be limited to certain kinds of module items, but
5293 the semantic tests will check that for us. Do check that the
5294 generate/endgenerate regions do not nest. Generate schemes nest,
5295 but generate regions do not. */
5296
5297 | K_generate generate_item_list_opt K_endgenerate
5298 { // Test for bad nesting. I understand it, but it is illegal.
5299 if (pform_parent_generate()) {
5300 cerr << @1 << ": error: Generate/endgenerate regions cannot nest." << endl;
5301 cerr << @1 << ": : Try removing optional generate/endgenerate keywords," << endl;
5302 cerr << @1 << ": : or move them to surround the parent generate scheme." << endl;
5303 error_count += 1;
5304 }
5305 }
5306
5307 | K_genvar list_of_identifiers ';'
5308 { pform_genvars(@1, $2); }
5309
5310 | K_for '(' K_genvar_opt IDENTIFIER '=' expression ';'
5311 expression ';'
5312 genvar_iteration ')'
5313 { pform_start_generate_for(@2, $3, $4, $6, $8, $10.text, $10.expr); }
5314 generate_block
5315 { pform_endgenerate(false); }
5316
5317 | generate_if
5318 generate_block_opt
5319 K_else
5320 { pform_start_generate_else(@1); }
5321 generate_block
5322 { pform_endgenerate(true); }
5323
5324 | generate_if
5325 generate_block_opt %prec less_than_K_else
5326 { pform_endgenerate(true); }
5327
5328 | K_case '(' expression ')'
5329 { pform_start_generate_case(@1, $3); }
5330 generate_case_items
5331 K_endcase
5332 { pform_endgenerate(true); }
5333
5334 | modport_declaration
5335
5336 /* 1364-2001 and later allow specparam declarations outside specify blocks. */
5337
5338 | attribute_list_opt K_specparam
5339 { if (pform_in_interface())
5340 yyerror(@1, "error: specparam declarations are not allowed "
5341 "in interfaces.");
5342 }
5343 specparam_decl ';'
5344
5345 /* specify blocks are parsed but ignored. */
5346
5347 | K_specify
5348 { if (pform_in_interface())
5349 yyerror(@1, "error: specify blocks are not allowed "
5350 "in interfaces.");
5351 }
5352 specify_item_list_opt K_endspecify
5353
5354 | K_specify error K_endspecify
5355 { yyerror(@1, "error: syntax error in specify block");
5356 yyerrok;
5357 }
5358
5359 /* These rules match various errors that the user can type into
5360 module items. These rules try to catch them at a point where a
5361 reasonable error message can be produced. */
5362
5363 | error ';'
5364 { yyerror(@2, "error: invalid module item.");
5365 yyerrok;
5366 }
5367
5368 | K_assign error '=' expression ';'
5369 { yyerror(@1, "error: syntax error in left side "
5370 "of continuous assignment.");
5371 yyerrok;
5372 }
5373
5374 | K_assign error ';'
5375 { yyerror(@1, "error: syntax error in "
5376 "continuous assignment");
5377 yyerrok;
5378 }
5379
5380 | K_function error K_endfunction endlabel_opt
5381 { yyerror(@1, "error: I give up on this "
5382 "function definition.");
5383 if ($4) {
5384 if (!gn_system_verilog()) {
5385 yyerror(@4, "error: Function end names require "
5386 "SystemVerilog.");
5387 }
5388 delete[]$4;
5389 }
5390 yyerrok;
5391 }
5392
5393 /* These rules are for the Icarus Verilog specific $attribute
5394 extensions. Then catch the parameters of the $attribute keyword. */
5395
5396 | KK_attribute '(' IDENTIFIER ',' STRING ',' STRING ')' ';'
5397 { perm_string tmp3 = lex_strings.make($3);
5398 perm_string tmp5 = lex_strings.make($5);
5399 pform_set_attrib(tmp3, tmp5, $7);
5400 delete[] $3;
5401 delete[] $5;
5402 }
5403 | KK_attribute '(' error ')' ';'
5404 { yyerror(@1, "error: Malformed $attribute parameter list."); }
5405
5406 ;
5407
5408 module_item_list
5409 : module_item_list module_item
5410 | module_item
5411 ;
5412
5413 module_item_list_opt
5414 : module_item_list
5415 |
5416 ;
5417
5418 generate_if : K_if '(' expression ')' { pform_start_generate_if(@1, $3); } ;
5419
5420 generate_case_items
5421 : generate_case_items generate_case_item
5422 | generate_case_item
5423 ;
5424
5425 generate_case_item
5426 : expression_list_proper ':' { pform_generate_case_item(@1, $1); } generate_block_opt
5427 { pform_endgenerate(false); }
5428 | K_default ':' { pform_generate_case_item(@1, 0); } generate_block_opt
5429 { pform_endgenerate(false); }
5430 ;
5431
5432 generate_item
5433 : module_item
5434 /* Handle some anachronistic syntax cases. */
5435 | K_begin generate_item_list_opt K_end
5436 { /* Detect and warn about anachronistic begin/end use */
5437 if (generation_flag > GN_VER2001 && warn_anachronisms) {
5438 warn_count += 1;
5439 cerr << @1 << ": warning: Anachronistic use of begin/end to surround generate schemes." << endl;
5440 }
5441 }
5442 | K_begin ':' IDENTIFIER {
5443 pform_start_generate_nblock(@1, $3);
5444 } generate_item_list_opt K_end
5445 { /* Detect and warn about anachronistic named begin/end use */
5446 if (generation_flag > GN_VER2001 && warn_anachronisms) {
5447 warn_count += 1;
5448 cerr << @1 << ": warning: Anachronistic use of named begin/end to surround generate schemes." << endl;
5449 }
5450 pform_endgenerate(false);
5451 }
5452 ;
5453
5454 generate_item_list
5455 : generate_item_list generate_item
5456 | generate_item
5457 ;
5458
5459 generate_item_list_opt
5460 : generate_item_list
5461 |
5462 ;
5463
5464 /* A generate block is the thing within a generate scheme. It may be
5465 a single module item, an anonymous block of module items, or a
5466 named module item. In all cases, the meat is in the module items
5467 inside, and the processing is done by the module_item rules. We
5468 only need to take note here of the scope name, if any. */
5469
5470 generate_block
5471 : module_item
5472 | K_begin generate_item_list_opt K_end
5473 | K_begin ':' IDENTIFIER generate_item_list_opt K_end endlabel_opt
5474 { pform_generate_block_name($3);
5475 if ($6) {
5476 if (strcmp($3,$6) != 0) {
5477 yyerror(@6, "error: End label doesn't match "
5478 "begin name");
5479 }
5480 if (! gn_system_verilog()) {
5481 yyerror(@6, "error: Begin end labels require "
5482 "SystemVerilog.");
5483 }
5484 delete[]$6;
5485 }
5486 delete[]$3;
5487 }
5488 ;
5489
5490 generate_block_opt : generate_block | ';' ;
5491
5492
5493 /* A net declaration assignment allows the programmer to combine the
5494 net declaration and the continuous assignment into a single
5495 statement.
5496
5497 Note that the continuous assignment statement is generated as a
5498 side effect, and all I pass up is the name of the l-value. */
5499
5500 net_decl_assign
5501 : IDENTIFIER '=' expression
5502 { net_decl_assign_t*tmp = new net_decl_assign_t;
5503 tmp->next = tmp;
5504 tmp->name = lex_strings.make($1);
5505 tmp->expr = $3;
5506 delete[]$1;
5507 $$ = tmp;
5508 }
5509 ;
5510
5511 net_decl_assigns
5512 : net_decl_assigns ',' net_decl_assign
5513 { net_decl_assign_t*tmp = $1;
5514 $3->next = tmp->next;
5515 tmp->next = $3;
5516 $$ = tmp;
5517 }
5518 | net_decl_assign
5519 { $$ = $1;
5520 }
5521 ;
5522
5523 bit_logic
5524 : K_logic { $$ = IVL_VT_LOGIC; }
5525 | K_bool { $$ = IVL_VT_BOOL; /* Icarus misc */}
5526 | K_bit { $$ = IVL_VT_BOOL; /* IEEE1800 / IEEE1364-2009 */}
5527 ;
5528
5529 bit_logic_opt
5530 : bit_logic
5531 | { $$ = IVL_VT_NO_TYPE; }
5532 ;
5533
5534 net_type
5535 : K_wire { $$ = NetNet::WIRE; }
5536 | K_tri { $$ = NetNet::TRI; }
5537 | K_tri1 { $$ = NetNet::TRI1; }
5538 | K_supply0 { $$ = NetNet::SUPPLY0; }
5539 | K_wand { $$ = NetNet::WAND; }
5540 | K_triand { $$ = NetNet::TRIAND; }
5541 | K_tri0 { $$ = NetNet::TRI0; }
5542 | K_supply1 { $$ = NetNet::SUPPLY1; }
5543 | K_wor { $$ = NetNet::WOR; }
5544 | K_trior { $$ = NetNet::TRIOR; }
5545 | K_wone { $$ = NetNet::UNRESOLVED_WIRE;
5546 cerr << @1.text << ":" << @1.first_line << ": warning: "
5547 "'wone' is deprecated, please use 'uwire' "
5548 "instead." << endl;
5549 }
5550 | K_uwire { $$ = NetNet::UNRESOLVED_WIRE; }
5551 ;
5552
5553 param_type
5554 : bit_logic_opt unsigned_signed_opt dimensions_opt
5555 { param_active_range = $3;
5556 param_active_signed = $2;
5557 if (($1 == IVL_VT_NO_TYPE) && ($3 != 0))
5558 param_active_type = IVL_VT_LOGIC;
5559 else
5560 param_active_type = $1;
5561 }
5562 | K_integer
5563 { param_active_range = make_range_from_width(integer_width);
5564 param_active_signed = true;
5565 param_active_type = IVL_VT_LOGIC;
5566 }
5567 | K_time
5568 { param_active_range = make_range_from_width(64);
5569 param_active_signed = false;
5570 param_active_type = IVL_VT_LOGIC;
5571 }
5572 | real_or_realtime
5573 { param_active_range = 0;
5574 param_active_signed = true;
5575 param_active_type = IVL_VT_REAL;
5576 }
5577 | atom2_type
5578 { param_active_range = make_range_from_width($1);
5579 param_active_signed = true;
5580 param_active_type = IVL_VT_BOOL;
5581 }
5582 | TYPE_IDENTIFIER
5583 { pform_set_type_referenced(@1, $1.text);
5584 pform_set_param_from_type(@1, $1.type, $1.text, param_active_range,
5585 param_active_signed, param_active_type);
5586 delete[]$1.text;
5587 }
5588 ;
5589
5590 /* parameter and localparam assignment lists are broken into
5591 separate BNF so that I can call slightly different parameter
5592 handling code. localparams parse the same as parameters, they
5593 just behave differently when someone tries to override them. */
5594
5595 parameter_assign_list
5596 : parameter_assign
5597 | parameter_assign_list ',' parameter_assign
5598 ;
5599
5600 localparam_assign_list
5601 : localparam_assign
5602 | localparam_assign_list ',' localparam_assign
5603 ;
5604
5605 parameter_assign
5606 : IDENTIFIER '=' expression parameter_value_ranges_opt
5607 { PExpr*tmp = $3;
5608 pform_set_parameter(@1, lex_strings.make($1), param_active_type,
5609 param_active_signed, param_active_range, tmp, $4);
5610 delete[]$1;
5611 }
5612 ;
5613
5614 localparam_assign
5615 : IDENTIFIER '=' expression
5616 { PExpr*tmp = $3;
5617 pform_set_localparam(@1, lex_strings.make($1), param_active_type,
5618 param_active_signed, param_active_range, tmp);
5619 delete[]$1;
5620 }
5621 ;
5622
5623 parameter_value_ranges_opt : parameter_value_ranges { $$ = $1; } | { $$ = 0; } ;
5624
5625 parameter_value_ranges
5626 : parameter_value_ranges parameter_value_range
5627 { $$ = $2; $$->next = $1; }
5628 | parameter_value_range
5629 { $$ = $1; $$->next = 0; }
5630 ;
5631
5632 parameter_value_range
5633 : from_exclude '[' value_range_expression ':' value_range_expression ']'
5634 { $$ = pform_parameter_value_range($1, false, $3, false, $5); }
5635 | from_exclude '[' value_range_expression ':' value_range_expression ')'
5636 { $$ = pform_parameter_value_range($1, false, $3, true, $5); }
5637 | from_exclude '(' value_range_expression ':' value_range_expression ']'
5638 { $$ = pform_parameter_value_range($1, true, $3, false, $5); }
5639 | from_exclude '(' value_range_expression ':' value_range_expression ')'
5640 { $$ = pform_parameter_value_range($1, true, $3, true, $5); }
5641 | K_exclude expression
5642 { $$ = pform_parameter_value_range(true, false, $2, false, $2); }
5643 ;
5644
5645 value_range_expression
5646 : expression { $$ = $1; }
5647 | K_inf { $$ = 0; }
5648 | '+' K_inf { $$ = 0; }
5649 | '-' K_inf { $$ = 0; }
5650 ;
5651
5652 from_exclude : K_from { $$ = false; } | K_exclude { $$ = true; } ;
5653
5654 /* The parameters of a module instance can be overridden by writing
5655 a list of expressions in a syntax much like a delay list. (The
5656 difference being the list can have any length.) The pform that
5657 attaches the expression list to the module checks that the
5658 expressions are constant.
5659
5660 Although the BNF in IEEE1364-1995 implies that parameter value
5661 lists must be in parentheses, in practice most compilers will
5662 accept simple expressions outside of parentheses if there is only
5663 one value, so I'll accept simple numbers here. This also catches
5664 the case of a UDP with a single delay value, so we need to accept
5665 real values as well as decimal ones.
5666
5667 The parameter value by name syntax is OVI enhancement BTF-B06 as
5668 approved by WG1364 on 6/28/1998. */
5669
5670 parameter_value_opt
5671 : '#' '(' expression_list_with_nuls ')'
5672 { struct parmvalue_t*tmp = new struct parmvalue_t;
5673 tmp->by_order = $3;
5674 tmp->by_name = 0;
5675 $$ = tmp;
5676 }
5677 | '#' '(' parameter_value_byname_list ')'
5678 { struct parmvalue_t*tmp = new struct parmvalue_t;
5679 tmp->by_order = 0;
5680 tmp->by_name = $3;
5681 $$ = tmp;
5682 }
5683 | '#' DEC_NUMBER
5684 { assert($2);
5685 PENumber*tmp = new PENumber($2);
5686 FILE_NAME(tmp, @1);
5687
5688 struct parmvalue_t*lst = new struct parmvalue_t;
5689 lst->by_order = new list<PExpr*>;
5690 lst->by_order->push_back(tmp);
5691 lst->by_name = 0;
5692 $$ = lst;
5693 based_size = 0;
5694 }
5695 | '#' REALTIME
5696 { assert($2);
5697 PEFNumber*tmp = new PEFNumber($2);
5698 FILE_NAME(tmp, @1);
5699
5700 struct parmvalue_t*lst = new struct parmvalue_t;
5701 lst->by_order = new list<PExpr*>;
5702 lst->by_order->push_back(tmp);
5703 lst->by_name = 0;
5704 $$ = lst;
5705 }
5706 | '#' error
5707 { yyerror(@1, "error: syntax error in parameter value "
5708 "assignment list.");
5709 $$ = 0;
5710 }
5711 |
5712 { $$ = 0; }
5713 ;
5714
5715 parameter_value_byname
5716 : '.' IDENTIFIER '(' expression ')'
5717 { named_pexpr_t*tmp = new named_pexpr_t;
5718 tmp->name = lex_strings.make($2);
5719 tmp->parm = $4;
5720 delete[]$2;
5721 $$ = tmp;
5722 }
5723 | '.' IDENTIFIER '(' ')'
5724 { named_pexpr_t*tmp = new named_pexpr_t;
5725 tmp->name = lex_strings.make($2);
5726 tmp->parm = 0;
5727 delete[]$2;
5728 $$ = tmp;
5729 }
5730 ;
5731
5732 parameter_value_byname_list
5733 : parameter_value_byname
5734 { list<named_pexpr_t>*tmp = new list<named_pexpr_t>;
5735 tmp->push_back(*$1);
5736 delete $1;
5737 $$ = tmp;
5738 }
5739 | parameter_value_byname_list ',' parameter_value_byname
5740 { list<named_pexpr_t>*tmp = $1;
5741 tmp->push_back(*$3);
5742 delete $3;
5743 $$ = tmp;
5744 }
5745 ;
5746
5747
5748 /* The port (of a module) is a fairly complex item. Each port is
5749 handled as a Module::port_t object. A simple port reference has a
5750 name and a PExpr object, but more complex constructs are possible
5751 where the name can be attached to a list of PWire objects.
5752
5753 The port_reference returns a Module::port_t, and so does the
5754 port_reference_list. The port_reference_list may have built up a
5755 list of PWires in the port_t object, but it is still a single
5756 Module::port_t object.
5757
5758 The port rule below takes the built up Module::port_t object and
5759 tweaks its name as needed. */
5760
5761 port
5762 : port_reference
5763 { $$ = $1; }
5764
5765 /* This syntax attaches an external name to the port reference so
5766 that the caller can bind by name to non-trivial port
5767 references. The port_t object gets its PWire from the
5768 port_reference, but its name from the IDENTIFIER. */
5769
5770 | '.' IDENTIFIER '(' port_reference ')'
5771 { Module::port_t*tmp = $4;
5772 tmp->name = lex_strings.make($2);
5773 delete[]$2;
5774 $$ = tmp;
5775 }
5776
5777 /* A port can also be a concatenation of port references. In this
5778 case the port does not have a name available to the outside, only
5779 positional parameter passing is possible here. */
5780
5781 | '{' port_reference_list '}'
5782 { Module::port_t*tmp = $2;
5783 tmp->name = perm_string();
5784 $$ = tmp;
5785 }
5786
5787 /* This attaches a name to a port reference concatenation list so
5788 that parameter passing be name is possible. */
5789
5790 | '.' IDENTIFIER '(' '{' port_reference_list '}' ')'
5791 { Module::port_t*tmp = $5;
5792 tmp->name = lex_strings.make($2);
5793 delete[]$2;
5794 $$ = tmp;
5795 }
5796 ;
5797
5798 port_opt
5799 : port { $$ = $1; }
5800 | { $$ = 0; }
5801 ;
5802
5803 /* The port_name rule is used with a module is being *instantiated*,
5804 and not when it is being declared. See the port rule if you are
5805 looking for the ports of a module declaration. */
5806
5807 port_name
5808 : attribute_list_opt '.' IDENTIFIER '(' expression ')'
5809 { named_pexpr_t*tmp = new named_pexpr_t;
5810 tmp->name = lex_strings.make($3);
5811 tmp->parm = $5;
5812 delete[]$3;
5813 delete $1;
5814 $$ = tmp;
5815 }
5816 | attribute_list_opt '.' IDENTIFIER '(' error ')'
5817 { yyerror(@3, "error: invalid port connection expression.");
5818 named_pexpr_t*tmp = new named_pexpr_t;
5819 tmp->name = lex_strings.make($3);
5820 tmp->parm = 0;
5821 delete[]$3;
5822 delete $1;
5823 $$ = tmp;
5824 }
5825 | attribute_list_opt '.' IDENTIFIER '(' ')'
5826 { named_pexpr_t*tmp = new named_pexpr_t;
5827 tmp->name = lex_strings.make($3);
5828 tmp->parm = 0;
5829 delete[]$3;
5830 delete $1;
5831 $$ = tmp;
5832 }
5833 | attribute_list_opt '.' IDENTIFIER
5834 { named_pexpr_t*tmp = new named_pexpr_t;
5835 tmp->name = lex_strings.make($3);
5836 tmp->parm = new PEIdent(lex_strings.make($3), true);
5837 FILE_NAME(tmp->parm, @1);
5838 delete[]$3;
5839 delete $1;
5840 $$ = tmp;
5841 }
5842 | K_DOTSTAR
5843 { named_pexpr_t*tmp = new named_pexpr_t;
5844 tmp->name = lex_strings.make("*");
5845 tmp->parm = 0;
5846 $$ = tmp;
5847 }
5848 ;
5849
5850 port_name_list
5851 : port_name_list ',' port_name
5852 { list<named_pexpr_t>*tmp = $1;
5853 tmp->push_back(*$3);
5854 delete $3;
5855 $$ = tmp;
5856 }
5857 | port_name
5858 { list<named_pexpr_t>*tmp = new list<named_pexpr_t>;
5859 tmp->push_back(*$1);
5860 delete $1;
5861 $$ = tmp;
5862 }
5863 ;
5864
5865 port_conn_expression_list_with_nuls
5866 : port_conn_expression_list_with_nuls ',' attribute_list_opt expression
5867 { list<PExpr*>*tmp = $1;
5868 tmp->push_back($4);
5869 delete $3;
5870 $$ = tmp;
5871 }
5872 | attribute_list_opt expression
5873 { list<PExpr*>*tmp = new list<PExpr*>;
5874 tmp->push_back($2);
5875 delete $1;
5876 $$ = tmp;
5877 }
5878 |
5879 { list<PExpr*>*tmp = new list<PExpr*>;
5880 tmp->push_back(0);
5881 $$ = tmp;
5882 }
5883 | port_conn_expression_list_with_nuls ','
5884 { list<PExpr*>*tmp = $1;
5885 tmp->push_back(0);
5886 $$ = tmp;
5887 }
5888 ;
5889
5890 /* A port reference is an internal (to the module) name of the port,
5891 possibly with a part of bit select to attach it to specific bits
5892 of a signal fully declared inside the module.
5893
5894 The parser creates a PEIdent for every port reference, even if the
5895 signal is bound to different ports. The elaboration figures out
5896 the mess that this creates. The port_reference (and the
5897 port_reference_list below) puts the port reference PEIdent into the
5898 port_t object to pass it up to the module declaration code. */
5899
5900 port_reference
5901
5902 : IDENTIFIER
5903 { Module::port_t*ptmp;
5904 perm_string name = lex_strings.make($1);
5905 ptmp = pform_module_port_reference(name, @1.text, @1.first_line);
5906 delete[]$1;
5907 $$ = ptmp;
5908 }
5909
5910 | IDENTIFIER '[' expression ':' expression ']'
5911 { index_component_t itmp;
5912 itmp.sel = index_component_t::SEL_PART;
5913 itmp.msb = $3;
5914 itmp.lsb = $5;
5915
5916 name_component_t ntmp (lex_strings.make($1));
5917 ntmp.index.push_back(itmp);
5918
5919 pform_name_t pname;
5920 pname.push_back(ntmp);
5921
5922 PEIdent*wtmp = new PEIdent(pname);
5923 FILE_NAME(wtmp, @1);
5924
5925 Module::port_t*ptmp = new Module::port_t;
5926 ptmp->name = perm_string();
5927 ptmp->expr.push_back(wtmp);
5928
5929 delete[]$1;
5930 $$ = ptmp;
5931 }
5932
5933 | IDENTIFIER '[' expression ']'
5934 { index_component_t itmp;
5935 itmp.sel = index_component_t::SEL_BIT;
5936 itmp.msb = $3;
5937 itmp.lsb = 0;
5938
5939 name_component_t ntmp (lex_strings.make($1));
5940 ntmp.index.push_back(itmp);
5941
5942 pform_name_t pname;
5943 pname.push_back(ntmp);
5944
5945 PEIdent*tmp = new PEIdent(pname);
5946 FILE_NAME(tmp, @1);
5947
5948 Module::port_t*ptmp = new Module::port_t;
5949 ptmp->name = perm_string();
5950 ptmp->expr.push_back(tmp);
5951 delete[]$1;
5952 $$ = ptmp;
5953 }
5954
5955 | IDENTIFIER '[' error ']'
5956 { yyerror(@1, "error: invalid port bit select");
5957 Module::port_t*ptmp = new Module::port_t;
5958 PEIdent*wtmp = new PEIdent(lex_strings.make($1));
5959 FILE_NAME(wtmp, @1);
5960 ptmp->name = lex_strings.make($1);
5961 ptmp->expr.push_back(wtmp);
5962 delete[]$1;
5963 $$ = ptmp;
5964 }
5965 ;
5966
5967
5968 port_reference_list
5969 : port_reference
5970 { $$ = $1; }
5971 | port_reference_list ',' port_reference
5972 { Module::port_t*tmp = $1;
5973 append(tmp->expr, $3->expr);
5974 delete $3;
5975 $$ = tmp;
5976 }
5977 ;
5978
5979 /* The range is a list of variable dimensions. */
5980 dimensions_opt
5981 : { $$ = 0; }
5982 | dimensions { $$ = $1; }
5983 ;
5984
5985 dimensions
5986 : variable_dimension
5987 { $$ = $1; }
5988 | dimensions variable_dimension
5989 { list<pform_range_t> *tmp = $1;
5990 if ($2) {
5991 tmp->splice(tmp->end(), *$2);
5992 delete $2;
5993 }
5994 $$ = tmp;
5995 }
5996 ;
5997
5998 /* The register_variable rule is matched only when I am parsing
5999 variables in a "reg" definition. I therefore know that I am
6000 creating registers and I do not need to let the containing rule
6001 handle it. The register variable list simply packs them together
6002 so that bit ranges can be assigned. */
6003 register_variable
6004 : IDENTIFIER dimensions_opt
6005 { perm_string name = lex_strings.make($1);
6006 pform_makewire(@1, name, NetNet::REG,
6007 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
6008 pform_set_reg_idx(name, $2);
6009 $$ = $1;
6010 }
6011 | IDENTIFIER dimensions_opt '=' expression
6012 { if (pform_peek_scope()->var_init_needs_explicit_lifetime()
6013 && (var_lifetime == LexicalScope::INHERITED)) {
6014 cerr << @3 << ": warning: Static variable initialization requires "
6015 "explicit lifetime in this context." << endl;
6016 warn_count += 1;
6017 }
6018 perm_string name = lex_strings.make($1);
6019 pform_makewire(@1, name, NetNet::REG,
6020 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
6021 pform_set_reg_idx(name, $2);
6022 pform_make_var_init(@1, name, $4);
6023 $$ = $1;
6024 }
6025 | IDENTIFIER dimensions_opt '=' dynamic_array_new
6026 { if (pform_peek_scope()->var_init_needs_explicit_lifetime()
6027 && (var_lifetime == LexicalScope::INHERITED)) {
6028 cerr << @3 << ": warning: Static variable initialization requires "
6029 "explicit lifetime in this context." << endl;
6030 warn_count += 1;
6031 }
6032 perm_string name = lex_strings.make($1);
6033 pform_makewire(@1, name, NetNet::REG,
6034 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
6035 pform_set_reg_idx(name, $2);
6036 pform_make_var_init(@1, name, $4);
6037 $$ = $1;
6038 }
6039 ;
6040
6041 register_variable_list
6042 : register_variable
6043 { list<perm_string>*tmp = new list<perm_string>;
6044 tmp->push_back(lex_strings.make($1));
6045 $$ = tmp;
6046 delete[]$1;
6047 }
6048 | register_variable_list ',' register_variable
6049 { list<perm_string>*tmp = $1;
6050 tmp->push_back(lex_strings.make($3));
6051 $$ = tmp;
6052 delete[]$3;
6053 }
6054 ;
6055
6056 net_variable
6057 : IDENTIFIER dimensions_opt
6058 { perm_string name = lex_strings.make($1);
6059 pform_makewire(@1, name, NetNet::IMPLICIT,
6060 NetNet::NOT_A_PORT, IVL_VT_NO_TYPE, 0);
6061 pform_set_reg_idx(name, $2);
6062 $$ = $1;
6063 }
6064 ;
6065
6066 net_variable_list
6067 : net_variable
6068 { list<perm_string>*tmp = new list<perm_string>;
6069 tmp->push_back(lex_strings.make($1));
6070 $$ = tmp;
6071 delete[]$1;
6072 }
6073 | net_variable_list ',' net_variable
6074 { list<perm_string>*tmp = $1;
6075 tmp->push_back(lex_strings.make($3));
6076 $$ = tmp;
6077 delete[]$3;
6078 }
6079 ;
6080
6081 event_variable
6082 : IDENTIFIER dimensions_opt
6083 { if ($2) {
6084 yyerror(@2, "sorry: event arrays are not supported.");
6085 delete $2;
6086 }
6087 $$ = $1;
6088 }
6089 ;
6090
6091 event_variable_list
6092 : event_variable
6093 { $$ = list_from_identifier($1); }
6094 | event_variable_list ',' event_variable
6095 { $$ = list_from_identifier($1, $3); }
6096 ;
6097
6098 specify_item
6099 : K_specparam specparam_decl ';'
6100 | specify_simple_path_decl ';'
6101 { pform_module_specify_path($1);
6102 }
6103 | specify_edge_path_decl ';'
6104 { pform_module_specify_path($1);
6105 }
6106 | K_if '(' expression ')' specify_simple_path_decl ';'
6107 { PSpecPath*tmp = $5;
6108 if (tmp) {
6109 tmp->conditional = true;
6110 tmp->condition = $3;
6111 }
6112 pform_module_specify_path(tmp);
6113 }
6114 | K_if '(' expression ')' specify_edge_path_decl ';'
6115 { PSpecPath*tmp = $5;
6116 if (tmp) {
6117 tmp->conditional = true;
6118 tmp->condition = $3;
6119 }
6120 pform_module_specify_path(tmp);
6121 }
6122 | K_ifnone specify_simple_path_decl ';'
6123 { PSpecPath*tmp = $2;
6124 if (tmp) {
6125 tmp->conditional = true;
6126 tmp->condition = 0;
6127 }
6128 pform_module_specify_path(tmp);
6129 }
6130 | K_ifnone specify_edge_path_decl ';'
6131 { yywarn(@1, "Sorry: ifnone with an edge-sensitive path is "
6132 "not supported.");
6133 yyerrok;
6134 }
6135 | K_Sfullskew '(' spec_reference_event ',' spec_reference_event
6136 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
6137 { delete $7;
6138 delete $9;
6139 }
6140 | K_Shold '(' spec_reference_event ',' spec_reference_event
6141 ',' delay_value spec_notifier_opt ')' ';'
6142 { delete $7;
6143 }
6144 | K_Snochange '(' spec_reference_event ',' spec_reference_event
6145 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
6146 { delete $7;
6147 delete $9;
6148 }
6149 | K_Speriod '(' spec_reference_event ',' delay_value
6150 spec_notifier_opt ')' ';'
6151 { delete $5;
6152 }
6153 | K_Srecovery '(' spec_reference_event ',' spec_reference_event
6154 ',' delay_value spec_notifier_opt ')' ';'
6155 { delete $7;
6156 }
6157 | K_Srecrem '(' spec_reference_event ',' spec_reference_event
6158 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
6159 { delete $7;
6160 delete $9;
6161 }
6162 | K_Sremoval '(' spec_reference_event ',' spec_reference_event
6163 ',' delay_value spec_notifier_opt ')' ';'
6164 { delete $7;
6165 }
6166 | K_Ssetup '(' spec_reference_event ',' spec_reference_event
6167 ',' delay_value spec_notifier_opt ')' ';'
6168 { delete $7;
6169 }
6170 | K_Ssetuphold '(' spec_reference_event ',' spec_reference_event
6171 ',' delay_value ',' delay_value spec_notifier_opt ')' ';'
6172 { delete $7;
6173 delete $9;
6174 }
6175 | K_Sskew '(' spec_reference_event ',' spec_reference_event
6176 ',' delay_value spec_notifier_opt ')' ';'
6177 { delete $7;
6178 }
6179 | K_Stimeskew '(' spec_reference_event ',' spec_reference_event
6180 ',' delay_value spec_notifier_opt ')' ';'
6181 { delete $7;
6182 }
6183 | K_Swidth '(' spec_reference_event ',' delay_value ',' expression
6184 spec_notifier_opt ')' ';'
6185 { delete $5;
6186 delete $7;
6187 }
6188 | K_Swidth '(' spec_reference_event ',' delay_value ')' ';'
6189 { delete $5;
6190 }
6191 | K_pulsestyle_onevent specify_path_identifiers ';'
6192 { delete $2;
6193 }
6194 | K_pulsestyle_ondetect specify_path_identifiers ';'
6195 { delete $2;
6196 }
6197 | K_showcancelled specify_path_identifiers ';'
6198 { delete $2;
6199 }
6200 | K_noshowcancelled specify_path_identifiers ';'
6201 { delete $2;
6202 }
6203 ;
6204
6205 specify_item_list
6206 : specify_item
6207 | specify_item_list specify_item
6208 ;
6209
6210 specify_item_list_opt
6211 : /* empty */
6212 { }
6213 | specify_item_list
6214 { }
6215
6216 specify_edge_path_decl
6217 : specify_edge_path '=' '(' delay_value_list ')'
6218 { $$ = pform_assign_path_delay($1, $4); }
6219 | specify_edge_path '=' delay_value_simple
6220 { list<PExpr*>*tmp = new list<PExpr*>;
6221 tmp->push_back($3);
6222 $$ = pform_assign_path_delay($1, tmp);
6223 }
6224 ;
6225
6226 edge_operator : K_posedge { $$ = true; } | K_negedge { $$ = false; } ;
6227
6228 specify_edge_path
6229 : '(' specify_path_identifiers spec_polarity
6230 K_EG '(' specify_path_identifiers polarity_operator expression ')' ')'
6231 { int edge_flag = 0;
6232 $$ = pform_make_specify_edge_path(@1, edge_flag, $2, $3, false, $6, $8); }
6233 | '(' edge_operator specify_path_identifiers spec_polarity
6234 K_EG '(' specify_path_identifiers polarity_operator expression ')' ')'
6235 { int edge_flag = $2? 1 : -1;
6236 $$ = pform_make_specify_edge_path(@1, edge_flag, $3, $4, false, $7, $9);}
6237 | '(' specify_path_identifiers spec_polarity
6238 K_SG '(' specify_path_identifiers polarity_operator expression ')' ')'
6239 { int edge_flag = 0;
6240 $$ = pform_make_specify_edge_path(@1, edge_flag, $2, $3, true, $6, $8); }
6241 | '(' edge_operator specify_path_identifiers spec_polarity
6242 K_SG '(' specify_path_identifiers polarity_operator expression ')' ')'
6243 { int edge_flag = $2? 1 : -1;
6244 $$ = pform_make_specify_edge_path(@1, edge_flag, $3, $4, true, $7, $9); }
6245 ;
6246
6247 polarity_operator
6248 : K_PO_POS
6249 | K_PO_NEG
6250 | ':'
6251 ;
6252
6253 specify_simple_path_decl
6254 : specify_simple_path '=' '(' delay_value_list ')'
6255 { $$ = pform_assign_path_delay($1, $4); }
6256 | specify_simple_path '=' delay_value_simple
6257 { list<PExpr*>*tmp = new list<PExpr*>;
6258 tmp->push_back($3);
6259 $$ = pform_assign_path_delay($1, tmp);
6260 }
6261 | specify_simple_path '=' '(' error ')'
6262 { yyerror(@3, "Syntax error in delay value list.");
6263 yyerrok;
6264 $$ = 0;
6265 }
6266 ;
6267
6268 specify_simple_path
6269 : '(' specify_path_identifiers spec_polarity
6270 K_EG specify_path_identifiers ')'
6271 { $$ = pform_make_specify_path(@1, $2, $3, false, $5); }
6272 | '(' specify_path_identifiers spec_polarity
6273 K_SG specify_path_identifiers ')'
6274 { $$ = pform_make_specify_path(@1, $2, $3, true, $5); }
6275 | '(' error ')'
6276 { yyerror(@1, "Invalid simple path");
6277 yyerrok;
6278 }
6279 ;
6280
6281 specify_path_identifiers
6282 : IDENTIFIER
6283 { list<perm_string>*tmp = new list<perm_string>;
6284 tmp->push_back(lex_strings.make($1));
6285 $$ = tmp;
6286 delete[]$1;
6287 }
6288 | IDENTIFIER '[' expr_primary ']'
6289 { if (gn_specify_blocks_flag) {
6290 yywarn(@4, "Bit selects are not currently supported "
6291 "in path declarations. The declaration "
6292 "will be applied to the whole vector.");
6293 }
6294 list<perm_string>*tmp = new list<perm_string>;
6295 tmp->push_back(lex_strings.make($1));
6296 $$ = tmp;
6297 delete[]$1;
6298 }
6299 | IDENTIFIER '[' expr_primary polarity_operator expr_primary ']'
6300 { if (gn_specify_blocks_flag) {
6301 yywarn(@4, "Part selects are not currently supported "
6302 "in path declarations. The declaration "
6303 "will be applied to the whole vector.");
6304 }
6305 list<perm_string>*tmp = new list<perm_string>;
6306 tmp->push_back(lex_strings.make($1));
6307 $$ = tmp;
6308 delete[]$1;
6309 }
6310 | specify_path_identifiers ',' IDENTIFIER
6311 { list<perm_string>*tmp = $1;
6312 tmp->push_back(lex_strings.make($3));
6313 $$ = tmp;
6314 delete[]$3;
6315 }
6316 | specify_path_identifiers ',' IDENTIFIER '[' expr_primary ']'
6317 { if (gn_specify_blocks_flag) {
6318 yywarn(@4, "Bit selects are not currently supported "
6319 "in path declarations. The declaration "
6320 "will be applied to the whole vector.");
6321 }
6322 list<perm_string>*tmp = $1;
6323 tmp->push_back(lex_strings.make($3));
6324 $$ = tmp;
6325 delete[]$3;
6326 }
6327 | specify_path_identifiers ',' IDENTIFIER '[' expr_primary polarity_operator expr_primary ']'
6328 { if (gn_specify_blocks_flag) {
6329 yywarn(@4, "Part selects are not currently supported "
6330 "in path declarations. The declaration "
6331 "will be applied to the whole vector.");
6332 }
6333 list<perm_string>*tmp = $1;
6334 tmp->push_back(lex_strings.make($3));
6335 $$ = tmp;
6336 delete[]$3;
6337 }
6338 ;
6339
6340 specparam
6341 : IDENTIFIER '=' expression
6342 { PExpr*tmp = $3;
6343 pform_set_specparam(@1, lex_strings.make($1),
6344 param_active_range, tmp);
6345 delete[]$1;
6346 }
6347 | IDENTIFIER '=' expression ':' expression ':' expression
6348 { PExpr*tmp = 0;
6349 switch (min_typ_max_flag) {
6350 case MIN:
6351 tmp = $3;
6352 delete $5;
6353 delete $7;
6354 break;
6355 case TYP:
6356 delete $3;
6357 tmp = $5;
6358 delete $7;
6359 break;
6360 case MAX:
6361 delete $3;
6362 delete $5;
6363 tmp = $7;
6364 break;
6365 }
6366 if (min_typ_max_warn > 0) {
6367 cerr << tmp->get_fileline() << ": warning: choosing ";
6368 switch (min_typ_max_flag) {
6369 case MIN:
6370 cerr << "min";
6371 break;
6372 case TYP:
6373 cerr << "typ";
6374 break;
6375 case MAX:
6376 cerr << "max";
6377 break;
6378 }
6379 cerr << " expression." << endl;
6380 min_typ_max_warn -= 1;
6381 }
6382 pform_set_specparam(@1, lex_strings.make($1),
6383 param_active_range, tmp);
6384 delete[]$1;
6385 }
6386 | PATHPULSE_IDENTIFIER '=' expression
6387 { delete[]$1;
6388 delete $3;
6389 }
6390 | PATHPULSE_IDENTIFIER '=' '(' expression ',' expression ')'
6391 { delete[]$1;
6392 delete $4;
6393 delete $6;
6394 }
6395 ;
6396
6397 specparam_list
6398 : specparam
6399 | specparam_list ',' specparam
6400 ;
6401
6402 specparam_decl
6403 : specparam_list
6404 | dimensions
6405 { param_active_range = $1; }
6406 specparam_list
6407 { param_active_range = 0; }
6408 ;
6409
6410 spec_polarity
6411 : '+' { $$ = '+'; }
6412 | '-' { $$ = '-'; }
6413 | { $$ = 0; }
6414 ;
6415
6416 spec_reference_event
6417 : K_posedge expression
6418 { delete $2; }
6419 | K_negedge expression
6420 { delete $2; }
6421 | K_posedge expr_primary K_TAND expression
6422 { delete $2;
6423 delete $4;
6424 }
6425 | K_negedge expr_primary K_TAND expression
6426 { delete $2;
6427 delete $4;
6428 }
6429 | K_edge '[' edge_descriptor_list ']' expr_primary
6430 { delete $5; }
6431 | K_edge '[' edge_descriptor_list ']' expr_primary K_TAND expression
6432 { delete $5;
6433 delete $7;
6434 }
6435 | expr_primary K_TAND expression
6436 { delete $1;
6437 delete $3;
6438 }
6439 | expr_primary
6440 { delete $1; }
6441 ;
6442
6443 /* The edge_descriptor is detected by the lexor as the various
6444 2-letter edge sequences that are supported here. For now, we
6445 don't care what they are, because we do not yet support specify
6446 edge events. */
6447 edge_descriptor_list
6448 : edge_descriptor_list ',' K_edge_descriptor
6449 | K_edge_descriptor
6450 ;
6451
6452 spec_notifier_opt
6453 : /* empty */
6454 { }
6455 | spec_notifier
6456 { }
6457 ;
6458 spec_notifier
6459 : ','
6460 { args_after_notifier = 0; }
6461 | ',' hierarchy_identifier
6462 { args_after_notifier = 0; delete $2; }
6463 | spec_notifier ','
6464 { args_after_notifier += 1; }
6465 | spec_notifier ',' hierarchy_identifier
6466 { args_after_notifier += 1;
6467 if (args_after_notifier >= 3) {
6468 cerr << @3 << ": warning: timing checks are not supported "
6469 "and delayed signal \"" << *$3
6470 << "\" will not be driven." << endl;
6471 }
6472 delete $3; }
6473 /* How do we match this path? */
6474 | IDENTIFIER
6475 { args_after_notifier = 0; delete[]$1; }
6476 ;
6477
6478
6479 statement_item /* This is roughly statement_item in the LRM */
6480
6481 /* assign and deassign statements are procedural code to do
6482 structural assignments, and to turn that structural assignment
6483 off. This is stronger than any other assign, but weaker than the
6484 force assignments. */
6485
6486 : K_assign lpvalue '=' expression ';'
6487 { PCAssign*tmp = new PCAssign($2, $4);
6488 FILE_NAME(tmp, @1);
6489 $$ = tmp;
6490 }
6491
6492 | K_deassign lpvalue ';'
6493 { PDeassign*tmp = new PDeassign($2);
6494 FILE_NAME(tmp, @1);
6495 $$ = tmp;
6496 }
6497
6498
6499 /* Force and release statements are similar to assignments,
6500 syntactically, but they will be elaborated differently. */
6501
6502 | K_force lpvalue '=' expression ';'
6503 { PForce*tmp = new PForce($2, $4);
6504 FILE_NAME(tmp, @1);
6505 $$ = tmp;
6506 }
6507 | K_release lpvalue ';'
6508 { PRelease*tmp = new PRelease($2);
6509 FILE_NAME(tmp, @1);
6510 $$ = tmp;
6511 }
6512
6513 /* begin-end blocks come in a variety of forms, including named and
6514 anonymous. The named blocks can also carry their own reg
6515 variables, which are placed in the scope created by the block
6516 name. These are handled by pushing the scope name, then matching
6517 the declarations. The scope is popped at the end of the block. */
6518
6519 | K_begin K_end
6520 { PBlock*tmp = new PBlock(PBlock::BL_SEQ);
6521 FILE_NAME(tmp, @1);
6522 $$ = tmp;
6523 }
6524 /* In SystemVerilog an unnamed block can contain variable declarations. */
6525 | K_begin
6526 { PBlock*tmp = pform_push_block_scope(@1, 0, PBlock::BL_SEQ);
6527 current_block_stack.push(tmp);
6528 }
6529 block_item_decls_opt
6530 { if ($3) {
6531 if (! gn_system_verilog()) {
6532 yyerror("error: Variable declaration in unnamed block "
6533 "requires SystemVerilog.");
6534 }
6535 } else {
6536 /* If there are no declarations in the scope then just delete it. */
6537 pform_pop_scope();
6538 assert(! current_block_stack.empty());
6539 PBlock*tmp = current_block_stack.top();
6540 current_block_stack.pop();
6541 delete tmp;
6542 }
6543 }
6544 statement_or_null_list K_end
6545 { PBlock*tmp;
6546 if ($3) {
6547 pform_pop_scope();
6548 assert(! current_block_stack.empty());
6549 tmp = current_block_stack.top();
6550 current_block_stack.pop();
6551 } else {
6552 tmp = new PBlock(PBlock::BL_SEQ);
6553 FILE_NAME(tmp, @1);
6554 }
6555 if ($5) tmp->set_statement(*$5);
6556 delete $5;
6557 $$ = tmp;
6558 }
6559 | K_begin ':' IDENTIFIER
6560 { PBlock*tmp = pform_push_block_scope(@1, $3, PBlock::BL_SEQ);
6561 current_block_stack.push(tmp);
6562 }
6563 block_item_decls_opt
6564 statement_or_null_list_opt K_end endlabel_opt
6565 { pform_pop_scope();
6566 assert(! current_block_stack.empty());
6567 PBlock*tmp = current_block_stack.top();
6568 current_block_stack.pop();
6569 if ($6) tmp->set_statement(*$6);
6570 delete $6;
6571 if ($8) {
6572 if (strcmp($3,$8) != 0) {
6573 yyerror(@8, "error: End label doesn't match begin name");
6574 }
6575 if (! gn_system_verilog()) {
6576 yyerror(@8, "error: Begin end labels require "
6577 "SystemVerilog.");
6578 }
6579 delete[]$8;
6580 }
6581 delete[]$3;
6582 $$ = tmp;
6583 }
6584
6585 /* fork-join blocks are very similar to begin-end blocks. In fact,
6586 from the parser's perspective there is no real difference. All we
6587 need to do is remember that this is a parallel block so that the
6588 code generator can do the right thing. */
6589
6590 | K_fork join_keyword
6591 { PBlock*tmp = new PBlock($2);
6592 FILE_NAME(tmp, @1);
6593 $$ = tmp;
6594 }
6595 /* In SystemVerilog an unnamed block can contain variable declarations. */
6596 | K_fork
6597 { PBlock*tmp = pform_push_block_scope(@1, 0, PBlock::BL_PAR);
6598 current_block_stack.push(tmp);
6599 }
6600 block_item_decls_opt
6601 { if ($3) {
6602 if (! gn_system_verilog()) {
6603 yyerror("error: Variable declaration in unnamed block "
6604 "requires SystemVerilog.");
6605 }
6606 } else {
6607 /* If there are no declarations in the scope then just delete it. */
6608 pform_pop_scope();
6609 assert(! current_block_stack.empty());
6610 PBlock*tmp = current_block_stack.top();
6611 current_block_stack.pop();
6612 delete tmp;
6613 }
6614 }
6615 statement_or_null_list join_keyword
6616 { PBlock*tmp;
6617 if ($3) {
6618 pform_pop_scope();
6619 assert(! current_block_stack.empty());
6620 tmp = current_block_stack.top();
6621 current_block_stack.pop();
6622 tmp->set_join_type($6);
6623 } else {
6624 tmp = new PBlock($6);
6625 FILE_NAME(tmp, @1);
6626 }
6627 if ($5) tmp->set_statement(*$5);
6628 delete $5;
6629 $$ = tmp;
6630 }
6631 | K_fork ':' IDENTIFIER
6632 { PBlock*tmp = pform_push_block_scope(@1, $3, PBlock::BL_PAR);
6633 current_block_stack.push(tmp);
6634 }
6635 block_item_decls_opt
6636 statement_or_null_list_opt join_keyword endlabel_opt
6637 { pform_pop_scope();
6638 assert(! current_block_stack.empty());
6639 PBlock*tmp = current_block_stack.top();
6640 current_block_stack.pop();
6641 tmp->set_join_type($7);
6642 if ($6) tmp->set_statement(*$6);
6643 delete $6;
6644 if ($8) {
6645 if (strcmp($3,$8) != 0) {
6646 yyerror(@8, "error: End label doesn't match fork name");
6647 }
6648 if (! gn_system_verilog()) {
6649 yyerror(@8, "error: Fork end labels require "
6650 "SystemVerilog.");
6651 }
6652 delete[]$8;
6653 }
6654 delete[]$3;
6655 $$ = tmp;
6656 }
6657
6658 | K_disable hierarchy_identifier ';'
6659 { PDisable*tmp = new PDisable(*$2);
6660 FILE_NAME(tmp, @1);
6661 delete $2;
6662 $$ = tmp;
6663 }
6664 | K_disable K_fork ';'
6665 { pform_name_t tmp_name;
6666 PDisable*tmp = new PDisable(tmp_name);
6667 FILE_NAME(tmp, @1);
6668 $$ = tmp;
6669 }
6670 | K_TRIGGER hierarchy_identifier ';'
6671 { PTrigger*tmp = pform_new_trigger(@2, 0, *$2);
6672 FILE_NAME(tmp, @1);
6673 delete $2;
6674 $$ = tmp;
6675 }
6676 | K_TRIGGER PACKAGE_IDENTIFIER K_SCOPE_RES hierarchy_identifier
6677 { PTrigger*tmp = pform_new_trigger(@4, $2, *$4);
6678 FILE_NAME(tmp, @1);
6679 delete $4;
6680 $$ = tmp;
6681 }
6682
6683 | procedural_assertion_statement { $$ = $1; }
6684
6685 | loop_statement { $$ = $1; }
6686
6687 | jump_statement { $$ = $1; }
6688
6689 | unique_priority K_case '(' expression ')' case_items K_endcase
6690 { PCase*tmp = new PCase($1, NetCase::EQ, $4, $6);
6691 FILE_NAME(tmp, @2);
6692 $$ = tmp;
6693 }
6694 | unique_priority K_casex '(' expression ')' case_items K_endcase
6695 { PCase*tmp = new PCase($1, NetCase::EQX, $4, $6);
6696 FILE_NAME(tmp, @2);
6697 $$ = tmp;
6698 }
6699 | unique_priority K_casez '(' expression ')' case_items K_endcase
6700 { PCase*tmp = new PCase($1, NetCase::EQZ, $4, $6);
6701 FILE_NAME(tmp, @1);
6702 $$ = tmp;
6703 }
6704 | unique_priority K_case '(' expression ')' error K_endcase
6705 { yyerrok; }
6706 | unique_priority K_casex '(' expression ')' error K_endcase
6707 { yyerrok; }
6708 | unique_priority K_casez '(' expression ')' error K_endcase
6709 { yyerrok; }
6710
6711 | K_if '(' expression ')' statement_or_null %prec less_than_K_else
6712 { PCondit*tmp = new PCondit($3, $5, 0);
6713 FILE_NAME(tmp, @1);
6714 $$ = tmp;
6715 }
6716 | K_if '(' expression ')' statement_or_null K_else statement_or_null
6717 { PCondit*tmp = new PCondit($3, $5, $7);
6718 FILE_NAME(tmp, @1);
6719 $$ = tmp;
6720 }
6721 | K_if '(' error ')' statement_or_null %prec less_than_K_else
6722 { yyerror(@1, "error: Malformed conditional expression.");
6723 $$ = $5;
6724 }
6725 | K_if '(' error ')' statement_or_null K_else statement_or_null
6726 { yyerror(@1, "error: Malformed conditional expression.");
6727 $$ = $5;
6728 }
6729 /* SystemVerilog adds the compressed_statement */
6730
6731 | compressed_statement ';'
6732 { $$ = $1; }
6733
6734 /* increment/decrement expressions can also be statements. When used
6735 as statements, we can rewrite a++ as a += 1, and so on. */
6736
6737 | inc_or_dec_expression ';'
6738 { $$ = pform_compressed_assign_from_inc_dec(@1, $1); }
6739
6740 /* */
6741
6742 | delay1 statement_or_null
6743 { PExpr*del = $1->front();
6744 assert($1->size() == 1);
6745 delete $1;
6746 PDelayStatement*tmp = new PDelayStatement(del, $2);
6747 FILE_NAME(tmp, @1);
6748 $$ = tmp;
6749 }
6750
6751 | event_control statement_or_null
6752 { PEventStatement*tmp = $1;
6753 if (tmp == 0) {
6754 yyerror(@1, "error: Invalid event control.");
6755 $$ = 0;
6756 } else {
6757 tmp->set_statement($2);
6758 $$ = tmp;
6759 }
6760 }
6761 | '@' '*' statement_or_null
6762 { PEventStatement*tmp = new PEventStatement;
6763 FILE_NAME(tmp, @1);
6764 tmp->set_statement($3);
6765 $$ = tmp;
6766 }
6767 | '@' '(' '*' ')' statement_or_null
6768 { PEventStatement*tmp = new PEventStatement;
6769 FILE_NAME(tmp, @1);
6770 tmp->set_statement($5);
6771 $$ = tmp;
6772 }
6773
6774 /* Various assignment statements */
6775
6776 | lpvalue '=' expression ';'
6777 { PAssign*tmp = new PAssign($1,$3);
6778 FILE_NAME(tmp, @1);
6779 $$ = tmp;
6780 }
6781
6782 | error '=' expression ';'
6783 { yyerror(@2, "Syntax in assignment statement l-value.");
6784 yyerrok;
6785 $$ = new PNoop;
6786 }
6787 | lpvalue K_LE expression ';'
6788 { PAssignNB*tmp = new PAssignNB($1,$3);
6789 FILE_NAME(tmp, @1);
6790 $$ = tmp;
6791 }
6792 | error K_LE expression ';'
6793 { yyerror(@2, "Syntax in assignment statement l-value.");
6794 yyerrok;
6795 $$ = new PNoop;
6796 }
6797 | lpvalue '=' delay1 expression ';'
6798 { PExpr*del = $3->front(); $3->pop_front();
6799 assert($3->empty());
6800 PAssign*tmp = new PAssign($1,del,$4);
6801 FILE_NAME(tmp, @1);
6802 $$ = tmp;
6803 }
6804 | lpvalue K_LE delay1 expression ';'
6805 { PExpr*del = $3->front(); $3->pop_front();
6806 assert($3->empty());
6807 PAssignNB*tmp = new PAssignNB($1,del,$4);
6808 FILE_NAME(tmp, @1);
6809 $$ = tmp;
6810 }
6811 | lpvalue '=' event_control expression ';'
6812 { PAssign*tmp = new PAssign($1,0,$3,$4);
6813 FILE_NAME(tmp, @1);
6814 $$ = tmp;
6815 }
6816 | lpvalue '=' K_repeat '(' expression ')' event_control expression ';'
6817 { PAssign*tmp = new PAssign($1,$5,$7,$8);
6818 FILE_NAME(tmp,@1);
6819 tmp->set_lineno(@1.first_line);
6820 $$ = tmp;
6821 }
6822 | lpvalue K_LE event_control expression ';'
6823 { PAssignNB*tmp = new PAssignNB($1,0,$3,$4);
6824 FILE_NAME(tmp, @1);
6825 $$ = tmp;
6826 }
6827 | lpvalue K_LE K_repeat '(' expression ')' event_control expression ';'
6828 { PAssignNB*tmp = new PAssignNB($1,$5,$7,$8);
6829 FILE_NAME(tmp, @1);
6830 $$ = tmp;
6831 }
6832
6833 /* The IEEE1800 standard defines dynamic_array_new assignment as a
6834 different rule from regular assignment. That implies that the
6835 dynamic_array_new is not an expression in general, which makes
6836 some sense. Elaboration should make sure the lpvalue is an array name. */
6837
6838 | lpvalue '=' dynamic_array_new ';'
6839 { PAssign*tmp = new PAssign($1,$3);
6840 FILE_NAME(tmp, @1);
6841 $$ = tmp;
6842 }
6843
6844 /* The class new and dynamic array new expressions are special, so
6845 sit in rules of their own. */
6846
6847 | lpvalue '=' class_new ';'
6848 { PAssign*tmp = new PAssign($1,$3);
6849 FILE_NAME(tmp, @1);
6850 $$ = tmp;
6851 }
6852
6853 | K_wait '(' expression ')' statement_or_null
6854 { PEventStatement*tmp;
6855 PEEvent*etmp = new PEEvent(PEEvent::POSITIVE, $3);
6856 tmp = new PEventStatement(etmp);
6857 FILE_NAME(tmp,@1);
6858 tmp->set_statement($5);
6859 $$ = tmp;
6860 }
6861 | K_wait K_fork ';'
6862 { PEventStatement*tmp = new PEventStatement((PEEvent*)0);
6863 FILE_NAME(tmp,@1);
6864 $$ = tmp;
6865 }
6866 | SYSTEM_IDENTIFIER '(' expression_list_with_nuls ')' ';'
6867 { PCallTask*tmp = new PCallTask(lex_strings.make($1), *$3);
6868 FILE_NAME(tmp,@1);
6869 delete[]$1;
6870 delete $3;
6871 $$ = tmp;
6872 }
6873 | SYSTEM_IDENTIFIER ';'
6874 { list<PExpr*>pt;
6875 PCallTask*tmp = new PCallTask(lex_strings.make($1), pt);
6876 FILE_NAME(tmp,@1);
6877 delete[]$1;
6878 $$ = tmp;
6879 }
6880
6881 | hierarchy_identifier '(' expression_list_with_nuls ')' ';'
6882 { PCallTask*tmp = pform_make_call_task(@1, *$1, *$3);
6883 delete $1;
6884 delete $3;
6885 $$ = tmp;
6886 }
6887
6888 | hierarchy_identifier K_with '{' constraint_block_item_list_opt '}' ';'
6889 { /* ....randomize with { <constraints> } */
6890 if ($1 && peek_tail_name(*$1) == "randomize") {
6891 if (!gn_system_verilog())
6892 yyerror(@2, "error: Randomize with constraint requires SystemVerilog.");
6893 else
6894 yyerror(@2, "sorry: Randomize with constraint not supported.");
6895 } else {
6896 yyerror(@2, "error: Constraint block can only be applied to randomize method.");
6897 }
6898 list<PExpr*>pt;
6899 PCallTask*tmp = new PCallTask(*$1, pt);
6900 FILE_NAME(tmp, @1);
6901 delete $1;
6902 $$ = tmp;
6903 }
6904
6905 | implicit_class_handle '.' hierarchy_identifier '(' expression_list_with_nuls ')' ';'
6906 { pform_name_t*t_name = $1;
6907 while (! $3->empty()) {
6908 t_name->push_back($3->front());
6909 $3->pop_front();
6910 }
6911 PCallTask*tmp = new PCallTask(*t_name, *$5);
6912 FILE_NAME(tmp, @1);
6913 delete $1;
6914 delete $3;
6915 delete $5;
6916 $$ = tmp;
6917 }
6918
6919 | hierarchy_identifier ';'
6920 { list<PExpr*>pt;
6921 PCallTask*tmp = pform_make_call_task(@1, *$1, pt);
6922 delete $1;
6923 $$ = tmp;
6924 }
6925
6926 /* IEEE1800 A.1.8: class_constructor_declaration with a call to
6927 parent constructor. Note that the implicit_class_handle must
6928 be K_super ("this.new" makes little sense) but that would
6929 cause a conflict. Anyhow, this statement must be in the
6930 beginning of a constructor, but let the elaborator figure that
6931 out. */
6932
6933 | implicit_class_handle '.' K_new '(' expression_list_with_nuls ')' ';'
6934 { PChainConstructor*tmp = new PChainConstructor(*$5);
6935 FILE_NAME(tmp, @3);
6936 delete $1;
6937 $$ = tmp;
6938 }
6939 | hierarchy_identifier '(' error ')' ';'
6940 { yyerror(@3, "error: Syntax error in task arguments.");
6941 list<PExpr*>pt;
6942 PCallTask*tmp = pform_make_call_task(@1, *$1, pt);
6943 delete $1;
6944 $$ = tmp;
6945 }
6946
6947 | error ';'
6948 { yyerror(@2, "error: malformed statement");
6949 yyerrok;
6950 $$ = new PNoop;
6951 }
6952
6953 ;
6954
6955 compressed_statement
6956 : lpvalue K_PLUS_EQ expression
6957 { PAssign*tmp = new PAssign($1, '+', $3);
6958 FILE_NAME(tmp, @1);
6959 $$ = tmp;
6960 }
6961 | lpvalue K_MINUS_EQ expression
6962 { PAssign*tmp = new PAssign($1, '-', $3);
6963 FILE_NAME(tmp, @1);
6964 $$ = tmp;
6965 }
6966 | lpvalue K_MUL_EQ expression
6967 { PAssign*tmp = new PAssign($1, '*', $3);
6968 FILE_NAME(tmp, @1);
6969 $$ = tmp;
6970 }
6971 | lpvalue K_DIV_EQ expression
6972 { PAssign*tmp = new PAssign($1, '/', $3);
6973 FILE_NAME(tmp, @1);
6974 $$ = tmp;
6975 }
6976 | lpvalue K_MOD_EQ expression
6977 { PAssign*tmp = new PAssign($1, '%', $3);
6978 FILE_NAME(tmp, @1);
6979 $$ = tmp;
6980 }
6981 | lpvalue K_AND_EQ expression
6982 { PAssign*tmp = new PAssign($1, '&', $3);
6983 FILE_NAME(tmp, @1);
6984 $$ = tmp;
6985 }
6986 | lpvalue K_OR_EQ expression
6987 { PAssign*tmp = new PAssign($1, '|', $3);
6988 FILE_NAME(tmp, @1);
6989 $$ = tmp;
6990 }
6991 | lpvalue K_XOR_EQ expression
6992 { PAssign*tmp = new PAssign($1, '^', $3);
6993 FILE_NAME(tmp, @1);
6994 $$ = tmp;
6995 }
6996 | lpvalue K_LS_EQ expression
6997 { PAssign *tmp = new PAssign($1, 'l', $3);
6998 FILE_NAME(tmp, @1);
6999 $$ = tmp;
7000 }
7001 | lpvalue K_RS_EQ expression
7002 { PAssign*tmp = new PAssign($1, 'r', $3);
7003 FILE_NAME(tmp, @1);
7004 $$ = tmp;
7005 }
7006 | lpvalue K_RSS_EQ expression
7007 { PAssign *tmp = new PAssign($1, 'R', $3);
7008 FILE_NAME(tmp, @1);
7009 $$ = tmp;
7010 }
7011 ;
7012
7013
7014 statement_or_null_list_opt
7015 : statement_or_null_list
7016 { $$ = $1; }
7017 |
7018 { $$ = 0; }
7019 ;
7020
7021 statement_or_null_list
7022 : statement_or_null_list statement_or_null
7023 { vector<Statement*>*tmp = $1;
7024 if ($2) tmp->push_back($2);
7025 $$ = tmp;
7026 }
7027 | statement_or_null
7028 { vector<Statement*>*tmp = new vector<Statement*>(0);
7029 if ($1) tmp->push_back($1);
7030 $$ = tmp;
7031 }
7032 ;
7033
7034 analog_statement
7035 : branch_probe_expression K_CONTRIBUTE expression ';'
7036 { $$ = pform_contribution_statement(@2, $1, $3); }
7037 ;
7038
7039 /* Task items are, other than the statement, task port items and
7040 other block items. */
7041 task_item
7042 : block_item_decl { $$ = new vector<pform_tf_port_t>(0); }
7043 | tf_port_declaration { $$ = $1; }
7044 ;
7045
7046 task_item_list
7047 : task_item_list task_item
7048 { vector<pform_tf_port_t>*tmp = $1;
7049 size_t s1 = tmp->size();
7050 tmp->resize(s1 + $2->size());
7051 for (size_t idx = 0 ; idx < $2->size() ; idx += 1)
7052 tmp->at(s1 + idx) = $2->at(idx);
7053 delete $2;
7054 $$ = tmp;
7055 }
7056 | task_item
7057 { $$ = $1; }
7058 ;
7059
7060 task_item_list_opt
7061 : task_item_list
7062 { $$ = $1; }
7063 |
7064 { $$ = 0; }
7065 ;
7066
7067 tf_port_list_opt
7068 : tf_port_list { $$ = $1; }
7069 | { $$ = 0; }
7070 ;
7071
7072 /* Note that the lexor notices the "table" keyword and starts
7073 the UDPTABLE state. It needs to happen there so that all the
7074 characters in the table are interpreted in that mode. It is still
7075 up to this rule to take us out of the UDPTABLE state. */
7076 udp_body
7077 : K_table udp_entry_list K_endtable
7078 { lex_end_table();
7079 $$ = $2;
7080 }
7081 | K_table K_endtable
7082 { lex_end_table();
7083 yyerror(@1, "error: Empty UDP table.");
7084 $$ = 0;
7085 }
7086 | K_table error K_endtable
7087 { lex_end_table();
7088 yyerror(@2, "Errors in UDP table");
7089 yyerrok;
7090 $$ = 0;
7091 }
7092 ;
7093
7094 udp_entry_list
7095 : udp_comb_entry_list
7096 | udp_sequ_entry_list
7097 ;
7098
7099 udp_comb_entry
7100 : udp_input_list ':' udp_output_sym ';'
7101 { char*tmp = new char[strlen($1)+3];
7102 strcpy(tmp, $1);
7103 char*tp = tmp+strlen(tmp);
7104 *tp++ = ':';
7105 *tp++ = $3;
7106 *tp++ = 0;
7107 delete[]$1;
7108 $$ = tmp;
7109 }
7110 ;
7111
7112 udp_comb_entry_list
7113 : udp_comb_entry
7114 { list<string>*tmp = new list<string>;
7115 tmp->push_back($1);
7116 delete[]$1;
7117 $$ = tmp;
7118 }
7119 | udp_comb_entry_list udp_comb_entry
7120 { list<string>*tmp = $1;
7121 tmp->push_back($2);
7122 delete[]$2;
7123 $$ = tmp;
7124 }
7125 ;
7126
7127 udp_sequ_entry_list
7128 : udp_sequ_entry
7129 { list<string>*tmp = new list<string>;
7130 tmp->push_back($1);
7131 delete[]$1;
7132 $$ = tmp;
7133 }
7134 | udp_sequ_entry_list udp_sequ_entry
7135 { list<string>*tmp = $1;
7136 tmp->push_back($2);
7137 delete[]$2;
7138 $$ = tmp;
7139 }
7140 ;
7141
7142 udp_sequ_entry
7143 : udp_input_list ':' udp_input_sym ':' udp_output_sym ';'
7144 { char*tmp = new char[strlen($1)+5];
7145 strcpy(tmp, $1);
7146 char*tp = tmp+strlen(tmp);
7147 *tp++ = ':';
7148 *tp++ = $3;
7149 *tp++ = ':';
7150 *tp++ = $5;
7151 *tp++ = 0;
7152 $$ = tmp;
7153 }
7154 ;
7155
7156 udp_initial
7157 : K_initial IDENTIFIER '=' number ';'
7158 { PExpr*etmp = new PENumber($4);
7159 PEIdent*itmp = new PEIdent(lex_strings.make($2));
7160 PAssign*atmp = new PAssign(itmp, etmp);
7161 FILE_NAME(atmp, @2);
7162 delete[]$2;
7163 $$ = atmp;
7164 }
7165 ;
7166
7167 udp_init_opt
7168 : udp_initial { $$ = $1; }
7169 | { $$ = 0; }
7170 ;
7171
7172 udp_input_list
7173 : udp_input_sym
7174 { char*tmp = new char[2];
7175 tmp[0] = $1;
7176 tmp[1] = 0;
7177 $$ = tmp;
7178 }
7179 | udp_input_list udp_input_sym
7180 { char*tmp = new char[strlen($1)+2];
7181 strcpy(tmp, $1);
7182 char*tp = tmp+strlen(tmp);
7183 *tp++ = $2;
7184 *tp++ = 0;
7185 delete[]$1;
7186 $$ = tmp;
7187 }
7188 ;
7189
7190 udp_input_sym
7191 : '0' { $$ = '0'; }
7192 | '1' { $$ = '1'; }
7193 | 'x' { $$ = 'x'; }
7194 | '?' { $$ = '?'; }
7195 | 'b' { $$ = 'b'; }
7196 | '*' { $$ = '*'; }
7197 | '%' { $$ = '%'; }
7198 | 'f' { $$ = 'f'; }
7199 | 'F' { $$ = 'F'; }
7200 | 'l' { $$ = 'l'; }
7201 | 'h' { $$ = 'h'; }
7202 | 'B' { $$ = 'B'; }
7203 | 'r' { $$ = 'r'; }
7204 | 'R' { $$ = 'R'; }
7205 | 'M' { $$ = 'M'; }
7206 | 'n' { $$ = 'n'; }
7207 | 'N' { $$ = 'N'; }
7208 | 'p' { $$ = 'p'; }
7209 | 'P' { $$ = 'P'; }
7210 | 'Q' { $$ = 'Q'; }
7211 | 'q' { $$ = 'q'; }
7212 | '_' { $$ = '_'; }
7213 | '+' { $$ = '+'; }
7214 | DEC_NUMBER { yyerror(@1, "internal error: Input digits parse as decimal number!"); $$ = '0'; }
7215 ;
7216
7217 udp_output_sym
7218 : '0' { $$ = '0'; }
7219 | '1' { $$ = '1'; }
7220 | 'x' { $$ = 'x'; }
7221 | '-' { $$ = '-'; }
7222 | DEC_NUMBER { yyerror(@1, "internal error: Output digits parse as decimal number!"); $$ = '0'; }
7223 ;
7224
7225 /* Port declarations create wires for the inputs and the output. The
7226 makes for these ports are scoped within the UDP, so there is no
7227 hierarchy involved. */
7228 udp_port_decl
7229 : K_input list_of_identifiers ';'
7230 { $$ = pform_make_udp_input_ports($2); }
7231 | K_output IDENTIFIER ';'
7232 { perm_string pname = lex_strings.make($2);
7233 PWire*pp = new PWire(pname, NetNet::IMPLICIT, NetNet::POUTPUT, IVL_VT_LOGIC);
7234 vector<PWire*>*tmp = new vector<PWire*>(1);
7235 (*tmp)[0] = pp;
7236 $$ = tmp;
7237 delete[]$2;
7238 }
7239 | K_reg IDENTIFIER ';'
7240 { perm_string pname = lex_strings.make($2);
7241 PWire*pp = new PWire(pname, NetNet::REG, NetNet::PIMPLICIT, IVL_VT_LOGIC);
7242 vector<PWire*>*tmp = new vector<PWire*>(1);
7243 (*tmp)[0] = pp;
7244 $$ = tmp;
7245 delete[]$2;
7246 }
7247 | K_reg K_output IDENTIFIER ';'
7248 { perm_string pname = lex_strings.make($3);
7249 PWire*pp = new PWire(pname, NetNet::REG, NetNet::POUTPUT, IVL_VT_LOGIC);
7250 vector<PWire*>*tmp = new vector<PWire*>(1);
7251 (*tmp)[0] = pp;
7252 $$ = tmp;
7253 delete[]$3;
7254 }
7255 ;
7256
7257 udp_port_decls
7258 : udp_port_decl
7259 { $$ = $1; }
7260 | udp_port_decls udp_port_decl
7261 { vector<PWire*>*tmp = $1;
7262 size_t s1 = $1->size();
7263 tmp->resize(s1+$2->size());
7264 for (size_t idx = 0 ; idx < $2->size() ; idx += 1)
7265 tmp->at(s1+idx) = $2->at(idx);
7266 $$ = tmp;
7267 delete $2;
7268 }
7269 ;
7270
7271 udp_port_list
7272 : IDENTIFIER
7273 { list<perm_string>*tmp = new list<perm_string>;
7274 tmp->push_back(lex_strings.make($1));
7275 delete[]$1;
7276 $$ = tmp;
7277 }
7278 | udp_port_list ',' IDENTIFIER
7279 { list<perm_string>*tmp = $1;
7280 tmp->push_back(lex_strings.make($3));
7281 delete[]$3;
7282 $$ = tmp;
7283 }
7284 ;
7285
7286 udp_reg_opt: K_reg { $$ = true; } | { $$ = false; };
7287
7288 udp_initial_expr_opt
7289 : '=' expression { $$ = $2; }
7290 | { $$ = 0; }
7291 ;
7292
7293 udp_input_declaration_list
7294 : K_input IDENTIFIER
7295 { list<perm_string>*tmp = new list<perm_string>;
7296 tmp->push_back(lex_strings.make($2));
7297 $$ = tmp;
7298 delete[]$2;
7299 }
7300 | udp_input_declaration_list ',' K_input IDENTIFIER
7301 { list<perm_string>*tmp = $1;
7302 tmp->push_back(lex_strings.make($4));
7303 $$ = tmp;
7304 delete[]$4;
7305 }
7306 ;
7307
7308 udp_primitive
7309 /* This is the syntax for primitives that uses the IEEE1364-1995
7310 format. The ports are simply names in the port list, and the
7311 declarations are in the body. */
7312
7313 : K_primitive IDENTIFIER '(' udp_port_list ')' ';'
7314 udp_port_decls
7315 udp_init_opt
7316 udp_body
7317 K_endprimitive endlabel_opt
7318
7319 { perm_string tmp2 = lex_strings.make($2);
7320 pform_make_udp(tmp2, $4, $7, $9, $8,
7321 @2.text, @2.first_line);
7322 if ($11) {
7323 if (strcmp($2,$11) != 0) {
7324 yyerror(@11, "error: End label doesn't match "
7325 "primitive name");
7326 }
7327 if (! gn_system_verilog()) {
7328 yyerror(@11, "error: Primitive end labels "
7329 "require SystemVerilog.");
7330 }
7331 delete[]$11;
7332 }
7333 delete[]$2;
7334 }
7335
7336 /* This is the syntax for IEEE1364-2001 format definitions. The port
7337 names and declarations are all in the parameter list. */
7338
7339 | K_primitive IDENTIFIER
7340 '(' K_output udp_reg_opt IDENTIFIER udp_initial_expr_opt ','
7341 udp_input_declaration_list ')' ';'
7342 udp_body
7343 K_endprimitive endlabel_opt
7344
7345 { perm_string tmp2 = lex_strings.make($2);
7346 perm_string tmp6 = lex_strings.make($6);
7347 pform_make_udp(tmp2, $5, tmp6, $7, $9, $12,
7348 @2.text, @2.first_line);
7349 if ($14) {
7350 if (strcmp($2,$14) != 0) {
7351 yyerror(@14, "error: End label doesn't match "
7352 "primitive name");
7353 }
7354 if (! gn_system_verilog()) {
7355 yyerror(@14, "error: Primitive end labels "
7356 "require SystemVerilog.");
7357 }
7358 delete[]$14;
7359 }
7360 delete[]$2;
7361 delete[]$6;
7362 }
7363 ;
7364
7365 unique_priority
7366 : { $$ = IVL_CASE_QUALITY_BASIC; }
7367 | K_unique { $$ = IVL_CASE_QUALITY_UNIQUE; }
7368 | K_unique0 { $$ = IVL_CASE_QUALITY_UNIQUE0; }
7369 | K_priority { $$ = IVL_CASE_QUALITY_PRIORITY; }
7370 ;
7371
7372 /* Many keywords can be optional in the syntax, although their
7373 presence is significant. This is a fairly common pattern so
7374 collect those rules here. */
7375
7376 K_genvar_opt : K_genvar { $$ = true; } | { $$ = false; } ;
7377 K_packed_opt : K_packed { $$ = true; } | { $$ = false; } ;
7378 K_reg_opt : K_reg { $$ = true; } | { $$ = false; } ;
7379 K_static_opt : K_static { $$ = true; } | { $$ = false; } ;
7380 K_virtual_opt : K_virtual { $$ = true; } | { $$ = false; } ;
7381