1 /*************************************************************************** 2 JSPICE3 adaptation of Spice3f2 - Copyright (c) Stephen R. Whiteley 1992 3 Copyright 1990 Regents of the University of California. All rights reserved. 4 Authors: 1985 Hong June Park, Thomas L. Quarles 5 1993 Stephen R. Whiteley 6 ****************************************************************************/ 7 8 #ifndef BSIM1 9 #define BSIM1 10 11 #include "devdefs.h" 12 13 /* declarations for B1 MOSFETs */ 14 15 #define B1numStates 35 16 #define B1NDCOEFFS 82 17 18 /* information needed for each instance */ 19 20 typedef struct sBSIM1instance { 21 struct sBSIM1model *B1modPtr; /* pointer to model */ 22 struct sBSIM1instance *B1nextInstance; /* pointer to next instance of 23 *current model*/ 24 IFuid B1name; /* pointer to character string naming this instance */ 25 int B1states; /* index into state table for this device */ 26 27 int B1dNode; /* number of the gate node of the mosfet */ 28 int B1gNode; /* number of the gate node of the mosfet */ 29 int B1sNode; /* number of the source node of the mosfet */ 30 int B1bNode; /* number of the bulk node of the mosfet */ 31 int B1dNodePrime; /* number of the internal drain node of the mosfet */ 32 int B1sNodePrime; /* number of the internal source node of the mosfet */ 33 34 double B1l; /* the length of the channel region */ 35 double B1w; /* the width of the channel region */ 36 double B1drainArea; /* the area of the drain diffusion */ 37 double B1sourceArea; /* the area of the source diffusion */ 38 double B1drainSquares; /* the length of the drain in squares */ 39 double B1sourceSquares; /* the length of the source in squares */ 40 double B1drainPerimeter; 41 double B1sourcePerimeter; 42 double B1sourceConductance; /*conductance of source(or 0):set in setup*/ 43 double B1drainConductance; /*conductance of drain(or 0):set in setup*/ 44 45 double B1icVBS; /* initial condition B-S voltage */ 46 double B1icVDS; /* initial condition D-S voltage */ 47 double B1icVGS; /* initial condition G-S voltage */ 48 double B1von; 49 double B1vdsat; 50 int B1off; /* non-zero to indicate device is off for dc analysis*/ 51 int B1mode; /* device mode : 1 = normal, -1 = inverse */ 52 53 double B1vfb; /* flat band voltage at given L and W */ 54 double B1phi; /* surface potential at strong inversion */ 55 double B1K1; /* bulk effect coefficient 1 */ 56 double B1K2; /* bulk effect coefficient 2 */ 57 double B1eta; /* drain induced barrier lowering */ 58 double B1etaB; /* Vbs dependence of Eta */ 59 double B1etaD; /* Vds dependence of Eta */ 60 double B1betaZero; /* Beta at vds = 0 and vgs = Vth */ 61 double B1betaZeroB; /* Vbs dependence of BetaZero */ 62 double B1betaVdd; /* Beta at vds=Vdd and vgs=Vth */ 63 double B1betaVddB; /* Vbs dependence of BVdd */ 64 double B1betaVddD; /* Vds dependence of BVdd */ 65 double B1ugs; /* Mobility degradation due to gate field*/ 66 double B1ugsB; /* Vbs dependence of Ugs */ 67 double B1uds; /* Drift Velocity Saturation due to Vds */ 68 double B1udsB; /* Vbs dependence of Uds */ 69 double B1udsD; /* Vds dependence of Uds */ 70 double B1subthSlope; /* slope of subthreshold current with Vgs*/ 71 double B1subthSlopeB; /* Vbs dependence of Subthreshold Slope */ 72 double B1subthSlopeD; /* Vds dependence of Subthreshold Slope */ 73 double B1GDoverlapCap;/* Gate Drain Overlap Capacitance */ 74 double B1GSoverlapCap;/* Gate Source Overlap Capacitance */ 75 double B1GBoverlapCap;/* Gate Bulk Overlap Capacitance */ 76 double B1vt0; 77 double B1vdd; /* Supply Voltage */ 78 double B1temp; 79 double B1oxideThickness; 80 double B1channelChargePartitionFlag; 81 82 83 unsigned B1lGiven :1; 84 unsigned B1wGiven :1; 85 unsigned B1drainAreaGiven :1; 86 unsigned B1sourceAreaGiven :1; 87 unsigned B1drainSquaresGiven :1; 88 unsigned B1sourceSquaresGiven :1; 89 unsigned B1drainPerimeterGiven :1; 90 unsigned B1sourcePerimeterGiven :1; 91 unsigned B1dNodePrimeSet :1; 92 unsigned B1sNodePrimeSet :1; 93 unsigned B1icVBSGiven :1; 94 unsigned B1icVDSGiven :1; 95 unsigned B1icVGSGiven :1; 96 unsigned B1vonGiven :1; 97 unsigned B1vdsatGiven :1; 98 99 100 double *B1DdPtr; /* pointer to sparse matrix element at 101 * (Drain node,drain node) */ 102 double *B1GgPtr; /* pointer to sparse matrix element at 103 * (gate node,gate node) */ 104 double *B1SsPtr; /* pointer to sparse matrix element at 105 * (source node,source node) */ 106 double *B1BbPtr; /* pointer to sparse matrix element at 107 * (bulk node,bulk node) */ 108 double *B1DPdpPtr; /* pointer to sparse matrix element at 109 * (drain prime node,drain prime node) */ 110 double *B1SPspPtr; /* pointer to sparse matrix element at 111 * (source prime node,source prime node) */ 112 double *B1DdpPtr; /* pointer to sparse matrix element at 113 * (drain node,drain prime node) */ 114 double *B1GbPtr; /* pointer to sparse matrix element at 115 * (gate node,bulk node) */ 116 double *B1GdpPtr; /* pointer to sparse matrix element at 117 * (gate node,drain prime node) */ 118 double *B1GspPtr; /* pointer to sparse matrix element at 119 * (gate node,source prime node) */ 120 double *B1SspPtr; /* pointer to sparse matrix element at 121 * (source node,source prime node) */ 122 double *B1BdpPtr; /* pointer to sparse matrix element at 123 * (bulk node,drain prime node) */ 124 double *B1BspPtr; /* pointer to sparse matrix element at 125 * (bulk node,source prime node) */ 126 double *B1DPspPtr; /* pointer to sparse matrix element at 127 * (drain prime node,source prime node) */ 128 double *B1DPdPtr; /* pointer to sparse matrix element at 129 * (drain prime node,drain node) */ 130 double *B1BgPtr; /* pointer to sparse matrix element at 131 * (bulk node,gate node) */ 132 double *B1DPgPtr; /* pointer to sparse matrix element at 133 * (drain prime node,gate node) */ 134 135 double *B1SPgPtr; /* pointer to sparse matrix element at 136 * (source prime node,gate node) */ 137 double *B1SPsPtr; /* pointer to sparse matrix element at 138 * (source prime node,source node) */ 139 double *B1DPbPtr; /* pointer to sparse matrix element at 140 * (drain prime node,bulk node) */ 141 double *B1SPbPtr; /* pointer to sparse matrix element at 142 * (source prime node,bulk node) */ 143 double *B1SPdpPtr; /* pointer to sparse matrix element at 144 * (source prime node,drain prime node) */ 145 146 #ifndef NODISTO 147 double B1dCoeffs[B1NDCOEFFS]; 148 #else /* NODISTO */ 149 double *B1dCoeffs; 150 #endif /* NODISTO */ 151 152 } B1instance ; 153 154 #ifndef CONFIG 155 156 #define B1vbd B1states+ 0 157 #define B1vbs B1states+ 1 158 #define B1vgs B1states+ 2 159 #define B1vds B1states+ 3 160 #define B1cd B1states+ 4 161 #define B1id B1states+ 4 162 #define B1cbs B1states+ 5 163 #define B1ibs B1states+ 5 164 #define B1cbd B1states+ 6 165 #define B1ibd B1states+ 6 166 #define B1gm B1states+ 7 167 #define B1gds B1states+ 8 168 #define B1gmbs B1states+ 9 169 #define B1gbd B1states+ 10 170 #define B1gbs B1states+ 11 171 #define B1qb B1states+ 12 172 #define B1cqb B1states+ 13 173 #define B1iqb B1states+ 13 174 #define B1qg B1states+ 14 175 #define B1cqg B1states+ 15 176 #define B1iqg B1states+ 15 177 #define B1qd B1states+ 16 178 #define B1cqd B1states+ 17 179 #define B1iqd B1states+ 17 180 #define B1cggb B1states+ 18 181 #define B1cgdb B1states+ 19 182 #define B1cgsb B1states+ 20 183 #define B1cbgb B1states+ 21 184 #define B1cbdb B1states+ 22 185 #define B1cbsb B1states+ 23 186 #define B1capbd B1states+ 24 187 #define B1iqbd B1states+ 25 188 #define B1cqbd B1states+ 25 189 #define B1capbs B1states+ 26 190 #define B1iqbs B1states+ 27 191 #define B1cqbs B1states+ 27 192 #define B1cdgb B1states+ 28 193 #define B1cddb B1states+ 29 194 #define B1cdsb B1states+ 30 195 #define B1vono B1states+ 31 196 #define B1vdsato B1states+ 32 197 #define B1qbs B1states+ 33 198 #define B1qbd B1states+ 34 199 200 /* 201 * the following naming convention is used: 202 * x = vgs 203 * y = vbs 204 * z = vds 205 * DrC is the DrCur 206 * therefore qg_xyz stands for the coefficient of the vgs*vbs*vds 207 * term in the multidimensional Taylor expansion for qg; and DrC_x2y 208 * for the coeff. of the vgs*vgs*vbs term in the DrC expansion. 209 */ 210 211 #define qg_x B1dCoeffs[0] 212 #define qg_y B1dCoeffs[1] 213 #define qg_z B1dCoeffs[2] 214 #define qg_x2 B1dCoeffs[3] 215 #define qg_y2 B1dCoeffs[4] 216 #define qg_z2 B1dCoeffs[5] 217 #define qg_xy B1dCoeffs[6] 218 #define qg_yz B1dCoeffs[7] 219 #define qg_xz B1dCoeffs[8] 220 #define qg_x3 B1dCoeffs[9] 221 #define qg_y3 B1dCoeffs[10] 222 #define qg_z3 B1dCoeffs[11] 223 #define qg_x2z B1dCoeffs[12] 224 #define qg_x2y B1dCoeffs[13] 225 #define qg_y2z B1dCoeffs[14] 226 #define qg_xy2 B1dCoeffs[15] 227 #define qg_xz2 B1dCoeffs[16] 228 #define qg_yz2 B1dCoeffs[17] 229 #define qg_xyz B1dCoeffs[18] 230 #define qb_x B1dCoeffs[19] 231 #define qb_y B1dCoeffs[20] 232 #define qb_z B1dCoeffs[21] 233 #define qb_x2 B1dCoeffs[22] 234 #define qb_y2 B1dCoeffs[23] 235 #define qb_z2 B1dCoeffs[24] 236 #define qb_xy B1dCoeffs[25] 237 #define qb_yz B1dCoeffs[26] 238 #define qb_xz B1dCoeffs[27] 239 #define qb_x3 B1dCoeffs[28] 240 #define qb_y3 B1dCoeffs[29] 241 #define qb_z3 B1dCoeffs[30] 242 #define qb_x2z B1dCoeffs[31] 243 #define qb_x2y B1dCoeffs[32] 244 #define qb_y2z B1dCoeffs[33] 245 #define qb_xy2 B1dCoeffs[34] 246 #define qb_xz2 B1dCoeffs[35] 247 #define qb_yz2 B1dCoeffs[36] 248 #define qb_xyz B1dCoeffs[37] 249 #define qd_x B1dCoeffs[38] 250 #define qd_y B1dCoeffs[39] 251 #define qd_z B1dCoeffs[40] 252 #define qd_x2 B1dCoeffs[41] 253 #define qd_y2 B1dCoeffs[42] 254 #define qd_z2 B1dCoeffs[43] 255 #define qd_xy B1dCoeffs[44] 256 #define qd_yz B1dCoeffs[45] 257 #define qd_xz B1dCoeffs[46] 258 #define qd_x3 B1dCoeffs[47] 259 #define qd_y3 B1dCoeffs[48] 260 #define qd_z3 B1dCoeffs[49] 261 #define qd_x2z B1dCoeffs[50] 262 #define qd_x2y B1dCoeffs[51] 263 #define qd_y2z B1dCoeffs[52] 264 #define qd_xy2 B1dCoeffs[53] 265 #define qd_xz2 B1dCoeffs[54] 266 #define qd_yz2 B1dCoeffs[55] 267 #define qd_xyz B1dCoeffs[56] 268 #define DrC_x B1dCoeffs[57] 269 #define DrC_y B1dCoeffs[58] 270 #define DrC_z B1dCoeffs[59] 271 #define DrC_x2 B1dCoeffs[60] 272 #define DrC_y2 B1dCoeffs[61] 273 #define DrC_z2 B1dCoeffs[62] 274 #define DrC_xy B1dCoeffs[63] 275 #define DrC_yz B1dCoeffs[64] 276 #define DrC_xz B1dCoeffs[65] 277 #define DrC_x3 B1dCoeffs[66] 278 #define DrC_y3 B1dCoeffs[67] 279 #define DrC_z3 B1dCoeffs[68] 280 #define DrC_x2z B1dCoeffs[69] 281 #define DrC_x2y B1dCoeffs[70] 282 #define DrC_y2z B1dCoeffs[71] 283 #define DrC_xy2 B1dCoeffs[72] 284 #define DrC_xz2 B1dCoeffs[73] 285 #define DrC_yz2 B1dCoeffs[74] 286 #define DrC_xyz B1dCoeffs[75] 287 #define gbs1 B1dCoeffs[76] 288 #define gbs2 B1dCoeffs[77] 289 #define gbs3 B1dCoeffs[78] 290 #define gbd1 B1dCoeffs[79] 291 #define gbd2 B1dCoeffs[80] 292 #define gbd3 B1dCoeffs[81] 293 294 #endif 295 296 297 /* per model data */ 298 299 typedef struct sBSIM1model { /* model structure for a resistor */ 300 int B1modType; /* type index of this device type */ 301 struct sBSIM1model *B1nextModel; /* pointer to next possible model 302 *in linked list */ 303 B1instance * B1instances; /* pointer to list of instances 304 * that have this model */ 305 IFuid B1modName; /* pointer to character string naming this model */ 306 int B1type; /* device type : 1 = nmos, -1 = pmos */ 307 308 double B1vfb0; 309 double B1vfbL; 310 double B1vfbW; 311 double B1phi0; 312 double B1phiL; 313 double B1phiW; 314 double B1K10; 315 double B1K1L; 316 double B1K1W; 317 double B1K20; 318 double B1K2L; 319 double B1K2W; 320 double B1eta0; 321 double B1etaL; 322 double B1etaW; 323 double B1etaB0; 324 double B1etaBl; 325 double B1etaBw; 326 double B1etaD0; 327 double B1etaDl; 328 double B1etaDw; 329 double B1deltaL; 330 double B1deltaW; 331 double B1mobZero; 332 double B1mobZeroB0; 333 double B1mobZeroBl; 334 double B1mobZeroBw ; 335 double B1mobVdd0; 336 double B1mobVddl; 337 double B1mobVddw; 338 double B1mobVddB0; 339 double B1mobVddBl; 340 double B1mobVddBw; 341 double B1mobVddD0; 342 double B1mobVddDl; 343 double B1mobVddDw; 344 double B1ugs0; 345 double B1ugsL; 346 double B1ugsW; 347 double B1ugsB0; 348 double B1ugsBL; 349 double B1ugsBW; 350 double B1uds0; 351 double B1udsL; 352 double B1udsW; 353 double B1udsB0; 354 double B1udsBL; 355 double B1udsBW; 356 double B1udsD0; 357 double B1udsDL; 358 double B1udsDW; 359 double B1subthSlope0; 360 double B1subthSlopeL; 361 double B1subthSlopeW; 362 double B1subthSlopeB0; 363 double B1subthSlopeBL; 364 double B1subthSlopeBW; 365 double B1subthSlopeD0; 366 double B1subthSlopeDL; 367 double B1subthSlopeDW; 368 double B1oxideThickness; /* unit: micron */ 369 double B1Cox; /* unit: F/cm**2 */ 370 double B1temp; 371 double B1vdd; 372 double B1gateSourceOverlapCap; 373 double B1gateDrainOverlapCap; 374 double B1gateBulkOverlapCap; 375 double B1channelChargePartitionFlag; 376 377 double B1sheetResistance; 378 double B1jctSatCurDensity; 379 double B1bulkJctPotential; 380 double B1bulkJctBotGradingCoeff; 381 double B1bulkJctSideGradingCoeff; 382 double B1sidewallJctPotential; 383 double B1unitAreaJctCap; 384 double B1unitLengthSidewallJctCap; 385 double B1defaultWidth; 386 double B1deltaLength; 387 388 389 unsigned B1vfb0Given :1; 390 unsigned B1vfbLGiven :1; 391 unsigned B1vfbWGiven :1; 392 unsigned B1phi0Given :1; 393 unsigned B1phiLGiven :1; 394 unsigned B1phiWGiven :1; 395 unsigned B1K10Given :1; 396 unsigned B1K1LGiven :1; 397 unsigned B1K1WGiven :1; 398 unsigned B1K20Given :1; 399 unsigned B1K2LGiven :1; 400 unsigned B1K2WGiven :1; 401 unsigned B1eta0Given :1; 402 unsigned B1etaLGiven :1; 403 unsigned B1etaWGiven :1; 404 unsigned B1etaB0Given :1; 405 unsigned B1etaBlGiven :1; 406 unsigned B1etaBwGiven :1; 407 unsigned B1etaD0Given :1; 408 unsigned B1etaDlGiven :1; 409 unsigned B1etaDwGiven :1; 410 unsigned B1deltaLGiven :1; 411 unsigned B1deltaWGiven :1; 412 unsigned B1mobZeroGiven :1; 413 unsigned B1mobZeroB0Given :1; 414 unsigned B1mobZeroBlGiven :1; 415 unsigned B1mobZeroBwGiven :1; 416 unsigned B1mobVdd0Given :1; 417 unsigned B1mobVddlGiven :1; 418 unsigned B1mobVddwGiven :1; 419 unsigned B1mobVddB0Given :1; 420 unsigned B1mobVddBlGiven :1; 421 unsigned B1mobVddBwGiven :1; 422 unsigned B1mobVddD0Given :1; 423 unsigned B1mobVddDlGiven :1; 424 unsigned B1mobVddDwGiven :1; 425 unsigned B1ugs0Given :1; 426 unsigned B1ugsLGiven :1; 427 unsigned B1ugsWGiven :1; 428 unsigned B1ugsB0Given :1; 429 unsigned B1ugsBLGiven :1; 430 unsigned B1ugsBWGiven :1; 431 unsigned B1uds0Given :1; 432 unsigned B1udsLGiven :1; 433 unsigned B1udsWGiven :1; 434 unsigned B1udsB0Given :1; 435 unsigned B1udsBLGiven :1; 436 unsigned B1udsBWGiven :1; 437 unsigned B1udsD0Given :1; 438 unsigned B1udsDLGiven :1; 439 unsigned B1udsDWGiven :1; 440 unsigned B1subthSlope0Given :1; 441 unsigned B1subthSlopeLGiven :1; 442 unsigned B1subthSlopeWGiven :1; 443 unsigned B1subthSlopeB0Given :1; 444 unsigned B1subthSlopeBLGiven :1; 445 unsigned B1subthSlopeBWGiven :1; 446 unsigned B1subthSlopeD0Given :1; 447 unsigned B1subthSlopeDLGiven :1; 448 unsigned B1subthSlopeDWGiven :1; 449 unsigned B1oxideThicknessGiven :1; 450 unsigned B1tempGiven :1; 451 unsigned B1vddGiven :1; 452 unsigned B1gateSourceOverlapCapGiven :1; 453 unsigned B1gateDrainOverlapCapGiven :1; 454 unsigned B1gateBulkOverlapCapGiven :1; 455 unsigned B1channelChargePartitionFlagGiven :1; 456 unsigned B1sheetResistanceGiven :1; 457 unsigned B1jctSatCurDensityGiven :1; 458 unsigned B1bulkJctPotentialGiven :1; 459 unsigned B1bulkJctBotGradingCoeffGiven :1; 460 unsigned B1sidewallJctPotentialGiven :1; 461 unsigned B1bulkJctSideGradingCoeffGiven :1; 462 unsigned B1unitAreaJctCapGiven :1; 463 unsigned B1unitLengthSidewallJctCapGiven :1; 464 unsigned B1defaultWidthGiven :1; 465 unsigned B1deltaLengthGiven :1; 466 unsigned B1typeGiven :1; 467 468 } B1model; 469 470 471 #ifndef NMOS 472 #define NMOS 1 473 #define PMOS -1 474 #endif /*NMOS*/ 475 476 477 /* device parameters */ 478 #define BSIM1_W 1 479 #define BSIM1_L 2 480 #define BSIM1_AS 3 481 #define BSIM1_AD 4 482 #define BSIM1_PS 5 483 #define BSIM1_PD 6 484 #define BSIM1_NRS 7 485 #define BSIM1_NRD 8 486 #define BSIM1_OFF 9 487 #define BSIM1_IC_VBS 10 488 #define BSIM1_IC_VDS 11 489 #define BSIM1_IC_VGS 12 490 #define BSIM1_IC 13 491 492 /* model parameters */ 493 #define BSIM1_MOD_VFB0 101 494 #define BSIM1_MOD_VFBL 102 495 #define BSIM1_MOD_VFBW 103 496 #define BSIM1_MOD_PHI0 104 497 #define BSIM1_MOD_PHIL 105 498 #define BSIM1_MOD_PHIW 106 499 #define BSIM1_MOD_K10 107 500 #define BSIM1_MOD_K1L 108 501 #define BSIM1_MOD_K1W 109 502 #define BSIM1_MOD_K20 110 503 #define BSIM1_MOD_K2L 111 504 #define BSIM1_MOD_K2W 112 505 #define BSIM1_MOD_ETA0 113 506 #define BSIM1_MOD_ETAL 114 507 #define BSIM1_MOD_ETAW 115 508 #define BSIM1_MOD_ETAB0 116 509 #define BSIM1_MOD_ETABL 117 510 #define BSIM1_MOD_ETABW 118 511 #define BSIM1_MOD_ETAD0 119 512 #define BSIM1_MOD_ETADL 120 513 #define BSIM1_MOD_ETADW 121 514 #define BSIM1_MOD_DELTAL 122 515 #define BSIM1_MOD_DELTAW 123 516 #define BSIM1_MOD_MOBZERO 124 517 #define BSIM1_MOD_MOBZEROB0 125 518 #define BSIM1_MOD_MOBZEROBL 126 519 #define BSIM1_MOD_MOBZEROBW 127 520 #define BSIM1_MOD_MOBVDD0 128 521 #define BSIM1_MOD_MOBVDDL 129 522 #define BSIM1_MOD_MOBVDDW 130 523 #define BSIM1_MOD_MOBVDDB0 131 524 #define BSIM1_MOD_MOBVDDBL 132 525 #define BSIM1_MOD_MOBVDDBW 133 526 #define BSIM1_MOD_MOBVDDD0 134 527 #define BSIM1_MOD_MOBVDDDL 135 528 #define BSIM1_MOD_MOBVDDDW 136 529 #define BSIM1_MOD_UGS0 137 530 #define BSIM1_MOD_UGSL 138 531 #define BSIM1_MOD_UGSW 139 532 #define BSIM1_MOD_UGSB0 140 533 #define BSIM1_MOD_UGSBL 141 534 #define BSIM1_MOD_UGSBW 142 535 #define BSIM1_MOD_UDS0 143 536 #define BSIM1_MOD_UDSL 144 537 #define BSIM1_MOD_UDSW 145 538 #define BSIM1_MOD_UDSB0 146 539 #define BSIM1_MOD_UDSBL 147 540 #define BSIM1_MOD_UDSBW 148 541 #define BSIM1_MOD_UDSD0 149 542 #define BSIM1_MOD_UDSDL 150 543 #define BSIM1_MOD_UDSDW 151 544 #define BSIM1_MOD_N00 152 545 #define BSIM1_MOD_N0L 153 546 #define BSIM1_MOD_N0W 154 547 #define BSIM1_MOD_NB0 155 548 #define BSIM1_MOD_NBL 156 549 #define BSIM1_MOD_NBW 157 550 #define BSIM1_MOD_ND0 158 551 #define BSIM1_MOD_NDL 159 552 #define BSIM1_MOD_NDW 160 553 #define BSIM1_MOD_TOX 161 554 #define BSIM1_MOD_TEMP 162 555 #define BSIM1_MOD_VDD 163 556 #define BSIM1_MOD_CGSO 164 557 #define BSIM1_MOD_CGDO 165 558 #define BSIM1_MOD_CGBO 166 559 #define BSIM1_MOD_XPART 167 560 #define BSIM1_MOD_RSH 168 561 #define BSIM1_MOD_JS 169 562 #define BSIM1_MOD_PB 170 563 #define BSIM1_MOD_MJ 171 564 #define BSIM1_MOD_PBSW 172 565 #define BSIM1_MOD_MJSW 173 566 #define BSIM1_MOD_CJ 174 567 #define BSIM1_MOD_CJSW 175 568 #define BSIM1_MOD_DEFWIDTH 176 569 #define BSIM1_MOD_DELLENGTH 177 570 #define BSIM1_MOD_NMOS 178 571 #define BSIM1_MOD_PMOS 179 572 573 /* device questions */ 574 #define BSIM1_DNODE 201 575 #define BSIM1_GNODE 202 576 #define BSIM1_SNODE 203 577 #define BSIM1_BNODE 204 578 #define BSIM1_DNODEPRIME 205 579 #define BSIM1_SNODEPRIME 206 580 #define BSIM1_VBD 207 581 #define BSIM1_VBS 208 582 #define BSIM1_VGS 209 583 #define BSIM1_VDS 210 584 #define BSIM1_CD 211 585 #define BSIM1_CBS 212 586 #define BSIM1_CBD 213 587 #define BSIM1_GM 214 588 #define BSIM1_GDS 215 589 #define BSIM1_GMBS 216 590 #define BSIM1_GBD 217 591 #define BSIM1_GBS 218 592 #define BSIM1_QB 219 593 #define BSIM1_CQB 220 594 #define BSIM1_QG 221 595 #define BSIM1_CQG 222 596 #define BSIM1_QD 223 597 #define BSIM1_CQD 224 598 #define BSIM1_CGG 225 599 #define BSIM1_CGD 226 600 #define BSIM1_CGS 227 601 #define BSIM1_CBG 228 602 #define BSIM1_CAPBD 231 603 #define BSIM1_CQBD 232 604 #define BSIM1_CAPBS 233 605 #define BSIM1_CQBS 234 606 #define BSIM1_CDG 235 607 #define BSIM1_CDD 236 608 #define BSIM1_CDS 237 609 #define BSIM1_VON 238 610 #define BSIM1_QBS 239 611 #define BSIM1_QBD 240 612 #define BSIM1_SOURCECONDUCT 241 613 #define BSIM1_DRAINCONDUCT 242 614 615 616 #ifdef __STDC__ 617 618 extern int B1acLoad(GENmodel *,CKTcircuit*); 619 extern int B1ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*); 620 extern int B1convTest(GENmodel *,CKTcircuit*); 621 extern int B1disto(int,GENmodel*,CKTcircuit*); 622 extern void B1evaluate(double,double,double,B1instance*,B1model*, 623 double*,double*,double*, double*, double*, double*, double*, 624 double*, double*, double*, double*, double*, double*, double*, 625 double*, double*, double*, double*, CKTcircuit*); 626 extern int B1getic(GENmodel*,CKTcircuit*); 627 extern int B1load(GENmodel*,CKTcircuit*); 628 extern int B1mAsk(CKTcircuit*,GENmodel *,int, IFvalue*); 629 extern int B1mParam(int,IFvalue*,GENmodel*); 630 extern void B1mosCap(CKTcircuit*, double, double, double, double*, 631 double, double, double, double, double, double, 632 double*, double*, double*, double*, double*, double*, double*, double*, 633 double*, double*, double*, double*, double*, double*, double*, 634 double*); 635 extern int B1param(CKTcircuit*,int,IFvalue*,GENinstance*,IFvalue*); 636 extern int B1pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); 637 extern int B1setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*); 638 extern int B1temp(GENmodel*,CKTcircuit*); 639 extern int B1trunc(GENmodel*,CKTcircuit*,double*); 640 641 #else /* stdc */ 642 643 extern int B1acLoad(); 644 extern int B1ask(); 645 extern int B1convTest(); 646 extern int B1disto(); 647 extern void B1evaluate(); 648 extern int B1getic(); 649 extern int B1load(); 650 extern int B1mAsk(); 651 extern int B1mParam(); 652 extern void B1mosCap(); 653 extern int B1param(); 654 extern int B1pzLoad(); 655 extern int B1setup(); 656 extern int B1temp(); 657 extern int B1trunc(); 658 659 #endif /* stdc */ 660 661 662 #endif /*B1*/ 663