1 /*
2  * This program source code file is part of KiCad, a free EDA CAD application.
3  *
4  * Copyright (C) 2014 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
5  * Copyright (C) 2010 Jean-Pierre Charras, jp.charras at wanadoo.fr
6  * Copyright (C) 2007-2021 KiCad Developers, see AUTHORS.txt for contributors.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, you may find one here:
20  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
21  * or you may search the http://www.gnu.org website for the version 2 license,
22  * or you may write to the Free Software Foundation, Inc.,
23  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
24  */
25 
26 #ifndef LAYER_IDS_H
27 #define LAYER_IDS_H
28 
29 #include <set>
30 #include <vector>
31 #include <bitset>
32 #include <stdexcept>
33 #include <wx/string.h>
34 
35 
36 /**
37  * This can be replaced with int and removed.  Until then, it is something you can increment,
38  * and its meaning is only advisory but can extend beyond PCB layers into view layers
39  * and gerber layers.
40  */
41 typedef int     LAYER_NUM;
42 
43 /**
44  * A quick note on layer IDs:
45  *
46  * The layers are stored in separate enums so that certain functions can
47  * take in the enums as data types and don't have to know about layers from
48  * other applications.
49  *
50  * Layers that are shared between applications should be in the GAL_LAYER_ID enum.
51  *
52  * The PCB_LAYER_ID struct must start at zero for compatibility with legacy board files.
53  *
54  * Some functions accept any layer ID, so they start at zero (i.e. F_Cu) and go up to
55  * the LAYER_ID_COUNT, which needs to be kept up-to-date if new enums are added.
56  */
57 
58 
59 /**
60  * This is the definition of all layers used in Pcbnew.
61  *
62  * The PCB layer types are fixed at value 0 through LAYER_ID_COUNT to ensure compatibility
63  * with legacy board files.
64  */
65 enum PCB_LAYER_ID: int
66 {
67     UNDEFINED_LAYER = -1,
68     UNSELECTED_LAYER = -2,
69 
70     PCBNEW_LAYER_ID_START = 0,
71     F_Cu = PCBNEW_LAYER_ID_START,
72     In1_Cu,
73     In2_Cu,
74     In3_Cu,
75     In4_Cu,
76     In5_Cu,
77     In6_Cu,
78     In7_Cu,
79     In8_Cu,
80     In9_Cu,
81     In10_Cu,
82     In11_Cu,
83     In12_Cu,
84     In13_Cu,
85     In14_Cu,
86     In15_Cu,
87     In16_Cu,
88     In17_Cu,
89     In18_Cu,
90     In19_Cu,
91     In20_Cu,
92     In21_Cu,
93     In22_Cu,
94     In23_Cu,
95     In24_Cu,
96     In25_Cu,
97     In26_Cu,
98     In27_Cu,
99     In28_Cu,
100     In29_Cu,
101     In30_Cu,
102     B_Cu,           // 31
103 
104     B_Adhes,
105     F_Adhes,
106 
107     B_Paste,
108     F_Paste,
109 
110     B_SilkS,
111     F_SilkS,
112 
113     B_Mask,
114     F_Mask,         // 39
115 
116     Dwgs_User,
117     Cmts_User,
118     Eco1_User,
119     Eco2_User,
120     Edge_Cuts,
121     Margin,         // 45
122 
123     B_CrtYd,
124     F_CrtYd,
125 
126     B_Fab,
127     F_Fab,          // 49
128 
129     // User definable layers.
130     User_1,
131     User_2,
132     User_3,
133     User_4,
134     User_5,
135     User_6,
136     User_7,
137     User_8,
138     User_9,
139 
140     Rescue,         // 59
141 
142     // Four reserved layers (60 - 63) for future expansion within the 64 bit integer limit.
143 
144     PCB_LAYER_ID_COUNT
145 };
146 
147 #define MAX_CU_LAYERS       (B_Cu - F_Cu + 1)
148 
149 /// Dedicated layers for net names used in Pcbnew
150 enum NETNAMES_LAYER_ID: int
151 {
152 
153     NETNAMES_LAYER_ID_START = PCB_LAYER_ID_COUNT,
154 
155     /// Reserved space for board layer netnames
156 
157     NETNAMES_LAYER_ID_RESERVED = NETNAMES_LAYER_ID_START + PCB_LAYER_ID_COUNT,
158 
159     /// Additional netnames layers (not associated with a PCB layer)
160 
161     LAYER_PAD_FR_NETNAMES,
162     LAYER_PAD_BK_NETNAMES,
163     LAYER_PAD_NETNAMES,
164     LAYER_VIA_NETNAMES,
165 
166     NETNAMES_LAYER_ID_END
167 };
168 
169 /// Macro for obtaining netname layer for a given PCB layer
170 #define NETNAMES_LAYER_INDEX( layer )   ( NETNAMES_LAYER_ID_START + layer )
171 
172 /**
173  *  GAL layers are "virtual" layers, i.e. not tied into design data.
174  *  Some layers here are shared between applications.
175  *
176  *  NOTE: Be very careful where you add new layers here.  Layers below GAL_LAYER_ID_BITMASK_END
177  *  must never be re-ordered and new layers must always be added after this value, because the
178  *  layers before this value are mapped to bit locations in legacy board files.
179  *
180  *  The values in this enum that are used to store visibility state are explicitly encoded with an
181  *  offset from GAL_LAYER_ID_START, which is explicitly encoded itself. The exact value of
182  *  GAL_LAYER_ID_START is not that sensitive, but the offsets should never be changed or else any
183  *  existing visibility settings will be disrupted.
184  */
185 enum GAL_LAYER_ID: int
186 {
187     GAL_LAYER_ID_START = NETNAMES_LAYER_ID_END,
188 
189     LAYER_VIAS               = GAL_LAYER_ID_START +  0, ///< Meta control for all vias opacity/visibility
190     LAYER_VIA_MICROVIA       = GAL_LAYER_ID_START +  1, ///< to draw micro vias
191     LAYER_VIA_BBLIND         = GAL_LAYER_ID_START +  2, ///< to draw blind/buried vias
192     LAYER_VIA_THROUGH        = GAL_LAYER_ID_START +  3, ///< to draw usual through hole vias
193     LAYER_NON_PLATEDHOLES    = GAL_LAYER_ID_START +  4, ///< handle color for not plated holes (holes, not pads)
194     LAYER_MOD_TEXT           = GAL_LAYER_ID_START +  5,
195 //  LAYER_MOD_TEXT_BK deprecated                  +  6,
196     LAYER_MOD_TEXT_INVISIBLE = GAL_LAYER_ID_START +  7, ///< text marked as invisible
197     LAYER_ANCHOR             = GAL_LAYER_ID_START +  8, ///< anchor of items having an anchor point (texts, footprints)
198     LAYER_PAD_FR             = GAL_LAYER_ID_START +  9, ///< smd pads, front layer
199     LAYER_PAD_BK             = GAL_LAYER_ID_START + 10, ///< smd pads, back layer
200     LAYER_RATSNEST           = GAL_LAYER_ID_START + 11,
201     LAYER_GRID               = GAL_LAYER_ID_START + 12,
202     LAYER_GRID_AXES          = GAL_LAYER_ID_START + 13,
203     LAYER_NO_CONNECTS        = GAL_LAYER_ID_START + 14, ///< show a marker on pads with no nets
204     LAYER_MOD_FR             = GAL_LAYER_ID_START + 15, ///< show footprints on front
205     LAYER_MOD_BK             = GAL_LAYER_ID_START + 16, ///< show footprints on back
206     LAYER_MOD_VALUES         = GAL_LAYER_ID_START + 17, ///< show footprints values (when texts are visible)
207     LAYER_MOD_REFERENCES     = GAL_LAYER_ID_START + 18, ///< show footprints references (when texts are visible)
208     LAYER_TRACKS             = GAL_LAYER_ID_START + 19,
209     LAYER_PADS_TH            = GAL_LAYER_ID_START + 20, ///< multilayer pads, usually with holes
210     LAYER_PAD_PLATEDHOLES    = GAL_LAYER_ID_START + 21, ///< to draw pad holes (plated)
211     LAYER_VIA_HOLES          = GAL_LAYER_ID_START + 22, ///< to draw via holes (pad holes do not use this layer)
212     LAYER_DRC_ERROR          = GAL_LAYER_ID_START + 23, ///< layer for drc markers with SEVERITY_ERROR
213     LAYER_DRAWINGSHEET       = GAL_LAYER_ID_START + 24, ///< drawingsheet frame and titleblock
214     LAYER_GP_OVERLAY         = GAL_LAYER_ID_START + 25, ///< general purpose overlay
215     LAYER_SELECT_OVERLAY     = GAL_LAYER_ID_START + 26, ///< currently selected items overlay
216     LAYER_PCB_BACKGROUND     = GAL_LAYER_ID_START + 27, ///< PCB background color
217     LAYER_CURSOR             = GAL_LAYER_ID_START + 28, ///< PCB cursor
218     LAYER_AUX_ITEMS          = GAL_LAYER_ID_START + 29, ///< Auxiliary items (guides, rule, etc)
219     LAYER_DRAW_BITMAPS       = GAL_LAYER_ID_START + 30, ///< to handle and draw images bitmaps
220 
221     /// This is the end of the layers used for visibility bit masks in Pcbnew
222     GAL_LAYER_ID_BITMASK_END = GAL_LAYER_ID_START + 31,
223 
224     // Layers in this section have visibility controls but were not present in legacy board files.
225 
226     LAYER_PADS               = GAL_LAYER_ID_START + 32, ///< Meta control for all pads opacity/visibility (color ignored)
227     LAYER_ZONES              = GAL_LAYER_ID_START + 33, ///< Control for copper zone opacity/visibility (color ignored)
228 
229     LAYER_PAD_HOLEWALLS      = GAL_LAYER_ID_START + 34,
230     LAYER_VIA_HOLEWALLS      = GAL_LAYER_ID_START + 35,
231     LAYER_DRC_WARNING        = GAL_LAYER_ID_START + 36, ///< layer for drc markers with SEVERITY_WARNING
232     LAYER_DRC_EXCLUSION      = GAL_LAYER_ID_START + 37, ///< layer for drc markers which have been individually excluded
233     LAYER_MARKER_SHADOWS     = GAL_LAYER_ID_START + 38, ///< shadows for drc markers
234 
235     // Add layers below this point that do not have visibility controls, so don't need explicit
236     // enum values
237 
238     LAYER_DRAWINGSHEET_PAGE1,      ///< for drawingsheetEditor previewing
239     LAYER_DRAWINGSHEET_PAGEn,      ///< for drawingsheetEditor previewing
240 
241     /// Virtual layers for stacking zones and tracks on a given copper layer
242     LAYER_ZONE_START,
243     LAYER_ZONE_END = LAYER_ZONE_START + PCB_LAYER_ID_COUNT,
244 
245     GAL_LAYER_ID_END
246 };
247 
248 /// Use this macro to convert a GAL layer to a 0-indexed offset from LAYER_VIAS
249 #define GAL_LAYER_INDEX( x ) ( x - GAL_LAYER_ID_START )
250 
251 /// Macro for getting the zone layer for a given copper layer
252 #define ZONE_LAYER_FOR( copperLayer ) ( LAYER_ZONE_START + copperLayer )
253 
254 constexpr int GAL_LAYER_ID_COUNT = GAL_LAYER_ID_END - GAL_LAYER_ID_START;
255 
256 inline GAL_LAYER_ID operator++( GAL_LAYER_ID& a )
257 {
258     a = GAL_LAYER_ID( int( a ) + 1 );
259     return a;
260 }
261 
ToGalLayer(int aInteger)262 inline GAL_LAYER_ID ToGalLayer( int aInteger )
263 {
264     wxASSERT( aInteger >= GAL_LAYER_ID_START && aInteger <= GAL_LAYER_ID_END );
265     return static_cast<GAL_LAYER_ID>( aInteger );
266 }
267 
268 /// Used for via types
269 inline GAL_LAYER_ID operator+( const GAL_LAYER_ID& a, int b )
270 {
271     GAL_LAYER_ID t = GAL_LAYER_ID( int( a ) + b );
272     wxASSERT( t <= GAL_LAYER_ID_END );
273     return t;
274 }
275 
276 typedef std::bitset<GAL_LAYER_ID_COUNT> GAL_BASE_SET;
277 
278 /// Helper for storing and iterating over GAL_LAYER_IDs
279 class GAL_SET : public GAL_BASE_SET
280 {
281 private:
282     static constexpr int start = static_cast<int>( GAL_LAYER_ID_START );
283 
284 public:
GAL_SET()285     GAL_SET() : std::bitset<GAL_LAYER_ID_COUNT>()
286     {
287     }
288 
GAL_SET(const GAL_SET & aOther)289     GAL_SET( const GAL_SET& aOther ) : std::bitset<GAL_LAYER_ID_COUNT>( aOther )
290     {
291     }
292 
293     GAL_SET( const GAL_LAYER_ID* aArray, unsigned aCount );
294 
set()295     GAL_SET& set()
296     {
297         GAL_BASE_SET::set();
298         return *this;
299     }
300 
301     GAL_SET& set( int aPos, bool aVal = true )
302     {
303         GAL_BASE_SET::set( aPos, aVal );
304         return *this;
305     }
306 
307     GAL_SET& set( GAL_LAYER_ID aPos, bool aVal = true )
308     {
309         GAL_BASE_SET::set( static_cast<std::size_t>( aPos ) - start, aVal );
310         return *this;
311     }
312 
Contains(GAL_LAYER_ID aPos)313     bool Contains( GAL_LAYER_ID aPos )
314     {
315         return test( static_cast<std::size_t>( aPos ) - start );
316     }
317 
318     std::vector<GAL_LAYER_ID> Seq() const;
319 
320     static GAL_SET DefaultVisible();
321 };
322 
323 /// Eeschema drawing layers
324 enum SCH_LAYER_ID: int
325 {
326     SCH_LAYER_ID_START = GAL_LAYER_ID_END,
327 
328     LAYER_WIRE = SCH_LAYER_ID_START,
329     LAYER_BUS,
330     LAYER_JUNCTION,
331     LAYER_LOCLABEL,
332     LAYER_GLOBLABEL,
333     LAYER_HIERLABEL,
334     LAYER_PINNUM,
335     LAYER_PINNAM,
336     LAYER_REFERENCEPART,
337     LAYER_VALUEPART,
338     LAYER_FIELDS,
339     LAYER_DEVICE,
340     LAYER_NOTES,
341     LAYER_PIN,
342     LAYER_SHEET,
343     LAYER_SHEETNAME,
344     LAYER_SHEETFILENAME,
345     LAYER_SHEETFIELDS,
346     LAYER_SHEETLABEL,
347     LAYER_NOCONNECT,
348     LAYER_DANGLING,
349     LAYER_ERC_WARN,
350     LAYER_ERC_ERR,
351     LAYER_DEVICE_BACKGROUND,
352     LAYER_SHEET_BACKGROUND,
353     LAYER_SCHEMATIC_GRID,
354     LAYER_SCHEMATIC_GRID_AXES,
355     LAYER_SCHEMATIC_BACKGROUND,
356     LAYER_SCHEMATIC_CURSOR,
357     LAYER_BRIGHTENED,
358     LAYER_HIDDEN,
359     LAYER_SELECTION_SHADOWS,
360     LAYER_SCHEMATIC_DRAWINGSHEET,
361     LAYER_BUS_JUNCTION,
362     LAYER_SCHEMATIC_AUX_ITEMS,
363     LAYER_SCHEMATIC_ANCHOR,
364 
365     SCH_LAYER_ID_END
366 };
367 
368 #define SCH_LAYER_ID_COUNT ( SCH_LAYER_ID_END - SCH_LAYER_ID_START )
369 
370 #define SCH_LAYER_INDEX( x ) ( x - SCH_LAYER_ID_START )
371 
372 inline SCH_LAYER_ID operator++( SCH_LAYER_ID& a )
373 {
374     a = SCH_LAYER_ID( int( a ) + 1 );
375     return a;
376 }
377 
378 // number of draw layers in Gerbview
379 #define GERBER_DRAWLAYERS_COUNT PCB_LAYER_ID_COUNT
380 
381 /// GerbView draw layers
382 enum GERBVIEW_LAYER_ID: int
383 {
384     GERBVIEW_LAYER_ID_START = SCH_LAYER_ID_END,
385 
386     /// GerbView draw layers and d-code layers
387     GERBVIEW_LAYER_ID_RESERVED = GERBVIEW_LAYER_ID_START + ( 2 * GERBER_DRAWLAYERS_COUNT ),
388 
389     LAYER_DCODES,
390     LAYER_NEGATIVE_OBJECTS,
391     LAYER_GERBVIEW_GRID,
392     LAYER_GERBVIEW_AXES,
393     LAYER_GERBVIEW_BACKGROUND,
394     LAYER_GERBVIEW_DRAWINGSHEET,
395 
396     GERBVIEW_LAYER_ID_END
397 };
398 
399 #define GERBER_DRAW_LAYER( x ) ( GERBVIEW_LAYER_ID_START + x )
400 
401 #define GERBER_DCODE_LAYER( x ) ( GERBER_DRAWLAYERS_COUNT + x )
402 
403 #define GERBER_DRAW_LAYER_INDEX( x ) ( x - GERBVIEW_LAYER_ID_START )
404 
405 
406 /// 3D Viewer virtual layers for color settings
407 enum LAYER_3D_ID : int
408 {
409         LAYER_3D_START = GERBVIEW_LAYER_ID_END,
410 
411         LAYER_3D_BACKGROUND_BOTTOM,
412         LAYER_3D_BACKGROUND_TOP,
413         LAYER_3D_BOARD,
414         LAYER_3D_COPPER,
415         LAYER_3D_SILKSCREEN_BOTTOM,
416         LAYER_3D_SILKSCREEN_TOP,
417         LAYER_3D_SOLDERMASK_BOTTOM,
418         LAYER_3D_SOLDERMASK_TOP,
419         LAYER_3D_SOLDERPASTE,
420 
421         LAYER_3D_END = LAYER_3D_SOLDERPASTE
422 };
423 
424 /// Must update this if you add any enums after GerbView!
425 #define LAYER_ID_COUNT LAYER_3D_END
426 
427 
428 /**
429  * Returns the string equivalent of a given layer
430  * @param aLayer is a valid layer ID
431  */
432 wxString LayerName( int aLayer );
433 
434 
435 // Some elements do not have yet a visibility control
436 // from a dialog, but have a visibility control flag.
437 // Here is a mask to set them visible, to be sure they are displayed
438 // after loading a board for instance
439 #define MIN_VISIBILITY_MASK int( ( 1 << GAL_LAYER_INDEX( LAYER_PAD_PLATEDHOLES ) ) +\
440                                  ( 1 << GAL_LAYER_INDEX( LAYER_VIA_HOLES ) ) +\
441                                  ( 1 << GAL_LAYER_INDEX( LAYER_SELECT_OVERLAY ) ) +\
442                                  ( 1 << GAL_LAYER_INDEX( LAYER_GP_OVERLAY ) ) +\
443                                  ( 1 << GAL_LAYER_INDEX( LAYER_RATSNEST ) ) )
444 
445 
446 /// A sequence of layers, a sequence provides a certain order.
447 typedef std::vector<PCB_LAYER_ID>   BASE_SEQ;
448 
449 
450 /**
451  * LSEQ is a sequence (and therefore also a set) of PCB_LAYER_IDs.  A sequence provides
452  * a certain order.
453  * <p>
454  * It can also be used as an iterator:
455  * <code>
456  *
457  *      for( LSEQ cu_stack = aSet.CuStack();  cu_stack;  ++cu_stack )
458  *      {
459  *          layer_id = *cu_stack;
460  *          :
461  *          things to do with layer_id;
462  *      }
463  *
464  * </code>
465  */
466 class LSEQ : public BASE_SEQ
467 {
468     unsigned   m_index;
469 
470 public:
471 
LSEQ()472     LSEQ() :
473         m_index( 0 )
474     {}
475 
476     template <class InputIterator>
LSEQ(InputIterator aStart,InputIterator aEnd)477     LSEQ( InputIterator aStart, InputIterator aEnd ) :
478         BASE_SEQ( aStart, aEnd ), m_index( 0 )
479     {}
480 
Rewind()481     void Rewind()           { m_index = 0; }
482 
483     void operator ++ ()     { ++m_index; }  // returns nothing, used in simple statements only.
484 
485     void operator ++ (int)  { ++m_index; }
486 
487     operator bool ()        { return m_index < size(); }
488 
489     PCB_LAYER_ID operator * () const
490     {
491         return at( m_index );       // throws std::out_of_range
492     }
493 };
494 
495 
496 typedef std::bitset<PCB_LAYER_ID_COUNT>     BASE_SET;
497 
498 
499 /**
500  * LSET is a set of PCB_LAYER_IDs.  It can be converted to numerous purpose LSEQs using
501  * the various member functions, most of which are based on Seq(). The advantage
502  * of converting to LSEQ using purposeful code, is it removes any dependency
503  * on order/sequence inherent in this set.
504  */
505 class LSET : public BASE_SET
506 {
507 public:
508 
509     // The constructor flavors are carefully chosen to prevent LSET( int ) from compiling.
510     // That excludes  "LSET s = 0;" and excludes "LSET s = -1;", etc.
511     // LSET s = 0;  needs to be removed from the code, this accomplishes that.
512     // Remember LSET( PCB_LAYER_ID(0) ) sets bit 0, so "LSET s = 0;" is illegal
513     // to prevent that surprise.  Therefore LSET's constructor suite is significantly
514     // different than the base class from which it is derived.
515 
516     // Other member functions (non-constructor functions) are identical to the base
517     // class's and therefore are re-used from the base class.
518 
519     /**
520      * Create an empty (cleared) set.
521      */
LSET()522     LSET() :
523         BASE_SET()  // all bits are set to zero in BASE_SET()
524     {
525     }
526 
LSET(const BASE_SET & aOther)527     LSET( const BASE_SET& aOther ) :
528         BASE_SET( aOther )
529     {
530     }
531 
532     /**
533      * Take a PCB_LAYER_ID and sets that bit.  This makes the following code into
534      * a bug:
535      *
536      * <code>   LSET s = 0;  </code>
537      *
538      * Instead use:
539      *
540      * <code>
541      *    LSET s;
542      * </code>
543      *
544      * for an empty set.
545      */
LSET(PCB_LAYER_ID aLayer)546     LSET( PCB_LAYER_ID aLayer ) :    // PCB_LAYER_ID deliberately excludes int and relatives
547         BASE_SET()
548     {
549         set( aLayer );
550     }
551 
552     /**
553      * Create an array or LSEQ.
554      */
555     LSET( const PCB_LAYER_ID* aArray, unsigned aCount );
556 
557     /**
558      * Take one or more PCB_LAYER_IDs in the argument list to construct the set.  Typically
559      * only used in static construction.
560      *
561      * @param aIdCount is the number of PCB_LAYER_IDs which follow.
562      * @param aFirst is the first included in @a aIdCount and must always be present, and can
563      *  be followed by any number of additional PCB_LAYER_IDs so long as @a aIdCount accurately
564      *  reflects the count.
565      *
566      *  Parameter is 'int' to avoid va_start undefined behavior.
567      */
568     LSET( unsigned aIdCount, int aFirst, ... ); // args chosen to prevent LSET( int ) from compiling
569 
570     /**
571      * See if the layer set contains a PCB layer.
572      *
573      * @param aLayer is the layer to check
574      * @return true if the layer is included
575      */
Contains(PCB_LAYER_ID aLayer)576     bool Contains( PCB_LAYER_ID aLayer )
577     {
578         try
579         {
580             return test( aLayer );
581         }
582         catch( std::out_of_range& )
583         {
584             return false;
585         }
586     }
587 
588     /**
589      * Return the fixed name association with aLayerId.
590      */
591     static const wxChar* Name( PCB_LAYER_ID aLayerId );
592 
593     /**
594      * Return a complete set of internal copper layers which is all Cu layers
595      * except F_Cu and B_Cu.
596      */
597     static LSET InternalCuMask();
598 
599     /**
600      * Return a complete set of all top assembly layers which is all F_SilkS and F_Mask
601      */
602     static LSET FrontAssembly();
603 
604     /**
605      * Return a complete set of all bottom assembly layers which is all B_SilkS and B_Mask
606      */
607     static LSET BackAssembly();
608 
609     /**
610      * Return a mask holding the requested number of Cu PCB_LAYER_IDs.
611      */
612     static LSET AllCuMask( int aCuLayerCount = MAX_CU_LAYERS );
613 
614     /**
615      * Return a mask holding the Front and Bottom layers.
616      */
617     static LSET ExternalCuMask();
618 
619     /**
620      * Return a mask holding all layer minus CU layers.
621      */
622     static LSET AllNonCuMask();
623 
624     static LSET AllLayersMask();
625 
626     /**
627      * Return a mask holding all technical layers (no CU layer) on front side.
628      */
629     static LSET FrontTechMask();
630 
631     /**
632      * Return a mask holding technical layers used in a board fabrication
633      * (no CU layer) on front side.
634      */
635     static LSET FrontBoardTechMask();
636 
637     /**
638      * Return a mask holding all technical layers (no CU layer) on back side.
639      */
640     static LSET BackTechMask();
641 
642     /**
643      * Return a mask holding technical layers used in a board fabrication
644      * (no CU layer) on Back side.
645      */
646     static LSET BackBoardTechMask();
647 
648     /**
649      * Return a mask holding all technical layers (no CU layer) on both side.
650      */
651     static LSET AllTechMask();
652 
653     /**
654      * Return a mask holding board technical layers (no CU layer) on both side.
655      */
656     static LSET AllBoardTechMask();
657 
658     /**
659      * Return a mask holding all technical layers and the external CU layer on front side.
660      */
661     static LSET FrontMask();
662 
663     /**
664      * Return a mask holding all technical layers and the external CU layer on back side.
665      */
666     static LSET BackMask();
667 
668     static LSET UserMask();
669 
670     /**
671      * Return a mask holding all layers which are physically realized.  Equivalent to the copper
672      * layers + the board tech mask.
673      */
674     static LSET PhysicalLayersMask();
675 
676     /**
677      * Return a mask with all of the allowable user defined layers.
678      */
679     static LSET UserDefinedLayers();
680 
681     /**
682      * Layers which are not allowed within footprint definitions.  Currently internal
683      * copper layers and Margin.
684      */
685 
686     static LSET ForbiddenFootprintLayers();
687 
688     /**
689      * Return a sequence of copper layers in starting from the front/top
690      * and extending to the back/bottom.  This specific sequence is depended upon
691      * in numerous places.
692      */
693     LSEQ CuStack() const;
694 
695     /**
696      * Return a sequence of technical layers.  A sequence provides a certain order.
697      *
698      * @param aSubToOmit is the subset of the technical layers to omit, defaults to none.
699      */
700     LSEQ Technicals( LSET aSubToOmit = LSET() ) const;
701 
702     /// *_User layers.
703     LSEQ Users() const;
704 
705     /// Returns the technical and user layers in the order shown in layer widget
706     LSEQ TechAndUserUIOrder() const;
707 
708     LSEQ UIOrder() const;
709 
710     /**
711      * Return an LSEQ from the union of this LSET and a desired sequence.  The LSEQ
712      * element will be in the same sequence as aWishListSequence if they are present.
713      * @param aWishListSequence establishes the order of the returned LSEQ, and the LSEQ will only
714      * contain PCB_LAYER_IDs which are present in this set.
715      * @param aCount is the length of aWishListSequence array.
716      */
717     LSEQ Seq( const PCB_LAYER_ID* aWishListSequence, unsigned aCount ) const;
718 
719     /**
720      * Return a LSEQ from this LSET in ascending PCB_LAYER_ID order.  Each LSEQ
721      * element will be in the same sequence as in PCB_LAYER_ID and only present
722      * in the resultant LSEQ if present in this set.  Therefore the sequence is
723      * subject to change, use it only when enumeration and not order is important.
724      */
725     LSEQ Seq() const;
726 
727     /**
728      * Return the sequence that is typical for a bottom-to-top stack-up.
729      * For instance, to plot multiple layers in a single image, the top layers output last.
730      */
731     LSEQ SeqStackupBottom2Top() const;
732 
733     /**
734      * Return a hex string showing contents of this LSEQ.
735      */
736     std::string FmtHex() const;
737 
738     /**
739      * Convert the output of FmtHex() and replaces this set's values
740      * with those given in the input string.  Parsing stops at the first
741      * non hex ASCII byte, except that marker bytes output from FmtHex are
742      * not terminators.
743      * @return int - number of bytes consumed
744      */
745     int ParseHex( const char* aStart, int aCount );
746 
747     /**
748      * Return a binary string showing contents of this LSEQ.
749      */
750     std::string FmtBin() const;
751 
752     /**
753      * Find the first set PCB_LAYER_ID. Returns UNDEFINED_LAYER if more
754      * than one is set or UNSELECTED_LAYER if none is set.
755      */
756     PCB_LAYER_ID ExtractLayer() const;
757 
758 private:
759 
760     /// Take this off the market, it may not be used because of LSET( PCB_LAYER_ID ).
LSET(unsigned long __val)761     LSET( unsigned long __val )
762     {
763         // not usable, it's private.
764     }
765 };
766 
767 
768 /**
769  * Test whether a given integer is a valid layer index, i.e. can
770  * be safely put in a PCB_LAYER_ID
771  *
772  * @param aLayerId = Layer index to test. It can be an int, so its useful during I/O
773  * @return true if aLayerIndex is a valid layer index
774  */
IsValidLayer(LAYER_NUM aLayerId)775 inline bool IsValidLayer( LAYER_NUM aLayerId )
776 {
777     return unsigned( aLayerId ) < PCB_LAYER_ID_COUNT;
778 }
779 
780 /**
781  * Test whether a layer is a valid layer for Pcbnew
782  *
783  * @param aLayer = Layer to test
784  * @return true if aLayer is a layer valid in Pcbnew
785  */
IsPcbLayer(LAYER_NUM aLayer)786 inline bool IsPcbLayer( LAYER_NUM aLayer )
787 {
788     return aLayer >= F_Cu && aLayer < PCB_LAYER_ID_COUNT;
789 }
790 
791 /**
792  * Tests whether a layer is a copper layer.
793  *
794  * @param aLayerId = Layer  to test
795  * @return true if aLayer is a valid copper layer
796  */
IsCopperLayer(LAYER_NUM aLayerId)797 inline bool IsCopperLayer( LAYER_NUM aLayerId )
798 {
799     return aLayerId >= F_Cu && aLayerId <= B_Cu;
800 }
801 
802 /**
803  * Test whether a layer is a non copper layer.
804  *
805  * @param aLayerId = Layer to test
806  * @return true if aLayer is a non copper layer
807  */
IsNonCopperLayer(LAYER_NUM aLayerId)808 inline bool IsNonCopperLayer( LAYER_NUM aLayerId )
809 {
810     return aLayerId > B_Cu && aLayerId <= PCB_LAYER_ID_COUNT;
811 }
812 
813 /**
814  * Tests whether a layer is a copper layer, optionally including synthetic copper layers such
815  * as LAYER_VIA_THROUGH, LAYER_PAD_FR, etc.
816  *
817  * @param aLayerId
818  * @param aIncludeSyntheticCopperLayers
819  * @return
820  */
IsCopperLayer(LAYER_NUM aLayerId,bool aIncludeSyntheticCopperLayers)821 inline bool IsCopperLayer( LAYER_NUM aLayerId, bool aIncludeSyntheticCopperLayers )
822 {
823     if( aIncludeSyntheticCopperLayers )
824         return !IsNonCopperLayer( aLayerId );
825     else
826         return IsCopperLayer( aLayerId );
827 }
828 
IsViaPadLayer(LAYER_NUM aLayer)829 inline bool IsViaPadLayer( LAYER_NUM aLayer )
830 {
831     return aLayer == LAYER_VIA_THROUGH
832             || aLayer == LAYER_VIA_MICROVIA
833             || aLayer == LAYER_VIA_BBLIND;
834 }
835 
IsHoleLayer(LAYER_NUM aLayer)836 inline bool IsHoleLayer( LAYER_NUM aLayer )
837 {
838     return aLayer == LAYER_VIA_HOLES
839             || aLayer == LAYER_VIA_HOLEWALLS
840             || aLayer == LAYER_PAD_PLATEDHOLES
841             || aLayer == LAYER_PAD_HOLEWALLS
842             || aLayer == LAYER_NON_PLATEDHOLES;
843 }
844 
845 /**
846  * Test whether a layer is a non copper and a non tech layer.
847  *
848  * @param aLayerId = Layer to test
849  * @return true if aLayer is a user layer
850  */
IsUserLayer(PCB_LAYER_ID aLayerId)851 inline bool IsUserLayer( PCB_LAYER_ID aLayerId )
852 {
853     return aLayerId >= Dwgs_User && aLayerId <= Eco2_User;
854 }
855 
856 /*
857    @todo Where does this comment actually belong?
858 
859    IMPORTANT: If a layer is not a front layer not necessarily is true
860    the converse. The same hold for a back layer.
861    So a layer can be:
862    - Front
863    - Back
864    - Neither (internal or auxiliary)
865 
866    The check most frequent is for back layers, since it involves flips
867 */
868 
869 
870 /**
871  * Layer classification: check if it's a front layer
872  */
IsFrontLayer(PCB_LAYER_ID aLayerId)873 inline bool IsFrontLayer( PCB_LAYER_ID aLayerId )
874 {
875     switch( aLayerId )
876     {
877     case F_Cu:
878     case F_Adhes:
879     case F_Paste:
880     case F_SilkS:
881     case F_Mask:
882     case F_CrtYd:
883     case F_Fab:
884         return true;
885     default:
886         ;
887     }
888 
889     return false;
890 }
891 
892 
893 /**
894  * Layer classification: check if it's a back layer
895  */
IsBackLayer(PCB_LAYER_ID aLayerId)896 inline bool IsBackLayer( PCB_LAYER_ID aLayerId )
897 {
898     switch( aLayerId )
899     {
900     case B_Cu:
901     case B_Adhes:
902     case B_Paste:
903     case B_SilkS:
904     case B_Mask:
905     case B_CrtYd:
906     case B_Fab:
907         return true;
908     default:
909         ;
910     }
911 
912     return false;
913 }
914 
915 
916 /**
917  * @return the layer number after flipping an item
918  * some (not all) layers: external copper, and paired layers( Mask, Paste, solder ... )
919  * are swapped between front and back sides
920  * internal layers are flipped only if the copper layers count is known
921  * @param aLayerId = the PCB_LAYER_ID to flip
922  * @param aCopperLayersCount = the number of copper layers. if 0 (in fact if < 4 )
923  *  internal layers will be not flipped because the layer count is not known
924  */
925 PCB_LAYER_ID FlipLayer( PCB_LAYER_ID aLayerId, int aCopperLayersCount = 0 );
926 
927 /**
928  * Calculate the mask layer when flipping a footprint.
929  *
930  * BACK and FRONT copper layers, mask, paste, solder layers are swapped
931  * internal layers are flipped only if the copper layers count is known
932  * @param aMask = the LSET to flip
933  * @param aCopperLayersCount = the number of copper layers. if 0 (in fact if < 4 )
934  *  internal layers will be not flipped because the layer count is not known
935  */
936 LSET FlipLayerMask( LSET aMask, int aCopperLayersCount = 0 );
937 
938 
939 /**
940  * Returns a netname layer corresponding to the given layer.
941  */
GetNetnameLayer(int aLayer)942 inline int GetNetnameLayer( int aLayer )
943 {
944     if( IsCopperLayer( aLayer ) )
945         return NETNAMES_LAYER_INDEX( aLayer );
946     else if( aLayer == LAYER_PADS_TH )
947         return LAYER_PAD_NETNAMES;
948     else if( aLayer == LAYER_PAD_FR )
949         return LAYER_PAD_FR_NETNAMES;
950     else if( aLayer == LAYER_PAD_BK )
951         return LAYER_PAD_BK_NETNAMES;
952     else if( IsViaPadLayer( aLayer ) )
953         return LAYER_VIA_NETNAMES;
954 
955     // Fallback
956     return Cmts_User;
957 }
958 
959 /**
960  * Test whether a layer is a netname layer.
961  *
962  * @param aLayer = Layer to test
963  * @return true if aLayer is a valid netname layer
964  */
IsNetnameLayer(LAYER_NUM aLayer)965 inline bool IsNetnameLayer( LAYER_NUM aLayer )
966 {
967     return aLayer >= NETNAMES_LAYER_INDEX( F_Cu ) &&
968            aLayer < NETNAMES_LAYER_ID_END;
969 }
970 
971 
IsZoneLayer(LAYER_NUM aLayer)972 inline bool IsZoneLayer( LAYER_NUM aLayer )
973 {
974     return aLayer >= LAYER_ZONE_START && aLayer <= LAYER_ZONE_END;
975 }
976 
977 
IsDCodeLayer(int aLayer)978 inline bool IsDCodeLayer( int aLayer )
979 {
980     return aLayer >= (GERBVIEW_LAYER_ID_START + GERBER_DRAWLAYERS_COUNT) &&
981            aLayer < (GERBVIEW_LAYER_ID_START + (2 * GERBER_DRAWLAYERS_COUNT));
982 }
983 
984 
985 /**
986  * Checks if the given layer is "net copper", meaning it is eligible for net coloring.
987  *
988  * @param aLayer is the layer to test
989  * @return true if the layer is one that participates in net coloring
990  */
IsNetCopperLayer(LAYER_NUM aLayer)991 inline bool IsNetCopperLayer( LAYER_NUM aLayer )
992 {
993     static std::set<LAYER_NUM> netCopperLayers =
994             {
995                     LAYER_PAD_FR,
996                     LAYER_PAD_BK,
997                     LAYER_PADS_TH,
998                     LAYER_PAD_HOLEWALLS,
999                     LAYER_VIA_THROUGH,
1000                     LAYER_VIA_BBLIND,
1001                     LAYER_VIA_MICROVIA,
1002                     LAYER_VIA_HOLEWALLS
1003             };
1004 
1005     return IsCopperLayer( aLayer ) || netCopperLayers.count( aLayer );
1006 }
1007 
1008 
1009 PCB_LAYER_ID ToLAYER_ID( int aLayer );
1010 
1011 #endif // LAYER_IDS_H
1012