1 /**** BSIM4.7.0 Released by Darsen Lu 04/08/2011 ****/
2
3 /**********
4 * Copyright 2006 Regents of the University of California. All rights reserved.
5 * File: b4acld.c of BSIM4.7.0.
6 * Author: 2000 Weidong Liu
7 * Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
8 * Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
9 * Authors: 2007- Mohan Dunga, Wenwei Yang, Ali Niknejad, Chenming Hu
10 * Project Director: Prof. Chenming Hu.
11 * Modified by Xuemei Xi, 10/05/2001.
12 **********/
13
14 #include "ngspice/ngspice.h"
15 #include "ngspice/cktdefs.h"
16 #include "bsim4v7def.h"
17 #include "ngspice/sperror.h"
18 #include "ngspice/suffix.h"
19
20
21 int
BSIM4v7acLoad(GENmodel * inModel,CKTcircuit * ckt)22 BSIM4v7acLoad(
23 GENmodel *inModel,
24 CKTcircuit *ckt)
25 {
26 BSIM4v7model *model = (BSIM4v7model*)inModel;
27 BSIM4v7instance *here;
28
29 double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
30 double xcbgb, xcbdb, xcbsb, xcbbb;
31 double xcggbr, xcgdbr, xcgsbr, xcgbbr, xcggbi, xcgdbi, xcgsbi, xcgbbi;
32 double Cggr, Cgdr, Cgsr, Cgbr, Cggi, Cgdi, Cgsi, Cgbi;
33 double xcddbr, xcdgbr, xcdsbr, xcdbbr, xcsdbr, xcsgbr, xcssbr, xcsbbr;
34 double xcddbi, xcdgbi, xcdsbi, xcdbbi, xcsdbi, xcsgbi, xcssbi, xcsbbi;
35 double xcdbdb, xcsbsb=0.0, xcgmgmb=0.0, xcgmdb=0.0, xcgmsb=0.0, xcdgmb, xcsgmb;
36 double xcgmbb=0.0, xcbgmb;
37 double capbd, capbs, omega;
38 double gstot, gstotd, gstotg, gstots, gstotb, gspr;
39 double gdtot, gdtotd, gdtotg, gdtots, gdtotb, gdpr;
40 double gIstotg, gIstotd, gIstots, gIstotb;
41 double gIdtotg, gIdtotd, gIdtots, gIdtotb;
42 double gIbtotg, gIbtotd, gIbtots, gIbtotb;
43 double gIgtotg, gIgtotd, gIgtots, gIgtotb;
44 double cgso, cgdo, cgbo;
45 double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
46 double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
47 double T0=0.0, T1, T2, T3;
48 double Csg, Csd, Css;
49 double Cdgr, Cddr, Cdsr, Cdbr, Csgr, Csdr, Cssr, Csbr;
50 double Cdgi, Cddi, Cdsi, Cdbi, Csgi, Csdi, Cssi, Csbi;
51 double gmr, gmi, gmbsr, gmbsi, gdsr, gdsi;
52 double FwdSumr, RevSumr, Gmr, Gmbsr;
53 double FwdSumi, RevSumi, Gmi, Gmbsi;
54 struct bsim4SizeDependParam *pParam;
55 double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
56
57 double m;
58
59 omega = ckt->CKTomega;
60 for (; model != NULL; model = BSIM4v7nextModel(model))
61 { for (here = BSIM4v7instances(model); here!= NULL;
62 here = BSIM4v7nextInstance(here))
63 {
64 pParam = here->pParam;
65 capbd = here->BSIM4v7capbd;
66 capbs = here->BSIM4v7capbs;
67 cgso = here->BSIM4v7cgso;
68 cgdo = here->BSIM4v7cgdo;
69 cgbo = pParam->BSIM4v7cgbo;
70
71 Csd = -(here->BSIM4v7cddb + here->BSIM4v7cgdb + here->BSIM4v7cbdb);
72 Csg = -(here->BSIM4v7cdgb + here->BSIM4v7cggb + here->BSIM4v7cbgb);
73 Css = -(here->BSIM4v7cdsb + here->BSIM4v7cgsb + here->BSIM4v7cbsb);
74
75 if (here->BSIM4v7acnqsMod)
76 { T0 = omega * here->BSIM4v7taunet;
77 T1 = T0 * T0;
78 T2 = 1.0 / (1.0 + T1);
79 T3 = T0 * T2;
80
81 gmr = here->BSIM4v7gm * T2;
82 gmbsr = here->BSIM4v7gmbs * T2;
83 gdsr = here->BSIM4v7gds * T2;
84
85 gmi = -here->BSIM4v7gm * T3;
86 gmbsi = -here->BSIM4v7gmbs * T3;
87 gdsi = -here->BSIM4v7gds * T3;
88
89 Cddr = here->BSIM4v7cddb * T2;
90 Cdgr = here->BSIM4v7cdgb * T2;
91 Cdsr = here->BSIM4v7cdsb * T2;
92 Cdbr = -(Cddr + Cdgr + Cdsr);
93
94 /* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */
95 Cddi = here->BSIM4v7cddb * T3 * omega;
96 Cdgi = here->BSIM4v7cdgb * T3 * omega;
97 Cdsi = here->BSIM4v7cdsb * T3 * omega;
98 Cdbi = -(Cddi + Cdgi + Cdsi);
99
100 Csdr = Csd * T2;
101 Csgr = Csg * T2;
102 Cssr = Css * T2;
103 Csbr = -(Csdr + Csgr + Cssr);
104
105 Csdi = Csd * T3 * omega;
106 Csgi = Csg * T3 * omega;
107 Cssi = Css * T3 * omega;
108 Csbi = -(Csdi + Csgi + Cssi);
109
110 Cgdr = -(Cddr + Csdr + here->BSIM4v7cbdb);
111 Cggr = -(Cdgr + Csgr + here->BSIM4v7cbgb);
112 Cgsr = -(Cdsr + Cssr + here->BSIM4v7cbsb);
113 Cgbr = -(Cgdr + Cggr + Cgsr);
114
115 Cgdi = -(Cddi + Csdi);
116 Cggi = -(Cdgi + Csgi);
117 Cgsi = -(Cdsi + Cssi);
118 Cgbi = -(Cgdi + Cggi + Cgsi);
119 }
120 else /* QS */
121 { gmr = here->BSIM4v7gm;
122 gmbsr = here->BSIM4v7gmbs;
123 gdsr = here->BSIM4v7gds;
124 gmi = gmbsi = gdsi = 0.0;
125
126 Cddr = here->BSIM4v7cddb;
127 Cdgr = here->BSIM4v7cdgb;
128 Cdsr = here->BSIM4v7cdsb;
129 Cdbr = -(Cddr + Cdgr + Cdsr);
130 Cddi = Cdgi = Cdsi = Cdbi = 0.0;
131
132 Csdr = Csd;
133 Csgr = Csg;
134 Cssr = Css;
135 Csbr = -(Csdr + Csgr + Cssr);
136 Csdi = Csgi = Cssi = Csbi = 0.0;
137
138 Cgdr = here->BSIM4v7cgdb;
139 Cggr = here->BSIM4v7cggb;
140 Cgsr = here->BSIM4v7cgsb;
141 Cgbr = -(Cgdr + Cggr + Cgsr);
142 Cgdi = Cggi = Cgsi = Cgbi = 0.0;
143 }
144
145
146 if (here->BSIM4v7mode >= 0)
147 { Gmr = gmr;
148 Gmbsr = gmbsr;
149 FwdSumr = Gmr + Gmbsr;
150 RevSumr = 0.0;
151 Gmi = gmi;
152 Gmbsi = gmbsi;
153 FwdSumi = Gmi + Gmbsi;
154 RevSumi = 0.0;
155
156 gbbdp = -(here->BSIM4v7gbds);
157 gbbsp = here->BSIM4v7gbds + here->BSIM4v7gbgs + here->BSIM4v7gbbs;
158 gbdpg = here->BSIM4v7gbgs;
159 gbdpdp = here->BSIM4v7gbds;
160 gbdpb = here->BSIM4v7gbbs;
161 gbdpsp = -(gbdpg + gbdpdp + gbdpb);
162
163 gbspdp = 0.0;
164 gbspg = 0.0;
165 gbspb = 0.0;
166 gbspsp = 0.0;
167
168 if (model->BSIM4v7igcMod)
169 { gIstotg = here->BSIM4v7gIgsg + here->BSIM4v7gIgcsg;
170 gIstotd = here->BSIM4v7gIgcsd;
171 gIstots = here->BSIM4v7gIgss + here->BSIM4v7gIgcss;
172 gIstotb = here->BSIM4v7gIgcsb;
173
174 gIdtotg = here->BSIM4v7gIgdg + here->BSIM4v7gIgcdg;
175 gIdtotd = here->BSIM4v7gIgdd + here->BSIM4v7gIgcdd;
176 gIdtots = here->BSIM4v7gIgcds;
177 gIdtotb = here->BSIM4v7gIgcdb;
178 }
179 else
180 { gIstotg = gIstotd = gIstots = gIstotb = 0.0;
181 gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
182 }
183
184 if (model->BSIM4v7igbMod)
185 { gIbtotg = here->BSIM4v7gIgbg;
186 gIbtotd = here->BSIM4v7gIgbd;
187 gIbtots = here->BSIM4v7gIgbs;
188 gIbtotb = here->BSIM4v7gIgbb;
189 }
190 else
191 gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
192
193 if ((model->BSIM4v7igcMod != 0) || (model->BSIM4v7igbMod != 0))
194 { gIgtotg = gIstotg + gIdtotg + gIbtotg;
195 gIgtotd = gIstotd + gIdtotd + gIbtotd ;
196 gIgtots = gIstots + gIdtots + gIbtots;
197 gIgtotb = gIstotb + gIdtotb + gIbtotb;
198 }
199 else
200 gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
201
202 if (here->BSIM4v7rgateMod == 2)
203 T0 = *(ckt->CKTstates[0] + here->BSIM4v7vges)
204 - *(ckt->CKTstates[0] + here->BSIM4v7vgs);
205 else if (here->BSIM4v7rgateMod == 3)
206 T0 = *(ckt->CKTstates[0] + here->BSIM4v7vgms)
207 - *(ckt->CKTstates[0] + here->BSIM4v7vgs);
208 if (here->BSIM4v7rgateMod > 1)
209 { gcrgd = here->BSIM4v7gcrgd * T0;
210 gcrgg = here->BSIM4v7gcrgg * T0;
211 gcrgs = here->BSIM4v7gcrgs * T0;
212 gcrgb = here->BSIM4v7gcrgb * T0;
213 gcrgg -= here->BSIM4v7gcrg;
214 gcrg = here->BSIM4v7gcrg;
215 }
216 else
217 gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
218
219 if (here->BSIM4v7rgateMod == 3)
220 { xcgmgmb = (cgdo + cgso + pParam->BSIM4v7cgbo) * omega;
221 xcgmdb = -cgdo * omega;
222 xcgmsb = -cgso * omega;
223 xcgmbb = -pParam->BSIM4v7cgbo * omega;
224
225 xcdgmb = xcgmdb;
226 xcsgmb = xcgmsb;
227 xcbgmb = xcgmbb;
228
229 xcggbr = Cggr * omega;
230 xcgdbr = Cgdr * omega;
231 xcgsbr = Cgsr * omega;
232 xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
233
234 xcdgbr = Cdgr * omega;
235 xcsgbr = Csgr * omega;
236 xcbgb = here->BSIM4v7cbgb * omega;
237 }
238 else
239 { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v7cgbo ) * omega;
240 xcgdbr = (Cgdr - cgdo) * omega;
241 xcgsbr = (Cgsr - cgso) * omega;
242 xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
243
244 xcdgbr = (Cdgr - cgdo) * omega;
245 xcsgbr = (Csgr - cgso) * omega;
246 xcbgb = (here->BSIM4v7cbgb - pParam->BSIM4v7cgbo) * omega;
247
248 xcdgmb = xcsgmb = xcbgmb = 0.0;
249 }
250 xcddbr = (Cddr + here->BSIM4v7capbd + cgdo) * omega;
251 xcdsbr = Cdsr * omega;
252 xcsdbr = Csdr * omega;
253 xcssbr = (here->BSIM4v7capbs + cgso + Cssr) * omega;
254
255 if (!here->BSIM4v7rbodyMod)
256 { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
257 xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
258
259 xcbdb = (here->BSIM4v7cbdb - here->BSIM4v7capbd) * omega;
260 xcbsb = (here->BSIM4v7cbsb - here->BSIM4v7capbs) * omega;
261 xcdbdb = 0.0;
262 }
263 else
264 { xcdbbr = Cdbr * omega;
265 xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb)
266 + here->BSIM4v7capbs * omega;
267
268 xcbdb = here->BSIM4v7cbdb * omega;
269 xcbsb = here->BSIM4v7cbsb * omega;
270
271 xcdbdb = -here->BSIM4v7capbd * omega;
272 xcsbsb = -here->BSIM4v7capbs * omega;
273 }
274 xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb);
275
276 xcdgbi = Cdgi;
277 xcsgbi = Csgi;
278 xcddbi = Cddi;
279 xcdsbi = Cdsi;
280 xcsdbi = Csdi;
281 xcssbi = Cssi;
282 xcdbbi = Cdbi;
283 xcsbbi = Csbi;
284 xcggbi = Cggi;
285 xcgdbi = Cgdi;
286 xcgsbi = Cgsi;
287 xcgbbi = Cgbi;
288 }
289 else /* Reverse mode */
290 { Gmr = -gmr;
291 Gmbsr = -gmbsr;
292 FwdSumr = 0.0;
293 RevSumr = -(Gmr + Gmbsr);
294 Gmi = -gmi;
295 Gmbsi = -gmbsi;
296 FwdSumi = 0.0;
297 RevSumi = -(Gmi + Gmbsi);
298
299 gbbsp = -(here->BSIM4v7gbds);
300 gbbdp = here->BSIM4v7gbds + here->BSIM4v7gbgs + here->BSIM4v7gbbs;
301
302 gbdpg = 0.0;
303 gbdpsp = 0.0;
304 gbdpb = 0.0;
305 gbdpdp = 0.0;
306
307 gbspg = here->BSIM4v7gbgs;
308 gbspsp = here->BSIM4v7gbds;
309 gbspb = here->BSIM4v7gbbs;
310 gbspdp = -(gbspg + gbspsp + gbspb);
311
312 if (model->BSIM4v7igcMod)
313 { gIstotg = here->BSIM4v7gIgsg + here->BSIM4v7gIgcdg;
314 gIstotd = here->BSIM4v7gIgcds;
315 gIstots = here->BSIM4v7gIgss + here->BSIM4v7gIgcdd;
316 gIstotb = here->BSIM4v7gIgcdb;
317
318 gIdtotg = here->BSIM4v7gIgdg + here->BSIM4v7gIgcsg;
319 gIdtotd = here->BSIM4v7gIgdd + here->BSIM4v7gIgcss;
320 gIdtots = here->BSIM4v7gIgcsd;
321 gIdtotb = here->BSIM4v7gIgcsb;
322 }
323 else
324 { gIstotg = gIstotd = gIstots = gIstotb = 0.0;
325 gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
326 }
327
328 if (model->BSIM4v7igbMod)
329 { gIbtotg = here->BSIM4v7gIgbg;
330 gIbtotd = here->BSIM4v7gIgbs;
331 gIbtots = here->BSIM4v7gIgbd;
332 gIbtotb = here->BSIM4v7gIgbb;
333 }
334 else
335 gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
336
337 if ((model->BSIM4v7igcMod != 0) || (model->BSIM4v7igbMod != 0))
338 { gIgtotg = gIstotg + gIdtotg + gIbtotg;
339 gIgtotd = gIstotd + gIdtotd + gIbtotd ;
340 gIgtots = gIstots + gIdtots + gIbtots;
341 gIgtotb = gIstotb + gIdtotb + gIbtotb;
342 }
343 else
344 gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
345
346 if (here->BSIM4v7rgateMod == 2)
347 T0 = *(ckt->CKTstates[0] + here->BSIM4v7vges)
348 - *(ckt->CKTstates[0] + here->BSIM4v7vgs);
349 else if (here->BSIM4v7rgateMod == 3)
350 T0 = *(ckt->CKTstates[0] + here->BSIM4v7vgms)
351 - *(ckt->CKTstates[0] + here->BSIM4v7vgs);
352 if (here->BSIM4v7rgateMod > 1)
353 { gcrgd = here->BSIM4v7gcrgs * T0;
354 gcrgg = here->BSIM4v7gcrgg * T0;
355 gcrgs = here->BSIM4v7gcrgd * T0;
356 gcrgb = here->BSIM4v7gcrgb * T0;
357 gcrgg -= here->BSIM4v7gcrg;
358 gcrg = here->BSIM4v7gcrg;
359 }
360 else
361 gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
362
363 if (here->BSIM4v7rgateMod == 3)
364 { xcgmgmb = (cgdo + cgso + pParam->BSIM4v7cgbo) * omega;
365 xcgmdb = -cgdo * omega;
366 xcgmsb = -cgso * omega;
367 xcgmbb = -pParam->BSIM4v7cgbo * omega;
368
369 xcdgmb = xcgmdb;
370 xcsgmb = xcgmsb;
371 xcbgmb = xcgmbb;
372
373 xcggbr = Cggr * omega;
374 xcgdbr = Cgsr * omega;
375 xcgsbr = Cgdr * omega;
376 xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
377
378 xcdgbr = Csgr * omega;
379 xcsgbr = Cdgr * omega;
380 xcbgb = here->BSIM4v7cbgb * omega;
381 }
382 else
383 { xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v7cgbo ) * omega;
384 xcgdbr = (Cgsr - cgdo) * omega;
385 xcgsbr = (Cgdr - cgso) * omega;
386 xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
387
388 xcdgbr = (Csgr - cgdo) * omega;
389 xcsgbr = (Cdgr - cgso) * omega;
390 xcbgb = (here->BSIM4v7cbgb - pParam->BSIM4v7cgbo) * omega;
391
392 xcdgmb = xcsgmb = xcbgmb = 0.0;
393 }
394 xcddbr = (here->BSIM4v7capbd + cgdo + Cssr) * omega;
395 xcdsbr = Csdr * omega;
396 xcsdbr = Cdsr * omega;
397 xcssbr = (Cddr + here->BSIM4v7capbs + cgso) * omega;
398
399 if (!here->BSIM4v7rbodyMod)
400 { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
401 xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
402
403 xcbdb = (here->BSIM4v7cbsb - here->BSIM4v7capbd) * omega;
404 xcbsb = (here->BSIM4v7cbdb - here->BSIM4v7capbs) * omega;
405 xcdbdb = 0.0;
406 }
407 else
408 { xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb)
409 + here->BSIM4v7capbd * omega;
410 xcsbbr = Cdbr * omega;
411
412 xcbdb = here->BSIM4v7cbsb * omega;
413 xcbsb = here->BSIM4v7cbdb * omega;
414 xcdbdb = -here->BSIM4v7capbd * omega;
415 xcsbsb = -here->BSIM4v7capbs * omega;
416 }
417 xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb);
418
419 xcdgbi = Csgi;
420 xcsgbi = Cdgi;
421 xcddbi = Cssi;
422 xcdsbi = Csdi;
423 xcsdbi = Cdsi;
424 xcssbi = Cddi;
425 xcdbbi = Csbi;
426 xcsbbi = Cdbi;
427 xcggbi = Cggi;
428 xcgdbi = Cgsi;
429 xcgsbi = Cgdi;
430 xcgbbi = Cgbi;
431 }
432
433 if (model->BSIM4v7rdsMod == 1)
434 { gstot = here->BSIM4v7gstot;
435 gstotd = here->BSIM4v7gstotd;
436 gstotg = here->BSIM4v7gstotg;
437 gstots = here->BSIM4v7gstots - gstot;
438 gstotb = here->BSIM4v7gstotb;
439
440 gdtot = here->BSIM4v7gdtot;
441 gdtotd = here->BSIM4v7gdtotd - gdtot;
442 gdtotg = here->BSIM4v7gdtotg;
443 gdtots = here->BSIM4v7gdtots;
444 gdtotb = here->BSIM4v7gdtotb;
445 }
446 else
447 { gstot = gstotd = gstotg = gstots = gstotb = 0.0;
448 gdtot = gdtotd = gdtotg = gdtots = gdtotb = 0.0;
449 }
450
451
452 /*
453 * Loading AC matrix
454 */
455 m = here->BSIM4v7m;
456
457 if (!model->BSIM4v7rdsMod)
458 { gdpr = here->BSIM4v7drainConductance;
459 gspr = here->BSIM4v7sourceConductance;
460 }
461 else
462 gdpr = gspr = 0.0;
463
464 if (!here->BSIM4v7rbodyMod)
465 { gjbd = here->BSIM4v7gbd;
466 gjbs = here->BSIM4v7gbs;
467 }
468 else
469 gjbd = gjbs = 0.0;
470
471 geltd = here->BSIM4v7grgeltd;
472
473 if (here->BSIM4v7rgateMod == 1)
474 { *(here->BSIM4v7GEgePtr) += m * geltd;
475 *(here->BSIM4v7GPgePtr) -= m * geltd;
476 *(here->BSIM4v7GEgpPtr) -= m * geltd;
477
478 *(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
479 *(here->BSIM4v7GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
480 *(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
481 *(here->BSIM4v7GPdpPtr) += m * (xcgdbi + gIgtotd);
482 *(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
483 *(here->BSIM4v7GPspPtr) += m * (xcgsbi + gIgtots);
484 *(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
485 *(here->BSIM4v7GPbpPtr) += m * (xcgbbi + gIgtotb);
486 } /* WDLiu: gcrg already subtracted from all gcrgg below */
487 else if (here->BSIM4v7rgateMod == 2)
488 { *(here->BSIM4v7GEgePtr) += m * gcrg;
489 *(here->BSIM4v7GEgpPtr) += m * gcrgg;
490 *(here->BSIM4v7GEdpPtr) += m * gcrgd;
491 *(here->BSIM4v7GEspPtr) += m * gcrgs;
492 *(here->BSIM4v7GEbpPtr) += m * gcrgb;
493
494 *(here->BSIM4v7GPgePtr) -= m * gcrg;
495 *(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
496 *(here->BSIM4v7GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
497 *(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
498 *(here->BSIM4v7GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
499 *(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
500 *(here->BSIM4v7GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
501 *(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
502 *(here->BSIM4v7GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
503 }
504 else if (here->BSIM4v7rgateMod == 3)
505 { *(here->BSIM4v7GEgePtr) += m * geltd;
506 *(here->BSIM4v7GEgmPtr) -= m * geltd;
507 *(here->BSIM4v7GMgePtr) -= m * geltd;
508 *(here->BSIM4v7GMgmPtr) += m * (geltd + gcrg);
509 *(here->BSIM4v7GMgmPtr +1) += m * xcgmgmb;
510
511 *(here->BSIM4v7GMdpPtr) += m * gcrgd;
512 *(here->BSIM4v7GMdpPtr +1) += m * xcgmdb;
513 *(here->BSIM4v7GMgpPtr) += m * gcrgg;
514 *(here->BSIM4v7GMspPtr) += m * gcrgs;
515 *(here->BSIM4v7GMspPtr +1) += m * xcgmsb;
516 *(here->BSIM4v7GMbpPtr) += m * gcrgb;
517 *(here->BSIM4v7GMbpPtr +1) += m * xcgmbb;
518
519 *(here->BSIM4v7DPgmPtr +1) += m * xcdgmb;
520 *(here->BSIM4v7GPgmPtr) -= m * gcrg;
521 *(here->BSIM4v7SPgmPtr +1) += m * xcsgmb;
522 *(here->BSIM4v7BPgmPtr +1) += m * xcbgmb;
523
524 *(here->BSIM4v7GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
525 *(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
526 *(here->BSIM4v7GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
527 *(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
528 *(here->BSIM4v7GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
529 *(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
530 *(here->BSIM4v7GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
531 *(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
532 }
533 else
534 { *(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
535 *(here->BSIM4v7GPgpPtr) += m * (xcggbi + gIgtotg);
536 *(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
537 *(here->BSIM4v7GPdpPtr) += m * (xcgdbi + gIgtotd);
538 *(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
539 *(here->BSIM4v7GPspPtr) += m * (xcgsbi + gIgtots);
540 *(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
541 *(here->BSIM4v7GPbpPtr) += m * (xcgbbi + gIgtotb);
542 }
543
544 if (model->BSIM4v7rdsMod)
545 { (*(here->BSIM4v7DgpPtr) += m * gdtotg);
546 (*(here->BSIM4v7DspPtr) += m * gdtots);
547 (*(here->BSIM4v7DbpPtr) += m * gdtotb);
548 (*(here->BSIM4v7SdpPtr) += m * gstotd);
549 (*(here->BSIM4v7SgpPtr) += m * gstotg);
550 (*(here->BSIM4v7SbpPtr) += m * gstotb);
551 }
552
553 *(here->BSIM4v7DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
554 *(here->BSIM4v7DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4v7gbd
555 - gdtotd + RevSumr + gbdpdp - gIdtotd);
556 *(here->BSIM4v7DPdPtr) -= m * (gdpr + gdtot);
557 *(here->BSIM4v7DPgpPtr +1) += m * (xcdgbr + Gmi);
558 *(here->BSIM4v7DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
559 *(here->BSIM4v7DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
560 *(here->BSIM4v7DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
561 *(here->BSIM4v7DPbpPtr +1) += m * (xcdbbr + Gmbsi);
562 *(here->BSIM4v7DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
563
564 *(here->BSIM4v7DdpPtr) -= m * (gdpr - gdtotd);
565 *(here->BSIM4v7DdPtr) += m * (gdpr + gdtot);
566
567 *(here->BSIM4v7SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
568 *(here->BSIM4v7SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
569 *(here->BSIM4v7SPgpPtr +1) += m * (xcsgbr - Gmi);
570 *(here->BSIM4v7SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
571 *(here->BSIM4v7SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
572 *(here->BSIM4v7SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4v7gbs
573 - gstots + FwdSumr + gbspsp - gIstots);
574 *(here->BSIM4v7SPsPtr) -= m * (gspr + gstot);
575 *(here->BSIM4v7SPbpPtr +1) += m * (xcsbbr - Gmbsi);
576 *(here->BSIM4v7SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
577
578 *(here->BSIM4v7SspPtr) -= m * (gspr - gstots);
579 *(here->BSIM4v7SsPtr) += m * (gspr + gstot);
580
581 *(here->BSIM4v7BPdpPtr +1) += m * xcbdb;
582 *(here->BSIM4v7BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
583 *(here->BSIM4v7BPgpPtr +1) += m * xcbgb;
584 *(here->BSIM4v7BPgpPtr) -= m * (here->BSIM4v7gbgs + gIbtotg);
585 *(here->BSIM4v7BPspPtr +1) += m * xcbsb;
586 *(here->BSIM4v7BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
587 *(here->BSIM4v7BPbpPtr +1) += m * xcbbb;
588 *(here->BSIM4v7BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v7gbbs
589 - gIbtotb);
590 ggidld = here->BSIM4v7ggidld;
591 ggidlg = here->BSIM4v7ggidlg;
592 ggidlb = here->BSIM4v7ggidlb;
593 ggislg = here->BSIM4v7ggislg;
594 ggisls = here->BSIM4v7ggisls;
595 ggislb = here->BSIM4v7ggislb;
596
597 /* stamp gidl */
598 (*(here->BSIM4v7DPdpPtr) += m * ggidld);
599 (*(here->BSIM4v7DPgpPtr) += m * ggidlg);
600 (*(here->BSIM4v7DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
601 (*(here->BSIM4v7DPbpPtr) += m * ggidlb);
602 (*(here->BSIM4v7BPdpPtr) -= m * ggidld);
603 (*(here->BSIM4v7BPgpPtr) -= m * ggidlg);
604 (*(here->BSIM4v7BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
605 (*(here->BSIM4v7BPbpPtr) -= m * ggidlb);
606 /* stamp gisl */
607 (*(here->BSIM4v7SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
608 (*(here->BSIM4v7SPgpPtr) += m * ggislg);
609 (*(here->BSIM4v7SPspPtr) += m * ggisls);
610 (*(here->BSIM4v7SPbpPtr) += m * ggislb);
611 (*(here->BSIM4v7BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
612 (*(here->BSIM4v7BPgpPtr) -= m * ggislg);
613 (*(here->BSIM4v7BPspPtr) -= m * ggisls);
614 (*(here->BSIM4v7BPbpPtr) -= m * ggislb);
615
616 if (here->BSIM4v7rbodyMod)
617 { (*(here->BSIM4v7DPdbPtr +1) += m * xcdbdb);
618 (*(here->BSIM4v7DPdbPtr) -= m * here->BSIM4v7gbd);
619 (*(here->BSIM4v7SPsbPtr +1) += m * xcsbsb);
620 (*(here->BSIM4v7SPsbPtr) -= m * here->BSIM4v7gbs);
621
622 (*(here->BSIM4v7DBdpPtr +1) += m * xcdbdb);
623 (*(here->BSIM4v7DBdpPtr) -= m * here->BSIM4v7gbd);
624 (*(here->BSIM4v7DBdbPtr +1) -= m * xcdbdb);
625 (*(here->BSIM4v7DBdbPtr) += m * (here->BSIM4v7gbd + here->BSIM4v7grbpd
626 + here->BSIM4v7grbdb));
627 (*(here->BSIM4v7DBbpPtr) -= m * here->BSIM4v7grbpd);
628 (*(here->BSIM4v7DBbPtr) -= m * here->BSIM4v7grbdb);
629
630 (*(here->BSIM4v7BPdbPtr) -= m * here->BSIM4v7grbpd);
631 (*(here->BSIM4v7BPbPtr) -= m * here->BSIM4v7grbpb);
632 (*(here->BSIM4v7BPsbPtr) -= m * here->BSIM4v7grbps);
633 (*(here->BSIM4v7BPbpPtr) += m * (here->BSIM4v7grbpd + here->BSIM4v7grbps
634 + here->BSIM4v7grbpb));
635 /* WDLiu: (-here->BSIM4v7gbbs) already added to BPbpPtr */
636
637 (*(here->BSIM4v7SBspPtr +1) += m * xcsbsb);
638 (*(here->BSIM4v7SBspPtr) -= m * here->BSIM4v7gbs);
639 (*(here->BSIM4v7SBbpPtr) -= m * here->BSIM4v7grbps);
640 (*(here->BSIM4v7SBbPtr) -= m * here->BSIM4v7grbsb);
641 (*(here->BSIM4v7SBsbPtr +1) -= m * xcsbsb);
642 (*(here->BSIM4v7SBsbPtr) += m * (here->BSIM4v7gbs
643 + here->BSIM4v7grbps + here->BSIM4v7grbsb));
644
645 (*(here->BSIM4v7BdbPtr) -= m * here->BSIM4v7grbdb);
646 (*(here->BSIM4v7BbpPtr) -= m * here->BSIM4v7grbpb);
647 (*(here->BSIM4v7BsbPtr) -= m * here->BSIM4v7grbsb);
648 (*(here->BSIM4v7BbPtr) += m * (here->BSIM4v7grbsb + here->BSIM4v7grbdb
649 + here->BSIM4v7grbpb));
650 }
651
652
653 /*
654 * WDLiu: The internal charge node generated for transient NQS is not needed for
655 * AC NQS. The following is not doing a real job, but we have to keep it;
656 * otherwise a singular AC NQS matrix may occur if the transient NQS is on.
657 * The charge node is isolated from the instance.
658 */
659 if (here->BSIM4v7trnqsMod)
660 { (*(here->BSIM4v7QqPtr) += m * 1.0);
661 (*(here->BSIM4v7QgpPtr) += 0.0);
662 (*(here->BSIM4v7QdpPtr) += 0.0);
663 (*(here->BSIM4v7QspPtr) += 0.0);
664 (*(here->BSIM4v7QbpPtr) += 0.0);
665
666 (*(here->BSIM4v7DPqPtr) += 0.0);
667 (*(here->BSIM4v7SPqPtr) += 0.0);
668 (*(here->BSIM4v7GPqPtr) += 0.0);
669 }
670 }
671 }
672 return(OK);
673 }
674