1// DESCRIPTION: Verilator: Verilog Test module 2// 3// This file ONLY is placed into the Public Domain, for any use, 4// without warranty, 2015 by Johan Bjork. 5// SPDX-License-Identifier: CC0-1.0 6 7module t; 8 localparam str = "string"; 9 function logic checkParameter(input logic [8:0] N); 10 $display("x is %d.", N); 11 if (N == 1) 12 return 0; 13 $fatal(1, "Parameter %d is invalid...%s and %s", N, str, "constant both work"); 14 endfunction 15 16`ifdef FAILING_ASSERTIONS 17 localparam x = checkParameter(5); 18`else 19 localparam x = checkParameter(1); 20`endif 21 22 initial begin 23 $write("*-* All Finished *-*\n"); 24 $finish; 25 end 26endmodule 27