1// DESCRIPTION: Verilator: Verilog Test module
2//
3// This file ONLY is placed into the Public Domain, for any use,
4// without warranty, 2019 by Stefan Wallentowitz.
5// SPDX-License-Identifier: CC0-1.0
6
7`verilator_config
8
9parallel_case -file "t/t_assert_synth.v" -lines 55
10