1// DESCRIPTION: Verilator: Large test for SystemVerilog
2
3// This file ONLY is placed into the Public Domain, for any use,
4// without warranty, 2012.
5// SPDX-License-Identifier: CC0-1.0
6
7// Contributed by M W Lund, Atmel Corporation.
8
9// *****************************************************************************
10// Code ROM
11//
12// IMPORTANT!
13//   Array size must be uppdated according to program size.
14// *****************************************************************************
15
16const
17  logic [15:0] rom[0:13]
18  = '{
19      `LDI( R0, 11 )
20      `LDI( R1, 22 )
21      `LDI( R2, 33 )
22      `LDI( R3, 44 )
23
24      `STS(  0, R0 )
25      `STS(  1, R1 )
26      `STS(  2, R2 )
27      `STS(  3, R3 )
28
29      `LDS(  R4, 0 )
30      `LDS(  R5, 1 )
31      `LDS(  R6, 0 )
32      `LDS(  R7, 0 )
33
34      `JMP( 00 )
35
36      `EOP                      // End of Program (NOP)
37      };
38