1// DESCRIPTION: Verilator: Verilog Test module 2// 3// This file ONLY is placed under The Creative Commons Public Domain, for 4// any use, without warranty, 2020 by Wilson Snyder. 5// SPDX-License-Identifier: CC0-1.0 6 7// units < precision 8`timescale 1ps/1ns 9 10// Bad scale 11`timescale frump 12`timescale 1xs 13`timescale 2ps 14`timescale 1ns / frump 15`timescale 1ns / 1ps /extra 16 17module t; 18 timeunit 2ps; // Bad 19 timeprecision 2ps; // Bad 20endmodule 21