1// Flipflop intermediate map level 2module \$__FF_NOLSR (input D, C, E, output Q); 3 parameter _TECHMAP_WIREINIT_Q_ = 1'bx; 4 wire _TECHMAP_REMOVEINIT_Q_ = 1'b1; 5 generate 6 if (_TECHMAP_WIREINIT_Q_ === 1'b1) 7 FD1P3JX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .PD(1'b0), .Q(Q)); 8 else 9 FD1P3IX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .CD(1'b0), .Q(Q)); 10 endgenerate 11endmodule 12 13module \$__FF_SYNCLSR (input D, C, E, R, output Q); 14 parameter SR_VAL = 1'b0; 15 parameter _TECHMAP_WIREINIT_Q_ = 1'bx; 16 wire _TECHMAP_REMOVEINIT_Q_ = 1'b1; 17 wire Ci, Ei, Ri, Rg, Dd; 18 generate 19 if (SR_VAL) 20 FD1P3JX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .PD(R), .Q(Q)); 21 else 22 FD1P3IX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .CD(R), .Q(Q)); 23 endgenerate 24endmodule 25 26module \$__FF_ASYNCLSR (input D, C, E, R, output Q); 27 parameter SR_VAL = 1'b0; 28 parameter _TECHMAP_WIREINIT_Q_ = 1'bx; 29 wire _TECHMAP_REMOVEINIT_Q_ = (_TECHMAP_WIREINIT_Q_ === 1'bx || _TECHMAP_WIREINIT_Q_ === SR_VAL); 30 wire Ci, Ei, Ri, Rg, Dd; 31 generate 32 if (SR_VAL) 33 FD1P3BX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .PD(R), .Q(Q)); 34 else 35 FD1P3DX #(.GSR("DISABLED")) _TECHMAP_REPLACE_ (.D(D), .CK(C), .SP(E), .CD(R), .Q(Q)); 36 endgenerate 37endmodule 38 39 40module \$_DFF_P_ (input D, C, output Q); \$__FF_NOLSR _TECHMAP_REPLACE_ (.D(D), .C(C), .E(1'b1), .Q(Q)); endmodule 41 42module \$_DFFE_PP_ (input D, C, E, output Q); \$__FF_NOLSR _TECHMAP_REPLACE_ (.D(D), .C(C), .E(E), .Q(Q)); endmodule 43 44module \$_DFF_PP0_ (input D, C, R, output Q); \$__FF_ASYNCLSR #(0) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(1'b1), .Q(Q)); endmodule 45module \$_DFF_PP1_ (input D, C, R, output Q); \$__FF_ASYNCLSR #(1) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(1'b1), .Q(Q)); endmodule 46 47module \$_SDFF_PP0_ (input D, C, R, output Q); \$__FF_SYNCLSR #(0) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(1'b1), .Q(Q)); endmodule 48module \$_SDFF_PP1_ (input D, C, R, output Q); \$__FF_SYNCLSR #(1) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(1'b1), .Q(Q)); endmodule 49 50module \$_DFFE_PP0P_ (input D, C, E, R, output Q); \$__FF_ASYNCLSR #(0) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(E), .Q(Q)); endmodule 51module \$_DFFE_PP1P_ (input D, C, E, R, output Q); \$__FF_ASYNCLSR #(1) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(E), .Q(Q)); endmodule 52 53module \$_SDFFE_PP0P_ (input D, C, E, R, output Q); \$__FF_SYNCLSR #(0) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(E), .Q(Q)); endmodule 54module \$_SDFFE_PP1P_ (input D, C, E, R, output Q); \$__FF_SYNCLSR #(1) _TECHMAP_REPLACE_ (.D(D), .C(C), .R(R), .E(E), .Q(Q)); endmodule 55 56`ifndef NO_LUT 57module \$lut (A, Y); 58 parameter WIDTH = 0; 59 parameter LUT = 0; 60 61 input [WIDTH-1:0] A; 62 output Y; 63 64 generate 65 if (WIDTH == 1) begin 66 if (LUT == 2'b01) 67 INV _TECHMAP_REPLACE_ (.A(A[0]), .Z(Y)); 68 else 69 LUT4 #(.INIT($sformatf("0x%04x", {{8{LUT[1]}}, {8{LUT[0]}}}))) _TECHMAP_REPLACE_ (.Z(Y), 70 .D(A[0])); 71 end else 72 if (WIDTH == 2) begin 73 localparam [15:0] INIT = {{4{LUT[3]}}, {4{LUT[2]}}, {4{LUT[1]}}, {4{LUT[0]}}}; 74 LUT4 #(.INIT($sformatf("0x%04x", INIT))) _TECHMAP_REPLACE_ (.Z(Y), 75 .C(A[0]), .D(A[1])); 76 end else 77 if (WIDTH == 3) begin 78 localparam [15:0] INIT = {{2{LUT[7]}}, {2{LUT[6]}}, {2{LUT[5]}}, {2{LUT[4]}}, {2{LUT[3]}}, {2{LUT[2]}}, {2{LUT[1]}}, {2{LUT[0]}}}; 79 LUT4 #(.INIT($sformatf("0x%04x", INIT))) _TECHMAP_REPLACE_ (.Z(Y), 80 .B(A[0]), .C(A[1]), .D(A[2])); 81 end else 82 if (WIDTH == 4) begin 83 LUT4 #(.INIT($sformatf("0x%04x", LUT))) _TECHMAP_REPLACE_ (.Z(Y), 84 .A(A[0]), .B(A[1]), .C(A[2]), .D(A[3])); 85 end else 86 if (WIDTH == 5) begin 87 WIDEFN9 #( 88 .INIT0($sformatf("0x%04x", LUT[15:0 ])), 89 .INIT1($sformatf("0x%04x", LUT[31:16])), 90 ) _TECHMAP_REPLACE_ ( 91 .A0(A[0]), .B0(A[1]), .C0(A[2]), .D0(A[3]), 92 .A1(A[0]), .B1(A[1]), .C1(A[2]), .D1(A[3]), 93 .SEL(A[4]), .Z(Y) 94 ); 95 end 96 endgenerate 97endmodule 98`endif 99