1// Created by cells_xtra.py from Xilinx models
2
3module RAMB16_S1 (...);
4    parameter [0:0] INIT = 1'h0;
5    parameter [0:0] SRVAL = 1'h0;
6    parameter WRITE_MODE = "WRITE_FIRST";
7    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
8    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
9    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
10    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
11    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
12    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
13    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
14    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
15    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
16    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
17    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
18    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
19    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
20    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
21    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
22    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
23    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
24    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
25    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
26    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
27    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
28    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
29    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
30    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
31    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
32    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
33    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
34    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
35    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
36    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
37    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
38    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
39    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
40    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
41    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
42    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
43    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
44    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
45    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
46    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
47    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
48    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
49    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
50    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
51    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
52    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
53    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
54    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
55    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
56    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
57    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
58    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
59    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
60    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
61    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
62    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
63    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
64    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
65    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
66    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
67    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
68    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
69    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
70    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
71    output [0:0] DO;
72    input [13:0] ADDR;
73    input [0:0] DI;
74    input EN;
75    (* clkbuf_sink *)
76    input CLK;
77    input WE;
78    input SSR;
79endmodule
80
81module RAMB16_S2 (...);
82    parameter [1:0] INIT = 2'h0;
83    parameter [1:0] SRVAL = 2'h0;
84    parameter WRITE_MODE = "WRITE_FIRST";
85    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
86    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
87    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
88    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
89    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
90    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
91    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
92    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
93    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
94    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
95    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
96    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
97    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
98    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
99    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
100    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
101    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
102    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
103    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
104    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
105    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
106    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
107    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
108    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
109    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
110    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
111    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
112    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
113    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
114    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
115    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
116    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
117    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
118    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
119    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
120    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
121    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
122    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
123    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
124    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
125    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
126    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
127    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
128    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
129    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
130    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
131    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
132    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
133    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
134    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
135    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
136    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
137    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
138    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
139    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
140    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
141    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
142    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
143    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
144    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
145    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
146    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
147    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
148    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
149    output [1:0] DO;
150    input [12:0] ADDR;
151    input [1:0] DI;
152    input EN;
153    (* clkbuf_sink *)
154    input CLK;
155    input WE;
156    input SSR;
157endmodule
158
159module RAMB16_S4 (...);
160    parameter [3:0] INIT = 4'h0;
161    parameter [3:0] SRVAL = 4'h0;
162    parameter WRITE_MODE = "WRITE_FIRST";
163    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
164    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
165    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
166    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
167    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
168    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
169    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
170    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
171    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
172    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
173    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
174    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
175    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
176    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
177    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
178    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
179    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
180    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
181    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
182    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
183    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
184    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
185    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
186    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
187    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
188    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
189    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
190    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
191    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
192    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
193    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
194    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
195    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
196    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
197    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
198    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
199    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
200    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
201    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
202    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
203    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
204    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
205    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
206    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
207    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
208    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
209    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
210    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
211    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
212    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
213    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
214    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
215    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
216    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
217    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
218    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
219    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
220    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
221    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
222    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
223    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
224    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
225    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
226    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
227    output [3:0] DO;
228    input [11:0] ADDR;
229    input [3:0] DI;
230    input EN;
231    (* clkbuf_sink *)
232    input CLK;
233    input WE;
234    input SSR;
235endmodule
236
237module RAMB16_S9 (...);
238    parameter [8:0] INIT = 9'h0;
239    parameter [8:0] SRVAL = 9'h0;
240    parameter WRITE_MODE = "WRITE_FIRST";
241    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
242    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
243    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
244    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
245    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
246    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
247    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
248    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
249    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
250    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
251    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
252    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
253    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
254    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
255    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
256    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
257    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
258    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
259    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
260    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
261    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
262    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
263    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
264    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
265    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
266    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
267    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
268    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
269    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
270    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
271    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
272    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
273    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
274    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
275    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
276    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
277    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
278    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
279    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
280    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
281    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
282    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
283    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
284    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
285    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
286    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
287    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
288    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
289    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
290    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
291    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
292    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
293    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
294    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
295    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
296    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
297    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
298    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
299    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
300    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
301    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
302    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
303    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
304    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
305    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
306    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
307    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
308    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
309    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
310    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
311    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
312    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
313    output [7:0] DO;
314    output [0:0] DOP;
315    input [10:0] ADDR;
316    input [7:0] DI;
317    input [0:0] DIP;
318    input EN;
319    (* clkbuf_sink *)
320    input CLK;
321    input WE;
322    input SSR;
323endmodule
324
325module RAMB16_S18 (...);
326    parameter [17:0] INIT = 18'h0;
327    parameter [17:0] SRVAL = 18'h0;
328    parameter WRITE_MODE = "WRITE_FIRST";
329    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
330    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
331    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
332    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
333    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
334    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
335    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
336    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
337    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
338    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
339    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
340    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
341    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
342    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
343    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
344    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
345    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
346    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
347    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
348    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
349    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
350    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
351    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
352    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
353    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
354    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
355    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
356    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
357    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
358    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
359    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
360    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
361    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
362    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
363    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
364    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
365    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
366    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
367    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
368    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
369    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
370    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
371    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
372    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
373    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
374    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
375    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
376    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
377    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
378    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
379    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
380    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
381    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
382    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
383    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
384    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
385    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
386    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
387    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
388    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
389    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
390    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
391    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
392    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
393    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
394    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
395    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
396    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
397    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
398    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
399    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
400    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
401    output [15:0] DO;
402    output [1:0] DOP;
403    input [9:0] ADDR;
404    input [15:0] DI;
405    input [1:0] DIP;
406    input EN;
407    (* clkbuf_sink *)
408    input CLK;
409    input WE;
410    input SSR;
411endmodule
412
413module RAMB16_S36 (...);
414    parameter [35:0] INIT = 36'h0;
415    parameter [35:0] SRVAL = 36'h0;
416    parameter WRITE_MODE = "WRITE_FIRST";
417    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
418    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
419    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
420    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
421    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
422    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
423    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
424    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
425    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
426    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
427    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
428    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
429    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
430    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
431    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
432    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
433    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
434    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
435    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
436    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
437    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
438    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
439    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
440    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
441    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
442    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
443    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
444    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
445    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
446    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
447    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
448    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
449    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
450    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
451    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
452    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
453    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
454    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
455    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
456    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
457    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
458    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
459    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
460    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
461    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
462    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
463    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
464    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
465    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
466    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
467    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
468    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
469    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
470    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
471    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
472    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
473    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
474    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
475    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
476    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
477    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
478    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
479    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
480    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
481    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
482    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
483    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
484    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
485    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
486    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
487    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
488    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
489    output [31:0] DO;
490    output [3:0] DOP;
491    input [8:0] ADDR;
492    input [31:0] DI;
493    input [3:0] DIP;
494    input EN;
495    (* clkbuf_sink *)
496    input CLK;
497    input WE;
498    input SSR;
499endmodule
500
501module RAMB16_S1_S1 (...);
502    parameter [0:0] INIT_A = 1'h0;
503    parameter [0:0] INIT_B = 1'h0;
504    parameter [0:0] SRVAL_A = 1'h0;
505    parameter [0:0] SRVAL_B = 1'h0;
506    parameter WRITE_MODE_A = "WRITE_FIRST";
507    parameter WRITE_MODE_B = "WRITE_FIRST";
508    parameter SIM_COLLISION_CHECK = "ALL";
509    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
510    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
511    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
512    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
513    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
514    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
515    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
516    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
517    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
518    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
519    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
520    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
521    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
522    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
523    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
524    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
525    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
526    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
527    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
528    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
529    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
530    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
531    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
532    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
533    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
534    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
535    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
536    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
537    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
538    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
539    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
540    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
541    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
542    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
543    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
544    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
545    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
546    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
547    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
548    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
549    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
550    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
551    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
552    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
553    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
554    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
555    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
556    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
557    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
558    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
559    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
560    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
561    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
562    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
563    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
564    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
565    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
566    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
567    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
568    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
569    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
570    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
571    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
572    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
573    output [0:0] DOA;
574    input [13:0] ADDRA;
575    input [0:0] DIA;
576    input ENA;
577    (* clkbuf_sink *)
578    input CLKA;
579    input WEA;
580    input SSRA;
581    output [0:0] DOB;
582    input [13:0] ADDRB;
583    input [0:0] DIB;
584    input ENB;
585    (* clkbuf_sink *)
586    input CLKB;
587    input WEB;
588    input SSRB;
589endmodule
590
591module RAMB16_S1_S2 (...);
592    parameter [0:0] INIT_A = 1'h0;
593    parameter [1:0] INIT_B = 2'h0;
594    parameter [0:0] SRVAL_A = 1'h0;
595    parameter [1:0] SRVAL_B = 2'h0;
596    parameter WRITE_MODE_A = "WRITE_FIRST";
597    parameter WRITE_MODE_B = "WRITE_FIRST";
598    parameter SIM_COLLISION_CHECK = "ALL";
599    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
600    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
601    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
602    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
603    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
604    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
605    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
606    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
607    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
608    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
609    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
610    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
611    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
612    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
613    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
614    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
615    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
616    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
617    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
618    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
619    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
620    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
621    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
622    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
623    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
624    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
625    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
626    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
627    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
628    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
629    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
630    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
631    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
632    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
633    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
634    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
635    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
636    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
637    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
638    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
639    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
640    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
641    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
642    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
643    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
644    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
645    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
646    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
647    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
648    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
649    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
650    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
651    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
652    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
653    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
654    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
655    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
656    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
657    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
658    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
659    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
660    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
661    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
662    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
663    output [0:0] DOA;
664    input [13:0] ADDRA;
665    input [0:0] DIA;
666    input ENA;
667    (* clkbuf_sink *)
668    input CLKA;
669    input WEA;
670    input SSRA;
671    output [1:0] DOB;
672    input [12:0] ADDRB;
673    input [1:0] DIB;
674    input ENB;
675    (* clkbuf_sink *)
676    input CLKB;
677    input WEB;
678    input SSRB;
679endmodule
680
681module RAMB16_S1_S4 (...);
682    parameter [0:0] INIT_A = 1'h0;
683    parameter [3:0] INIT_B = 4'h0;
684    parameter [0:0] SRVAL_A = 1'h0;
685    parameter [3:0] SRVAL_B = 4'h0;
686    parameter WRITE_MODE_A = "WRITE_FIRST";
687    parameter WRITE_MODE_B = "WRITE_FIRST";
688    parameter SIM_COLLISION_CHECK = "ALL";
689    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
690    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
691    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
692    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
693    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
694    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
695    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
696    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
697    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
698    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
699    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
700    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
701    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
702    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
703    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
704    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
705    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
706    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
707    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
708    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
709    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
710    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
711    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
712    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
713    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
714    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
715    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
716    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
717    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
718    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
719    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
720    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
721    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
722    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
723    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
724    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
725    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
726    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
727    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
728    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
729    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
730    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
731    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
732    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
733    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
734    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
735    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
736    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
737    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
738    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
739    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
740    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
741    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
742    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
743    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
744    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
745    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
746    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
747    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
748    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
749    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
750    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
751    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
752    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
753    output [0:0] DOA;
754    input [13:0] ADDRA;
755    input [0:0] DIA;
756    input ENA;
757    (* clkbuf_sink *)
758    input CLKA;
759    input WEA;
760    input SSRA;
761    output [3:0] DOB;
762    input [11:0] ADDRB;
763    input [3:0] DIB;
764    input ENB;
765    (* clkbuf_sink *)
766    input CLKB;
767    input WEB;
768    input SSRB;
769endmodule
770
771module RAMB16_S1_S9 (...);
772    parameter [0:0] INIT_A = 1'h0;
773    parameter [8:0] INIT_B = 9'h0;
774    parameter [0:0] SRVAL_A = 1'h0;
775    parameter [8:0] SRVAL_B = 9'h0;
776    parameter WRITE_MODE_A = "WRITE_FIRST";
777    parameter WRITE_MODE_B = "WRITE_FIRST";
778    parameter SIM_COLLISION_CHECK = "ALL";
779    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
780    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
781    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
782    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
783    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
784    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
785    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
786    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
787    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
788    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
789    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
790    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
791    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
792    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
793    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
794    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
795    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
796    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
797    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
798    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
799    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
800    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
801    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
802    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
803    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
804    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
805    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
806    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
807    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
808    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
809    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
810    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
811    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
812    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
813    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
814    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
815    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
816    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
817    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
818    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
819    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
820    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
821    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
822    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
823    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
824    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
825    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
826    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
827    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
828    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
829    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
830    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
831    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
832    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
833    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
834    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
835    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
836    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
837    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
838    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
839    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
840    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
841    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
842    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
843    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
844    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
845    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
846    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
847    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
848    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
849    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
850    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
851    output [0:0] DOA;
852    input [13:0] ADDRA;
853    input [0:0] DIA;
854    input ENA;
855    (* clkbuf_sink *)
856    input CLKA;
857    input WEA;
858    input SSRA;
859    output [7:0] DOB;
860    output [0:0] DOPB;
861    input [10:0] ADDRB;
862    input [7:0] DIB;
863    input [0:0] DIPB;
864    input ENB;
865    (* clkbuf_sink *)
866    input CLKB;
867    input WEB;
868    input SSRB;
869endmodule
870
871module RAMB16_S1_S18 (...);
872    parameter [0:0] INIT_A = 1'h0;
873    parameter [17:0] INIT_B = 18'h0;
874    parameter [0:0] SRVAL_A = 1'h0;
875    parameter [17:0] SRVAL_B = 18'h0;
876    parameter WRITE_MODE_A = "WRITE_FIRST";
877    parameter WRITE_MODE_B = "WRITE_FIRST";
878    parameter SIM_COLLISION_CHECK = "ALL";
879    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
880    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
881    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
882    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
883    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
884    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
885    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
886    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
887    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
888    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
889    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
890    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
891    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
892    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
893    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
894    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
895    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
896    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
897    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
898    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
899    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
900    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
901    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
902    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
903    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
904    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
905    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
906    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
907    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
908    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
909    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
910    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
911    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
912    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
913    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
914    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
915    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
916    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
917    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
918    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
919    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
920    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
921    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
922    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
923    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
924    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
925    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
926    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
927    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
928    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
929    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
930    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
931    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
932    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
933    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
934    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
935    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
936    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
937    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
938    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
939    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
940    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
941    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
942    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
943    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
944    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
945    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
946    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
947    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
948    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
949    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
950    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
951    output [0:0] DOA;
952    input [13:0] ADDRA;
953    input [0:0] DIA;
954    input ENA;
955    (* clkbuf_sink *)
956    input CLKA;
957    input WEA;
958    input SSRA;
959    output [15:0] DOB;
960    output [1:0] DOPB;
961    input [9:0] ADDRB;
962    input [15:0] DIB;
963    input [1:0] DIPB;
964    input ENB;
965    (* clkbuf_sink *)
966    input CLKB;
967    input WEB;
968    input SSRB;
969endmodule
970
971module RAMB16_S1_S36 (...);
972    parameter [0:0] INIT_A = 1'h0;
973    parameter [35:0] INIT_B = 36'h0;
974    parameter [0:0] SRVAL_A = 1'h0;
975    parameter [35:0] SRVAL_B = 36'h0;
976    parameter WRITE_MODE_A = "WRITE_FIRST";
977    parameter WRITE_MODE_B = "WRITE_FIRST";
978    parameter SIM_COLLISION_CHECK = "ALL";
979    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
980    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
981    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
982    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
983    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
984    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
985    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
986    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
987    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
988    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
989    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
990    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
991    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
992    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
993    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
994    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
995    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
996    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
997    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
998    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
999    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1000    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1001    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1002    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1003    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1004    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1005    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1006    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1007    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1008    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1009    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1010    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1011    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1012    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1013    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1014    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1015    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1016    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1017    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1018    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1019    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1020    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1021    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1022    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1023    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1024    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1025    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1026    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1027    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1028    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1029    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1030    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1031    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1032    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1033    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1034    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1035    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1036    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1037    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1038    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1039    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1040    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1041    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1042    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1043    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1044    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1045    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1046    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1047    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1048    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1049    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1050    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1051    output [0:0] DOA;
1052    input [13:0] ADDRA;
1053    input [0:0] DIA;
1054    input ENA;
1055    (* clkbuf_sink *)
1056    input CLKA;
1057    input WEA;
1058    input SSRA;
1059    output [31:0] DOB;
1060    output [3:0] DOPB;
1061    input [8:0] ADDRB;
1062    input [31:0] DIB;
1063    input [3:0] DIPB;
1064    input ENB;
1065    (* clkbuf_sink *)
1066    input CLKB;
1067    input WEB;
1068    input SSRB;
1069endmodule
1070
1071module RAMB16_S2_S2 (...);
1072    parameter [1:0] INIT_A = 2'h0;
1073    parameter [1:0] INIT_B = 2'h0;
1074    parameter [1:0] SRVAL_A = 2'h0;
1075    parameter [1:0] SRVAL_B = 2'h0;
1076    parameter WRITE_MODE_A = "WRITE_FIRST";
1077    parameter WRITE_MODE_B = "WRITE_FIRST";
1078    parameter SIM_COLLISION_CHECK = "ALL";
1079    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1080    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1081    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1082    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1083    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1084    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1085    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1086    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1087    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1088    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1089    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1090    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1091    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1092    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1093    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1094    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1095    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1096    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1097    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1098    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1099    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1100    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1101    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1102    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1103    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1104    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1105    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1106    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1107    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1108    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1109    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1110    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1111    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1112    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1113    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1114    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1115    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1116    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1117    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1118    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1119    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1120    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1121    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1122    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1123    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1124    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1125    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1126    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1127    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1128    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1129    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1130    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1131    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1132    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1133    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1134    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1135    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1136    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1137    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1138    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1139    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1140    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1141    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1142    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1143    output [1:0] DOA;
1144    input [12:0] ADDRA;
1145    input [1:0] DIA;
1146    input ENA;
1147    (* clkbuf_sink *)
1148    input CLKA;
1149    input WEA;
1150    input SSRA;
1151    output [1:0] DOB;
1152    input [12:0] ADDRB;
1153    input [1:0] DIB;
1154    input ENB;
1155    (* clkbuf_sink *)
1156    input CLKB;
1157    input WEB;
1158    input SSRB;
1159endmodule
1160
1161module RAMB16_S2_S4 (...);
1162    parameter [1:0] INIT_A = 2'h0;
1163    parameter [3:0] INIT_B = 4'h0;
1164    parameter [1:0] SRVAL_A = 2'h0;
1165    parameter [3:0] SRVAL_B = 4'h0;
1166    parameter WRITE_MODE_A = "WRITE_FIRST";
1167    parameter WRITE_MODE_B = "WRITE_FIRST";
1168    parameter SIM_COLLISION_CHECK = "ALL";
1169    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1170    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1171    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1172    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1173    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1174    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1175    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1176    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1177    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1178    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1179    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1180    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1181    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1182    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1183    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1184    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1185    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1186    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1187    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1188    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1189    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1190    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1191    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1192    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1193    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1194    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1195    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1196    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1197    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1198    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1199    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1200    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1201    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1202    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1203    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1204    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1205    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1206    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1207    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1208    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1209    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1210    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1211    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1212    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1213    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1214    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1215    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1216    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1217    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1218    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1219    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1220    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1221    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1222    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1223    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1224    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1225    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1226    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1227    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1228    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1229    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1230    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1231    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1232    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1233    output [1:0] DOA;
1234    input [12:0] ADDRA;
1235    input [1:0] DIA;
1236    input ENA;
1237    (* clkbuf_sink *)
1238    input CLKA;
1239    input WEA;
1240    input SSRA;
1241    output [3:0] DOB;
1242    input [11:0] ADDRB;
1243    input [3:0] DIB;
1244    input ENB;
1245    (* clkbuf_sink *)
1246    input CLKB;
1247    input WEB;
1248    input SSRB;
1249endmodule
1250
1251module RAMB16_S2_S9 (...);
1252    parameter [1:0] INIT_A = 2'h0;
1253    parameter [8:0] INIT_B = 9'h0;
1254    parameter [1:0] SRVAL_A = 2'h0;
1255    parameter [8:0] SRVAL_B = 9'h0;
1256    parameter WRITE_MODE_A = "WRITE_FIRST";
1257    parameter WRITE_MODE_B = "WRITE_FIRST";
1258    parameter SIM_COLLISION_CHECK = "ALL";
1259    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1260    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1261    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1262    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1263    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1264    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1265    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1266    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1267    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1268    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1269    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1270    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1271    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1272    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1273    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1274    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1275    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1276    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1277    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1278    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1279    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1280    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1281    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1282    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1283    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1284    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1285    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1286    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1287    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1288    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1289    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1290    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1291    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1292    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1293    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1294    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1295    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1296    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1297    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1298    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1299    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1300    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1301    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1302    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1303    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1304    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1305    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1306    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1307    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1308    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1309    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1310    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1311    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1312    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1313    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1314    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1315    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1316    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1317    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1318    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1319    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1320    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1321    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1322    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1323    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1324    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1325    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1326    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1327    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1328    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1329    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1330    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1331    output [1:0] DOA;
1332    input [12:0] ADDRA;
1333    input [1:0] DIA;
1334    input ENA;
1335    (* clkbuf_sink *)
1336    input CLKA;
1337    input WEA;
1338    input SSRA;
1339    output [7:0] DOB;
1340    output [0:0] DOPB;
1341    input [10:0] ADDRB;
1342    input [7:0] DIB;
1343    input [0:0] DIPB;
1344    input ENB;
1345    (* clkbuf_sink *)
1346    input CLKB;
1347    input WEB;
1348    input SSRB;
1349endmodule
1350
1351module RAMB16_S2_S18 (...);
1352    parameter [1:0] INIT_A = 2'h0;
1353    parameter [17:0] INIT_B = 18'h0;
1354    parameter [1:0] SRVAL_A = 2'h0;
1355    parameter [17:0] SRVAL_B = 18'h0;
1356    parameter WRITE_MODE_A = "WRITE_FIRST";
1357    parameter WRITE_MODE_B = "WRITE_FIRST";
1358    parameter SIM_COLLISION_CHECK = "ALL";
1359    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1360    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1361    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1362    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1363    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1364    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1365    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1366    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1367    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1368    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1369    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1370    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1371    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1372    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1373    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1374    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1375    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1376    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1377    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1378    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1379    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1380    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1381    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1382    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1383    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1384    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1385    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1386    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1387    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1388    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1389    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1390    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1391    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1392    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1393    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1394    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1395    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1396    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1397    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1398    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1399    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1400    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1401    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1402    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1403    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1404    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1405    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1406    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1407    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1408    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1409    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1410    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1411    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1412    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1413    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1414    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1415    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1416    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1417    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1418    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1419    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1420    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1421    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1422    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1423    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1424    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1425    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1426    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1427    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1428    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1429    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1430    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1431    output [1:0] DOA;
1432    input [12:0] ADDRA;
1433    input [1:0] DIA;
1434    input ENA;
1435    (* clkbuf_sink *)
1436    input CLKA;
1437    input WEA;
1438    input SSRA;
1439    output [15:0] DOB;
1440    output [1:0] DOPB;
1441    input [9:0] ADDRB;
1442    input [15:0] DIB;
1443    input [1:0] DIPB;
1444    input ENB;
1445    (* clkbuf_sink *)
1446    input CLKB;
1447    input WEB;
1448    input SSRB;
1449endmodule
1450
1451module RAMB16_S2_S36 (...);
1452    parameter [1:0] INIT_A = 2'h0;
1453    parameter [35:0] INIT_B = 36'h0;
1454    parameter [1:0] SRVAL_A = 2'h0;
1455    parameter [35:0] SRVAL_B = 36'h0;
1456    parameter WRITE_MODE_A = "WRITE_FIRST";
1457    parameter WRITE_MODE_B = "WRITE_FIRST";
1458    parameter SIM_COLLISION_CHECK = "ALL";
1459    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1460    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1461    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1462    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1463    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1464    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1465    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1466    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1467    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1468    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1469    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1470    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1471    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1472    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1473    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1474    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1475    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1476    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1477    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1478    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1479    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1480    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1481    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1482    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1483    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1484    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1485    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1486    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1487    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1488    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1489    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1490    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1491    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1492    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1493    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1494    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1495    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1496    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1497    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1498    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1499    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1500    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1501    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1502    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1503    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1504    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1505    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1506    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1507    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1508    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1509    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1510    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1511    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1512    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1513    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1514    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1515    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1516    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1517    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1518    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1519    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1520    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1521    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1522    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1523    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1524    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1525    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1526    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1527    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1528    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1529    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1530    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1531    output [1:0] DOA;
1532    input [12:0] ADDRA;
1533    input [1:0] DIA;
1534    input ENA;
1535    (* clkbuf_sink *)
1536    input CLKA;
1537    input WEA;
1538    input SSRA;
1539    output [31:0] DOB;
1540    output [3:0] DOPB;
1541    input [8:0] ADDRB;
1542    input [31:0] DIB;
1543    input [3:0] DIPB;
1544    input ENB;
1545    (* clkbuf_sink *)
1546    input CLKB;
1547    input WEB;
1548    input SSRB;
1549endmodule
1550
1551module RAMB16_S4_S4 (...);
1552    parameter [3:0] INIT_A = 4'h0;
1553    parameter [3:0] INIT_B = 4'h0;
1554    parameter [3:0] SRVAL_A = 4'h0;
1555    parameter [3:0] SRVAL_B = 4'h0;
1556    parameter WRITE_MODE_A = "WRITE_FIRST";
1557    parameter WRITE_MODE_B = "WRITE_FIRST";
1558    parameter SIM_COLLISION_CHECK = "ALL";
1559    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1560    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1561    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1562    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1563    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1564    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1565    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1566    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1567    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1568    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1569    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1570    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1571    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1572    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1573    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1574    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1575    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1576    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1577    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1578    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1579    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1580    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1581    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1582    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1583    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1584    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1585    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1586    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1587    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1588    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1589    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1590    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1591    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1592    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1593    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1594    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1595    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1596    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1597    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1598    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1599    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1600    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1601    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1602    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1603    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1604    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1605    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1606    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1607    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1608    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1609    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1610    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1611    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1612    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1613    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1614    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1615    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1616    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1617    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1618    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1619    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1620    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1621    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1622    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1623    output [3:0] DOA;
1624    input [11:0] ADDRA;
1625    input [3:0] DIA;
1626    input ENA;
1627    (* clkbuf_sink *)
1628    input CLKA;
1629    input WEA;
1630    input SSRA;
1631    output [3:0] DOB;
1632    input [11:0] ADDRB;
1633    input [3:0] DIB;
1634    input ENB;
1635    (* clkbuf_sink *)
1636    input CLKB;
1637    input WEB;
1638    input SSRB;
1639endmodule
1640
1641module RAMB16_S4_S9 (...);
1642    parameter [3:0] INIT_A = 4'h0;
1643    parameter [8:0] INIT_B = 9'h0;
1644    parameter [3:0] SRVAL_A = 4'h0;
1645    parameter [8:0] SRVAL_B = 9'h0;
1646    parameter WRITE_MODE_A = "WRITE_FIRST";
1647    parameter WRITE_MODE_B = "WRITE_FIRST";
1648    parameter SIM_COLLISION_CHECK = "ALL";
1649    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1650    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1651    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1652    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1653    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1654    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1655    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1656    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1657    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1658    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1659    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1660    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1661    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1662    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1663    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1664    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1665    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1666    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1667    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1668    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1669    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1670    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1671    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1672    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1673    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1674    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1675    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1676    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1677    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1678    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1679    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1680    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1681    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1682    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1683    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1684    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1685    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1686    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1687    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1688    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1689    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1690    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1691    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1692    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1693    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1694    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1695    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1696    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1697    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1698    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1699    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1700    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1701    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1702    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1703    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1704    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1705    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1706    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1707    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1708    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1709    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1710    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1711    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1712    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1713    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1714    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1715    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1716    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1717    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1718    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1719    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1720    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1721    output [3:0] DOA;
1722    input [11:0] ADDRA;
1723    input [3:0] DIA;
1724    input ENA;
1725    (* clkbuf_sink *)
1726    input CLKA;
1727    input WEA;
1728    input SSRA;
1729    output [7:0] DOB;
1730    output [0:0] DOPB;
1731    input [10:0] ADDRB;
1732    input [7:0] DIB;
1733    input [0:0] DIPB;
1734    input ENB;
1735    (* clkbuf_sink *)
1736    input CLKB;
1737    input WEB;
1738    input SSRB;
1739endmodule
1740
1741module RAMB16_S4_S18 (...);
1742    parameter [3:0] INIT_A = 4'h0;
1743    parameter [17:0] INIT_B = 18'h0;
1744    parameter [3:0] SRVAL_A = 4'h0;
1745    parameter [17:0] SRVAL_B = 18'h0;
1746    parameter WRITE_MODE_A = "WRITE_FIRST";
1747    parameter WRITE_MODE_B = "WRITE_FIRST";
1748    parameter SIM_COLLISION_CHECK = "ALL";
1749    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1750    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1751    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1752    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1753    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1754    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1755    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1756    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1757    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1758    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1759    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1760    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1761    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1762    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1763    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1764    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1765    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1766    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1767    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1768    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1769    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1770    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1771    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1772    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1773    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1774    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1775    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1776    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1777    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1778    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1779    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1780    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1781    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1782    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1783    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1784    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1785    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1786    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1787    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1788    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1789    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1790    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1791    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1792    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1793    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1794    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1795    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1796    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1797    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1798    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1799    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1800    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1801    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1802    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1803    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1804    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1805    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1806    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1807    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1808    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1809    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1810    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1811    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1812    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1813    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1814    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1815    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1816    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1817    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1818    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1819    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1820    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1821    output [3:0] DOA;
1822    input [11:0] ADDRA;
1823    input [3:0] DIA;
1824    input ENA;
1825    (* clkbuf_sink *)
1826    input CLKA;
1827    input WEA;
1828    input SSRA;
1829    output [15:0] DOB;
1830    output [1:0] DOPB;
1831    input [9:0] ADDRB;
1832    input [15:0] DIB;
1833    input [1:0] DIPB;
1834    input ENB;
1835    (* clkbuf_sink *)
1836    input CLKB;
1837    input WEB;
1838    input SSRB;
1839endmodule
1840
1841module RAMB16_S4_S36 (...);
1842    parameter [3:0] INIT_A = 4'h0;
1843    parameter [35:0] INIT_B = 36'h0;
1844    parameter [3:0] SRVAL_A = 4'h0;
1845    parameter [35:0] SRVAL_B = 36'h0;
1846    parameter WRITE_MODE_A = "WRITE_FIRST";
1847    parameter WRITE_MODE_B = "WRITE_FIRST";
1848    parameter SIM_COLLISION_CHECK = "ALL";
1849    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1850    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1851    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1852    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1853    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1854    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1855    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1856    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1857    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1858    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1859    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1860    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1861    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1862    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1863    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1864    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1865    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1866    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1867    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1868    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1869    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1870    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1871    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1872    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1873    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1874    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1875    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1876    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1877    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1878    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1879    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1880    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1881    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1882    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1883    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1884    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1885    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1886    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1887    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1888    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1889    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1890    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1891    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1892    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1893    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1894    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1895    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1896    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1897    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1898    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1899    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1900    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1901    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1902    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1903    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1904    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1905    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1906    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1907    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1908    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1909    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1910    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1911    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1912    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1913    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1914    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1915    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1916    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1917    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1918    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1919    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1920    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1921    output [3:0] DOA;
1922    input [11:0] ADDRA;
1923    input [3:0] DIA;
1924    input ENA;
1925    (* clkbuf_sink *)
1926    input CLKA;
1927    input WEA;
1928    input SSRA;
1929    output [31:0] DOB;
1930    output [3:0] DOPB;
1931    input [8:0] ADDRB;
1932    input [31:0] DIB;
1933    input [3:0] DIPB;
1934    input ENB;
1935    (* clkbuf_sink *)
1936    input CLKB;
1937    input WEB;
1938    input SSRB;
1939endmodule
1940
1941module RAMB16_S9_S9 (...);
1942    parameter [8:0] INIT_A = 9'h0;
1943    parameter [8:0] INIT_B = 9'h0;
1944    parameter [8:0] SRVAL_A = 9'h0;
1945    parameter [8:0] SRVAL_B = 9'h0;
1946    parameter WRITE_MODE_A = "WRITE_FIRST";
1947    parameter WRITE_MODE_B = "WRITE_FIRST";
1948    parameter SIM_COLLISION_CHECK = "ALL";
1949    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1950    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1951    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1952    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1953    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1954    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1955    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1956    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1957    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1958    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1959    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1960    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1961    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1962    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1963    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1964    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1965    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1966    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1967    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1968    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1969    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1970    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1971    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1972    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1973    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1974    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1975    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1976    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1977    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1978    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1979    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1980    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1981    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1982    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1983    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1984    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1985    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1986    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1987    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1988    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1989    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1990    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1991    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1992    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1993    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1994    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1995    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1996    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1997    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1998    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
1999    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2000    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2001    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2002    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2003    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2004    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2005    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2006    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2007    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2008    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2009    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2010    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2011    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2012    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2013    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2014    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2015    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2016    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2017    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2018    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2019    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2020    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2021    output [7:0] DOA;
2022    output [0:0] DOPA;
2023    input [10:0] ADDRA;
2024    input [7:0] DIA;
2025    input [0:0] DIPA;
2026    input ENA;
2027    (* clkbuf_sink *)
2028    input CLKA;
2029    input WEA;
2030    input SSRA;
2031    output [7:0] DOB;
2032    output [0:0] DOPB;
2033    input [10:0] ADDRB;
2034    input [7:0] DIB;
2035    input [0:0] DIPB;
2036    input ENB;
2037    (* clkbuf_sink *)
2038    input CLKB;
2039    input WEB;
2040    input SSRB;
2041endmodule
2042
2043module RAMB16_S9_S18 (...);
2044    parameter [8:0] INIT_A = 9'h0;
2045    parameter [17:0] INIT_B = 18'h0;
2046    parameter [8:0] SRVAL_A = 9'h0;
2047    parameter [17:0] SRVAL_B = 18'h0;
2048    parameter WRITE_MODE_A = "WRITE_FIRST";
2049    parameter WRITE_MODE_B = "WRITE_FIRST";
2050    parameter SIM_COLLISION_CHECK = "ALL";
2051    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2052    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2053    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2054    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2055    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2056    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2057    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2058    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2059    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2060    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2061    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2062    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2063    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2064    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2065    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2066    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2067    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2068    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2069    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2070    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2071    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2072    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2073    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2074    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2075    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2076    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2077    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2078    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2079    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2080    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2081    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2082    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2083    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2084    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2085    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2086    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2087    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2088    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2089    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2090    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2091    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2092    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2093    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2094    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2095    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2096    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2097    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2098    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2099    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2100    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2101    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2102    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2103    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2104    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2105    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2106    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2107    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2108    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2109    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2110    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2111    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2112    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2113    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2114    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2115    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2116    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2117    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2118    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2119    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2120    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2121    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2122    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2123    output [7:0] DOA;
2124    output [0:0] DOPA;
2125    input [10:0] ADDRA;
2126    input [7:0] DIA;
2127    input [0:0] DIPA;
2128    input ENA;
2129    (* clkbuf_sink *)
2130    input CLKA;
2131    input WEA;
2132    input SSRA;
2133    output [15:0] DOB;
2134    output [1:0] DOPB;
2135    input [9:0] ADDRB;
2136    input [15:0] DIB;
2137    input [1:0] DIPB;
2138    input ENB;
2139    (* clkbuf_sink *)
2140    input CLKB;
2141    input WEB;
2142    input SSRB;
2143endmodule
2144
2145module RAMB16_S9_S36 (...);
2146    parameter [8:0] INIT_A = 9'h0;
2147    parameter [35:0] INIT_B = 36'h0;
2148    parameter [8:0] SRVAL_A = 9'h0;
2149    parameter [35:0] SRVAL_B = 36'h0;
2150    parameter WRITE_MODE_A = "WRITE_FIRST";
2151    parameter WRITE_MODE_B = "WRITE_FIRST";
2152    parameter SIM_COLLISION_CHECK = "ALL";
2153    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2154    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2155    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2156    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2157    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2158    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2159    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2160    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2161    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2162    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2163    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2164    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2165    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2166    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2167    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2168    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2169    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2170    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2171    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2172    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2173    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2174    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2175    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2176    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2177    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2178    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2179    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2180    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2181    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2182    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2183    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2184    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2185    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2186    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2187    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2188    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2189    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2190    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2191    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2192    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2193    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2194    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2195    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2196    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2197    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2198    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2199    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2200    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2201    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2202    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2203    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2204    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2205    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2206    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2207    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2208    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2209    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2210    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2211    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2212    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2213    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2214    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2215    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2216    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2217    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2218    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2219    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2220    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2221    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2222    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2223    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2224    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2225    output [7:0] DOA;
2226    output [0:0] DOPA;
2227    input [10:0] ADDRA;
2228    input [7:0] DIA;
2229    input [0:0] DIPA;
2230    input ENA;
2231    (* clkbuf_sink *)
2232    input CLKA;
2233    input WEA;
2234    input SSRA;
2235    output [31:0] DOB;
2236    output [3:0] DOPB;
2237    input [8:0] ADDRB;
2238    input [31:0] DIB;
2239    input [3:0] DIPB;
2240    input ENB;
2241    (* clkbuf_sink *)
2242    input CLKB;
2243    input WEB;
2244    input SSRB;
2245endmodule
2246
2247module RAMB16_S18_S18 (...);
2248    parameter [17:0] INIT_A = 18'h0;
2249    parameter [17:0] INIT_B = 18'h0;
2250    parameter [17:0] SRVAL_A = 18'h0;
2251    parameter [17:0] SRVAL_B = 18'h0;
2252    parameter WRITE_MODE_A = "WRITE_FIRST";
2253    parameter WRITE_MODE_B = "WRITE_FIRST";
2254    parameter SIM_COLLISION_CHECK = "ALL";
2255    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2256    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2257    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2258    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2259    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2260    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2261    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2262    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2263    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2264    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2265    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2266    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2267    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2268    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2269    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2270    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2271    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2272    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2273    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2274    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2275    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2276    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2277    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2278    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2279    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2280    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2281    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2282    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2283    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2284    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2285    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2286    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2287    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2288    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2289    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2290    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2291    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2292    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2293    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2294    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2295    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2296    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2297    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2298    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2299    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2300    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2301    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2302    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2303    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2304    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2305    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2306    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2307    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2308    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2309    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2310    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2311    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2312    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2313    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2314    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2315    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2316    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2317    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2318    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2319    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2320    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2321    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2322    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2323    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2324    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2325    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2326    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2327    output [15:0] DOA;
2328    output [1:0] DOPA;
2329    input [9:0] ADDRA;
2330    input [15:0] DIA;
2331    input [1:0] DIPA;
2332    input ENA;
2333    (* clkbuf_sink *)
2334    input CLKA;
2335    input WEA;
2336    input SSRA;
2337    output [15:0] DOB;
2338    output [1:0] DOPB;
2339    input [9:0] ADDRB;
2340    input [15:0] DIB;
2341    input [1:0] DIPB;
2342    input ENB;
2343    (* clkbuf_sink *)
2344    input CLKB;
2345    input WEB;
2346    input SSRB;
2347endmodule
2348
2349module RAMB16_S18_S36 (...);
2350    parameter [17:0] INIT_A = 18'h0;
2351    parameter [35:0] INIT_B = 36'h0;
2352    parameter [17:0] SRVAL_A = 18'h0;
2353    parameter [35:0] SRVAL_B = 36'h0;
2354    parameter WRITE_MODE_A = "WRITE_FIRST";
2355    parameter WRITE_MODE_B = "WRITE_FIRST";
2356    parameter SIM_COLLISION_CHECK = "ALL";
2357    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2358    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2359    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2360    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2361    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2362    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2363    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2364    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2365    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2366    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2367    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2368    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2369    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2370    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2371    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2372    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2373    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2374    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2375    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2376    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2377    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2378    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2379    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2380    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2381    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2382    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2383    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2384    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2385    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2386    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2387    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2388    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2389    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2390    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2391    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2392    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2393    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2394    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2395    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2396    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2397    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2398    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2399    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2400    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2401    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2402    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2403    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2404    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2405    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2406    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2407    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2408    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2409    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2410    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2411    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2412    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2413    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2414    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2415    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2416    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2417    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2418    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2419    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2420    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2421    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2422    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2423    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2424    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2425    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2426    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2427    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2428    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2429    output [15:0] DOA;
2430    output [1:0] DOPA;
2431    input [9:0] ADDRA;
2432    input [15:0] DIA;
2433    input [1:0] DIPA;
2434    input ENA;
2435    (* clkbuf_sink *)
2436    input CLKA;
2437    input WEA;
2438    input SSRA;
2439    output [31:0] DOB;
2440    output [3:0] DOPB;
2441    input [8:0] ADDRB;
2442    input [31:0] DIB;
2443    input [3:0] DIPB;
2444    input ENB;
2445    (* clkbuf_sink *)
2446    input CLKB;
2447    input WEB;
2448    input SSRB;
2449endmodule
2450
2451module RAMB16_S36_S36 (...);
2452    parameter [35:0] INIT_A = 36'h0;
2453    parameter [35:0] INIT_B = 36'h0;
2454    parameter [35:0] SRVAL_A = 36'h0;
2455    parameter [35:0] SRVAL_B = 36'h0;
2456    parameter WRITE_MODE_A = "WRITE_FIRST";
2457    parameter WRITE_MODE_B = "WRITE_FIRST";
2458    parameter SIM_COLLISION_CHECK = "ALL";
2459    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2460    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2461    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2462    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2463    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2464    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2465    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2466    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2467    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2468    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2469    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2470    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2471    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2472    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2473    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2474    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2475    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2476    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2477    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2478    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2479    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2480    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2481    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2482    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2483    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2484    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2485    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2486    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2487    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2488    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2489    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2490    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2491    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2492    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2493    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2494    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2495    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2496    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2497    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2498    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2499    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2500    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2501    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2502    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2503    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2504    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2505    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2506    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2507    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2508    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2509    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2510    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2511    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2512    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2513    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2514    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2515    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2516    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2517    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2518    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2519    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2520    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2521    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2522    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2523    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2524    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2525    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2526    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2527    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2528    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2529    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2530    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
2531    output [31:0] DOA;
2532    output [3:0] DOPA;
2533    input [8:0] ADDRA;
2534    input [31:0] DIA;
2535    input [3:0] DIPA;
2536    input ENA;
2537    (* clkbuf_sink *)
2538    input CLKA;
2539    input WEA;
2540    input SSRA;
2541    output [31:0] DOB;
2542    output [3:0] DOPB;
2543    input [8:0] ADDRB;
2544    input [31:0] DIB;
2545    input [3:0] DIPB;
2546    input ENB;
2547    (* clkbuf_sink *)
2548    input CLKB;
2549    input WEB;
2550    input SSRB;
2551endmodule
2552
2553module RAMB16BWE_S18 (...);
2554    parameter [17:0] INIT = 18'h0;
2555    parameter [255:0] INITP_00 = 256'h0;
2556    parameter [255:0] INITP_01 = 256'h0;
2557    parameter [255:0] INITP_02 = 256'h0;
2558    parameter [255:0] INITP_03 = 256'h0;
2559    parameter [255:0] INITP_04 = 256'h0;
2560    parameter [255:0] INITP_05 = 256'h0;
2561    parameter [255:0] INITP_06 = 256'h0;
2562    parameter [255:0] INITP_07 = 256'h0;
2563    parameter [255:0] INIT_00 = 256'h0;
2564    parameter [255:0] INIT_01 = 256'h0;
2565    parameter [255:0] INIT_02 = 256'h0;
2566    parameter [255:0] INIT_03 = 256'h0;
2567    parameter [255:0] INIT_04 = 256'h0;
2568    parameter [255:0] INIT_05 = 256'h0;
2569    parameter [255:0] INIT_06 = 256'h0;
2570    parameter [255:0] INIT_07 = 256'h0;
2571    parameter [255:0] INIT_08 = 256'h0;
2572    parameter [255:0] INIT_09 = 256'h0;
2573    parameter [255:0] INIT_0A = 256'h0;
2574    parameter [255:0] INIT_0B = 256'h0;
2575    parameter [255:0] INIT_0C = 256'h0;
2576    parameter [255:0] INIT_0D = 256'h0;
2577    parameter [255:0] INIT_0E = 256'h0;
2578    parameter [255:0] INIT_0F = 256'h0;
2579    parameter [255:0] INIT_10 = 256'h0;
2580    parameter [255:0] INIT_11 = 256'h0;
2581    parameter [255:0] INIT_12 = 256'h0;
2582    parameter [255:0] INIT_13 = 256'h0;
2583    parameter [255:0] INIT_14 = 256'h0;
2584    parameter [255:0] INIT_15 = 256'h0;
2585    parameter [255:0] INIT_16 = 256'h0;
2586    parameter [255:0] INIT_17 = 256'h0;
2587    parameter [255:0] INIT_18 = 256'h0;
2588    parameter [255:0] INIT_19 = 256'h0;
2589    parameter [255:0] INIT_1A = 256'h0;
2590    parameter [255:0] INIT_1B = 256'h0;
2591    parameter [255:0] INIT_1C = 256'h0;
2592    parameter [255:0] INIT_1D = 256'h0;
2593    parameter [255:0] INIT_1E = 256'h0;
2594    parameter [255:0] INIT_1F = 256'h0;
2595    parameter [255:0] INIT_20 = 256'h0;
2596    parameter [255:0] INIT_21 = 256'h0;
2597    parameter [255:0] INIT_22 = 256'h0;
2598    parameter [255:0] INIT_23 = 256'h0;
2599    parameter [255:0] INIT_24 = 256'h0;
2600    parameter [255:0] INIT_25 = 256'h0;
2601    parameter [255:0] INIT_26 = 256'h0;
2602    parameter [255:0] INIT_27 = 256'h0;
2603    parameter [255:0] INIT_28 = 256'h0;
2604    parameter [255:0] INIT_29 = 256'h0;
2605    parameter [255:0] INIT_2A = 256'h0;
2606    parameter [255:0] INIT_2B = 256'h0;
2607    parameter [255:0] INIT_2C = 256'h0;
2608    parameter [255:0] INIT_2D = 256'h0;
2609    parameter [255:0] INIT_2E = 256'h0;
2610    parameter [255:0] INIT_2F = 256'h0;
2611    parameter [255:0] INIT_30 = 256'h0;
2612    parameter [255:0] INIT_31 = 256'h0;
2613    parameter [255:0] INIT_32 = 256'h0;
2614    parameter [255:0] INIT_33 = 256'h0;
2615    parameter [255:0] INIT_34 = 256'h0;
2616    parameter [255:0] INIT_35 = 256'h0;
2617    parameter [255:0] INIT_36 = 256'h0;
2618    parameter [255:0] INIT_37 = 256'h0;
2619    parameter [255:0] INIT_38 = 256'h0;
2620    parameter [255:0] INIT_39 = 256'h0;
2621    parameter [255:0] INIT_3A = 256'h0;
2622    parameter [255:0] INIT_3B = 256'h0;
2623    parameter [255:0] INIT_3C = 256'h0;
2624    parameter [255:0] INIT_3D = 256'h0;
2625    parameter [255:0] INIT_3E = 256'h0;
2626    parameter [255:0] INIT_3F = 256'h0;
2627    parameter [17:0] SRVAL = 18'h0;
2628    parameter WRITE_MODE = "WRITE_FIRST";
2629    output [15:0] DO;
2630    output [1:0] DOP;
2631    (* clkbuf_sink *)
2632    input CLK;
2633    input EN;
2634    input SSR;
2635    input [1:0] WE;
2636    input [15:0] DI;
2637    input [1:0] DIP;
2638    input [9:0] ADDR;
2639endmodule
2640
2641module RAMB16BWE_S36 (...);
2642    parameter [35:0] INIT = 36'h0;
2643    parameter [255:0] INITP_00 = 256'h0;
2644    parameter [255:0] INITP_01 = 256'h0;
2645    parameter [255:0] INITP_02 = 256'h0;
2646    parameter [255:0] INITP_03 = 256'h0;
2647    parameter [255:0] INITP_04 = 256'h0;
2648    parameter [255:0] INITP_05 = 256'h0;
2649    parameter [255:0] INITP_06 = 256'h0;
2650    parameter [255:0] INITP_07 = 256'h0;
2651    parameter [255:0] INIT_00 = 256'h0;
2652    parameter [255:0] INIT_01 = 256'h0;
2653    parameter [255:0] INIT_02 = 256'h0;
2654    parameter [255:0] INIT_03 = 256'h0;
2655    parameter [255:0] INIT_04 = 256'h0;
2656    parameter [255:0] INIT_05 = 256'h0;
2657    parameter [255:0] INIT_06 = 256'h0;
2658    parameter [255:0] INIT_07 = 256'h0;
2659    parameter [255:0] INIT_08 = 256'h0;
2660    parameter [255:0] INIT_09 = 256'h0;
2661    parameter [255:0] INIT_0A = 256'h0;
2662    parameter [255:0] INIT_0B = 256'h0;
2663    parameter [255:0] INIT_0C = 256'h0;
2664    parameter [255:0] INIT_0D = 256'h0;
2665    parameter [255:0] INIT_0E = 256'h0;
2666    parameter [255:0] INIT_0F = 256'h0;
2667    parameter [255:0] INIT_10 = 256'h0;
2668    parameter [255:0] INIT_11 = 256'h0;
2669    parameter [255:0] INIT_12 = 256'h0;
2670    parameter [255:0] INIT_13 = 256'h0;
2671    parameter [255:0] INIT_14 = 256'h0;
2672    parameter [255:0] INIT_15 = 256'h0;
2673    parameter [255:0] INIT_16 = 256'h0;
2674    parameter [255:0] INIT_17 = 256'h0;
2675    parameter [255:0] INIT_18 = 256'h0;
2676    parameter [255:0] INIT_19 = 256'h0;
2677    parameter [255:0] INIT_1A = 256'h0;
2678    parameter [255:0] INIT_1B = 256'h0;
2679    parameter [255:0] INIT_1C = 256'h0;
2680    parameter [255:0] INIT_1D = 256'h0;
2681    parameter [255:0] INIT_1E = 256'h0;
2682    parameter [255:0] INIT_1F = 256'h0;
2683    parameter [255:0] INIT_20 = 256'h0;
2684    parameter [255:0] INIT_21 = 256'h0;
2685    parameter [255:0] INIT_22 = 256'h0;
2686    parameter [255:0] INIT_23 = 256'h0;
2687    parameter [255:0] INIT_24 = 256'h0;
2688    parameter [255:0] INIT_25 = 256'h0;
2689    parameter [255:0] INIT_26 = 256'h0;
2690    parameter [255:0] INIT_27 = 256'h0;
2691    parameter [255:0] INIT_28 = 256'h0;
2692    parameter [255:0] INIT_29 = 256'h0;
2693    parameter [255:0] INIT_2A = 256'h0;
2694    parameter [255:0] INIT_2B = 256'h0;
2695    parameter [255:0] INIT_2C = 256'h0;
2696    parameter [255:0] INIT_2D = 256'h0;
2697    parameter [255:0] INIT_2E = 256'h0;
2698    parameter [255:0] INIT_2F = 256'h0;
2699    parameter [255:0] INIT_30 = 256'h0;
2700    parameter [255:0] INIT_31 = 256'h0;
2701    parameter [255:0] INIT_32 = 256'h0;
2702    parameter [255:0] INIT_33 = 256'h0;
2703    parameter [255:0] INIT_34 = 256'h0;
2704    parameter [255:0] INIT_35 = 256'h0;
2705    parameter [255:0] INIT_36 = 256'h0;
2706    parameter [255:0] INIT_37 = 256'h0;
2707    parameter [255:0] INIT_38 = 256'h0;
2708    parameter [255:0] INIT_39 = 256'h0;
2709    parameter [255:0] INIT_3A = 256'h0;
2710    parameter [255:0] INIT_3B = 256'h0;
2711    parameter [255:0] INIT_3C = 256'h0;
2712    parameter [255:0] INIT_3D = 256'h0;
2713    parameter [255:0] INIT_3E = 256'h0;
2714    parameter [255:0] INIT_3F = 256'h0;
2715    parameter [35:0] SRVAL = 36'h0;
2716    parameter WRITE_MODE = "WRITE_FIRST";
2717    output [31:0] DO;
2718    output [3:0] DOP;
2719    (* clkbuf_sink *)
2720    input CLK;
2721    input EN;
2722    input SSR;
2723    input [3:0] WE;
2724    input [31:0] DI;
2725    input [3:0] DIP;
2726    input [8:0] ADDR;
2727endmodule
2728
2729module RAMB16BWE_S18_S9 (...);
2730    parameter [255:0] INITP_00 = 256'h0;
2731    parameter [255:0] INITP_01 = 256'h0;
2732    parameter [255:0] INITP_02 = 256'h0;
2733    parameter [255:0] INITP_03 = 256'h0;
2734    parameter [255:0] INITP_04 = 256'h0;
2735    parameter [255:0] INITP_05 = 256'h0;
2736    parameter [255:0] INITP_06 = 256'h0;
2737    parameter [255:0] INITP_07 = 256'h0;
2738    parameter [255:0] INIT_00 = 256'h0;
2739    parameter [255:0] INIT_01 = 256'h0;
2740    parameter [255:0] INIT_02 = 256'h0;
2741    parameter [255:0] INIT_03 = 256'h0;
2742    parameter [255:0] INIT_04 = 256'h0;
2743    parameter [255:0] INIT_05 = 256'h0;
2744    parameter [255:0] INIT_06 = 256'h0;
2745    parameter [255:0] INIT_07 = 256'h0;
2746    parameter [255:0] INIT_08 = 256'h0;
2747    parameter [255:0] INIT_09 = 256'h0;
2748    parameter [255:0] INIT_0A = 256'h0;
2749    parameter [255:0] INIT_0B = 256'h0;
2750    parameter [255:0] INIT_0C = 256'h0;
2751    parameter [255:0] INIT_0D = 256'h0;
2752    parameter [255:0] INIT_0E = 256'h0;
2753    parameter [255:0] INIT_0F = 256'h0;
2754    parameter [255:0] INIT_10 = 256'h0;
2755    parameter [255:0] INIT_11 = 256'h0;
2756    parameter [255:0] INIT_12 = 256'h0;
2757    parameter [255:0] INIT_13 = 256'h0;
2758    parameter [255:0] INIT_14 = 256'h0;
2759    parameter [255:0] INIT_15 = 256'h0;
2760    parameter [255:0] INIT_16 = 256'h0;
2761    parameter [255:0] INIT_17 = 256'h0;
2762    parameter [255:0] INIT_18 = 256'h0;
2763    parameter [255:0] INIT_19 = 256'h0;
2764    parameter [255:0] INIT_1A = 256'h0;
2765    parameter [255:0] INIT_1B = 256'h0;
2766    parameter [255:0] INIT_1C = 256'h0;
2767    parameter [255:0] INIT_1D = 256'h0;
2768    parameter [255:0] INIT_1E = 256'h0;
2769    parameter [255:0] INIT_1F = 256'h0;
2770    parameter [255:0] INIT_20 = 256'h0;
2771    parameter [255:0] INIT_21 = 256'h0;
2772    parameter [255:0] INIT_22 = 256'h0;
2773    parameter [255:0] INIT_23 = 256'h0;
2774    parameter [255:0] INIT_24 = 256'h0;
2775    parameter [255:0] INIT_25 = 256'h0;
2776    parameter [255:0] INIT_26 = 256'h0;
2777    parameter [255:0] INIT_27 = 256'h0;
2778    parameter [255:0] INIT_28 = 256'h0;
2779    parameter [255:0] INIT_29 = 256'h0;
2780    parameter [255:0] INIT_2A = 256'h0;
2781    parameter [255:0] INIT_2B = 256'h0;
2782    parameter [255:0] INIT_2C = 256'h0;
2783    parameter [255:0] INIT_2D = 256'h0;
2784    parameter [255:0] INIT_2E = 256'h0;
2785    parameter [255:0] INIT_2F = 256'h0;
2786    parameter [255:0] INIT_30 = 256'h0;
2787    parameter [255:0] INIT_31 = 256'h0;
2788    parameter [255:0] INIT_32 = 256'h0;
2789    parameter [255:0] INIT_33 = 256'h0;
2790    parameter [255:0] INIT_34 = 256'h0;
2791    parameter [255:0] INIT_35 = 256'h0;
2792    parameter [255:0] INIT_36 = 256'h0;
2793    parameter [255:0] INIT_37 = 256'h0;
2794    parameter [255:0] INIT_38 = 256'h0;
2795    parameter [255:0] INIT_39 = 256'h0;
2796    parameter [255:0] INIT_3A = 256'h0;
2797    parameter [255:0] INIT_3B = 256'h0;
2798    parameter [255:0] INIT_3C = 256'h0;
2799    parameter [255:0] INIT_3D = 256'h0;
2800    parameter [255:0] INIT_3E = 256'h0;
2801    parameter [255:0] INIT_3F = 256'h0;
2802    parameter [17:0] INIT_A = 18'h0;
2803    parameter [8:0] INIT_B = 9'h0;
2804    parameter SIM_COLLISION_CHECK = "ALL";
2805    parameter [17:0] SRVAL_A = 18'h0;
2806    parameter [8:0] SRVAL_B = 9'h0;
2807    parameter WRITE_MODE_A = "WRITE_FIRST";
2808    parameter WRITE_MODE_B = "WRITE_FIRST";
2809    output [15:0] DOA;
2810    output [7:0] DOB;
2811    output [1:0] DOPA;
2812    output [0:0] DOPB;
2813    (* clkbuf_sink *)
2814    input CLKA;
2815    (* clkbuf_sink *)
2816    input CLKB;
2817    input ENA;
2818    input ENB;
2819    input SSRA;
2820    input SSRB;
2821    input WEB;
2822    input [1:0] WEA;
2823    input [15:0] DIA;
2824    input [7:0] DIB;
2825    input [1:0] DIPA;
2826    input [0:0] DIPB;
2827    input [9:0] ADDRA;
2828    input [10:0] ADDRB;
2829endmodule
2830
2831module RAMB16BWE_S18_S18 (...);
2832    parameter [255:0] INITP_00 = 256'h0;
2833    parameter [255:0] INITP_01 = 256'h0;
2834    parameter [255:0] INITP_02 = 256'h0;
2835    parameter [255:0] INITP_03 = 256'h0;
2836    parameter [255:0] INITP_04 = 256'h0;
2837    parameter [255:0] INITP_05 = 256'h0;
2838    parameter [255:0] INITP_06 = 256'h0;
2839    parameter [255:0] INITP_07 = 256'h0;
2840    parameter [255:0] INIT_00 = 256'h0;
2841    parameter [255:0] INIT_01 = 256'h0;
2842    parameter [255:0] INIT_02 = 256'h0;
2843    parameter [255:0] INIT_03 = 256'h0;
2844    parameter [255:0] INIT_04 = 256'h0;
2845    parameter [255:0] INIT_05 = 256'h0;
2846    parameter [255:0] INIT_06 = 256'h0;
2847    parameter [255:0] INIT_07 = 256'h0;
2848    parameter [255:0] INIT_08 = 256'h0;
2849    parameter [255:0] INIT_09 = 256'h0;
2850    parameter [255:0] INIT_0A = 256'h0;
2851    parameter [255:0] INIT_0B = 256'h0;
2852    parameter [255:0] INIT_0C = 256'h0;
2853    parameter [255:0] INIT_0D = 256'h0;
2854    parameter [255:0] INIT_0E = 256'h0;
2855    parameter [255:0] INIT_0F = 256'h0;
2856    parameter [255:0] INIT_10 = 256'h0;
2857    parameter [255:0] INIT_11 = 256'h0;
2858    parameter [255:0] INIT_12 = 256'h0;
2859    parameter [255:0] INIT_13 = 256'h0;
2860    parameter [255:0] INIT_14 = 256'h0;
2861    parameter [255:0] INIT_15 = 256'h0;
2862    parameter [255:0] INIT_16 = 256'h0;
2863    parameter [255:0] INIT_17 = 256'h0;
2864    parameter [255:0] INIT_18 = 256'h0;
2865    parameter [255:0] INIT_19 = 256'h0;
2866    parameter [255:0] INIT_1A = 256'h0;
2867    parameter [255:0] INIT_1B = 256'h0;
2868    parameter [255:0] INIT_1C = 256'h0;
2869    parameter [255:0] INIT_1D = 256'h0;
2870    parameter [255:0] INIT_1E = 256'h0;
2871    parameter [255:0] INIT_1F = 256'h0;
2872    parameter [255:0] INIT_20 = 256'h0;
2873    parameter [255:0] INIT_21 = 256'h0;
2874    parameter [255:0] INIT_22 = 256'h0;
2875    parameter [255:0] INIT_23 = 256'h0;
2876    parameter [255:0] INIT_24 = 256'h0;
2877    parameter [255:0] INIT_25 = 256'h0;
2878    parameter [255:0] INIT_26 = 256'h0;
2879    parameter [255:0] INIT_27 = 256'h0;
2880    parameter [255:0] INIT_28 = 256'h0;
2881    parameter [255:0] INIT_29 = 256'h0;
2882    parameter [255:0] INIT_2A = 256'h0;
2883    parameter [255:0] INIT_2B = 256'h0;
2884    parameter [255:0] INIT_2C = 256'h0;
2885    parameter [255:0] INIT_2D = 256'h0;
2886    parameter [255:0] INIT_2E = 256'h0;
2887    parameter [255:0] INIT_2F = 256'h0;
2888    parameter [255:0] INIT_30 = 256'h0;
2889    parameter [255:0] INIT_31 = 256'h0;
2890    parameter [255:0] INIT_32 = 256'h0;
2891    parameter [255:0] INIT_33 = 256'h0;
2892    parameter [255:0] INIT_34 = 256'h0;
2893    parameter [255:0] INIT_35 = 256'h0;
2894    parameter [255:0] INIT_36 = 256'h0;
2895    parameter [255:0] INIT_37 = 256'h0;
2896    parameter [255:0] INIT_38 = 256'h0;
2897    parameter [255:0] INIT_39 = 256'h0;
2898    parameter [255:0] INIT_3A = 256'h0;
2899    parameter [255:0] INIT_3B = 256'h0;
2900    parameter [255:0] INIT_3C = 256'h0;
2901    parameter [255:0] INIT_3D = 256'h0;
2902    parameter [255:0] INIT_3E = 256'h0;
2903    parameter [255:0] INIT_3F = 256'h0;
2904    parameter [17:0] INIT_A = 18'h0;
2905    parameter [17:0] INIT_B = 18'h0;
2906    parameter SIM_COLLISION_CHECK = "ALL";
2907    parameter [17:0] SRVAL_A = 18'h0;
2908    parameter [17:0] SRVAL_B = 18'h0;
2909    parameter WRITE_MODE_A = "WRITE_FIRST";
2910    parameter WRITE_MODE_B = "WRITE_FIRST";
2911    output [15:0] DOA;
2912    output [15:0] DOB;
2913    output [1:0] DOPA;
2914    output [1:0] DOPB;
2915    (* clkbuf_sink *)
2916    input CLKA;
2917    (* clkbuf_sink *)
2918    input CLKB;
2919    input ENA;
2920    input ENB;
2921    input SSRA;
2922    input SSRB;
2923    input [1:0] WEB;
2924    input [1:0] WEA;
2925    input [15:0] DIA;
2926    input [15:0] DIB;
2927    input [1:0] DIPA;
2928    input [1:0] DIPB;
2929    input [9:0] ADDRA;
2930    input [9:0] ADDRB;
2931endmodule
2932
2933module RAMB16BWE_S36_S9 (...);
2934    parameter [255:0] INITP_00 = 256'h0;
2935    parameter [255:0] INITP_01 = 256'h0;
2936    parameter [255:0] INITP_02 = 256'h0;
2937    parameter [255:0] INITP_03 = 256'h0;
2938    parameter [255:0] INITP_04 = 256'h0;
2939    parameter [255:0] INITP_05 = 256'h0;
2940    parameter [255:0] INITP_06 = 256'h0;
2941    parameter [255:0] INITP_07 = 256'h0;
2942    parameter [255:0] INIT_00 = 256'h0;
2943    parameter [255:0] INIT_01 = 256'h0;
2944    parameter [255:0] INIT_02 = 256'h0;
2945    parameter [255:0] INIT_03 = 256'h0;
2946    parameter [255:0] INIT_04 = 256'h0;
2947    parameter [255:0] INIT_05 = 256'h0;
2948    parameter [255:0] INIT_06 = 256'h0;
2949    parameter [255:0] INIT_07 = 256'h0;
2950    parameter [255:0] INIT_08 = 256'h0;
2951    parameter [255:0] INIT_09 = 256'h0;
2952    parameter [255:0] INIT_0A = 256'h0;
2953    parameter [255:0] INIT_0B = 256'h0;
2954    parameter [255:0] INIT_0C = 256'h0;
2955    parameter [255:0] INIT_0D = 256'h0;
2956    parameter [255:0] INIT_0E = 256'h0;
2957    parameter [255:0] INIT_0F = 256'h0;
2958    parameter [255:0] INIT_10 = 256'h0;
2959    parameter [255:0] INIT_11 = 256'h0;
2960    parameter [255:0] INIT_12 = 256'h0;
2961    parameter [255:0] INIT_13 = 256'h0;
2962    parameter [255:0] INIT_14 = 256'h0;
2963    parameter [255:0] INIT_15 = 256'h0;
2964    parameter [255:0] INIT_16 = 256'h0;
2965    parameter [255:0] INIT_17 = 256'h0;
2966    parameter [255:0] INIT_18 = 256'h0;
2967    parameter [255:0] INIT_19 = 256'h0;
2968    parameter [255:0] INIT_1A = 256'h0;
2969    parameter [255:0] INIT_1B = 256'h0;
2970    parameter [255:0] INIT_1C = 256'h0;
2971    parameter [255:0] INIT_1D = 256'h0;
2972    parameter [255:0] INIT_1E = 256'h0;
2973    parameter [255:0] INIT_1F = 256'h0;
2974    parameter [255:0] INIT_20 = 256'h0;
2975    parameter [255:0] INIT_21 = 256'h0;
2976    parameter [255:0] INIT_22 = 256'h0;
2977    parameter [255:0] INIT_23 = 256'h0;
2978    parameter [255:0] INIT_24 = 256'h0;
2979    parameter [255:0] INIT_25 = 256'h0;
2980    parameter [255:0] INIT_26 = 256'h0;
2981    parameter [255:0] INIT_27 = 256'h0;
2982    parameter [255:0] INIT_28 = 256'h0;
2983    parameter [255:0] INIT_29 = 256'h0;
2984    parameter [255:0] INIT_2A = 256'h0;
2985    parameter [255:0] INIT_2B = 256'h0;
2986    parameter [255:0] INIT_2C = 256'h0;
2987    parameter [255:0] INIT_2D = 256'h0;
2988    parameter [255:0] INIT_2E = 256'h0;
2989    parameter [255:0] INIT_2F = 256'h0;
2990    parameter [255:0] INIT_30 = 256'h0;
2991    parameter [255:0] INIT_31 = 256'h0;
2992    parameter [255:0] INIT_32 = 256'h0;
2993    parameter [255:0] INIT_33 = 256'h0;
2994    parameter [255:0] INIT_34 = 256'h0;
2995    parameter [255:0] INIT_35 = 256'h0;
2996    parameter [255:0] INIT_36 = 256'h0;
2997    parameter [255:0] INIT_37 = 256'h0;
2998    parameter [255:0] INIT_38 = 256'h0;
2999    parameter [255:0] INIT_39 = 256'h0;
3000    parameter [255:0] INIT_3A = 256'h0;
3001    parameter [255:0] INIT_3B = 256'h0;
3002    parameter [255:0] INIT_3C = 256'h0;
3003    parameter [255:0] INIT_3D = 256'h0;
3004    parameter [255:0] INIT_3E = 256'h0;
3005    parameter [255:0] INIT_3F = 256'h0;
3006    parameter [35:0] INIT_A = 36'h0;
3007    parameter [8:0] INIT_B = 9'h0;
3008    parameter SIM_COLLISION_CHECK = "ALL";
3009    parameter [35:0] SRVAL_A = 36'h0;
3010    parameter [8:0] SRVAL_B = 9'h0;
3011    parameter WRITE_MODE_A = "WRITE_FIRST";
3012    parameter WRITE_MODE_B = "WRITE_FIRST";
3013    output [31:0] DOA;
3014    output [3:0] DOPA;
3015    output [7:0] DOB;
3016    output [0:0] DOPB;
3017    (* clkbuf_sink *)
3018    input CLKA;
3019    (* clkbuf_sink *)
3020    input CLKB;
3021    input ENA;
3022    input ENB;
3023    input SSRA;
3024    input SSRB;
3025    input [3:0] WEA;
3026    input WEB;
3027    input [31:0] DIA;
3028    input [3:0] DIPA;
3029    input [7:0] DIB;
3030    input [0:0] DIPB;
3031    input [8:0] ADDRA;
3032    input [10:0] ADDRB;
3033endmodule
3034
3035module RAMB16BWE_S36_S18 (...);
3036    parameter [255:0] INITP_00 = 256'h0;
3037    parameter [255:0] INITP_01 = 256'h0;
3038    parameter [255:0] INITP_02 = 256'h0;
3039    parameter [255:0] INITP_03 = 256'h0;
3040    parameter [255:0] INITP_04 = 256'h0;
3041    parameter [255:0] INITP_05 = 256'h0;
3042    parameter [255:0] INITP_06 = 256'h0;
3043    parameter [255:0] INITP_07 = 256'h0;
3044    parameter [255:0] INIT_00 = 256'h0;
3045    parameter [255:0] INIT_01 = 256'h0;
3046    parameter [255:0] INIT_02 = 256'h0;
3047    parameter [255:0] INIT_03 = 256'h0;
3048    parameter [255:0] INIT_04 = 256'h0;
3049    parameter [255:0] INIT_05 = 256'h0;
3050    parameter [255:0] INIT_06 = 256'h0;
3051    parameter [255:0] INIT_07 = 256'h0;
3052    parameter [255:0] INIT_08 = 256'h0;
3053    parameter [255:0] INIT_09 = 256'h0;
3054    parameter [255:0] INIT_0A = 256'h0;
3055    parameter [255:0] INIT_0B = 256'h0;
3056    parameter [255:0] INIT_0C = 256'h0;
3057    parameter [255:0] INIT_0D = 256'h0;
3058    parameter [255:0] INIT_0E = 256'h0;
3059    parameter [255:0] INIT_0F = 256'h0;
3060    parameter [255:0] INIT_10 = 256'h0;
3061    parameter [255:0] INIT_11 = 256'h0;
3062    parameter [255:0] INIT_12 = 256'h0;
3063    parameter [255:0] INIT_13 = 256'h0;
3064    parameter [255:0] INIT_14 = 256'h0;
3065    parameter [255:0] INIT_15 = 256'h0;
3066    parameter [255:0] INIT_16 = 256'h0;
3067    parameter [255:0] INIT_17 = 256'h0;
3068    parameter [255:0] INIT_18 = 256'h0;
3069    parameter [255:0] INIT_19 = 256'h0;
3070    parameter [255:0] INIT_1A = 256'h0;
3071    parameter [255:0] INIT_1B = 256'h0;
3072    parameter [255:0] INIT_1C = 256'h0;
3073    parameter [255:0] INIT_1D = 256'h0;
3074    parameter [255:0] INIT_1E = 256'h0;
3075    parameter [255:0] INIT_1F = 256'h0;
3076    parameter [255:0] INIT_20 = 256'h0;
3077    parameter [255:0] INIT_21 = 256'h0;
3078    parameter [255:0] INIT_22 = 256'h0;
3079    parameter [255:0] INIT_23 = 256'h0;
3080    parameter [255:0] INIT_24 = 256'h0;
3081    parameter [255:0] INIT_25 = 256'h0;
3082    parameter [255:0] INIT_26 = 256'h0;
3083    parameter [255:0] INIT_27 = 256'h0;
3084    parameter [255:0] INIT_28 = 256'h0;
3085    parameter [255:0] INIT_29 = 256'h0;
3086    parameter [255:0] INIT_2A = 256'h0;
3087    parameter [255:0] INIT_2B = 256'h0;
3088    parameter [255:0] INIT_2C = 256'h0;
3089    parameter [255:0] INIT_2D = 256'h0;
3090    parameter [255:0] INIT_2E = 256'h0;
3091    parameter [255:0] INIT_2F = 256'h0;
3092    parameter [255:0] INIT_30 = 256'h0;
3093    parameter [255:0] INIT_31 = 256'h0;
3094    parameter [255:0] INIT_32 = 256'h0;
3095    parameter [255:0] INIT_33 = 256'h0;
3096    parameter [255:0] INIT_34 = 256'h0;
3097    parameter [255:0] INIT_35 = 256'h0;
3098    parameter [255:0] INIT_36 = 256'h0;
3099    parameter [255:0] INIT_37 = 256'h0;
3100    parameter [255:0] INIT_38 = 256'h0;
3101    parameter [255:0] INIT_39 = 256'h0;
3102    parameter [255:0] INIT_3A = 256'h0;
3103    parameter [255:0] INIT_3B = 256'h0;
3104    parameter [255:0] INIT_3C = 256'h0;
3105    parameter [255:0] INIT_3D = 256'h0;
3106    parameter [255:0] INIT_3E = 256'h0;
3107    parameter [255:0] INIT_3F = 256'h0;
3108    parameter [35:0] INIT_A = 36'h0;
3109    parameter [17:0] INIT_B = 18'h0;
3110    parameter SIM_COLLISION_CHECK = "ALL";
3111    parameter [35:0] SRVAL_A = 36'h0;
3112    parameter [17:0] SRVAL_B = 18'h0;
3113    parameter WRITE_MODE_A = "WRITE_FIRST";
3114    parameter WRITE_MODE_B = "WRITE_FIRST";
3115    output [31:0] DOA;
3116    output [3:0] DOPA;
3117    output [15:0] DOB;
3118    output [1:0] DOPB;
3119    (* clkbuf_sink *)
3120    input CLKA;
3121    (* clkbuf_sink *)
3122    input CLKB;
3123    input ENA;
3124    input ENB;
3125    input SSRA;
3126    input SSRB;
3127    input [3:0] WEA;
3128    input [1:0] WEB;
3129    input [31:0] DIA;
3130    input [3:0] DIPA;
3131    input [15:0] DIB;
3132    input [1:0] DIPB;
3133    input [8:0] ADDRA;
3134    input [9:0] ADDRB;
3135endmodule
3136
3137module RAMB16BWE_S36_S36 (...);
3138    parameter [255:0] INITP_00 = 256'h0;
3139    parameter [255:0] INITP_01 = 256'h0;
3140    parameter [255:0] INITP_02 = 256'h0;
3141    parameter [255:0] INITP_03 = 256'h0;
3142    parameter [255:0] INITP_04 = 256'h0;
3143    parameter [255:0] INITP_05 = 256'h0;
3144    parameter [255:0] INITP_06 = 256'h0;
3145    parameter [255:0] INITP_07 = 256'h0;
3146    parameter [255:0] INIT_00 = 256'h0;
3147    parameter [255:0] INIT_01 = 256'h0;
3148    parameter [255:0] INIT_02 = 256'h0;
3149    parameter [255:0] INIT_03 = 256'h0;
3150    parameter [255:0] INIT_04 = 256'h0;
3151    parameter [255:0] INIT_05 = 256'h0;
3152    parameter [255:0] INIT_06 = 256'h0;
3153    parameter [255:0] INIT_07 = 256'h0;
3154    parameter [255:0] INIT_08 = 256'h0;
3155    parameter [255:0] INIT_09 = 256'h0;
3156    parameter [255:0] INIT_0A = 256'h0;
3157    parameter [255:0] INIT_0B = 256'h0;
3158    parameter [255:0] INIT_0C = 256'h0;
3159    parameter [255:0] INIT_0D = 256'h0;
3160    parameter [255:0] INIT_0E = 256'h0;
3161    parameter [255:0] INIT_0F = 256'h0;
3162    parameter [255:0] INIT_10 = 256'h0;
3163    parameter [255:0] INIT_11 = 256'h0;
3164    parameter [255:0] INIT_12 = 256'h0;
3165    parameter [255:0] INIT_13 = 256'h0;
3166    parameter [255:0] INIT_14 = 256'h0;
3167    parameter [255:0] INIT_15 = 256'h0;
3168    parameter [255:0] INIT_16 = 256'h0;
3169    parameter [255:0] INIT_17 = 256'h0;
3170    parameter [255:0] INIT_18 = 256'h0;
3171    parameter [255:0] INIT_19 = 256'h0;
3172    parameter [255:0] INIT_1A = 256'h0;
3173    parameter [255:0] INIT_1B = 256'h0;
3174    parameter [255:0] INIT_1C = 256'h0;
3175    parameter [255:0] INIT_1D = 256'h0;
3176    parameter [255:0] INIT_1E = 256'h0;
3177    parameter [255:0] INIT_1F = 256'h0;
3178    parameter [255:0] INIT_20 = 256'h0;
3179    parameter [255:0] INIT_21 = 256'h0;
3180    parameter [255:0] INIT_22 = 256'h0;
3181    parameter [255:0] INIT_23 = 256'h0;
3182    parameter [255:0] INIT_24 = 256'h0;
3183    parameter [255:0] INIT_25 = 256'h0;
3184    parameter [255:0] INIT_26 = 256'h0;
3185    parameter [255:0] INIT_27 = 256'h0;
3186    parameter [255:0] INIT_28 = 256'h0;
3187    parameter [255:0] INIT_29 = 256'h0;
3188    parameter [255:0] INIT_2A = 256'h0;
3189    parameter [255:0] INIT_2B = 256'h0;
3190    parameter [255:0] INIT_2C = 256'h0;
3191    parameter [255:0] INIT_2D = 256'h0;
3192    parameter [255:0] INIT_2E = 256'h0;
3193    parameter [255:0] INIT_2F = 256'h0;
3194    parameter [255:0] INIT_30 = 256'h0;
3195    parameter [255:0] INIT_31 = 256'h0;
3196    parameter [255:0] INIT_32 = 256'h0;
3197    parameter [255:0] INIT_33 = 256'h0;
3198    parameter [255:0] INIT_34 = 256'h0;
3199    parameter [255:0] INIT_35 = 256'h0;
3200    parameter [255:0] INIT_36 = 256'h0;
3201    parameter [255:0] INIT_37 = 256'h0;
3202    parameter [255:0] INIT_38 = 256'h0;
3203    parameter [255:0] INIT_39 = 256'h0;
3204    parameter [255:0] INIT_3A = 256'h0;
3205    parameter [255:0] INIT_3B = 256'h0;
3206    parameter [255:0] INIT_3C = 256'h0;
3207    parameter [255:0] INIT_3D = 256'h0;
3208    parameter [255:0] INIT_3E = 256'h0;
3209    parameter [255:0] INIT_3F = 256'h0;
3210    parameter [35:0] INIT_A = 36'h0;
3211    parameter [35:0] INIT_B = 36'h0;
3212    parameter SIM_COLLISION_CHECK = "ALL";
3213    parameter [35:0] SRVAL_A = 36'h0;
3214    parameter [35:0] SRVAL_B = 36'h0;
3215    parameter WRITE_MODE_A = "WRITE_FIRST";
3216    parameter WRITE_MODE_B = "WRITE_FIRST";
3217    output [31:0] DOA;
3218    output [3:0] DOPA;
3219    output [31:0] DOB;
3220    output [3:0] DOPB;
3221    (* clkbuf_sink *)
3222    input CLKA;
3223    (* clkbuf_sink *)
3224    input CLKB;
3225    input ENA;
3226    input ENB;
3227    input SSRA;
3228    input SSRB;
3229    input [3:0] WEA;
3230    input [3:0] WEB;
3231    input [31:0] DIA;
3232    input [3:0] DIPA;
3233    input [31:0] DIB;
3234    input [3:0] DIPB;
3235    input [8:0] ADDRA;
3236    input [8:0] ADDRB;
3237endmodule
3238
3239module RAMB16BWER (...);
3240    parameter integer DATA_WIDTH_A = 0;
3241    parameter integer DATA_WIDTH_B = 0;
3242    parameter integer DOA_REG = 0;
3243    parameter integer DOB_REG = 0;
3244    parameter EN_RSTRAM_A = "TRUE";
3245    parameter EN_RSTRAM_B = "TRUE";
3246    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3247    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3248    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3249    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3250    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3251    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3252    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3253    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3254    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3255    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3256    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3257    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3258    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3259    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3260    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3261    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3262    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3263    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3264    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3265    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3266    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3267    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3268    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3269    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3270    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3271    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3272    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3273    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3274    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3275    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3276    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3277    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3278    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3279    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3280    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3281    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3282    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3283    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3284    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3285    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3286    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3287    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3288    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3289    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3290    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3291    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3292    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3293    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3294    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3295    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3296    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3297    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3298    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3299    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3300    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3301    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3302    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3303    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3304    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3305    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3306    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3307    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3308    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3309    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3310    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3311    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3312    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3313    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3314    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3315    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3316    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3317    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3318    parameter [35:0] INIT_A = 36'h0;
3319    parameter [35:0] INIT_B = 36'h0;
3320    parameter INIT_FILE = "NONE";
3321    parameter RSTTYPE = "SYNC";
3322    parameter RST_PRIORITY_A = "CE";
3323    parameter RST_PRIORITY_B = "CE";
3324    parameter SETUP_ALL = 1000;
3325    parameter SETUP_READ_FIRST = 3000;
3326    parameter SIM_DEVICE = "SPARTAN3ADSP";
3327    parameter SIM_COLLISION_CHECK = "ALL";
3328    parameter [35:0] SRVAL_A = 36'h0;
3329    parameter [35:0] SRVAL_B = 36'h0;
3330    parameter WRITE_MODE_A = "WRITE_FIRST";
3331    parameter WRITE_MODE_B = "WRITE_FIRST";
3332    output [31:0] DOA;
3333    output [31:0] DOB;
3334    output [3:0] DOPA;
3335    output [3:0] DOPB;
3336    input [13:0] ADDRA;
3337    input [13:0] ADDRB;
3338    (* clkbuf_sink *)
3339    input CLKA;
3340    (* clkbuf_sink *)
3341    input CLKB;
3342    input [31:0] DIA;
3343    input [31:0] DIB;
3344    input [3:0] DIPA;
3345    input [3:0] DIPB;
3346    input ENA;
3347    input ENB;
3348    input REGCEA;
3349    input REGCEB;
3350    input RSTA;
3351    input RSTB;
3352    input [3:0] WEA;
3353    input [3:0] WEB;
3354endmodule
3355
3356module RAMB8BWER (...);
3357    parameter integer DATA_WIDTH_A = 0;
3358    parameter integer DATA_WIDTH_B = 0;
3359    parameter integer DOA_REG = 0;
3360    parameter integer DOB_REG = 0;
3361    parameter EN_RSTRAM_A = "TRUE";
3362    parameter EN_RSTRAM_B = "TRUE";
3363    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3364    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3365    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3366    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3367    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3368    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3369    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3370    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3371    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3372    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3373    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3374    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3375    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3376    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3377    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3378    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3379    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3380    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3381    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3382    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3383    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3384    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3385    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3386    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3387    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3388    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3389    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3390    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3391    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3392    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3393    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3394    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3395    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3396    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3397    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3398    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3399    parameter [17:0] INIT_A = 18'h0;
3400    parameter [17:0] INIT_B = 18'h0;
3401    parameter INIT_FILE = "NONE";
3402    parameter RAM_MODE = "TDP";
3403    parameter RSTTYPE = "SYNC";
3404    parameter RST_PRIORITY_A = "CE";
3405    parameter RST_PRIORITY_B = "CE";
3406    parameter SETUP_ALL = 1000;
3407    parameter SETUP_READ_FIRST = 3000;
3408    parameter SIM_COLLISION_CHECK = "ALL";
3409    parameter [17:0] SRVAL_A = 18'h0;
3410    parameter [17:0] SRVAL_B = 18'h0;
3411    parameter WRITE_MODE_A = "WRITE_FIRST";
3412    parameter WRITE_MODE_B = "WRITE_FIRST";
3413    output [15:0] DOADO;
3414    output [15:0] DOBDO;
3415    output [1:0] DOPADOP;
3416    output [1:0] DOPBDOP;
3417    input [12:0] ADDRAWRADDR;
3418    input [12:0] ADDRBRDADDR;
3419    (* clkbuf_sink *)
3420    input CLKAWRCLK;
3421    (* clkbuf_sink *)
3422    input CLKBRDCLK;
3423    input [15:0] DIADI;
3424    input [15:0] DIBDI;
3425    input [1:0] DIPADIP;
3426    input [1:0] DIPBDIP;
3427    input ENAWREN;
3428    input ENBRDEN;
3429    input REGCEA;
3430    input REGCEBREGCE;
3431    input RSTA;
3432    input RSTBRST;
3433    input [1:0] WEAWEL;
3434    input [1:0] WEBWEU;
3435endmodule
3436
3437module FIFO16 (...);
3438    parameter [11:0] ALMOST_FULL_OFFSET = 12'h080;
3439    parameter [11:0] ALMOST_EMPTY_OFFSET = 12'h080;
3440    parameter integer DATA_WIDTH = 36;
3441    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
3442    output ALMOSTEMPTY;
3443    output ALMOSTFULL;
3444    output [31:0] DO;
3445    output [3:0] DOP;
3446    output EMPTY;
3447    output FULL;
3448    output [11:0] RDCOUNT;
3449    output RDERR;
3450    output [11:0] WRCOUNT;
3451    output WRERR;
3452    input [31:0] DI;
3453    input [3:0] DIP;
3454    (* clkbuf_sink *)
3455    input RDCLK;
3456    input RDEN;
3457    input RST;
3458    (* clkbuf_sink *)
3459    input WRCLK;
3460    input WREN;
3461endmodule
3462
3463module RAMB16 (...);
3464    parameter integer DOA_REG = 0;
3465    parameter integer DOB_REG = 0;
3466    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3467    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3468    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3469    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3470    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3471    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3472    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3473    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3474    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3475    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3476    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3477    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3478    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3479    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3480    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3481    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3482    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3483    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3484    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3485    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3486    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3487    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3488    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3489    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3490    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3491    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3492    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3493    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3494    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3495    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3496    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3497    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3498    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3499    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3500    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3501    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3502    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3503    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3504    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3505    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3506    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3507    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3508    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3509    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3510    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3511    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3512    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3513    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3514    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3515    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3516    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3517    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3518    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3519    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3520    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3521    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3522    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3523    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3524    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3525    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3526    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3527    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3528    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3529    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3530    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3531    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3532    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3533    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3534    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3535    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3536    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3537    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3538    parameter [35:0] INIT_A = 36'h0;
3539    parameter [35:0] INIT_B = 36'h0;
3540    parameter INIT_FILE = "NONE";
3541    parameter INVERT_CLK_DOA_REG = "FALSE";
3542    parameter INVERT_CLK_DOB_REG = "FALSE";
3543    parameter RAM_EXTENSION_A = "NONE";
3544    parameter RAM_EXTENSION_B = "NONE";
3545    parameter integer READ_WIDTH_A = 0;
3546    parameter integer READ_WIDTH_B = 0;
3547    parameter SIM_COLLISION_CHECK = "ALL";
3548    parameter [35:0] SRVAL_A = 36'h0;
3549    parameter [35:0] SRVAL_B = 36'h0;
3550    parameter WRITE_MODE_A = "WRITE_FIRST";
3551    parameter WRITE_MODE_B = "WRITE_FIRST";
3552    parameter integer WRITE_WIDTH_A = 0;
3553    parameter integer WRITE_WIDTH_B = 0;
3554    output CASCADEOUTA;
3555    output CASCADEOUTB;
3556    output [31:0] DOA;
3557    output [31:0] DOB;
3558    output [3:0] DOPA;
3559    output [3:0] DOPB;
3560    input ENA;
3561    (* clkbuf_sink *)
3562    input CLKA;
3563    input SSRA;
3564    input CASCADEINA;
3565    input REGCEA;
3566    input ENB;
3567    (* clkbuf_sink *)
3568    input CLKB;
3569    input SSRB;
3570    input CASCADEINB;
3571    input REGCEB;
3572    input [14:0] ADDRA;
3573    input [14:0] ADDRB;
3574    input [31:0] DIA;
3575    input [31:0] DIB;
3576    input [3:0] DIPA;
3577    input [3:0] DIPB;
3578    input [3:0] WEA;
3579    input [3:0] WEB;
3580endmodule
3581
3582module RAMB32_S64_ECC (...);
3583    parameter DO_REG = 0;
3584    parameter SIM_COLLISION_CHECK = "ALL";
3585    output [1:0] STATUS;
3586    output [63:0] DO;
3587    (* clkbuf_sink *)
3588    input RDCLK;
3589    input RDEN;
3590    input SSR;
3591    (* clkbuf_sink *)
3592    input WRCLK;
3593    input WREN;
3594    input [63:0] DI;
3595    input [8:0] RDADDR;
3596    input [8:0] WRADDR;
3597endmodule
3598
3599module FIFO18 (...);
3600    parameter [11:0] ALMOST_EMPTY_OFFSET = 12'h080;
3601    parameter [11:0] ALMOST_FULL_OFFSET = 12'h080;
3602    parameter integer DATA_WIDTH = 4;
3603    parameter integer DO_REG = 1;
3604    parameter EN_SYN = "FALSE";
3605    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
3606    parameter SIM_MODE = "SAFE";
3607    output ALMOSTEMPTY;
3608    output ALMOSTFULL;
3609    output [15:0] DO;
3610    output [1:0] DOP;
3611    output EMPTY;
3612    output FULL;
3613    output [11:0] RDCOUNT;
3614    output RDERR;
3615    output [11:0] WRCOUNT;
3616    output WRERR;
3617    input [15:0] DI;
3618    input [1:0] DIP;
3619    (* clkbuf_sink *)
3620    input RDCLK;
3621    input RDEN;
3622    input RST;
3623    (* clkbuf_sink *)
3624    input WRCLK;
3625    input WREN;
3626endmodule
3627
3628module FIFO18_36 (...);
3629    parameter [8:0] ALMOST_EMPTY_OFFSET = 9'h080;
3630    parameter [8:0] ALMOST_FULL_OFFSET = 9'h080;
3631    parameter integer DO_REG = 1;
3632    parameter EN_SYN = "FALSE";
3633    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
3634    parameter SIM_MODE = "SAFE";
3635    output ALMOSTEMPTY;
3636    output ALMOSTFULL;
3637    output [31:0] DO;
3638    output [3:0] DOP;
3639    output EMPTY;
3640    output FULL;
3641    output [8:0] RDCOUNT;
3642    output RDERR;
3643    output [8:0] WRCOUNT;
3644    output WRERR;
3645    input [31:0] DI;
3646    input [3:0] DIP;
3647    (* clkbuf_sink *)
3648    input RDCLK;
3649    input RDEN;
3650    input RST;
3651    (* clkbuf_sink *)
3652    input WRCLK;
3653    input WREN;
3654endmodule
3655
3656module FIFO36 (...);
3657    parameter [12:0] ALMOST_EMPTY_OFFSET = 13'h080;
3658    parameter [12:0] ALMOST_FULL_OFFSET = 13'h080;
3659    parameter integer DATA_WIDTH = 4;
3660    parameter integer DO_REG = 1;
3661    parameter EN_SYN = "FALSE";
3662    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
3663    parameter SIM_MODE = "SAFE";
3664    output ALMOSTEMPTY;
3665    output ALMOSTFULL;
3666    output [31:0] DO;
3667    output [3:0] DOP;
3668    output EMPTY;
3669    output FULL;
3670    output [12:0] RDCOUNT;
3671    output RDERR;
3672    output [12:0] WRCOUNT;
3673    output WRERR;
3674    input [31:0] DI;
3675    input [3:0] DIP;
3676    (* clkbuf_sink *)
3677    input RDCLK;
3678    input RDEN;
3679    input RST;
3680    (* clkbuf_sink *)
3681    input WRCLK;
3682    input WREN;
3683endmodule
3684
3685module FIFO36_72 (...);
3686    parameter [8:0] ALMOST_EMPTY_OFFSET = 9'h080;
3687    parameter [8:0] ALMOST_FULL_OFFSET = 9'h080;
3688    parameter integer DO_REG = 1;
3689    parameter EN_ECC_WRITE = "FALSE";
3690    parameter EN_ECC_READ = "FALSE";
3691    parameter EN_SYN = "FALSE";
3692    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
3693    parameter SIM_MODE = "SAFE";
3694    output ALMOSTEMPTY;
3695    output ALMOSTFULL;
3696    output DBITERR;
3697    output [63:0] DO;
3698    output [7:0] DOP;
3699    output [7:0] ECCPARITY;
3700    output EMPTY;
3701    output FULL;
3702    output [8:0] RDCOUNT;
3703    output RDERR;
3704    output SBITERR;
3705    output [8:0] WRCOUNT;
3706    output WRERR;
3707    input [63:0] DI;
3708    input [7:0] DIP;
3709    (* clkbuf_sink *)
3710    input RDCLK;
3711    input RDEN;
3712    input RST;
3713    (* clkbuf_sink *)
3714    input WRCLK;
3715    input WREN;
3716endmodule
3717
3718module RAMB18 (...);
3719    parameter integer DOA_REG = 0;
3720    parameter integer DOB_REG = 0;
3721    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3722    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3723    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3724    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3725    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3726    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3727    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3728    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3729    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3730    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3731    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3732    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3733    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3734    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3735    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3736    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3737    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3738    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3739    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3740    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3741    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3742    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3743    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3744    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3745    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3746    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3747    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3748    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3749    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3750    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3751    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3752    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3753    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3754    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3755    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3756    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3757    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3758    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3759    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3760    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3761    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3762    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3763    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3764    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3765    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3766    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3767    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3768    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3769    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3770    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3771    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3772    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3773    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3774    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3775    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3776    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3777    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3778    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3779    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3780    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3781    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3782    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3783    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3784    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3785    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3786    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3787    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3788    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3789    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3790    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3791    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3792    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3793    parameter [17:0] INIT_A = 18'h0;
3794    parameter [17:0] INIT_B = 18'h0;
3795    parameter INIT_FILE = "NONE";
3796    parameter integer READ_WIDTH_A = 0;
3797    parameter integer READ_WIDTH_B = 0;
3798    parameter SIM_COLLISION_CHECK = "ALL";
3799    parameter SIM_MODE = "SAFE";
3800    parameter [17:0] SRVAL_A = 18'h0;
3801    parameter [17:0] SRVAL_B = 18'h0;
3802    parameter WRITE_MODE_A = "WRITE_FIRST";
3803    parameter WRITE_MODE_B = "WRITE_FIRST";
3804    parameter integer WRITE_WIDTH_A = 0;
3805    parameter integer WRITE_WIDTH_B = 0;
3806    output [15:0] DOA;
3807    output [15:0] DOB;
3808    output [1:0] DOPA;
3809    output [1:0] DOPB;
3810    input ENA;
3811    (* clkbuf_sink *)
3812    input CLKA;
3813    input SSRA;
3814    input REGCEA;
3815    input ENB;
3816    (* clkbuf_sink *)
3817    input CLKB;
3818    input SSRB;
3819    input REGCEB;
3820    input [13:0] ADDRA;
3821    input [13:0] ADDRB;
3822    input [15:0] DIA;
3823    input [15:0] DIB;
3824    input [1:0] DIPA;
3825    input [1:0] DIPB;
3826    input [1:0] WEA;
3827    input [1:0] WEB;
3828endmodule
3829
3830module RAMB36 (...);
3831    parameter integer DOA_REG = 0;
3832    parameter integer DOB_REG = 0;
3833    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3834    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3835    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3836    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3837    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3838    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3839    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3840    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3841    parameter [255:0] INITP_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3842    parameter [255:0] INITP_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3843    parameter [255:0] INITP_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3844    parameter [255:0] INITP_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3845    parameter [255:0] INITP_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3846    parameter [255:0] INITP_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3847    parameter [255:0] INITP_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3848    parameter [255:0] INITP_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3849    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3850    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3851    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3852    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3853    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3854    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3855    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3856    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3857    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3858    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3859    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3860    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3861    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3862    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3863    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3864    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3865    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3866    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3867    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3868    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3869    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3870    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3871    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3872    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3873    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3874    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3875    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3876    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3877    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3878    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3879    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3880    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3881    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3882    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3883    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3884    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3885    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3886    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3887    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3888    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3889    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3890    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3891    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3892    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3893    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3894    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3895    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3896    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3897    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3898    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3899    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3900    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3901    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3902    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3903    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3904    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3905    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3906    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3907    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3908    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3909    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3910    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3911    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3912    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3913    parameter [255:0] INIT_40 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3914    parameter [255:0] INIT_41 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3915    parameter [255:0] INIT_42 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3916    parameter [255:0] INIT_43 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3917    parameter [255:0] INIT_44 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3918    parameter [255:0] INIT_45 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3919    parameter [255:0] INIT_46 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3920    parameter [255:0] INIT_47 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3921    parameter [255:0] INIT_48 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3922    parameter [255:0] INIT_49 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3923    parameter [255:0] INIT_4A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3924    parameter [255:0] INIT_4B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3925    parameter [255:0] INIT_4C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3926    parameter [255:0] INIT_4D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3927    parameter [255:0] INIT_4E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3928    parameter [255:0] INIT_4F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3929    parameter [255:0] INIT_50 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3930    parameter [255:0] INIT_51 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3931    parameter [255:0] INIT_52 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3932    parameter [255:0] INIT_53 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3933    parameter [255:0] INIT_54 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3934    parameter [255:0] INIT_55 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3935    parameter [255:0] INIT_56 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3936    parameter [255:0] INIT_57 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3937    parameter [255:0] INIT_58 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3938    parameter [255:0] INIT_59 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3939    parameter [255:0] INIT_5A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3940    parameter [255:0] INIT_5B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3941    parameter [255:0] INIT_5C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3942    parameter [255:0] INIT_5D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3943    parameter [255:0] INIT_5E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3944    parameter [255:0] INIT_5F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3945    parameter [255:0] INIT_60 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3946    parameter [255:0] INIT_61 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3947    parameter [255:0] INIT_62 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3948    parameter [255:0] INIT_63 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3949    parameter [255:0] INIT_64 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3950    parameter [255:0] INIT_65 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3951    parameter [255:0] INIT_66 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3952    parameter [255:0] INIT_67 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3953    parameter [255:0] INIT_68 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3954    parameter [255:0] INIT_69 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3955    parameter [255:0] INIT_6A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3956    parameter [255:0] INIT_6B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3957    parameter [255:0] INIT_6C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3958    parameter [255:0] INIT_6D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3959    parameter [255:0] INIT_6E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3960    parameter [255:0] INIT_6F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3961    parameter [255:0] INIT_70 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3962    parameter [255:0] INIT_71 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3963    parameter [255:0] INIT_72 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3964    parameter [255:0] INIT_73 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3965    parameter [255:0] INIT_74 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3966    parameter [255:0] INIT_75 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3967    parameter [255:0] INIT_76 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3968    parameter [255:0] INIT_77 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3969    parameter [255:0] INIT_78 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3970    parameter [255:0] INIT_79 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3971    parameter [255:0] INIT_7A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3972    parameter [255:0] INIT_7B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3973    parameter [255:0] INIT_7C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3974    parameter [255:0] INIT_7D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3975    parameter [255:0] INIT_7E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3976    parameter [255:0] INIT_7F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
3977    parameter [35:0] INIT_A = 36'h0;
3978    parameter [35:0] INIT_B = 36'h0;
3979    parameter INIT_FILE = "NONE";
3980    parameter RAM_EXTENSION_A = "NONE";
3981    parameter RAM_EXTENSION_B = "NONE";
3982    parameter integer READ_WIDTH_A = 0;
3983    parameter integer READ_WIDTH_B = 0;
3984    parameter SIM_COLLISION_CHECK = "ALL";
3985    parameter SIM_MODE = "SAFE";
3986    parameter [35:0] SRVAL_A = 36'h0;
3987    parameter [35:0] SRVAL_B = 36'h0;
3988    parameter WRITE_MODE_A = "WRITE_FIRST";
3989    parameter WRITE_MODE_B = "WRITE_FIRST";
3990    parameter integer WRITE_WIDTH_A = 0;
3991    parameter integer WRITE_WIDTH_B = 0;
3992    output CASCADEOUTLATA;
3993    output CASCADEOUTREGA;
3994    output CASCADEOUTLATB;
3995    output CASCADEOUTREGB;
3996    output [31:0] DOA;
3997    output [31:0] DOB;
3998    output [3:0] DOPA;
3999    output [3:0] DOPB;
4000    input ENA;
4001    (* clkbuf_sink *)
4002    input CLKA;
4003    input SSRA;
4004    input CASCADEINLATA;
4005    input CASCADEINREGA;
4006    input REGCEA;
4007    input ENB;
4008    (* clkbuf_sink *)
4009    input CLKB;
4010    input SSRB;
4011    input CASCADEINLATB;
4012    input CASCADEINREGB;
4013    input REGCEB;
4014    input [15:0] ADDRA;
4015    input [15:0] ADDRB;
4016    input [31:0] DIA;
4017    input [31:0] DIB;
4018    input [3:0] DIPA;
4019    input [3:0] DIPB;
4020    input [3:0] WEA;
4021    input [3:0] WEB;
4022endmodule
4023
4024module RAMB18SDP (...);
4025    parameter integer DO_REG = 0;
4026    parameter [35:0] INIT = 36'h0;
4027    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4028    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4029    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4030    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4031    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4032    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4033    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4034    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4035    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4036    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4037    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4038    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4039    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4040    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4041    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4042    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4043    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4044    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4045    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4046    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4047    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4048    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4049    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4050    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4051    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4052    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4053    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4054    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4055    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4056    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4057    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4058    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4059    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4060    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4061    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4062    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4063    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4064    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4065    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4066    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4067    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4068    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4069    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4070    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4071    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4072    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4073    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4074    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4075    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4076    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4077    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4078    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4079    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4080    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4081    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4082    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4083    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4084    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4085    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4086    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4087    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4088    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4089    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4090    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4091    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4092    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4093    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4094    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4095    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4096    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4097    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4098    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4099    parameter INIT_FILE = "NONE";
4100    parameter SIM_COLLISION_CHECK = "ALL";
4101    parameter SIM_MODE = "SAFE";
4102    parameter [35:0] SRVAL = 36'h0;
4103    output [31:0] DO;
4104    output [3:0] DOP;
4105    (* clkbuf_sink *)
4106    input RDCLK;
4107    input RDEN;
4108    input REGCE;
4109    input SSR;
4110    (* clkbuf_sink *)
4111    input WRCLK;
4112    input WREN;
4113    input [8:0] WRADDR;
4114    input [8:0] RDADDR;
4115    input [31:0] DI;
4116    input [3:0] DIP;
4117    input [3:0] WE;
4118endmodule
4119
4120module RAMB36SDP (...);
4121    parameter integer DO_REG = 0;
4122    parameter EN_ECC_READ = "FALSE";
4123    parameter EN_ECC_SCRUB = "FALSE";
4124    parameter EN_ECC_WRITE = "FALSE";
4125    parameter [71:0] INIT = 72'h0;
4126    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4127    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4128    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4129    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4130    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4131    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4132    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4133    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4134    parameter [255:0] INITP_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4135    parameter [255:0] INITP_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4136    parameter [255:0] INITP_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4137    parameter [255:0] INITP_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4138    parameter [255:0] INITP_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4139    parameter [255:0] INITP_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4140    parameter [255:0] INITP_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4141    parameter [255:0] INITP_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4142    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4143    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4144    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4145    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4146    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4147    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4148    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4149    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4150    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4151    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4152    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4153    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4154    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4155    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4156    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4157    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4158    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4159    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4160    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4161    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4162    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4163    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4164    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4165    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4166    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4167    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4168    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4169    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4170    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4171    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4172    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4173    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4174    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4175    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4176    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4177    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4178    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4179    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4180    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4181    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4182    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4183    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4184    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4185    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4186    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4187    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4188    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4189    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4190    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4191    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4192    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4193    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4194    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4195    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4196    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4197    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4198    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4199    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4200    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4201    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4202    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4203    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4204    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4205    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4206    parameter [255:0] INIT_40 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4207    parameter [255:0] INIT_41 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4208    parameter [255:0] INIT_42 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4209    parameter [255:0] INIT_43 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4210    parameter [255:0] INIT_44 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4211    parameter [255:0] INIT_45 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4212    parameter [255:0] INIT_46 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4213    parameter [255:0] INIT_47 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4214    parameter [255:0] INIT_48 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4215    parameter [255:0] INIT_49 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4216    parameter [255:0] INIT_4A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4217    parameter [255:0] INIT_4B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4218    parameter [255:0] INIT_4C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4219    parameter [255:0] INIT_4D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4220    parameter [255:0] INIT_4E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4221    parameter [255:0] INIT_4F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4222    parameter [255:0] INIT_50 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4223    parameter [255:0] INIT_51 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4224    parameter [255:0] INIT_52 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4225    parameter [255:0] INIT_53 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4226    parameter [255:0] INIT_54 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4227    parameter [255:0] INIT_55 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4228    parameter [255:0] INIT_56 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4229    parameter [255:0] INIT_57 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4230    parameter [255:0] INIT_58 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4231    parameter [255:0] INIT_59 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4232    parameter [255:0] INIT_5A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4233    parameter [255:0] INIT_5B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4234    parameter [255:0] INIT_5C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4235    parameter [255:0] INIT_5D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4236    parameter [255:0] INIT_5E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4237    parameter [255:0] INIT_5F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4238    parameter [255:0] INIT_60 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4239    parameter [255:0] INIT_61 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4240    parameter [255:0] INIT_62 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4241    parameter [255:0] INIT_63 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4242    parameter [255:0] INIT_64 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4243    parameter [255:0] INIT_65 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4244    parameter [255:0] INIT_66 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4245    parameter [255:0] INIT_67 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4246    parameter [255:0] INIT_68 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4247    parameter [255:0] INIT_69 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4248    parameter [255:0] INIT_6A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4249    parameter [255:0] INIT_6B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4250    parameter [255:0] INIT_6C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4251    parameter [255:0] INIT_6D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4252    parameter [255:0] INIT_6E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4253    parameter [255:0] INIT_6F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4254    parameter [255:0] INIT_70 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4255    parameter [255:0] INIT_71 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4256    parameter [255:0] INIT_72 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4257    parameter [255:0] INIT_73 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4258    parameter [255:0] INIT_74 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4259    parameter [255:0] INIT_75 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4260    parameter [255:0] INIT_76 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4261    parameter [255:0] INIT_77 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4262    parameter [255:0] INIT_78 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4263    parameter [255:0] INIT_79 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4264    parameter [255:0] INIT_7A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4265    parameter [255:0] INIT_7B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4266    parameter [255:0] INIT_7C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4267    parameter [255:0] INIT_7D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4268    parameter [255:0] INIT_7E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4269    parameter [255:0] INIT_7F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4270    parameter INIT_FILE = "NONE";
4271    parameter SIM_COLLISION_CHECK = "ALL";
4272    parameter SIM_MODE = "SAFE";
4273    parameter [71:0] SRVAL = 72'h0;
4274    output DBITERR;
4275    output SBITERR;
4276    output [63:0] DO;
4277    output [7:0] DOP;
4278    output [7:0] ECCPARITY;
4279    (* clkbuf_sink *)
4280    input RDCLK;
4281    input RDEN;
4282    input REGCE;
4283    input SSR;
4284    (* clkbuf_sink *)
4285    input WRCLK;
4286    input WREN;
4287    input [8:0] WRADDR;
4288    input [8:0] RDADDR;
4289    input [63:0] DI;
4290    input [7:0] DIP;
4291    input [7:0] WE;
4292endmodule
4293
4294module FIFO18E1 (...);
4295    parameter ALMOST_EMPTY_OFFSET = 13'h0080;
4296    parameter ALMOST_FULL_OFFSET = 13'h0080;
4297    parameter integer DATA_WIDTH = 4;
4298    parameter integer DO_REG = 1;
4299    parameter EN_SYN = "FALSE";
4300    parameter FIFO_MODE = "FIFO18";
4301    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
4302    parameter INIT = 36'h0;
4303    parameter SIM_DEVICE = "VIRTEX6";
4304    parameter SRVAL = 36'h0;
4305    parameter IS_RDCLK_INVERTED = 1'b0;
4306    parameter IS_RDEN_INVERTED = 1'b0;
4307    parameter IS_RSTREG_INVERTED = 1'b0;
4308    parameter IS_RST_INVERTED = 1'b0;
4309    parameter IS_WRCLK_INVERTED = 1'b0;
4310    parameter IS_WREN_INVERTED = 1'b0;
4311    output ALMOSTEMPTY;
4312    output ALMOSTFULL;
4313    output [31:0] DO;
4314    output [3:0] DOP;
4315    output EMPTY;
4316    output FULL;
4317    output [11:0] RDCOUNT;
4318    output RDERR;
4319    output [11:0] WRCOUNT;
4320    output WRERR;
4321    input [31:0] DI;
4322    input [3:0] DIP;
4323    (* clkbuf_sink *)
4324    (* invertible_pin = "IS_RDCLK_INVERTED" *)
4325    input RDCLK;
4326    (* invertible_pin = "IS_RDEN_INVERTED" *)
4327    input RDEN;
4328    input REGCE;
4329    (* invertible_pin = "IS_RST_INVERTED" *)
4330    input RST;
4331    (* invertible_pin = "IS_RSTREG_INVERTED" *)
4332    input RSTREG;
4333    (* clkbuf_sink *)
4334    (* invertible_pin = "IS_WRCLK_INVERTED" *)
4335    input WRCLK;
4336    (* invertible_pin = "IS_WREN_INVERTED" *)
4337    input WREN;
4338endmodule
4339
4340module FIFO36E1 (...);
4341    parameter ALMOST_EMPTY_OFFSET = 13'h0080;
4342    parameter ALMOST_FULL_OFFSET = 13'h0080;
4343    parameter integer DATA_WIDTH = 4;
4344    parameter integer DO_REG = 1;
4345    parameter EN_ECC_READ = "FALSE";
4346    parameter EN_ECC_WRITE = "FALSE";
4347    parameter EN_SYN = "FALSE";
4348    parameter FIFO_MODE = "FIFO36";
4349    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
4350    parameter INIT = 72'h0;
4351    parameter SIM_DEVICE = "VIRTEX6";
4352    parameter SRVAL = 72'h0;
4353    parameter IS_RDCLK_INVERTED = 1'b0;
4354    parameter IS_RDEN_INVERTED = 1'b0;
4355    parameter IS_RSTREG_INVERTED = 1'b0;
4356    parameter IS_RST_INVERTED = 1'b0;
4357    parameter IS_WRCLK_INVERTED = 1'b0;
4358    parameter IS_WREN_INVERTED = 1'b0;
4359    output ALMOSTEMPTY;
4360    output ALMOSTFULL;
4361    output DBITERR;
4362    output [63:0] DO;
4363    output [7:0] DOP;
4364    output [7:0] ECCPARITY;
4365    output EMPTY;
4366    output FULL;
4367    output [12:0] RDCOUNT;
4368    output RDERR;
4369    output SBITERR;
4370    output [12:0] WRCOUNT;
4371    output WRERR;
4372    input [63:0] DI;
4373    input [7:0] DIP;
4374    input INJECTDBITERR;
4375    input INJECTSBITERR;
4376    (* clkbuf_sink *)
4377    (* invertible_pin = "IS_RDCLK_INVERTED" *)
4378    input RDCLK;
4379    (* invertible_pin = "IS_RDEN_INVERTED" *)
4380    input RDEN;
4381    input REGCE;
4382    (* invertible_pin = "IS_RST_INVERTED" *)
4383    input RST;
4384    (* invertible_pin = "IS_RSTREG_INVERTED" *)
4385    input RSTREG;
4386    (* clkbuf_sink *)
4387    (* invertible_pin = "IS_WRCLK_INVERTED" *)
4388    input WRCLK;
4389    (* invertible_pin = "IS_WREN_INVERTED" *)
4390    input WREN;
4391endmodule
4392
4393module FIFO18E2 (...);
4394    parameter CASCADE_ORDER = "NONE";
4395    parameter CLOCK_DOMAINS = "INDEPENDENT";
4396    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
4397    parameter [35:0] INIT = 36'h000000000;
4398    parameter [0:0] IS_RDCLK_INVERTED = 1'b0;
4399    parameter [0:0] IS_RDEN_INVERTED = 1'b0;
4400    parameter [0:0] IS_RSTREG_INVERTED = 1'b0;
4401    parameter [0:0] IS_RST_INVERTED = 1'b0;
4402    parameter [0:0] IS_WRCLK_INVERTED = 1'b0;
4403    parameter [0:0] IS_WREN_INVERTED = 1'b0;
4404    parameter integer PROG_EMPTY_THRESH = 256;
4405    parameter integer PROG_FULL_THRESH = 256;
4406    parameter RDCOUNT_TYPE = "RAW_PNTR";
4407    parameter integer READ_WIDTH = 4;
4408    parameter REGISTER_MODE = "UNREGISTERED";
4409    parameter RSTREG_PRIORITY = "RSTREG";
4410    parameter SLEEP_ASYNC = "FALSE";
4411    parameter [35:0] SRVAL = 36'h000000000;
4412    parameter WRCOUNT_TYPE = "RAW_PNTR";
4413    parameter integer WRITE_WIDTH = 4;
4414    output [31:0] CASDOUT;
4415    output [3:0] CASDOUTP;
4416    output CASNXTEMPTY;
4417    output CASPRVRDEN;
4418    output [31:0] DOUT;
4419    output [3:0] DOUTP;
4420    output EMPTY;
4421    output FULL;
4422    output PROGEMPTY;
4423    output PROGFULL;
4424    output [12:0] RDCOUNT;
4425    output RDERR;
4426    output RDRSTBUSY;
4427    output [12:0] WRCOUNT;
4428    output WRERR;
4429    output WRRSTBUSY;
4430    input [31:0] CASDIN;
4431    input [3:0] CASDINP;
4432    input CASDOMUX;
4433    input CASDOMUXEN;
4434    input CASNXTRDEN;
4435    input CASOREGIMUX;
4436    input CASOREGIMUXEN;
4437    input CASPRVEMPTY;
4438    input [31:0] DIN;
4439    input [3:0] DINP;
4440    (* clkbuf_sink *)
4441    (* invertible_pin = "IS_RDCLK_INVERTED" *)
4442    input RDCLK;
4443    (* invertible_pin = "IS_RDEN_INVERTED" *)
4444    input RDEN;
4445    input REGCE;
4446    (* invertible_pin = "IS_RST_INVERTED" *)
4447    input RST;
4448    (* invertible_pin = "IS_RSTREG_INVERTED" *)
4449    input RSTREG;
4450    input SLEEP;
4451    (* clkbuf_sink *)
4452    (* invertible_pin = "IS_WRCLK_INVERTED" *)
4453    input WRCLK;
4454    (* invertible_pin = "IS_WREN_INVERTED" *)
4455    input WREN;
4456endmodule
4457
4458module FIFO36E2 (...);
4459    parameter CASCADE_ORDER = "NONE";
4460    parameter CLOCK_DOMAINS = "INDEPENDENT";
4461    parameter EN_ECC_PIPE = "FALSE";
4462    parameter EN_ECC_READ = "FALSE";
4463    parameter EN_ECC_WRITE = "FALSE";
4464    parameter FIRST_WORD_FALL_THROUGH = "FALSE";
4465    parameter [71:0] INIT = 72'h000000000000000000;
4466    parameter [0:0] IS_RDCLK_INVERTED = 1'b0;
4467    parameter [0:0] IS_RDEN_INVERTED = 1'b0;
4468    parameter [0:0] IS_RSTREG_INVERTED = 1'b0;
4469    parameter [0:0] IS_RST_INVERTED = 1'b0;
4470    parameter [0:0] IS_WRCLK_INVERTED = 1'b0;
4471    parameter [0:0] IS_WREN_INVERTED = 1'b0;
4472    parameter integer PROG_EMPTY_THRESH = 256;
4473    parameter integer PROG_FULL_THRESH = 256;
4474    parameter RDCOUNT_TYPE = "RAW_PNTR";
4475    parameter integer READ_WIDTH = 4;
4476    parameter REGISTER_MODE = "UNREGISTERED";
4477    parameter RSTREG_PRIORITY = "RSTREG";
4478    parameter SLEEP_ASYNC = "FALSE";
4479    parameter [71:0] SRVAL = 72'h000000000000000000;
4480    parameter WRCOUNT_TYPE = "RAW_PNTR";
4481    parameter integer WRITE_WIDTH = 4;
4482    output [63:0] CASDOUT;
4483    output [7:0] CASDOUTP;
4484    output CASNXTEMPTY;
4485    output CASPRVRDEN;
4486    output DBITERR;
4487    output [63:0] DOUT;
4488    output [7:0] DOUTP;
4489    output [7:0] ECCPARITY;
4490    output EMPTY;
4491    output FULL;
4492    output PROGEMPTY;
4493    output PROGFULL;
4494    output [13:0] RDCOUNT;
4495    output RDERR;
4496    output RDRSTBUSY;
4497    output SBITERR;
4498    output [13:0] WRCOUNT;
4499    output WRERR;
4500    output WRRSTBUSY;
4501    input [63:0] CASDIN;
4502    input [7:0] CASDINP;
4503    input CASDOMUX;
4504    input CASDOMUXEN;
4505    input CASNXTRDEN;
4506    input CASOREGIMUX;
4507    input CASOREGIMUXEN;
4508    input CASPRVEMPTY;
4509    input [63:0] DIN;
4510    input [7:0] DINP;
4511    input INJECTDBITERR;
4512    input INJECTSBITERR;
4513    (* clkbuf_sink *)
4514    (* invertible_pin = "IS_RDCLK_INVERTED" *)
4515    input RDCLK;
4516    (* invertible_pin = "IS_RDEN_INVERTED" *)
4517    input RDEN;
4518    input REGCE;
4519    (* invertible_pin = "IS_RST_INVERTED" *)
4520    input RST;
4521    (* invertible_pin = "IS_RSTREG_INVERTED" *)
4522    input RSTREG;
4523    input SLEEP;
4524    (* clkbuf_sink *)
4525    (* invertible_pin = "IS_WRCLK_INVERTED" *)
4526    input WRCLK;
4527    (* invertible_pin = "IS_WREN_INVERTED" *)
4528    input WREN;
4529endmodule
4530
4531module RAMB18E2 (...);
4532    parameter CASCADE_ORDER_A = "NONE";
4533    parameter CASCADE_ORDER_B = "NONE";
4534    parameter CLOCK_DOMAINS = "INDEPENDENT";
4535    parameter integer DOA_REG = 1;
4536    parameter integer DOB_REG = 1;
4537    parameter ENADDRENA = "FALSE";
4538    parameter ENADDRENB = "FALSE";
4539    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4540    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4541    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4542    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4543    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4544    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4545    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4546    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4547    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4548    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4549    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4550    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4551    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4552    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4553    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4554    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4555    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4556    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4557    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4558    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4559    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4560    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4561    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4562    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4563    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4564    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4565    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4566    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4567    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4568    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4569    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4570    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4571    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4572    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4573    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4574    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4575    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4576    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4577    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4578    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4579    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4580    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4581    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4582    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4583    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4584    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4585    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4586    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4587    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4588    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4589    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4590    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4591    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4592    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4593    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4594    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4595    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4596    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4597    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4598    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4599    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4600    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4601    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4602    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4603    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4604    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4605    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4606    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4607    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4608    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4609    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4610    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4611    parameter [17:0] INIT_A = 18'h00000;
4612    parameter [17:0] INIT_B = 18'h00000;
4613    parameter INIT_FILE = "NONE";
4614    parameter [0:0] IS_CLKARDCLK_INVERTED = 1'b0;
4615    parameter [0:0] IS_CLKBWRCLK_INVERTED = 1'b0;
4616    parameter [0:0] IS_ENARDEN_INVERTED = 1'b0;
4617    parameter [0:0] IS_ENBWREN_INVERTED = 1'b0;
4618    parameter [0:0] IS_RSTRAMARSTRAM_INVERTED = 1'b0;
4619    parameter [0:0] IS_RSTRAMB_INVERTED = 1'b0;
4620    parameter [0:0] IS_RSTREGARSTREG_INVERTED = 1'b0;
4621    parameter [0:0] IS_RSTREGB_INVERTED = 1'b0;
4622    parameter RDADDRCHANGEA = "FALSE";
4623    parameter RDADDRCHANGEB = "FALSE";
4624    parameter integer READ_WIDTH_A = 0;
4625    parameter integer READ_WIDTH_B = 0;
4626    parameter RSTREG_PRIORITY_A = "RSTREG";
4627    parameter RSTREG_PRIORITY_B = "RSTREG";
4628    parameter SIM_COLLISION_CHECK = "ALL";
4629    parameter SLEEP_ASYNC = "FALSE";
4630    parameter [17:0] SRVAL_A = 18'h00000;
4631    parameter [17:0] SRVAL_B = 18'h00000;
4632    parameter WRITE_MODE_A = "NO_CHANGE";
4633    parameter WRITE_MODE_B = "NO_CHANGE";
4634    parameter integer WRITE_WIDTH_A = 0;
4635    parameter integer WRITE_WIDTH_B = 0;
4636    output [15:0] CASDOUTA;
4637    output [15:0] CASDOUTB;
4638    output [1:0] CASDOUTPA;
4639    output [1:0] CASDOUTPB;
4640    output [15:0] DOUTADOUT;
4641    output [15:0] DOUTBDOUT;
4642    output [1:0] DOUTPADOUTP;
4643    output [1:0] DOUTPBDOUTP;
4644    input [13:0] ADDRARDADDR;
4645    input [13:0] ADDRBWRADDR;
4646    input ADDRENA;
4647    input ADDRENB;
4648    input CASDIMUXA;
4649    input CASDIMUXB;
4650    input [15:0] CASDINA;
4651    input [15:0] CASDINB;
4652    input [1:0] CASDINPA;
4653    input [1:0] CASDINPB;
4654    input CASDOMUXA;
4655    input CASDOMUXB;
4656    input CASDOMUXEN_A;
4657    input CASDOMUXEN_B;
4658    input CASOREGIMUXA;
4659    input CASOREGIMUXB;
4660    input CASOREGIMUXEN_A;
4661    input CASOREGIMUXEN_B;
4662    (* clkbuf_sink *)
4663    (* invertible_pin = "IS_CLKARDCLK_INVERTED" *)
4664    input CLKARDCLK;
4665    (* clkbuf_sink *)
4666    (* invertible_pin = "IS_CLKBWRCLK_INVERTED" *)
4667    input CLKBWRCLK;
4668    input [15:0] DINADIN;
4669    input [15:0] DINBDIN;
4670    input [1:0] DINPADINP;
4671    input [1:0] DINPBDINP;
4672    (* invertible_pin = "IS_ENARDEN_INVERTED" *)
4673    input ENARDEN;
4674    (* invertible_pin = "IS_ENBWREN_INVERTED" *)
4675    input ENBWREN;
4676    input REGCEAREGCE;
4677    input REGCEB;
4678    (* invertible_pin = "IS_RSTRAMARSTRAM_INVERTED" *)
4679    input RSTRAMARSTRAM;
4680    (* invertible_pin = "IS_RSTRAMB_INVERTED" *)
4681    input RSTRAMB;
4682    (* invertible_pin = "IS_RSTREGARSTREG_INVERTED" *)
4683    input RSTREGARSTREG;
4684    (* invertible_pin = "IS_RSTREGB_INVERTED" *)
4685    input RSTREGB;
4686    input SLEEP;
4687    input [1:0] WEA;
4688    input [3:0] WEBWE;
4689endmodule
4690
4691module RAMB36E2 (...);
4692    parameter CASCADE_ORDER_A = "NONE";
4693    parameter CASCADE_ORDER_B = "NONE";
4694    parameter CLOCK_DOMAINS = "INDEPENDENT";
4695    parameter integer DOA_REG = 1;
4696    parameter integer DOB_REG = 1;
4697    parameter ENADDRENA = "FALSE";
4698    parameter ENADDRENB = "FALSE";
4699    parameter EN_ECC_PIPE = "FALSE";
4700    parameter EN_ECC_READ = "FALSE";
4701    parameter EN_ECC_WRITE = "FALSE";
4702    parameter [255:0] INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4703    parameter [255:0] INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4704    parameter [255:0] INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4705    parameter [255:0] INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4706    parameter [255:0] INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4707    parameter [255:0] INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4708    parameter [255:0] INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4709    parameter [255:0] INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4710    parameter [255:0] INITP_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4711    parameter [255:0] INITP_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4712    parameter [255:0] INITP_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4713    parameter [255:0] INITP_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4714    parameter [255:0] INITP_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4715    parameter [255:0] INITP_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4716    parameter [255:0] INITP_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4717    parameter [255:0] INITP_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4718    parameter [255:0] INIT_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4719    parameter [255:0] INIT_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4720    parameter [255:0] INIT_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4721    parameter [255:0] INIT_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4722    parameter [255:0] INIT_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4723    parameter [255:0] INIT_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4724    parameter [255:0] INIT_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4725    parameter [255:0] INIT_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4726    parameter [255:0] INIT_08 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4727    parameter [255:0] INIT_09 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4728    parameter [255:0] INIT_0A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4729    parameter [255:0] INIT_0B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4730    parameter [255:0] INIT_0C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4731    parameter [255:0] INIT_0D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4732    parameter [255:0] INIT_0E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4733    parameter [255:0] INIT_0F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4734    parameter [255:0] INIT_10 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4735    parameter [255:0] INIT_11 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4736    parameter [255:0] INIT_12 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4737    parameter [255:0] INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4738    parameter [255:0] INIT_14 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4739    parameter [255:0] INIT_15 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4740    parameter [255:0] INIT_16 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4741    parameter [255:0] INIT_17 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4742    parameter [255:0] INIT_18 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4743    parameter [255:0] INIT_19 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4744    parameter [255:0] INIT_1A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4745    parameter [255:0] INIT_1B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4746    parameter [255:0] INIT_1C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4747    parameter [255:0] INIT_1D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4748    parameter [255:0] INIT_1E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4749    parameter [255:0] INIT_1F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4750    parameter [255:0] INIT_20 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4751    parameter [255:0] INIT_21 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4752    parameter [255:0] INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4753    parameter [255:0] INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4754    parameter [255:0] INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4755    parameter [255:0] INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4756    parameter [255:0] INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4757    parameter [255:0] INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4758    parameter [255:0] INIT_28 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4759    parameter [255:0] INIT_29 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4760    parameter [255:0] INIT_2A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4761    parameter [255:0] INIT_2B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4762    parameter [255:0] INIT_2C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4763    parameter [255:0] INIT_2D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4764    parameter [255:0] INIT_2E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4765    parameter [255:0] INIT_2F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4766    parameter [255:0] INIT_30 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4767    parameter [255:0] INIT_31 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4768    parameter [255:0] INIT_32 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4769    parameter [255:0] INIT_33 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4770    parameter [255:0] INIT_34 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4771    parameter [255:0] INIT_35 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4772    parameter [255:0] INIT_36 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4773    parameter [255:0] INIT_37 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4774    parameter [255:0] INIT_38 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4775    parameter [255:0] INIT_39 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4776    parameter [255:0] INIT_3A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4777    parameter [255:0] INIT_3B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4778    parameter [255:0] INIT_3C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4779    parameter [255:0] INIT_3D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4780    parameter [255:0] INIT_3E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4781    parameter [255:0] INIT_3F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4782    parameter [255:0] INIT_40 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4783    parameter [255:0] INIT_41 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4784    parameter [255:0] INIT_42 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4785    parameter [255:0] INIT_43 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4786    parameter [255:0] INIT_44 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4787    parameter [255:0] INIT_45 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4788    parameter [255:0] INIT_46 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4789    parameter [255:0] INIT_47 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4790    parameter [255:0] INIT_48 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4791    parameter [255:0] INIT_49 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4792    parameter [255:0] INIT_4A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4793    parameter [255:0] INIT_4B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4794    parameter [255:0] INIT_4C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4795    parameter [255:0] INIT_4D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4796    parameter [255:0] INIT_4E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4797    parameter [255:0] INIT_4F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4798    parameter [255:0] INIT_50 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4799    parameter [255:0] INIT_51 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4800    parameter [255:0] INIT_52 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4801    parameter [255:0] INIT_53 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4802    parameter [255:0] INIT_54 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4803    parameter [255:0] INIT_55 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4804    parameter [255:0] INIT_56 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4805    parameter [255:0] INIT_57 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4806    parameter [255:0] INIT_58 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4807    parameter [255:0] INIT_59 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4808    parameter [255:0] INIT_5A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4809    parameter [255:0] INIT_5B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4810    parameter [255:0] INIT_5C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4811    parameter [255:0] INIT_5D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4812    parameter [255:0] INIT_5E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4813    parameter [255:0] INIT_5F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4814    parameter [255:0] INIT_60 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4815    parameter [255:0] INIT_61 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4816    parameter [255:0] INIT_62 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4817    parameter [255:0] INIT_63 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4818    parameter [255:0] INIT_64 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4819    parameter [255:0] INIT_65 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4820    parameter [255:0] INIT_66 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4821    parameter [255:0] INIT_67 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4822    parameter [255:0] INIT_68 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4823    parameter [255:0] INIT_69 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4824    parameter [255:0] INIT_6A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4825    parameter [255:0] INIT_6B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4826    parameter [255:0] INIT_6C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4827    parameter [255:0] INIT_6D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4828    parameter [255:0] INIT_6E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4829    parameter [255:0] INIT_6F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4830    parameter [255:0] INIT_70 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4831    parameter [255:0] INIT_71 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4832    parameter [255:0] INIT_72 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4833    parameter [255:0] INIT_73 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4834    parameter [255:0] INIT_74 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4835    parameter [255:0] INIT_75 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4836    parameter [255:0] INIT_76 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4837    parameter [255:0] INIT_77 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4838    parameter [255:0] INIT_78 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4839    parameter [255:0] INIT_79 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4840    parameter [255:0] INIT_7A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4841    parameter [255:0] INIT_7B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4842    parameter [255:0] INIT_7C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4843    parameter [255:0] INIT_7D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4844    parameter [255:0] INIT_7E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4845    parameter [255:0] INIT_7F = 256'h0000000000000000000000000000000000000000000000000000000000000000;
4846    parameter [35:0] INIT_A = 36'h000000000;
4847    parameter [35:0] INIT_B = 36'h000000000;
4848    parameter INIT_FILE = "NONE";
4849    parameter [0:0] IS_CLKARDCLK_INVERTED = 1'b0;
4850    parameter [0:0] IS_CLKBWRCLK_INVERTED = 1'b0;
4851    parameter [0:0] IS_ENARDEN_INVERTED = 1'b0;
4852    parameter [0:0] IS_ENBWREN_INVERTED = 1'b0;
4853    parameter [0:0] IS_RSTRAMARSTRAM_INVERTED = 1'b0;
4854    parameter [0:0] IS_RSTRAMB_INVERTED = 1'b0;
4855    parameter [0:0] IS_RSTREGARSTREG_INVERTED = 1'b0;
4856    parameter [0:0] IS_RSTREGB_INVERTED = 1'b0;
4857    parameter RDADDRCHANGEA = "FALSE";
4858    parameter RDADDRCHANGEB = "FALSE";
4859    parameter integer READ_WIDTH_A = 0;
4860    parameter integer READ_WIDTH_B = 0;
4861    parameter RSTREG_PRIORITY_A = "RSTREG";
4862    parameter RSTREG_PRIORITY_B = "RSTREG";
4863    parameter SIM_COLLISION_CHECK = "ALL";
4864    parameter SLEEP_ASYNC = "FALSE";
4865    parameter [35:0] SRVAL_A = 36'h000000000;
4866    parameter [35:0] SRVAL_B = 36'h000000000;
4867    parameter WRITE_MODE_A = "NO_CHANGE";
4868    parameter WRITE_MODE_B = "NO_CHANGE";
4869    parameter integer WRITE_WIDTH_A = 0;
4870    parameter integer WRITE_WIDTH_B = 0;
4871    output [31:0] CASDOUTA;
4872    output [31:0] CASDOUTB;
4873    output [3:0] CASDOUTPA;
4874    output [3:0] CASDOUTPB;
4875    output CASOUTDBITERR;
4876    output CASOUTSBITERR;
4877    output DBITERR;
4878    output [31:0] DOUTADOUT;
4879    output [31:0] DOUTBDOUT;
4880    output [3:0] DOUTPADOUTP;
4881    output [3:0] DOUTPBDOUTP;
4882    output [7:0] ECCPARITY;
4883    output [8:0] RDADDRECC;
4884    output SBITERR;
4885    input [14:0] ADDRARDADDR;
4886    input [14:0] ADDRBWRADDR;
4887    input ADDRENA;
4888    input ADDRENB;
4889    input CASDIMUXA;
4890    input CASDIMUXB;
4891    input [31:0] CASDINA;
4892    input [31:0] CASDINB;
4893    input [3:0] CASDINPA;
4894    input [3:0] CASDINPB;
4895    input CASDOMUXA;
4896    input CASDOMUXB;
4897    input CASDOMUXEN_A;
4898    input CASDOMUXEN_B;
4899    input CASINDBITERR;
4900    input CASINSBITERR;
4901    input CASOREGIMUXA;
4902    input CASOREGIMUXB;
4903    input CASOREGIMUXEN_A;
4904    input CASOREGIMUXEN_B;
4905    (* clkbuf_sink *)
4906    (* invertible_pin = "IS_CLKARDCLK_INVERTED" *)
4907    input CLKARDCLK;
4908    (* clkbuf_sink *)
4909    (* invertible_pin = "IS_CLKBWRCLK_INVERTED" *)
4910    input CLKBWRCLK;
4911    input [31:0] DINADIN;
4912    input [31:0] DINBDIN;
4913    input [3:0] DINPADINP;
4914    input [3:0] DINPBDINP;
4915    input ECCPIPECE;
4916    (* invertible_pin = "IS_ENARDEN_INVERTED" *)
4917    input ENARDEN;
4918    (* invertible_pin = "IS_ENBWREN_INVERTED" *)
4919    input ENBWREN;
4920    input INJECTDBITERR;
4921    input INJECTSBITERR;
4922    input REGCEAREGCE;
4923    input REGCEB;
4924    (* invertible_pin = "IS_RSTRAMARSTRAM_INVERTED" *)
4925    input RSTRAMARSTRAM;
4926    (* invertible_pin = "IS_RSTRAMB_INVERTED" *)
4927    input RSTRAMB;
4928    (* invertible_pin = "IS_RSTREGARSTREG_INVERTED" *)
4929    input RSTREGARSTREG;
4930    (* invertible_pin = "IS_RSTREGB_INVERTED" *)
4931    input RSTREGB;
4932    input SLEEP;
4933    input [3:0] WEA;
4934    input [7:0] WEBWE;
4935endmodule
4936
4937module URAM288 (...);
4938    parameter integer AUTO_SLEEP_LATENCY = 8;
4939    parameter integer AVG_CONS_INACTIVE_CYCLES = 10;
4940    parameter BWE_MODE_A = "PARITY_INTERLEAVED";
4941    parameter BWE_MODE_B = "PARITY_INTERLEAVED";
4942    parameter CASCADE_ORDER_A = "NONE";
4943    parameter CASCADE_ORDER_B = "NONE";
4944    parameter EN_AUTO_SLEEP_MODE = "FALSE";
4945    parameter EN_ECC_RD_A = "FALSE";
4946    parameter EN_ECC_RD_B = "FALSE";
4947    parameter EN_ECC_WR_A = "FALSE";
4948    parameter EN_ECC_WR_B = "FALSE";
4949    parameter IREG_PRE_A = "FALSE";
4950    parameter IREG_PRE_B = "FALSE";
4951    parameter [0:0] IS_CLK_INVERTED = 1'b0;
4952    parameter [0:0] IS_EN_A_INVERTED = 1'b0;
4953    parameter [0:0] IS_EN_B_INVERTED = 1'b0;
4954    parameter [0:0] IS_RDB_WR_A_INVERTED = 1'b0;
4955    parameter [0:0] IS_RDB_WR_B_INVERTED = 1'b0;
4956    parameter [0:0] IS_RST_A_INVERTED = 1'b0;
4957    parameter [0:0] IS_RST_B_INVERTED = 1'b0;
4958    parameter MATRIX_ID = "NONE";
4959    parameter integer NUM_UNIQUE_SELF_ADDR_A = 1;
4960    parameter integer NUM_UNIQUE_SELF_ADDR_B = 1;
4961    parameter integer NUM_URAM_IN_MATRIX = 1;
4962    parameter OREG_A = "FALSE";
4963    parameter OREG_B = "FALSE";
4964    parameter OREG_ECC_A = "FALSE";
4965    parameter OREG_ECC_B = "FALSE";
4966    parameter REG_CAS_A = "FALSE";
4967    parameter REG_CAS_B = "FALSE";
4968    parameter RST_MODE_A = "SYNC";
4969    parameter RST_MODE_B = "SYNC";
4970    parameter [10:0] SELF_ADDR_A = 11'h000;
4971    parameter [10:0] SELF_ADDR_B = 11'h000;
4972    parameter [10:0] SELF_MASK_A = 11'h7FF;
4973    parameter [10:0] SELF_MASK_B = 11'h7FF;
4974    parameter USE_EXT_CE_A = "FALSE";
4975    parameter USE_EXT_CE_B = "FALSE";
4976    output [22:0] CAS_OUT_ADDR_A;
4977    output [22:0] CAS_OUT_ADDR_B;
4978    output [8:0] CAS_OUT_BWE_A;
4979    output [8:0] CAS_OUT_BWE_B;
4980    output CAS_OUT_DBITERR_A;
4981    output CAS_OUT_DBITERR_B;
4982    output [71:0] CAS_OUT_DIN_A;
4983    output [71:0] CAS_OUT_DIN_B;
4984    output [71:0] CAS_OUT_DOUT_A;
4985    output [71:0] CAS_OUT_DOUT_B;
4986    output CAS_OUT_EN_A;
4987    output CAS_OUT_EN_B;
4988    output CAS_OUT_RDACCESS_A;
4989    output CAS_OUT_RDACCESS_B;
4990    output CAS_OUT_RDB_WR_A;
4991    output CAS_OUT_RDB_WR_B;
4992    output CAS_OUT_SBITERR_A;
4993    output CAS_OUT_SBITERR_B;
4994    output DBITERR_A;
4995    output DBITERR_B;
4996    output [71:0] DOUT_A;
4997    output [71:0] DOUT_B;
4998    output RDACCESS_A;
4999    output RDACCESS_B;
5000    output SBITERR_A;
5001    output SBITERR_B;
5002    input [22:0] ADDR_A;
5003    input [22:0] ADDR_B;
5004    input [8:0] BWE_A;
5005    input [8:0] BWE_B;
5006    input [22:0] CAS_IN_ADDR_A;
5007    input [22:0] CAS_IN_ADDR_B;
5008    input [8:0] CAS_IN_BWE_A;
5009    input [8:0] CAS_IN_BWE_B;
5010    input CAS_IN_DBITERR_A;
5011    input CAS_IN_DBITERR_B;
5012    input [71:0] CAS_IN_DIN_A;
5013    input [71:0] CAS_IN_DIN_B;
5014    input [71:0] CAS_IN_DOUT_A;
5015    input [71:0] CAS_IN_DOUT_B;
5016    input CAS_IN_EN_A;
5017    input CAS_IN_EN_B;
5018    input CAS_IN_RDACCESS_A;
5019    input CAS_IN_RDACCESS_B;
5020    input CAS_IN_RDB_WR_A;
5021    input CAS_IN_RDB_WR_B;
5022    input CAS_IN_SBITERR_A;
5023    input CAS_IN_SBITERR_B;
5024    (* clkbuf_sink *)
5025    (* invertible_pin = "IS_CLK_INVERTED" *)
5026    input CLK;
5027    input [71:0] DIN_A;
5028    input [71:0] DIN_B;
5029    (* invertible_pin = "IS_EN_A_INVERTED" *)
5030    input EN_A;
5031    (* invertible_pin = "IS_EN_B_INVERTED" *)
5032    input EN_B;
5033    input INJECT_DBITERR_A;
5034    input INJECT_DBITERR_B;
5035    input INJECT_SBITERR_A;
5036    input INJECT_SBITERR_B;
5037    input OREG_CE_A;
5038    input OREG_CE_B;
5039    input OREG_ECC_CE_A;
5040    input OREG_ECC_CE_B;
5041    (* invertible_pin = "IS_RDB_WR_A_INVERTED" *)
5042    input RDB_WR_A;
5043    (* invertible_pin = "IS_RDB_WR_B_INVERTED" *)
5044    input RDB_WR_B;
5045    (* invertible_pin = "IS_RST_A_INVERTED" *)
5046    input RST_A;
5047    (* invertible_pin = "IS_RST_B_INVERTED" *)
5048    input RST_B;
5049    input SLEEP;
5050endmodule
5051
5052module URAM288_BASE (...);
5053    parameter integer AUTO_SLEEP_LATENCY = 8;
5054    parameter integer AVG_CONS_INACTIVE_CYCLES = 10;
5055    parameter BWE_MODE_A = "PARITY_INTERLEAVED";
5056    parameter BWE_MODE_B = "PARITY_INTERLEAVED";
5057    parameter EN_AUTO_SLEEP_MODE = "FALSE";
5058    parameter EN_ECC_RD_A = "FALSE";
5059    parameter EN_ECC_RD_B = "FALSE";
5060    parameter EN_ECC_WR_A = "FALSE";
5061    parameter EN_ECC_WR_B = "FALSE";
5062    parameter IREG_PRE_A = "FALSE";
5063    parameter IREG_PRE_B = "FALSE";
5064    parameter [0:0] IS_CLK_INVERTED = 1'b0;
5065    parameter [0:0] IS_EN_A_INVERTED = 1'b0;
5066    parameter [0:0] IS_EN_B_INVERTED = 1'b0;
5067    parameter [0:0] IS_RDB_WR_A_INVERTED = 1'b0;
5068    parameter [0:0] IS_RDB_WR_B_INVERTED = 1'b0;
5069    parameter [0:0] IS_RST_A_INVERTED = 1'b0;
5070    parameter [0:0] IS_RST_B_INVERTED = 1'b0;
5071    parameter OREG_A = "FALSE";
5072    parameter OREG_B = "FALSE";
5073    parameter OREG_ECC_A = "FALSE";
5074    parameter OREG_ECC_B = "FALSE";
5075    parameter RST_MODE_A = "SYNC";
5076    parameter RST_MODE_B = "SYNC";
5077    parameter USE_EXT_CE_A = "FALSE";
5078    parameter USE_EXT_CE_B = "FALSE";
5079    output DBITERR_A;
5080    output DBITERR_B;
5081    output [71:0] DOUT_A;
5082    output [71:0] DOUT_B;
5083    output SBITERR_A;
5084    output SBITERR_B;
5085    input [22:0] ADDR_A;
5086    input [22:0] ADDR_B;
5087    input [8:0] BWE_A;
5088    input [8:0] BWE_B;
5089    (* clkbuf_sink *)
5090    (* invertible_pin = "IS_CLK_INVERTED" *)
5091    input CLK;
5092    input [71:0] DIN_A;
5093    input [71:0] DIN_B;
5094    (* invertible_pin = "IS_EN_A_INVERTED" *)
5095    input EN_A;
5096    (* invertible_pin = "IS_EN_B_INVERTED" *)
5097    input EN_B;
5098    input INJECT_DBITERR_A;
5099    input INJECT_DBITERR_B;
5100    input INJECT_SBITERR_A;
5101    input INJECT_SBITERR_B;
5102    input OREG_CE_A;
5103    input OREG_CE_B;
5104    input OREG_ECC_CE_A;
5105    input OREG_ECC_CE_B;
5106    (* invertible_pin = "IS_RDB_WR_A_INVERTED" *)
5107    input RDB_WR_A;
5108    (* invertible_pin = "IS_RDB_WR_B_INVERTED" *)
5109    input RDB_WR_B;
5110    (* invertible_pin = "IS_RST_A_INVERTED" *)
5111    input RST_A;
5112    (* invertible_pin = "IS_RST_B_INVERTED" *)
5113    input RST_B;
5114    input SLEEP;
5115endmodule
5116
5117module DSP48E (...);
5118    parameter SIM_MODE = "SAFE";
5119    parameter integer ACASCREG = 1;
5120    parameter integer ALUMODEREG = 1;
5121    parameter integer AREG = 1;
5122    parameter AUTORESET_PATTERN_DETECT = "FALSE";
5123    parameter AUTORESET_PATTERN_DETECT_OPTINV = "MATCH";
5124    parameter A_INPUT = "DIRECT";
5125    parameter integer BCASCREG = 1;
5126    parameter integer BREG = 1;
5127    parameter B_INPUT = "DIRECT";
5128    parameter integer CARRYINREG = 1;
5129    parameter integer CARRYINSELREG = 1;
5130    parameter integer CREG = 1;
5131    parameter [47:0] MASK = 48'h3FFFFFFFFFFF;
5132    parameter integer MREG = 1;
5133    parameter integer MULTCARRYINREG = 1;
5134    parameter integer OPMODEREG = 1;
5135    parameter [47:0] PATTERN = 48'h000000000000;
5136    parameter integer PREG = 1;
5137    parameter SEL_MASK = "MASK";
5138    parameter SEL_PATTERN = "PATTERN";
5139    parameter SEL_ROUNDING_MASK = "SEL_MASK";
5140    parameter USE_MULT = "MULT_S";
5141    parameter USE_PATTERN_DETECT = "NO_PATDET";
5142    parameter USE_SIMD = "ONE48";
5143    output [29:0] ACOUT;
5144    output [17:0] BCOUT;
5145    output CARRYCASCOUT;
5146    output [3:0] CARRYOUT;
5147    output MULTSIGNOUT;
5148    output OVERFLOW;
5149    output [47:0] P;
5150    output PATTERNBDETECT;
5151    output PATTERNDETECT;
5152    output [47:0] PCOUT;
5153    output UNDERFLOW;
5154    input [29:0] A;
5155    input [29:0] ACIN;
5156    input [3:0] ALUMODE;
5157    input [17:0] B;
5158    input [17:0] BCIN;
5159    input [47:0] C;
5160    input CARRYCASCIN;
5161    input CARRYIN;
5162    input [2:0] CARRYINSEL;
5163    input CEA1;
5164    input CEA2;
5165    input CEALUMODE;
5166    input CEB1;
5167    input CEB2;
5168    input CEC;
5169    input CECARRYIN;
5170    input CECTRL;
5171    input CEM;
5172    input CEMULTCARRYIN;
5173    input CEP;
5174    (* clkbuf_sink *)
5175    input CLK;
5176    input MULTSIGNIN;
5177    input [6:0] OPMODE;
5178    input [47:0] PCIN;
5179    input RSTA;
5180    input RSTALLCARRYIN;
5181    input RSTALUMODE;
5182    input RSTB;
5183    input RSTC;
5184    input RSTCTRL;
5185    input RSTM;
5186    input RSTP;
5187endmodule
5188
5189module DSP48E2 (...);
5190    parameter integer ACASCREG = 1;
5191    parameter integer ADREG = 1;
5192    parameter integer ALUMODEREG = 1;
5193    parameter AMULTSEL = "A";
5194    parameter integer AREG = 1;
5195    parameter AUTORESET_PATDET = "NO_RESET";
5196    parameter AUTORESET_PRIORITY = "RESET";
5197    parameter A_INPUT = "DIRECT";
5198    parameter integer BCASCREG = 1;
5199    parameter BMULTSEL = "B";
5200    parameter integer BREG = 1;
5201    parameter B_INPUT = "DIRECT";
5202    parameter integer CARRYINREG = 1;
5203    parameter integer CARRYINSELREG = 1;
5204    parameter integer CREG = 1;
5205    parameter integer DREG = 1;
5206    parameter integer INMODEREG = 1;
5207    parameter [3:0] IS_ALUMODE_INVERTED = 4'b0000;
5208    parameter [0:0] IS_CARRYIN_INVERTED = 1'b0;
5209    parameter [0:0] IS_CLK_INVERTED = 1'b0;
5210    parameter [4:0] IS_INMODE_INVERTED = 5'b00000;
5211    parameter [8:0] IS_OPMODE_INVERTED = 9'b000000000;
5212    parameter [0:0] IS_RSTALLCARRYIN_INVERTED = 1'b0;
5213    parameter [0:0] IS_RSTALUMODE_INVERTED = 1'b0;
5214    parameter [0:0] IS_RSTA_INVERTED = 1'b0;
5215    parameter [0:0] IS_RSTB_INVERTED = 1'b0;
5216    parameter [0:0] IS_RSTCTRL_INVERTED = 1'b0;
5217    parameter [0:0] IS_RSTC_INVERTED = 1'b0;
5218    parameter [0:0] IS_RSTD_INVERTED = 1'b0;
5219    parameter [0:0] IS_RSTINMODE_INVERTED = 1'b0;
5220    parameter [0:0] IS_RSTM_INVERTED = 1'b0;
5221    parameter [0:0] IS_RSTP_INVERTED = 1'b0;
5222    parameter [47:0] MASK = 48'h3FFFFFFFFFFF;
5223    parameter integer MREG = 1;
5224    parameter integer OPMODEREG = 1;
5225    parameter [47:0] PATTERN = 48'h000000000000;
5226    parameter PREADDINSEL = "A";
5227    parameter integer PREG = 1;
5228    parameter [47:0] RND = 48'h000000000000;
5229    parameter SEL_MASK = "MASK";
5230    parameter SEL_PATTERN = "PATTERN";
5231    parameter USE_MULT = "MULTIPLY";
5232    parameter USE_PATTERN_DETECT = "NO_PATDET";
5233    parameter USE_SIMD = "ONE48";
5234    parameter USE_WIDEXOR = "FALSE";
5235    parameter XORSIMD = "XOR24_48_96";
5236    output [29:0] ACOUT;
5237    output [17:0] BCOUT;
5238    output CARRYCASCOUT;
5239    output [3:0] CARRYOUT;
5240    output MULTSIGNOUT;
5241    output OVERFLOW;
5242    output [47:0] P;
5243    output PATTERNBDETECT;
5244    output PATTERNDETECT;
5245    output [47:0] PCOUT;
5246    output UNDERFLOW;
5247    output [7:0] XOROUT;
5248    input [29:0] A;
5249    input [29:0] ACIN;
5250    (* invertible_pin = "IS_ALUMODE_INVERTED" *)
5251    input [3:0] ALUMODE;
5252    input [17:0] B;
5253    input [17:0] BCIN;
5254    input [47:0] C;
5255    input CARRYCASCIN;
5256    (* invertible_pin = "IS_CARRYIN_INVERTED" *)
5257    input CARRYIN;
5258    input [2:0] CARRYINSEL;
5259    input CEA1;
5260    input CEA2;
5261    input CEAD;
5262    input CEALUMODE;
5263    input CEB1;
5264    input CEB2;
5265    input CEC;
5266    input CECARRYIN;
5267    input CECTRL;
5268    input CED;
5269    input CEINMODE;
5270    input CEM;
5271    input CEP;
5272    (* clkbuf_sink *)
5273    (* invertible_pin = "IS_CLK_INVERTED" *)
5274    input CLK;
5275    input [26:0] D;
5276    (* invertible_pin = "IS_INMODE_INVERTED" *)
5277    input [4:0] INMODE;
5278    input MULTSIGNIN;
5279    (* invertible_pin = "IS_OPMODE_INVERTED" *)
5280    input [8:0] OPMODE;
5281    input [47:0] PCIN;
5282    (* invertible_pin = "IS_RSTA_INVERTED" *)
5283    input RSTA;
5284    (* invertible_pin = "IS_RSTALLCARRYIN_INVERTED" *)
5285    input RSTALLCARRYIN;
5286    (* invertible_pin = "IS_RSTALUMODE_INVERTED" *)
5287    input RSTALUMODE;
5288    (* invertible_pin = "IS_RSTB_INVERTED" *)
5289    input RSTB;
5290    (* invertible_pin = "IS_RSTC_INVERTED" *)
5291    input RSTC;
5292    (* invertible_pin = "IS_RSTCTRL_INVERTED" *)
5293    input RSTCTRL;
5294    (* invertible_pin = "IS_RSTD_INVERTED" *)
5295    input RSTD;
5296    (* invertible_pin = "IS_RSTINMODE_INVERTED" *)
5297    input RSTINMODE;
5298    (* invertible_pin = "IS_RSTM_INVERTED" *)
5299    input RSTM;
5300    (* invertible_pin = "IS_RSTP_INVERTED" *)
5301    input RSTP;
5302endmodule
5303
5304module FDDRCPE (...);
5305    parameter INIT = 1'b0;
5306    (* clkbuf_sink *)
5307    input C0;
5308    (* clkbuf_sink *)
5309    input C1;
5310    input CE;
5311    input D0;
5312    input D1;
5313    input CLR;
5314    input PRE;
5315    output Q;
5316endmodule
5317
5318module FDDRRSE (...);
5319    parameter INIT = 1'b0;
5320    output Q;
5321    (* clkbuf_sink *)
5322    input C0;
5323    (* clkbuf_sink *)
5324    input C1;
5325    input CE;
5326    input D0;
5327    input D1;
5328    input R;
5329    input S;
5330endmodule
5331
5332module IFDDRCPE (...);
5333    output Q0;
5334    output Q1;
5335    (* clkbuf_sink *)
5336    input C0;
5337    (* clkbuf_sink *)
5338    input C1;
5339    input CE;
5340    input CLR;
5341    (* iopad_external_pin *)
5342    input D;
5343    input PRE;
5344endmodule
5345
5346module IFDDRRSE (...);
5347    output Q0;
5348    output Q1;
5349    (* clkbuf_sink *)
5350    input C0;
5351    (* clkbuf_sink *)
5352    input C1;
5353    input CE;
5354    (* iopad_external_pin *)
5355    input D;
5356    input R;
5357    input S;
5358endmodule
5359
5360module OFDDRCPE (...);
5361    (* iopad_external_pin *)
5362    output Q;
5363    (* clkbuf_sink *)
5364    input C0;
5365    (* clkbuf_sink *)
5366    input C1;
5367    input CE;
5368    input CLR;
5369    input D0;
5370    input D1;
5371    input PRE;
5372endmodule
5373
5374module OFDDRRSE (...);
5375    (* iopad_external_pin *)
5376    output Q;
5377    (* clkbuf_sink *)
5378    input C0;
5379    (* clkbuf_sink *)
5380    input C1;
5381    input CE;
5382    input D0;
5383    input D1;
5384    input R;
5385    input S;
5386endmodule
5387
5388module OFDDRTCPE (...);
5389    (* iopad_external_pin *)
5390    output O;
5391    (* clkbuf_sink *)
5392    input C0;
5393    (* clkbuf_sink *)
5394    input C1;
5395    input CE;
5396    input CLR;
5397    input D0;
5398    input D1;
5399    input PRE;
5400    input T;
5401endmodule
5402
5403module OFDDRTRSE (...);
5404    (* iopad_external_pin *)
5405    output O;
5406    (* clkbuf_sink *)
5407    input C0;
5408    (* clkbuf_sink *)
5409    input C1;
5410    input CE;
5411    input D0;
5412    input D1;
5413    input R;
5414    input S;
5415    input T;
5416endmodule
5417
5418module IDDR2 (...);
5419    parameter DDR_ALIGNMENT = "NONE";
5420    parameter [0:0] INIT_Q0 = 1'b0;
5421    parameter [0:0] INIT_Q1 = 1'b0;
5422    parameter SRTYPE = "SYNC";
5423    output Q0;
5424    output Q1;
5425    (* clkbuf_sink *)
5426    input C0;
5427    (* clkbuf_sink *)
5428    input C1;
5429    input CE;
5430    input D;
5431    input R;
5432    input S;
5433endmodule
5434
5435module ODDR2 (...);
5436    parameter DDR_ALIGNMENT = "NONE";
5437    parameter [0:0] INIT = 1'b0;
5438    parameter SRTYPE = "SYNC";
5439    output Q;
5440    (* clkbuf_sink *)
5441    input C0;
5442    (* clkbuf_sink *)
5443    input C1;
5444    input CE;
5445    input D0;
5446    input D1;
5447    input R;
5448    input S;
5449endmodule
5450
5451module IDDR (...);
5452    parameter DDR_CLK_EDGE = "OPPOSITE_EDGE";
5453    parameter INIT_Q1 = 1'b0;
5454    parameter INIT_Q2 = 1'b0;
5455    parameter [0:0] IS_C_INVERTED = 1'b0;
5456    parameter [0:0] IS_D_INVERTED = 1'b0;
5457    parameter SRTYPE = "SYNC";
5458    parameter MSGON = "TRUE";
5459    parameter XON = "TRUE";
5460    output Q1;
5461    output Q2;
5462    (* clkbuf_sink *)
5463    (* invertible_pin = "IS_C_INVERTED" *)
5464    input C;
5465    input CE;
5466    (* invertible_pin = "IS_D_INVERTED" *)
5467    input D;
5468    input R;
5469    input S;
5470endmodule
5471
5472module IDDR_2CLK (...);
5473    parameter DDR_CLK_EDGE = "OPPOSITE_EDGE";
5474    parameter INIT_Q1 = 1'b0;
5475    parameter INIT_Q2 = 1'b0;
5476    parameter [0:0] IS_CB_INVERTED = 1'b0;
5477    parameter [0:0] IS_C_INVERTED = 1'b0;
5478    parameter [0:0] IS_D_INVERTED = 1'b0;
5479    parameter SRTYPE = "SYNC";
5480    output Q1;
5481    output Q2;
5482    (* clkbuf_sink *)
5483    (* invertible_pin = "IS_C_INVERTED" *)
5484    input C;
5485    (* clkbuf_sink *)
5486    (* invertible_pin = "IS_CB_INVERTED" *)
5487    input CB;
5488    input CE;
5489    (* invertible_pin = "IS_D_INVERTED" *)
5490    input D;
5491    input R;
5492    input S;
5493endmodule
5494
5495module ODDR (...);
5496    parameter DDR_CLK_EDGE = "OPPOSITE_EDGE";
5497    parameter INIT = 1'b0;
5498    parameter [0:0] IS_C_INVERTED = 1'b0;
5499    parameter [0:0] IS_D1_INVERTED = 1'b0;
5500    parameter [0:0] IS_D2_INVERTED = 1'b0;
5501    parameter SRTYPE = "SYNC";
5502    parameter MSGON = "TRUE";
5503    parameter XON = "TRUE";
5504    output Q;
5505    (* clkbuf_sink *)
5506    (* invertible_pin = "IS_C_INVERTED" *)
5507    input C;
5508    input CE;
5509    (* invertible_pin = "IS_D1_INVERTED" *)
5510    input D1;
5511    (* invertible_pin = "IS_D2_INVERTED" *)
5512    input D2;
5513    input R;
5514    input S;
5515endmodule
5516
5517(* keep *)
5518module IDELAYCTRL (...);
5519    parameter SIM_DEVICE = "7SERIES";
5520    output RDY;
5521    (* clkbuf_sink *)
5522    input REFCLK;
5523    input RST;
5524endmodule
5525
5526module IDELAY (...);
5527    parameter IOBDELAY_TYPE = "DEFAULT";
5528    parameter integer IOBDELAY_VALUE = 0;
5529    output O;
5530    (* clkbuf_sink *)
5531    input C;
5532    input CE;
5533    input I;
5534    input INC;
5535    input RST;
5536endmodule
5537
5538module ISERDES (...);
5539    parameter BITSLIP_ENABLE = "FALSE";
5540    parameter DATA_RATE = "DDR";
5541    parameter integer DATA_WIDTH = 4;
5542    parameter [0:0] INIT_Q1 = 1'b0;
5543    parameter [0:0] INIT_Q2 = 1'b0;
5544    parameter [0:0] INIT_Q3 = 1'b0;
5545    parameter [0:0] INIT_Q4 = 1'b0;
5546    parameter INTERFACE_TYPE = "MEMORY";
5547    parameter IOBDELAY = "NONE";
5548    parameter IOBDELAY_TYPE = "DEFAULT";
5549    parameter integer IOBDELAY_VALUE = 0;
5550    parameter integer NUM_CE = 2;
5551    parameter SERDES_MODE = "MASTER";
5552    parameter integer SIM_DELAY_D = 0;
5553    parameter integer SIM_SETUP_D_CLK = 0;
5554    parameter integer SIM_HOLD_D_CLK = 0;
5555    parameter [0:0] SRVAL_Q1 = 1'b0;
5556    parameter [0:0] SRVAL_Q2 = 1'b0;
5557    parameter [0:0] SRVAL_Q3 = 1'b0;
5558    parameter [0:0] SRVAL_Q4 = 1'b0;
5559    output O;
5560    output Q1;
5561    output Q2;
5562    output Q3;
5563    output Q4;
5564    output Q5;
5565    output Q6;
5566    output SHIFTOUT1;
5567    output SHIFTOUT2;
5568    input BITSLIP;
5569    input CE1;
5570    input CE2;
5571    (* clkbuf_sink *)
5572    input CLK;
5573    (* clkbuf_sink *)
5574    input CLKDIV;
5575    input D;
5576    input DLYCE;
5577    input DLYINC;
5578    input DLYRST;
5579    (* clkbuf_sink *)
5580    input OCLK;
5581    input REV;
5582    input SHIFTIN1;
5583    input SHIFTIN2;
5584    input SR;
5585endmodule
5586
5587module OSERDES (...);
5588    parameter DATA_RATE_OQ = "DDR";
5589    parameter DATA_RATE_TQ = "DDR";
5590    parameter integer DATA_WIDTH = 4;
5591    parameter [0:0] INIT_OQ = 1'b0;
5592    parameter [0:0] INIT_TQ = 1'b0;
5593    parameter SERDES_MODE = "MASTER";
5594    parameter [0:0] SRVAL_OQ = 1'b0;
5595    parameter [0:0] SRVAL_TQ = 1'b0;
5596    parameter integer TRISTATE_WIDTH = 4;
5597    output OQ;
5598    output SHIFTOUT1;
5599    output SHIFTOUT2;
5600    output TQ;
5601    (* clkbuf_sink *)
5602    input CLK;
5603    (* clkbuf_sink *)
5604    input CLKDIV;
5605    input D1;
5606    input D2;
5607    input D3;
5608    input D4;
5609    input D5;
5610    input D6;
5611    input OCE;
5612    input REV;
5613    input SHIFTIN1;
5614    input SHIFTIN2;
5615    input SR;
5616    input T1;
5617    input T2;
5618    input T3;
5619    input T4;
5620    input TCE;
5621endmodule
5622
5623module IODELAY (...);
5624    parameter DELAY_SRC = "I";
5625    parameter HIGH_PERFORMANCE_MODE = "TRUE";
5626    parameter IDELAY_TYPE = "DEFAULT";
5627    parameter integer IDELAY_VALUE = 0;
5628    parameter integer ODELAY_VALUE = 0;
5629    parameter real REFCLK_FREQUENCY = 200.0;
5630    parameter SIGNAL_PATTERN = "DATA";
5631    output DATAOUT;
5632    (* clkbuf_sink *)
5633    input C;
5634    input CE;
5635    input DATAIN;
5636    input IDATAIN;
5637    input INC;
5638    input ODATAIN;
5639    input RST;
5640    input T;
5641endmodule
5642
5643module ISERDES_NODELAY (...);
5644    parameter BITSLIP_ENABLE = "FALSE";
5645    parameter DATA_RATE = "DDR";
5646    parameter integer DATA_WIDTH = 4;
5647    parameter INIT_Q1 = 1'b0;
5648    parameter INIT_Q2 = 1'b0;
5649    parameter INIT_Q3 = 1'b0;
5650    parameter INIT_Q4 = 1'b0;
5651    parameter INTERFACE_TYPE = "MEMORY";
5652    parameter integer NUM_CE = 2;
5653    parameter SERDES_MODE = "MASTER";
5654    output Q1;
5655    output Q2;
5656    output Q3;
5657    output Q4;
5658    output Q5;
5659    output Q6;
5660    output SHIFTOUT1;
5661    output SHIFTOUT2;
5662    input BITSLIP;
5663    input CE1;
5664    input CE2;
5665    (* clkbuf_sink *)
5666    input CLK;
5667    (* clkbuf_sink *)
5668    input CLKB;
5669    (* clkbuf_sink *)
5670    input CLKDIV;
5671    input D;
5672    (* clkbuf_sink *)
5673    input OCLK;
5674    input RST;
5675    input SHIFTIN1;
5676    input SHIFTIN2;
5677endmodule
5678
5679module IODELAYE1 (...);
5680    parameter CINVCTRL_SEL = "FALSE";
5681    parameter DELAY_SRC = "I";
5682    parameter HIGH_PERFORMANCE_MODE = "FALSE";
5683    parameter IDELAY_TYPE = "DEFAULT";
5684    parameter integer IDELAY_VALUE = 0;
5685    parameter ODELAY_TYPE = "FIXED";
5686    parameter integer ODELAY_VALUE = 0;
5687    parameter real REFCLK_FREQUENCY = 200.0;
5688    parameter SIGNAL_PATTERN = "DATA";
5689    output [4:0] CNTVALUEOUT;
5690    output DATAOUT;
5691    (* clkbuf_sink *)
5692    input C;
5693    input CE;
5694    input CINVCTRL;
5695    input CLKIN;
5696    input [4:0] CNTVALUEIN;
5697    input DATAIN;
5698    input IDATAIN;
5699    input INC;
5700    input ODATAIN;
5701    input RST;
5702    input T;
5703endmodule
5704
5705module ISERDESE1 (...);
5706    parameter DATA_RATE = "DDR";
5707    parameter integer DATA_WIDTH = 4;
5708    parameter DYN_CLKDIV_INV_EN = "FALSE";
5709    parameter DYN_CLK_INV_EN = "FALSE";
5710    parameter [0:0] INIT_Q1 = 1'b0;
5711    parameter [0:0] INIT_Q2 = 1'b0;
5712    parameter [0:0] INIT_Q3 = 1'b0;
5713    parameter [0:0] INIT_Q4 = 1'b0;
5714    parameter INTERFACE_TYPE = "MEMORY";
5715    parameter integer NUM_CE = 2;
5716    parameter IOBDELAY = "NONE";
5717    parameter OFB_USED = "FALSE";
5718    parameter SERDES_MODE = "MASTER";
5719    parameter [0:0] SRVAL_Q1 = 1'b0;
5720    parameter [0:0] SRVAL_Q2 = 1'b0;
5721    parameter [0:0] SRVAL_Q3 = 1'b0;
5722    parameter [0:0] SRVAL_Q4 = 1'b0;
5723    output O;
5724    output Q1;
5725    output Q2;
5726    output Q3;
5727    output Q4;
5728    output Q5;
5729    output Q6;
5730    output SHIFTOUT1;
5731    output SHIFTOUT2;
5732    input BITSLIP;
5733    input CE1;
5734    input CE2;
5735    (* clkbuf_sink *)
5736    input CLK;
5737    (* clkbuf_sink *)
5738    input CLKB;
5739    (* clkbuf_sink *)
5740    input CLKDIV;
5741    input D;
5742    input DDLY;
5743    input DYNCLKDIVSEL;
5744    input DYNCLKSEL;
5745    (* clkbuf_sink *)
5746    input OCLK;
5747    input OFB;
5748    input RST;
5749    input SHIFTIN1;
5750    input SHIFTIN2;
5751endmodule
5752
5753module OSERDESE1 (...);
5754    parameter DATA_RATE_OQ = "DDR";
5755    parameter DATA_RATE_TQ = "DDR";
5756    parameter integer DATA_WIDTH = 4;
5757    parameter integer DDR3_DATA = 1;
5758    parameter [0:0] INIT_OQ = 1'b0;
5759    parameter [0:0] INIT_TQ = 1'b0;
5760    parameter INTERFACE_TYPE = "DEFAULT";
5761    parameter integer ODELAY_USED = 0;
5762    parameter SERDES_MODE = "MASTER";
5763    parameter [0:0] SRVAL_OQ = 1'b0;
5764    parameter [0:0] SRVAL_TQ = 1'b0;
5765    parameter integer TRISTATE_WIDTH = 4;
5766    output OCBEXTEND;
5767    output OFB;
5768    output OQ;
5769    output SHIFTOUT1;
5770    output SHIFTOUT2;
5771    output TFB;
5772    output TQ;
5773    (* clkbuf_sink *)
5774    input CLK;
5775    (* clkbuf_sink *)
5776    input CLKDIV;
5777    input CLKPERF;
5778    input CLKPERFDELAY;
5779    input D1;
5780    input D2;
5781    input D3;
5782    input D4;
5783    input D5;
5784    input D6;
5785    input OCE;
5786    input ODV;
5787    input RST;
5788    input SHIFTIN1;
5789    input SHIFTIN2;
5790    input T1;
5791    input T2;
5792    input T3;
5793    input T4;
5794    input TCE;
5795    input WC;
5796endmodule
5797
5798module IDELAYE2 (...);
5799    parameter CINVCTRL_SEL = "FALSE";
5800    parameter DELAY_SRC = "IDATAIN";
5801    parameter HIGH_PERFORMANCE_MODE = "FALSE";
5802    parameter IDELAY_TYPE = "FIXED";
5803    parameter integer IDELAY_VALUE = 0;
5804    parameter [0:0] IS_C_INVERTED = 1'b0;
5805    parameter [0:0] IS_DATAIN_INVERTED = 1'b0;
5806    parameter [0:0] IS_IDATAIN_INVERTED = 1'b0;
5807    parameter PIPE_SEL = "FALSE";
5808    parameter real REFCLK_FREQUENCY = 200.0;
5809    parameter SIGNAL_PATTERN = "DATA";
5810    parameter integer SIM_DELAY_D = 0;
5811    output [4:0] CNTVALUEOUT;
5812    output DATAOUT;
5813    (* clkbuf_sink *)
5814    (* invertible_pin = "IS_C_INVERTED" *)
5815    input C;
5816    input CE;
5817    input CINVCTRL;
5818    input [4:0] CNTVALUEIN;
5819    (* invertible_pin = "IS_DATAIN_INVERTED" *)
5820    input DATAIN;
5821    (* invertible_pin = "IS_IDATAIN_INVERTED" *)
5822    input IDATAIN;
5823    input INC;
5824    input LD;
5825    input LDPIPEEN;
5826    input REGRST;
5827endmodule
5828
5829module ODELAYE2 (...);
5830    parameter CINVCTRL_SEL = "FALSE";
5831    parameter DELAY_SRC = "ODATAIN";
5832    parameter HIGH_PERFORMANCE_MODE = "FALSE";
5833    parameter [0:0] IS_C_INVERTED = 1'b0;
5834    parameter [0:0] IS_ODATAIN_INVERTED = 1'b0;
5835    parameter ODELAY_TYPE = "FIXED";
5836    parameter integer ODELAY_VALUE = 0;
5837    parameter PIPE_SEL = "FALSE";
5838    parameter real REFCLK_FREQUENCY = 200.0;
5839    parameter SIGNAL_PATTERN = "DATA";
5840    parameter integer SIM_DELAY_D = 0;
5841    output [4:0] CNTVALUEOUT;
5842    output DATAOUT;
5843    (* clkbuf_sink *)
5844    (* invertible_pin = "IS_C_INVERTED" *)
5845    input C;
5846    input CE;
5847    input CINVCTRL;
5848    input CLKIN;
5849    input [4:0] CNTVALUEIN;
5850    input INC;
5851    input LD;
5852    input LDPIPEEN;
5853    (* invertible_pin = "IS_ODATAIN_INVERTED" *)
5854    input ODATAIN;
5855    input REGRST;
5856endmodule
5857
5858module ISERDESE2 (...);
5859    parameter DATA_RATE = "DDR";
5860    parameter integer DATA_WIDTH = 4;
5861    parameter DYN_CLKDIV_INV_EN = "FALSE";
5862    parameter DYN_CLK_INV_EN = "FALSE";
5863    parameter [0:0] INIT_Q1 = 1'b0;
5864    parameter [0:0] INIT_Q2 = 1'b0;
5865    parameter [0:0] INIT_Q3 = 1'b0;
5866    parameter [0:0] INIT_Q4 = 1'b0;
5867    parameter INTERFACE_TYPE = "MEMORY";
5868    parameter IOBDELAY = "NONE";
5869    parameter [0:0] IS_CLKB_INVERTED = 1'b0;
5870    parameter [0:0] IS_CLKDIVP_INVERTED = 1'b0;
5871    parameter [0:0] IS_CLKDIV_INVERTED = 1'b0;
5872    parameter [0:0] IS_CLK_INVERTED = 1'b0;
5873    parameter [0:0] IS_D_INVERTED = 1'b0;
5874    parameter [0:0] IS_OCLKB_INVERTED = 1'b0;
5875    parameter [0:0] IS_OCLK_INVERTED = 1'b0;
5876    parameter integer NUM_CE = 2;
5877    parameter OFB_USED = "FALSE";
5878    parameter SERDES_MODE = "MASTER";
5879    parameter [0:0] SRVAL_Q1 = 1'b0;
5880    parameter [0:0] SRVAL_Q2 = 1'b0;
5881    parameter [0:0] SRVAL_Q3 = 1'b0;
5882    parameter [0:0] SRVAL_Q4 = 1'b0;
5883    output O;
5884    output Q1;
5885    output Q2;
5886    output Q3;
5887    output Q4;
5888    output Q5;
5889    output Q6;
5890    output Q7;
5891    output Q8;
5892    output SHIFTOUT1;
5893    output SHIFTOUT2;
5894    input BITSLIP;
5895    input CE1;
5896    input CE2;
5897    (* clkbuf_sink *)
5898    (* invertible_pin = "IS_CLK_INVERTED" *)
5899    input CLK;
5900    (* clkbuf_sink *)
5901    (* invertible_pin = "IS_CLKB_INVERTED" *)
5902    input CLKB;
5903    (* clkbuf_sink *)
5904    (* invertible_pin = "IS_CLKDIV_INVERTED" *)
5905    input CLKDIV;
5906    (* clkbuf_sink *)
5907    (* invertible_pin = "IS_CLKDIVP_INVERTED" *)
5908    input CLKDIVP;
5909    (* invertible_pin = "IS_D_INVERTED" *)
5910    input D;
5911    input DDLY;
5912    input DYNCLKDIVSEL;
5913    input DYNCLKSEL;
5914    (* clkbuf_sink *)
5915    (* invertible_pin = "IS_OCLK_INVERTED" *)
5916    input OCLK;
5917    (* clkbuf_sink *)
5918    (* invertible_pin = "IS_OCLKB_INVERTED" *)
5919    input OCLKB;
5920    input OFB;
5921    input RST;
5922    input SHIFTIN1;
5923    input SHIFTIN2;
5924endmodule
5925
5926module OSERDESE2 (...);
5927    parameter DATA_RATE_OQ = "DDR";
5928    parameter DATA_RATE_TQ = "DDR";
5929    parameter integer DATA_WIDTH = 4;
5930    parameter [0:0] INIT_OQ = 1'b0;
5931    parameter [0:0] INIT_TQ = 1'b0;
5932    parameter [0:0] IS_CLKDIV_INVERTED = 1'b0;
5933    parameter [0:0] IS_CLK_INVERTED = 1'b0;
5934    parameter [0:0] IS_D1_INVERTED = 1'b0;
5935    parameter [0:0] IS_D2_INVERTED = 1'b0;
5936    parameter [0:0] IS_D3_INVERTED = 1'b0;
5937    parameter [0:0] IS_D4_INVERTED = 1'b0;
5938    parameter [0:0] IS_D5_INVERTED = 1'b0;
5939    parameter [0:0] IS_D6_INVERTED = 1'b0;
5940    parameter [0:0] IS_D7_INVERTED = 1'b0;
5941    parameter [0:0] IS_D8_INVERTED = 1'b0;
5942    parameter [0:0] IS_T1_INVERTED = 1'b0;
5943    parameter [0:0] IS_T2_INVERTED = 1'b0;
5944    parameter [0:0] IS_T3_INVERTED = 1'b0;
5945    parameter [0:0] IS_T4_INVERTED = 1'b0;
5946    parameter SERDES_MODE = "MASTER";
5947    parameter [0:0] SRVAL_OQ = 1'b0;
5948    parameter [0:0] SRVAL_TQ = 1'b0;
5949    parameter TBYTE_CTL = "FALSE";
5950    parameter TBYTE_SRC = "FALSE";
5951    parameter integer TRISTATE_WIDTH = 4;
5952    output OFB;
5953    output OQ;
5954    output SHIFTOUT1;
5955    output SHIFTOUT2;
5956    output TBYTEOUT;
5957    output TFB;
5958    output TQ;
5959    (* clkbuf_sink *)
5960    (* invertible_pin = "IS_CLK_INVERTED" *)
5961    input CLK;
5962    (* clkbuf_sink *)
5963    (* invertible_pin = "IS_CLKDIV_INVERTED" *)
5964    input CLKDIV;
5965    (* invertible_pin = "IS_D1_INVERTED" *)
5966    input D1;
5967    (* invertible_pin = "IS_D2_INVERTED" *)
5968    input D2;
5969    (* invertible_pin = "IS_D3_INVERTED" *)
5970    input D3;
5971    (* invertible_pin = "IS_D4_INVERTED" *)
5972    input D4;
5973    (* invertible_pin = "IS_D5_INVERTED" *)
5974    input D5;
5975    (* invertible_pin = "IS_D6_INVERTED" *)
5976    input D6;
5977    (* invertible_pin = "IS_D7_INVERTED" *)
5978    input D7;
5979    (* invertible_pin = "IS_D8_INVERTED" *)
5980    input D8;
5981    input OCE;
5982    input RST;
5983    input SHIFTIN1;
5984    input SHIFTIN2;
5985    (* invertible_pin = "IS_T1_INVERTED" *)
5986    input T1;
5987    (* invertible_pin = "IS_T2_INVERTED" *)
5988    input T2;
5989    (* invertible_pin = "IS_T3_INVERTED" *)
5990    input T3;
5991    (* invertible_pin = "IS_T4_INVERTED" *)
5992    input T4;
5993    input TBYTEIN;
5994    input TCE;
5995endmodule
5996
5997(* keep *)
5998module PHASER_IN (...);
5999    parameter integer CLKOUT_DIV = 4;
6000    parameter DQS_BIAS_MODE = "FALSE";
6001    parameter EN_ISERDES_RST = "FALSE";
6002    parameter integer FINE_DELAY = 0;
6003    parameter FREQ_REF_DIV = "NONE";
6004    parameter [0:0] IS_RST_INVERTED = 1'b0;
6005    parameter real MEMREFCLK_PERIOD = 0.000;
6006    parameter OUTPUT_CLK_SRC = "PHASE_REF";
6007    parameter real PHASEREFCLK_PERIOD = 0.000;
6008    parameter real REFCLK_PERIOD = 0.000;
6009    parameter integer SEL_CLK_OFFSET = 5;
6010    parameter SYNC_IN_DIV_RST = "FALSE";
6011    output FINEOVERFLOW;
6012    output ICLK;
6013    output ICLKDIV;
6014    output ISERDESRST;
6015    output RCLK;
6016    output [5:0] COUNTERREADVAL;
6017    input COUNTERLOADEN;
6018    input COUNTERREADEN;
6019    input DIVIDERST;
6020    input EDGEADV;
6021    input FINEENABLE;
6022    input FINEINC;
6023    input FREQREFCLK;
6024    input MEMREFCLK;
6025    input PHASEREFCLK;
6026    (* invertible_pin = "IS_RST_INVERTED" *)
6027    input RST;
6028    input SYNCIN;
6029    input SYSCLK;
6030    input [1:0] RANKSEL;
6031    input [5:0] COUNTERLOADVAL;
6032endmodule
6033
6034(* keep *)
6035module PHASER_IN_PHY (...);
6036    parameter BURST_MODE = "FALSE";
6037    parameter integer CLKOUT_DIV = 4;
6038    parameter [0:0] DQS_AUTO_RECAL = 1'b1;
6039    parameter DQS_BIAS_MODE = "FALSE";
6040    parameter [2:0] DQS_FIND_PATTERN = 3'b001;
6041    parameter integer FINE_DELAY = 0;
6042    parameter FREQ_REF_DIV = "NONE";
6043    parameter [0:0] IS_RST_INVERTED = 1'b0;
6044    parameter real MEMREFCLK_PERIOD = 0.000;
6045    parameter OUTPUT_CLK_SRC = "PHASE_REF";
6046    parameter real PHASEREFCLK_PERIOD = 0.000;
6047    parameter real REFCLK_PERIOD = 0.000;
6048    parameter integer SEL_CLK_OFFSET = 5;
6049    parameter SYNC_IN_DIV_RST = "FALSE";
6050    parameter WR_CYCLES = "FALSE";
6051    output DQSFOUND;
6052    output DQSOUTOFRANGE;
6053    output FINEOVERFLOW;
6054    output ICLK;
6055    output ICLKDIV;
6056    output ISERDESRST;
6057    output PHASELOCKED;
6058    output RCLK;
6059    output WRENABLE;
6060    output [5:0] COUNTERREADVAL;
6061    input BURSTPENDINGPHY;
6062    input COUNTERLOADEN;
6063    input COUNTERREADEN;
6064    input FINEENABLE;
6065    input FINEINC;
6066    input FREQREFCLK;
6067    input MEMREFCLK;
6068    input PHASEREFCLK;
6069    (* invertible_pin = "IS_RST_INVERTED" *)
6070    input RST;
6071    input RSTDQSFIND;
6072    input SYNCIN;
6073    input SYSCLK;
6074    input [1:0] ENCALIBPHY;
6075    input [1:0] RANKSELPHY;
6076    input [5:0] COUNTERLOADVAL;
6077endmodule
6078
6079(* keep *)
6080module PHASER_OUT (...);
6081    parameter integer CLKOUT_DIV = 4;
6082    parameter COARSE_BYPASS = "FALSE";
6083    parameter integer COARSE_DELAY = 0;
6084    parameter EN_OSERDES_RST = "FALSE";
6085    parameter integer FINE_DELAY = 0;
6086    parameter [0:0] IS_RST_INVERTED = 1'b0;
6087    parameter real MEMREFCLK_PERIOD = 0.000;
6088    parameter OCLKDELAY_INV = "FALSE";
6089    parameter integer OCLK_DELAY = 0;
6090    parameter OUTPUT_CLK_SRC = "PHASE_REF";
6091    parameter real PHASEREFCLK_PERIOD = 0.000;
6092    parameter [2:0] PO = 3'b000;
6093    parameter real REFCLK_PERIOD = 0.000;
6094    parameter SYNC_IN_DIV_RST = "FALSE";
6095    output COARSEOVERFLOW;
6096    output FINEOVERFLOW;
6097    output OCLK;
6098    output OCLKDELAYED;
6099    output OCLKDIV;
6100    output OSERDESRST;
6101    output [8:0] COUNTERREADVAL;
6102    input COARSEENABLE;
6103    input COARSEINC;
6104    input COUNTERLOADEN;
6105    input COUNTERREADEN;
6106    input DIVIDERST;
6107    input EDGEADV;
6108    input FINEENABLE;
6109    input FINEINC;
6110    input FREQREFCLK;
6111    input MEMREFCLK;
6112    input PHASEREFCLK;
6113    (* invertible_pin = "IS_RST_INVERTED" *)
6114    input RST;
6115    input SELFINEOCLKDELAY;
6116    input SYNCIN;
6117    input SYSCLK;
6118    input [8:0] COUNTERLOADVAL;
6119endmodule
6120
6121(* keep *)
6122module PHASER_OUT_PHY (...);
6123    parameter integer CLKOUT_DIV = 4;
6124    parameter COARSE_BYPASS = "FALSE";
6125    parameter integer COARSE_DELAY = 0;
6126    parameter DATA_CTL_N = "FALSE";
6127    parameter DATA_RD_CYCLES = "FALSE";
6128    parameter integer FINE_DELAY = 0;
6129    parameter [0:0] IS_RST_INVERTED = 1'b0;
6130    parameter real MEMREFCLK_PERIOD = 0.000;
6131    parameter OCLKDELAY_INV = "FALSE";
6132    parameter integer OCLK_DELAY = 0;
6133    parameter OUTPUT_CLK_SRC = "PHASE_REF";
6134    parameter real PHASEREFCLK_PERIOD = 0.000;
6135    parameter [2:0] PO = 3'b000;
6136    parameter real REFCLK_PERIOD = 0.000;
6137    parameter SYNC_IN_DIV_RST = "FALSE";
6138    output COARSEOVERFLOW;
6139    output FINEOVERFLOW;
6140    output OCLK;
6141    output OCLKDELAYED;
6142    output OCLKDIV;
6143    output OSERDESRST;
6144    output RDENABLE;
6145    output [1:0] CTSBUS;
6146    output [1:0] DQSBUS;
6147    output [1:0] DTSBUS;
6148    output [8:0] COUNTERREADVAL;
6149    input BURSTPENDINGPHY;
6150    input COARSEENABLE;
6151    input COARSEINC;
6152    input COUNTERLOADEN;
6153    input COUNTERREADEN;
6154    input FINEENABLE;
6155    input FINEINC;
6156    input FREQREFCLK;
6157    input MEMREFCLK;
6158    input PHASEREFCLK;
6159    (* invertible_pin = "IS_RST_INVERTED" *)
6160    input RST;
6161    input SELFINEOCLKDELAY;
6162    input SYNCIN;
6163    input SYSCLK;
6164    input [1:0] ENCALIBPHY;
6165    input [8:0] COUNTERLOADVAL;
6166endmodule
6167
6168(* keep *)
6169module PHASER_REF (...);
6170    parameter [0:0] IS_RST_INVERTED = 1'b0;
6171    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
6172    output LOCKED;
6173    input CLKIN;
6174    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
6175    input PWRDWN;
6176    (* invertible_pin = "IS_RST_INVERTED" *)
6177    input RST;
6178endmodule
6179
6180(* keep *)
6181module PHY_CONTROL (...);
6182    parameter integer AO_TOGGLE = 0;
6183    parameter [3:0] AO_WRLVL_EN = 4'b0000;
6184    parameter BURST_MODE = "FALSE";
6185    parameter integer CLK_RATIO = 1;
6186    parameter integer CMD_OFFSET = 0;
6187    parameter integer CO_DURATION = 0;
6188    parameter DATA_CTL_A_N = "FALSE";
6189    parameter DATA_CTL_B_N = "FALSE";
6190    parameter DATA_CTL_C_N = "FALSE";
6191    parameter DATA_CTL_D_N = "FALSE";
6192    parameter DISABLE_SEQ_MATCH = "TRUE";
6193    parameter integer DI_DURATION = 0;
6194    parameter integer DO_DURATION = 0;
6195    parameter integer EVENTS_DELAY = 63;
6196    parameter integer FOUR_WINDOW_CLOCKS = 63;
6197    parameter MULTI_REGION = "FALSE";
6198    parameter PHY_COUNT_ENABLE = "FALSE";
6199    parameter integer RD_CMD_OFFSET_0 = 0;
6200    parameter integer RD_CMD_OFFSET_1 = 00;
6201    parameter integer RD_CMD_OFFSET_2 = 0;
6202    parameter integer RD_CMD_OFFSET_3 = 0;
6203    parameter integer RD_DURATION_0 = 0;
6204    parameter integer RD_DURATION_1 = 0;
6205    parameter integer RD_DURATION_2 = 0;
6206    parameter integer RD_DURATION_3 = 0;
6207    parameter SYNC_MODE = "FALSE";
6208    parameter integer WR_CMD_OFFSET_0 = 0;
6209    parameter integer WR_CMD_OFFSET_1 = 0;
6210    parameter integer WR_CMD_OFFSET_2 = 0;
6211    parameter integer WR_CMD_OFFSET_3 = 0;
6212    parameter integer WR_DURATION_0 = 0;
6213    parameter integer WR_DURATION_1 = 0;
6214    parameter integer WR_DURATION_2 = 0;
6215    parameter integer WR_DURATION_3 = 0;
6216    output PHYCTLALMOSTFULL;
6217    output PHYCTLEMPTY;
6218    output PHYCTLFULL;
6219    output PHYCTLREADY;
6220    output [1:0] INRANKA;
6221    output [1:0] INRANKB;
6222    output [1:0] INRANKC;
6223    output [1:0] INRANKD;
6224    output [1:0] PCENABLECALIB;
6225    output [3:0] AUXOUTPUT;
6226    output [3:0] INBURSTPENDING;
6227    output [3:0] OUTBURSTPENDING;
6228    input MEMREFCLK;
6229    input PHYCLK;
6230    input PHYCTLMSTREMPTY;
6231    input PHYCTLWRENABLE;
6232    input PLLLOCK;
6233    input READCALIBENABLE;
6234    input REFDLLLOCK;
6235    input RESET;
6236    input SYNCIN;
6237    input WRITECALIBENABLE;
6238    input [31:0] PHYCTLWD;
6239endmodule
6240
6241module IDDRE1 (...);
6242    parameter DDR_CLK_EDGE = "OPPOSITE_EDGE";
6243    parameter [0:0] IS_CB_INVERTED = 1'b0;
6244    parameter [0:0] IS_C_INVERTED = 1'b0;
6245    output Q1;
6246    output Q2;
6247    (* clkbuf_sink *)
6248    (* invertible_pin = "IS_C_INVERTED" *)
6249    input C;
6250    (* clkbuf_sink *)
6251    (* invertible_pin = "IS_CB_INVERTED" *)
6252    input CB;
6253    input D;
6254    input R;
6255endmodule
6256
6257module ODDRE1 (...);
6258    parameter [0:0] IS_C_INVERTED = 1'b0;
6259    parameter [0:0] IS_D1_INVERTED = 1'b0;
6260    parameter [0:0] IS_D2_INVERTED = 1'b0;
6261    parameter SIM_DEVICE = "ULTRASCALE";
6262    parameter [0:0] SRVAL = 1'b0;
6263    output Q;
6264    (* clkbuf_sink *)
6265    (* invertible_pin = "IS_C_INVERTED" *)
6266    input C;
6267    (* invertible_pin = "IS_D1_INVERTED" *)
6268    input D1;
6269    (* invertible_pin = "IS_D2_INVERTED" *)
6270    input D2;
6271    input SR;
6272endmodule
6273
6274module IDELAYE3 (...);
6275    parameter CASCADE = "NONE";
6276    parameter DELAY_FORMAT = "TIME";
6277    parameter DELAY_SRC = "IDATAIN";
6278    parameter DELAY_TYPE = "FIXED";
6279    parameter integer DELAY_VALUE = 0;
6280    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6281    parameter [0:0] IS_RST_INVERTED = 1'b0;
6282    parameter LOOPBACK = "FALSE";
6283    parameter real REFCLK_FREQUENCY = 300.0;
6284    parameter SIM_DEVICE = "ULTRASCALE";
6285    parameter real SIM_VERSION = 2.0;
6286    parameter UPDATE_MODE = "ASYNC";
6287    output CASC_OUT;
6288    output [8:0] CNTVALUEOUT;
6289    output DATAOUT;
6290    input CASC_IN;
6291    input CASC_RETURN;
6292    input CE;
6293    (* clkbuf_sink *)
6294    (* invertible_pin = "IS_CLK_INVERTED" *)
6295    input CLK;
6296    input [8:0] CNTVALUEIN;
6297    input DATAIN;
6298    input EN_VTC;
6299    input IDATAIN;
6300    input INC;
6301    input LOAD;
6302    (* invertible_pin = "IS_RST_INVERTED" *)
6303    input RST;
6304endmodule
6305
6306module ODELAYE3 (...);
6307    parameter CASCADE = "NONE";
6308    parameter DELAY_FORMAT = "TIME";
6309    parameter DELAY_TYPE = "FIXED";
6310    parameter integer DELAY_VALUE = 0;
6311    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6312    parameter [0:0] IS_RST_INVERTED = 1'b0;
6313    parameter real REFCLK_FREQUENCY = 300.0;
6314    parameter SIM_DEVICE = "ULTRASCALE";
6315    parameter real SIM_VERSION = 2.0;
6316    parameter UPDATE_MODE = "ASYNC";
6317    output CASC_OUT;
6318    output [8:0] CNTVALUEOUT;
6319    output DATAOUT;
6320    input CASC_IN;
6321    input CASC_RETURN;
6322    input CE;
6323    (* clkbuf_sink *)
6324    (* invertible_pin = "IS_CLK_INVERTED" *)
6325    input CLK;
6326    input [8:0] CNTVALUEIN;
6327    input EN_VTC;
6328    input INC;
6329    input LOAD;
6330    input ODATAIN;
6331    (* invertible_pin = "IS_RST_INVERTED" *)
6332    input RST;
6333endmodule
6334
6335module ISERDESE3 (...);
6336    parameter integer DATA_WIDTH = 8;
6337    parameter DDR_CLK_EDGE = "OPPOSITE_EDGE";
6338    parameter FIFO_ENABLE = "FALSE";
6339    parameter FIFO_SYNC_MODE = "FALSE";
6340    parameter IDDR_MODE = "FALSE";
6341    parameter [0:0] IS_CLK_B_INVERTED = 1'b0;
6342    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6343    parameter [0:0] IS_RST_INVERTED = 1'b0;
6344    parameter SIM_DEVICE = "ULTRASCALE";
6345    parameter real SIM_VERSION = 2.0;
6346    output FIFO_EMPTY;
6347    output INTERNAL_DIVCLK;
6348    output [7:0] Q;
6349    (* clkbuf_sink *)
6350    (* invertible_pin = "IS_CLK_INVERTED" *)
6351    input CLK;
6352    (* clkbuf_sink *)
6353    input CLKDIV;
6354    (* clkbuf_sink *)
6355    (* invertible_pin = "IS_CLK_B_INVERTED" *)
6356    input CLK_B;
6357    input D;
6358    (* clkbuf_sink *)
6359    input FIFO_RD_CLK;
6360    input FIFO_RD_EN;
6361    (* invertible_pin = "IS_RST_INVERTED" *)
6362    input RST;
6363endmodule
6364
6365module OSERDESE3 (...);
6366    parameter integer DATA_WIDTH = 8;
6367    parameter [0:0] INIT = 1'b0;
6368    parameter [0:0] IS_CLKDIV_INVERTED = 1'b0;
6369    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6370    parameter [0:0] IS_RST_INVERTED = 1'b0;
6371    parameter ODDR_MODE = "FALSE";
6372    parameter OSERDES_D_BYPASS = "FALSE";
6373    parameter OSERDES_T_BYPASS = "FALSE";
6374    parameter SIM_DEVICE = "ULTRASCALE";
6375    parameter real SIM_VERSION = 2.0;
6376    output OQ;
6377    output T_OUT;
6378    (* clkbuf_sink *)
6379    (* invertible_pin = "IS_CLK_INVERTED" *)
6380    input CLK;
6381    (* clkbuf_sink *)
6382    (* invertible_pin = "IS_CLKDIV_INVERTED" *)
6383    input CLKDIV;
6384    input [7:0] D;
6385    (* invertible_pin = "IS_RST_INVERTED" *)
6386    input RST;
6387    input T;
6388endmodule
6389
6390(* keep *)
6391module BITSLICE_CONTROL (...);
6392    parameter CTRL_CLK = "EXTERNAL";
6393    parameter DIV_MODE = "DIV2";
6394    parameter EN_CLK_TO_EXT_NORTH = "DISABLE";
6395    parameter EN_CLK_TO_EXT_SOUTH = "DISABLE";
6396    parameter EN_DYN_ODLY_MODE = "FALSE";
6397    parameter EN_OTHER_NCLK = "FALSE";
6398    parameter EN_OTHER_PCLK = "FALSE";
6399    parameter IDLY_VT_TRACK = "TRUE";
6400    parameter INV_RXCLK = "FALSE";
6401    parameter ODLY_VT_TRACK = "TRUE";
6402    parameter QDLY_VT_TRACK = "TRUE";
6403    parameter [5:0] READ_IDLE_COUNT = 6'h00;
6404    parameter REFCLK_SRC = "PLLCLK";
6405    parameter integer ROUNDING_FACTOR = 16;
6406    parameter RXGATE_EXTEND = "FALSE";
6407    parameter RX_CLK_PHASE_N = "SHIFT_0";
6408    parameter RX_CLK_PHASE_P = "SHIFT_0";
6409    parameter RX_GATING = "DISABLE";
6410    parameter SELF_CALIBRATE = "ENABLE";
6411    parameter SERIAL_MODE = "FALSE";
6412    parameter SIM_DEVICE = "ULTRASCALE";
6413    parameter SIM_SPEEDUP = "FAST";
6414    parameter real SIM_VERSION = 2.0;
6415    parameter TX_GATING = "DISABLE";
6416    output CLK_TO_EXT_NORTH;
6417    output CLK_TO_EXT_SOUTH;
6418    output DLY_RDY;
6419    output [6:0] DYN_DCI;
6420    output NCLK_NIBBLE_OUT;
6421    output PCLK_NIBBLE_OUT;
6422    output [15:0] RIU_RD_DATA;
6423    output RIU_VALID;
6424    output [39:0] RX_BIT_CTRL_OUT0;
6425    output [39:0] RX_BIT_CTRL_OUT1;
6426    output [39:0] RX_BIT_CTRL_OUT2;
6427    output [39:0] RX_BIT_CTRL_OUT3;
6428    output [39:0] RX_BIT_CTRL_OUT4;
6429    output [39:0] RX_BIT_CTRL_OUT5;
6430    output [39:0] RX_BIT_CTRL_OUT6;
6431    output [39:0] TX_BIT_CTRL_OUT0;
6432    output [39:0] TX_BIT_CTRL_OUT1;
6433    output [39:0] TX_BIT_CTRL_OUT2;
6434    output [39:0] TX_BIT_CTRL_OUT3;
6435    output [39:0] TX_BIT_CTRL_OUT4;
6436    output [39:0] TX_BIT_CTRL_OUT5;
6437    output [39:0] TX_BIT_CTRL_OUT6;
6438    output [39:0] TX_BIT_CTRL_OUT_TRI;
6439    output VTC_RDY;
6440    input CLK_FROM_EXT;
6441    input EN_VTC;
6442    input NCLK_NIBBLE_IN;
6443    input PCLK_NIBBLE_IN;
6444    input [3:0] PHY_RDCS0;
6445    input [3:0] PHY_RDCS1;
6446    input [3:0] PHY_RDEN;
6447    input [3:0] PHY_WRCS0;
6448    input [3:0] PHY_WRCS1;
6449    input PLL_CLK;
6450    input REFCLK;
6451    input [5:0] RIU_ADDR;
6452    input RIU_CLK;
6453    input RIU_NIBBLE_SEL;
6454    input [15:0] RIU_WR_DATA;
6455    input RIU_WR_EN;
6456    input RST;
6457    input [39:0] RX_BIT_CTRL_IN0;
6458    input [39:0] RX_BIT_CTRL_IN1;
6459    input [39:0] RX_BIT_CTRL_IN2;
6460    input [39:0] RX_BIT_CTRL_IN3;
6461    input [39:0] RX_BIT_CTRL_IN4;
6462    input [39:0] RX_BIT_CTRL_IN5;
6463    input [39:0] RX_BIT_CTRL_IN6;
6464    input [3:0] TBYTE_IN;
6465    input [39:0] TX_BIT_CTRL_IN0;
6466    input [39:0] TX_BIT_CTRL_IN1;
6467    input [39:0] TX_BIT_CTRL_IN2;
6468    input [39:0] TX_BIT_CTRL_IN3;
6469    input [39:0] TX_BIT_CTRL_IN4;
6470    input [39:0] TX_BIT_CTRL_IN5;
6471    input [39:0] TX_BIT_CTRL_IN6;
6472    input [39:0] TX_BIT_CTRL_IN_TRI;
6473endmodule
6474
6475(* keep *)
6476module RIU_OR (...);
6477    parameter SIM_DEVICE = "ULTRASCALE";
6478    parameter real SIM_VERSION = 2.0;
6479    output [15:0] RIU_RD_DATA;
6480    output RIU_RD_VALID;
6481    input [15:0] RIU_RD_DATA_LOW;
6482    input [15:0] RIU_RD_DATA_UPP;
6483    input RIU_RD_VALID_LOW;
6484    input RIU_RD_VALID_UPP;
6485endmodule
6486
6487module RX_BITSLICE (...);
6488    parameter CASCADE = "TRUE";
6489    parameter DATA_TYPE = "NONE";
6490    parameter integer DATA_WIDTH = 8;
6491    parameter DELAY_FORMAT = "TIME";
6492    parameter DELAY_TYPE = "FIXED";
6493    parameter integer DELAY_VALUE = 0;
6494    parameter integer DELAY_VALUE_EXT = 0;
6495    parameter FIFO_SYNC_MODE = "FALSE";
6496    parameter [0:0] IS_CLK_EXT_INVERTED = 1'b0;
6497    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6498    parameter [0:0] IS_RST_DLY_EXT_INVERTED = 1'b0;
6499    parameter [0:0] IS_RST_DLY_INVERTED = 1'b0;
6500    parameter [0:0] IS_RST_INVERTED = 1'b0;
6501    parameter real REFCLK_FREQUENCY = 300.0;
6502    parameter SIM_DEVICE = "ULTRASCALE";
6503    parameter real SIM_VERSION = 2.0;
6504    parameter UPDATE_MODE = "ASYNC";
6505    parameter UPDATE_MODE_EXT = "ASYNC";
6506    output [8:0] CNTVALUEOUT;
6507    output [8:0] CNTVALUEOUT_EXT;
6508    output FIFO_EMPTY;
6509    output FIFO_WRCLK_OUT;
6510    output [7:0] Q;
6511    output [39:0] RX_BIT_CTRL_OUT;
6512    output [39:0] TX_BIT_CTRL_OUT;
6513    input CE;
6514    input CE_EXT;
6515    (* invertible_pin = "IS_CLK_INVERTED" *)
6516    input CLK;
6517    (* invertible_pin = "IS_CLK_EXT_INVERTED" *)
6518    input CLK_EXT;
6519    input [8:0] CNTVALUEIN;
6520    input [8:0] CNTVALUEIN_EXT;
6521    input DATAIN;
6522    input EN_VTC;
6523    input EN_VTC_EXT;
6524    input FIFO_RD_CLK;
6525    input FIFO_RD_EN;
6526    input INC;
6527    input INC_EXT;
6528    input LOAD;
6529    input LOAD_EXT;
6530    (* invertible_pin = "IS_RST_INVERTED" *)
6531    input RST;
6532    (* invertible_pin = "IS_RST_DLY_INVERTED" *)
6533    input RST_DLY;
6534    (* invertible_pin = "IS_RST_DLY_EXT_INVERTED" *)
6535    input RST_DLY_EXT;
6536    input [39:0] RX_BIT_CTRL_IN;
6537    input [39:0] TX_BIT_CTRL_IN;
6538endmodule
6539
6540module RXTX_BITSLICE (...);
6541    parameter FIFO_SYNC_MODE = "FALSE";
6542    parameter [0:0] INIT = 1'b1;
6543    parameter [0:0] IS_RX_CLK_INVERTED = 1'b0;
6544    parameter [0:0] IS_RX_RST_DLY_INVERTED = 1'b0;
6545    parameter [0:0] IS_RX_RST_INVERTED = 1'b0;
6546    parameter [0:0] IS_TX_CLK_INVERTED = 1'b0;
6547    parameter [0:0] IS_TX_RST_DLY_INVERTED = 1'b0;
6548    parameter [0:0] IS_TX_RST_INVERTED = 1'b0;
6549    parameter LOOPBACK = "FALSE";
6550    parameter NATIVE_ODELAY_BYPASS = "FALSE";
6551    parameter ENABLE_PRE_EMPHASIS = "FALSE";
6552    parameter RX_DATA_TYPE = "NONE";
6553    parameter integer RX_DATA_WIDTH = 8;
6554    parameter RX_DELAY_FORMAT = "TIME";
6555    parameter RX_DELAY_TYPE = "FIXED";
6556    parameter integer RX_DELAY_VALUE = 0;
6557    parameter real RX_REFCLK_FREQUENCY = 300.0;
6558    parameter RX_UPDATE_MODE = "ASYNC";
6559    parameter SIM_DEVICE = "ULTRASCALE";
6560    parameter real SIM_VERSION = 2.0;
6561    parameter TBYTE_CTL = "TBYTE_IN";
6562    parameter integer TX_DATA_WIDTH = 8;
6563    parameter TX_DELAY_FORMAT = "TIME";
6564    parameter TX_DELAY_TYPE = "FIXED";
6565    parameter integer TX_DELAY_VALUE = 0;
6566    parameter TX_OUTPUT_PHASE_90 = "FALSE";
6567    parameter real TX_REFCLK_FREQUENCY = 300.0;
6568    parameter TX_UPDATE_MODE = "ASYNC";
6569    output FIFO_EMPTY;
6570    output FIFO_WRCLK_OUT;
6571    output O;
6572    output [7:0] Q;
6573    output [39:0] RX_BIT_CTRL_OUT;
6574    output [8:0] RX_CNTVALUEOUT;
6575    output [39:0] TX_BIT_CTRL_OUT;
6576    output [8:0] TX_CNTVALUEOUT;
6577    output T_OUT;
6578    input [7:0] D;
6579    input DATAIN;
6580    input FIFO_RD_CLK;
6581    input FIFO_RD_EN;
6582    input [39:0] RX_BIT_CTRL_IN;
6583    input RX_CE;
6584    (* invertible_pin = "IS_RX_CLK_INVERTED" *)
6585    input RX_CLK;
6586    input [8:0] RX_CNTVALUEIN;
6587    input RX_EN_VTC;
6588    input RX_INC;
6589    input RX_LOAD;
6590    (* invertible_pin = "IS_RX_RST_INVERTED" *)
6591    input RX_RST;
6592    (* invertible_pin = "IS_RX_RST_DLY_INVERTED" *)
6593    input RX_RST_DLY;
6594    input T;
6595    input TBYTE_IN;
6596    input [39:0] TX_BIT_CTRL_IN;
6597    input TX_CE;
6598    (* invertible_pin = "IS_TX_CLK_INVERTED" *)
6599    input TX_CLK;
6600    input [8:0] TX_CNTVALUEIN;
6601    input TX_EN_VTC;
6602    input TX_INC;
6603    input TX_LOAD;
6604    (* invertible_pin = "IS_TX_RST_INVERTED" *)
6605    input TX_RST;
6606    (* invertible_pin = "IS_TX_RST_DLY_INVERTED" *)
6607    input TX_RST_DLY;
6608endmodule
6609
6610module TX_BITSLICE (...);
6611    parameter integer DATA_WIDTH = 8;
6612    parameter DELAY_FORMAT = "TIME";
6613    parameter DELAY_TYPE = "FIXED";
6614    parameter integer DELAY_VALUE = 0;
6615    parameter ENABLE_PRE_EMPHASIS = "FALSE";
6616    parameter [0:0] INIT = 1'b1;
6617    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6618    parameter [0:0] IS_RST_DLY_INVERTED = 1'b0;
6619    parameter [0:0] IS_RST_INVERTED = 1'b0;
6620    parameter NATIVE_ODELAY_BYPASS = "FALSE";
6621    parameter OUTPUT_PHASE_90 = "FALSE";
6622    parameter real REFCLK_FREQUENCY = 300.0;
6623    parameter SIM_DEVICE = "ULTRASCALE";
6624    parameter real SIM_VERSION = 2.0;
6625    parameter TBYTE_CTL = "TBYTE_IN";
6626    parameter UPDATE_MODE = "ASYNC";
6627    output [8:0] CNTVALUEOUT;
6628    output O;
6629    output [39:0] RX_BIT_CTRL_OUT;
6630    output [39:0] TX_BIT_CTRL_OUT;
6631    output T_OUT;
6632    input CE;
6633    (* invertible_pin = "IS_CLK_INVERTED" *)
6634    input CLK;
6635    input [8:0] CNTVALUEIN;
6636    input [7:0] D;
6637    input EN_VTC;
6638    input INC;
6639    input LOAD;
6640    (* invertible_pin = "IS_RST_INVERTED" *)
6641    input RST;
6642    (* invertible_pin = "IS_RST_DLY_INVERTED" *)
6643    input RST_DLY;
6644    input [39:0] RX_BIT_CTRL_IN;
6645    input T;
6646    input TBYTE_IN;
6647    input [39:0] TX_BIT_CTRL_IN;
6648endmodule
6649
6650module TX_BITSLICE_TRI (...);
6651    parameter integer DATA_WIDTH = 8;
6652    parameter DELAY_FORMAT = "TIME";
6653    parameter DELAY_TYPE = "FIXED";
6654    parameter integer DELAY_VALUE = 0;
6655    parameter [0:0] INIT = 1'b1;
6656    parameter [0:0] IS_CLK_INVERTED = 1'b0;
6657    parameter [0:0] IS_RST_DLY_INVERTED = 1'b0;
6658    parameter [0:0] IS_RST_INVERTED = 1'b0;
6659    parameter NATIVE_ODELAY_BYPASS = "FALSE";
6660    parameter OUTPUT_PHASE_90 = "FALSE";
6661    parameter real REFCLK_FREQUENCY = 300.0;
6662    parameter SIM_DEVICE = "ULTRASCALE";
6663    parameter real SIM_VERSION = 2.0;
6664    parameter UPDATE_MODE = "ASYNC";
6665    output [39:0] BIT_CTRL_OUT;
6666    output [8:0] CNTVALUEOUT;
6667    output TRI_OUT;
6668    input [39:0] BIT_CTRL_IN;
6669    input CE;
6670    (* invertible_pin = "IS_CLK_INVERTED" *)
6671    input CLK;
6672    input [8:0] CNTVALUEIN;
6673    input EN_VTC;
6674    input INC;
6675    input LOAD;
6676    (* invertible_pin = "IS_RST_INVERTED" *)
6677    input RST;
6678    (* invertible_pin = "IS_RST_DLY_INVERTED" *)
6679    input RST_DLY;
6680endmodule
6681
6682module IODELAY2 (...);
6683    parameter COUNTER_WRAPAROUND = "WRAPAROUND";
6684    parameter DATA_RATE = "SDR";
6685    parameter DELAY_SRC = "IO";
6686    parameter integer IDELAY2_VALUE = 0;
6687    parameter IDELAY_MODE = "NORMAL";
6688    parameter IDELAY_TYPE = "DEFAULT";
6689    parameter integer IDELAY_VALUE = 0;
6690    parameter integer ODELAY_VALUE = 0;
6691    parameter SERDES_MODE = "NONE";
6692    parameter integer SIM_TAPDELAY_VALUE = 75;
6693    output BUSY;
6694    output DATAOUT2;
6695    output DATAOUT;
6696    output DOUT;
6697    output TOUT;
6698    input CAL;
6699    input CE;
6700    (* clkbuf_sink *)
6701    input CLK;
6702    input IDATAIN;
6703    input INC;
6704    (* clkbuf_sink *)
6705    input IOCLK0;
6706    (* clkbuf_sink *)
6707    input IOCLK1;
6708    input ODATAIN;
6709    input RST;
6710    input T;
6711endmodule
6712
6713module IODRP2 (...);
6714    parameter DATA_RATE = "SDR";
6715    parameter integer SIM_TAPDELAY_VALUE = 75;
6716    output DATAOUT2;
6717    output DATAOUT;
6718    output DOUT;
6719    output SDO;
6720    output TOUT;
6721    input ADD;
6722    input BKST;
6723    (* clkbuf_sink *)
6724    input CLK;
6725    input CS;
6726    input IDATAIN;
6727    (* clkbuf_sink *)
6728    input IOCLK0;
6729    (* clkbuf_sink *)
6730    input IOCLK1;
6731    input ODATAIN;
6732    input SDI;
6733    input T;
6734endmodule
6735
6736module IODRP2_MCB (...);
6737    parameter DATA_RATE = "SDR";
6738    parameter integer IDELAY_VALUE = 0;
6739    parameter integer MCB_ADDRESS = 0;
6740    parameter integer ODELAY_VALUE = 0;
6741    parameter SERDES_MODE = "NONE";
6742    parameter integer SIM_TAPDELAY_VALUE = 75;
6743    output AUXSDO;
6744    output DATAOUT2;
6745    output DATAOUT;
6746    output DOUT;
6747    output DQSOUTN;
6748    output DQSOUTP;
6749    output SDO;
6750    output TOUT;
6751    input ADD;
6752    input AUXSDOIN;
6753    input BKST;
6754    (* clkbuf_sink *)
6755    input CLK;
6756    input CS;
6757    input IDATAIN;
6758    (* clkbuf_sink *)
6759    input IOCLK0;
6760    (* clkbuf_sink *)
6761    input IOCLK1;
6762    input MEMUPDATE;
6763    input ODATAIN;
6764    input SDI;
6765    input T;
6766    input [4:0] AUXADDR;
6767endmodule
6768
6769module ISERDES2 (...);
6770    parameter BITSLIP_ENABLE = "FALSE";
6771    parameter DATA_RATE = "SDR";
6772    parameter integer DATA_WIDTH = 1;
6773    parameter INTERFACE_TYPE = "NETWORKING";
6774    parameter SERDES_MODE = "NONE";
6775    output CFB0;
6776    output CFB1;
6777    output DFB;
6778    output FABRICOUT;
6779    output INCDEC;
6780    output Q1;
6781    output Q2;
6782    output Q3;
6783    output Q4;
6784    output SHIFTOUT;
6785    output VALID;
6786    input BITSLIP;
6787    input CE0;
6788    (* clkbuf_sink *)
6789    input CLK0;
6790    (* clkbuf_sink *)
6791    input CLK1;
6792    (* clkbuf_sink *)
6793    input CLKDIV;
6794    input D;
6795    input IOCE;
6796    input RST;
6797    input SHIFTIN;
6798endmodule
6799
6800module OSERDES2 (...);
6801    parameter BYPASS_GCLK_FF = "FALSE";
6802    parameter DATA_RATE_OQ = "DDR";
6803    parameter DATA_RATE_OT = "DDR";
6804    parameter integer DATA_WIDTH = 2;
6805    parameter OUTPUT_MODE = "SINGLE_ENDED";
6806    parameter SERDES_MODE = "NONE";
6807    parameter integer TRAIN_PATTERN = 0;
6808    output OQ;
6809    output SHIFTOUT1;
6810    output SHIFTOUT2;
6811    output SHIFTOUT3;
6812    output SHIFTOUT4;
6813    output TQ;
6814    (* clkbuf_sink *)
6815    input CLK0;
6816    (* clkbuf_sink *)
6817    input CLK1;
6818    (* clkbuf_sink *)
6819    input CLKDIV;
6820    input D1;
6821    input D2;
6822    input D3;
6823    input D4;
6824    input IOCE;
6825    input OCE;
6826    input RST;
6827    input SHIFTIN1;
6828    input SHIFTIN2;
6829    input SHIFTIN3;
6830    input SHIFTIN4;
6831    input T1;
6832    input T2;
6833    input T3;
6834    input T4;
6835    input TCE;
6836    input TRAIN;
6837endmodule
6838
6839module IBUF_DLY_ADJ (...);
6840    parameter DELAY_OFFSET = "OFF";
6841    parameter IOSTANDARD = "DEFAULT";
6842    output O;
6843    (* iopad_external_pin *)
6844    input I;
6845    input [2:0] S;
6846endmodule
6847
6848module IBUF_IBUFDISABLE (...);
6849    parameter IBUF_LOW_PWR = "TRUE";
6850    parameter IOSTANDARD = "DEFAULT";
6851    parameter SIM_DEVICE = "7SERIES";
6852    parameter USE_IBUFDISABLE = "TRUE";
6853    output O;
6854    (* iopad_external_pin *)
6855    input I;
6856    input IBUFDISABLE;
6857endmodule
6858
6859module IBUF_INTERMDISABLE (...);
6860    parameter IBUF_LOW_PWR = "TRUE";
6861    parameter IOSTANDARD = "DEFAULT";
6862    parameter SIM_DEVICE = "7SERIES";
6863    parameter USE_IBUFDISABLE = "TRUE";
6864    output O;
6865    (* iopad_external_pin *)
6866    input I;
6867    input IBUFDISABLE;
6868    input INTERMDISABLE;
6869endmodule
6870
6871module IBUF_ANALOG (...);
6872    output O;
6873    (* iopad_external_pin *)
6874    input I;
6875endmodule
6876
6877module IBUFE3 (...);
6878    parameter IBUF_LOW_PWR = "TRUE";
6879    parameter IOSTANDARD = "DEFAULT";
6880    parameter USE_IBUFDISABLE = "FALSE";
6881    parameter integer SIM_INPUT_BUFFER_OFFSET = 0;
6882    output O;
6883    (* iopad_external_pin *)
6884    input I;
6885    input IBUFDISABLE;
6886    input [3:0] OSC;
6887    input OSC_EN;
6888    input VREF;
6889endmodule
6890
6891module IBUFDS (...);
6892    parameter CAPACITANCE = "DONT_CARE";
6893    parameter DIFF_TERM = "FALSE";
6894    parameter DQS_BIAS = "FALSE";
6895    parameter IBUF_DELAY_VALUE = "0";
6896    parameter IBUF_LOW_PWR = "TRUE";
6897    parameter IFD_DELAY_VALUE = "AUTO";
6898    parameter IOSTANDARD = "DEFAULT";
6899    output O;
6900    (* iopad_external_pin *)
6901    input I;
6902    (* iopad_external_pin *)
6903    input IB;
6904endmodule
6905
6906module IBUFDS_DLY_ADJ (...);
6907    parameter DELAY_OFFSET = "OFF";
6908    parameter DIFF_TERM = "FALSE";
6909    parameter IOSTANDARD = "DEFAULT";
6910    output O;
6911    (* iopad_external_pin *)
6912    input I;
6913    (* iopad_external_pin *)
6914    input IB;
6915    input [2:0] S;
6916endmodule
6917
6918module IBUFDS_IBUFDISABLE (...);
6919    parameter DIFF_TERM = "FALSE";
6920    parameter DQS_BIAS = "FALSE";
6921    parameter IBUF_LOW_PWR = "TRUE";
6922    parameter IOSTANDARD = "DEFAULT";
6923    parameter SIM_DEVICE = "7SERIES";
6924    parameter USE_IBUFDISABLE = "TRUE";
6925    output O;
6926    (* iopad_external_pin *)
6927    input I;
6928    (* iopad_external_pin *)
6929    input IB;
6930    input IBUFDISABLE;
6931endmodule
6932
6933module IBUFDS_INTERMDISABLE (...);
6934    parameter DIFF_TERM = "FALSE";
6935    parameter DQS_BIAS = "FALSE";
6936    parameter IBUF_LOW_PWR = "TRUE";
6937    parameter IOSTANDARD = "DEFAULT";
6938    parameter SIM_DEVICE = "7SERIES";
6939    parameter USE_IBUFDISABLE = "TRUE";
6940    output O;
6941    (* iopad_external_pin *)
6942    input I;
6943    (* iopad_external_pin *)
6944    input IB;
6945    input IBUFDISABLE;
6946    input INTERMDISABLE;
6947endmodule
6948
6949module IBUFDS_DIFF_OUT (...);
6950    parameter DIFF_TERM = "FALSE";
6951    parameter DQS_BIAS = "FALSE";
6952    parameter IBUF_LOW_PWR = "TRUE";
6953    parameter IOSTANDARD = "DEFAULT";
6954    output O;
6955    output OB;
6956    (* iopad_external_pin *)
6957    input I;
6958    (* iopad_external_pin *)
6959    input IB;
6960endmodule
6961
6962module IBUFDS_DIFF_OUT_IBUFDISABLE (...);
6963    parameter DIFF_TERM = "FALSE";
6964    parameter DQS_BIAS = "FALSE";
6965    parameter IBUF_LOW_PWR = "TRUE";
6966    parameter IOSTANDARD = "DEFAULT";
6967    parameter SIM_DEVICE = "7SERIES";
6968    parameter USE_IBUFDISABLE = "TRUE";
6969    output O;
6970    output OB;
6971    (* iopad_external_pin *)
6972    input I;
6973    (* iopad_external_pin *)
6974    input IB;
6975    input IBUFDISABLE;
6976endmodule
6977
6978module IBUFDS_DIFF_OUT_INTERMDISABLE (...);
6979    parameter DIFF_TERM = "FALSE";
6980    parameter DQS_BIAS = "FALSE";
6981    parameter IBUF_LOW_PWR = "TRUE";
6982    parameter IOSTANDARD = "DEFAULT";
6983    parameter SIM_DEVICE = "7SERIES";
6984    parameter USE_IBUFDISABLE = "TRUE";
6985    output O;
6986    output OB;
6987    (* iopad_external_pin *)
6988    input I;
6989    (* iopad_external_pin *)
6990    input IB;
6991    input IBUFDISABLE;
6992    input INTERMDISABLE;
6993endmodule
6994
6995module IBUFDSE3 (...);
6996    parameter DIFF_TERM = "FALSE";
6997    parameter DQS_BIAS = "FALSE";
6998    parameter IBUF_LOW_PWR = "TRUE";
6999    parameter IOSTANDARD = "DEFAULT";
7000    parameter USE_IBUFDISABLE = "FALSE";
7001    parameter integer SIM_INPUT_BUFFER_OFFSET = 0;
7002    output O;
7003    (* iopad_external_pin *)
7004    input I;
7005    (* iopad_external_pin *)
7006    input IB;
7007    input IBUFDISABLE;
7008    input [3:0] OSC;
7009    input [1:0] OSC_EN;
7010endmodule
7011
7012module IBUFDS_DPHY (...);
7013    parameter DIFF_TERM = "TRUE";
7014    parameter IOSTANDARD = "DEFAULT";
7015    output HSRX_O;
7016    output LPRX_O_N;
7017    output LPRX_O_P;
7018    input HSRX_DISABLE;
7019    (* iopad_external_pin *)
7020    input I;
7021    (* iopad_external_pin *)
7022    input IB;
7023    input LPRX_DISABLE;
7024endmodule
7025
7026module IBUFGDS (...);
7027    parameter CAPACITANCE = "DONT_CARE";
7028    parameter DIFF_TERM = "FALSE";
7029    parameter IBUF_DELAY_VALUE = "0";
7030    parameter IBUF_LOW_PWR = "TRUE";
7031    parameter IOSTANDARD = "DEFAULT";
7032    output O;
7033    (* iopad_external_pin *)
7034    input I;
7035    (* iopad_external_pin *)
7036    input IB;
7037endmodule
7038
7039module IBUFGDS_DIFF_OUT (...);
7040    parameter DIFF_TERM = "FALSE";
7041    parameter DQS_BIAS = "FALSE";
7042    parameter IBUF_LOW_PWR = "TRUE";
7043    parameter IOSTANDARD = "DEFAULT";
7044    output O;
7045    output OB;
7046    (* iopad_external_pin *)
7047    input I;
7048    (* iopad_external_pin *)
7049    input IB;
7050endmodule
7051
7052module IOBUF_DCIEN (...);
7053    parameter integer DRIVE = 12;
7054    parameter IBUF_LOW_PWR = "TRUE";
7055    parameter IOSTANDARD = "DEFAULT";
7056    parameter SIM_DEVICE = "7SERIES";
7057    parameter SLEW = "SLOW";
7058    parameter USE_IBUFDISABLE = "TRUE";
7059    output O;
7060    (* iopad_external_pin *)
7061    inout IO;
7062    input DCITERMDISABLE;
7063    input I;
7064    input IBUFDISABLE;
7065    input T;
7066endmodule
7067
7068module IOBUF_INTERMDISABLE (...);
7069    parameter integer DRIVE = 12;
7070    parameter IBUF_LOW_PWR = "TRUE";
7071    parameter IOSTANDARD = "DEFAULT";
7072    parameter SIM_DEVICE = "7SERIES";
7073    parameter SLEW = "SLOW";
7074    parameter USE_IBUFDISABLE = "TRUE";
7075    output O;
7076    (* iopad_external_pin *)
7077    inout IO;
7078    input I;
7079    input IBUFDISABLE;
7080    input INTERMDISABLE;
7081    input T;
7082endmodule
7083
7084module IOBUFE3 (...);
7085    parameter integer DRIVE = 12;
7086    parameter IBUF_LOW_PWR = "TRUE";
7087    parameter IOSTANDARD = "DEFAULT";
7088    parameter USE_IBUFDISABLE = "FALSE";
7089    parameter integer SIM_INPUT_BUFFER_OFFSET = 0;
7090    output O;
7091    (* iopad_external_pin *)
7092    inout IO;
7093    input DCITERMDISABLE;
7094    input I;
7095    input IBUFDISABLE;
7096    input [3:0] OSC;
7097    input OSC_EN;
7098    input T;
7099    input VREF;
7100endmodule
7101
7102module IOBUFDS (...);
7103    parameter DIFF_TERM = "FALSE";
7104    parameter DQS_BIAS = "FALSE";
7105    parameter IBUF_LOW_PWR = "TRUE";
7106    parameter IOSTANDARD = "DEFAULT";
7107    parameter SLEW = "SLOW";
7108    output O;
7109    (* iopad_external_pin *)
7110    inout IO;
7111    (* iopad_external_pin *)
7112    inout IOB;
7113    input I;
7114    input T;
7115endmodule
7116
7117module IOBUFDS_DCIEN (...);
7118    parameter DIFF_TERM = "FALSE";
7119    parameter DQS_BIAS = "FALSE";
7120    parameter IBUF_LOW_PWR = "TRUE";
7121    parameter IOSTANDARD = "DEFAULT";
7122    parameter SIM_DEVICE = "7SERIES";
7123    parameter SLEW = "SLOW";
7124    parameter USE_IBUFDISABLE = "TRUE";
7125    output O;
7126    (* iopad_external_pin *)
7127    inout IO;
7128    (* iopad_external_pin *)
7129    inout IOB;
7130    input DCITERMDISABLE;
7131    input I;
7132    input IBUFDISABLE;
7133    input T;
7134endmodule
7135
7136module IOBUFDS_INTERMDISABLE (...);
7137    parameter DIFF_TERM = "FALSE";
7138    parameter DQS_BIAS = "FALSE";
7139    parameter IBUF_LOW_PWR = "TRUE";
7140    parameter IOSTANDARD = "DEFAULT";
7141    parameter SIM_DEVICE = "7SERIES";
7142    parameter SLEW = "SLOW";
7143    parameter USE_IBUFDISABLE = "TRUE";
7144    output O;
7145    (* iopad_external_pin *)
7146    inout IO;
7147    (* iopad_external_pin *)
7148    inout IOB;
7149    input I;
7150    input IBUFDISABLE;
7151    input INTERMDISABLE;
7152    input T;
7153endmodule
7154
7155module IOBUFDS_DIFF_OUT (...);
7156    parameter DIFF_TERM = "FALSE";
7157    parameter DQS_BIAS = "FALSE";
7158    parameter IBUF_LOW_PWR = "TRUE";
7159    parameter IOSTANDARD = "DEFAULT";
7160    output O;
7161    output OB;
7162    (* iopad_external_pin *)
7163    inout IO;
7164    (* iopad_external_pin *)
7165    inout IOB;
7166    input I;
7167    input TM;
7168    input TS;
7169endmodule
7170
7171module IOBUFDS_DIFF_OUT_DCIEN (...);
7172    parameter DIFF_TERM = "FALSE";
7173    parameter DQS_BIAS = "FALSE";
7174    parameter IBUF_LOW_PWR = "TRUE";
7175    parameter IOSTANDARD = "DEFAULT";
7176    parameter SIM_DEVICE = "7SERIES";
7177    parameter USE_IBUFDISABLE = "TRUE";
7178    output O;
7179    output OB;
7180    (* iopad_external_pin *)
7181    inout IO;
7182    (* iopad_external_pin *)
7183    inout IOB;
7184    input DCITERMDISABLE;
7185    input I;
7186    input IBUFDISABLE;
7187    input TM;
7188    input TS;
7189endmodule
7190
7191module IOBUFDS_DIFF_OUT_INTERMDISABLE (...);
7192    parameter DIFF_TERM = "FALSE";
7193    parameter DQS_BIAS = "FALSE";
7194    parameter IBUF_LOW_PWR = "TRUE";
7195    parameter IOSTANDARD = "DEFAULT";
7196    parameter SIM_DEVICE = "7SERIES";
7197    parameter USE_IBUFDISABLE = "TRUE";
7198    output O;
7199    output OB;
7200    (* iopad_external_pin *)
7201    inout IO;
7202    (* iopad_external_pin *)
7203    inout IOB;
7204    input I;
7205    input IBUFDISABLE;
7206    input INTERMDISABLE;
7207    input TM;
7208    input TS;
7209endmodule
7210
7211module IOBUFDSE3 (...);
7212    parameter DIFF_TERM = "FALSE";
7213    parameter DQS_BIAS = "FALSE";
7214    parameter IBUF_LOW_PWR = "TRUE";
7215    parameter IOSTANDARD = "DEFAULT";
7216    parameter integer SIM_INPUT_BUFFER_OFFSET = 0;
7217    parameter USE_IBUFDISABLE = "FALSE";
7218    output O;
7219    (* iopad_external_pin *)
7220    inout IO;
7221    (* iopad_external_pin *)
7222    inout IOB;
7223    input DCITERMDISABLE;
7224    input I;
7225    input IBUFDISABLE;
7226    input [3:0] OSC;
7227    input [1:0] OSC_EN;
7228    input T;
7229endmodule
7230
7231module OBUFDS (...);
7232    parameter CAPACITANCE = "DONT_CARE";
7233    parameter IOSTANDARD = "DEFAULT";
7234    parameter SLEW = "SLOW";
7235    (* iopad_external_pin *)
7236    output O;
7237    (* iopad_external_pin *)
7238    output OB;
7239    input I;
7240endmodule
7241
7242module OBUFDS_DPHY (...);
7243    parameter IOSTANDARD = "DEFAULT";
7244    (* iopad_external_pin *)
7245    output O;
7246    (* iopad_external_pin *)
7247    output OB;
7248    input HSTX_I;
7249    input HSTX_T;
7250    input LPTX_I_N;
7251    input LPTX_I_P;
7252    input LPTX_T;
7253endmodule
7254
7255module OBUFTDS (...);
7256    parameter CAPACITANCE = "DONT_CARE";
7257    parameter IOSTANDARD = "DEFAULT";
7258    parameter SLEW = "SLOW";
7259    (* iopad_external_pin *)
7260    output O;
7261    (* iopad_external_pin *)
7262    output OB;
7263    input I;
7264    input T;
7265endmodule
7266
7267module KEEPER (...);
7268    inout O;
7269endmodule
7270
7271module PULLDOWN (...);
7272    output O;
7273endmodule
7274
7275module PULLUP (...);
7276    output O;
7277endmodule
7278
7279(* keep *)
7280module DCIRESET (...);
7281    output LOCKED;
7282    input RST;
7283endmodule
7284
7285(* keep *)
7286module HPIO_VREF (...);
7287    parameter VREF_CNTR = "OFF";
7288    output VREF;
7289    input [6:0] FABRIC_VREF_TUNE;
7290endmodule
7291
7292module BUFGCE (...);
7293    parameter CE_TYPE = "SYNC";
7294    parameter [0:0] IS_CE_INVERTED = 1'b0;
7295    parameter [0:0] IS_I_INVERTED = 1'b0;
7296    parameter SIM_DEVICE = "ULTRASCALE";
7297    parameter STARTUP_SYNC = "FALSE";
7298    (* clkbuf_driver *)
7299    output O;
7300    (* invertible_pin = "IS_CE_INVERTED" *)
7301    input CE;
7302    (* invertible_pin = "IS_I_INVERTED" *)
7303    input I;
7304endmodule
7305
7306module BUFGCE_1 (...);
7307    (* clkbuf_driver *)
7308    output O;
7309    input CE;
7310    input I;
7311endmodule
7312
7313module BUFGMUX (...);
7314    parameter CLK_SEL_TYPE = "SYNC";
7315    (* clkbuf_driver *)
7316    output O;
7317    input I0;
7318    input I1;
7319    input S;
7320endmodule
7321
7322module BUFGMUX_1 (...);
7323    parameter CLK_SEL_TYPE = "SYNC";
7324    (* clkbuf_driver *)
7325    output O;
7326    input I0;
7327    input I1;
7328    input S;
7329endmodule
7330
7331module BUFGMUX_CTRL (...);
7332    (* clkbuf_driver *)
7333    output O;
7334    input I0;
7335    input I1;
7336    input S;
7337endmodule
7338
7339module BUFGMUX_VIRTEX4 (...);
7340    (* clkbuf_driver *)
7341    output O;
7342    input I0;
7343    input I1;
7344    input S;
7345endmodule
7346
7347module BUFG_GT (...);
7348    parameter SIM_DEVICE = "ULTRASCALE";
7349    parameter STARTUP_SYNC = "FALSE";
7350    (* clkbuf_driver *)
7351    output O;
7352    input CE;
7353    input CEMASK;
7354    input CLR;
7355    input CLRMASK;
7356    input [2:0] DIV;
7357    input I;
7358endmodule
7359
7360module BUFG_GT_SYNC (...);
7361    output CESYNC;
7362    output CLRSYNC;
7363    input CE;
7364    input CLK;
7365    input CLR;
7366endmodule
7367
7368module BUFG_PS (...);
7369    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
7370    parameter STARTUP_SYNC = "FALSE";
7371    (* clkbuf_driver *)
7372    output O;
7373    input I;
7374endmodule
7375
7376module BUFGCE_DIV (...);
7377    parameter integer BUFGCE_DIVIDE = 1;
7378    parameter CE_TYPE = "SYNC";
7379    parameter HARDSYNC_CLR = "FALSE";
7380    parameter [0:0] IS_CE_INVERTED = 1'b0;
7381    parameter [0:0] IS_CLR_INVERTED = 1'b0;
7382    parameter [0:0] IS_I_INVERTED = 1'b0;
7383    parameter SIM_DEVICE = "ULTRASCALE";
7384    parameter STARTUP_SYNC = "FALSE";
7385    (* clkbuf_driver *)
7386    output O;
7387    (* invertible_pin = "IS_CE_INVERTED" *)
7388    input CE;
7389    (* invertible_pin = "IS_CLR_INVERTED" *)
7390    input CLR;
7391    (* invertible_pin = "IS_I_INVERTED" *)
7392    input I;
7393endmodule
7394
7395module BUFH (...);
7396    (* clkbuf_driver *)
7397    output O;
7398    input I;
7399endmodule
7400
7401module BUFIO2 (...);
7402    parameter DIVIDE_BYPASS = "TRUE";
7403    parameter integer DIVIDE = 1;
7404    parameter I_INVERT = "FALSE";
7405    parameter USE_DOUBLER = "FALSE";
7406    (* clkbuf_driver *)
7407    output DIVCLK;
7408    (* clkbuf_driver *)
7409    output IOCLK;
7410    output SERDESSTROBE;
7411    input I;
7412endmodule
7413
7414module BUFIO2_2CLK (...);
7415    parameter integer DIVIDE = 2;
7416    (* clkbuf_driver *)
7417    output DIVCLK;
7418    (* clkbuf_driver *)
7419    output IOCLK;
7420    output SERDESSTROBE;
7421    input I;
7422    input IB;
7423endmodule
7424
7425module BUFIO2FB (...);
7426    parameter DIVIDE_BYPASS = "TRUE";
7427    (* clkbuf_driver *)
7428    output O;
7429    input I;
7430endmodule
7431
7432module BUFPLL (...);
7433    parameter integer DIVIDE = 1;
7434    parameter ENABLE_SYNC = "TRUE";
7435    (* clkbuf_driver *)
7436    output IOCLK;
7437    output LOCK;
7438    output SERDESSTROBE;
7439    input GCLK;
7440    input LOCKED;
7441    input PLLIN;
7442endmodule
7443
7444module BUFPLL_MCB (...);
7445    parameter integer DIVIDE = 2;
7446    parameter LOCK_SRC = "LOCK_TO_0";
7447    (* clkbuf_driver *)
7448    output IOCLK0;
7449    (* clkbuf_driver *)
7450    output IOCLK1;
7451    output LOCK;
7452    output SERDESSTROBE0;
7453    output SERDESSTROBE1;
7454    input GCLK;
7455    input LOCKED;
7456    input PLLIN0;
7457    input PLLIN1;
7458endmodule
7459
7460module BUFIO (...);
7461    (* clkbuf_driver *)
7462    output O;
7463    input I;
7464endmodule
7465
7466module BUFIODQS (...);
7467    parameter DQSMASK_ENABLE = "FALSE";
7468    (* clkbuf_driver *)
7469    output O;
7470    input DQSMASK;
7471    input I;
7472endmodule
7473
7474module BUFR (...);
7475    parameter BUFR_DIVIDE = "BYPASS";
7476    parameter SIM_DEVICE = "7SERIES";
7477    (* clkbuf_driver *)
7478    output O;
7479    input CE;
7480    input CLR;
7481    input I;
7482endmodule
7483
7484module BUFMR (...);
7485    (* clkbuf_driver *)
7486    output O;
7487    input I;
7488endmodule
7489
7490module BUFMRCE (...);
7491    parameter CE_TYPE = "SYNC";
7492    parameter integer INIT_OUT = 0;
7493    parameter [0:0] IS_CE_INVERTED = 1'b0;
7494    (* clkbuf_driver *)
7495    output O;
7496    (* invertible_pin = "IS_CE_INVERTED" *)
7497    input CE;
7498    input I;
7499endmodule
7500
7501module DCM (...);
7502    parameter real CLKDV_DIVIDE = 2.0;
7503    parameter integer CLKFX_DIVIDE = 1;
7504    parameter integer CLKFX_MULTIPLY = 4;
7505    parameter CLKIN_DIVIDE_BY_2 = "FALSE";
7506    parameter real CLKIN_PERIOD = 10.0;
7507    parameter CLKOUT_PHASE_SHIFT = "NONE";
7508    parameter CLK_FEEDBACK = "1X";
7509    parameter DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
7510    parameter DFS_FREQUENCY_MODE = "LOW";
7511    parameter DLL_FREQUENCY_MODE = "LOW";
7512    parameter DSS_MODE = "NONE";
7513    parameter DUTY_CYCLE_CORRECTION = "TRUE";
7514    parameter [15:0] FACTORY_JF = 16'hC080;
7515    parameter integer PHASE_SHIFT = 0;
7516    parameter SIM_MODE = "SAFE";
7517    parameter STARTUP_WAIT = "FALSE";
7518    input CLKFB;
7519    input CLKIN;
7520    input DSSEN;
7521    input PSCLK;
7522    input PSEN;
7523    input PSINCDEC;
7524    input RST;
7525    output CLK0;
7526    output CLK180;
7527    output CLK270;
7528    output CLK2X;
7529    output CLK2X180;
7530    output CLK90;
7531    output CLKDV;
7532    output CLKFX;
7533    output CLKFX180;
7534    output LOCKED;
7535    output PSDONE;
7536    output [7:0] STATUS;
7537endmodule
7538
7539module DCM_SP (...);
7540    parameter real CLKDV_DIVIDE = 2.0;
7541    parameter integer CLKFX_DIVIDE = 1;
7542    parameter integer CLKFX_MULTIPLY = 4;
7543    parameter CLKIN_DIVIDE_BY_2 = "FALSE";
7544    parameter real CLKIN_PERIOD = 10.0;
7545    parameter CLKOUT_PHASE_SHIFT = "NONE";
7546    parameter CLK_FEEDBACK = "1X";
7547    parameter DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
7548    parameter DFS_FREQUENCY_MODE = "LOW";
7549    parameter DLL_FREQUENCY_MODE = "LOW";
7550    parameter DSS_MODE = "NONE";
7551    parameter DUTY_CYCLE_CORRECTION = "TRUE";
7552    parameter FACTORY_JF = 16'hC080;
7553    parameter integer PHASE_SHIFT = 0;
7554    parameter STARTUP_WAIT = "FALSE";
7555    input CLKFB;
7556    input CLKIN;
7557    input DSSEN;
7558    input PSCLK;
7559    input PSEN;
7560    input PSINCDEC;
7561    input RST;
7562    output CLK0;
7563    output CLK180;
7564    output CLK270;
7565    output CLK2X;
7566    output CLK2X180;
7567    output CLK90;
7568    output CLKDV;
7569    output CLKFX;
7570    output CLKFX180;
7571    output LOCKED;
7572    output PSDONE;
7573    output [7:0] STATUS;
7574endmodule
7575
7576module DCM_CLKGEN (...);
7577    parameter SPREAD_SPECTRUM = "NONE";
7578    parameter STARTUP_WAIT = "FALSE";
7579    parameter integer CLKFXDV_DIVIDE = 2;
7580    parameter integer CLKFX_DIVIDE = 1;
7581    parameter integer CLKFX_MULTIPLY = 4;
7582    parameter real CLKFX_MD_MAX = 0.0;
7583    parameter real CLKIN_PERIOD = 0.0;
7584    output CLKFX180;
7585    output CLKFX;
7586    output CLKFXDV;
7587    output LOCKED;
7588    output PROGDONE;
7589    output [2:1] STATUS;
7590    input CLKIN;
7591    input FREEZEDCM;
7592    input PROGCLK;
7593    input PROGDATA;
7594    input PROGEN;
7595    input RST;
7596endmodule
7597
7598module DCM_ADV (...);
7599    parameter real CLKDV_DIVIDE = 2.0;
7600    parameter integer CLKFX_DIVIDE = 1;
7601    parameter integer CLKFX_MULTIPLY = 4;
7602    parameter CLKIN_DIVIDE_BY_2 = "FALSE";
7603    parameter real CLKIN_PERIOD = 10.0;
7604    parameter CLKOUT_PHASE_SHIFT = "NONE";
7605    parameter CLK_FEEDBACK = "1X";
7606    parameter DCM_AUTOCALIBRATION = "TRUE";
7607    parameter DCM_PERFORMANCE_MODE = "MAX_SPEED";
7608    parameter DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
7609    parameter DFS_FREQUENCY_MODE = "LOW";
7610    parameter DLL_FREQUENCY_MODE = "LOW";
7611    parameter DUTY_CYCLE_CORRECTION = "TRUE";
7612    parameter FACTORY_JF = 16'hF0F0;
7613    parameter integer PHASE_SHIFT = 0;
7614    parameter SIM_DEVICE ="VIRTEX4";
7615    parameter STARTUP_WAIT = "FALSE";
7616    output CLK0;
7617    output CLK180;
7618    output CLK270;
7619    output CLK2X180;
7620    output CLK2X;
7621    output CLK90;
7622    output CLKDV;
7623    output CLKFX180;
7624    output CLKFX;
7625    output DRDY;
7626    output LOCKED;
7627    output PSDONE;
7628    output [15:0] DO;
7629    input CLKFB;
7630    input CLKIN;
7631    input DCLK;
7632    input DEN;
7633    input DWE;
7634    input PSCLK;
7635    input PSEN;
7636    input PSINCDEC;
7637    input RST;
7638    input [15:0] DI;
7639    input [6:0] DADDR;
7640endmodule
7641
7642module DCM_BASE (...);
7643    parameter real CLKDV_DIVIDE = 2.0;
7644    parameter integer CLKFX_DIVIDE = 1;
7645    parameter integer CLKFX_MULTIPLY = 4;
7646    parameter CLKIN_DIVIDE_BY_2 = "FALSE";
7647    parameter real CLKIN_PERIOD = 10.0;
7648    parameter CLKOUT_PHASE_SHIFT = "NONE";
7649    parameter CLK_FEEDBACK = "1X";
7650    parameter DCM_AUTOCALIBRATION = "TRUE";
7651    parameter DCM_PERFORMANCE_MODE = "MAX_SPEED";
7652    parameter DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
7653    parameter DFS_FREQUENCY_MODE = "LOW";
7654    parameter DLL_FREQUENCY_MODE = "LOW";
7655    parameter DUTY_CYCLE_CORRECTION = "TRUE";
7656    parameter [15:0] FACTORY_JF = 16'hF0F0;
7657    parameter integer PHASE_SHIFT = 0;
7658    parameter STARTUP_WAIT = "FALSE";
7659    output CLK0;
7660    output CLK180;
7661    output CLK270;
7662    output CLK2X180;
7663    output CLK2X;
7664    output CLK90;
7665    output CLKDV;
7666    output CLKFX180;
7667    output CLKFX;
7668    output LOCKED;
7669    input CLKFB;
7670    input CLKIN;
7671    input RST;
7672endmodule
7673
7674module DCM_PS (...);
7675    parameter real CLKDV_DIVIDE = 2.0;
7676    parameter integer CLKFX_DIVIDE = 1;
7677    parameter integer CLKFX_MULTIPLY = 4;
7678    parameter CLKIN_DIVIDE_BY_2 = "FALSE";
7679    parameter real CLKIN_PERIOD = 10.0;
7680    parameter CLKOUT_PHASE_SHIFT = "NONE";
7681    parameter CLK_FEEDBACK = "1X";
7682    parameter DCM_AUTOCALIBRATION = "TRUE";
7683    parameter DCM_PERFORMANCE_MODE = "MAX_SPEED";
7684    parameter DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
7685    parameter DFS_FREQUENCY_MODE = "LOW";
7686    parameter DLL_FREQUENCY_MODE = "LOW";
7687    parameter DUTY_CYCLE_CORRECTION = "TRUE";
7688    parameter [15:0] FACTORY_JF = 16'hF0F0;
7689    parameter integer PHASE_SHIFT = 0;
7690    parameter STARTUP_WAIT = "FALSE";
7691    output CLK0;
7692    output CLK180;
7693    output CLK270;
7694    output CLK2X180;
7695    output CLK2X;
7696    output CLK90;
7697    output CLKDV;
7698    output CLKFX180;
7699    output CLKFX;
7700    output LOCKED;
7701    output PSDONE;
7702    output [15:0] DO;
7703    input CLKFB;
7704    input CLKIN;
7705    input PSCLK;
7706    input PSEN;
7707    input PSINCDEC;
7708    input RST;
7709endmodule
7710
7711module PMCD (...);
7712    parameter EN_REL = "FALSE";
7713    parameter RST_DEASSERT_CLK = "CLKA";
7714    output CLKA1;
7715    output CLKA1D2;
7716    output CLKA1D4;
7717    output CLKA1D8;
7718    output CLKB1;
7719    output CLKC1;
7720    output CLKD1;
7721    input CLKA;
7722    input CLKB;
7723    input CLKC;
7724    input CLKD;
7725    input REL;
7726    input RST;
7727endmodule
7728
7729module PLL_ADV (...);
7730    parameter BANDWIDTH = "OPTIMIZED";
7731    parameter CLK_FEEDBACK = "CLKFBOUT";
7732    parameter CLKFBOUT_DESKEW_ADJUST = "NONE";
7733    parameter CLKOUT0_DESKEW_ADJUST = "NONE";
7734    parameter CLKOUT1_DESKEW_ADJUST = "NONE";
7735    parameter CLKOUT2_DESKEW_ADJUST = "NONE";
7736    parameter CLKOUT3_DESKEW_ADJUST = "NONE";
7737    parameter CLKOUT4_DESKEW_ADJUST = "NONE";
7738    parameter CLKOUT5_DESKEW_ADJUST = "NONE";
7739    parameter integer CLKFBOUT_MULT = 1;
7740    parameter real CLKFBOUT_PHASE = 0.0;
7741    parameter real CLKIN1_PERIOD = 0.000;
7742    parameter real CLKIN2_PERIOD = 0.000;
7743    parameter integer CLKOUT0_DIVIDE = 1;
7744    parameter real CLKOUT0_DUTY_CYCLE = 0.5;
7745    parameter real CLKOUT0_PHASE = 0.0;
7746    parameter integer CLKOUT1_DIVIDE = 1;
7747    parameter real CLKOUT1_DUTY_CYCLE = 0.5;
7748    parameter real CLKOUT1_PHASE = 0.0;
7749    parameter integer CLKOUT2_DIVIDE = 1;
7750    parameter real CLKOUT2_DUTY_CYCLE = 0.5;
7751    parameter real CLKOUT2_PHASE = 0.0;
7752    parameter integer CLKOUT3_DIVIDE = 1;
7753    parameter real CLKOUT3_DUTY_CYCLE = 0.5;
7754    parameter real CLKOUT3_PHASE = 0.0;
7755    parameter integer CLKOUT4_DIVIDE = 1;
7756    parameter real CLKOUT4_DUTY_CYCLE = 0.5;
7757    parameter real CLKOUT4_PHASE = 0.0;
7758    parameter integer CLKOUT5_DIVIDE = 1;
7759    parameter real CLKOUT5_DUTY_CYCLE = 0.5;
7760    parameter real CLKOUT5_PHASE = 0.0;
7761    parameter COMPENSATION = "SYSTEM_SYNCHRONOUS";
7762    parameter integer DIVCLK_DIVIDE = 1;
7763    parameter EN_REL = "FALSE";
7764    parameter PLL_PMCD_MODE = "FALSE";
7765    parameter real REF_JITTER = 0.100;
7766    parameter RESET_ON_LOSS_OF_LOCK = "FALSE";
7767    parameter RST_DEASSERT_CLK = "CLKIN1";
7768    parameter SIM_DEVICE = "VIRTEX5";
7769    parameter real VCOCLK_FREQ_MAX = 1440.0;
7770    parameter real VCOCLK_FREQ_MIN = 400.0;
7771    parameter real CLKIN_FREQ_MAX = 710.0;
7772    parameter real CLKIN_FREQ_MIN = 19.0;
7773    parameter real CLKPFD_FREQ_MAX = 550.0;
7774    parameter real CLKPFD_FREQ_MIN = 19.0;
7775    output CLKFBDCM;
7776    output CLKFBOUT;
7777    output CLKOUT0;
7778    output CLKOUT1;
7779    output CLKOUT2;
7780    output CLKOUT3;
7781    output CLKOUT4;
7782    output CLKOUT5;
7783    output CLKOUTDCM0;
7784    output CLKOUTDCM1;
7785    output CLKOUTDCM2;
7786    output CLKOUTDCM3;
7787    output CLKOUTDCM4;
7788    output CLKOUTDCM5;
7789    output DRDY;
7790    output LOCKED;
7791    output [15:0] DO;
7792    input CLKFBIN;
7793    input CLKIN1;
7794    input CLKIN2;
7795    input CLKINSEL;
7796    input DCLK;
7797    input DEN;
7798    input DWE;
7799    input REL;
7800    input RST;
7801    input [15:0] DI;
7802    input [4:0] DADDR;
7803endmodule
7804
7805module PLL_BASE (...);
7806    parameter BANDWIDTH = "OPTIMIZED";
7807    parameter integer CLKFBOUT_MULT = 1;
7808    parameter real CLKFBOUT_PHASE = 0.0;
7809    parameter real CLKIN_PERIOD = 0.000;
7810    parameter integer CLKOUT0_DIVIDE = 1;
7811    parameter real CLKOUT0_DUTY_CYCLE = 0.5;
7812    parameter real CLKOUT0_PHASE = 0.0;
7813    parameter integer CLKOUT1_DIVIDE = 1;
7814    parameter real CLKOUT1_DUTY_CYCLE = 0.5;
7815    parameter real CLKOUT1_PHASE = 0.0;
7816    parameter integer CLKOUT2_DIVIDE = 1;
7817    parameter real CLKOUT2_DUTY_CYCLE = 0.5;
7818    parameter real CLKOUT2_PHASE = 0.0;
7819    parameter integer CLKOUT3_DIVIDE = 1;
7820    parameter real CLKOUT3_DUTY_CYCLE = 0.5;
7821    parameter real CLKOUT3_PHASE = 0.0;
7822    parameter integer CLKOUT4_DIVIDE = 1;
7823    parameter real CLKOUT4_DUTY_CYCLE = 0.5;
7824    parameter real CLKOUT4_PHASE = 0.0;
7825    parameter integer CLKOUT5_DIVIDE = 1;
7826    parameter real CLKOUT5_DUTY_CYCLE = 0.5;
7827    parameter real CLKOUT5_PHASE = 0.0;
7828    parameter CLK_FEEDBACK = "CLKFBOUT";
7829    parameter COMPENSATION = "SYSTEM_SYNCHRONOUS";
7830    parameter integer DIVCLK_DIVIDE = 1;
7831    parameter real REF_JITTER = 0.100;
7832    parameter RESET_ON_LOSS_OF_LOCK = "FALSE";
7833    output CLKFBOUT;
7834    output CLKOUT0;
7835    output CLKOUT1;
7836    output CLKOUT2;
7837    output CLKOUT3;
7838    output CLKOUT4;
7839    output CLKOUT5;
7840    output LOCKED;
7841    input CLKFBIN;
7842    input CLKIN;
7843    input RST;
7844endmodule
7845
7846module MMCM_ADV (...);
7847    parameter BANDWIDTH = "OPTIMIZED";
7848    parameter CLKFBOUT_USE_FINE_PS = "FALSE";
7849    parameter CLKOUT0_USE_FINE_PS = "FALSE";
7850    parameter CLKOUT1_USE_FINE_PS = "FALSE";
7851    parameter CLKOUT2_USE_FINE_PS = "FALSE";
7852    parameter CLKOUT3_USE_FINE_PS = "FALSE";
7853    parameter CLKOUT4_CASCADE = "FALSE";
7854    parameter CLKOUT4_USE_FINE_PS = "FALSE";
7855    parameter CLKOUT5_USE_FINE_PS = "FALSE";
7856    parameter CLKOUT6_USE_FINE_PS = "FALSE";
7857    parameter CLOCK_HOLD = "FALSE";
7858    parameter COMPENSATION = "ZHOLD";
7859    parameter STARTUP_WAIT = "FALSE";
7860    parameter integer CLKOUT1_DIVIDE = 1;
7861    parameter integer CLKOUT2_DIVIDE = 1;
7862    parameter integer CLKOUT3_DIVIDE = 1;
7863    parameter integer CLKOUT4_DIVIDE = 1;
7864    parameter integer CLKOUT5_DIVIDE = 1;
7865    parameter integer CLKOUT6_DIVIDE = 1;
7866    parameter integer DIVCLK_DIVIDE = 1;
7867    parameter real CLKFBOUT_MULT_F = 5.000;
7868    parameter real CLKFBOUT_PHASE = 0.000;
7869    parameter real CLKIN1_PERIOD = 0.000;
7870    parameter real CLKIN2_PERIOD = 0.000;
7871    parameter real CLKOUT0_DIVIDE_F = 1.000;
7872    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
7873    parameter real CLKOUT0_PHASE = 0.000;
7874    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
7875    parameter real CLKOUT1_PHASE = 0.000;
7876    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
7877    parameter real CLKOUT2_PHASE = 0.000;
7878    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
7879    parameter real CLKOUT3_PHASE = 0.000;
7880    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
7881    parameter real CLKOUT4_PHASE = 0.000;
7882    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
7883    parameter real CLKOUT5_PHASE = 0.000;
7884    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
7885    parameter real CLKOUT6_PHASE = 0.000;
7886    parameter real REF_JITTER1 = 0.010;
7887    parameter real REF_JITTER2 = 0.010;
7888    parameter real VCOCLK_FREQ_MAX = 1600.0;
7889    parameter real VCOCLK_FREQ_MIN = 600.0;
7890    parameter real CLKIN_FREQ_MAX = 800.0;
7891    parameter real CLKIN_FREQ_MIN = 10.0;
7892    parameter real CLKPFD_FREQ_MAX = 550.0;
7893    parameter real CLKPFD_FREQ_MIN = 10.0;
7894    output CLKFBOUT;
7895    output CLKFBOUTB;
7896    output CLKFBSTOPPED;
7897    output CLKINSTOPPED;
7898    output CLKOUT0;
7899    output CLKOUT0B;
7900    output CLKOUT1;
7901    output CLKOUT1B;
7902    output CLKOUT2;
7903    output CLKOUT2B;
7904    output CLKOUT3;
7905    output CLKOUT3B;
7906    output CLKOUT4;
7907    output CLKOUT5;
7908    output CLKOUT6;
7909    output DRDY;
7910    output LOCKED;
7911    output PSDONE;
7912    output [15:0] DO;
7913    input CLKFBIN;
7914    input CLKIN1;
7915    input CLKIN2;
7916    input CLKINSEL;
7917    input DCLK;
7918    input DEN;
7919    input DWE;
7920    input PSCLK;
7921    input PSEN;
7922    input PSINCDEC;
7923    input PWRDWN;
7924    input RST;
7925    input [15:0] DI;
7926    input [6:0] DADDR;
7927endmodule
7928
7929module MMCM_BASE (...);
7930    parameter BANDWIDTH = "OPTIMIZED";
7931    parameter real CLKFBOUT_MULT_F = 5.000;
7932    parameter real CLKFBOUT_PHASE = 0.000;
7933    parameter real CLKIN1_PERIOD = 0.000;
7934    parameter real CLKOUT0_DIVIDE_F = 1.000;
7935    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
7936    parameter real CLKOUT0_PHASE = 0.000;
7937    parameter integer CLKOUT1_DIVIDE = 1;
7938    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
7939    parameter real CLKOUT1_PHASE = 0.000;
7940    parameter integer CLKOUT2_DIVIDE = 1;
7941    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
7942    parameter real CLKOUT2_PHASE = 0.000;
7943    parameter integer CLKOUT3_DIVIDE = 1;
7944    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
7945    parameter real CLKOUT3_PHASE = 0.000;
7946    parameter CLKOUT4_CASCADE = "FALSE";
7947    parameter integer CLKOUT4_DIVIDE = 1;
7948    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
7949    parameter real CLKOUT4_PHASE = 0.000;
7950    parameter integer CLKOUT5_DIVIDE = 1;
7951    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
7952    parameter real CLKOUT5_PHASE = 0.000;
7953    parameter integer CLKOUT6_DIVIDE = 1;
7954    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
7955    parameter real CLKOUT6_PHASE = 0.000;
7956    parameter CLOCK_HOLD = "FALSE";
7957    parameter integer DIVCLK_DIVIDE = 1;
7958    parameter real REF_JITTER1 = 0.010;
7959    parameter STARTUP_WAIT = "FALSE";
7960    output CLKFBOUT;
7961    output CLKFBOUTB;
7962    output CLKOUT0;
7963    output CLKOUT0B;
7964    output CLKOUT1;
7965    output CLKOUT1B;
7966    output CLKOUT2;
7967    output CLKOUT2B;
7968    output CLKOUT3;
7969    output CLKOUT3B;
7970    output CLKOUT4;
7971    output CLKOUT5;
7972    output CLKOUT6;
7973    output LOCKED;
7974    input CLKFBIN;
7975    input CLKIN1;
7976    input PWRDWN;
7977    input RST;
7978endmodule
7979
7980module MMCME2_ADV (...);
7981    parameter real CLKIN_FREQ_MAX = 1066.000;
7982    parameter real CLKIN_FREQ_MIN = 10.000;
7983    parameter real CLKPFD_FREQ_MAX = 550.000;
7984    parameter real CLKPFD_FREQ_MIN = 10.000;
7985    parameter real VCOCLK_FREQ_MAX = 1600.000;
7986    parameter real VCOCLK_FREQ_MIN = 600.000;
7987    parameter BANDWIDTH = "OPTIMIZED";
7988    parameter real CLKFBOUT_MULT_F = 5.000;
7989    parameter real CLKFBOUT_PHASE = 0.000;
7990    parameter CLKFBOUT_USE_FINE_PS = "FALSE";
7991    parameter real CLKIN1_PERIOD = 0.000;
7992    parameter real CLKIN2_PERIOD = 0.000;
7993    parameter real CLKOUT0_DIVIDE_F = 1.000;
7994    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
7995    parameter real CLKOUT0_PHASE = 0.000;
7996    parameter CLKOUT0_USE_FINE_PS = "FALSE";
7997    parameter integer CLKOUT1_DIVIDE = 1;
7998    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
7999    parameter real CLKOUT1_PHASE = 0.000;
8000    parameter CLKOUT1_USE_FINE_PS = "FALSE";
8001    parameter integer CLKOUT2_DIVIDE = 1;
8002    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8003    parameter real CLKOUT2_PHASE = 0.000;
8004    parameter CLKOUT2_USE_FINE_PS = "FALSE";
8005    parameter integer CLKOUT3_DIVIDE = 1;
8006    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8007    parameter real CLKOUT3_PHASE = 0.000;
8008    parameter CLKOUT3_USE_FINE_PS = "FALSE";
8009    parameter CLKOUT4_CASCADE = "FALSE";
8010    parameter integer CLKOUT4_DIVIDE = 1;
8011    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8012    parameter real CLKOUT4_PHASE = 0.000;
8013    parameter CLKOUT4_USE_FINE_PS = "FALSE";
8014    parameter integer CLKOUT5_DIVIDE = 1;
8015    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8016    parameter real CLKOUT5_PHASE = 0.000;
8017    parameter CLKOUT5_USE_FINE_PS = "FALSE";
8018    parameter integer CLKOUT6_DIVIDE = 1;
8019    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8020    parameter real CLKOUT6_PHASE = 0.000;
8021    parameter CLKOUT6_USE_FINE_PS = "FALSE";
8022    parameter COMPENSATION = "ZHOLD";
8023    parameter integer DIVCLK_DIVIDE = 1;
8024    parameter [0:0] IS_CLKINSEL_INVERTED = 1'b0;
8025    parameter [0:0] IS_PSEN_INVERTED = 1'b0;
8026    parameter [0:0] IS_PSINCDEC_INVERTED = 1'b0;
8027    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8028    parameter [0:0] IS_RST_INVERTED = 1'b0;
8029    parameter real REF_JITTER1 = 0.010;
8030    parameter real REF_JITTER2 = 0.010;
8031    parameter SS_EN = "FALSE";
8032    parameter SS_MODE = "CENTER_HIGH";
8033    parameter integer SS_MOD_PERIOD = 10000;
8034    parameter STARTUP_WAIT = "FALSE";
8035    output CLKFBOUT;
8036    output CLKFBOUTB;
8037    output CLKFBSTOPPED;
8038    output CLKINSTOPPED;
8039    output CLKOUT0;
8040    output CLKOUT0B;
8041    output CLKOUT1;
8042    output CLKOUT1B;
8043    output CLKOUT2;
8044    output CLKOUT2B;
8045    output CLKOUT3;
8046    output CLKOUT3B;
8047    output CLKOUT4;
8048    output CLKOUT5;
8049    output CLKOUT6;
8050    output [15:0] DO;
8051    output DRDY;
8052    output LOCKED;
8053    output PSDONE;
8054    input CLKFBIN;
8055    input CLKIN1;
8056    input CLKIN2;
8057    (* invertible_pin = "IS_CLKINSEL_INVERTED" *)
8058    input CLKINSEL;
8059    input [6:0] DADDR;
8060    input DCLK;
8061    input DEN;
8062    input [15:0] DI;
8063    input DWE;
8064    input PSCLK;
8065    (* invertible_pin = "IS_PSEN_INVERTED" *)
8066    input PSEN;
8067    (* invertible_pin = "IS_PSINCDEC_INVERTED" *)
8068    input PSINCDEC;
8069    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8070    input PWRDWN;
8071    (* invertible_pin = "IS_RST_INVERTED" *)
8072    input RST;
8073endmodule
8074
8075module MMCME2_BASE (...);
8076    parameter BANDWIDTH = "OPTIMIZED";
8077    parameter real CLKFBOUT_MULT_F = 5.000;
8078    parameter real CLKFBOUT_PHASE = 0.000;
8079    parameter real CLKIN1_PERIOD = 0.000;
8080    parameter real CLKOUT0_DIVIDE_F = 1.000;
8081    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8082    parameter real CLKOUT0_PHASE = 0.000;
8083    parameter integer CLKOUT1_DIVIDE = 1;
8084    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8085    parameter real CLKOUT1_PHASE = 0.000;
8086    parameter integer CLKOUT2_DIVIDE = 1;
8087    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8088    parameter real CLKOUT2_PHASE = 0.000;
8089    parameter integer CLKOUT3_DIVIDE = 1;
8090    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8091    parameter real CLKOUT3_PHASE = 0.000;
8092    parameter CLKOUT4_CASCADE = "FALSE";
8093    parameter integer CLKOUT4_DIVIDE = 1;
8094    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8095    parameter real CLKOUT4_PHASE = 0.000;
8096    parameter integer CLKOUT5_DIVIDE = 1;
8097    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8098    parameter real CLKOUT5_PHASE = 0.000;
8099    parameter integer CLKOUT6_DIVIDE = 1;
8100    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8101    parameter real CLKOUT6_PHASE = 0.000;
8102    parameter integer DIVCLK_DIVIDE = 1;
8103    parameter real REF_JITTER1 = 0.010;
8104    parameter STARTUP_WAIT = "FALSE";
8105    output CLKFBOUT;
8106    output CLKFBOUTB;
8107    output CLKOUT0;
8108    output CLKOUT0B;
8109    output CLKOUT1;
8110    output CLKOUT1B;
8111    output CLKOUT2;
8112    output CLKOUT2B;
8113    output CLKOUT3;
8114    output CLKOUT3B;
8115    output CLKOUT4;
8116    output CLKOUT5;
8117    output CLKOUT6;
8118    output LOCKED;
8119    input CLKFBIN;
8120    input CLKIN1;
8121    input PWRDWN;
8122    input RST;
8123endmodule
8124
8125module PLLE2_ADV (...);
8126    parameter BANDWIDTH = "OPTIMIZED";
8127    parameter COMPENSATION = "ZHOLD";
8128    parameter STARTUP_WAIT = "FALSE";
8129    parameter integer CLKOUT0_DIVIDE = 1;
8130    parameter integer CLKOUT1_DIVIDE = 1;
8131    parameter integer CLKOUT2_DIVIDE = 1;
8132    parameter integer CLKOUT3_DIVIDE = 1;
8133    parameter integer CLKOUT4_DIVIDE = 1;
8134    parameter integer CLKOUT5_DIVIDE = 1;
8135    parameter integer DIVCLK_DIVIDE = 1;
8136    parameter integer CLKFBOUT_MULT = 5;
8137    parameter real CLKFBOUT_PHASE = 0.000;
8138    parameter real CLKIN1_PERIOD = 0.000;
8139    parameter real CLKIN2_PERIOD = 0.000;
8140    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8141    parameter real CLKOUT0_PHASE = 0.000;
8142    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8143    parameter real CLKOUT1_PHASE = 0.000;
8144    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8145    parameter real CLKOUT2_PHASE = 0.000;
8146    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8147    parameter real CLKOUT3_PHASE = 0.000;
8148    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8149    parameter real CLKOUT4_PHASE = 0.000;
8150    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8151    parameter real CLKOUT5_PHASE = 0.000;
8152    parameter [0:0] IS_CLKINSEL_INVERTED = 1'b0;
8153    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8154    parameter [0:0] IS_RST_INVERTED = 1'b0;
8155    parameter real REF_JITTER1 = 0.010;
8156    parameter real REF_JITTER2 = 0.010;
8157    parameter real VCOCLK_FREQ_MAX = 2133.000;
8158    parameter real VCOCLK_FREQ_MIN = 800.000;
8159    parameter real CLKIN_FREQ_MAX = 1066.000;
8160    parameter real CLKIN_FREQ_MIN = 19.000;
8161    parameter real CLKPFD_FREQ_MAX = 550.0;
8162    parameter real CLKPFD_FREQ_MIN = 19.0;
8163    output CLKFBOUT;
8164    output CLKOUT0;
8165    output CLKOUT1;
8166    output CLKOUT2;
8167    output CLKOUT3;
8168    output CLKOUT4;
8169    output CLKOUT5;
8170    output DRDY;
8171    output LOCKED;
8172    output [15:0] DO;
8173    input CLKFBIN;
8174    input CLKIN1;
8175    input CLKIN2;
8176    (* invertible_pin = "IS_CLKINSEL_INVERTED" *)
8177    input CLKINSEL;
8178    input DCLK;
8179    input DEN;
8180    input DWE;
8181    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8182    input PWRDWN;
8183    (* invertible_pin = "IS_RST_INVERTED" *)
8184    input RST;
8185    input [15:0] DI;
8186    input [6:0] DADDR;
8187endmodule
8188
8189module PLLE2_BASE (...);
8190    parameter BANDWIDTH = "OPTIMIZED";
8191    parameter integer CLKFBOUT_MULT = 5;
8192    parameter real CLKFBOUT_PHASE = 0.000;
8193    parameter real CLKIN1_PERIOD = 0.000;
8194    parameter integer CLKOUT0_DIVIDE = 1;
8195    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8196    parameter real CLKOUT0_PHASE = 0.000;
8197    parameter integer CLKOUT1_DIVIDE = 1;
8198    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8199    parameter real CLKOUT1_PHASE = 0.000;
8200    parameter integer CLKOUT2_DIVIDE = 1;
8201    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8202    parameter real CLKOUT2_PHASE = 0.000;
8203    parameter integer CLKOUT3_DIVIDE = 1;
8204    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8205    parameter real CLKOUT3_PHASE = 0.000;
8206    parameter integer CLKOUT4_DIVIDE = 1;
8207    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8208    parameter real CLKOUT4_PHASE = 0.000;
8209    parameter integer CLKOUT5_DIVIDE = 1;
8210    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8211    parameter real CLKOUT5_PHASE = 0.000;
8212    parameter integer DIVCLK_DIVIDE = 1;
8213    parameter real REF_JITTER1 = 0.010;
8214    parameter STARTUP_WAIT = "FALSE";
8215    output CLKFBOUT;
8216    output CLKOUT0;
8217    output CLKOUT1;
8218    output CLKOUT2;
8219    output CLKOUT3;
8220    output CLKOUT4;
8221    output CLKOUT5;
8222    output LOCKED;
8223    input CLKFBIN;
8224    input CLKIN1;
8225    input PWRDWN;
8226    input RST;
8227endmodule
8228
8229module MMCME3_ADV (...);
8230    parameter real CLKIN_FREQ_MAX = 1066.000;
8231    parameter real CLKIN_FREQ_MIN = 10.000;
8232    parameter real CLKPFD_FREQ_MAX = 550.000;
8233    parameter real CLKPFD_FREQ_MIN = 10.000;
8234    parameter real VCOCLK_FREQ_MAX = 1600.000;
8235    parameter real VCOCLK_FREQ_MIN = 600.000;
8236    parameter BANDWIDTH = "OPTIMIZED";
8237    parameter real CLKFBOUT_MULT_F = 5.000;
8238    parameter real CLKFBOUT_PHASE = 0.000;
8239    parameter CLKFBOUT_USE_FINE_PS = "FALSE";
8240    parameter real CLKIN1_PERIOD = 0.000;
8241    parameter real CLKIN2_PERIOD = 0.000;
8242    parameter real CLKOUT0_DIVIDE_F = 1.000;
8243    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8244    parameter real CLKOUT0_PHASE = 0.000;
8245    parameter CLKOUT0_USE_FINE_PS = "FALSE";
8246    parameter integer CLKOUT1_DIVIDE = 1;
8247    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8248    parameter real CLKOUT1_PHASE = 0.000;
8249    parameter CLKOUT1_USE_FINE_PS = "FALSE";
8250    parameter integer CLKOUT2_DIVIDE = 1;
8251    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8252    parameter real CLKOUT2_PHASE = 0.000;
8253    parameter CLKOUT2_USE_FINE_PS = "FALSE";
8254    parameter integer CLKOUT3_DIVIDE = 1;
8255    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8256    parameter real CLKOUT3_PHASE = 0.000;
8257    parameter CLKOUT3_USE_FINE_PS = "FALSE";
8258    parameter CLKOUT4_CASCADE = "FALSE";
8259    parameter integer CLKOUT4_DIVIDE = 1;
8260    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8261    parameter real CLKOUT4_PHASE = 0.000;
8262    parameter CLKOUT4_USE_FINE_PS = "FALSE";
8263    parameter integer CLKOUT5_DIVIDE = 1;
8264    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8265    parameter real CLKOUT5_PHASE = 0.000;
8266    parameter CLKOUT5_USE_FINE_PS = "FALSE";
8267    parameter integer CLKOUT6_DIVIDE = 1;
8268    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8269    parameter real CLKOUT6_PHASE = 0.000;
8270    parameter CLKOUT6_USE_FINE_PS = "FALSE";
8271    parameter COMPENSATION = "AUTO";
8272    parameter integer DIVCLK_DIVIDE = 1;
8273    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8274    parameter [0:0] IS_CLKIN1_INVERTED = 1'b0;
8275    parameter [0:0] IS_CLKIN2_INVERTED = 1'b0;
8276    parameter [0:0] IS_CLKINSEL_INVERTED = 1'b0;
8277    parameter [0:0] IS_PSEN_INVERTED = 1'b0;
8278    parameter [0:0] IS_PSINCDEC_INVERTED = 1'b0;
8279    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8280    parameter [0:0] IS_RST_INVERTED = 1'b0;
8281    parameter real REF_JITTER1 = 0.010;
8282    parameter real REF_JITTER2 = 0.010;
8283    parameter SS_EN = "FALSE";
8284    parameter SS_MODE = "CENTER_HIGH";
8285    parameter integer SS_MOD_PERIOD = 10000;
8286    parameter STARTUP_WAIT = "FALSE";
8287    output CDDCDONE;
8288    output CLKFBOUT;
8289    output CLKFBOUTB;
8290    output CLKFBSTOPPED;
8291    output CLKINSTOPPED;
8292    output CLKOUT0;
8293    output CLKOUT0B;
8294    output CLKOUT1;
8295    output CLKOUT1B;
8296    output CLKOUT2;
8297    output CLKOUT2B;
8298    output CLKOUT3;
8299    output CLKOUT3B;
8300    output CLKOUT4;
8301    output CLKOUT5;
8302    output CLKOUT6;
8303    output [15:0] DO;
8304    output DRDY;
8305    output LOCKED;
8306    output PSDONE;
8307    input CDDCREQ;
8308    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8309    input CLKFBIN;
8310    (* invertible_pin = "IS_CLKIN1_INVERTED" *)
8311    input CLKIN1;
8312    (* invertible_pin = "IS_CLKIN2_INVERTED" *)
8313    input CLKIN2;
8314    (* invertible_pin = "IS_CLKINSEL_INVERTED" *)
8315    input CLKINSEL;
8316    input [6:0] DADDR;
8317    input DCLK;
8318    input DEN;
8319    input [15:0] DI;
8320    input DWE;
8321    input PSCLK;
8322    (* invertible_pin = "IS_PSEN_INVERTED" *)
8323    input PSEN;
8324    (* invertible_pin = "IS_PSINCDEC_INVERTED" *)
8325    input PSINCDEC;
8326    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8327    input PWRDWN;
8328    (* invertible_pin = "IS_RST_INVERTED" *)
8329    input RST;
8330endmodule
8331
8332module MMCME3_BASE (...);
8333    parameter BANDWIDTH = "OPTIMIZED";
8334    parameter real CLKFBOUT_MULT_F = 5.000;
8335    parameter real CLKFBOUT_PHASE = 0.000;
8336    parameter real CLKIN1_PERIOD = 0.000;
8337    parameter real CLKOUT0_DIVIDE_F = 1.000;
8338    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8339    parameter real CLKOUT0_PHASE = 0.000;
8340    parameter integer CLKOUT1_DIVIDE = 1;
8341    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8342    parameter real CLKOUT1_PHASE = 0.000;
8343    parameter integer CLKOUT2_DIVIDE = 1;
8344    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8345    parameter real CLKOUT2_PHASE = 0.000;
8346    parameter integer CLKOUT3_DIVIDE = 1;
8347    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8348    parameter real CLKOUT3_PHASE = 0.000;
8349    parameter CLKOUT4_CASCADE = "FALSE";
8350    parameter integer CLKOUT4_DIVIDE = 1;
8351    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8352    parameter real CLKOUT4_PHASE = 0.000;
8353    parameter integer CLKOUT5_DIVIDE = 1;
8354    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8355    parameter real CLKOUT5_PHASE = 0.000;
8356    parameter integer CLKOUT6_DIVIDE = 1;
8357    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8358    parameter real CLKOUT6_PHASE = 0.000;
8359    parameter integer DIVCLK_DIVIDE = 1;
8360    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8361    parameter [0:0] IS_CLKIN1_INVERTED = 1'b0;
8362    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8363    parameter [0:0] IS_RST_INVERTED = 1'b0;
8364    parameter real REF_JITTER1 = 0.010;
8365    parameter STARTUP_WAIT = "FALSE";
8366    output CLKFBOUT;
8367    output CLKFBOUTB;
8368    output CLKOUT0;
8369    output CLKOUT0B;
8370    output CLKOUT1;
8371    output CLKOUT1B;
8372    output CLKOUT2;
8373    output CLKOUT2B;
8374    output CLKOUT3;
8375    output CLKOUT3B;
8376    output CLKOUT4;
8377    output CLKOUT5;
8378    output CLKOUT6;
8379    output LOCKED;
8380    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8381    input CLKFBIN;
8382    (* invertible_pin = "IS_CLKIN1_INVERTED" *)
8383    input CLKIN1;
8384    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8385    input PWRDWN;
8386    (* invertible_pin = "IS_RST_INVERTED" *)
8387    input RST;
8388endmodule
8389
8390module PLLE3_ADV (...);
8391    parameter real CLKIN_FREQ_MAX = 1066.000;
8392    parameter real CLKIN_FREQ_MIN = 70.000;
8393    parameter real CLKPFD_FREQ_MAX = 667.500;
8394    parameter real CLKPFD_FREQ_MIN = 70.000;
8395    parameter real VCOCLK_FREQ_MAX = 1335.000;
8396    parameter real VCOCLK_FREQ_MIN = 600.000;
8397    parameter integer CLKFBOUT_MULT = 5;
8398    parameter real CLKFBOUT_PHASE = 0.000;
8399    parameter real CLKIN_PERIOD = 0.000;
8400    parameter integer CLKOUT0_DIVIDE = 1;
8401    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8402    parameter real CLKOUT0_PHASE = 0.000;
8403    parameter integer CLKOUT1_DIVIDE = 1;
8404    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8405    parameter real CLKOUT1_PHASE = 0.000;
8406    parameter CLKOUTPHY_MODE = "VCO_2X";
8407    parameter COMPENSATION = "AUTO";
8408    parameter integer DIVCLK_DIVIDE = 1;
8409    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8410    parameter [0:0] IS_CLKIN_INVERTED = 1'b0;
8411    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8412    parameter [0:0] IS_RST_INVERTED = 1'b0;
8413    parameter real REF_JITTER = 0.010;
8414    parameter STARTUP_WAIT = "FALSE";
8415    output CLKFBOUT;
8416    output CLKOUT0;
8417    output CLKOUT0B;
8418    output CLKOUT1;
8419    output CLKOUT1B;
8420    output CLKOUTPHY;
8421    output [15:0] DO;
8422    output DRDY;
8423    output LOCKED;
8424    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8425    input CLKFBIN;
8426    (* invertible_pin = "IS_CLKIN_INVERTED" *)
8427    input CLKIN;
8428    input CLKOUTPHYEN;
8429    input [6:0] DADDR;
8430    input DCLK;
8431    input DEN;
8432    input [15:0] DI;
8433    input DWE;
8434    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8435    input PWRDWN;
8436    (* invertible_pin = "IS_RST_INVERTED" *)
8437    input RST;
8438endmodule
8439
8440module PLLE3_BASE (...);
8441    parameter integer CLKFBOUT_MULT = 5;
8442    parameter real CLKFBOUT_PHASE = 0.000;
8443    parameter real CLKIN_PERIOD = 0.000;
8444    parameter integer CLKOUT0_DIVIDE = 1;
8445    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8446    parameter real CLKOUT0_PHASE = 0.000;
8447    parameter integer CLKOUT1_DIVIDE = 1;
8448    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8449    parameter real CLKOUT1_PHASE = 0.000;
8450    parameter CLKOUTPHY_MODE = "VCO_2X";
8451    parameter integer DIVCLK_DIVIDE = 1;
8452    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8453    parameter [0:0] IS_CLKIN_INVERTED = 1'b0;
8454    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8455    parameter [0:0] IS_RST_INVERTED = 1'b0;
8456    parameter real REF_JITTER = 0.010;
8457    parameter STARTUP_WAIT = "FALSE";
8458    output CLKFBOUT;
8459    output CLKOUT0;
8460    output CLKOUT0B;
8461    output CLKOUT1;
8462    output CLKOUT1B;
8463    output CLKOUTPHY;
8464    output LOCKED;
8465    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8466    input CLKFBIN;
8467    (* invertible_pin = "IS_CLKIN_INVERTED" *)
8468    input CLKIN;
8469    input CLKOUTPHYEN;
8470    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8471    input PWRDWN;
8472    (* invertible_pin = "IS_RST_INVERTED" *)
8473    input RST;
8474endmodule
8475
8476module MMCME4_ADV (...);
8477    parameter real CLKIN_FREQ_MAX = 1066.000;
8478    parameter real CLKIN_FREQ_MIN = 10.000;
8479    parameter real CLKPFD_FREQ_MAX = 550.000;
8480    parameter real CLKPFD_FREQ_MIN = 10.000;
8481    parameter real VCOCLK_FREQ_MAX = 1600.000;
8482    parameter real VCOCLK_FREQ_MIN = 800.000;
8483    parameter BANDWIDTH = "OPTIMIZED";
8484    parameter real CLKFBOUT_MULT_F = 5.000;
8485    parameter real CLKFBOUT_PHASE = 0.000;
8486    parameter CLKFBOUT_USE_FINE_PS = "FALSE";
8487    parameter real CLKIN1_PERIOD = 0.000;
8488    parameter real CLKIN2_PERIOD = 0.000;
8489    parameter real CLKOUT0_DIVIDE_F = 1.000;
8490    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8491    parameter real CLKOUT0_PHASE = 0.000;
8492    parameter CLKOUT0_USE_FINE_PS = "FALSE";
8493    parameter integer CLKOUT1_DIVIDE = 1;
8494    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8495    parameter real CLKOUT1_PHASE = 0.000;
8496    parameter CLKOUT1_USE_FINE_PS = "FALSE";
8497    parameter integer CLKOUT2_DIVIDE = 1;
8498    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8499    parameter real CLKOUT2_PHASE = 0.000;
8500    parameter CLKOUT2_USE_FINE_PS = "FALSE";
8501    parameter integer CLKOUT3_DIVIDE = 1;
8502    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8503    parameter real CLKOUT3_PHASE = 0.000;
8504    parameter CLKOUT3_USE_FINE_PS = "FALSE";
8505    parameter CLKOUT4_CASCADE = "FALSE";
8506    parameter integer CLKOUT4_DIVIDE = 1;
8507    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8508    parameter real CLKOUT4_PHASE = 0.000;
8509    parameter CLKOUT4_USE_FINE_PS = "FALSE";
8510    parameter integer CLKOUT5_DIVIDE = 1;
8511    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8512    parameter real CLKOUT5_PHASE = 0.000;
8513    parameter CLKOUT5_USE_FINE_PS = "FALSE";
8514    parameter integer CLKOUT6_DIVIDE = 1;
8515    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8516    parameter real CLKOUT6_PHASE = 0.000;
8517    parameter CLKOUT6_USE_FINE_PS = "FALSE";
8518    parameter COMPENSATION = "AUTO";
8519    parameter integer DIVCLK_DIVIDE = 1;
8520    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8521    parameter [0:0] IS_CLKIN1_INVERTED = 1'b0;
8522    parameter [0:0] IS_CLKIN2_INVERTED = 1'b0;
8523    parameter [0:0] IS_CLKINSEL_INVERTED = 1'b0;
8524    parameter [0:0] IS_PSEN_INVERTED = 1'b0;
8525    parameter [0:0] IS_PSINCDEC_INVERTED = 1'b0;
8526    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8527    parameter [0:0] IS_RST_INVERTED = 1'b0;
8528    parameter real REF_JITTER1 = 0.010;
8529    parameter real REF_JITTER2 = 0.010;
8530    parameter SS_EN = "FALSE";
8531    parameter SS_MODE = "CENTER_HIGH";
8532    parameter integer SS_MOD_PERIOD = 10000;
8533    parameter STARTUP_WAIT = "FALSE";
8534    output CDDCDONE;
8535    output CLKFBOUT;
8536    output CLKFBOUTB;
8537    output CLKFBSTOPPED;
8538    output CLKINSTOPPED;
8539    output CLKOUT0;
8540    output CLKOUT0B;
8541    output CLKOUT1;
8542    output CLKOUT1B;
8543    output CLKOUT2;
8544    output CLKOUT2B;
8545    output CLKOUT3;
8546    output CLKOUT3B;
8547    output CLKOUT4;
8548    output CLKOUT5;
8549    output CLKOUT6;
8550    output [15:0] DO;
8551    output DRDY;
8552    output LOCKED;
8553    output PSDONE;
8554    input CDDCREQ;
8555    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8556    input CLKFBIN;
8557    (* invertible_pin = "IS_CLKIN1_INVERTED" *)
8558    input CLKIN1;
8559    (* invertible_pin = "IS_CLKIN2_INVERTED" *)
8560    input CLKIN2;
8561    (* invertible_pin = "IS_CLKINSEL_INVERTED" *)
8562    input CLKINSEL;
8563    input [6:0] DADDR;
8564    input DCLK;
8565    input DEN;
8566    input [15:0] DI;
8567    input DWE;
8568    input PSCLK;
8569    (* invertible_pin = "IS_PSEN_INVERTED" *)
8570    input PSEN;
8571    (* invertible_pin = "IS_PSINCDEC_INVERTED" *)
8572    input PSINCDEC;
8573    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8574    input PWRDWN;
8575    (* invertible_pin = "IS_RST_INVERTED" *)
8576    input RST;
8577endmodule
8578
8579module MMCME4_BASE (...);
8580    parameter BANDWIDTH = "OPTIMIZED";
8581    parameter real CLKFBOUT_MULT_F = 5.000;
8582    parameter real CLKFBOUT_PHASE = 0.000;
8583    parameter real CLKIN1_PERIOD = 0.000;
8584    parameter real CLKOUT0_DIVIDE_F = 1.000;
8585    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8586    parameter real CLKOUT0_PHASE = 0.000;
8587    parameter integer CLKOUT1_DIVIDE = 1;
8588    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8589    parameter real CLKOUT1_PHASE = 0.000;
8590    parameter integer CLKOUT2_DIVIDE = 1;
8591    parameter real CLKOUT2_DUTY_CYCLE = 0.500;
8592    parameter real CLKOUT2_PHASE = 0.000;
8593    parameter integer CLKOUT3_DIVIDE = 1;
8594    parameter real CLKOUT3_DUTY_CYCLE = 0.500;
8595    parameter real CLKOUT3_PHASE = 0.000;
8596    parameter CLKOUT4_CASCADE = "FALSE";
8597    parameter integer CLKOUT4_DIVIDE = 1;
8598    parameter real CLKOUT4_DUTY_CYCLE = 0.500;
8599    parameter real CLKOUT4_PHASE = 0.000;
8600    parameter integer CLKOUT5_DIVIDE = 1;
8601    parameter real CLKOUT5_DUTY_CYCLE = 0.500;
8602    parameter real CLKOUT5_PHASE = 0.000;
8603    parameter integer CLKOUT6_DIVIDE = 1;
8604    parameter real CLKOUT6_DUTY_CYCLE = 0.500;
8605    parameter real CLKOUT6_PHASE = 0.000;
8606    parameter integer DIVCLK_DIVIDE = 1;
8607    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8608    parameter [0:0] IS_CLKIN1_INVERTED = 1'b0;
8609    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8610    parameter [0:0] IS_RST_INVERTED = 1'b0;
8611    parameter real REF_JITTER1 = 0.010;
8612    parameter STARTUP_WAIT = "FALSE";
8613    output CLKFBOUT;
8614    output CLKFBOUTB;
8615    output CLKOUT0;
8616    output CLKOUT0B;
8617    output CLKOUT1;
8618    output CLKOUT1B;
8619    output CLKOUT2;
8620    output CLKOUT2B;
8621    output CLKOUT3;
8622    output CLKOUT3B;
8623    output CLKOUT4;
8624    output CLKOUT5;
8625    output CLKOUT6;
8626    output LOCKED;
8627    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8628    input CLKFBIN;
8629    (* invertible_pin = "IS_CLKIN1_INVERTED" *)
8630    input CLKIN1;
8631    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8632    input PWRDWN;
8633    (* invertible_pin = "IS_RST_INVERTED" *)
8634    input RST;
8635endmodule
8636
8637module PLLE4_ADV (...);
8638    parameter real CLKIN_FREQ_MAX = 1066.000;
8639    parameter real CLKIN_FREQ_MIN = 70.000;
8640    parameter real CLKPFD_FREQ_MAX = 667.500;
8641    parameter real CLKPFD_FREQ_MIN = 70.000;
8642    parameter real VCOCLK_FREQ_MAX = 1500.000;
8643    parameter real VCOCLK_FREQ_MIN = 750.000;
8644    parameter integer CLKFBOUT_MULT = 5;
8645    parameter real CLKFBOUT_PHASE = 0.000;
8646    parameter real CLKIN_PERIOD = 0.000;
8647    parameter integer CLKOUT0_DIVIDE = 1;
8648    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8649    parameter real CLKOUT0_PHASE = 0.000;
8650    parameter integer CLKOUT1_DIVIDE = 1;
8651    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8652    parameter real CLKOUT1_PHASE = 0.000;
8653    parameter CLKOUTPHY_MODE = "VCO_2X";
8654    parameter COMPENSATION = "AUTO";
8655    parameter integer DIVCLK_DIVIDE = 1;
8656    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8657    parameter [0:0] IS_CLKIN_INVERTED = 1'b0;
8658    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8659    parameter [0:0] IS_RST_INVERTED = 1'b0;
8660    parameter real REF_JITTER = 0.010;
8661    parameter STARTUP_WAIT = "FALSE";
8662    output CLKFBOUT;
8663    output CLKOUT0;
8664    output CLKOUT0B;
8665    output CLKOUT1;
8666    output CLKOUT1B;
8667    output CLKOUTPHY;
8668    output [15:0] DO;
8669    output DRDY;
8670    output LOCKED;
8671    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8672    input CLKFBIN;
8673    (* invertible_pin = "IS_CLKIN_INVERTED" *)
8674    input CLKIN;
8675    input CLKOUTPHYEN;
8676    input [6:0] DADDR;
8677    input DCLK;
8678    input DEN;
8679    input [15:0] DI;
8680    input DWE;
8681    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8682    input PWRDWN;
8683    (* invertible_pin = "IS_RST_INVERTED" *)
8684    input RST;
8685endmodule
8686
8687module PLLE4_BASE (...);
8688    parameter integer CLKFBOUT_MULT = 5;
8689    parameter real CLKFBOUT_PHASE = 0.000;
8690    parameter real CLKIN_PERIOD = 0.000;
8691    parameter integer CLKOUT0_DIVIDE = 1;
8692    parameter real CLKOUT0_DUTY_CYCLE = 0.500;
8693    parameter real CLKOUT0_PHASE = 0.000;
8694    parameter integer CLKOUT1_DIVIDE = 1;
8695    parameter real CLKOUT1_DUTY_CYCLE = 0.500;
8696    parameter real CLKOUT1_PHASE = 0.000;
8697    parameter CLKOUTPHY_MODE = "VCO_2X";
8698    parameter integer DIVCLK_DIVIDE = 1;
8699    parameter [0:0] IS_CLKFBIN_INVERTED = 1'b0;
8700    parameter [0:0] IS_CLKIN_INVERTED = 1'b0;
8701    parameter [0:0] IS_PWRDWN_INVERTED = 1'b0;
8702    parameter [0:0] IS_RST_INVERTED = 1'b0;
8703    parameter real REF_JITTER = 0.010;
8704    parameter STARTUP_WAIT = "FALSE";
8705    output CLKFBOUT;
8706    output CLKOUT0;
8707    output CLKOUT0B;
8708    output CLKOUT1;
8709    output CLKOUT1B;
8710    output CLKOUTPHY;
8711    output LOCKED;
8712    (* invertible_pin = "IS_CLKFBIN_INVERTED" *)
8713    input CLKFBIN;
8714    (* invertible_pin = "IS_CLKIN_INVERTED" *)
8715    input CLKIN;
8716    input CLKOUTPHYEN;
8717    (* invertible_pin = "IS_PWRDWN_INVERTED" *)
8718    input PWRDWN;
8719    (* invertible_pin = "IS_RST_INVERTED" *)
8720    input RST;
8721endmodule
8722
8723module BUFT (...);
8724    output O;
8725    input I;
8726    input T;
8727endmodule
8728
8729module IN_FIFO (...);
8730    parameter integer ALMOST_EMPTY_VALUE = 1;
8731    parameter integer ALMOST_FULL_VALUE = 1;
8732    parameter ARRAY_MODE = "ARRAY_MODE_4_X_8";
8733    parameter SYNCHRONOUS_MODE = "FALSE";
8734    output ALMOSTEMPTY;
8735    output ALMOSTFULL;
8736    output EMPTY;
8737    output FULL;
8738    output [7:0] Q0;
8739    output [7:0] Q1;
8740    output [7:0] Q2;
8741    output [7:0] Q3;
8742    output [7:0] Q4;
8743    output [7:0] Q5;
8744    output [7:0] Q6;
8745    output [7:0] Q7;
8746    output [7:0] Q8;
8747    output [7:0] Q9;
8748    (* clkbuf_sink *)
8749    input RDCLK;
8750    input RDEN;
8751    input RESET;
8752    (* clkbuf_sink *)
8753    input WRCLK;
8754    input WREN;
8755    input [3:0] D0;
8756    input [3:0] D1;
8757    input [3:0] D2;
8758    input [3:0] D3;
8759    input [3:0] D4;
8760    input [3:0] D7;
8761    input [3:0] D8;
8762    input [3:0] D9;
8763    input [7:0] D5;
8764    input [7:0] D6;
8765endmodule
8766
8767module OUT_FIFO (...);
8768    parameter integer ALMOST_EMPTY_VALUE = 1;
8769    parameter integer ALMOST_FULL_VALUE = 1;
8770    parameter ARRAY_MODE = "ARRAY_MODE_8_X_4";
8771    parameter OUTPUT_DISABLE = "FALSE";
8772    parameter SYNCHRONOUS_MODE = "FALSE";
8773    output ALMOSTEMPTY;
8774    output ALMOSTFULL;
8775    output EMPTY;
8776    output FULL;
8777    output [3:0] Q0;
8778    output [3:0] Q1;
8779    output [3:0] Q2;
8780    output [3:0] Q3;
8781    output [3:0] Q4;
8782    output [3:0] Q7;
8783    output [3:0] Q8;
8784    output [3:0] Q9;
8785    output [7:0] Q5;
8786    output [7:0] Q6;
8787    (* clkbuf_sink *)
8788    input RDCLK;
8789    input RDEN;
8790    input RESET;
8791    (* clkbuf_sink *)
8792    input WRCLK;
8793    input WREN;
8794    input [7:0] D0;
8795    input [7:0] D1;
8796    input [7:0] D2;
8797    input [7:0] D3;
8798    input [7:0] D4;
8799    input [7:0] D5;
8800    input [7:0] D6;
8801    input [7:0] D7;
8802    input [7:0] D8;
8803    input [7:0] D9;
8804endmodule
8805
8806module HARD_SYNC (...);
8807    parameter [0:0] INIT = 1'b0;
8808    parameter [0:0] IS_CLK_INVERTED = 1'b0;
8809    parameter integer LATENCY = 2;
8810    output DOUT;
8811    (* clkbuf_sink *)
8812    (* invertible_pin = "IS_CLK_INVERTED" *)
8813    input CLK;
8814    input DIN;
8815endmodule
8816
8817(* keep *)
8818module STARTUP_SPARTAN3 (...);
8819    input CLK;
8820    input GSR;
8821    input GTS;
8822endmodule
8823
8824(* keep *)
8825module STARTUP_SPARTAN3E (...);
8826    input CLK;
8827    input GSR;
8828    input GTS;
8829    input MBT;
8830endmodule
8831
8832(* keep *)
8833module STARTUP_SPARTAN3A (...);
8834    input CLK;
8835    input GSR;
8836    input GTS;
8837endmodule
8838
8839(* keep *)
8840module STARTUP_SPARTAN6 (...);
8841    output CFGCLK;
8842    output CFGMCLK;
8843    output EOS;
8844    input CLK;
8845    input GSR;
8846    input GTS;
8847    input KEYCLEARB;
8848endmodule
8849
8850(* keep *)
8851module STARTUP_VIRTEX4 (...);
8852    output EOS;
8853    input CLK;
8854    input GSR;
8855    input GTS;
8856    input USRCCLKO;
8857    input USRCCLKTS;
8858    input USRDONEO;
8859    input USRDONETS;
8860endmodule
8861
8862(* keep *)
8863module STARTUP_VIRTEX5 (...);
8864    output CFGCLK;
8865    output CFGMCLK;
8866    output DINSPI;
8867    output EOS;
8868    output TCKSPI;
8869    input CLK;
8870    input GSR;
8871    input GTS;
8872    input USRCCLKO;
8873    input USRCCLKTS;
8874    input USRDONEO;
8875    input USRDONETS;
8876endmodule
8877
8878(* keep *)
8879module STARTUP_VIRTEX6 (...);
8880    parameter PROG_USR = "FALSE";
8881    output CFGCLK;
8882    output CFGMCLK;
8883    output DINSPI;
8884    output EOS;
8885    output PREQ;
8886    output TCKSPI;
8887    input CLK;
8888    input GSR;
8889    input GTS;
8890    input KEYCLEARB;
8891    input PACK;
8892    input USRCCLKO;
8893    input USRCCLKTS;
8894    input USRDONEO;
8895    input USRDONETS;
8896endmodule
8897
8898(* keep *)
8899module STARTUPE2 (...);
8900    parameter PROG_USR = "FALSE";
8901    parameter real SIM_CCLK_FREQ = 0.0;
8902    output CFGCLK;
8903    output CFGMCLK;
8904    output EOS;
8905    output PREQ;
8906    input CLK;
8907    input GSR;
8908    input GTS;
8909    input KEYCLEARB;
8910    input PACK;
8911    input USRCCLKO;
8912    input USRCCLKTS;
8913    input USRDONEO;
8914    input USRDONETS;
8915endmodule
8916
8917(* keep *)
8918module STARTUPE3 (...);
8919    parameter PROG_USR = "FALSE";
8920    parameter real SIM_CCLK_FREQ = 0.0;
8921    output CFGCLK;
8922    output CFGMCLK;
8923    output [3:0] DI;
8924    output EOS;
8925    output PREQ;
8926    input [3:0] DO;
8927    input [3:0] DTS;
8928    input FCSBO;
8929    input FCSBTS;
8930    input GSR;
8931    input GTS;
8932    input KEYCLEARB;
8933    input PACK;
8934    input USRCCLKO;
8935    input USRCCLKTS;
8936    input USRDONEO;
8937    input USRDONETS;
8938endmodule
8939
8940(* keep *)
8941module CAPTURE_SPARTAN3 (...);
8942    parameter ONESHOT = "FALSE";
8943    input CAP;
8944    input CLK;
8945endmodule
8946
8947(* keep *)
8948module CAPTURE_SPARTAN3A (...);
8949    parameter ONESHOT = "TRUE";
8950    input CAP;
8951    input CLK;
8952endmodule
8953
8954(* keep *)
8955module CAPTURE_VIRTEX4 (...);
8956    parameter ONESHOT = "TRUE";
8957    input CAP;
8958    input CLK;
8959endmodule
8960
8961(* keep *)
8962module CAPTURE_VIRTEX5 (...);
8963    parameter ONESHOT = "TRUE";
8964    input CAP;
8965    input CLK;
8966endmodule
8967
8968(* keep *)
8969module CAPTURE_VIRTEX6 (...);
8970    parameter ONESHOT = "TRUE";
8971    input CAP;
8972    input CLK;
8973endmodule
8974
8975(* keep *)
8976module CAPTUREE2 (...);
8977    parameter ONESHOT = "TRUE";
8978    input CAP;
8979    input CLK;
8980endmodule
8981
8982(* keep *)
8983module ICAP_SPARTAN3A (...);
8984    output BUSY;
8985    output [7:0] O;
8986    input CE;
8987    input CLK;
8988    input WRITE;
8989    input [7:0] I;
8990endmodule
8991
8992(* keep *)
8993module ICAP_SPARTAN6 (...);
8994    parameter DEVICE_ID = 32'h04000093;
8995    parameter SIM_CFG_FILE_NAME = "NONE";
8996    output BUSY;
8997    output [15:0] O;
8998    input CLK;
8999    input CE;
9000    input WRITE;
9001    input [15:0] I;
9002endmodule
9003
9004(* keep *)
9005module ICAP_VIRTEX4 (...);
9006    parameter ICAP_WIDTH = "X8";
9007    output BUSY;
9008    output [31:0] O;
9009    input CE;
9010    input CLK;
9011    input WRITE;
9012    input [31:0] I;
9013endmodule
9014
9015(* keep *)
9016module ICAP_VIRTEX5 (...);
9017    parameter ICAP_WIDTH = "X8";
9018    output BUSY;
9019    output [31:0] O;
9020    input CE;
9021    input CLK;
9022    input WRITE;
9023    input [31:0] I;
9024endmodule
9025
9026(* keep *)
9027module ICAP_VIRTEX6 (...);
9028    parameter [31:0] DEVICE_ID = 32'h04244093;
9029    parameter ICAP_WIDTH = "X8";
9030    parameter SIM_CFG_FILE_NAME = "NONE";
9031    output BUSY;
9032    output [31:0] O;
9033    input CLK;
9034    input CSB;
9035    input RDWRB;
9036    input [31:0] I;
9037endmodule
9038
9039(* keep *)
9040module ICAPE2 (...);
9041    parameter [31:0] DEVICE_ID = 32'h04244093;
9042    parameter ICAP_WIDTH = "X32";
9043    parameter SIM_CFG_FILE_NAME = "NONE";
9044    output [31:0] O;
9045    input CLK;
9046    input CSIB;
9047    input RDWRB;
9048    input [31:0] I;
9049endmodule
9050
9051(* keep *)
9052module ICAPE3 (...);
9053    parameter [31:0] DEVICE_ID = 32'h03628093;
9054    parameter ICAP_AUTO_SWITCH = "DISABLE";
9055    parameter SIM_CFG_FILE_NAME = "NONE";
9056    output AVAIL;
9057    output [31:0] O;
9058    output PRDONE;
9059    output PRERROR;
9060    input CLK;
9061    input CSIB;
9062    input RDWRB;
9063    input [31:0] I;
9064endmodule
9065
9066(* keep *)
9067module BSCAN_SPARTAN3 (...);
9068    output CAPTURE;
9069    output DRCK1;
9070    output DRCK2;
9071    output RESET;
9072    output SEL1;
9073    output SEL2;
9074    output SHIFT;
9075    output TDI;
9076    output UPDATE;
9077    input TDO1;
9078    input TDO2;
9079endmodule
9080
9081(* keep *)
9082module BSCAN_SPARTAN3A (...);
9083    output CAPTURE;
9084    output DRCK1;
9085    output DRCK2;
9086    output RESET;
9087    output SEL1;
9088    output SEL2;
9089    output SHIFT;
9090    output TCK;
9091    output TDI;
9092    output TMS;
9093    output UPDATE;
9094    input TDO1;
9095    input TDO2;
9096endmodule
9097
9098(* keep *)
9099module BSCAN_SPARTAN6 (...);
9100    parameter integer JTAG_CHAIN = 1;
9101    output CAPTURE;
9102    output DRCK;
9103    output RESET;
9104    output RUNTEST;
9105    output SEL;
9106    output SHIFT;
9107    output TCK;
9108    output TDI;
9109    output TMS;
9110    output UPDATE;
9111    input TDO;
9112endmodule
9113
9114(* keep *)
9115module BSCAN_VIRTEX4 (...);
9116    parameter integer JTAG_CHAIN = 1;
9117    output CAPTURE;
9118    output DRCK;
9119    output RESET;
9120    output SEL;
9121    output SHIFT;
9122    output TDI;
9123    output UPDATE;
9124    input TDO;
9125endmodule
9126
9127(* keep *)
9128module BSCAN_VIRTEX5 (...);
9129    parameter integer JTAG_CHAIN = 1;
9130    output CAPTURE;
9131    output DRCK;
9132    output RESET;
9133    output SEL;
9134    output SHIFT;
9135    output TDI;
9136    output UPDATE;
9137    input TDO;
9138endmodule
9139
9140(* keep *)
9141module BSCAN_VIRTEX6 (...);
9142    parameter DISABLE_JTAG = "FALSE";
9143    parameter integer JTAG_CHAIN = 1;
9144    output CAPTURE;
9145    output DRCK;
9146    output RESET;
9147    output RUNTEST;
9148    output SEL;
9149    output SHIFT;
9150    output TCK;
9151    output TDI;
9152    output TMS;
9153    output UPDATE;
9154    input TDO;
9155endmodule
9156
9157(* keep *)
9158module BSCANE2 (...);
9159    parameter DISABLE_JTAG = "FALSE";
9160    parameter integer JTAG_CHAIN = 1;
9161    output CAPTURE;
9162    output DRCK;
9163    output RESET;
9164    output RUNTEST;
9165    output SEL;
9166    output SHIFT;
9167    output TCK;
9168    output TDI;
9169    output TMS;
9170    output UPDATE;
9171    input TDO;
9172endmodule
9173
9174module DNA_PORT (...);
9175    parameter [56:0] SIM_DNA_VALUE = 57'h0;
9176    output DOUT;
9177    input CLK;
9178    input DIN;
9179    input READ;
9180    input SHIFT;
9181endmodule
9182
9183module DNA_PORTE2 (...);
9184    parameter [95:0] SIM_DNA_VALUE = 96'h000000000000000000000000;
9185    output DOUT;
9186    input CLK;
9187    input DIN;
9188    input READ;
9189    input SHIFT;
9190endmodule
9191
9192module FRAME_ECC_VIRTEX4 (...);
9193    output ERROR;
9194    output [11:0] SYNDROME;
9195    output SYNDROMEVALID;
9196endmodule
9197
9198module FRAME_ECC_VIRTEX5 (...);
9199    output CRCERROR;
9200    output ECCERROR;
9201    output SYNDROMEVALID;
9202    output [11:0] SYNDROME;
9203endmodule
9204
9205module FRAME_ECC_VIRTEX6 (...);
9206    parameter FARSRC = "EFAR";
9207    parameter FRAME_RBT_IN_FILENAME = "NONE";
9208    output CRCERROR;
9209    output ECCERROR;
9210    output ECCERRORSINGLE;
9211    output SYNDROMEVALID;
9212    output [12:0] SYNDROME;
9213    output [23:0] FAR;
9214    output [4:0] SYNBIT;
9215    output [6:0] SYNWORD;
9216endmodule
9217
9218module FRAME_ECCE2 (...);
9219    parameter FARSRC = "EFAR";
9220    parameter FRAME_RBT_IN_FILENAME = "NONE";
9221    output CRCERROR;
9222    output ECCERROR;
9223    output ECCERRORSINGLE;
9224    output SYNDROMEVALID;
9225    output [12:0] SYNDROME;
9226    output [25:0] FAR;
9227    output [4:0] SYNBIT;
9228    output [6:0] SYNWORD;
9229endmodule
9230
9231module FRAME_ECCE3 (...);
9232    output CRCERROR;
9233    output ECCERRORNOTSINGLE;
9234    output ECCERRORSINGLE;
9235    output ENDOFFRAME;
9236    output ENDOFSCAN;
9237    output [25:0] FAR;
9238    input [1:0] FARSEL;
9239    input ICAPBOTCLK;
9240    input ICAPTOPCLK;
9241endmodule
9242
9243module FRAME_ECCE4 (...);
9244    output CRCERROR;
9245    output ECCERRORNOTSINGLE;
9246    output ECCERRORSINGLE;
9247    output ENDOFFRAME;
9248    output ENDOFSCAN;
9249    output [26:0] FAR;
9250    input [1:0] FARSEL;
9251    input ICAPBOTCLK;
9252    input ICAPTOPCLK;
9253endmodule
9254
9255module USR_ACCESS_VIRTEX4 (...);
9256    output [31:0] DATA;
9257    output DATAVALID;
9258endmodule
9259
9260module USR_ACCESS_VIRTEX5 (...);
9261    output CFGCLK;
9262    output [31:0] DATA;
9263    output DATAVALID;
9264endmodule
9265
9266module USR_ACCESS_VIRTEX6 (...);
9267    output CFGCLK;
9268    output [31:0] DATA;
9269    output DATAVALID;
9270endmodule
9271
9272module USR_ACCESSE2 (...);
9273    output CFGCLK;
9274    output DATAVALID;
9275    output [31:0] DATA;
9276endmodule
9277
9278module POST_CRC_INTERNAL (...);
9279    output CRCERROR;
9280endmodule
9281
9282(* keep *)
9283module SUSPEND_SYNC (...);
9284    output SREQ;
9285    input CLK;
9286    input SACK;
9287endmodule
9288
9289(* keep *)
9290module KEY_CLEAR (...);
9291    input KEYCLEARB;
9292endmodule
9293
9294(* keep *)
9295module MASTER_JTAG (...);
9296    output TDO;
9297    input TCK;
9298    input TDI;
9299    input TMS;
9300endmodule
9301
9302(* keep *)
9303module SPI_ACCESS (...);
9304    parameter SIM_DELAY_TYPE = "SCALED";
9305    parameter SIM_DEVICE = "3S1400AN";
9306    parameter SIM_FACTORY_ID = 512'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
9307    parameter SIM_MEM_FILE = "NONE";
9308    parameter SIM_USER_ID = 512'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
9309    output MISO;
9310    input CLK;
9311    input CSB;
9312    input MOSI;
9313endmodule
9314
9315module EFUSE_USR (...);
9316    parameter [31:0] SIM_EFUSE_VALUE = 32'h00000000;
9317    output [31:0] EFUSEUSR;
9318endmodule
9319
9320(* keep *)
9321module SYSMON (...);
9322    parameter [15:0] INIT_40 = 16'h0;
9323    parameter [15:0] INIT_41 = 16'h0;
9324    parameter [15:0] INIT_42 = 16'h0800;
9325    parameter [15:0] INIT_43 = 16'h0;
9326    parameter [15:0] INIT_44 = 16'h0;
9327    parameter [15:0] INIT_45 = 16'h0;
9328    parameter [15:0] INIT_46 = 16'h0;
9329    parameter [15:0] INIT_47 = 16'h0;
9330    parameter [15:0] INIT_48 = 16'h0;
9331    parameter [15:0] INIT_49 = 16'h0;
9332    parameter [15:0] INIT_4A = 16'h0;
9333    parameter [15:0] INIT_4B = 16'h0;
9334    parameter [15:0] INIT_4C = 16'h0;
9335    parameter [15:0] INIT_4D = 16'h0;
9336    parameter [15:0] INIT_4E = 16'h0;
9337    parameter [15:0] INIT_4F = 16'h0;
9338    parameter [15:0] INIT_50 = 16'h0;
9339    parameter [15:0] INIT_51 = 16'h0;
9340    parameter [15:0] INIT_52 = 16'h0;
9341    parameter [15:0] INIT_53 = 16'h0;
9342    parameter [15:0] INIT_54 = 16'h0;
9343    parameter [15:0] INIT_55 = 16'h0;
9344    parameter [15:0] INIT_56 = 16'h0;
9345    parameter [15:0] INIT_57 = 16'h0;
9346    parameter SIM_DEVICE = "VIRTEX5";
9347    parameter SIM_MONITOR_FILE = "design.txt";
9348    output BUSY;
9349    output DRDY;
9350    output EOC;
9351    output EOS;
9352    output JTAGBUSY;
9353    output JTAGLOCKED;
9354    output JTAGMODIFIED;
9355    output OT;
9356    output [15:0] DO;
9357    output [2:0] ALM;
9358    output [4:0] CHANNEL;
9359    input CONVST;
9360    input CONVSTCLK;
9361    input DCLK;
9362    input DEN;
9363    input DWE;
9364    input RESET;
9365    input VN;
9366    input VP;
9367    input [15:0] DI;
9368    input [15:0] VAUXN;
9369    input [15:0] VAUXP;
9370    input [6:0] DADDR;
9371endmodule
9372
9373(* keep *)
9374module XADC (...);
9375    parameter [15:0] INIT_40 = 16'h0;
9376    parameter [15:0] INIT_41 = 16'h0;
9377    parameter [15:0] INIT_42 = 16'h0800;
9378    parameter [15:0] INIT_43 = 16'h0;
9379    parameter [15:0] INIT_44 = 16'h0;
9380    parameter [15:0] INIT_45 = 16'h0;
9381    parameter [15:0] INIT_46 = 16'h0;
9382    parameter [15:0] INIT_47 = 16'h0;
9383    parameter [15:0] INIT_48 = 16'h0;
9384    parameter [15:0] INIT_49 = 16'h0;
9385    parameter [15:0] INIT_4A = 16'h0;
9386    parameter [15:0] INIT_4B = 16'h0;
9387    parameter [15:0] INIT_4C = 16'h0;
9388    parameter [15:0] INIT_4D = 16'h0;
9389    parameter [15:0] INIT_4E = 16'h0;
9390    parameter [15:0] INIT_4F = 16'h0;
9391    parameter [15:0] INIT_50 = 16'h0;
9392    parameter [15:0] INIT_51 = 16'h0;
9393    parameter [15:0] INIT_52 = 16'h0;
9394    parameter [15:0] INIT_53 = 16'h0;
9395    parameter [15:0] INIT_54 = 16'h0;
9396    parameter [15:0] INIT_55 = 16'h0;
9397    parameter [15:0] INIT_56 = 16'h0;
9398    parameter [15:0] INIT_57 = 16'h0;
9399    parameter [15:0] INIT_58 = 16'h0;
9400    parameter [15:0] INIT_59 = 16'h0;
9401    parameter [15:0] INIT_5A = 16'h0;
9402    parameter [15:0] INIT_5B = 16'h0;
9403    parameter [15:0] INIT_5C = 16'h0;
9404    parameter [15:0] INIT_5D = 16'h0;
9405    parameter [15:0] INIT_5E = 16'h0;
9406    parameter [15:0] INIT_5F = 16'h0;
9407    parameter IS_CONVSTCLK_INVERTED = 1'b0;
9408    parameter IS_DCLK_INVERTED = 1'b0;
9409    parameter SIM_DEVICE = "7SERIES";
9410    parameter SIM_MONITOR_FILE = "design.txt";
9411    output BUSY;
9412    output DRDY;
9413    output EOC;
9414    output EOS;
9415    output JTAGBUSY;
9416    output JTAGLOCKED;
9417    output JTAGMODIFIED;
9418    output OT;
9419    output [15:0] DO;
9420    output [7:0] ALM;
9421    output [4:0] CHANNEL;
9422    output [4:0] MUXADDR;
9423    input CONVST;
9424    (* invertible_pin = "IS_CONVSTCLK_INVERTED" *)
9425    input CONVSTCLK;
9426    (* invertible_pin = "IS_DCLK_INVERTED" *)
9427    input DCLK;
9428    input DEN;
9429    input DWE;
9430    input RESET;
9431    input VN;
9432    input VP;
9433    input [15:0] DI;
9434    input [15:0] VAUXN;
9435    input [15:0] VAUXP;
9436    input [6:0] DADDR;
9437endmodule
9438
9439(* keep *)
9440module SYSMONE1 (...);
9441    parameter [15:0] INIT_40 = 16'h0;
9442    parameter [15:0] INIT_41 = 16'h0;
9443    parameter [15:0] INIT_42 = 16'h0;
9444    parameter [15:0] INIT_43 = 16'h0;
9445    parameter [15:0] INIT_44 = 16'h0;
9446    parameter [15:0] INIT_45 = 16'h0;
9447    parameter [15:0] INIT_46 = 16'h0;
9448    parameter [15:0] INIT_47 = 16'h0;
9449    parameter [15:0] INIT_48 = 16'h0;
9450    parameter [15:0] INIT_49 = 16'h0;
9451    parameter [15:0] INIT_4A = 16'h0;
9452    parameter [15:0] INIT_4B = 16'h0;
9453    parameter [15:0] INIT_4C = 16'h0;
9454    parameter [15:0] INIT_4D = 16'h0;
9455    parameter [15:0] INIT_4E = 16'h0;
9456    parameter [15:0] INIT_4F = 16'h0;
9457    parameter [15:0] INIT_50 = 16'h0;
9458    parameter [15:0] INIT_51 = 16'h0;
9459    parameter [15:0] INIT_52 = 16'h0;
9460    parameter [15:0] INIT_53 = 16'h0;
9461    parameter [15:0] INIT_54 = 16'h0;
9462    parameter [15:0] INIT_55 = 16'h0;
9463    parameter [15:0] INIT_56 = 16'h0;
9464    parameter [15:0] INIT_57 = 16'h0;
9465    parameter [15:0] INIT_58 = 16'h0;
9466    parameter [15:0] INIT_59 = 16'h0;
9467    parameter [15:0] INIT_5A = 16'h0;
9468    parameter [15:0] INIT_5B = 16'h0;
9469    parameter [15:0] INIT_5C = 16'h0;
9470    parameter [15:0] INIT_5D = 16'h0;
9471    parameter [15:0] INIT_5E = 16'h0;
9472    parameter [15:0] INIT_5F = 16'h0;
9473    parameter [15:0] INIT_60 = 16'h0;
9474    parameter [15:0] INIT_61 = 16'h0;
9475    parameter [15:0] INIT_62 = 16'h0;
9476    parameter [15:0] INIT_63 = 16'h0;
9477    parameter [15:0] INIT_64 = 16'h0;
9478    parameter [15:0] INIT_65 = 16'h0;
9479    parameter [15:0] INIT_66 = 16'h0;
9480    parameter [15:0] INIT_67 = 16'h0;
9481    parameter [15:0] INIT_68 = 16'h0;
9482    parameter [15:0] INIT_69 = 16'h0;
9483    parameter [15:0] INIT_6A = 16'h0;
9484    parameter [15:0] INIT_6B = 16'h0;
9485    parameter [15:0] INIT_6C = 16'h0;
9486    parameter [15:0] INIT_6D = 16'h0;
9487    parameter [15:0] INIT_6E = 16'h0;
9488    parameter [15:0] INIT_6F = 16'h0;
9489    parameter [15:0] INIT_70 = 16'h0;
9490    parameter [15:0] INIT_71 = 16'h0;
9491    parameter [15:0] INIT_72 = 16'h0;
9492    parameter [15:0] INIT_73 = 16'h0;
9493    parameter [15:0] INIT_74 = 16'h0;
9494    parameter [15:0] INIT_75 = 16'h0;
9495    parameter [15:0] INIT_76 = 16'h0;
9496    parameter [15:0] INIT_77 = 16'h0;
9497    parameter [15:0] INIT_78 = 16'h0;
9498    parameter [15:0] INIT_79 = 16'h0;
9499    parameter [15:0] INIT_7A = 16'h0;
9500    parameter [15:0] INIT_7B = 16'h0;
9501    parameter [15:0] INIT_7C = 16'h0;
9502    parameter [15:0] INIT_7D = 16'h0;
9503    parameter [15:0] INIT_7E = 16'h0;
9504    parameter [15:0] INIT_7F = 16'h0;
9505    parameter [0:0] IS_CONVSTCLK_INVERTED = 1'b0;
9506    parameter [0:0] IS_DCLK_INVERTED = 1'b0;
9507    parameter SIM_MONITOR_FILE = "design.txt";
9508    parameter integer SYSMON_VUSER0_BANK = 0;
9509    parameter SYSMON_VUSER0_MONITOR = "NONE";
9510    parameter integer SYSMON_VUSER1_BANK = 0;
9511    parameter SYSMON_VUSER1_MONITOR = "NONE";
9512    parameter integer SYSMON_VUSER2_BANK = 0;
9513    parameter SYSMON_VUSER2_MONITOR = "NONE";
9514    parameter integer SYSMON_VUSER3_BANK = 0;
9515    parameter SYSMON_VUSER3_MONITOR = "NONE";
9516    output [15:0] ALM;
9517    output BUSY;
9518    output [5:0] CHANNEL;
9519    output [15:0] DO;
9520    output DRDY;
9521    output EOC;
9522    output EOS;
9523    output I2C_SCLK_TS;
9524    output I2C_SDA_TS;
9525    output JTAGBUSY;
9526    output JTAGLOCKED;
9527    output JTAGMODIFIED;
9528    output [4:0] MUXADDR;
9529    output OT;
9530    input CONVST;
9531    (* invertible_pin = "IS_CONVSTCLK_INVERTED" *)
9532    input CONVSTCLK;
9533    input [7:0] DADDR;
9534    (* invertible_pin = "IS_DCLK_INVERTED" *)
9535    input DCLK;
9536    input DEN;
9537    input [15:0] DI;
9538    input DWE;
9539    input I2C_SCLK;
9540    input I2C_SDA;
9541    input RESET;
9542    input [15:0] VAUXN;
9543    input [15:0] VAUXP;
9544    input VN;
9545    input VP;
9546endmodule
9547
9548(* keep *)
9549module SYSMONE4 (...);
9550    parameter [15:0] COMMON_N_SOURCE = 16'hFFFF;
9551    parameter [15:0] INIT_40 = 16'h0000;
9552    parameter [15:0] INIT_41 = 16'h0000;
9553    parameter [15:0] INIT_42 = 16'h0000;
9554    parameter [15:0] INIT_43 = 16'h0000;
9555    parameter [15:0] INIT_44 = 16'h0000;
9556    parameter [15:0] INIT_45 = 16'h0000;
9557    parameter [15:0] INIT_46 = 16'h0000;
9558    parameter [15:0] INIT_47 = 16'h0000;
9559    parameter [15:0] INIT_48 = 16'h0000;
9560    parameter [15:0] INIT_49 = 16'h0000;
9561    parameter [15:0] INIT_4A = 16'h0000;
9562    parameter [15:0] INIT_4B = 16'h0000;
9563    parameter [15:0] INIT_4C = 16'h0000;
9564    parameter [15:0] INIT_4D = 16'h0000;
9565    parameter [15:0] INIT_4E = 16'h0000;
9566    parameter [15:0] INIT_4F = 16'h0000;
9567    parameter [15:0] INIT_50 = 16'h0000;
9568    parameter [15:0] INIT_51 = 16'h0000;
9569    parameter [15:0] INIT_52 = 16'h0000;
9570    parameter [15:0] INIT_53 = 16'h0000;
9571    parameter [15:0] INIT_54 = 16'h0000;
9572    parameter [15:0] INIT_55 = 16'h0000;
9573    parameter [15:0] INIT_56 = 16'h0000;
9574    parameter [15:0] INIT_57 = 16'h0000;
9575    parameter [15:0] INIT_58 = 16'h0000;
9576    parameter [15:0] INIT_59 = 16'h0000;
9577    parameter [15:0] INIT_5A = 16'h0000;
9578    parameter [15:0] INIT_5B = 16'h0000;
9579    parameter [15:0] INIT_5C = 16'h0000;
9580    parameter [15:0] INIT_5D = 16'h0000;
9581    parameter [15:0] INIT_5E = 16'h0000;
9582    parameter [15:0] INIT_5F = 16'h0000;
9583    parameter [15:0] INIT_60 = 16'h0000;
9584    parameter [15:0] INIT_61 = 16'h0000;
9585    parameter [15:0] INIT_62 = 16'h0000;
9586    parameter [15:0] INIT_63 = 16'h0000;
9587    parameter [15:0] INIT_64 = 16'h0000;
9588    parameter [15:0] INIT_65 = 16'h0000;
9589    parameter [15:0] INIT_66 = 16'h0000;
9590    parameter [15:0] INIT_67 = 16'h0000;
9591    parameter [15:0] INIT_68 = 16'h0000;
9592    parameter [15:0] INIT_69 = 16'h0000;
9593    parameter [15:0] INIT_6A = 16'h0000;
9594    parameter [15:0] INIT_6B = 16'h0000;
9595    parameter [15:0] INIT_6C = 16'h0000;
9596    parameter [15:0] INIT_6D = 16'h0000;
9597    parameter [15:0] INIT_6E = 16'h0000;
9598    parameter [15:0] INIT_6F = 16'h0000;
9599    parameter [15:0] INIT_70 = 16'h0000;
9600    parameter [15:0] INIT_71 = 16'h0000;
9601    parameter [15:0] INIT_72 = 16'h0000;
9602    parameter [15:0] INIT_73 = 16'h0000;
9603    parameter [15:0] INIT_74 = 16'h0000;
9604    parameter [15:0] INIT_75 = 16'h0000;
9605    parameter [15:0] INIT_76 = 16'h0000;
9606    parameter [15:0] INIT_77 = 16'h0000;
9607    parameter [15:0] INIT_78 = 16'h0000;
9608    parameter [15:0] INIT_79 = 16'h0000;
9609    parameter [15:0] INIT_7A = 16'h0000;
9610    parameter [15:0] INIT_7B = 16'h0000;
9611    parameter [15:0] INIT_7C = 16'h0000;
9612    parameter [15:0] INIT_7D = 16'h0000;
9613    parameter [15:0] INIT_7E = 16'h0000;
9614    parameter [15:0] INIT_7F = 16'h0000;
9615    parameter [0:0] IS_CONVSTCLK_INVERTED = 1'b0;
9616    parameter [0:0] IS_DCLK_INVERTED = 1'b0;
9617    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
9618    parameter SIM_MONITOR_FILE = "design.txt";
9619    parameter integer SYSMON_VUSER0_BANK = 0;
9620    parameter SYSMON_VUSER0_MONITOR = "NONE";
9621    parameter integer SYSMON_VUSER1_BANK = 0;
9622    parameter SYSMON_VUSER1_MONITOR = "NONE";
9623    parameter integer SYSMON_VUSER2_BANK = 0;
9624    parameter SYSMON_VUSER2_MONITOR = "NONE";
9625    parameter integer SYSMON_VUSER3_BANK = 0;
9626    parameter SYSMON_VUSER3_MONITOR = "NONE";
9627    output [15:0] ADC_DATA;
9628    output [15:0] ALM;
9629    output BUSY;
9630    output [5:0] CHANNEL;
9631    output [15:0] DO;
9632    output DRDY;
9633    output EOC;
9634    output EOS;
9635    output I2C_SCLK_TS;
9636    output I2C_SDA_TS;
9637    output JTAGBUSY;
9638    output JTAGLOCKED;
9639    output JTAGMODIFIED;
9640    output [4:0] MUXADDR;
9641    output OT;
9642    output SMBALERT_TS;
9643    input CONVST;
9644    (* invertible_pin = "IS_CONVSTCLK_INVERTED" *)
9645    input CONVSTCLK;
9646    input [7:0] DADDR;
9647    (* invertible_pin = "IS_DCLK_INVERTED" *)
9648    input DCLK;
9649    input DEN;
9650    input [15:0] DI;
9651    input DWE;
9652    input I2C_SCLK;
9653    input I2C_SDA;
9654    input RESET;
9655    input [15:0] VAUXN;
9656    input [15:0] VAUXP;
9657    input VN;
9658    input VP;
9659endmodule
9660
9661module GTPA1_DUAL (...);
9662    parameter AC_CAP_DIS_0 = "TRUE";
9663    parameter AC_CAP_DIS_1 = "TRUE";
9664    parameter integer ALIGN_COMMA_WORD_0 = 1;
9665    parameter integer ALIGN_COMMA_WORD_1 = 1;
9666    parameter integer CB2_INH_CC_PERIOD_0 = 8;
9667    parameter integer CB2_INH_CC_PERIOD_1 = 8;
9668    parameter [4:0] CDR_PH_ADJ_TIME_0 = 5'b01010;
9669    parameter [4:0] CDR_PH_ADJ_TIME_1 = 5'b01010;
9670    parameter integer CHAN_BOND_1_MAX_SKEW_0 = 7;
9671    parameter integer CHAN_BOND_1_MAX_SKEW_1 = 7;
9672    parameter integer CHAN_BOND_2_MAX_SKEW_0 = 1;
9673    parameter integer CHAN_BOND_2_MAX_SKEW_1 = 1;
9674    parameter CHAN_BOND_KEEP_ALIGN_0 = "FALSE";
9675    parameter CHAN_BOND_KEEP_ALIGN_1 = "FALSE";
9676    parameter [9:0] CHAN_BOND_SEQ_1_1_0 = 10'b0101111100;
9677    parameter [9:0] CHAN_BOND_SEQ_1_1_1 = 10'b0101111100;
9678    parameter [9:0] CHAN_BOND_SEQ_1_2_0 = 10'b0001001010;
9679    parameter [9:0] CHAN_BOND_SEQ_1_2_1 = 10'b0001001010;
9680    parameter [9:0] CHAN_BOND_SEQ_1_3_0 = 10'b0001001010;
9681    parameter [9:0] CHAN_BOND_SEQ_1_3_1 = 10'b0001001010;
9682    parameter [9:0] CHAN_BOND_SEQ_1_4_0 = 10'b0110111100;
9683    parameter [9:0] CHAN_BOND_SEQ_1_4_1 = 10'b0110111100;
9684    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_0 = 4'b1111;
9685    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_1 = 4'b1111;
9686    parameter [9:0] CHAN_BOND_SEQ_2_1_0 = 10'b0110111100;
9687    parameter [9:0] CHAN_BOND_SEQ_2_1_1 = 10'b0110111100;
9688    parameter [9:0] CHAN_BOND_SEQ_2_2_0 = 10'b0100111100;
9689    parameter [9:0] CHAN_BOND_SEQ_2_2_1 = 10'b0100111100;
9690    parameter [9:0] CHAN_BOND_SEQ_2_3_0 = 10'b0100111100;
9691    parameter [9:0] CHAN_BOND_SEQ_2_3_1 = 10'b0100111100;
9692    parameter [9:0] CHAN_BOND_SEQ_2_4_0 = 10'b0100111100;
9693    parameter [9:0] CHAN_BOND_SEQ_2_4_1 = 10'b0100111100;
9694    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_0 = 4'b1111;
9695    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_1 = 4'b1111;
9696    parameter CHAN_BOND_SEQ_2_USE_0 = "FALSE";
9697    parameter CHAN_BOND_SEQ_2_USE_1 = "FALSE";
9698    parameter integer CHAN_BOND_SEQ_LEN_0 = 1;
9699    parameter integer CHAN_BOND_SEQ_LEN_1 = 1;
9700    parameter integer CLK25_DIVIDER_0 = 4;
9701    parameter integer CLK25_DIVIDER_1 = 4;
9702    parameter CLKINDC_B_0 = "TRUE";
9703    parameter CLKINDC_B_1 = "TRUE";
9704    parameter CLKRCV_TRST_0 = "TRUE";
9705    parameter CLKRCV_TRST_1 = "TRUE";
9706    parameter CLK_CORRECT_USE_0 = "TRUE";
9707    parameter CLK_CORRECT_USE_1 = "TRUE";
9708    parameter integer CLK_COR_ADJ_LEN_0 = 1;
9709    parameter integer CLK_COR_ADJ_LEN_1 = 1;
9710    parameter integer CLK_COR_DET_LEN_0 = 1;
9711    parameter integer CLK_COR_DET_LEN_1 = 1;
9712    parameter CLK_COR_INSERT_IDLE_FLAG_0 = "FALSE";
9713    parameter CLK_COR_INSERT_IDLE_FLAG_1 = "FALSE";
9714    parameter CLK_COR_KEEP_IDLE_0 = "FALSE";
9715    parameter CLK_COR_KEEP_IDLE_1 = "FALSE";
9716    parameter integer CLK_COR_MAX_LAT_0 = 20;
9717    parameter integer CLK_COR_MAX_LAT_1 = 20;
9718    parameter integer CLK_COR_MIN_LAT_0 = 18;
9719    parameter integer CLK_COR_MIN_LAT_1 = 18;
9720    parameter CLK_COR_PRECEDENCE_0 = "TRUE";
9721    parameter CLK_COR_PRECEDENCE_1 = "TRUE";
9722    parameter integer CLK_COR_REPEAT_WAIT_0 = 0;
9723    parameter integer CLK_COR_REPEAT_WAIT_1 = 0;
9724    parameter [9:0] CLK_COR_SEQ_1_1_0 = 10'b0100011100;
9725    parameter [9:0] CLK_COR_SEQ_1_1_1 = 10'b0100011100;
9726    parameter [9:0] CLK_COR_SEQ_1_2_0 = 10'b0000000000;
9727    parameter [9:0] CLK_COR_SEQ_1_2_1 = 10'b0000000000;
9728    parameter [9:0] CLK_COR_SEQ_1_3_0 = 10'b0000000000;
9729    parameter [9:0] CLK_COR_SEQ_1_3_1 = 10'b0000000000;
9730    parameter [9:0] CLK_COR_SEQ_1_4_0 = 10'b0000000000;
9731    parameter [9:0] CLK_COR_SEQ_1_4_1 = 10'b0000000000;
9732    parameter [3:0] CLK_COR_SEQ_1_ENABLE_0 = 4'b1111;
9733    parameter [3:0] CLK_COR_SEQ_1_ENABLE_1 = 4'b1111;
9734    parameter [9:0] CLK_COR_SEQ_2_1_0 = 10'b0000000000;
9735    parameter [9:0] CLK_COR_SEQ_2_1_1 = 10'b0000000000;
9736    parameter [9:0] CLK_COR_SEQ_2_2_0 = 10'b0000000000;
9737    parameter [9:0] CLK_COR_SEQ_2_2_1 = 10'b0000000000;
9738    parameter [9:0] CLK_COR_SEQ_2_3_0 = 10'b0000000000;
9739    parameter [9:0] CLK_COR_SEQ_2_3_1 = 10'b0000000000;
9740    parameter [9:0] CLK_COR_SEQ_2_4_0 = 10'b0000000000;
9741    parameter [9:0] CLK_COR_SEQ_2_4_1 = 10'b0000000000;
9742    parameter [3:0] CLK_COR_SEQ_2_ENABLE_0 = 4'b1111;
9743    parameter [3:0] CLK_COR_SEQ_2_ENABLE_1 = 4'b1111;
9744    parameter CLK_COR_SEQ_2_USE_0 = "FALSE";
9745    parameter CLK_COR_SEQ_2_USE_1 = "FALSE";
9746    parameter CLK_OUT_GTP_SEL_0 = "REFCLKPLL0";
9747    parameter CLK_OUT_GTP_SEL_1 = "REFCLKPLL1";
9748    parameter [1:0] CM_TRIM_0 = 2'b00;
9749    parameter [1:0] CM_TRIM_1 = 2'b00;
9750    parameter [9:0] COMMA_10B_ENABLE_0 = 10'b1111111111;
9751    parameter [9:0] COMMA_10B_ENABLE_1 = 10'b1111111111;
9752    parameter [3:0] COM_BURST_VAL_0 = 4'b1111;
9753    parameter [3:0] COM_BURST_VAL_1 = 4'b1111;
9754    parameter DEC_MCOMMA_DETECT_0 = "TRUE";
9755    parameter DEC_MCOMMA_DETECT_1 = "TRUE";
9756    parameter DEC_PCOMMA_DETECT_0 = "TRUE";
9757    parameter DEC_PCOMMA_DETECT_1 = "TRUE";
9758    parameter DEC_VALID_COMMA_ONLY_0 = "TRUE";
9759    parameter DEC_VALID_COMMA_ONLY_1 = "TRUE";
9760    parameter GTP_CFG_PWRUP_0 = "TRUE";
9761    parameter GTP_CFG_PWRUP_1 = "TRUE";
9762    parameter [9:0] MCOMMA_10B_VALUE_0 = 10'b1010000011;
9763    parameter [9:0] MCOMMA_10B_VALUE_1 = 10'b1010000011;
9764    parameter MCOMMA_DETECT_0 = "TRUE";
9765    parameter MCOMMA_DETECT_1 = "TRUE";
9766    parameter [2:0] OOBDETECT_THRESHOLD_0 = 3'b110;
9767    parameter [2:0] OOBDETECT_THRESHOLD_1 = 3'b110;
9768    parameter integer OOB_CLK_DIVIDER_0 = 4;
9769    parameter integer OOB_CLK_DIVIDER_1 = 4;
9770    parameter PCI_EXPRESS_MODE_0 = "FALSE";
9771    parameter PCI_EXPRESS_MODE_1 = "FALSE";
9772    parameter [9:0] PCOMMA_10B_VALUE_0 = 10'b0101111100;
9773    parameter [9:0] PCOMMA_10B_VALUE_1 = 10'b0101111100;
9774    parameter PCOMMA_DETECT_0 = "TRUE";
9775    parameter PCOMMA_DETECT_1 = "TRUE";
9776    parameter [2:0] PLLLKDET_CFG_0 = 3'b101;
9777    parameter [2:0] PLLLKDET_CFG_1 = 3'b101;
9778    parameter [23:0] PLL_COM_CFG_0 = 24'h21680A;
9779    parameter [23:0] PLL_COM_CFG_1 = 24'h21680A;
9780    parameter [7:0] PLL_CP_CFG_0 = 8'h00;
9781    parameter [7:0] PLL_CP_CFG_1 = 8'h00;
9782    parameter integer PLL_DIVSEL_FB_0 = 5;
9783    parameter integer PLL_DIVSEL_FB_1 = 5;
9784    parameter integer PLL_DIVSEL_REF_0 = 2;
9785    parameter integer PLL_DIVSEL_REF_1 = 2;
9786    parameter integer PLL_RXDIVSEL_OUT_0 = 1;
9787    parameter integer PLL_RXDIVSEL_OUT_1 = 1;
9788    parameter PLL_SATA_0 = "FALSE";
9789    parameter PLL_SATA_1 = "FALSE";
9790    parameter PLL_SOURCE_0 = "PLL0";
9791    parameter PLL_SOURCE_1 = "PLL0";
9792    parameter integer PLL_TXDIVSEL_OUT_0 = 1;
9793    parameter integer PLL_TXDIVSEL_OUT_1 = 1;
9794    parameter [26:0] PMA_CDR_SCAN_0 = 27'h6404040;
9795    parameter [26:0] PMA_CDR_SCAN_1 = 27'h6404040;
9796    parameter [35:0] PMA_COM_CFG_EAST = 36'h000008000;
9797    parameter [35:0] PMA_COM_CFG_WEST = 36'h00000A000;
9798    parameter [6:0] PMA_RXSYNC_CFG_0 = 7'h00;
9799    parameter [6:0] PMA_RXSYNC_CFG_1 = 7'h00;
9800    parameter [24:0] PMA_RX_CFG_0 = 25'h05CE048;
9801    parameter [24:0] PMA_RX_CFG_1 = 25'h05CE048;
9802    parameter [19:0] PMA_TX_CFG_0 = 20'h00082;
9803    parameter [19:0] PMA_TX_CFG_1 = 20'h00082;
9804    parameter RCV_TERM_GND_0 = "FALSE";
9805    parameter RCV_TERM_GND_1 = "FALSE";
9806    parameter RCV_TERM_VTTRX_0 = "TRUE";
9807    parameter RCV_TERM_VTTRX_1 = "TRUE";
9808    parameter [7:0] RXEQ_CFG_0 = 8'b01111011;
9809    parameter [7:0] RXEQ_CFG_1 = 8'b01111011;
9810    parameter [0:0] RXPRBSERR_LOOPBACK_0 = 1'b0;
9811    parameter [0:0] RXPRBSERR_LOOPBACK_1 = 1'b0;
9812    parameter RX_BUFFER_USE_0 = "TRUE";
9813    parameter RX_BUFFER_USE_1 = "TRUE";
9814    parameter RX_DECODE_SEQ_MATCH_0 = "TRUE";
9815    parameter RX_DECODE_SEQ_MATCH_1 = "TRUE";
9816    parameter RX_EN_IDLE_HOLD_CDR_0 = "FALSE";
9817    parameter RX_EN_IDLE_HOLD_CDR_1 = "FALSE";
9818    parameter RX_EN_IDLE_RESET_BUF_0 = "TRUE";
9819    parameter RX_EN_IDLE_RESET_BUF_1 = "TRUE";
9820    parameter RX_EN_IDLE_RESET_FR_0 = "TRUE";
9821    parameter RX_EN_IDLE_RESET_FR_1 = "TRUE";
9822    parameter RX_EN_IDLE_RESET_PH_0 = "TRUE";
9823    parameter RX_EN_IDLE_RESET_PH_1 = "TRUE";
9824    parameter RX_EN_MODE_RESET_BUF_0 = "TRUE";
9825    parameter RX_EN_MODE_RESET_BUF_1 = "TRUE";
9826    parameter [3:0] RX_IDLE_HI_CNT_0 = 4'b1000;
9827    parameter [3:0] RX_IDLE_HI_CNT_1 = 4'b1000;
9828    parameter [3:0] RX_IDLE_LO_CNT_0 = 4'b0000;
9829    parameter [3:0] RX_IDLE_LO_CNT_1 = 4'b0000;
9830    parameter RX_LOSS_OF_SYNC_FSM_0 = "FALSE";
9831    parameter RX_LOSS_OF_SYNC_FSM_1 = "FALSE";
9832    parameter integer RX_LOS_INVALID_INCR_0 = 1;
9833    parameter integer RX_LOS_INVALID_INCR_1 = 1;
9834    parameter integer RX_LOS_THRESHOLD_0 = 4;
9835    parameter integer RX_LOS_THRESHOLD_1 = 4;
9836    parameter RX_SLIDE_MODE_0 = "PCS";
9837    parameter RX_SLIDE_MODE_1 = "PCS";
9838    parameter RX_STATUS_FMT_0 = "PCIE";
9839    parameter RX_STATUS_FMT_1 = "PCIE";
9840    parameter RX_XCLK_SEL_0 = "RXREC";
9841    parameter RX_XCLK_SEL_1 = "RXREC";
9842    parameter [2:0] SATA_BURST_VAL_0 = 3'b100;
9843    parameter [2:0] SATA_BURST_VAL_1 = 3'b100;
9844    parameter [2:0] SATA_IDLE_VAL_0 = 3'b011;
9845    parameter [2:0] SATA_IDLE_VAL_1 = 3'b011;
9846    parameter integer SATA_MAX_BURST_0 = 7;
9847    parameter integer SATA_MAX_BURST_1 = 7;
9848    parameter integer SATA_MAX_INIT_0 = 22;
9849    parameter integer SATA_MAX_INIT_1 = 22;
9850    parameter integer SATA_MAX_WAKE_0 = 7;
9851    parameter integer SATA_MAX_WAKE_1 = 7;
9852    parameter integer SATA_MIN_BURST_0 = 4;
9853    parameter integer SATA_MIN_BURST_1 = 4;
9854    parameter integer SATA_MIN_INIT_0 = 12;
9855    parameter integer SATA_MIN_INIT_1 = 12;
9856    parameter integer SATA_MIN_WAKE_0 = 4;
9857    parameter integer SATA_MIN_WAKE_1 = 4;
9858    parameter integer SIM_GTPRESET_SPEEDUP = 0;
9859    parameter SIM_RECEIVER_DETECT_PASS = "FALSE";
9860    parameter [2:0] SIM_REFCLK0_SOURCE = 3'b000;
9861    parameter [2:0] SIM_REFCLK1_SOURCE = 3'b000;
9862    parameter SIM_TX_ELEC_IDLE_LEVEL = "X";
9863    parameter SIM_VERSION = "2.0";
9864    parameter [4:0] TERMINATION_CTRL_0 = 5'b10100;
9865    parameter [4:0] TERMINATION_CTRL_1 = 5'b10100;
9866    parameter TERMINATION_OVRD_0 = "FALSE";
9867    parameter TERMINATION_OVRD_1 = "FALSE";
9868    parameter [11:0] TRANS_TIME_FROM_P2_0 = 12'h03C;
9869    parameter [11:0] TRANS_TIME_FROM_P2_1 = 12'h03C;
9870    parameter [7:0] TRANS_TIME_NON_P2_0 = 8'h19;
9871    parameter [7:0] TRANS_TIME_NON_P2_1 = 8'h19;
9872    parameter [9:0] TRANS_TIME_TO_P2_0 = 10'h064;
9873    parameter [9:0] TRANS_TIME_TO_P2_1 = 10'h064;
9874    parameter [31:0] TST_ATTR_0 = 32'h00000000;
9875    parameter [31:0] TST_ATTR_1 = 32'h00000000;
9876    parameter [2:0] TXRX_INVERT_0 = 3'b011;
9877    parameter [2:0] TXRX_INVERT_1 = 3'b011;
9878    parameter TX_BUFFER_USE_0 = "FALSE";
9879    parameter TX_BUFFER_USE_1 = "FALSE";
9880    parameter [13:0] TX_DETECT_RX_CFG_0 = 14'h1832;
9881    parameter [13:0] TX_DETECT_RX_CFG_1 = 14'h1832;
9882    parameter [2:0] TX_IDLE_DELAY_0 = 3'b011;
9883    parameter [2:0] TX_IDLE_DELAY_1 = 3'b011;
9884    parameter [1:0] TX_TDCC_CFG_0 = 2'b00;
9885    parameter [1:0] TX_TDCC_CFG_1 = 2'b00;
9886    parameter TX_XCLK_SEL_0 = "TXUSR";
9887    parameter TX_XCLK_SEL_1 = "TXUSR";
9888    output DRDY;
9889    output PHYSTATUS0;
9890    output PHYSTATUS1;
9891    output PLLLKDET0;
9892    output PLLLKDET1;
9893    output REFCLKOUT0;
9894    output REFCLKOUT1;
9895    output REFCLKPLL0;
9896    output REFCLKPLL1;
9897    output RESETDONE0;
9898    output RESETDONE1;
9899    output RXBYTEISALIGNED0;
9900    output RXBYTEISALIGNED1;
9901    output RXBYTEREALIGN0;
9902    output RXBYTEREALIGN1;
9903    output RXCHANBONDSEQ0;
9904    output RXCHANBONDSEQ1;
9905    output RXCHANISALIGNED0;
9906    output RXCHANISALIGNED1;
9907    output RXCHANREALIGN0;
9908    output RXCHANREALIGN1;
9909    output RXCOMMADET0;
9910    output RXCOMMADET1;
9911    output RXELECIDLE0;
9912    output RXELECIDLE1;
9913    output RXPRBSERR0;
9914    output RXPRBSERR1;
9915    output RXRECCLK0;
9916    output RXRECCLK1;
9917    output RXVALID0;
9918    output RXVALID1;
9919    output TXN0;
9920    output TXN1;
9921    output TXOUTCLK0;
9922    output TXOUTCLK1;
9923    output TXP0;
9924    output TXP1;
9925    output [15:0] DRPDO;
9926    output [1:0] GTPCLKFBEAST;
9927    output [1:0] GTPCLKFBWEST;
9928    output [1:0] GTPCLKOUT0;
9929    output [1:0] GTPCLKOUT1;
9930    output [1:0] RXLOSSOFSYNC0;
9931    output [1:0] RXLOSSOFSYNC1;
9932    output [1:0] TXBUFSTATUS0;
9933    output [1:0] TXBUFSTATUS1;
9934    output [2:0] RXBUFSTATUS0;
9935    output [2:0] RXBUFSTATUS1;
9936    output [2:0] RXCHBONDO;
9937    output [2:0] RXCLKCORCNT0;
9938    output [2:0] RXCLKCORCNT1;
9939    output [2:0] RXSTATUS0;
9940    output [2:0] RXSTATUS1;
9941    output [31:0] RXDATA0;
9942    output [31:0] RXDATA1;
9943    output [3:0] RXCHARISCOMMA0;
9944    output [3:0] RXCHARISCOMMA1;
9945    output [3:0] RXCHARISK0;
9946    output [3:0] RXCHARISK1;
9947    output [3:0] RXDISPERR0;
9948    output [3:0] RXDISPERR1;
9949    output [3:0] RXNOTINTABLE0;
9950    output [3:0] RXNOTINTABLE1;
9951    output [3:0] RXRUNDISP0;
9952    output [3:0] RXRUNDISP1;
9953    output [3:0] TXKERR0;
9954    output [3:0] TXKERR1;
9955    output [3:0] TXRUNDISP0;
9956    output [3:0] TXRUNDISP1;
9957    output [4:0] RCALOUTEAST;
9958    output [4:0] RCALOUTWEST;
9959    output [4:0] TSTOUT0;
9960    output [4:0] TSTOUT1;
9961    input CLK00;
9962    input CLK01;
9963    input CLK10;
9964    input CLK11;
9965    input CLKINEAST0;
9966    input CLKINEAST1;
9967    input CLKINWEST0;
9968    input CLKINWEST1;
9969    input DCLK;
9970    input DEN;
9971    input DWE;
9972    input GATERXELECIDLE0;
9973    input GATERXELECIDLE1;
9974    input GCLK00;
9975    input GCLK01;
9976    input GCLK10;
9977    input GCLK11;
9978    input GTPRESET0;
9979    input GTPRESET1;
9980    input IGNORESIGDET0;
9981    input IGNORESIGDET1;
9982    input INTDATAWIDTH0;
9983    input INTDATAWIDTH1;
9984    input PLLCLK00;
9985    input PLLCLK01;
9986    input PLLCLK10;
9987    input PLLCLK11;
9988    input PLLLKDETEN0;
9989    input PLLLKDETEN1;
9990    input PLLPOWERDOWN0;
9991    input PLLPOWERDOWN1;
9992    input PRBSCNTRESET0;
9993    input PRBSCNTRESET1;
9994    input REFCLKPWRDNB0;
9995    input REFCLKPWRDNB1;
9996    input RXBUFRESET0;
9997    input RXBUFRESET1;
9998    input RXCDRRESET0;
9999    input RXCDRRESET1;
10000    input RXCHBONDMASTER0;
10001    input RXCHBONDMASTER1;
10002    input RXCHBONDSLAVE0;
10003    input RXCHBONDSLAVE1;
10004    input RXCOMMADETUSE0;
10005    input RXCOMMADETUSE1;
10006    input RXDEC8B10BUSE0;
10007    input RXDEC8B10BUSE1;
10008    input RXENCHANSYNC0;
10009    input RXENCHANSYNC1;
10010    input RXENMCOMMAALIGN0;
10011    input RXENMCOMMAALIGN1;
10012    input RXENPCOMMAALIGN0;
10013    input RXENPCOMMAALIGN1;
10014    input RXENPMAPHASEALIGN0;
10015    input RXENPMAPHASEALIGN1;
10016    input RXN0;
10017    input RXN1;
10018    input RXP0;
10019    input RXP1;
10020    input RXPMASETPHASE0;
10021    input RXPMASETPHASE1;
10022    input RXPOLARITY0;
10023    input RXPOLARITY1;
10024    input RXRESET0;
10025    input RXRESET1;
10026    input RXSLIDE0;
10027    input RXSLIDE1;
10028    input RXUSRCLK0;
10029    input RXUSRCLK1;
10030    input RXUSRCLK20;
10031    input RXUSRCLK21;
10032    input TSTCLK0;
10033    input TSTCLK1;
10034    input TXCOMSTART0;
10035    input TXCOMSTART1;
10036    input TXCOMTYPE0;
10037    input TXCOMTYPE1;
10038    input TXDETECTRX0;
10039    input TXDETECTRX1;
10040    input TXELECIDLE0;
10041    input TXELECIDLE1;
10042    input TXENC8B10BUSE0;
10043    input TXENC8B10BUSE1;
10044    input TXENPMAPHASEALIGN0;
10045    input TXENPMAPHASEALIGN1;
10046    input TXINHIBIT0;
10047    input TXINHIBIT1;
10048    input TXPDOWNASYNCH0;
10049    input TXPDOWNASYNCH1;
10050    input TXPMASETPHASE0;
10051    input TXPMASETPHASE1;
10052    input TXPOLARITY0;
10053    input TXPOLARITY1;
10054    input TXPRBSFORCEERR0;
10055    input TXPRBSFORCEERR1;
10056    input TXRESET0;
10057    input TXRESET1;
10058    input TXUSRCLK0;
10059    input TXUSRCLK1;
10060    input TXUSRCLK20;
10061    input TXUSRCLK21;
10062    input USRCODEERR0;
10063    input USRCODEERR1;
10064    input [11:0] TSTIN0;
10065    input [11:0] TSTIN1;
10066    input [15:0] DI;
10067    input [1:0] GTPCLKFBSEL0EAST;
10068    input [1:0] GTPCLKFBSEL0WEST;
10069    input [1:0] GTPCLKFBSEL1EAST;
10070    input [1:0] GTPCLKFBSEL1WEST;
10071    input [1:0] RXDATAWIDTH0;
10072    input [1:0] RXDATAWIDTH1;
10073    input [1:0] RXEQMIX0;
10074    input [1:0] RXEQMIX1;
10075    input [1:0] RXPOWERDOWN0;
10076    input [1:0] RXPOWERDOWN1;
10077    input [1:0] TXDATAWIDTH0;
10078    input [1:0] TXDATAWIDTH1;
10079    input [1:0] TXPOWERDOWN0;
10080    input [1:0] TXPOWERDOWN1;
10081    input [2:0] LOOPBACK0;
10082    input [2:0] LOOPBACK1;
10083    input [2:0] REFSELDYPLL0;
10084    input [2:0] REFSELDYPLL1;
10085    input [2:0] RXCHBONDI;
10086    input [2:0] RXENPRBSTST0;
10087    input [2:0] RXENPRBSTST1;
10088    input [2:0] TXBUFDIFFCTRL0;
10089    input [2:0] TXBUFDIFFCTRL1;
10090    input [2:0] TXENPRBSTST0;
10091    input [2:0] TXENPRBSTST1;
10092    input [2:0] TXPREEMPHASIS0;
10093    input [2:0] TXPREEMPHASIS1;
10094    input [31:0] TXDATA0;
10095    input [31:0] TXDATA1;
10096    input [3:0] TXBYPASS8B10B0;
10097    input [3:0] TXBYPASS8B10B1;
10098    input [3:0] TXCHARDISPMODE0;
10099    input [3:0] TXCHARDISPMODE1;
10100    input [3:0] TXCHARDISPVAL0;
10101    input [3:0] TXCHARDISPVAL1;
10102    input [3:0] TXCHARISK0;
10103    input [3:0] TXCHARISK1;
10104    input [3:0] TXDIFFCTRL0;
10105    input [3:0] TXDIFFCTRL1;
10106    input [4:0] RCALINEAST;
10107    input [4:0] RCALINWEST;
10108    input [7:0] DADDR;
10109    input [7:0] GTPTEST0;
10110    input [7:0] GTPTEST1;
10111endmodule
10112
10113module GT11_CUSTOM (...);
10114    parameter ALIGN_COMMA_WORD = 1;
10115    parameter BANDGAPSEL = "FALSE";
10116    parameter BIASRESSEL = "TRUE";
10117    parameter CCCB_ARBITRATOR_DISABLE = "FALSE";
10118    parameter CHAN_BOND_LIMIT = 16;
10119    parameter CHAN_BOND_MODE = "NONE";
10120    parameter CHAN_BOND_ONE_SHOT = "FALSE";
10121    parameter CHAN_BOND_SEQ_1_1 = 11'b00000000000;
10122    parameter CHAN_BOND_SEQ_1_2 = 11'b00000000000;
10123    parameter CHAN_BOND_SEQ_1_3 = 11'b00000000000;
10124    parameter CHAN_BOND_SEQ_1_4 = 11'b00000000000;
10125    parameter CHAN_BOND_SEQ_1_MASK = 4'b0000;
10126    parameter CHAN_BOND_SEQ_2_1 = 11'b00000000000;
10127    parameter CHAN_BOND_SEQ_2_2 = 11'b00000000000;
10128    parameter CHAN_BOND_SEQ_2_3 = 11'b00000000000;
10129    parameter CHAN_BOND_SEQ_2_4 = 11'b00000000000;
10130    parameter CHAN_BOND_SEQ_2_MASK = 4'b0000;
10131    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
10132    parameter CHAN_BOND_SEQ_LEN = 1;
10133    parameter CLK_CORRECT_USE = "TRUE";
10134    parameter CLK_COR_8B10B_DE = "FALSE";
10135    parameter CLK_COR_MAX_LAT = 36;
10136    parameter CLK_COR_MIN_LAT = 28;
10137    parameter CLK_COR_SEQ_1_1 = 11'b00000000000;
10138    parameter CLK_COR_SEQ_1_2 = 11'b00000000000;
10139    parameter CLK_COR_SEQ_1_3 = 11'b00000000000;
10140    parameter CLK_COR_SEQ_1_4 = 11'b00000000000;
10141    parameter CLK_COR_SEQ_1_MASK = 4'b0000;
10142    parameter CLK_COR_SEQ_2_1 = 11'b00000000000;
10143    parameter CLK_COR_SEQ_2_2 = 11'b00000000000;
10144    parameter CLK_COR_SEQ_2_3 = 11'b00000000000;
10145    parameter CLK_COR_SEQ_2_4 = 11'b00000000000;
10146    parameter CLK_COR_SEQ_2_MASK = 4'b0000;
10147    parameter CLK_COR_SEQ_2_USE = "FALSE";
10148    parameter CLK_COR_SEQ_DROP = "FALSE";
10149    parameter CLK_COR_SEQ_LEN = 1;
10150    parameter COMMA32 = "FALSE";
10151    parameter COMMA_10B_MASK = 10'h3FF;
10152    parameter CYCLE_LIMIT_SEL = 2'b00;
10153    parameter DCDR_FILTER = 3'b010;
10154    parameter DEC_MCOMMA_DETECT = "TRUE";
10155    parameter DEC_PCOMMA_DETECT = "TRUE";
10156    parameter DEC_VALID_COMMA_ONLY = "TRUE";
10157    parameter DIGRX_FWDCLK = 2'b00;
10158    parameter DIGRX_SYNC_MODE = "FALSE";
10159    parameter ENABLE_DCDR = "FALSE";
10160    parameter FDET_HYS_CAL = 3'b110;
10161    parameter FDET_HYS_SEL = 3'b110;
10162    parameter FDET_LCK_CAL = 3'b101;
10163    parameter FDET_LCK_SEL = 3'b101;
10164    parameter GT11_MODE = "SINGLE";
10165    parameter IREFBIASMODE = 2'b11;
10166    parameter LOOPCAL_WAIT = 2'b00;
10167    parameter MCOMMA_32B_VALUE = 32'h000000F6;
10168    parameter MCOMMA_DETECT = "TRUE";
10169    parameter OPPOSITE_SELECT = "FALSE";
10170    parameter PCOMMA_32B_VALUE = 32'hF6F62828;
10171    parameter PCOMMA_DETECT = "TRUE";
10172    parameter PCS_BIT_SLIP = "FALSE";
10173    parameter PMACLKENABLE = "TRUE";
10174    parameter PMACOREPWRENABLE = "TRUE";
10175    parameter PMAIREFTRIM = 4'b0111;
10176    parameter PMAVBGCTRL = 5'b00000;
10177    parameter PMAVREFTRIM = 4'b0111;
10178    parameter PMA_BIT_SLIP = "FALSE";
10179    parameter REPEATER = "FALSE";
10180    parameter RXACTST = "FALSE";
10181    parameter RXAFEEQ = 9'b000000000;
10182    parameter RXAFEPD = "FALSE";
10183    parameter RXAFETST = "FALSE";
10184    parameter RXAPD = "FALSE";
10185    parameter RXASYNCDIVIDE = 2'b11;
10186    parameter RXBY_32 = "TRUE";
10187    parameter RXCDRLOS = 6'b000000;
10188    parameter RXCLK0_FORCE_PMACLK = "FALSE";
10189    parameter RXCLKMODE = 6'b110001;
10190    parameter RXCMADJ = 2'b10;
10191    parameter RXCPSEL = "TRUE";
10192    parameter RXCPTST = "FALSE";
10193    parameter RXCRCCLOCKDOUBLE = "FALSE";
10194    parameter RXCRCENABLE = "FALSE";
10195    parameter RXCRCINITVAL = 32'h00000000;
10196    parameter RXCRCINVERTGEN = "FALSE";
10197    parameter RXCRCSAMECLOCK = "FALSE";
10198    parameter RXCTRL1 = 10'h200;
10199    parameter RXCYCLE_LIMIT_SEL = 2'b00;
10200    parameter RXDATA_SEL = 2'b00;
10201    parameter RXDCCOUPLE = "FALSE";
10202    parameter RXDIGRESET = "FALSE";
10203    parameter RXDIGRX = "FALSE";
10204    parameter RXEQ = 64'h4000000000000000;
10205    parameter RXFDCAL_CLOCK_DIVIDE = "NONE";
10206    parameter RXFDET_HYS_CAL = 3'b110;
10207    parameter RXFDET_HYS_SEL = 3'b110;
10208    parameter RXFDET_LCK_CAL = 3'b101;
10209    parameter RXFDET_LCK_SEL = 3'b101;
10210    parameter RXFECONTROL1 = 2'b00;
10211    parameter RXFECONTROL2 = 3'b000;
10212    parameter RXFETUNE = 2'b01;
10213    parameter RXLB = "FALSE";
10214    parameter RXLKADJ = 5'b00000;
10215    parameter RXLKAPD = "FALSE";
10216    parameter RXLOOPCAL_WAIT = 2'b00;
10217    parameter RXLOOPFILT = 4'b0111;
10218    parameter RXOUTDIV2SEL = 1;
10219    parameter RXPD = "FALSE";
10220    parameter RXPDDTST = "FALSE";
10221    parameter RXPLLNDIVSEL = 8;
10222    parameter RXPMACLKSEL = "REFCLK1";
10223    parameter RXRCPADJ = 3'b011;
10224    parameter RXRCPPD = "FALSE";
10225    parameter RXRECCLK1_USE_SYNC = "FALSE";
10226    parameter RXRIBADJ = 2'b11;
10227    parameter RXRPDPD = "FALSE";
10228    parameter RXRSDPD = "FALSE";
10229    parameter RXSLOWDOWN_CAL = 2'b00;
10230    parameter RXUSRDIVISOR = 1;
10231    parameter RXVCODAC_INIT = 10'b1010000000;
10232    parameter RXVCO_CTRL_ENABLE = "TRUE";
10233    parameter RX_BUFFER_USE = "TRUE";
10234    parameter RX_CLOCK_DIVIDER = 2'b00;
10235    parameter RX_LOS_INVALID_INCR = 1;
10236    parameter RX_LOS_THRESHOLD = 4;
10237    parameter SAMPLE_8X = "FALSE";
10238    parameter SH_CNT_MAX = 64;
10239    parameter SH_INVALID_CNT_MAX = 16;
10240    parameter SLOWDOWN_CAL = 2'b00;
10241    parameter TXABPMACLKSEL = "REFCLK1";
10242    parameter TXAPD = "FALSE";
10243    parameter TXAREFBIASSEL = "FALSE";
10244    parameter TXASYNCDIVIDE = 2'b11;
10245    parameter TXCLK0_FORCE_PMACLK = "FALSE";
10246    parameter TXCLKMODE = 4'b1001;
10247    parameter TXCPSEL = "TRUE";
10248    parameter TXCRCCLOCKDOUBLE = "FALSE";
10249    parameter TXCRCENABLE = "FALSE";
10250    parameter TXCRCINITVAL = 32'h00000000;
10251    parameter TXCRCINVERTGEN = "FALSE";
10252    parameter TXCRCSAMECLOCK = "FALSE";
10253    parameter TXCTRL1 = 10'h200;
10254    parameter TXDATA_SEL = 2'b00;
10255    parameter TXDAT_PRDRV_DAC = 3'b111;
10256    parameter TXDAT_TAP_DAC = 5'b10110;
10257    parameter TXDIGPD = "FALSE";
10258    parameter TXFDCAL_CLOCK_DIVIDE = "NONE";
10259    parameter TXHIGHSIGNALEN = "TRUE";
10260    parameter TXLOOPFILT = 4'b0111;
10261    parameter TXLVLSHFTPD = "FALSE";
10262    parameter TXOUTCLK1_USE_SYNC = "FALSE";
10263    parameter TXOUTDIV2SEL = 1;
10264    parameter TXPD = "FALSE";
10265    parameter TXPHASESEL = "FALSE";
10266    parameter TXPLLNDIVSEL = 8;
10267    parameter TXPOST_PRDRV_DAC = 3'b111;
10268    parameter TXPOST_TAP_DAC = 5'b01110;
10269    parameter TXPOST_TAP_PD = "TRUE";
10270    parameter TXPRE_PRDRV_DAC = 3'b111;
10271    parameter TXPRE_TAP_DAC = 5'b00000;
10272    parameter TXPRE_TAP_PD = "TRUE";
10273    parameter TXSLEWRATE = "FALSE";
10274    parameter TXTERMTRIM = 4'b1100;
10275    parameter TX_BUFFER_USE = "TRUE";
10276    parameter TX_CLOCK_DIVIDER = 2'b00;
10277    parameter VCODAC_INIT = 10'b1010000000;
10278    parameter VCO_CTRL_ENABLE = "TRUE";
10279    parameter VREFBIASMODE = 2'b11;
10280    output DRDY;
10281    output RXBUFERR;
10282    output RXCALFAIL;
10283    output RXCOMMADET;
10284    output RXCYCLELIMIT;
10285    output RXLOCK;
10286    output RXMCLK;
10287    output RXPCSHCLKOUT;
10288    output RXREALIGN;
10289    output RXRECCLK1;
10290    output RXRECCLK2;
10291    output RXSIGDET;
10292    output TX1N;
10293    output TX1P;
10294    output TXBUFERR;
10295    output TXCALFAIL;
10296    output TXCYCLELIMIT;
10297    output TXLOCK;
10298    output TXOUTCLK1;
10299    output TXOUTCLK2;
10300    output TXPCSHCLKOUT;
10301    output [15:0] DO;
10302    output [1:0] RXLOSSOFSYNC;
10303    output [31:0] RXCRCOUT;
10304    output [31:0] TXCRCOUT;
10305    output [4:0] CHBONDO;
10306    output [5:0] RXSTATUS;
10307    output [63:0] RXDATA;
10308    output [7:0] RXCHARISCOMMA;
10309    output [7:0] RXCHARISK;
10310    output [7:0] RXDISPERR;
10311    output [7:0] RXNOTINTABLE;
10312    output [7:0] RXRUNDISP;
10313    output [7:0] TXKERR;
10314    output [7:0] TXRUNDISP;
10315    input DCLK;
10316    input DEN;
10317    input DWE;
10318    input ENCHANSYNC;
10319    input ENMCOMMAALIGN;
10320    input ENPCOMMAALIGN;
10321    input GREFCLK;
10322    input POWERDOWN;
10323    input REFCLK1;
10324    input REFCLK2;
10325    input RX1N;
10326    input RX1P;
10327    input RXBLOCKSYNC64B66BUSE;
10328    input RXCLKSTABLE;
10329    input RXCOMMADETUSE;
10330    input RXCRCCLK;
10331    input RXCRCDATAVALID;
10332    input RXCRCINIT;
10333    input RXCRCINTCLK;
10334    input RXCRCPD;
10335    input RXCRCRESET;
10336    input RXDEC64B66BUSE;
10337    input RXDEC8B10BUSE;
10338    input RXDESCRAM64B66BUSE;
10339    input RXIGNOREBTF;
10340    input RXPMARESET;
10341    input RXPOLARITY;
10342    input RXRESET;
10343    input RXSLIDE;
10344    input RXSYNC;
10345    input RXUSRCLK2;
10346    input RXUSRCLK;
10347    input TXCLKSTABLE;
10348    input TXCRCCLK;
10349    input TXCRCDATAVALID;
10350    input TXCRCINIT;
10351    input TXCRCINTCLK;
10352    input TXCRCPD;
10353    input TXCRCRESET;
10354    input TXENC64B66BUSE;
10355    input TXENC8B10BUSE;
10356    input TXENOOB;
10357    input TXGEARBOX64B66BUSE;
10358    input TXINHIBIT;
10359    input TXPMARESET;
10360    input TXPOLARITY;
10361    input TXRESET;
10362    input TXSCRAM64B66BUSE;
10363    input TXSYNC;
10364    input TXUSRCLK2;
10365    input TXUSRCLK;
10366    input [15:0] DI;
10367    input [1:0] LOOPBACK;
10368    input [1:0] RXDATAWIDTH;
10369    input [1:0] RXINTDATAWIDTH;
10370    input [1:0] TXDATAWIDTH;
10371    input [1:0] TXINTDATAWIDTH;
10372    input [2:0] RXCRCDATAWIDTH;
10373    input [2:0] TXCRCDATAWIDTH;
10374    input [4:0] CHBONDI;
10375    input [63:0] RXCRCIN;
10376    input [63:0] TXCRCIN;
10377    input [63:0] TXDATA;
10378    input [7:0] DADDR;
10379    input [7:0] TXBYPASS8B10B;
10380    input [7:0] TXCHARDISPMODE;
10381    input [7:0] TXCHARDISPVAL;
10382    input [7:0] TXCHARISK;
10383endmodule
10384
10385module GT11_DUAL (...);
10386    parameter ALIGN_COMMA_WORD_A = 1;
10387    parameter ALIGN_COMMA_WORD_B = 1;
10388    parameter BANDGAPSEL_A = "FALSE";
10389    parameter BANDGAPSEL_B = "FALSE";
10390    parameter BIASRESSEL_A = "TRUE";
10391    parameter BIASRESSEL_B = "TRUE";
10392    parameter CCCB_ARBITRATOR_DISABLE_A = "FALSE";
10393    parameter CCCB_ARBITRATOR_DISABLE_B = "FALSE";
10394    parameter CHAN_BOND_LIMIT_A = 16;
10395    parameter CHAN_BOND_LIMIT_B = 16;
10396    parameter CHAN_BOND_MODE_A = "NONE";
10397    parameter CHAN_BOND_MODE_B = "NONE";
10398    parameter CHAN_BOND_ONE_SHOT_A = "FALSE";
10399    parameter CHAN_BOND_ONE_SHOT_B = "FALSE";
10400    parameter CHAN_BOND_SEQ_1_1_A = 11'b00000000000;
10401    parameter CHAN_BOND_SEQ_1_1_B = 11'b00000000000;
10402    parameter CHAN_BOND_SEQ_1_2_A = 11'b00000000000;
10403    parameter CHAN_BOND_SEQ_1_2_B = 11'b00000000000;
10404    parameter CHAN_BOND_SEQ_1_3_A = 11'b00000000000;
10405    parameter CHAN_BOND_SEQ_1_3_B = 11'b00000000000;
10406    parameter CHAN_BOND_SEQ_1_4_A = 11'b00000000000;
10407    parameter CHAN_BOND_SEQ_1_4_B = 11'b00000000000;
10408    parameter CHAN_BOND_SEQ_1_MASK_A = 4'b0000;
10409    parameter CHAN_BOND_SEQ_1_MASK_B = 4'b0000;
10410    parameter CHAN_BOND_SEQ_2_1_A = 11'b00000000000;
10411    parameter CHAN_BOND_SEQ_2_1_B = 11'b00000000000;
10412    parameter CHAN_BOND_SEQ_2_2_A = 11'b00000000000;
10413    parameter CHAN_BOND_SEQ_2_2_B = 11'b00000000000;
10414    parameter CHAN_BOND_SEQ_2_3_A = 11'b00000000000;
10415    parameter CHAN_BOND_SEQ_2_3_B = 11'b00000000000;
10416    parameter CHAN_BOND_SEQ_2_4_A = 11'b00000000000;
10417    parameter CHAN_BOND_SEQ_2_4_B = 11'b00000000000;
10418    parameter CHAN_BOND_SEQ_2_MASK_A = 4'b0000;
10419    parameter CHAN_BOND_SEQ_2_MASK_B = 4'b0000;
10420    parameter CHAN_BOND_SEQ_2_USE_A = "FALSE";
10421    parameter CHAN_BOND_SEQ_2_USE_B = "FALSE";
10422    parameter CHAN_BOND_SEQ_LEN_A = 1;
10423    parameter CHAN_BOND_SEQ_LEN_B = 1;
10424    parameter CLK_CORRECT_USE_A = "TRUE";
10425    parameter CLK_CORRECT_USE_B = "TRUE";
10426    parameter CLK_COR_8B10B_DE_A = "FALSE";
10427    parameter CLK_COR_8B10B_DE_B = "FALSE";
10428    parameter CLK_COR_MAX_LAT_A = 36;
10429    parameter CLK_COR_MAX_LAT_B = 36;
10430    parameter CLK_COR_MIN_LAT_A = 28;
10431    parameter CLK_COR_MIN_LAT_B = 28;
10432    parameter CLK_COR_SEQ_1_1_A = 11'b00000000000;
10433    parameter CLK_COR_SEQ_1_1_B = 11'b00000000000;
10434    parameter CLK_COR_SEQ_1_2_A = 11'b00000000000;
10435    parameter CLK_COR_SEQ_1_2_B = 11'b00000000000;
10436    parameter CLK_COR_SEQ_1_3_A = 11'b00000000000;
10437    parameter CLK_COR_SEQ_1_3_B = 11'b00000000000;
10438    parameter CLK_COR_SEQ_1_4_A = 11'b00000000000;
10439    parameter CLK_COR_SEQ_1_4_B = 11'b00000000000;
10440    parameter CLK_COR_SEQ_1_MASK_A = 4'b0000;
10441    parameter CLK_COR_SEQ_1_MASK_B = 4'b0000;
10442    parameter CLK_COR_SEQ_2_1_A = 11'b00000000000;
10443    parameter CLK_COR_SEQ_2_1_B = 11'b00000000000;
10444    parameter CLK_COR_SEQ_2_2_A = 11'b00000000000;
10445    parameter CLK_COR_SEQ_2_2_B = 11'b00000000000;
10446    parameter CLK_COR_SEQ_2_3_A = 11'b00000000000;
10447    parameter CLK_COR_SEQ_2_3_B = 11'b00000000000;
10448    parameter CLK_COR_SEQ_2_4_A = 11'b00000000000;
10449    parameter CLK_COR_SEQ_2_4_B = 11'b00000000000;
10450    parameter CLK_COR_SEQ_2_MASK_A = 4'b0000;
10451    parameter CLK_COR_SEQ_2_MASK_B = 4'b0000;
10452    parameter CLK_COR_SEQ_2_USE_A = "FALSE";
10453    parameter CLK_COR_SEQ_2_USE_B = "FALSE";
10454    parameter CLK_COR_SEQ_DROP_A = "FALSE";
10455    parameter CLK_COR_SEQ_DROP_B = "FALSE";
10456    parameter CLK_COR_SEQ_LEN_A = 1;
10457    parameter CLK_COR_SEQ_LEN_B = 1;
10458    parameter COMMA32_A = "FALSE";
10459    parameter COMMA32_B = "FALSE";
10460    parameter COMMA_10B_MASK_A = 10'h3FF;
10461    parameter COMMA_10B_MASK_B = 10'h3FF;
10462    parameter CYCLE_LIMIT_SEL_A = 2'b00;
10463    parameter CYCLE_LIMIT_SEL_B = 2'b00;
10464    parameter DCDR_FILTER_A = 3'b010;
10465    parameter DCDR_FILTER_B = 3'b010;
10466    parameter DEC_MCOMMA_DETECT_A = "TRUE";
10467    parameter DEC_MCOMMA_DETECT_B = "TRUE";
10468    parameter DEC_PCOMMA_DETECT_A = "TRUE";
10469    parameter DEC_PCOMMA_DETECT_B = "TRUE";
10470    parameter DEC_VALID_COMMA_ONLY_A = "TRUE";
10471    parameter DEC_VALID_COMMA_ONLY_B = "TRUE";
10472    parameter DIGRX_FWDCLK_A = 2'b00;
10473    parameter DIGRX_FWDCLK_B = 2'b00;
10474    parameter DIGRX_SYNC_MODE_A = "FALSE";
10475    parameter DIGRX_SYNC_MODE_B = "FALSE";
10476    parameter ENABLE_DCDR_A = "FALSE";
10477    parameter ENABLE_DCDR_B = "FALSE";
10478    parameter FDET_HYS_CAL_A = 3'b110;
10479    parameter FDET_HYS_CAL_B = 3'b110;
10480    parameter FDET_HYS_SEL_A = 3'b110;
10481    parameter FDET_HYS_SEL_B = 3'b110;
10482    parameter FDET_LCK_CAL_A = 3'b101;
10483    parameter FDET_LCK_CAL_B = 3'b101;
10484    parameter FDET_LCK_SEL_A = 3'b101;
10485    parameter FDET_LCK_SEL_B = 3'b101;
10486    parameter IREFBIASMODE_A = 2'b11;
10487    parameter IREFBIASMODE_B = 2'b11;
10488    parameter LOOPCAL_WAIT_A = 2'b00;
10489    parameter LOOPCAL_WAIT_B = 2'b00;
10490    parameter MCOMMA_32B_VALUE_A = 32'hA1A1A2A2;
10491    parameter MCOMMA_32B_VALUE_B = 32'hA1A1A2A2;
10492    parameter MCOMMA_DETECT_A = "TRUE";
10493    parameter MCOMMA_DETECT_B = "TRUE";
10494    parameter OPPOSITE_SELECT_A = "FALSE";
10495    parameter OPPOSITE_SELECT_B = "FALSE";
10496    parameter PCOMMA_32B_VALUE_A = 32'hA1A1A2A2;
10497    parameter PCOMMA_32B_VALUE_B = 32'hA1A1A2A2;
10498    parameter PCOMMA_DETECT_A = "TRUE";
10499    parameter PCOMMA_DETECT_B = "TRUE";
10500    parameter PCS_BIT_SLIP_A = "FALSE";
10501    parameter PCS_BIT_SLIP_B = "FALSE";
10502    parameter PMACLKENABLE_A = "TRUE";
10503    parameter PMACLKENABLE_B = "TRUE";
10504    parameter PMACOREPWRENABLE_A = "TRUE";
10505    parameter PMACOREPWRENABLE_B = "TRUE";
10506    parameter PMAIREFTRIM_A = 4'b0111;
10507    parameter PMAIREFTRIM_B = 4'b0111;
10508    parameter PMAVBGCTRL_A = 5'b00000;
10509    parameter PMAVBGCTRL_B = 5'b00000;
10510    parameter PMAVREFTRIM_A = 4'b0111;
10511    parameter PMAVREFTRIM_B = 4'b0111;
10512    parameter PMA_BIT_SLIP_A = "FALSE";
10513    parameter PMA_BIT_SLIP_B = "FALSE";
10514    parameter POWER_ENABLE_A = "TRUE";
10515    parameter POWER_ENABLE_B = "TRUE";
10516    parameter REPEATER_A = "FALSE";
10517    parameter REPEATER_B = "FALSE";
10518    parameter RXACTST_A = "FALSE";
10519    parameter RXACTST_B = "FALSE";
10520    parameter RXAFEEQ_A = 9'b000000000;
10521    parameter RXAFEEQ_B = 9'b000000000;
10522    parameter RXAFEPD_A = "FALSE";
10523    parameter RXAFEPD_B = "FALSE";
10524    parameter RXAFETST_A = "FALSE";
10525    parameter RXAFETST_B = "FALSE";
10526    parameter RXAPD_A = "FALSE";
10527    parameter RXAPD_B = "FALSE";
10528    parameter RXASYNCDIVIDE_A = 2'b00;
10529    parameter RXASYNCDIVIDE_B = 2'b00;
10530    parameter RXBY_32_A = "TRUE";
10531    parameter RXBY_32_B = "TRUE";
10532    parameter RXCDRLOS_A = 6'b000000;
10533    parameter RXCDRLOS_B = 6'b000000;
10534    parameter RXCLK0_FORCE_PMACLK_A = "FALSE";
10535    parameter RXCLK0_FORCE_PMACLK_B = "FALSE";
10536    parameter RXCLKMODE_A = 6'b110001;
10537    parameter RXCLKMODE_B = 6'b110001;
10538    parameter RXCMADJ_A = 2'b10;
10539    parameter RXCMADJ_B = 2'b10;
10540    parameter RXCPSEL_A = "TRUE";
10541    parameter RXCPSEL_B = "TRUE";
10542    parameter RXCPTST_A = "FALSE";
10543    parameter RXCPTST_B = "FALSE";
10544    parameter RXCRCCLOCKDOUBLE_A = "FALSE";
10545    parameter RXCRCCLOCKDOUBLE_B = "FALSE";
10546    parameter RXCRCENABLE_A = "FALSE";
10547    parameter RXCRCENABLE_B = "FALSE";
10548    parameter RXCRCINITVAL_A = 32'h00000000;
10549    parameter RXCRCINITVAL_B = 32'h00000000;
10550    parameter RXCRCINVERTGEN_A = "FALSE";
10551    parameter RXCRCINVERTGEN_B = "FALSE";
10552    parameter RXCRCSAMECLOCK_A = "FALSE";
10553    parameter RXCRCSAMECLOCK_B = "FALSE";
10554    parameter RXCTRL1_A = 10'h006;
10555    parameter RXCTRL1_B = 10'h006;
10556    parameter RXCYCLE_LIMIT_SEL_A = 2'b00;
10557    parameter RXCYCLE_LIMIT_SEL_B = 2'b00;
10558    parameter RXDATA_SEL_A = 2'b00;
10559    parameter RXDATA_SEL_B = 2'b00;
10560    parameter RXDCCOUPLE_A = "FALSE";
10561    parameter RXDCCOUPLE_B = "FALSE";
10562    parameter RXDIGRESET_A = "FALSE";
10563    parameter RXDIGRESET_B = "FALSE";
10564    parameter RXDIGRX_A = "FALSE";
10565    parameter RXDIGRX_B = "FALSE";
10566    parameter RXEQ_A = 64'h4000000000000000;
10567    parameter RXEQ_B = 64'h4000000000000000;
10568    parameter RXFDCAL_CLOCK_DIVIDE_A = "NONE";
10569    parameter RXFDCAL_CLOCK_DIVIDE_B = "NONE";
10570    parameter RXFDET_HYS_CAL_A = 3'b110;
10571    parameter RXFDET_HYS_CAL_B = 3'b110;
10572    parameter RXFDET_HYS_SEL_A = 3'b110;
10573    parameter RXFDET_HYS_SEL_B = 3'b110;
10574    parameter RXFDET_LCK_CAL_A = 3'b101;
10575    parameter RXFDET_LCK_CAL_B = 3'b101;
10576    parameter RXFDET_LCK_SEL_A = 3'b101;
10577    parameter RXFDET_LCK_SEL_B = 3'b101;
10578    parameter RXFECONTROL1_A = 2'b00;
10579    parameter RXFECONTROL1_B = 2'b00;
10580    parameter RXFECONTROL2_A = 3'b000;
10581    parameter RXFECONTROL2_B = 3'b000;
10582    parameter RXFETUNE_A = 2'b01;
10583    parameter RXFETUNE_B = 2'b01;
10584    parameter RXLB_A = "FALSE";
10585    parameter RXLB_B = "FALSE";
10586    parameter RXLKADJ_A = 5'b00000;
10587    parameter RXLKADJ_B = 5'b00000;
10588    parameter RXLKAPD_A = "FALSE";
10589    parameter RXLKAPD_B = "FALSE";
10590    parameter RXLOOPCAL_WAIT_A = 2'b00;
10591    parameter RXLOOPCAL_WAIT_B = 2'b00;
10592    parameter RXLOOPFILT_A = 4'b0111;
10593    parameter RXLOOPFILT_B = 4'b0111;
10594    parameter RXOUTDIV2SEL_A = 1;
10595    parameter RXOUTDIV2SEL_B = 1;
10596    parameter RXPDDTST_A = "FALSE";
10597    parameter RXPDDTST_B = "FALSE";
10598    parameter RXPD_A = "FALSE";
10599    parameter RXPD_B = "FALSE";
10600    parameter RXPLLNDIVSEL_A = 8;
10601    parameter RXPLLNDIVSEL_B = 8;
10602    parameter RXPMACLKSEL_A = "REFCLK1";
10603    parameter RXPMACLKSEL_B = "REFCLK1";
10604    parameter RXRCPADJ_A = 3'b011;
10605    parameter RXRCPADJ_B = 3'b011;
10606    parameter RXRCPPD_A = "FALSE";
10607    parameter RXRCPPD_B = "FALSE";
10608    parameter RXRECCLK1_USE_SYNC_A = "FALSE";
10609    parameter RXRECCLK1_USE_SYNC_B = "FALSE";
10610    parameter RXRIBADJ_A = 2'b11;
10611    parameter RXRIBADJ_B = 2'b11;
10612    parameter RXRPDPD_A = "FALSE";
10613    parameter RXRPDPD_B = "FALSE";
10614    parameter RXRSDPD_A = "FALSE";
10615    parameter RXRSDPD_B = "FALSE";
10616    parameter RXSLOWDOWN_CAL_A = 2'b00;
10617    parameter RXSLOWDOWN_CAL_B = 2'b00;
10618    parameter RXUSRDIVISOR_A = 1;
10619    parameter RXUSRDIVISOR_B = 1;
10620    parameter RXVCODAC_INIT_A = 10'b1010000000;
10621    parameter RXVCODAC_INIT_B = 10'b1010000000;
10622    parameter RXVCO_CTRL_ENABLE_A = "TRUE";
10623    parameter RXVCO_CTRL_ENABLE_B = "TRUE";
10624    parameter RX_BUFFER_USE_A = "TRUE";
10625    parameter RX_BUFFER_USE_B = "TRUE";
10626    parameter RX_CLOCK_DIVIDER_A = 2'b00;
10627    parameter RX_CLOCK_DIVIDER_B = 2'b00;
10628    parameter RX_LOS_INVALID_INCR_A = 1;
10629    parameter RX_LOS_INVALID_INCR_B = 1;
10630    parameter RX_LOS_THRESHOLD_A = 4;
10631    parameter RX_LOS_THRESHOLD_B = 4;
10632    parameter SAMPLE_8X_A = "FALSE";
10633    parameter SAMPLE_8X_B = "FALSE";
10634    parameter SH_CNT_MAX_A = 64;
10635    parameter SH_CNT_MAX_B = 64;
10636    parameter SH_INVALID_CNT_MAX_A = 16;
10637    parameter SH_INVALID_CNT_MAX_B = 16;
10638    parameter SLOWDOWN_CAL_A = 2'b00;
10639    parameter SLOWDOWN_CAL_B = 2'b00;
10640    parameter TXABPMACLKSEL_A = "REFCLK1";
10641    parameter TXABPMACLKSEL_B = "REFCLK1";
10642    parameter TXAPD_A = "FALSE";
10643    parameter TXAPD_B = "FALSE";
10644    parameter TXAREFBIASSEL_A = "FALSE";
10645    parameter TXAREFBIASSEL_B = "FALSE";
10646    parameter TXASYNCDIVIDE_A = 2'b00;
10647    parameter TXASYNCDIVIDE_B = 2'b00;
10648    parameter TXCLK0_FORCE_PMACLK_A = "FALSE";
10649    parameter TXCLK0_FORCE_PMACLK_B = "FALSE";
10650    parameter TXCLKMODE_A = 4'b1001;
10651    parameter TXCLKMODE_B = 4'b1001;
10652    parameter TXCPSEL_A = "TRUE";
10653    parameter TXCPSEL_B = "TRUE";
10654    parameter TXCRCCLOCKDOUBLE_A = "FALSE";
10655    parameter TXCRCCLOCKDOUBLE_B = "FALSE";
10656    parameter TXCRCENABLE_A = "FALSE";
10657    parameter TXCRCENABLE_B = "FALSE";
10658    parameter TXCRCINITVAL_A = 32'h00000000;
10659    parameter TXCRCINITVAL_B = 32'h00000000;
10660    parameter TXCRCINVERTGEN_A = "FALSE";
10661    parameter TXCRCINVERTGEN_B = "FALSE";
10662    parameter TXCRCSAMECLOCK_A = "FALSE";
10663    parameter TXCRCSAMECLOCK_B = "FALSE";
10664    parameter TXCTRL1_A = 10'h006;
10665    parameter TXCTRL1_B = 10'h006;
10666    parameter TXDATA_SEL_A = 2'b00;
10667    parameter TXDATA_SEL_B = 2'b00;
10668    parameter TXDAT_PRDRV_DAC_A = 3'b111;
10669    parameter TXDAT_PRDRV_DAC_B = 3'b111;
10670    parameter TXDAT_TAP_DAC_A = 5'b10110;
10671    parameter TXDAT_TAP_DAC_B = 5'b10110;
10672    parameter TXDIGPD_A = "FALSE";
10673    parameter TXDIGPD_B = "FALSE";
10674    parameter TXFDCAL_CLOCK_DIVIDE_A = "NONE";
10675    parameter TXFDCAL_CLOCK_DIVIDE_B = "NONE";
10676    parameter TXHIGHSIGNALEN_A = "TRUE";
10677    parameter TXHIGHSIGNALEN_B = "TRUE";
10678    parameter TXLOOPFILT_A = 4'b0111;
10679    parameter TXLOOPFILT_B = 4'b0111;
10680    parameter TXLVLSHFTPD_A = "FALSE";
10681    parameter TXLVLSHFTPD_B = "FALSE";
10682    parameter TXOUTCLK1_USE_SYNC_A = "FALSE";
10683    parameter TXOUTCLK1_USE_SYNC_B = "FALSE";
10684    parameter TXOUTDIV2SEL_A = 1;
10685    parameter TXOUTDIV2SEL_B = 1;
10686    parameter TXPD_A = "FALSE";
10687    parameter TXPD_B = "FALSE";
10688    parameter TXPHASESEL_A = "FALSE";
10689    parameter TXPHASESEL_B = "FALSE";
10690    parameter TXPLLNDIVSEL_A = 8;
10691    parameter TXPLLNDIVSEL_B = 8;
10692    parameter TXPOST_PRDRV_DAC_A = 3'b111;
10693    parameter TXPOST_PRDRV_DAC_B = 3'b111;
10694    parameter TXPOST_TAP_DAC_A = 5'b01110;
10695    parameter TXPOST_TAP_DAC_B = 5'b01110;
10696    parameter TXPOST_TAP_PD_A = "TRUE";
10697    parameter TXPOST_TAP_PD_B = "TRUE";
10698    parameter TXPRE_PRDRV_DAC_A = 3'b111;
10699    parameter TXPRE_PRDRV_DAC_B = 3'b111;
10700    parameter TXPRE_TAP_DAC_A = 5'b00000;
10701    parameter TXPRE_TAP_DAC_B = 5'b00000;
10702    parameter TXPRE_TAP_PD_A = "TRUE";
10703    parameter TXPRE_TAP_PD_B = "TRUE";
10704    parameter TXSLEWRATE_A = "FALSE";
10705    parameter TXSLEWRATE_B = "FALSE";
10706    parameter TXTERMTRIM_A = 4'b1100;
10707    parameter TXTERMTRIM_B = 4'b1100;
10708    parameter TX_BUFFER_USE_A = "TRUE";
10709    parameter TX_BUFFER_USE_B = "TRUE";
10710    parameter TX_CLOCK_DIVIDER_A = 2'b00;
10711    parameter TX_CLOCK_DIVIDER_B = 2'b00;
10712    parameter VCODAC_INIT_A = 10'b1010000000;
10713    parameter VCODAC_INIT_B = 10'b1010000000;
10714    parameter VCO_CTRL_ENABLE_A = "TRUE";
10715    parameter VCO_CTRL_ENABLE_B = "TRUE";
10716    parameter VREFBIASMODE_A = 2'b11;
10717    parameter VREFBIASMODE_B = 2'b11;
10718    output DRDYA;
10719    output DRDYB;
10720    output RXBUFERRA;
10721    output RXBUFERRB;
10722    output RXCALFAILA;
10723    output RXCALFAILB;
10724    output RXCOMMADETA;
10725    output RXCOMMADETB;
10726    output RXCYCLELIMITA;
10727    output RXCYCLELIMITB;
10728    output RXLOCKA;
10729    output RXLOCKB;
10730    output RXMCLKA;
10731    output RXMCLKB;
10732    output RXPCSHCLKOUTA;
10733    output RXPCSHCLKOUTB;
10734    output RXREALIGNA;
10735    output RXREALIGNB;
10736    output RXRECCLK1A;
10737    output RXRECCLK1B;
10738    output RXRECCLK2A;
10739    output RXRECCLK2B;
10740    output RXSIGDETA;
10741    output RXSIGDETB;
10742    output TX1NA;
10743    output TX1NB;
10744    output TX1PA;
10745    output TX1PB;
10746    output TXBUFERRA;
10747    output TXBUFERRB;
10748    output TXCALFAILA;
10749    output TXCALFAILB;
10750    output TXCYCLELIMITA;
10751    output TXCYCLELIMITB;
10752    output TXLOCKA;
10753    output TXLOCKB;
10754    output TXOUTCLK1A;
10755    output TXOUTCLK1B;
10756    output TXOUTCLK2A;
10757    output TXOUTCLK2B;
10758    output TXPCSHCLKOUTA;
10759    output TXPCSHCLKOUTB;
10760    output [15:0] DOA;
10761    output [15:0] DOB;
10762    output [1:0] RXLOSSOFSYNCA;
10763    output [1:0] RXLOSSOFSYNCB;
10764    output [31:0] RXCRCOUTA;
10765    output [31:0] RXCRCOUTB;
10766    output [31:0] TXCRCOUTA;
10767    output [31:0] TXCRCOUTB;
10768    output [4:0] CHBONDOA;
10769    output [4:0] CHBONDOB;
10770    output [5:0] RXSTATUSA;
10771    output [5:0] RXSTATUSB;
10772    output [63:0] RXDATAA;
10773    output [63:0] RXDATAB;
10774    output [7:0] RXCHARISCOMMAA;
10775    output [7:0] RXCHARISCOMMAB;
10776    output [7:0] RXCHARISKA;
10777    output [7:0] RXCHARISKB;
10778    output [7:0] RXDISPERRA;
10779    output [7:0] RXDISPERRB;
10780    output [7:0] RXNOTINTABLEA;
10781    output [7:0] RXNOTINTABLEB;
10782    output [7:0] RXRUNDISPA;
10783    output [7:0] RXRUNDISPB;
10784    output [7:0] TXKERRA;
10785    output [7:0] TXKERRB;
10786    output [7:0] TXRUNDISPA;
10787    output [7:0] TXRUNDISPB;
10788    input DCLKA;
10789    input DCLKB;
10790    input DENA;
10791    input DENB;
10792    input DWEA;
10793    input DWEB;
10794    input ENCHANSYNCA;
10795    input ENCHANSYNCB;
10796    input ENMCOMMAALIGNA;
10797    input ENMCOMMAALIGNB;
10798    input ENPCOMMAALIGNA;
10799    input ENPCOMMAALIGNB;
10800    input GREFCLKA;
10801    input GREFCLKB;
10802    input POWERDOWNA;
10803    input POWERDOWNB;
10804    input REFCLK1A;
10805    input REFCLK1B;
10806    input REFCLK2A;
10807    input REFCLK2B;
10808    input RX1NA;
10809    input RX1NB;
10810    input RX1PA;
10811    input RX1PB;
10812    input RXBLOCKSYNC64B66BUSEA;
10813    input RXBLOCKSYNC64B66BUSEB;
10814    input RXCLKSTABLEA;
10815    input RXCLKSTABLEB;
10816    input RXCOMMADETUSEA;
10817    input RXCOMMADETUSEB;
10818    input RXCRCCLKA;
10819    input RXCRCCLKB;
10820    input RXCRCDATAVALIDA;
10821    input RXCRCDATAVALIDB;
10822    input RXCRCINITA;
10823    input RXCRCINITB;
10824    input RXCRCINTCLKA;
10825    input RXCRCINTCLKB;
10826    input RXCRCPDA;
10827    input RXCRCPDB;
10828    input RXCRCRESETA;
10829    input RXCRCRESETB;
10830    input RXDEC64B66BUSEA;
10831    input RXDEC64B66BUSEB;
10832    input RXDEC8B10BUSEA;
10833    input RXDEC8B10BUSEB;
10834    input RXDESCRAM64B66BUSEA;
10835    input RXDESCRAM64B66BUSEB;
10836    input RXIGNOREBTFA;
10837    input RXIGNOREBTFB;
10838    input RXPMARESETA;
10839    input RXPMARESETB;
10840    input RXPOLARITYA;
10841    input RXPOLARITYB;
10842    input RXRESETA;
10843    input RXRESETB;
10844    input RXSLIDEA;
10845    input RXSLIDEB;
10846    input RXSYNCA;
10847    input RXSYNCB;
10848    input RXUSRCLK2A;
10849    input RXUSRCLK2B;
10850    input RXUSRCLKA;
10851    input RXUSRCLKB;
10852    input TXCLKSTABLEA;
10853    input TXCLKSTABLEB;
10854    input TXCRCCLKA;
10855    input TXCRCCLKB;
10856    input TXCRCDATAVALIDA;
10857    input TXCRCDATAVALIDB;
10858    input TXCRCINITA;
10859    input TXCRCINITB;
10860    input TXCRCINTCLKA;
10861    input TXCRCINTCLKB;
10862    input TXCRCPDA;
10863    input TXCRCPDB;
10864    input TXCRCRESETA;
10865    input TXCRCRESETB;
10866    input TXENC64B66BUSEA;
10867    input TXENC64B66BUSEB;
10868    input TXENC8B10BUSEA;
10869    input TXENC8B10BUSEB;
10870    input TXENOOBA;
10871    input TXENOOBB;
10872    input TXGEARBOX64B66BUSEA;
10873    input TXGEARBOX64B66BUSEB;
10874    input TXINHIBITA;
10875    input TXINHIBITB;
10876    input TXPMARESETA;
10877    input TXPMARESETB;
10878    input TXPOLARITYA;
10879    input TXPOLARITYB;
10880    input TXRESETA;
10881    input TXRESETB;
10882    input TXSCRAM64B66BUSEA;
10883    input TXSCRAM64B66BUSEB;
10884    input TXSYNCA;
10885    input TXSYNCB;
10886    input TXUSRCLK2A;
10887    input TXUSRCLK2B;
10888    input TXUSRCLKA;
10889    input TXUSRCLKB;
10890    input [15:0] DIA;
10891    input [15:0] DIB;
10892    input [1:0] LOOPBACKA;
10893    input [1:0] LOOPBACKB;
10894    input [1:0] RXDATAWIDTHA;
10895    input [1:0] RXDATAWIDTHB;
10896    input [1:0] RXINTDATAWIDTHA;
10897    input [1:0] RXINTDATAWIDTHB;
10898    input [1:0] TXDATAWIDTHA;
10899    input [1:0] TXDATAWIDTHB;
10900    input [1:0] TXINTDATAWIDTHA;
10901    input [1:0] TXINTDATAWIDTHB;
10902    input [2:0] RXCRCDATAWIDTHA;
10903    input [2:0] RXCRCDATAWIDTHB;
10904    input [2:0] TXCRCDATAWIDTHA;
10905    input [2:0] TXCRCDATAWIDTHB;
10906    input [4:0] CHBONDIA;
10907    input [4:0] CHBONDIB;
10908    input [63:0] RXCRCINA;
10909    input [63:0] RXCRCINB;
10910    input [63:0] TXCRCINA;
10911    input [63:0] TXCRCINB;
10912    input [63:0] TXDATAA;
10913    input [63:0] TXDATAB;
10914    input [7:0] DADDRA;
10915    input [7:0] DADDRB;
10916    input [7:0] TXBYPASS8B10BA;
10917    input [7:0] TXBYPASS8B10BB;
10918    input [7:0] TXCHARDISPMODEA;
10919    input [7:0] TXCHARDISPMODEB;
10920    input [7:0] TXCHARDISPVALA;
10921    input [7:0] TXCHARDISPVALB;
10922    input [7:0] TXCHARISKA;
10923    input [7:0] TXCHARISKB;
10924endmodule
10925
10926module GT11CLK (...);
10927    parameter REFCLKSEL = "MGTCLK";
10928    parameter SYNCLK1OUTEN = "ENABLE";
10929    parameter SYNCLK2OUTEN = "DISABLE";
10930    output SYNCLK1OUT;
10931    output SYNCLK2OUT;
10932    input MGTCLKN;
10933    input MGTCLKP;
10934    input REFCLK;
10935    input RXBCLK;
10936    input SYNCLK1IN;
10937    input SYNCLK2IN;
10938endmodule
10939
10940module GT11CLK_MGT (...);
10941    parameter SYNCLK1OUTEN = "ENABLE";
10942    parameter SYNCLK2OUTEN = "DISABLE";
10943    output SYNCLK1OUT;
10944    output SYNCLK2OUT;
10945    input MGTCLKN;
10946    input MGTCLKP;
10947endmodule
10948
10949module GTP_DUAL (...);
10950    parameter AC_CAP_DIS_0 = "TRUE";
10951    parameter AC_CAP_DIS_1 = "TRUE";
10952    parameter CHAN_BOND_MODE_0 = "OFF";
10953    parameter CHAN_BOND_MODE_1 = "OFF";
10954    parameter CHAN_BOND_SEQ_2_USE_0 = "TRUE";
10955    parameter CHAN_BOND_SEQ_2_USE_1 = "TRUE";
10956    parameter CLKINDC_B = "TRUE";
10957    parameter CLK_CORRECT_USE_0 = "TRUE";
10958    parameter CLK_CORRECT_USE_1 = "TRUE";
10959    parameter CLK_COR_INSERT_IDLE_FLAG_0 = "FALSE";
10960    parameter CLK_COR_INSERT_IDLE_FLAG_1 = "FALSE";
10961    parameter CLK_COR_KEEP_IDLE_0 = "FALSE";
10962    parameter CLK_COR_KEEP_IDLE_1 = "FALSE";
10963    parameter CLK_COR_PRECEDENCE_0 = "TRUE";
10964    parameter CLK_COR_PRECEDENCE_1 = "TRUE";
10965    parameter CLK_COR_SEQ_2_USE_0 = "FALSE";
10966    parameter CLK_COR_SEQ_2_USE_1 = "FALSE";
10967    parameter COMMA_DOUBLE_0 = "FALSE";
10968    parameter COMMA_DOUBLE_1 = "FALSE";
10969    parameter DEC_MCOMMA_DETECT_0 = "TRUE";
10970    parameter DEC_MCOMMA_DETECT_1 = "TRUE";
10971    parameter DEC_PCOMMA_DETECT_0 = "TRUE";
10972    parameter DEC_PCOMMA_DETECT_1 = "TRUE";
10973    parameter DEC_VALID_COMMA_ONLY_0 = "TRUE";
10974    parameter DEC_VALID_COMMA_ONLY_1 = "TRUE";
10975    parameter MCOMMA_DETECT_0 = "TRUE";
10976    parameter MCOMMA_DETECT_1 = "TRUE";
10977    parameter OVERSAMPLE_MODE = "FALSE";
10978    parameter PCI_EXPRESS_MODE_0 = "TRUE";
10979    parameter PCI_EXPRESS_MODE_1 = "TRUE";
10980    parameter PCOMMA_DETECT_0 = "TRUE";
10981    parameter PCOMMA_DETECT_1 = "TRUE";
10982    parameter PLL_SATA_0 = "FALSE";
10983    parameter PLL_SATA_1 = "FALSE";
10984    parameter RCV_TERM_GND_0 = "TRUE";
10985    parameter RCV_TERM_GND_1 = "TRUE";
10986    parameter RCV_TERM_MID_0 = "FALSE";
10987    parameter RCV_TERM_MID_1 = "FALSE";
10988    parameter RCV_TERM_VTTRX_0 = "FALSE";
10989    parameter RCV_TERM_VTTRX_1 = "FALSE";
10990    parameter RX_BUFFER_USE_0 = "TRUE";
10991    parameter RX_BUFFER_USE_1 = "TRUE";
10992    parameter RX_DECODE_SEQ_MATCH_0 = "TRUE";
10993    parameter RX_DECODE_SEQ_MATCH_1 = "TRUE";
10994    parameter RX_LOSS_OF_SYNC_FSM_0 = "FALSE";
10995    parameter RX_LOSS_OF_SYNC_FSM_1 = "FALSE";
10996    parameter RX_SLIDE_MODE_0 = "PCS";
10997    parameter RX_SLIDE_MODE_1 = "PCS";
10998    parameter RX_STATUS_FMT_0 = "PCIE";
10999    parameter RX_STATUS_FMT_1 = "PCIE";
11000    parameter RX_XCLK_SEL_0 = "RXREC";
11001    parameter RX_XCLK_SEL_1 = "RXREC";
11002    parameter SIM_PLL_PERDIV2 = 9'h190;
11003    parameter SIM_RECEIVER_DETECT_PASS0 = "FALSE";
11004    parameter SIM_RECEIVER_DETECT_PASS1 = "FALSE";
11005    parameter TERMINATION_OVRD = "FALSE";
11006    parameter TX_BUFFER_USE_0 = "TRUE";
11007    parameter TX_BUFFER_USE_1 = "TRUE";
11008    parameter TX_DIFF_BOOST_0 = "TRUE";
11009    parameter TX_DIFF_BOOST_1 = "TRUE";
11010    parameter TX_XCLK_SEL_0 = "TXUSR";
11011    parameter TX_XCLK_SEL_1 = "TXUSR";
11012    parameter [15:0] TRANS_TIME_FROM_P2_0 = 16'h003c;
11013    parameter [15:0] TRANS_TIME_FROM_P2_1 = 16'h003c;
11014    parameter [15:0] TRANS_TIME_NON_P2_0 = 16'h0019;
11015    parameter [15:0] TRANS_TIME_NON_P2_1 = 16'h0019;
11016    parameter [15:0] TRANS_TIME_TO_P2_0 = 16'h0064;
11017    parameter [15:0] TRANS_TIME_TO_P2_1 = 16'h0064;
11018    parameter [24:0] PMA_RX_CFG_0 = 25'h09f0089;
11019    parameter [24:0] PMA_RX_CFG_1 = 25'h09f0089;
11020    parameter [26:0] PMA_CDR_SCAN_0 = 27'h6c07640;
11021    parameter [26:0] PMA_CDR_SCAN_1 = 27'h6c07640;
11022    parameter [27:0] PCS_COM_CFG = 28'h1680a0e;
11023    parameter [2:0] OOBDETECT_THRESHOLD_0 = 3'b001;
11024    parameter [2:0] OOBDETECT_THRESHOLD_1 = 3'b001;
11025    parameter [2:0] SATA_BURST_VAL_0 = 3'b100;
11026    parameter [2:0] SATA_BURST_VAL_1 = 3'b100;
11027    parameter [2:0] SATA_IDLE_VAL_0 = 3'b011;
11028    parameter [2:0] SATA_IDLE_VAL_1 = 3'b011;
11029    parameter [31:0] PRBS_ERR_THRESHOLD_0 = 32'h1;
11030    parameter [31:0] PRBS_ERR_THRESHOLD_1 = 32'h1;
11031    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_0 = 4'b1111;
11032    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_1 = 4'b1111;
11033    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_0 = 4'b1111;
11034    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_1 = 4'b1111;
11035    parameter [3:0] CLK_COR_SEQ_1_ENABLE_0 = 4'b1111;
11036    parameter [3:0] CLK_COR_SEQ_1_ENABLE_1 = 4'b1111;
11037    parameter [3:0] CLK_COR_SEQ_2_ENABLE_0 = 4'b1111;
11038    parameter [3:0] CLK_COR_SEQ_2_ENABLE_1 = 4'b1111;
11039    parameter [3:0] COM_BURST_VAL_0 = 4'b1111;
11040    parameter [3:0] COM_BURST_VAL_1 = 4'b1111;
11041    parameter [4:0] TERMINATION_CTRL = 5'b10100;
11042    parameter [4:0] TXRX_INVERT_0 = 5'b00000;
11043    parameter [4:0] TXRX_INVERT_1 = 5'b00000;
11044    parameter [9:0] CHAN_BOND_SEQ_1_1_0 = 10'b0001001010;
11045    parameter [9:0] CHAN_BOND_SEQ_1_1_1 = 10'b0001001010;
11046    parameter [9:0] CHAN_BOND_SEQ_1_2_0 = 10'b0001001010;
11047    parameter [9:0] CHAN_BOND_SEQ_1_2_1 = 10'b0001001010;
11048    parameter [9:0] CHAN_BOND_SEQ_1_3_0 = 10'b0001001010;
11049    parameter [9:0] CHAN_BOND_SEQ_1_3_1 = 10'b0001001010;
11050    parameter [9:0] CHAN_BOND_SEQ_1_4_0 = 10'b0110111100;
11051    parameter [9:0] CHAN_BOND_SEQ_1_4_1 = 10'b0110111100;
11052    parameter [9:0] CHAN_BOND_SEQ_2_1_0 = 10'b0110111100;
11053    parameter [9:0] CHAN_BOND_SEQ_2_1_1 = 10'b0110111100;
11054    parameter [9:0] CHAN_BOND_SEQ_2_2_0 = 10'b0100111100;
11055    parameter [9:0] CHAN_BOND_SEQ_2_2_1 = 10'b0100111100;
11056    parameter [9:0] CHAN_BOND_SEQ_2_3_0 = 10'b0100111100;
11057    parameter [9:0] CHAN_BOND_SEQ_2_3_1 = 10'b0100111100;
11058    parameter [9:0] CHAN_BOND_SEQ_2_4_0 = 10'b0100111100;
11059    parameter [9:0] CHAN_BOND_SEQ_2_4_1 = 10'b0100111100;
11060    parameter [9:0] CLK_COR_SEQ_1_1_0 = 10'b0100011100;
11061    parameter [9:0] CLK_COR_SEQ_1_1_1 = 10'b0100011100;
11062    parameter [9:0] CLK_COR_SEQ_1_2_0 = 10'b0;
11063    parameter [9:0] CLK_COR_SEQ_1_2_1 = 10'b0;
11064    parameter [9:0] CLK_COR_SEQ_1_3_0 = 10'b0;
11065    parameter [9:0] CLK_COR_SEQ_1_3_1 = 10'b0;
11066    parameter [9:0] CLK_COR_SEQ_1_4_0 = 10'b0;
11067    parameter [9:0] CLK_COR_SEQ_1_4_1 = 10'b0;
11068    parameter [9:0] CLK_COR_SEQ_2_1_0 = 10'b0;
11069    parameter [9:0] CLK_COR_SEQ_2_1_1 = 10'b0;
11070    parameter [9:0] CLK_COR_SEQ_2_2_0 = 10'b0;
11071    parameter [9:0] CLK_COR_SEQ_2_2_1 = 10'b0;
11072    parameter [9:0] CLK_COR_SEQ_2_3_0 = 10'b0;
11073    parameter [9:0] CLK_COR_SEQ_2_3_1 = 10'b0;
11074    parameter [9:0] CLK_COR_SEQ_2_4_0 = 10'b0;
11075    parameter [9:0] CLK_COR_SEQ_2_4_1 = 10'b0;
11076    parameter [9:0] COMMA_10B_ENABLE_0 = 10'b1111111111;
11077    parameter [9:0] COMMA_10B_ENABLE_1 = 10'b1111111111;
11078    parameter [9:0] MCOMMA_10B_VALUE_0 = 10'b1010000011;
11079    parameter [9:0] MCOMMA_10B_VALUE_1 = 10'b1010000011;
11080    parameter [9:0] PCOMMA_10B_VALUE_0 = 10'b0101111100;
11081    parameter [9:0] PCOMMA_10B_VALUE_1 = 10'b0101111100;
11082    parameter ALIGN_COMMA_WORD_0 = 1;
11083    parameter ALIGN_COMMA_WORD_1 = 1;
11084    parameter CHAN_BOND_1_MAX_SKEW_0 = 7;
11085    parameter CHAN_BOND_1_MAX_SKEW_1 = 7;
11086    parameter CHAN_BOND_2_MAX_SKEW_0 = 1;
11087    parameter CHAN_BOND_2_MAX_SKEW_1 = 1;
11088    parameter CHAN_BOND_LEVEL_0 = 0;
11089    parameter CHAN_BOND_LEVEL_1 = 0;
11090    parameter CHAN_BOND_SEQ_LEN_0 = 4;
11091    parameter CHAN_BOND_SEQ_LEN_1 = 4;
11092    parameter CLK25_DIVIDER = 4;
11093    parameter CLK_COR_ADJ_LEN_0 = 1;
11094    parameter CLK_COR_ADJ_LEN_1 = 1;
11095    parameter CLK_COR_DET_LEN_0 = 1;
11096    parameter CLK_COR_DET_LEN_1 = 1;
11097    parameter CLK_COR_MAX_LAT_0 = 18;
11098    parameter CLK_COR_MAX_LAT_1 = 18;
11099    parameter CLK_COR_MIN_LAT_0 = 16;
11100    parameter CLK_COR_MIN_LAT_1 = 16;
11101    parameter CLK_COR_REPEAT_WAIT_0 = 5;
11102    parameter CLK_COR_REPEAT_WAIT_1 = 5;
11103    parameter OOB_CLK_DIVIDER = 4;
11104    parameter PLL_DIVSEL_FB = 5;
11105    parameter PLL_DIVSEL_REF = 2;
11106    parameter PLL_RXDIVSEL_OUT_0 = 1;
11107    parameter PLL_RXDIVSEL_OUT_1 = 1;
11108    parameter PLL_TXDIVSEL_COMM_OUT = 1;
11109    parameter PLL_TXDIVSEL_OUT_0 = 1;
11110    parameter PLL_TXDIVSEL_OUT_1 = 1;
11111    parameter RX_LOS_INVALID_INCR_0 = 8;
11112    parameter RX_LOS_INVALID_INCR_1 = 8;
11113    parameter RX_LOS_THRESHOLD_0 = 128;
11114    parameter RX_LOS_THRESHOLD_1 = 128;
11115    parameter SATA_MAX_BURST_0 = 7;
11116    parameter SATA_MAX_BURST_1 = 7;
11117    parameter SATA_MAX_INIT_0 = 22;
11118    parameter SATA_MAX_INIT_1 = 22;
11119    parameter SATA_MAX_WAKE_0 = 7;
11120    parameter SATA_MAX_WAKE_1 = 7;
11121    parameter SATA_MIN_BURST_0 = 4;
11122    parameter SATA_MIN_BURST_1 = 4;
11123    parameter SATA_MIN_INIT_0 = 12;
11124    parameter SATA_MIN_INIT_1 = 12;
11125    parameter SATA_MIN_WAKE_0 = 4;
11126    parameter SATA_MIN_WAKE_1 = 4;
11127    parameter SIM_GTPRESET_SPEEDUP = 0;
11128    parameter TERMINATION_IMP_0 = 50;
11129    parameter TERMINATION_IMP_1 = 50;
11130    parameter TX_SYNC_FILTERB = 1;
11131    output DRDY;
11132    output PHYSTATUS0;
11133    output PHYSTATUS1;
11134    output PLLLKDET;
11135    output REFCLKOUT;
11136    output RESETDONE0;
11137    output RESETDONE1;
11138    output RXBYTEISALIGNED0;
11139    output RXBYTEISALIGNED1;
11140    output RXBYTEREALIGN0;
11141    output RXBYTEREALIGN1;
11142    output RXCHANBONDSEQ0;
11143    output RXCHANBONDSEQ1;
11144    output RXCHANISALIGNED0;
11145    output RXCHANISALIGNED1;
11146    output RXCHANREALIGN0;
11147    output RXCHANREALIGN1;
11148    output RXCOMMADET0;
11149    output RXCOMMADET1;
11150    output RXELECIDLE0;
11151    output RXELECIDLE1;
11152    output RXOVERSAMPLEERR0;
11153    output RXOVERSAMPLEERR1;
11154    output RXPRBSERR0;
11155    output RXPRBSERR1;
11156    output RXRECCLK0;
11157    output RXRECCLK1;
11158    output RXVALID0;
11159    output RXVALID1;
11160    output TXN0;
11161    output TXN1;
11162    output TXOUTCLK0;
11163    output TXOUTCLK1;
11164    output TXP0;
11165    output TXP1;
11166    output [15:0] DO;
11167    output [15:0] RXDATA0;
11168    output [15:0] RXDATA1;
11169    output [1:0] RXCHARISCOMMA0;
11170    output [1:0] RXCHARISCOMMA1;
11171    output [1:0] RXCHARISK0;
11172    output [1:0] RXCHARISK1;
11173    output [1:0] RXDISPERR0;
11174    output [1:0] RXDISPERR1;
11175    output [1:0] RXLOSSOFSYNC0;
11176    output [1:0] RXLOSSOFSYNC1;
11177    output [1:0] RXNOTINTABLE0;
11178    output [1:0] RXNOTINTABLE1;
11179    output [1:0] RXRUNDISP0;
11180    output [1:0] RXRUNDISP1;
11181    output [1:0] TXBUFSTATUS0;
11182    output [1:0] TXBUFSTATUS1;
11183    output [1:0] TXKERR0;
11184    output [1:0] TXKERR1;
11185    output [1:0] TXRUNDISP0;
11186    output [1:0] TXRUNDISP1;
11187    output [2:0] RXBUFSTATUS0;
11188    output [2:0] RXBUFSTATUS1;
11189    output [2:0] RXCHBONDO0;
11190    output [2:0] RXCHBONDO1;
11191    output [2:0] RXCLKCORCNT0;
11192    output [2:0] RXCLKCORCNT1;
11193    output [2:0] RXSTATUS0;
11194    output [2:0] RXSTATUS1;
11195    input CLKIN;
11196    input DCLK;
11197    input DEN;
11198    input DWE;
11199    input GTPRESET;
11200    input INTDATAWIDTH;
11201    input PLLLKDETEN;
11202    input PLLPOWERDOWN;
11203    input PRBSCNTRESET0;
11204    input PRBSCNTRESET1;
11205    input REFCLKPWRDNB;
11206    input RXBUFRESET0;
11207    input RXBUFRESET1;
11208    input RXCDRRESET0;
11209    input RXCDRRESET1;
11210    input RXCOMMADETUSE0;
11211    input RXCOMMADETUSE1;
11212    input RXDATAWIDTH0;
11213    input RXDATAWIDTH1;
11214    input RXDEC8B10BUSE0;
11215    input RXDEC8B10BUSE1;
11216    input RXELECIDLERESET0;
11217    input RXELECIDLERESET1;
11218    input RXENCHANSYNC0;
11219    input RXENCHANSYNC1;
11220    input RXENELECIDLERESETB;
11221    input RXENEQB0;
11222    input RXENEQB1;
11223    input RXENMCOMMAALIGN0;
11224    input RXENMCOMMAALIGN1;
11225    input RXENPCOMMAALIGN0;
11226    input RXENPCOMMAALIGN1;
11227    input RXENSAMPLEALIGN0;
11228    input RXENSAMPLEALIGN1;
11229    input RXN0;
11230    input RXN1;
11231    input RXP0;
11232    input RXP1;
11233    input RXPMASETPHASE0;
11234    input RXPMASETPHASE1;
11235    input RXPOLARITY0;
11236    input RXPOLARITY1;
11237    input RXRESET0;
11238    input RXRESET1;
11239    input RXSLIDE0;
11240    input RXSLIDE1;
11241    input RXUSRCLK0;
11242    input RXUSRCLK1;
11243    input RXUSRCLK20;
11244    input RXUSRCLK21;
11245    input TXCOMSTART0;
11246    input TXCOMSTART1;
11247    input TXCOMTYPE0;
11248    input TXCOMTYPE1;
11249    input TXDATAWIDTH0;
11250    input TXDATAWIDTH1;
11251    input TXDETECTRX0;
11252    input TXDETECTRX1;
11253    input TXELECIDLE0;
11254    input TXELECIDLE1;
11255    input TXENC8B10BUSE0;
11256    input TXENC8B10BUSE1;
11257    input TXENPMAPHASEALIGN;
11258    input TXINHIBIT0;
11259    input TXINHIBIT1;
11260    input TXPMASETPHASE;
11261    input TXPOLARITY0;
11262    input TXPOLARITY1;
11263    input TXRESET0;
11264    input TXRESET1;
11265    input TXUSRCLK0;
11266    input TXUSRCLK1;
11267    input TXUSRCLK20;
11268    input TXUSRCLK21;
11269    input [15:0] DI;
11270    input [15:0] TXDATA0;
11271    input [15:0] TXDATA1;
11272    input [1:0] RXENPRBSTST0;
11273    input [1:0] RXENPRBSTST1;
11274    input [1:0] RXEQMIX0;
11275    input [1:0] RXEQMIX1;
11276    input [1:0] RXPOWERDOWN0;
11277    input [1:0] RXPOWERDOWN1;
11278    input [1:0] TXBYPASS8B10B0;
11279    input [1:0] TXBYPASS8B10B1;
11280    input [1:0] TXCHARDISPMODE0;
11281    input [1:0] TXCHARDISPMODE1;
11282    input [1:0] TXCHARDISPVAL0;
11283    input [1:0] TXCHARDISPVAL1;
11284    input [1:0] TXCHARISK0;
11285    input [1:0] TXCHARISK1;
11286    input [1:0] TXENPRBSTST0;
11287    input [1:0] TXENPRBSTST1;
11288    input [1:0] TXPOWERDOWN0;
11289    input [1:0] TXPOWERDOWN1;
11290    input [2:0] LOOPBACK0;
11291    input [2:0] LOOPBACK1;
11292    input [2:0] RXCHBONDI0;
11293    input [2:0] RXCHBONDI1;
11294    input [2:0] TXBUFDIFFCTRL0;
11295    input [2:0] TXBUFDIFFCTRL1;
11296    input [2:0] TXDIFFCTRL0;
11297    input [2:0] TXDIFFCTRL1;
11298    input [2:0] TXPREEMPHASIS0;
11299    input [2:0] TXPREEMPHASIS1;
11300    input [3:0] GTPTEST;
11301    input [3:0] RXEQPOLE0;
11302    input [3:0] RXEQPOLE1;
11303    input [6:0] DADDR;
11304endmodule
11305
11306module GTX_DUAL (...);
11307    parameter STEPPING = "0";
11308    parameter AC_CAP_DIS_0 = "TRUE";
11309    parameter AC_CAP_DIS_1 = "TRUE";
11310    parameter CHAN_BOND_KEEP_ALIGN_0 = "FALSE";
11311    parameter CHAN_BOND_KEEP_ALIGN_1 = "FALSE";
11312    parameter CHAN_BOND_MODE_0 = "OFF";
11313    parameter CHAN_BOND_MODE_1 = "OFF";
11314    parameter CHAN_BOND_SEQ_2_USE_0 = "TRUE";
11315    parameter CHAN_BOND_SEQ_2_USE_1 = "TRUE";
11316    parameter CLKINDC_B = "TRUE";
11317    parameter CLKRCV_TRST = "FALSE";
11318    parameter CLK_CORRECT_USE_0 = "TRUE";
11319    parameter CLK_CORRECT_USE_1 = "TRUE";
11320    parameter CLK_COR_INSERT_IDLE_FLAG_0 = "FALSE";
11321    parameter CLK_COR_INSERT_IDLE_FLAG_1 = "FALSE";
11322    parameter CLK_COR_KEEP_IDLE_0 = "FALSE";
11323    parameter CLK_COR_KEEP_IDLE_1 = "FALSE";
11324    parameter CLK_COR_PRECEDENCE_0 = "TRUE";
11325    parameter CLK_COR_PRECEDENCE_1 = "TRUE";
11326    parameter CLK_COR_SEQ_2_USE_0 = "FALSE";
11327    parameter CLK_COR_SEQ_2_USE_1 = "FALSE";
11328    parameter COMMA_DOUBLE_0 = "FALSE";
11329    parameter COMMA_DOUBLE_1 = "FALSE";
11330    parameter DEC_MCOMMA_DETECT_0 = "TRUE";
11331    parameter DEC_MCOMMA_DETECT_1 = "TRUE";
11332    parameter DEC_PCOMMA_DETECT_0 = "TRUE";
11333    parameter DEC_PCOMMA_DETECT_1 = "TRUE";
11334    parameter DEC_VALID_COMMA_ONLY_0 = "TRUE";
11335    parameter DEC_VALID_COMMA_ONLY_1 = "TRUE";
11336    parameter MCOMMA_DETECT_0 = "TRUE";
11337    parameter MCOMMA_DETECT_1 = "TRUE";
11338    parameter OVERSAMPLE_MODE = "FALSE";
11339    parameter PCI_EXPRESS_MODE_0 = "TRUE";
11340    parameter PCI_EXPRESS_MODE_1 = "TRUE";
11341    parameter PCOMMA_DETECT_0 = "TRUE";
11342    parameter PCOMMA_DETECT_1 = "TRUE";
11343    parameter PLL_FB_DCCEN = "FALSE";
11344    parameter PLL_SATA_0 = "FALSE";
11345    parameter PLL_SATA_1 = "FALSE";
11346    parameter RCV_TERM_GND_0 = "TRUE";
11347    parameter RCV_TERM_GND_1 = "TRUE";
11348    parameter RCV_TERM_VTTRX_0 = "FALSE";
11349    parameter RCV_TERM_VTTRX_1 = "FALSE";
11350    parameter RXGEARBOX_USE_0 = "FALSE";
11351    parameter RXGEARBOX_USE_1 = "FALSE";
11352    parameter RX_BUFFER_USE_0 = "TRUE";
11353    parameter RX_BUFFER_USE_1 = "TRUE";
11354    parameter RX_DECODE_SEQ_MATCH_0 = "TRUE";
11355    parameter RX_DECODE_SEQ_MATCH_1 = "TRUE";
11356    parameter RX_EN_IDLE_HOLD_CDR = "FALSE";
11357    parameter RX_EN_IDLE_HOLD_DFE_0 = "TRUE";
11358    parameter RX_EN_IDLE_HOLD_DFE_1 = "TRUE";
11359    parameter RX_EN_IDLE_RESET_BUF_0 = "TRUE";
11360    parameter RX_EN_IDLE_RESET_BUF_1 = "TRUE";
11361    parameter RX_EN_IDLE_RESET_FR = "TRUE";
11362    parameter RX_EN_IDLE_RESET_PH = "TRUE";
11363    parameter RX_LOSS_OF_SYNC_FSM_0 = "FALSE";
11364    parameter RX_LOSS_OF_SYNC_FSM_1 = "FALSE";
11365    parameter RX_SLIDE_MODE_0 = "PCS";
11366    parameter RX_SLIDE_MODE_1 = "PCS";
11367    parameter RX_STATUS_FMT_0 = "PCIE";
11368    parameter RX_STATUS_FMT_1 = "PCIE";
11369    parameter RX_XCLK_SEL_0 = "RXREC";
11370    parameter RX_XCLK_SEL_1 = "RXREC";
11371    parameter SIM_PLL_PERDIV2 = 9'h190;
11372    parameter SIM_RECEIVER_DETECT_PASS_0 = "FALSE";
11373    parameter SIM_RECEIVER_DETECT_PASS_1 = "FALSE";
11374    parameter TERMINATION_OVRD = "FALSE";
11375    parameter TXGEARBOX_USE_0 = "FALSE";
11376    parameter TXGEARBOX_USE_1 = "FALSE";
11377    parameter TX_BUFFER_USE_0 = "TRUE";
11378    parameter TX_BUFFER_USE_1 = "TRUE";
11379    parameter TX_XCLK_SEL_0 = "TXUSR";
11380    parameter TX_XCLK_SEL_1 = "TXUSR";
11381    parameter [11:0] TRANS_TIME_FROM_P2_0 = 12'h03c;
11382    parameter [11:0] TRANS_TIME_FROM_P2_1 = 12'h03c;
11383    parameter [13:0] TX_DETECT_RX_CFG_0 = 14'h1832;
11384    parameter [13:0] TX_DETECT_RX_CFG_1 = 14'h1832;
11385    parameter [19:0] PMA_TX_CFG_0 = 20'h00082;
11386    parameter [19:0] PMA_TX_CFG_1 = 20'h00082;
11387    parameter [1:0] CM_TRIM_0 = 2'b10;
11388    parameter [1:0] CM_TRIM_1 = 2'b10;
11389    parameter [23:0] PLL_COM_CFG = 24'h21680a;
11390    parameter [24:0] PMA_RX_CFG_0 = 25'h05ce109;
11391    parameter [24:0] PMA_RX_CFG_1 = 25'h05ce109;
11392    parameter [26:0] PMA_CDR_SCAN_0 = 27'h6c08040;
11393    parameter [26:0] PMA_CDR_SCAN_1 = 27'h6c08040;
11394    parameter [2:0] GEARBOX_ENDEC_0 = 3'b000;
11395    parameter [2:0] GEARBOX_ENDEC_1 = 3'b000;
11396    parameter [2:0] OOBDETECT_THRESHOLD_0 = 3'b111;
11397    parameter [2:0] OOBDETECT_THRESHOLD_1 = 3'b111;
11398    parameter [2:0] PLL_LKDET_CFG = 3'b111;
11399    parameter [2:0] PLL_TDCC_CFG = 3'b000;
11400    parameter [2:0] SATA_BURST_VAL_0 = 3'b100;
11401    parameter [2:0] SATA_BURST_VAL_1 = 3'b100;
11402    parameter [2:0] SATA_IDLE_VAL_0 = 3'b011;
11403    parameter [2:0] SATA_IDLE_VAL_1 = 3'b011;
11404    parameter [2:0] TXRX_INVERT_0 = 3'b000;
11405    parameter [2:0] TXRX_INVERT_1 = 3'b000;
11406    parameter [2:0] TX_IDLE_DELAY_0 = 3'b010;
11407    parameter [2:0] TX_IDLE_DELAY_1 = 3'b010;
11408    parameter [31:0] PRBS_ERR_THRESHOLD_0 = 32'h1;
11409    parameter [31:0] PRBS_ERR_THRESHOLD_1 = 32'h1;
11410    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_0 = 4'b1111;
11411    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE_1 = 4'b1111;
11412    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_0 = 4'b1111;
11413    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE_1 = 4'b1111;
11414    parameter [3:0] CLK_COR_SEQ_1_ENABLE_0 = 4'b1111;
11415    parameter [3:0] CLK_COR_SEQ_1_ENABLE_1 = 4'b1111;
11416    parameter [3:0] CLK_COR_SEQ_2_ENABLE_0 = 4'b1111;
11417    parameter [3:0] CLK_COR_SEQ_2_ENABLE_1 = 4'b1111;
11418    parameter [3:0] COM_BURST_VAL_0 = 4'b1111;
11419    parameter [3:0] COM_BURST_VAL_1 = 4'b1111;
11420    parameter [3:0] RX_IDLE_HI_CNT_0 = 4'b1000;
11421    parameter [3:0] RX_IDLE_HI_CNT_1 = 4'b1000;
11422    parameter [3:0] RX_IDLE_LO_CNT_0 = 4'b0000;
11423    parameter [3:0] RX_IDLE_LO_CNT_1 = 4'b0000;
11424    parameter [4:0] CDR_PH_ADJ_TIME = 5'b01010;
11425    parameter [4:0] DFE_CAL_TIME = 5'b00110;
11426    parameter [4:0] TERMINATION_CTRL = 5'b10100;
11427    parameter [68:0] PMA_COM_CFG = 69'h0;
11428    parameter [6:0] PMA_RXSYNC_CFG_0 = 7'h0;
11429    parameter [6:0] PMA_RXSYNC_CFG_1 = 7'h0;
11430    parameter [7:0] PLL_CP_CFG = 8'h00;
11431    parameter [7:0] TRANS_TIME_NON_P2_0 = 8'h19;
11432    parameter [7:0] TRANS_TIME_NON_P2_1 = 8'h19;
11433    parameter [9:0] CHAN_BOND_SEQ_1_1_0 = 10'b0001001010;
11434    parameter [9:0] CHAN_BOND_SEQ_1_1_1 = 10'b0001001010;
11435    parameter [9:0] CHAN_BOND_SEQ_1_2_0 = 10'b0001001010;
11436    parameter [9:0] CHAN_BOND_SEQ_1_2_1 = 10'b0001001010;
11437    parameter [9:0] CHAN_BOND_SEQ_1_3_0 = 10'b0001001010;
11438    parameter [9:0] CHAN_BOND_SEQ_1_3_1 = 10'b0001001010;
11439    parameter [9:0] CHAN_BOND_SEQ_1_4_0 = 10'b0110111100;
11440    parameter [9:0] CHAN_BOND_SEQ_1_4_1 = 10'b0110111100;
11441    parameter [9:0] CHAN_BOND_SEQ_2_1_0 = 10'b0110111100;
11442    parameter [9:0] CHAN_BOND_SEQ_2_1_1 = 10'b0110111100;
11443    parameter [9:0] CHAN_BOND_SEQ_2_2_0 = 10'b0100111100;
11444    parameter [9:0] CHAN_BOND_SEQ_2_2_1 = 10'b0100111100;
11445    parameter [9:0] CHAN_BOND_SEQ_2_3_0 = 10'b0100111100;
11446    parameter [9:0] CHAN_BOND_SEQ_2_3_1 = 10'b0100111100;
11447    parameter [9:0] CHAN_BOND_SEQ_2_4_0 = 10'b0100111100;
11448    parameter [9:0] CHAN_BOND_SEQ_2_4_1 = 10'b0100111100;
11449    parameter [9:0] CLK_COR_SEQ_1_1_0 = 10'b0100011100;
11450    parameter [9:0] CLK_COR_SEQ_1_1_1 = 10'b0100011100;
11451    parameter [9:0] CLK_COR_SEQ_1_2_0 = 10'b0;
11452    parameter [9:0] CLK_COR_SEQ_1_2_1 = 10'b0;
11453    parameter [9:0] CLK_COR_SEQ_1_3_0 = 10'b0;
11454    parameter [9:0] CLK_COR_SEQ_1_3_1 = 10'b0;
11455    parameter [9:0] CLK_COR_SEQ_1_4_0 = 10'b0;
11456    parameter [9:0] CLK_COR_SEQ_1_4_1 = 10'b0;
11457    parameter [9:0] CLK_COR_SEQ_2_1_0 = 10'b0;
11458    parameter [9:0] CLK_COR_SEQ_2_1_1 = 10'b0;
11459    parameter [9:0] CLK_COR_SEQ_2_2_0 = 10'b0;
11460    parameter [9:0] CLK_COR_SEQ_2_2_1 = 10'b0;
11461    parameter [9:0] CLK_COR_SEQ_2_3_0 = 10'b0;
11462    parameter [9:0] CLK_COR_SEQ_2_3_1 = 10'b0;
11463    parameter [9:0] CLK_COR_SEQ_2_4_0 = 10'b0;
11464    parameter [9:0] CLK_COR_SEQ_2_4_1 = 10'b0;
11465    parameter [9:0] COMMA_10B_ENABLE_0 = 10'b1111111111;
11466    parameter [9:0] COMMA_10B_ENABLE_1 = 10'b1111111111;
11467    parameter [9:0] DFE_CFG_0 = 10'b0001111011;
11468    parameter [9:0] DFE_CFG_1 = 10'b0001111011;
11469    parameter [9:0] MCOMMA_10B_VALUE_0 = 10'b1010000011;
11470    parameter [9:0] MCOMMA_10B_VALUE_1 = 10'b1010000011;
11471    parameter [9:0] PCOMMA_10B_VALUE_0 = 10'b0101111100;
11472    parameter [9:0] PCOMMA_10B_VALUE_1 = 10'b0101111100;
11473    parameter [9:0] TRANS_TIME_TO_P2_0 = 10'h064;
11474    parameter [9:0] TRANS_TIME_TO_P2_1 = 10'h064;
11475    parameter ALIGN_COMMA_WORD_0 = 1;
11476    parameter ALIGN_COMMA_WORD_1 = 1;
11477    parameter CB2_INH_CC_PERIOD_0 = 8;
11478    parameter CB2_INH_CC_PERIOD_1 = 8;
11479    parameter CHAN_BOND_1_MAX_SKEW_0 = 7;
11480    parameter CHAN_BOND_1_MAX_SKEW_1 = 7;
11481    parameter CHAN_BOND_2_MAX_SKEW_0 = 1;
11482    parameter CHAN_BOND_2_MAX_SKEW_1 = 1;
11483    parameter CHAN_BOND_LEVEL_0 = 0;
11484    parameter CHAN_BOND_LEVEL_1 = 0;
11485    parameter CHAN_BOND_SEQ_LEN_0 = 4;
11486    parameter CHAN_BOND_SEQ_LEN_1 = 4;
11487    parameter CLK25_DIVIDER = 4;
11488    parameter CLK_COR_ADJ_LEN_0 = 1;
11489    parameter CLK_COR_ADJ_LEN_1 = 1;
11490    parameter CLK_COR_DET_LEN_0 = 1;
11491    parameter CLK_COR_DET_LEN_1 = 1;
11492    parameter CLK_COR_MAX_LAT_0 = 18;
11493    parameter CLK_COR_MAX_LAT_1 = 18;
11494    parameter CLK_COR_MIN_LAT_0 = 16;
11495    parameter CLK_COR_MIN_LAT_1 = 16;
11496    parameter CLK_COR_REPEAT_WAIT_0 = 5;
11497    parameter CLK_COR_REPEAT_WAIT_1 = 5;
11498    parameter OOB_CLK_DIVIDER = 4;
11499    parameter PLL_DIVSEL_FB = 5;
11500    parameter PLL_DIVSEL_REF = 2;
11501    parameter PLL_RXDIVSEL_OUT_0 = 1;
11502    parameter PLL_RXDIVSEL_OUT_1 = 1;
11503    parameter PLL_TXDIVSEL_OUT_0 = 1;
11504    parameter PLL_TXDIVSEL_OUT_1 = 1;
11505    parameter RX_LOS_INVALID_INCR_0 = 8;
11506    parameter RX_LOS_INVALID_INCR_1 = 8;
11507    parameter RX_LOS_THRESHOLD_0 = 128;
11508    parameter RX_LOS_THRESHOLD_1 = 128;
11509    parameter SATA_MAX_BURST_0 = 7;
11510    parameter SATA_MAX_BURST_1 = 7;
11511    parameter SATA_MAX_INIT_0 = 22;
11512    parameter SATA_MAX_INIT_1 = 22;
11513    parameter SATA_MAX_WAKE_0 = 7;
11514    parameter SATA_MAX_WAKE_1 = 7;
11515    parameter SATA_MIN_BURST_0 = 4;
11516    parameter SATA_MIN_BURST_1 = 4;
11517    parameter SATA_MIN_INIT_0 = 12;
11518    parameter SATA_MIN_INIT_1 = 12;
11519    parameter SATA_MIN_WAKE_0 = 4;
11520    parameter SATA_MIN_WAKE_1 = 4;
11521    parameter SIM_GTXRESET_SPEEDUP = 0;
11522    parameter TERMINATION_IMP_0 = 50;
11523    parameter TERMINATION_IMP_1 = 50;
11524    output DRDY;
11525    output PHYSTATUS0;
11526    output PHYSTATUS1;
11527    output PLLLKDET;
11528    output REFCLKOUT;
11529    output RESETDONE0;
11530    output RESETDONE1;
11531    output RXBYTEISALIGNED0;
11532    output RXBYTEISALIGNED1;
11533    output RXBYTEREALIGN0;
11534    output RXBYTEREALIGN1;
11535    output RXCHANBONDSEQ0;
11536    output RXCHANBONDSEQ1;
11537    output RXCHANISALIGNED0;
11538    output RXCHANISALIGNED1;
11539    output RXCHANREALIGN0;
11540    output RXCHANREALIGN1;
11541    output RXCOMMADET0;
11542    output RXCOMMADET1;
11543    output RXDATAVALID0;
11544    output RXDATAVALID1;
11545    output RXELECIDLE0;
11546    output RXELECIDLE1;
11547    output RXHEADERVALID0;
11548    output RXHEADERVALID1;
11549    output RXOVERSAMPLEERR0;
11550    output RXOVERSAMPLEERR1;
11551    output RXPRBSERR0;
11552    output RXPRBSERR1;
11553    output RXRECCLK0;
11554    output RXRECCLK1;
11555    output RXSTARTOFSEQ0;
11556    output RXSTARTOFSEQ1;
11557    output RXVALID0;
11558    output RXVALID1;
11559    output TXGEARBOXREADY0;
11560    output TXGEARBOXREADY1;
11561    output TXN0;
11562    output TXN1;
11563    output TXOUTCLK0;
11564    output TXOUTCLK1;
11565    output TXP0;
11566    output TXP1;
11567    output [15:0] DO;
11568    output [1:0] RXLOSSOFSYNC0;
11569    output [1:0] RXLOSSOFSYNC1;
11570    output [1:0] TXBUFSTATUS0;
11571    output [1:0] TXBUFSTATUS1;
11572    output [2:0] DFESENSCAL0;
11573    output [2:0] DFESENSCAL1;
11574    output [2:0] RXBUFSTATUS0;
11575    output [2:0] RXBUFSTATUS1;
11576    output [2:0] RXCLKCORCNT0;
11577    output [2:0] RXCLKCORCNT1;
11578    output [2:0] RXHEADER0;
11579    output [2:0] RXHEADER1;
11580    output [2:0] RXSTATUS0;
11581    output [2:0] RXSTATUS1;
11582    output [31:0] RXDATA0;
11583    output [31:0] RXDATA1;
11584    output [3:0] DFETAP3MONITOR0;
11585    output [3:0] DFETAP3MONITOR1;
11586    output [3:0] DFETAP4MONITOR0;
11587    output [3:0] DFETAP4MONITOR1;
11588    output [3:0] RXCHARISCOMMA0;
11589    output [3:0] RXCHARISCOMMA1;
11590    output [3:0] RXCHARISK0;
11591    output [3:0] RXCHARISK1;
11592    output [3:0] RXCHBONDO0;
11593    output [3:0] RXCHBONDO1;
11594    output [3:0] RXDISPERR0;
11595    output [3:0] RXDISPERR1;
11596    output [3:0] RXNOTINTABLE0;
11597    output [3:0] RXNOTINTABLE1;
11598    output [3:0] RXRUNDISP0;
11599    output [3:0] RXRUNDISP1;
11600    output [3:0] TXKERR0;
11601    output [3:0] TXKERR1;
11602    output [3:0] TXRUNDISP0;
11603    output [3:0] TXRUNDISP1;
11604    output [4:0] DFEEYEDACMONITOR0;
11605    output [4:0] DFEEYEDACMONITOR1;
11606    output [4:0] DFETAP1MONITOR0;
11607    output [4:0] DFETAP1MONITOR1;
11608    output [4:0] DFETAP2MONITOR0;
11609    output [4:0] DFETAP2MONITOR1;
11610    output [5:0] DFECLKDLYADJMONITOR0;
11611    output [5:0] DFECLKDLYADJMONITOR1;
11612    input CLKIN;
11613    input DCLK;
11614    input DEN;
11615    input DWE;
11616    input GTXRESET;
11617    input INTDATAWIDTH;
11618    input PLLLKDETEN;
11619    input PLLPOWERDOWN;
11620    input PRBSCNTRESET0;
11621    input PRBSCNTRESET1;
11622    input REFCLKPWRDNB;
11623    input RXBUFRESET0;
11624    input RXBUFRESET1;
11625    input RXCDRRESET0;
11626    input RXCDRRESET1;
11627    input RXCOMMADETUSE0;
11628    input RXCOMMADETUSE1;
11629    input RXDEC8B10BUSE0;
11630    input RXDEC8B10BUSE1;
11631    input RXENCHANSYNC0;
11632    input RXENCHANSYNC1;
11633    input RXENEQB0;
11634    input RXENEQB1;
11635    input RXENMCOMMAALIGN0;
11636    input RXENMCOMMAALIGN1;
11637    input RXENPCOMMAALIGN0;
11638    input RXENPCOMMAALIGN1;
11639    input RXENPMAPHASEALIGN0;
11640    input RXENPMAPHASEALIGN1;
11641    input RXENSAMPLEALIGN0;
11642    input RXENSAMPLEALIGN1;
11643    input RXGEARBOXSLIP0;
11644    input RXGEARBOXSLIP1;
11645    input RXN0;
11646    input RXN1;
11647    input RXP0;
11648    input RXP1;
11649    input RXPMASETPHASE0;
11650    input RXPMASETPHASE1;
11651    input RXPOLARITY0;
11652    input RXPOLARITY1;
11653    input RXRESET0;
11654    input RXRESET1;
11655    input RXSLIDE0;
11656    input RXSLIDE1;
11657    input RXUSRCLK0;
11658    input RXUSRCLK1;
11659    input RXUSRCLK20;
11660    input RXUSRCLK21;
11661    input TXCOMSTART0;
11662    input TXCOMSTART1;
11663    input TXCOMTYPE0;
11664    input TXCOMTYPE1;
11665    input TXDETECTRX0;
11666    input TXDETECTRX1;
11667    input TXELECIDLE0;
11668    input TXELECIDLE1;
11669    input TXENC8B10BUSE0;
11670    input TXENC8B10BUSE1;
11671    input TXENPMAPHASEALIGN0;
11672    input TXENPMAPHASEALIGN1;
11673    input TXINHIBIT0;
11674    input TXINHIBIT1;
11675    input TXPMASETPHASE0;
11676    input TXPMASETPHASE1;
11677    input TXPOLARITY0;
11678    input TXPOLARITY1;
11679    input TXRESET0;
11680    input TXRESET1;
11681    input TXSTARTSEQ0;
11682    input TXSTARTSEQ1;
11683    input TXUSRCLK0;
11684    input TXUSRCLK1;
11685    input TXUSRCLK20;
11686    input TXUSRCLK21;
11687    input [13:0] GTXTEST;
11688    input [15:0] DI;
11689    input [1:0] RXDATAWIDTH0;
11690    input [1:0] RXDATAWIDTH1;
11691    input [1:0] RXENPRBSTST0;
11692    input [1:0] RXENPRBSTST1;
11693    input [1:0] RXEQMIX0;
11694    input [1:0] RXEQMIX1;
11695    input [1:0] RXPOWERDOWN0;
11696    input [1:0] RXPOWERDOWN1;
11697    input [1:0] TXDATAWIDTH0;
11698    input [1:0] TXDATAWIDTH1;
11699    input [1:0] TXENPRBSTST0;
11700    input [1:0] TXENPRBSTST1;
11701    input [1:0] TXPOWERDOWN0;
11702    input [1:0] TXPOWERDOWN1;
11703    input [2:0] LOOPBACK0;
11704    input [2:0] LOOPBACK1;
11705    input [2:0] TXBUFDIFFCTRL0;
11706    input [2:0] TXBUFDIFFCTRL1;
11707    input [2:0] TXDIFFCTRL0;
11708    input [2:0] TXDIFFCTRL1;
11709    input [2:0] TXHEADER0;
11710    input [2:0] TXHEADER1;
11711    input [31:0] TXDATA0;
11712    input [31:0] TXDATA1;
11713    input [3:0] DFETAP30;
11714    input [3:0] DFETAP31;
11715    input [3:0] DFETAP40;
11716    input [3:0] DFETAP41;
11717    input [3:0] RXCHBONDI0;
11718    input [3:0] RXCHBONDI1;
11719    input [3:0] RXEQPOLE0;
11720    input [3:0] RXEQPOLE1;
11721    input [3:0] TXBYPASS8B10B0;
11722    input [3:0] TXBYPASS8B10B1;
11723    input [3:0] TXCHARDISPMODE0;
11724    input [3:0] TXCHARDISPMODE1;
11725    input [3:0] TXCHARDISPVAL0;
11726    input [3:0] TXCHARDISPVAL1;
11727    input [3:0] TXCHARISK0;
11728    input [3:0] TXCHARISK1;
11729    input [3:0] TXPREEMPHASIS0;
11730    input [3:0] TXPREEMPHASIS1;
11731    input [4:0] DFETAP10;
11732    input [4:0] DFETAP11;
11733    input [4:0] DFETAP20;
11734    input [4:0] DFETAP21;
11735    input [5:0] DFECLKDLYADJ0;
11736    input [5:0] DFECLKDLYADJ1;
11737    input [6:0] DADDR;
11738    input [6:0] TXSEQUENCE0;
11739    input [6:0] TXSEQUENCE1;
11740endmodule
11741
11742module CRC32 (...);
11743    parameter CRC_INIT = 32'hFFFFFFFF;
11744    output [31:0] CRCOUT;
11745    (* clkbuf_sink *)
11746    input CRCCLK;
11747    input CRCDATAVALID;
11748    input [2:0] CRCDATAWIDTH;
11749    input [31:0] CRCIN;
11750    input CRCRESET;
11751endmodule
11752
11753module CRC64 (...);
11754    parameter CRC_INIT = 32'hFFFFFFFF;
11755    output [31:0] CRCOUT;
11756    (* clkbuf_sink *)
11757    input CRCCLK;
11758    input CRCDATAVALID;
11759    input [2:0] CRCDATAWIDTH;
11760    input [63:0] CRCIN;
11761    input CRCRESET;
11762endmodule
11763
11764module GTHE1_QUAD (...);
11765    parameter [15:0] BER_CONST_PTRN0 = 16'h0000;
11766    parameter [15:0] BER_CONST_PTRN1 = 16'h0000;
11767    parameter [15:0] BUFFER_CONFIG_LANE0 = 16'h4004;
11768    parameter [15:0] BUFFER_CONFIG_LANE1 = 16'h4004;
11769    parameter [15:0] BUFFER_CONFIG_LANE2 = 16'h4004;
11770    parameter [15:0] BUFFER_CONFIG_LANE3 = 16'h4004;
11771    parameter [15:0] DFE_TRAIN_CTRL_LANE0 = 16'h0000;
11772    parameter [15:0] DFE_TRAIN_CTRL_LANE1 = 16'h0000;
11773    parameter [15:0] DFE_TRAIN_CTRL_LANE2 = 16'h0000;
11774    parameter [15:0] DFE_TRAIN_CTRL_LANE3 = 16'h0000;
11775    parameter [15:0] DLL_CFG0 = 16'h8202;
11776    parameter [15:0] DLL_CFG1 = 16'h0000;
11777    parameter [15:0] E10GBASEKR_LD_COEFF_UPD_LANE0 = 16'h0000;
11778    parameter [15:0] E10GBASEKR_LD_COEFF_UPD_LANE1 = 16'h0000;
11779    parameter [15:0] E10GBASEKR_LD_COEFF_UPD_LANE2 = 16'h0000;
11780    parameter [15:0] E10GBASEKR_LD_COEFF_UPD_LANE3 = 16'h0000;
11781    parameter [15:0] E10GBASEKR_LP_COEFF_UPD_LANE0 = 16'h0000;
11782    parameter [15:0] E10GBASEKR_LP_COEFF_UPD_LANE1 = 16'h0000;
11783    parameter [15:0] E10GBASEKR_LP_COEFF_UPD_LANE2 = 16'h0000;
11784    parameter [15:0] E10GBASEKR_LP_COEFF_UPD_LANE3 = 16'h0000;
11785    parameter [15:0] E10GBASEKR_PMA_CTRL_LANE0 = 16'h0002;
11786    parameter [15:0] E10GBASEKR_PMA_CTRL_LANE1 = 16'h0002;
11787    parameter [15:0] E10GBASEKR_PMA_CTRL_LANE2 = 16'h0002;
11788    parameter [15:0] E10GBASEKR_PMA_CTRL_LANE3 = 16'h0002;
11789    parameter [15:0] E10GBASEKX_CTRL_LANE0 = 16'h0000;
11790    parameter [15:0] E10GBASEKX_CTRL_LANE1 = 16'h0000;
11791    parameter [15:0] E10GBASEKX_CTRL_LANE2 = 16'h0000;
11792    parameter [15:0] E10GBASEKX_CTRL_LANE3 = 16'h0000;
11793    parameter [15:0] E10GBASER_PCS_CFG_LANE0 = 16'h070C;
11794    parameter [15:0] E10GBASER_PCS_CFG_LANE1 = 16'h070C;
11795    parameter [15:0] E10GBASER_PCS_CFG_LANE2 = 16'h070C;
11796    parameter [15:0] E10GBASER_PCS_CFG_LANE3 = 16'h070C;
11797    parameter [15:0] E10GBASER_PCS_SEEDA0_LANE0 = 16'h0001;
11798    parameter [15:0] E10GBASER_PCS_SEEDA0_LANE1 = 16'h0001;
11799    parameter [15:0] E10GBASER_PCS_SEEDA0_LANE2 = 16'h0001;
11800    parameter [15:0] E10GBASER_PCS_SEEDA0_LANE3 = 16'h0001;
11801    parameter [15:0] E10GBASER_PCS_SEEDA1_LANE0 = 16'h0000;
11802    parameter [15:0] E10GBASER_PCS_SEEDA1_LANE1 = 16'h0000;
11803    parameter [15:0] E10GBASER_PCS_SEEDA1_LANE2 = 16'h0000;
11804    parameter [15:0] E10GBASER_PCS_SEEDA1_LANE3 = 16'h0000;
11805    parameter [15:0] E10GBASER_PCS_SEEDA2_LANE0 = 16'h0000;
11806    parameter [15:0] E10GBASER_PCS_SEEDA2_LANE1 = 16'h0000;
11807    parameter [15:0] E10GBASER_PCS_SEEDA2_LANE2 = 16'h0000;
11808    parameter [15:0] E10GBASER_PCS_SEEDA2_LANE3 = 16'h0000;
11809    parameter [15:0] E10GBASER_PCS_SEEDA3_LANE0 = 16'h0000;
11810    parameter [15:0] E10GBASER_PCS_SEEDA3_LANE1 = 16'h0000;
11811    parameter [15:0] E10GBASER_PCS_SEEDA3_LANE2 = 16'h0000;
11812    parameter [15:0] E10GBASER_PCS_SEEDA3_LANE3 = 16'h0000;
11813    parameter [15:0] E10GBASER_PCS_SEEDB0_LANE0 = 16'h0001;
11814    parameter [15:0] E10GBASER_PCS_SEEDB0_LANE1 = 16'h0001;
11815    parameter [15:0] E10GBASER_PCS_SEEDB0_LANE2 = 16'h0001;
11816    parameter [15:0] E10GBASER_PCS_SEEDB0_LANE3 = 16'h0001;
11817    parameter [15:0] E10GBASER_PCS_SEEDB1_LANE0 = 16'h0000;
11818    parameter [15:0] E10GBASER_PCS_SEEDB1_LANE1 = 16'h0000;
11819    parameter [15:0] E10GBASER_PCS_SEEDB1_LANE2 = 16'h0000;
11820    parameter [15:0] E10GBASER_PCS_SEEDB1_LANE3 = 16'h0000;
11821    parameter [15:0] E10GBASER_PCS_SEEDB2_LANE0 = 16'h0000;
11822    parameter [15:0] E10GBASER_PCS_SEEDB2_LANE1 = 16'h0000;
11823    parameter [15:0] E10GBASER_PCS_SEEDB2_LANE2 = 16'h0000;
11824    parameter [15:0] E10GBASER_PCS_SEEDB2_LANE3 = 16'h0000;
11825    parameter [15:0] E10GBASER_PCS_SEEDB3_LANE0 = 16'h0000;
11826    parameter [15:0] E10GBASER_PCS_SEEDB3_LANE1 = 16'h0000;
11827    parameter [15:0] E10GBASER_PCS_SEEDB3_LANE2 = 16'h0000;
11828    parameter [15:0] E10GBASER_PCS_SEEDB3_LANE3 = 16'h0000;
11829    parameter [15:0] E10GBASER_PCS_TEST_CTRL_LANE0 = 16'h0000;
11830    parameter [15:0] E10GBASER_PCS_TEST_CTRL_LANE1 = 16'h0000;
11831    parameter [15:0] E10GBASER_PCS_TEST_CTRL_LANE2 = 16'h0000;
11832    parameter [15:0] E10GBASER_PCS_TEST_CTRL_LANE3 = 16'h0000;
11833    parameter [15:0] E10GBASEX_PCS_TSTCTRL_LANE0 = 16'h0000;
11834    parameter [15:0] E10GBASEX_PCS_TSTCTRL_LANE1 = 16'h0000;
11835    parameter [15:0] E10GBASEX_PCS_TSTCTRL_LANE2 = 16'h0000;
11836    parameter [15:0] E10GBASEX_PCS_TSTCTRL_LANE3 = 16'h0000;
11837    parameter [15:0] GLBL0_NOISE_CTRL = 16'hF0B8;
11838    parameter [15:0] GLBL_AMON_SEL = 16'h0000;
11839    parameter [15:0] GLBL_DMON_SEL = 16'h0200;
11840    parameter [15:0] GLBL_PWR_CTRL = 16'h0000;
11841    parameter [0:0] GTH_CFG_PWRUP_LANE0 = 1'b1;
11842    parameter [0:0] GTH_CFG_PWRUP_LANE1 = 1'b1;
11843    parameter [0:0] GTH_CFG_PWRUP_LANE2 = 1'b1;
11844    parameter [0:0] GTH_CFG_PWRUP_LANE3 = 1'b1;
11845    parameter [15:0] LANE_AMON_SEL = 16'h00F0;
11846    parameter [15:0] LANE_DMON_SEL = 16'h0000;
11847    parameter [15:0] LANE_LNK_CFGOVRD = 16'h0000;
11848    parameter [15:0] LANE_PWR_CTRL_LANE0 = 16'h0400;
11849    parameter [15:0] LANE_PWR_CTRL_LANE1 = 16'h0400;
11850    parameter [15:0] LANE_PWR_CTRL_LANE2 = 16'h0400;
11851    parameter [15:0] LANE_PWR_CTRL_LANE3 = 16'h0400;
11852    parameter [15:0] LNK_TRN_CFG_LANE0 = 16'h0000;
11853    parameter [15:0] LNK_TRN_CFG_LANE1 = 16'h0000;
11854    parameter [15:0] LNK_TRN_CFG_LANE2 = 16'h0000;
11855    parameter [15:0] LNK_TRN_CFG_LANE3 = 16'h0000;
11856    parameter [15:0] LNK_TRN_COEFF_REQ_LANE0 = 16'h0000;
11857    parameter [15:0] LNK_TRN_COEFF_REQ_LANE1 = 16'h0000;
11858    parameter [15:0] LNK_TRN_COEFF_REQ_LANE2 = 16'h0000;
11859    parameter [15:0] LNK_TRN_COEFF_REQ_LANE3 = 16'h0000;
11860    parameter [15:0] MISC_CFG = 16'h0008;
11861    parameter [15:0] MODE_CFG1 = 16'h0000;
11862    parameter [15:0] MODE_CFG2 = 16'h0000;
11863    parameter [15:0] MODE_CFG3 = 16'h0000;
11864    parameter [15:0] MODE_CFG4 = 16'h0000;
11865    parameter [15:0] MODE_CFG5 = 16'h0000;
11866    parameter [15:0] MODE_CFG6 = 16'h0000;
11867    parameter [15:0] MODE_CFG7 = 16'h0000;
11868    parameter [15:0] PCS_ABILITY_LANE0 = 16'h0010;
11869    parameter [15:0] PCS_ABILITY_LANE1 = 16'h0010;
11870    parameter [15:0] PCS_ABILITY_LANE2 = 16'h0010;
11871    parameter [15:0] PCS_ABILITY_LANE3 = 16'h0010;
11872    parameter [15:0] PCS_CTRL1_LANE0 = 16'h2040;
11873    parameter [15:0] PCS_CTRL1_LANE1 = 16'h2040;
11874    parameter [15:0] PCS_CTRL1_LANE2 = 16'h2040;
11875    parameter [15:0] PCS_CTRL1_LANE3 = 16'h2040;
11876    parameter [15:0] PCS_CTRL2_LANE0 = 16'h0000;
11877    parameter [15:0] PCS_CTRL2_LANE1 = 16'h0000;
11878    parameter [15:0] PCS_CTRL2_LANE2 = 16'h0000;
11879    parameter [15:0] PCS_CTRL2_LANE3 = 16'h0000;
11880    parameter [15:0] PCS_MISC_CFG_0_LANE0 = 16'h1116;
11881    parameter [15:0] PCS_MISC_CFG_0_LANE1 = 16'h1116;
11882    parameter [15:0] PCS_MISC_CFG_0_LANE2 = 16'h1116;
11883    parameter [15:0] PCS_MISC_CFG_0_LANE3 = 16'h1116;
11884    parameter [15:0] PCS_MISC_CFG_1_LANE0 = 16'h0000;
11885    parameter [15:0] PCS_MISC_CFG_1_LANE1 = 16'h0000;
11886    parameter [15:0] PCS_MISC_CFG_1_LANE2 = 16'h0000;
11887    parameter [15:0] PCS_MISC_CFG_1_LANE3 = 16'h0000;
11888    parameter [15:0] PCS_MODE_LANE0 = 16'h0000;
11889    parameter [15:0] PCS_MODE_LANE1 = 16'h0000;
11890    parameter [15:0] PCS_MODE_LANE2 = 16'h0000;
11891    parameter [15:0] PCS_MODE_LANE3 = 16'h0000;
11892    parameter [15:0] PCS_RESET_1_LANE0 = 16'h0002;
11893    parameter [15:0] PCS_RESET_1_LANE1 = 16'h0002;
11894    parameter [15:0] PCS_RESET_1_LANE2 = 16'h0002;
11895    parameter [15:0] PCS_RESET_1_LANE3 = 16'h0002;
11896    parameter [15:0] PCS_RESET_LANE0 = 16'h0000;
11897    parameter [15:0] PCS_RESET_LANE1 = 16'h0000;
11898    parameter [15:0] PCS_RESET_LANE2 = 16'h0000;
11899    parameter [15:0] PCS_RESET_LANE3 = 16'h0000;
11900    parameter [15:0] PCS_TYPE_LANE0 = 16'h002C;
11901    parameter [15:0] PCS_TYPE_LANE1 = 16'h002C;
11902    parameter [15:0] PCS_TYPE_LANE2 = 16'h002C;
11903    parameter [15:0] PCS_TYPE_LANE3 = 16'h002C;
11904    parameter [15:0] PLL_CFG0 = 16'h95DF;
11905    parameter [15:0] PLL_CFG1 = 16'h81C0;
11906    parameter [15:0] PLL_CFG2 = 16'h0424;
11907    parameter [15:0] PMA_CTRL1_LANE0 = 16'h0000;
11908    parameter [15:0] PMA_CTRL1_LANE1 = 16'h0000;
11909    parameter [15:0] PMA_CTRL1_LANE2 = 16'h0000;
11910    parameter [15:0] PMA_CTRL1_LANE3 = 16'h0000;
11911    parameter [15:0] PMA_CTRL2_LANE0 = 16'h000B;
11912    parameter [15:0] PMA_CTRL2_LANE1 = 16'h000B;
11913    parameter [15:0] PMA_CTRL2_LANE2 = 16'h000B;
11914    parameter [15:0] PMA_CTRL2_LANE3 = 16'h000B;
11915    parameter [15:0] PMA_LPBK_CTRL_LANE0 = 16'h0004;
11916    parameter [15:0] PMA_LPBK_CTRL_LANE1 = 16'h0004;
11917    parameter [15:0] PMA_LPBK_CTRL_LANE2 = 16'h0004;
11918    parameter [15:0] PMA_LPBK_CTRL_LANE3 = 16'h0004;
11919    parameter [15:0] PRBS_BER_CFG0_LANE0 = 16'h0000;
11920    parameter [15:0] PRBS_BER_CFG0_LANE1 = 16'h0000;
11921    parameter [15:0] PRBS_BER_CFG0_LANE2 = 16'h0000;
11922    parameter [15:0] PRBS_BER_CFG0_LANE3 = 16'h0000;
11923    parameter [15:0] PRBS_BER_CFG1_LANE0 = 16'h0000;
11924    parameter [15:0] PRBS_BER_CFG1_LANE1 = 16'h0000;
11925    parameter [15:0] PRBS_BER_CFG1_LANE2 = 16'h0000;
11926    parameter [15:0] PRBS_BER_CFG1_LANE3 = 16'h0000;
11927    parameter [15:0] PRBS_CFG_LANE0 = 16'h000A;
11928    parameter [15:0] PRBS_CFG_LANE1 = 16'h000A;
11929    parameter [15:0] PRBS_CFG_LANE2 = 16'h000A;
11930    parameter [15:0] PRBS_CFG_LANE3 = 16'h000A;
11931    parameter [15:0] PTRN_CFG0_LSB = 16'h5555;
11932    parameter [15:0] PTRN_CFG0_MSB = 16'h5555;
11933    parameter [15:0] PTRN_LEN_CFG = 16'h001F;
11934    parameter [15:0] PWRUP_DLY = 16'h0000;
11935    parameter [15:0] RX_AEQ_VAL0_LANE0 = 16'h03C0;
11936    parameter [15:0] RX_AEQ_VAL0_LANE1 = 16'h03C0;
11937    parameter [15:0] RX_AEQ_VAL0_LANE2 = 16'h03C0;
11938    parameter [15:0] RX_AEQ_VAL0_LANE3 = 16'h03C0;
11939    parameter [15:0] RX_AEQ_VAL1_LANE0 = 16'h0000;
11940    parameter [15:0] RX_AEQ_VAL1_LANE1 = 16'h0000;
11941    parameter [15:0] RX_AEQ_VAL1_LANE2 = 16'h0000;
11942    parameter [15:0] RX_AEQ_VAL1_LANE3 = 16'h0000;
11943    parameter [15:0] RX_AGC_CTRL_LANE0 = 16'h0000;
11944    parameter [15:0] RX_AGC_CTRL_LANE1 = 16'h0000;
11945    parameter [15:0] RX_AGC_CTRL_LANE2 = 16'h0000;
11946    parameter [15:0] RX_AGC_CTRL_LANE3 = 16'h0000;
11947    parameter [15:0] RX_CDR_CTRL0_LANE0 = 16'h0005;
11948    parameter [15:0] RX_CDR_CTRL0_LANE1 = 16'h0005;
11949    parameter [15:0] RX_CDR_CTRL0_LANE2 = 16'h0005;
11950    parameter [15:0] RX_CDR_CTRL0_LANE3 = 16'h0005;
11951    parameter [15:0] RX_CDR_CTRL1_LANE0 = 16'h4200;
11952    parameter [15:0] RX_CDR_CTRL1_LANE1 = 16'h4200;
11953    parameter [15:0] RX_CDR_CTRL1_LANE2 = 16'h4200;
11954    parameter [15:0] RX_CDR_CTRL1_LANE3 = 16'h4200;
11955    parameter [15:0] RX_CDR_CTRL2_LANE0 = 16'h2000;
11956    parameter [15:0] RX_CDR_CTRL2_LANE1 = 16'h2000;
11957    parameter [15:0] RX_CDR_CTRL2_LANE2 = 16'h2000;
11958    parameter [15:0] RX_CDR_CTRL2_LANE3 = 16'h2000;
11959    parameter [15:0] RX_CFG0_LANE0 = 16'h0500;
11960    parameter [15:0] RX_CFG0_LANE1 = 16'h0500;
11961    parameter [15:0] RX_CFG0_LANE2 = 16'h0500;
11962    parameter [15:0] RX_CFG0_LANE3 = 16'h0500;
11963    parameter [15:0] RX_CFG1_LANE0 = 16'h821F;
11964    parameter [15:0] RX_CFG1_LANE1 = 16'h821F;
11965    parameter [15:0] RX_CFG1_LANE2 = 16'h821F;
11966    parameter [15:0] RX_CFG1_LANE3 = 16'h821F;
11967    parameter [15:0] RX_CFG2_LANE0 = 16'h1001;
11968    parameter [15:0] RX_CFG2_LANE1 = 16'h1001;
11969    parameter [15:0] RX_CFG2_LANE2 = 16'h1001;
11970    parameter [15:0] RX_CFG2_LANE3 = 16'h1001;
11971    parameter [15:0] RX_CTLE_CTRL_LANE0 = 16'h008F;
11972    parameter [15:0] RX_CTLE_CTRL_LANE1 = 16'h008F;
11973    parameter [15:0] RX_CTLE_CTRL_LANE2 = 16'h008F;
11974    parameter [15:0] RX_CTLE_CTRL_LANE3 = 16'h008F;
11975    parameter [15:0] RX_CTRL_OVRD_LANE0 = 16'h000C;
11976    parameter [15:0] RX_CTRL_OVRD_LANE1 = 16'h000C;
11977    parameter [15:0] RX_CTRL_OVRD_LANE2 = 16'h000C;
11978    parameter [15:0] RX_CTRL_OVRD_LANE3 = 16'h000C;
11979    parameter integer RX_FABRIC_WIDTH0 = 6466;
11980    parameter integer RX_FABRIC_WIDTH1 = 6466;
11981    parameter integer RX_FABRIC_WIDTH2 = 6466;
11982    parameter integer RX_FABRIC_WIDTH3 = 6466;
11983    parameter [15:0] RX_LOOP_CTRL_LANE0 = 16'h007F;
11984    parameter [15:0] RX_LOOP_CTRL_LANE1 = 16'h007F;
11985    parameter [15:0] RX_LOOP_CTRL_LANE2 = 16'h007F;
11986    parameter [15:0] RX_LOOP_CTRL_LANE3 = 16'h007F;
11987    parameter [15:0] RX_MVAL0_LANE0 = 16'h0000;
11988    parameter [15:0] RX_MVAL0_LANE1 = 16'h0000;
11989    parameter [15:0] RX_MVAL0_LANE2 = 16'h0000;
11990    parameter [15:0] RX_MVAL0_LANE3 = 16'h0000;
11991    parameter [15:0] RX_MVAL1_LANE0 = 16'h0000;
11992    parameter [15:0] RX_MVAL1_LANE1 = 16'h0000;
11993    parameter [15:0] RX_MVAL1_LANE2 = 16'h0000;
11994    parameter [15:0] RX_MVAL1_LANE3 = 16'h0000;
11995    parameter [15:0] RX_P0S_CTRL = 16'h1206;
11996    parameter [15:0] RX_P0_CTRL = 16'h11F0;
11997    parameter [15:0] RX_P1_CTRL = 16'h120F;
11998    parameter [15:0] RX_P2_CTRL = 16'h0E0F;
11999    parameter [15:0] RX_PI_CTRL0 = 16'hD2F0;
12000    parameter [15:0] RX_PI_CTRL1 = 16'h0080;
12001    parameter integer SIM_GTHRESET_SPEEDUP = 1;
12002    parameter SIM_VERSION = "1.0";
12003    parameter [15:0] SLICE_CFG = 16'h0000;
12004    parameter [15:0] SLICE_NOISE_CTRL_0_LANE01 = 16'h0000;
12005    parameter [15:0] SLICE_NOISE_CTRL_0_LANE23 = 16'h0000;
12006    parameter [15:0] SLICE_NOISE_CTRL_1_LANE01 = 16'h0000;
12007    parameter [15:0] SLICE_NOISE_CTRL_1_LANE23 = 16'h0000;
12008    parameter [15:0] SLICE_NOISE_CTRL_2_LANE01 = 16'h7FFF;
12009    parameter [15:0] SLICE_NOISE_CTRL_2_LANE23 = 16'h7FFF;
12010    parameter [15:0] SLICE_TX_RESET_LANE01 = 16'h0000;
12011    parameter [15:0] SLICE_TX_RESET_LANE23 = 16'h0000;
12012    parameter [15:0] TERM_CTRL_LANE0 = 16'h5007;
12013    parameter [15:0] TERM_CTRL_LANE1 = 16'h5007;
12014    parameter [15:0] TERM_CTRL_LANE2 = 16'h5007;
12015    parameter [15:0] TERM_CTRL_LANE3 = 16'h5007;
12016    parameter [15:0] TX_CFG0_LANE0 = 16'h203D;
12017    parameter [15:0] TX_CFG0_LANE1 = 16'h203D;
12018    parameter [15:0] TX_CFG0_LANE2 = 16'h203D;
12019    parameter [15:0] TX_CFG0_LANE3 = 16'h203D;
12020    parameter [15:0] TX_CFG1_LANE0 = 16'h0F00;
12021    parameter [15:0] TX_CFG1_LANE1 = 16'h0F00;
12022    parameter [15:0] TX_CFG1_LANE2 = 16'h0F00;
12023    parameter [15:0] TX_CFG1_LANE3 = 16'h0F00;
12024    parameter [15:0] TX_CFG2_LANE0 = 16'h0081;
12025    parameter [15:0] TX_CFG2_LANE1 = 16'h0081;
12026    parameter [15:0] TX_CFG2_LANE2 = 16'h0081;
12027    parameter [15:0] TX_CFG2_LANE3 = 16'h0081;
12028    parameter [15:0] TX_CLK_SEL0_LANE0 = 16'h2121;
12029    parameter [15:0] TX_CLK_SEL0_LANE1 = 16'h2121;
12030    parameter [15:0] TX_CLK_SEL0_LANE2 = 16'h2121;
12031    parameter [15:0] TX_CLK_SEL0_LANE3 = 16'h2121;
12032    parameter [15:0] TX_CLK_SEL1_LANE0 = 16'h2121;
12033    parameter [15:0] TX_CLK_SEL1_LANE1 = 16'h2121;
12034    parameter [15:0] TX_CLK_SEL1_LANE2 = 16'h2121;
12035    parameter [15:0] TX_CLK_SEL1_LANE3 = 16'h2121;
12036    parameter [15:0] TX_DISABLE_LANE0 = 16'h0000;
12037    parameter [15:0] TX_DISABLE_LANE1 = 16'h0000;
12038    parameter [15:0] TX_DISABLE_LANE2 = 16'h0000;
12039    parameter [15:0] TX_DISABLE_LANE3 = 16'h0000;
12040    parameter integer TX_FABRIC_WIDTH0 = 6466;
12041    parameter integer TX_FABRIC_WIDTH1 = 6466;
12042    parameter integer TX_FABRIC_WIDTH2 = 6466;
12043    parameter integer TX_FABRIC_WIDTH3 = 6466;
12044    parameter [15:0] TX_P0P0S_CTRL = 16'h060C;
12045    parameter [15:0] TX_P1P2_CTRL = 16'h0C39;
12046    parameter [15:0] TX_PREEMPH_LANE0 = 16'h00A1;
12047    parameter [15:0] TX_PREEMPH_LANE1 = 16'h00A1;
12048    parameter [15:0] TX_PREEMPH_LANE2 = 16'h00A1;
12049    parameter [15:0] TX_PREEMPH_LANE3 = 16'h00A1;
12050    parameter [15:0] TX_PWR_RATE_OVRD_LANE0 = 16'h0060;
12051    parameter [15:0] TX_PWR_RATE_OVRD_LANE1 = 16'h0060;
12052    parameter [15:0] TX_PWR_RATE_OVRD_LANE2 = 16'h0060;
12053    parameter [15:0] TX_PWR_RATE_OVRD_LANE3 = 16'h0060;
12054    output DRDY;
12055    output GTHINITDONE;
12056    output MGMTPCSRDACK;
12057    output RXCTRLACK0;
12058    output RXCTRLACK1;
12059    output RXCTRLACK2;
12060    output RXCTRLACK3;
12061    output RXDATATAP0;
12062    output RXDATATAP1;
12063    output RXDATATAP2;
12064    output RXDATATAP3;
12065    output RXPCSCLKSMPL0;
12066    output RXPCSCLKSMPL1;
12067    output RXPCSCLKSMPL2;
12068    output RXPCSCLKSMPL3;
12069    output RXUSERCLKOUT0;
12070    output RXUSERCLKOUT1;
12071    output RXUSERCLKOUT2;
12072    output RXUSERCLKOUT3;
12073    output TSTPATH;
12074    output TSTREFCLKFAB;
12075    output TSTREFCLKOUT;
12076    output TXCTRLACK0;
12077    output TXCTRLACK1;
12078    output TXCTRLACK2;
12079    output TXCTRLACK3;
12080    output TXDATATAP10;
12081    output TXDATATAP11;
12082    output TXDATATAP12;
12083    output TXDATATAP13;
12084    output TXDATATAP20;
12085    output TXDATATAP21;
12086    output TXDATATAP22;
12087    output TXDATATAP23;
12088    output TXN0;
12089    output TXN1;
12090    output TXN2;
12091    output TXN3;
12092    output TXP0;
12093    output TXP1;
12094    output TXP2;
12095    output TXP3;
12096    output TXPCSCLKSMPL0;
12097    output TXPCSCLKSMPL1;
12098    output TXPCSCLKSMPL2;
12099    output TXPCSCLKSMPL3;
12100    output TXUSERCLKOUT0;
12101    output TXUSERCLKOUT1;
12102    output TXUSERCLKOUT2;
12103    output TXUSERCLKOUT3;
12104    output [15:0] DRPDO;
12105    output [15:0] MGMTPCSRDDATA;
12106    output [63:0] RXDATA0;
12107    output [63:0] RXDATA1;
12108    output [63:0] RXDATA2;
12109    output [63:0] RXDATA3;
12110    output [7:0] RXCODEERR0;
12111    output [7:0] RXCODEERR1;
12112    output [7:0] RXCODEERR2;
12113    output [7:0] RXCODEERR3;
12114    output [7:0] RXCTRL0;
12115    output [7:0] RXCTRL1;
12116    output [7:0] RXCTRL2;
12117    output [7:0] RXCTRL3;
12118    output [7:0] RXDISPERR0;
12119    output [7:0] RXDISPERR1;
12120    output [7:0] RXDISPERR2;
12121    output [7:0] RXDISPERR3;
12122    output [7:0] RXVALID0;
12123    output [7:0] RXVALID1;
12124    output [7:0] RXVALID2;
12125    output [7:0] RXVALID3;
12126    input DCLK;
12127    input DEN;
12128    input DFETRAINCTRL0;
12129    input DFETRAINCTRL1;
12130    input DFETRAINCTRL2;
12131    input DFETRAINCTRL3;
12132    input DISABLEDRP;
12133    input DWE;
12134    input GTHINIT;
12135    input GTHRESET;
12136    input GTHX2LANE01;
12137    input GTHX2LANE23;
12138    input GTHX4LANE;
12139    input MGMTPCSREGRD;
12140    input MGMTPCSREGWR;
12141    input POWERDOWN0;
12142    input POWERDOWN1;
12143    input POWERDOWN2;
12144    input POWERDOWN3;
12145    input REFCLK;
12146    input RXBUFRESET0;
12147    input RXBUFRESET1;
12148    input RXBUFRESET2;
12149    input RXBUFRESET3;
12150    input RXENCOMMADET0;
12151    input RXENCOMMADET1;
12152    input RXENCOMMADET2;
12153    input RXENCOMMADET3;
12154    input RXN0;
12155    input RXN1;
12156    input RXN2;
12157    input RXN3;
12158    input RXP0;
12159    input RXP1;
12160    input RXP2;
12161    input RXP3;
12162    input RXPOLARITY0;
12163    input RXPOLARITY1;
12164    input RXPOLARITY2;
12165    input RXPOLARITY3;
12166    input RXSLIP0;
12167    input RXSLIP1;
12168    input RXSLIP2;
12169    input RXSLIP3;
12170    input RXUSERCLKIN0;
12171    input RXUSERCLKIN1;
12172    input RXUSERCLKIN2;
12173    input RXUSERCLKIN3;
12174    input TXBUFRESET0;
12175    input TXBUFRESET1;
12176    input TXBUFRESET2;
12177    input TXBUFRESET3;
12178    input TXDEEMPH0;
12179    input TXDEEMPH1;
12180    input TXDEEMPH2;
12181    input TXDEEMPH3;
12182    input TXUSERCLKIN0;
12183    input TXUSERCLKIN1;
12184    input TXUSERCLKIN2;
12185    input TXUSERCLKIN3;
12186    input [15:0] DADDR;
12187    input [15:0] DI;
12188    input [15:0] MGMTPCSREGADDR;
12189    input [15:0] MGMTPCSWRDATA;
12190    input [1:0] RXPOWERDOWN0;
12191    input [1:0] RXPOWERDOWN1;
12192    input [1:0] RXPOWERDOWN2;
12193    input [1:0] RXPOWERDOWN3;
12194    input [1:0] RXRATE0;
12195    input [1:0] RXRATE1;
12196    input [1:0] RXRATE2;
12197    input [1:0] RXRATE3;
12198    input [1:0] TXPOWERDOWN0;
12199    input [1:0] TXPOWERDOWN1;
12200    input [1:0] TXPOWERDOWN2;
12201    input [1:0] TXPOWERDOWN3;
12202    input [1:0] TXRATE0;
12203    input [1:0] TXRATE1;
12204    input [1:0] TXRATE2;
12205    input [1:0] TXRATE3;
12206    input [2:0] PLLREFCLKSEL;
12207    input [2:0] SAMPLERATE0;
12208    input [2:0] SAMPLERATE1;
12209    input [2:0] SAMPLERATE2;
12210    input [2:0] SAMPLERATE3;
12211    input [2:0] TXMARGIN0;
12212    input [2:0] TXMARGIN1;
12213    input [2:0] TXMARGIN2;
12214    input [2:0] TXMARGIN3;
12215    input [3:0] MGMTPCSLANESEL;
12216    input [4:0] MGMTPCSMMDADDR;
12217    input [5:0] PLLPCSCLKDIV;
12218    input [63:0] TXDATA0;
12219    input [63:0] TXDATA1;
12220    input [63:0] TXDATA2;
12221    input [63:0] TXDATA3;
12222    input [7:0] TXCTRL0;
12223    input [7:0] TXCTRL1;
12224    input [7:0] TXCTRL2;
12225    input [7:0] TXCTRL3;
12226    input [7:0] TXDATAMSB0;
12227    input [7:0] TXDATAMSB1;
12228    input [7:0] TXDATAMSB2;
12229    input [7:0] TXDATAMSB3;
12230endmodule
12231
12232module GTXE1 (...);
12233    parameter AC_CAP_DIS = "TRUE";
12234    parameter integer ALIGN_COMMA_WORD = 1;
12235    parameter [1:0] BGTEST_CFG = 2'b00;
12236    parameter [16:0] BIAS_CFG = 17'h00000;
12237    parameter [4:0] CDR_PH_ADJ_TIME = 5'b10100;
12238    parameter integer CHAN_BOND_1_MAX_SKEW = 7;
12239    parameter integer CHAN_BOND_2_MAX_SKEW = 1;
12240    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
12241    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
12242    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0001001010;
12243    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0001001010;
12244    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0110111100;
12245    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
12246    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100111100;
12247    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100111100;
12248    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0110111100;
12249    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100111100;
12250    parameter [4:0] CHAN_BOND_SEQ_2_CFG = 5'b00000;
12251    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
12252    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
12253    parameter integer CHAN_BOND_SEQ_LEN = 1;
12254    parameter CLK_CORRECT_USE = "TRUE";
12255    parameter integer CLK_COR_ADJ_LEN = 1;
12256    parameter integer CLK_COR_DET_LEN = 1;
12257    parameter CLK_COR_INSERT_IDLE_FLAG = "FALSE";
12258    parameter CLK_COR_KEEP_IDLE = "FALSE";
12259    parameter integer CLK_COR_MAX_LAT = 20;
12260    parameter integer CLK_COR_MIN_LAT = 18;
12261    parameter CLK_COR_PRECEDENCE = "TRUE";
12262    parameter integer CLK_COR_REPEAT_WAIT = 0;
12263    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
12264    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
12265    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
12266    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
12267    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
12268    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0000000000;
12269    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0000000000;
12270    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0000000000;
12271    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0000000000;
12272    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
12273    parameter CLK_COR_SEQ_2_USE = "FALSE";
12274    parameter [1:0] CM_TRIM = 2'b01;
12275    parameter [9:0] COMMA_10B_ENABLE = 10'b1111111111;
12276    parameter COMMA_DOUBLE = "FALSE";
12277    parameter [3:0] COM_BURST_VAL = 4'b1111;
12278    parameter DEC_MCOMMA_DETECT = "TRUE";
12279    parameter DEC_PCOMMA_DETECT = "TRUE";
12280    parameter DEC_VALID_COMMA_ONLY = "TRUE";
12281    parameter [4:0] DFE_CAL_TIME = 5'b01100;
12282    parameter [7:0] DFE_CFG = 8'b00011011;
12283    parameter [2:0] GEARBOX_ENDEC = 3'b000;
12284    parameter GEN_RXUSRCLK = "TRUE";
12285    parameter GEN_TXUSRCLK = "TRUE";
12286    parameter GTX_CFG_PWRUP = "TRUE";
12287    parameter [9:0] MCOMMA_10B_VALUE = 10'b1010000011;
12288    parameter MCOMMA_DETECT = "TRUE";
12289    parameter [2:0] OOBDETECT_THRESHOLD = 3'b011;
12290    parameter PCI_EXPRESS_MODE = "FALSE";
12291    parameter [9:0] PCOMMA_10B_VALUE = 10'b0101111100;
12292    parameter PCOMMA_DETECT = "TRUE";
12293    parameter PMA_CAS_CLK_EN = "FALSE";
12294    parameter [26:0] PMA_CDR_SCAN = 27'h640404C;
12295    parameter [75:0] PMA_CFG = 76'h0040000040000000003;
12296    parameter [6:0] PMA_RXSYNC_CFG = 7'h00;
12297    parameter [24:0] PMA_RX_CFG = 25'h05CE048;
12298    parameter [19:0] PMA_TX_CFG = 20'h00082;
12299    parameter [9:0] POWER_SAVE = 10'b0000110100;
12300    parameter RCV_TERM_GND = "FALSE";
12301    parameter RCV_TERM_VTTRX = "TRUE";
12302    parameter RXGEARBOX_USE = "FALSE";
12303    parameter [23:0] RXPLL_COM_CFG = 24'h21680A;
12304    parameter [7:0] RXPLL_CP_CFG = 8'h00;
12305    parameter integer RXPLL_DIVSEL45_FB = 5;
12306    parameter integer RXPLL_DIVSEL_FB = 2;
12307    parameter integer RXPLL_DIVSEL_OUT = 1;
12308    parameter integer RXPLL_DIVSEL_REF = 1;
12309    parameter [2:0] RXPLL_LKDET_CFG = 3'b111;
12310    parameter [0:0] RXPRBSERR_LOOPBACK = 1'b0;
12311    parameter RXRECCLK_CTRL = "RXRECCLKPCS";
12312    parameter [9:0] RXRECCLK_DLY = 10'b0000000000;
12313    parameter [15:0] RXUSRCLK_DLY = 16'h0000;
12314    parameter RX_BUFFER_USE = "TRUE";
12315    parameter integer RX_CLK25_DIVIDER = 6;
12316    parameter integer RX_DATA_WIDTH = 20;
12317    parameter RX_DECODE_SEQ_MATCH = "TRUE";
12318    parameter [3:0] RX_DLYALIGN_CTRINC = 4'b0100;
12319    parameter [4:0] RX_DLYALIGN_EDGESET = 5'b00110;
12320    parameter [3:0] RX_DLYALIGN_LPFINC = 4'b0111;
12321    parameter [2:0] RX_DLYALIGN_MONSEL = 3'b000;
12322    parameter [7:0] RX_DLYALIGN_OVRDSETTING = 8'b00000000;
12323    parameter RX_EN_IDLE_HOLD_CDR = "FALSE";
12324    parameter RX_EN_IDLE_HOLD_DFE = "TRUE";
12325    parameter RX_EN_IDLE_RESET_BUF = "TRUE";
12326    parameter RX_EN_IDLE_RESET_FR = "TRUE";
12327    parameter RX_EN_IDLE_RESET_PH = "TRUE";
12328    parameter RX_EN_MODE_RESET_BUF = "TRUE";
12329    parameter RX_EN_RATE_RESET_BUF = "TRUE";
12330    parameter RX_EN_REALIGN_RESET_BUF = "FALSE";
12331    parameter RX_EN_REALIGN_RESET_BUF2 = "FALSE";
12332    parameter [7:0] RX_EYE_OFFSET = 8'h4C;
12333    parameter [1:0] RX_EYE_SCANMODE = 2'b00;
12334    parameter RX_FIFO_ADDR_MODE = "FULL";
12335    parameter [3:0] RX_IDLE_HI_CNT = 4'b1000;
12336    parameter [3:0] RX_IDLE_LO_CNT = 4'b0000;
12337    parameter RX_LOSS_OF_SYNC_FSM = "FALSE";
12338    parameter integer RX_LOS_INVALID_INCR = 1;
12339    parameter integer RX_LOS_THRESHOLD = 4;
12340    parameter RX_OVERSAMPLE_MODE = "FALSE";
12341    parameter integer RX_SLIDE_AUTO_WAIT = 5;
12342    parameter RX_SLIDE_MODE = "OFF";
12343    parameter RX_XCLK_SEL = "RXREC";
12344    parameter integer SAS_MAX_COMSAS = 52;
12345    parameter integer SAS_MIN_COMSAS = 40;
12346    parameter [2:0] SATA_BURST_VAL = 3'b100;
12347    parameter [2:0] SATA_IDLE_VAL = 3'b100;
12348    parameter integer SATA_MAX_BURST = 7;
12349    parameter integer SATA_MAX_INIT = 22;
12350    parameter integer SATA_MAX_WAKE = 7;
12351    parameter integer SATA_MIN_BURST = 4;
12352    parameter integer SATA_MIN_INIT = 12;
12353    parameter integer SATA_MIN_WAKE = 4;
12354    parameter SHOW_REALIGN_COMMA = "TRUE";
12355    parameter integer SIM_GTXRESET_SPEEDUP = 1;
12356    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
12357    parameter [2:0] SIM_RXREFCLK_SOURCE = 3'b000;
12358    parameter [2:0] SIM_TXREFCLK_SOURCE = 3'b000;
12359    parameter SIM_TX_ELEC_IDLE_LEVEL = "X";
12360    parameter SIM_VERSION = "2.0";
12361    parameter [4:0] TERMINATION_CTRL = 5'b10100;
12362    parameter TERMINATION_OVRD = "FALSE";
12363    parameter [11:0] TRANS_TIME_FROM_P2 = 12'h03C;
12364    parameter [7:0] TRANS_TIME_NON_P2 = 8'h19;
12365    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
12366    parameter [9:0] TRANS_TIME_TO_P2 = 10'h064;
12367    parameter [31:0] TST_ATTR = 32'h00000000;
12368    parameter TXDRIVE_LOOPBACK_HIZ = "FALSE";
12369    parameter TXDRIVE_LOOPBACK_PD = "FALSE";
12370    parameter TXGEARBOX_USE = "FALSE";
12371    parameter TXOUTCLK_CTRL = "TXOUTCLKPCS";
12372    parameter [9:0] TXOUTCLK_DLY = 10'b0000000000;
12373    parameter [23:0] TXPLL_COM_CFG = 24'h21680A;
12374    parameter [7:0] TXPLL_CP_CFG = 8'h00;
12375    parameter integer TXPLL_DIVSEL45_FB = 5;
12376    parameter integer TXPLL_DIVSEL_FB = 2;
12377    parameter integer TXPLL_DIVSEL_OUT = 1;
12378    parameter integer TXPLL_DIVSEL_REF = 1;
12379    parameter [2:0] TXPLL_LKDET_CFG = 3'b111;
12380    parameter [1:0] TXPLL_SATA = 2'b00;
12381    parameter TX_BUFFER_USE = "TRUE";
12382    parameter [5:0] TX_BYTECLK_CFG = 6'h00;
12383    parameter integer TX_CLK25_DIVIDER = 6;
12384    parameter TX_CLK_SOURCE = "RXPLL";
12385    parameter integer TX_DATA_WIDTH = 20;
12386    parameter [4:0] TX_DEEMPH_0 = 5'b11010;
12387    parameter [4:0] TX_DEEMPH_1 = 5'b10000;
12388    parameter [13:0] TX_DETECT_RX_CFG = 14'h1832;
12389    parameter [3:0] TX_DLYALIGN_CTRINC = 4'b0100;
12390    parameter [3:0] TX_DLYALIGN_LPFINC = 4'b0110;
12391    parameter [2:0] TX_DLYALIGN_MONSEL = 3'b000;
12392    parameter [7:0] TX_DLYALIGN_OVRDSETTING = 8'b10000000;
12393    parameter TX_DRIVE_MODE = "DIRECT";
12394    parameter TX_EN_RATE_RESET_BUF = "TRUE";
12395    parameter [2:0] TX_IDLE_ASSERT_DELAY = 3'b100;
12396    parameter [2:0] TX_IDLE_DEASSERT_DELAY = 3'b010;
12397    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
12398    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
12399    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
12400    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
12401    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
12402    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
12403    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
12404    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
12405    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
12406    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
12407    parameter TX_OVERSAMPLE_MODE = "FALSE";
12408    parameter [0:0] TX_PMADATA_OPT = 1'b0;
12409    parameter [1:0] TX_TDCC_CFG = 2'b11;
12410    parameter [5:0] TX_USRCLK_CFG = 6'h00;
12411    parameter TX_XCLK_SEL = "TXUSR";
12412    output COMFINISH;
12413    output COMINITDET;
12414    output COMSASDET;
12415    output COMWAKEDET;
12416    output DRDY;
12417    output PHYSTATUS;
12418    output RXBYTEISALIGNED;
12419    output RXBYTEREALIGN;
12420    output RXCHANBONDSEQ;
12421    output RXCHANISALIGNED;
12422    output RXCHANREALIGN;
12423    output RXCOMMADET;
12424    output RXDATAVALID;
12425    output RXELECIDLE;
12426    output RXHEADERVALID;
12427    output RXOVERSAMPLEERR;
12428    output RXPLLLKDET;
12429    output RXPRBSERR;
12430    output RXRATEDONE;
12431    output RXRECCLK;
12432    output RXRECCLKPCS;
12433    output RXRESETDONE;
12434    output RXSTARTOFSEQ;
12435    output RXVALID;
12436    output TXGEARBOXREADY;
12437    output TXN;
12438    output TXOUTCLK;
12439    output TXOUTCLKPCS;
12440    output TXP;
12441    output TXPLLLKDET;
12442    output TXRATEDONE;
12443    output TXRESETDONE;
12444    output [15:0] DRPDO;
12445    output [1:0] MGTREFCLKFAB;
12446    output [1:0] RXLOSSOFSYNC;
12447    output [1:0] TXBUFSTATUS;
12448    output [2:0] DFESENSCAL;
12449    output [2:0] RXBUFSTATUS;
12450    output [2:0] RXCLKCORCNT;
12451    output [2:0] RXHEADER;
12452    output [2:0] RXSTATUS;
12453    output [31:0] RXDATA;
12454    output [3:0] DFETAP3MONITOR;
12455    output [3:0] DFETAP4MONITOR;
12456    output [3:0] RXCHARISCOMMA;
12457    output [3:0] RXCHARISK;
12458    output [3:0] RXCHBONDO;
12459    output [3:0] RXDISPERR;
12460    output [3:0] RXNOTINTABLE;
12461    output [3:0] RXRUNDISP;
12462    output [3:0] TXKERR;
12463    output [3:0] TXRUNDISP;
12464    output [4:0] DFEEYEDACMON;
12465    output [4:0] DFETAP1MONITOR;
12466    output [4:0] DFETAP2MONITOR;
12467    output [5:0] DFECLKDLYADJMON;
12468    output [7:0] RXDLYALIGNMONITOR;
12469    output [7:0] TXDLYALIGNMONITOR;
12470    output [9:0] TSTOUT;
12471    input DCLK;
12472    input DEN;
12473    input DFEDLYOVRD;
12474    input DFETAPOVRD;
12475    input DWE;
12476    input GATERXELECIDLE;
12477    input GREFCLKRX;
12478    input GREFCLKTX;
12479    input GTXRXRESET;
12480    input GTXTXRESET;
12481    input IGNORESIGDET;
12482    input PERFCLKRX;
12483    input PERFCLKTX;
12484    input PLLRXRESET;
12485    input PLLTXRESET;
12486    input PRBSCNTRESET;
12487    input RXBUFRESET;
12488    input RXCDRRESET;
12489    input RXCHBONDMASTER;
12490    input RXCHBONDSLAVE;
12491    input RXCOMMADETUSE;
12492    input RXDEC8B10BUSE;
12493    input RXDLYALIGNDISABLE;
12494    input RXDLYALIGNMONENB;
12495    input RXDLYALIGNOVERRIDE;
12496    input RXDLYALIGNRESET;
12497    input RXDLYALIGNSWPPRECURB;
12498    input RXDLYALIGNUPDSW;
12499    input RXENCHANSYNC;
12500    input RXENMCOMMAALIGN;
12501    input RXENPCOMMAALIGN;
12502    input RXENPMAPHASEALIGN;
12503    input RXENSAMPLEALIGN;
12504    input RXGEARBOXSLIP;
12505    input RXN;
12506    input RXP;
12507    input RXPLLLKDETEN;
12508    input RXPLLPOWERDOWN;
12509    input RXPMASETPHASE;
12510    input RXPOLARITY;
12511    input RXRESET;
12512    input RXSLIDE;
12513    input RXUSRCLK2;
12514    input RXUSRCLK;
12515    input TSTCLK0;
12516    input TSTCLK1;
12517    input TXCOMINIT;
12518    input TXCOMSAS;
12519    input TXCOMWAKE;
12520    input TXDEEMPH;
12521    input TXDETECTRX;
12522    input TXDLYALIGNDISABLE;
12523    input TXDLYALIGNMONENB;
12524    input TXDLYALIGNOVERRIDE;
12525    input TXDLYALIGNRESET;
12526    input TXDLYALIGNUPDSW;
12527    input TXELECIDLE;
12528    input TXENC8B10BUSE;
12529    input TXENPMAPHASEALIGN;
12530    input TXINHIBIT;
12531    input TXPDOWNASYNCH;
12532    input TXPLLLKDETEN;
12533    input TXPLLPOWERDOWN;
12534    input TXPMASETPHASE;
12535    input TXPOLARITY;
12536    input TXPRBSFORCEERR;
12537    input TXRESET;
12538    input TXSTARTSEQ;
12539    input TXSWING;
12540    input TXUSRCLK2;
12541    input TXUSRCLK;
12542    input USRCODEERR;
12543    input [12:0] GTXTEST;
12544    input [15:0] DI;
12545    input [19:0] TSTIN;
12546    input [1:0] MGTREFCLKRX;
12547    input [1:0] MGTREFCLKTX;
12548    input [1:0] NORTHREFCLKRX;
12549    input [1:0] NORTHREFCLKTX;
12550    input [1:0] RXPOWERDOWN;
12551    input [1:0] RXRATE;
12552    input [1:0] SOUTHREFCLKRX;
12553    input [1:0] SOUTHREFCLKTX;
12554    input [1:0] TXPOWERDOWN;
12555    input [1:0] TXRATE;
12556    input [2:0] LOOPBACK;
12557    input [2:0] RXCHBONDLEVEL;
12558    input [2:0] RXENPRBSTST;
12559    input [2:0] RXPLLREFSELDY;
12560    input [2:0] TXBUFDIFFCTRL;
12561    input [2:0] TXENPRBSTST;
12562    input [2:0] TXHEADER;
12563    input [2:0] TXMARGIN;
12564    input [2:0] TXPLLREFSELDY;
12565    input [31:0] TXDATA;
12566    input [3:0] DFETAP3;
12567    input [3:0] DFETAP4;
12568    input [3:0] RXCHBONDI;
12569    input [3:0] TXBYPASS8B10B;
12570    input [3:0] TXCHARDISPMODE;
12571    input [3:0] TXCHARDISPVAL;
12572    input [3:0] TXCHARISK;
12573    input [3:0] TXDIFFCTRL;
12574    input [3:0] TXPREEMPHASIS;
12575    input [4:0] DFETAP1;
12576    input [4:0] DFETAP2;
12577    input [4:0] TXPOSTEMPHASIS;
12578    input [5:0] DFECLKDLYADJ;
12579    input [6:0] TXSEQUENCE;
12580    input [7:0] DADDR;
12581    input [9:0] RXEQMIX;
12582endmodule
12583
12584module IBUFDS_GTXE1 (...);
12585    parameter CLKCM_CFG = "TRUE";
12586    parameter CLKRCV_TRST = "TRUE";
12587    parameter [9:0] REFCLKOUT_DLY = 10'b0000000000;
12588    output O;
12589    output ODIV2;
12590    input CEB;
12591    (* iopad_external_pin *)
12592    input I;
12593    (* iopad_external_pin *)
12594    input IB;
12595endmodule
12596
12597module IBUFDS_GTHE1 (...);
12598    output O;
12599    (* iopad_external_pin *)
12600    input I;
12601    (* iopad_external_pin *)
12602    input IB;
12603endmodule
12604
12605module GTHE2_CHANNEL (...);
12606    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
12607    parameter [0:0] ACJTAG_MODE = 1'b0;
12608    parameter [0:0] ACJTAG_RESET = 1'b0;
12609    parameter [19:0] ADAPT_CFG0 = 20'h00C10;
12610    parameter ALIGN_COMMA_DOUBLE = "FALSE";
12611    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
12612    parameter integer ALIGN_COMMA_WORD = 1;
12613    parameter ALIGN_MCOMMA_DET = "TRUE";
12614    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
12615    parameter ALIGN_PCOMMA_DET = "TRUE";
12616    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
12617    parameter [0:0] A_RXOSCALRESET = 1'b0;
12618    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
12619    parameter [41:0] CFOK_CFG = 42'h24800040E80;
12620    parameter [5:0] CFOK_CFG2 = 6'b100000;
12621    parameter [5:0] CFOK_CFG3 = 6'b100000;
12622    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
12623    parameter integer CHAN_BOND_MAX_SKEW = 7;
12624    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
12625    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
12626    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
12627    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
12628    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
12629    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
12630    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
12631    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
12632    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
12633    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
12634    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
12635    parameter integer CHAN_BOND_SEQ_LEN = 1;
12636    parameter CLK_CORRECT_USE = "TRUE";
12637    parameter CLK_COR_KEEP_IDLE = "FALSE";
12638    parameter integer CLK_COR_MAX_LAT = 20;
12639    parameter integer CLK_COR_MIN_LAT = 18;
12640    parameter CLK_COR_PRECEDENCE = "TRUE";
12641    parameter integer CLK_COR_REPEAT_WAIT = 0;
12642    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
12643    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
12644    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
12645    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
12646    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
12647    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
12648    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
12649    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
12650    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
12651    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
12652    parameter CLK_COR_SEQ_2_USE = "FALSE";
12653    parameter integer CLK_COR_SEQ_LEN = 1;
12654    parameter [28:0] CPLL_CFG = 29'h00BC07DC;
12655    parameter integer CPLL_FBDIV = 4;
12656    parameter integer CPLL_FBDIV_45 = 5;
12657    parameter [23:0] CPLL_INIT_CFG = 24'h00001E;
12658    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
12659    parameter integer CPLL_REFCLK_DIV = 1;
12660    parameter DEC_MCOMMA_DETECT = "TRUE";
12661    parameter DEC_PCOMMA_DETECT = "TRUE";
12662    parameter DEC_VALID_COMMA_ONLY = "TRUE";
12663    parameter [23:0] DMONITOR_CFG = 24'h000A00;
12664    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
12665    parameter [5:0] ES_CONTROL = 6'b000000;
12666    parameter ES_ERRDET_EN = "FALSE";
12667    parameter ES_EYE_SCAN_EN = "TRUE";
12668    parameter [11:0] ES_HORZ_OFFSET = 12'h000;
12669    parameter [9:0] ES_PMA_CFG = 10'b0000000000;
12670    parameter [4:0] ES_PRESCALE = 5'b00000;
12671    parameter [79:0] ES_QUALIFIER = 80'h00000000000000000000;
12672    parameter [79:0] ES_QUAL_MASK = 80'h00000000000000000000;
12673    parameter [79:0] ES_SDATA_MASK = 80'h00000000000000000000;
12674    parameter [8:0] ES_VERT_OFFSET = 9'b000000000;
12675    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
12676    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
12677    parameter FTS_LANE_DESKEW_EN = "FALSE";
12678    parameter [2:0] GEARBOX_MODE = 3'b000;
12679    parameter [0:0] IS_CLKRSVD0_INVERTED = 1'b0;
12680    parameter [0:0] IS_CLKRSVD1_INVERTED = 1'b0;
12681    parameter [0:0] IS_CPLLLOCKDETCLK_INVERTED = 1'b0;
12682    parameter [0:0] IS_DMONITORCLK_INVERTED = 1'b0;
12683    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
12684    parameter [0:0] IS_GTGREFCLK_INVERTED = 1'b0;
12685    parameter [0:0] IS_RXUSRCLK2_INVERTED = 1'b0;
12686    parameter [0:0] IS_RXUSRCLK_INVERTED = 1'b0;
12687    parameter [0:0] IS_SIGVALIDCLK_INVERTED = 1'b0;
12688    parameter [0:0] IS_TXPHDLYTSTCLK_INVERTED = 1'b0;
12689    parameter [0:0] IS_TXUSRCLK2_INVERTED = 1'b0;
12690    parameter [0:0] IS_TXUSRCLK_INVERTED = 1'b0;
12691    parameter [0:0] LOOPBACK_CFG = 1'b0;
12692    parameter [1:0] OUTREFCLK_SEL_INV = 2'b11;
12693    parameter PCS_PCIE_EN = "FALSE";
12694    parameter [47:0] PCS_RSVD_ATTR = 48'h000000000000;
12695    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
12696    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
12697    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
12698    parameter [31:0] PMA_RSV = 32'b00000000000000000000000010000000;
12699    parameter [31:0] PMA_RSV2 = 32'b00011100000000000000000000001010;
12700    parameter [1:0] PMA_RSV3 = 2'b00;
12701    parameter [14:0] PMA_RSV4 = 15'b000000000001000;
12702    parameter [3:0] PMA_RSV5 = 4'b0000;
12703    parameter [0:0] RESET_POWERSAVE_DISABLE = 1'b0;
12704    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
12705    parameter RXBUF_ADDR_MODE = "FULL";
12706    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
12707    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
12708    parameter RXBUF_EN = "TRUE";
12709    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
12710    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
12711    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
12712    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
12713    parameter integer RXBUF_THRESH_OVFLW = 61;
12714    parameter RXBUF_THRESH_OVRD = "FALSE";
12715    parameter integer RXBUF_THRESH_UNDFLW = 4;
12716    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
12717    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
12718    parameter [82:0] RXCDR_CFG = 83'h0002007FE2000C208001A;
12719    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
12720    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
12721    parameter [5:0] RXCDR_LOCK_CFG = 6'b001001;
12722    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
12723    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
12724    parameter [15:0] RXDLY_CFG = 16'h001F;
12725    parameter [8:0] RXDLY_LCFG = 9'h030;
12726    parameter [15:0] RXDLY_TAP_CFG = 16'h0000;
12727    parameter RXGEARBOX_EN = "FALSE";
12728    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
12729    parameter [13:0] RXLPM_HF_CFG = 14'b00001000000000;
12730    parameter [17:0] RXLPM_LF_CFG = 18'b001001000000000000;
12731    parameter [6:0] RXOOB_CFG = 7'b0000110;
12732    parameter RXOOB_CLK_CFG = "PMA";
12733    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
12734    parameter [4:0] RXOSCALRESET_TIMEOUT = 5'b00000;
12735    parameter integer RXOUT_DIV = 2;
12736    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
12737    parameter [23:0] RXPHDLY_CFG = 24'h084020;
12738    parameter [23:0] RXPH_CFG = 24'hC00002;
12739    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
12740    parameter [1:0] RXPI_CFG0 = 2'b00;
12741    parameter [1:0] RXPI_CFG1 = 2'b00;
12742    parameter [1:0] RXPI_CFG2 = 2'b00;
12743    parameter [1:0] RXPI_CFG3 = 2'b00;
12744    parameter [0:0] RXPI_CFG4 = 1'b0;
12745    parameter [0:0] RXPI_CFG5 = 1'b0;
12746    parameter [2:0] RXPI_CFG6 = 3'b100;
12747    parameter [4:0] RXPMARESET_TIME = 5'b00011;
12748    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
12749    parameter integer RXSLIDE_AUTO_WAIT = 7;
12750    parameter RXSLIDE_MODE = "OFF";
12751    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
12752    parameter [0:0] RXSYNC_OVRD = 1'b0;
12753    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
12754    parameter [23:0] RX_BIAS_CFG = 24'b000011000000000000010000;
12755    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
12756    parameter integer RX_CLK25_DIV = 7;
12757    parameter [0:0] RX_CLKMUX_PD = 1'b1;
12758    parameter [1:0] RX_CM_SEL = 2'b11;
12759    parameter [3:0] RX_CM_TRIM = 4'b0100;
12760    parameter integer RX_DATA_WIDTH = 20;
12761    parameter [5:0] RX_DDI_SEL = 6'b000000;
12762    parameter [13:0] RX_DEBUG_CFG = 14'b00000000000000;
12763    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
12764    parameter [3:0] RX_DFELPM_CFG0 = 4'b0110;
12765    parameter [0:0] RX_DFELPM_CFG1 = 1'b0;
12766    parameter [0:0] RX_DFELPM_KLKH_AGC_STUP_EN = 1'b1;
12767    parameter [1:0] RX_DFE_AGC_CFG0 = 2'b00;
12768    parameter [2:0] RX_DFE_AGC_CFG1 = 3'b010;
12769    parameter [3:0] RX_DFE_AGC_CFG2 = 4'b0000;
12770    parameter [0:0] RX_DFE_AGC_OVRDEN = 1'b1;
12771    parameter [22:0] RX_DFE_GAIN_CFG = 23'h0020C0;
12772    parameter [11:0] RX_DFE_H2_CFG = 12'b000000000000;
12773    parameter [11:0] RX_DFE_H3_CFG = 12'b000001000000;
12774    parameter [10:0] RX_DFE_H4_CFG = 11'b00011100000;
12775    parameter [10:0] RX_DFE_H5_CFG = 11'b00011100000;
12776    parameter [10:0] RX_DFE_H6_CFG = 11'b00000100000;
12777    parameter [10:0] RX_DFE_H7_CFG = 11'b00000100000;
12778    parameter [32:0] RX_DFE_KL_CFG = 33'b000000000000000000000001100010000;
12779    parameter [1:0] RX_DFE_KL_LPM_KH_CFG0 = 2'b01;
12780    parameter [2:0] RX_DFE_KL_LPM_KH_CFG1 = 3'b010;
12781    parameter [3:0] RX_DFE_KL_LPM_KH_CFG2 = 4'b0010;
12782    parameter [0:0] RX_DFE_KL_LPM_KH_OVRDEN = 1'b1;
12783    parameter [1:0] RX_DFE_KL_LPM_KL_CFG0 = 2'b10;
12784    parameter [2:0] RX_DFE_KL_LPM_KL_CFG1 = 3'b010;
12785    parameter [3:0] RX_DFE_KL_LPM_KL_CFG2 = 4'b0010;
12786    parameter [0:0] RX_DFE_KL_LPM_KL_OVRDEN = 1'b1;
12787    parameter [15:0] RX_DFE_LPM_CFG = 16'h0080;
12788    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
12789    parameter [53:0] RX_DFE_ST_CFG = 54'h00E100000C003F;
12790    parameter [16:0] RX_DFE_UT_CFG = 17'b00011100000000000;
12791    parameter [16:0] RX_DFE_VP_CFG = 17'b00011101010100011;
12792    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
12793    parameter integer RX_INT_DATAWIDTH = 0;
12794    parameter [12:0] RX_OS_CFG = 13'b0000010000000;
12795    parameter integer RX_SIG_VALID_DLY = 10;
12796    parameter RX_XCLK_SEL = "RXREC";
12797    parameter integer SAS_MAX_COM = 64;
12798    parameter integer SAS_MIN_COM = 36;
12799    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
12800    parameter [2:0] SATA_BURST_VAL = 3'b100;
12801    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
12802    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
12803    parameter integer SATA_MAX_BURST = 8;
12804    parameter integer SATA_MAX_INIT = 21;
12805    parameter integer SATA_MAX_WAKE = 7;
12806    parameter integer SATA_MIN_BURST = 4;
12807    parameter integer SATA_MIN_INIT = 12;
12808    parameter integer SATA_MIN_WAKE = 4;
12809    parameter SHOW_REALIGN_COMMA = "TRUE";
12810    parameter [2:0] SIM_CPLLREFCLK_SEL = 3'b001;
12811    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
12812    parameter SIM_RESET_SPEEDUP = "TRUE";
12813    parameter SIM_TX_EIDLE_DRIVE_LEVEL = "X";
12814    parameter SIM_VERSION = "1.1";
12815    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
12816    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
12817    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
12818    parameter [31:0] TST_RSV = 32'h00000000;
12819    parameter TXBUF_EN = "TRUE";
12820    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
12821    parameter [15:0] TXDLY_CFG = 16'h001F;
12822    parameter [8:0] TXDLY_LCFG = 9'h030;
12823    parameter [15:0] TXDLY_TAP_CFG = 16'h0000;
12824    parameter TXGEARBOX_EN = "FALSE";
12825    parameter [0:0] TXOOB_CFG = 1'b0;
12826    parameter integer TXOUT_DIV = 2;
12827    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
12828    parameter [23:0] TXPHDLY_CFG = 24'h084020;
12829    parameter [15:0] TXPH_CFG = 16'h0780;
12830    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
12831    parameter [1:0] TXPI_CFG0 = 2'b00;
12832    parameter [1:0] TXPI_CFG1 = 2'b00;
12833    parameter [1:0] TXPI_CFG2 = 2'b00;
12834    parameter [0:0] TXPI_CFG3 = 1'b0;
12835    parameter [0:0] TXPI_CFG4 = 1'b0;
12836    parameter [2:0] TXPI_CFG5 = 3'b100;
12837    parameter [0:0] TXPI_GREY_SEL = 1'b0;
12838    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
12839    parameter TXPI_PPMCLK_SEL = "TXUSRCLK2";
12840    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
12841    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
12842    parameter [4:0] TXPMARESET_TIME = 5'b00001;
12843    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
12844    parameter [0:0] TXSYNC_OVRD = 1'b0;
12845    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
12846    parameter integer TX_CLK25_DIV = 7;
12847    parameter [0:0] TX_CLKMUX_PD = 1'b1;
12848    parameter integer TX_DATA_WIDTH = 20;
12849    parameter [5:0] TX_DEEMPH0 = 6'b000000;
12850    parameter [5:0] TX_DEEMPH1 = 6'b000000;
12851    parameter TX_DRIVE_MODE = "DIRECT";
12852    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
12853    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
12854    parameter integer TX_INT_DATAWIDTH = 0;
12855    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
12856    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
12857    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
12858    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
12859    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
12860    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
12861    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
12862    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
12863    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
12864    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
12865    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
12866    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
12867    parameter [0:0] TX_QPI_STATUS_EN = 1'b0;
12868    parameter [13:0] TX_RXDETECT_CFG = 14'h1832;
12869    parameter [16:0] TX_RXDETECT_PRECHARGE_TIME = 17'h00000;
12870    parameter [2:0] TX_RXDETECT_REF = 3'b100;
12871    parameter TX_XCLK_SEL = "TXUSR";
12872    parameter [0:0] UCODEER_CLR = 1'b0;
12873    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
12874    output CPLLFBCLKLOST;
12875    output CPLLLOCK;
12876    output CPLLREFCLKLOST;
12877    output DRPRDY;
12878    output EYESCANDATAERROR;
12879    output GTHTXN;
12880    output GTHTXP;
12881    output GTREFCLKMONITOR;
12882    output PHYSTATUS;
12883    output RSOSINTDONE;
12884    output RXBYTEISALIGNED;
12885    output RXBYTEREALIGN;
12886    output RXCDRLOCK;
12887    output RXCHANBONDSEQ;
12888    output RXCHANISALIGNED;
12889    output RXCHANREALIGN;
12890    output RXCOMINITDET;
12891    output RXCOMMADET;
12892    output RXCOMSASDET;
12893    output RXCOMWAKEDET;
12894    output RXDFESLIDETAPSTARTED;
12895    output RXDFESLIDETAPSTROBEDONE;
12896    output RXDFESLIDETAPSTROBESTARTED;
12897    output RXDFESTADAPTDONE;
12898    output RXDLYSRESETDONE;
12899    output RXELECIDLE;
12900    output RXOSINTSTARTED;
12901    output RXOSINTSTROBEDONE;
12902    output RXOSINTSTROBESTARTED;
12903    output RXOUTCLK;
12904    output RXOUTCLKFABRIC;
12905    output RXOUTCLKPCS;
12906    output RXPHALIGNDONE;
12907    output RXPMARESETDONE;
12908    output RXPRBSERR;
12909    output RXQPISENN;
12910    output RXQPISENP;
12911    output RXRATEDONE;
12912    output RXRESETDONE;
12913    output RXSYNCDONE;
12914    output RXSYNCOUT;
12915    output RXVALID;
12916    output TXCOMFINISH;
12917    output TXDLYSRESETDONE;
12918    output TXGEARBOXREADY;
12919    output TXOUTCLK;
12920    output TXOUTCLKFABRIC;
12921    output TXOUTCLKPCS;
12922    output TXPHALIGNDONE;
12923    output TXPHINITDONE;
12924    output TXPMARESETDONE;
12925    output TXQPISENN;
12926    output TXQPISENP;
12927    output TXRATEDONE;
12928    output TXRESETDONE;
12929    output TXSYNCDONE;
12930    output TXSYNCOUT;
12931    output [14:0] DMONITOROUT;
12932    output [15:0] DRPDO;
12933    output [15:0] PCSRSVDOUT;
12934    output [1:0] RXCLKCORCNT;
12935    output [1:0] RXDATAVALID;
12936    output [1:0] RXHEADERVALID;
12937    output [1:0] RXSTARTOFSEQ;
12938    output [1:0] TXBUFSTATUS;
12939    output [2:0] RXBUFSTATUS;
12940    output [2:0] RXSTATUS;
12941    output [4:0] RXCHBONDO;
12942    output [4:0] RXPHMONITOR;
12943    output [4:0] RXPHSLIPMONITOR;
12944    output [5:0] RXHEADER;
12945    output [63:0] RXDATA;
12946    output [6:0] RXMONITOROUT;
12947    output [7:0] RXCHARISCOMMA;
12948    output [7:0] RXCHARISK;
12949    output [7:0] RXDISPERR;
12950    output [7:0] RXNOTINTABLE;
12951    input CFGRESET;
12952    (* invertible_pin = "IS_CLKRSVD0_INVERTED" *)
12953    input CLKRSVD0;
12954    (* invertible_pin = "IS_CLKRSVD1_INVERTED" *)
12955    input CLKRSVD1;
12956    (* invertible_pin = "IS_CPLLLOCKDETCLK_INVERTED" *)
12957    input CPLLLOCKDETCLK;
12958    input CPLLLOCKEN;
12959    input CPLLPD;
12960    input CPLLRESET;
12961    input DMONFIFORESET;
12962    (* invertible_pin = "IS_DMONITORCLK_INVERTED" *)
12963    input DMONITORCLK;
12964    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
12965    input DRPCLK;
12966    input DRPEN;
12967    input DRPWE;
12968    input EYESCANMODE;
12969    input EYESCANRESET;
12970    input EYESCANTRIGGER;
12971    (* invertible_pin = "IS_GTGREFCLK_INVERTED" *)
12972    input GTGREFCLK;
12973    input GTHRXN;
12974    input GTHRXP;
12975    input GTNORTHREFCLK0;
12976    input GTNORTHREFCLK1;
12977    input GTREFCLK0;
12978    input GTREFCLK1;
12979    input GTRESETSEL;
12980    input GTRXRESET;
12981    input GTSOUTHREFCLK0;
12982    input GTSOUTHREFCLK1;
12983    input GTTXRESET;
12984    input QPLLCLK;
12985    input QPLLREFCLK;
12986    input RESETOVRD;
12987    input RX8B10BEN;
12988    input RXBUFRESET;
12989    input RXCDRFREQRESET;
12990    input RXCDRHOLD;
12991    input RXCDROVRDEN;
12992    input RXCDRRESET;
12993    input RXCDRRESETRSV;
12994    input RXCHBONDEN;
12995    input RXCHBONDMASTER;
12996    input RXCHBONDSLAVE;
12997    input RXCOMMADETEN;
12998    input RXDDIEN;
12999    input RXDFEAGCHOLD;
13000    input RXDFEAGCOVRDEN;
13001    input RXDFECM1EN;
13002    input RXDFELFHOLD;
13003    input RXDFELFOVRDEN;
13004    input RXDFELPMRESET;
13005    input RXDFESLIDETAPADAPTEN;
13006    input RXDFESLIDETAPHOLD;
13007    input RXDFESLIDETAPINITOVRDEN;
13008    input RXDFESLIDETAPONLYADAPTEN;
13009    input RXDFESLIDETAPOVRDEN;
13010    input RXDFESLIDETAPSTROBE;
13011    input RXDFETAP2HOLD;
13012    input RXDFETAP2OVRDEN;
13013    input RXDFETAP3HOLD;
13014    input RXDFETAP3OVRDEN;
13015    input RXDFETAP4HOLD;
13016    input RXDFETAP4OVRDEN;
13017    input RXDFETAP5HOLD;
13018    input RXDFETAP5OVRDEN;
13019    input RXDFETAP6HOLD;
13020    input RXDFETAP6OVRDEN;
13021    input RXDFETAP7HOLD;
13022    input RXDFETAP7OVRDEN;
13023    input RXDFEUTHOLD;
13024    input RXDFEUTOVRDEN;
13025    input RXDFEVPHOLD;
13026    input RXDFEVPOVRDEN;
13027    input RXDFEVSEN;
13028    input RXDFEXYDEN;
13029    input RXDLYBYPASS;
13030    input RXDLYEN;
13031    input RXDLYOVRDEN;
13032    input RXDLYSRESET;
13033    input RXGEARBOXSLIP;
13034    input RXLPMEN;
13035    input RXLPMHFHOLD;
13036    input RXLPMHFOVRDEN;
13037    input RXLPMLFHOLD;
13038    input RXLPMLFKLOVRDEN;
13039    input RXMCOMMAALIGNEN;
13040    input RXOOBRESET;
13041    input RXOSCALRESET;
13042    input RXOSHOLD;
13043    input RXOSINTEN;
13044    input RXOSINTHOLD;
13045    input RXOSINTNTRLEN;
13046    input RXOSINTOVRDEN;
13047    input RXOSINTSTROBE;
13048    input RXOSINTTESTOVRDEN;
13049    input RXOSOVRDEN;
13050    input RXPCOMMAALIGNEN;
13051    input RXPCSRESET;
13052    input RXPHALIGN;
13053    input RXPHALIGNEN;
13054    input RXPHDLYPD;
13055    input RXPHDLYRESET;
13056    input RXPHOVRDEN;
13057    input RXPMARESET;
13058    input RXPOLARITY;
13059    input RXPRBSCNTRESET;
13060    input RXQPIEN;
13061    input RXRATEMODE;
13062    input RXSLIDE;
13063    input RXSYNCALLIN;
13064    input RXSYNCIN;
13065    input RXSYNCMODE;
13066    input RXUSERRDY;
13067    (* invertible_pin = "IS_RXUSRCLK2_INVERTED" *)
13068    input RXUSRCLK2;
13069    (* invertible_pin = "IS_RXUSRCLK_INVERTED" *)
13070    input RXUSRCLK;
13071    input SETERRSTATUS;
13072    (* invertible_pin = "IS_SIGVALIDCLK_INVERTED" *)
13073    input SIGVALIDCLK;
13074    input TX8B10BEN;
13075    input TXCOMINIT;
13076    input TXCOMSAS;
13077    input TXCOMWAKE;
13078    input TXDEEMPH;
13079    input TXDETECTRX;
13080    input TXDIFFPD;
13081    input TXDLYBYPASS;
13082    input TXDLYEN;
13083    input TXDLYHOLD;
13084    input TXDLYOVRDEN;
13085    input TXDLYSRESET;
13086    input TXDLYUPDOWN;
13087    input TXELECIDLE;
13088    input TXINHIBIT;
13089    input TXPCSRESET;
13090    input TXPDELECIDLEMODE;
13091    input TXPHALIGN;
13092    input TXPHALIGNEN;
13093    input TXPHDLYPD;
13094    input TXPHDLYRESET;
13095    (* invertible_pin = "IS_TXPHDLYTSTCLK_INVERTED" *)
13096    input TXPHDLYTSTCLK;
13097    input TXPHINIT;
13098    input TXPHOVRDEN;
13099    input TXPIPPMEN;
13100    input TXPIPPMOVRDEN;
13101    input TXPIPPMPD;
13102    input TXPIPPMSEL;
13103    input TXPISOPD;
13104    input TXPMARESET;
13105    input TXPOLARITY;
13106    input TXPOSTCURSORINV;
13107    input TXPRBSFORCEERR;
13108    input TXPRECURSORINV;
13109    input TXQPIBIASEN;
13110    input TXQPISTRONGPDOWN;
13111    input TXQPIWEAKPUP;
13112    input TXRATEMODE;
13113    input TXSTARTSEQ;
13114    input TXSWING;
13115    input TXSYNCALLIN;
13116    input TXSYNCIN;
13117    input TXSYNCMODE;
13118    input TXUSERRDY;
13119    (* invertible_pin = "IS_TXUSRCLK2_INVERTED" *)
13120    input TXUSRCLK2;
13121    (* invertible_pin = "IS_TXUSRCLK_INVERTED" *)
13122    input TXUSRCLK;
13123    input [13:0] RXADAPTSELTEST;
13124    input [15:0] DRPDI;
13125    input [15:0] GTRSVD;
13126    input [15:0] PCSRSVDIN;
13127    input [19:0] TSTIN;
13128    input [1:0] RXELECIDLEMODE;
13129    input [1:0] RXMONITORSEL;
13130    input [1:0] RXPD;
13131    input [1:0] RXSYSCLKSEL;
13132    input [1:0] TXPD;
13133    input [1:0] TXSYSCLKSEL;
13134    input [2:0] CPLLREFCLKSEL;
13135    input [2:0] LOOPBACK;
13136    input [2:0] RXCHBONDLEVEL;
13137    input [2:0] RXOUTCLKSEL;
13138    input [2:0] RXPRBSSEL;
13139    input [2:0] RXRATE;
13140    input [2:0] TXBUFDIFFCTRL;
13141    input [2:0] TXHEADER;
13142    input [2:0] TXMARGIN;
13143    input [2:0] TXOUTCLKSEL;
13144    input [2:0] TXPRBSSEL;
13145    input [2:0] TXRATE;
13146    input [3:0] RXOSINTCFG;
13147    input [3:0] RXOSINTID0;
13148    input [3:0] TXDIFFCTRL;
13149    input [4:0] PCSRSVDIN2;
13150    input [4:0] PMARSVDIN;
13151    input [4:0] RXCHBONDI;
13152    input [4:0] RXDFEAGCTRL;
13153    input [4:0] RXDFESLIDETAP;
13154    input [4:0] TXPIPPMSTEPSIZE;
13155    input [4:0] TXPOSTCURSOR;
13156    input [4:0] TXPRECURSOR;
13157    input [5:0] RXDFESLIDETAPID;
13158    input [63:0] TXDATA;
13159    input [6:0] TXMAINCURSOR;
13160    input [6:0] TXSEQUENCE;
13161    input [7:0] TX8B10BBYPASS;
13162    input [7:0] TXCHARDISPMODE;
13163    input [7:0] TXCHARDISPVAL;
13164    input [7:0] TXCHARISK;
13165    input [8:0] DRPADDR;
13166endmodule
13167
13168module GTHE2_COMMON (...);
13169    parameter [63:0] BIAS_CFG = 64'h0000040000001000;
13170    parameter [31:0] COMMON_CFG = 32'h0000001C;
13171    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
13172    parameter [0:0] IS_GTGREFCLK_INVERTED = 1'b0;
13173    parameter [0:0] IS_QPLLLOCKDETCLK_INVERTED = 1'b0;
13174    parameter [26:0] QPLL_CFG = 27'h0480181;
13175    parameter [3:0] QPLL_CLKOUT_CFG = 4'b0000;
13176    parameter [5:0] QPLL_COARSE_FREQ_OVRD = 6'b010000;
13177    parameter [0:0] QPLL_COARSE_FREQ_OVRD_EN = 1'b0;
13178    parameter [9:0] QPLL_CP = 10'b0000011111;
13179    parameter [0:0] QPLL_CP_MONITOR_EN = 1'b0;
13180    parameter [0:0] QPLL_DMONITOR_SEL = 1'b0;
13181    parameter [9:0] QPLL_FBDIV = 10'b0000000000;
13182    parameter [0:0] QPLL_FBDIV_MONITOR_EN = 1'b0;
13183    parameter [0:0] QPLL_FBDIV_RATIO = 1'b0;
13184    parameter [23:0] QPLL_INIT_CFG = 24'h000006;
13185    parameter [15:0] QPLL_LOCK_CFG = 16'h01E8;
13186    parameter [3:0] QPLL_LPF = 4'b1111;
13187    parameter integer QPLL_REFCLK_DIV = 2;
13188    parameter [0:0] QPLL_RP_COMP = 1'b0;
13189    parameter [1:0] QPLL_VTRL_RESET = 2'b00;
13190    parameter [1:0] RCAL_CFG = 2'b00;
13191    parameter [15:0] RSVD_ATTR0 = 16'h0000;
13192    parameter [15:0] RSVD_ATTR1 = 16'h0000;
13193    parameter [2:0] SIM_QPLLREFCLK_SEL = 3'b001;
13194    parameter SIM_RESET_SPEEDUP = "TRUE";
13195    parameter SIM_VERSION = "1.1";
13196    output DRPRDY;
13197    output QPLLFBCLKLOST;
13198    output QPLLLOCK;
13199    output QPLLOUTCLK;
13200    output QPLLOUTREFCLK;
13201    output QPLLREFCLKLOST;
13202    output REFCLKOUTMONITOR;
13203    output [15:0] DRPDO;
13204    output [15:0] PMARSVDOUT;
13205    output [7:0] QPLLDMONITOR;
13206    input BGBYPASSB;
13207    input BGMONITORENB;
13208    input BGPDB;
13209    input BGRCALOVRDENB;
13210    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
13211    input DRPCLK;
13212    input DRPEN;
13213    input DRPWE;
13214    (* invertible_pin = "IS_GTGREFCLK_INVERTED" *)
13215    input GTGREFCLK;
13216    input GTNORTHREFCLK0;
13217    input GTNORTHREFCLK1;
13218    input GTREFCLK0;
13219    input GTREFCLK1;
13220    input GTSOUTHREFCLK0;
13221    input GTSOUTHREFCLK1;
13222    (* invertible_pin = "IS_QPLLLOCKDETCLK_INVERTED" *)
13223    input QPLLLOCKDETCLK;
13224    input QPLLLOCKEN;
13225    input QPLLOUTRESET;
13226    input QPLLPD;
13227    input QPLLRESET;
13228    input RCALENB;
13229    input [15:0] DRPDI;
13230    input [15:0] QPLLRSVD1;
13231    input [2:0] QPLLREFCLKSEL;
13232    input [4:0] BGRCALOVRD;
13233    input [4:0] QPLLRSVD2;
13234    input [7:0] DRPADDR;
13235    input [7:0] PMARSVD;
13236endmodule
13237
13238module GTPE2_CHANNEL (...);
13239    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
13240    parameter [0:0] ACJTAG_MODE = 1'b0;
13241    parameter [0:0] ACJTAG_RESET = 1'b0;
13242    parameter [19:0] ADAPT_CFG0 = 20'b00000000000000000000;
13243    parameter ALIGN_COMMA_DOUBLE = "FALSE";
13244    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
13245    parameter integer ALIGN_COMMA_WORD = 1;
13246    parameter ALIGN_MCOMMA_DET = "TRUE";
13247    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
13248    parameter ALIGN_PCOMMA_DET = "TRUE";
13249    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
13250    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
13251    parameter [42:0] CFOK_CFG = 43'b1001001000000000000000001000000111010000000;
13252    parameter [6:0] CFOK_CFG2 = 7'b0100000;
13253    parameter [6:0] CFOK_CFG3 = 7'b0100000;
13254    parameter [0:0] CFOK_CFG4 = 1'b0;
13255    parameter [1:0] CFOK_CFG5 = 2'b00;
13256    parameter [3:0] CFOK_CFG6 = 4'b0000;
13257    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
13258    parameter integer CHAN_BOND_MAX_SKEW = 7;
13259    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
13260    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
13261    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
13262    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
13263    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
13264    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
13265    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
13266    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
13267    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
13268    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
13269    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
13270    parameter integer CHAN_BOND_SEQ_LEN = 1;
13271    parameter [0:0] CLK_COMMON_SWING = 1'b0;
13272    parameter CLK_CORRECT_USE = "TRUE";
13273    parameter CLK_COR_KEEP_IDLE = "FALSE";
13274    parameter integer CLK_COR_MAX_LAT = 20;
13275    parameter integer CLK_COR_MIN_LAT = 18;
13276    parameter CLK_COR_PRECEDENCE = "TRUE";
13277    parameter integer CLK_COR_REPEAT_WAIT = 0;
13278    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
13279    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
13280    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
13281    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
13282    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
13283    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
13284    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
13285    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
13286    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
13287    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
13288    parameter CLK_COR_SEQ_2_USE = "FALSE";
13289    parameter integer CLK_COR_SEQ_LEN = 1;
13290    parameter DEC_MCOMMA_DETECT = "TRUE";
13291    parameter DEC_PCOMMA_DETECT = "TRUE";
13292    parameter DEC_VALID_COMMA_ONLY = "TRUE";
13293    parameter [23:0] DMONITOR_CFG = 24'h000A00;
13294    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
13295    parameter [5:0] ES_CONTROL = 6'b000000;
13296    parameter ES_ERRDET_EN = "FALSE";
13297    parameter ES_EYE_SCAN_EN = "FALSE";
13298    parameter [11:0] ES_HORZ_OFFSET = 12'h010;
13299    parameter [9:0] ES_PMA_CFG = 10'b0000000000;
13300    parameter [4:0] ES_PRESCALE = 5'b00000;
13301    parameter [79:0] ES_QUALIFIER = 80'h00000000000000000000;
13302    parameter [79:0] ES_QUAL_MASK = 80'h00000000000000000000;
13303    parameter [79:0] ES_SDATA_MASK = 80'h00000000000000000000;
13304    parameter [8:0] ES_VERT_OFFSET = 9'b000000000;
13305    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
13306    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
13307    parameter FTS_LANE_DESKEW_EN = "FALSE";
13308    parameter [2:0] GEARBOX_MODE = 3'b000;
13309    parameter [0:0] IS_CLKRSVD0_INVERTED = 1'b0;
13310    parameter [0:0] IS_CLKRSVD1_INVERTED = 1'b0;
13311    parameter [0:0] IS_DMONITORCLK_INVERTED = 1'b0;
13312    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
13313    parameter [0:0] IS_RXUSRCLK2_INVERTED = 1'b0;
13314    parameter [0:0] IS_RXUSRCLK_INVERTED = 1'b0;
13315    parameter [0:0] IS_SIGVALIDCLK_INVERTED = 1'b0;
13316    parameter [0:0] IS_TXPHDLYTSTCLK_INVERTED = 1'b0;
13317    parameter [0:0] IS_TXUSRCLK2_INVERTED = 1'b0;
13318    parameter [0:0] IS_TXUSRCLK_INVERTED = 1'b0;
13319    parameter [0:0] LOOPBACK_CFG = 1'b0;
13320    parameter [1:0] OUTREFCLK_SEL_INV = 2'b11;
13321    parameter PCS_PCIE_EN = "FALSE";
13322    parameter [47:0] PCS_RSVD_ATTR = 48'h000000000000;
13323    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
13324    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
13325    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
13326    parameter [0:0] PMA_LOOPBACK_CFG = 1'b0;
13327    parameter [31:0] PMA_RSV = 32'h00000333;
13328    parameter [31:0] PMA_RSV2 = 32'h00002050;
13329    parameter [1:0] PMA_RSV3 = 2'b00;
13330    parameter [3:0] PMA_RSV4 = 4'b0000;
13331    parameter [0:0] PMA_RSV5 = 1'b0;
13332    parameter [0:0] PMA_RSV6 = 1'b0;
13333    parameter [0:0] PMA_RSV7 = 1'b0;
13334    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
13335    parameter RXBUF_ADDR_MODE = "FULL";
13336    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
13337    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
13338    parameter RXBUF_EN = "TRUE";
13339    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
13340    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
13341    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
13342    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
13343    parameter integer RXBUF_THRESH_OVFLW = 61;
13344    parameter RXBUF_THRESH_OVRD = "FALSE";
13345    parameter integer RXBUF_THRESH_UNDFLW = 4;
13346    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
13347    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
13348    parameter [82:0] RXCDR_CFG = 83'h0000107FE406001041010;
13349    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
13350    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
13351    parameter [5:0] RXCDR_LOCK_CFG = 6'b001001;
13352    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
13353    parameter [15:0] RXDLY_CFG = 16'h0010;
13354    parameter [8:0] RXDLY_LCFG = 9'h020;
13355    parameter [15:0] RXDLY_TAP_CFG = 16'h0000;
13356    parameter RXGEARBOX_EN = "FALSE";
13357    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
13358    parameter [6:0] RXLPMRESET_TIME = 7'b0001111;
13359    parameter [0:0] RXLPM_BIAS_STARTUP_DISABLE = 1'b0;
13360    parameter [3:0] RXLPM_CFG = 4'b0110;
13361    parameter [0:0] RXLPM_CFG1 = 1'b0;
13362    parameter [0:0] RXLPM_CM_CFG = 1'b0;
13363    parameter [8:0] RXLPM_GC_CFG = 9'b111100010;
13364    parameter [2:0] RXLPM_GC_CFG2 = 3'b001;
13365    parameter [13:0] RXLPM_HF_CFG = 14'b00001111110000;
13366    parameter [4:0] RXLPM_HF_CFG2 = 5'b01010;
13367    parameter [3:0] RXLPM_HF_CFG3 = 4'b0000;
13368    parameter [0:0] RXLPM_HOLD_DURING_EIDLE = 1'b0;
13369    parameter [0:0] RXLPM_INCM_CFG = 1'b0;
13370    parameter [0:0] RXLPM_IPCM_CFG = 1'b0;
13371    parameter [17:0] RXLPM_LF_CFG = 18'b000000001111110000;
13372    parameter [4:0] RXLPM_LF_CFG2 = 5'b01010;
13373    parameter [2:0] RXLPM_OSINT_CFG = 3'b100;
13374    parameter [6:0] RXOOB_CFG = 7'b0000110;
13375    parameter RXOOB_CLK_CFG = "PMA";
13376    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
13377    parameter [4:0] RXOSCALRESET_TIMEOUT = 5'b00000;
13378    parameter integer RXOUT_DIV = 2;
13379    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
13380    parameter [23:0] RXPHDLY_CFG = 24'h084000;
13381    parameter [23:0] RXPH_CFG = 24'hC00002;
13382    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
13383    parameter [2:0] RXPI_CFG0 = 3'b000;
13384    parameter [0:0] RXPI_CFG1 = 1'b0;
13385    parameter [0:0] RXPI_CFG2 = 1'b0;
13386    parameter [4:0] RXPMARESET_TIME = 5'b00011;
13387    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
13388    parameter integer RXSLIDE_AUTO_WAIT = 7;
13389    parameter RXSLIDE_MODE = "OFF";
13390    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
13391    parameter [0:0] RXSYNC_OVRD = 1'b0;
13392    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
13393    parameter [15:0] RX_BIAS_CFG = 16'b0000111100110011;
13394    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
13395    parameter integer RX_CLK25_DIV = 7;
13396    parameter [0:0] RX_CLKMUX_EN = 1'b1;
13397    parameter [1:0] RX_CM_SEL = 2'b11;
13398    parameter [3:0] RX_CM_TRIM = 4'b0100;
13399    parameter integer RX_DATA_WIDTH = 20;
13400    parameter [5:0] RX_DDI_SEL = 6'b000000;
13401    parameter [13:0] RX_DEBUG_CFG = 14'b00000000000000;
13402    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
13403    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
13404    parameter [12:0] RX_OS_CFG = 13'b0001111110000;
13405    parameter integer RX_SIG_VALID_DLY = 10;
13406    parameter RX_XCLK_SEL = "RXREC";
13407    parameter integer SAS_MAX_COM = 64;
13408    parameter integer SAS_MIN_COM = 36;
13409    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
13410    parameter [2:0] SATA_BURST_VAL = 3'b100;
13411    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
13412    parameter integer SATA_MAX_BURST = 8;
13413    parameter integer SATA_MAX_INIT = 21;
13414    parameter integer SATA_MAX_WAKE = 7;
13415    parameter integer SATA_MIN_BURST = 4;
13416    parameter integer SATA_MIN_INIT = 12;
13417    parameter integer SATA_MIN_WAKE = 4;
13418    parameter SATA_PLL_CFG = "VCO_3000MHZ";
13419    parameter SHOW_REALIGN_COMMA = "TRUE";
13420    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
13421    parameter SIM_RESET_SPEEDUP = "TRUE";
13422    parameter SIM_TX_EIDLE_DRIVE_LEVEL = "X";
13423    parameter SIM_VERSION = "1.0";
13424    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
13425    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
13426    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
13427    parameter [31:0] TST_RSV = 32'h00000000;
13428    parameter TXBUF_EN = "TRUE";
13429    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
13430    parameter [15:0] TXDLY_CFG = 16'h0010;
13431    parameter [8:0] TXDLY_LCFG = 9'h020;
13432    parameter [15:0] TXDLY_TAP_CFG = 16'h0000;
13433    parameter TXGEARBOX_EN = "FALSE";
13434    parameter [0:0] TXOOB_CFG = 1'b0;
13435    parameter integer TXOUT_DIV = 2;
13436    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
13437    parameter [23:0] TXPHDLY_CFG = 24'h084000;
13438    parameter [15:0] TXPH_CFG = 16'h0400;
13439    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
13440    parameter [1:0] TXPI_CFG0 = 2'b00;
13441    parameter [1:0] TXPI_CFG1 = 2'b00;
13442    parameter [1:0] TXPI_CFG2 = 2'b00;
13443    parameter [0:0] TXPI_CFG3 = 1'b0;
13444    parameter [0:0] TXPI_CFG4 = 1'b0;
13445    parameter [2:0] TXPI_CFG5 = 3'b000;
13446    parameter [0:0] TXPI_GREY_SEL = 1'b0;
13447    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
13448    parameter TXPI_PPMCLK_SEL = "TXUSRCLK2";
13449    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
13450    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
13451    parameter [4:0] TXPMARESET_TIME = 5'b00001;
13452    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
13453    parameter [0:0] TXSYNC_OVRD = 1'b0;
13454    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
13455    parameter integer TX_CLK25_DIV = 7;
13456    parameter [0:0] TX_CLKMUX_EN = 1'b1;
13457    parameter integer TX_DATA_WIDTH = 20;
13458    parameter [5:0] TX_DEEMPH0 = 6'b000000;
13459    parameter [5:0] TX_DEEMPH1 = 6'b000000;
13460    parameter TX_DRIVE_MODE = "DIRECT";
13461    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
13462    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
13463    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
13464    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
13465    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
13466    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
13467    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
13468    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
13469    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
13470    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
13471    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
13472    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
13473    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
13474    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
13475    parameter [0:0] TX_PREDRIVER_MODE = 1'b0;
13476    parameter [13:0] TX_RXDETECT_CFG = 14'h1832;
13477    parameter [2:0] TX_RXDETECT_REF = 3'b100;
13478    parameter TX_XCLK_SEL = "TXUSR";
13479    parameter [0:0] UCODEER_CLR = 1'b0;
13480    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
13481    output DRPRDY;
13482    output EYESCANDATAERROR;
13483    output GTPTXN;
13484    output GTPTXP;
13485    output PHYSTATUS;
13486    output PMARSVDOUT0;
13487    output PMARSVDOUT1;
13488    output RXBYTEISALIGNED;
13489    output RXBYTEREALIGN;
13490    output RXCDRLOCK;
13491    output RXCHANBONDSEQ;
13492    output RXCHANISALIGNED;
13493    output RXCHANREALIGN;
13494    output RXCOMINITDET;
13495    output RXCOMMADET;
13496    output RXCOMSASDET;
13497    output RXCOMWAKEDET;
13498    output RXDLYSRESETDONE;
13499    output RXELECIDLE;
13500    output RXHEADERVALID;
13501    output RXOSINTDONE;
13502    output RXOSINTSTARTED;
13503    output RXOSINTSTROBEDONE;
13504    output RXOSINTSTROBESTARTED;
13505    output RXOUTCLK;
13506    output RXOUTCLKFABRIC;
13507    output RXOUTCLKPCS;
13508    output RXPHALIGNDONE;
13509    output RXPMARESETDONE;
13510    output RXPRBSERR;
13511    output RXRATEDONE;
13512    output RXRESETDONE;
13513    output RXSYNCDONE;
13514    output RXSYNCOUT;
13515    output RXVALID;
13516    output TXCOMFINISH;
13517    output TXDLYSRESETDONE;
13518    output TXGEARBOXREADY;
13519    output TXOUTCLK;
13520    output TXOUTCLKFABRIC;
13521    output TXOUTCLKPCS;
13522    output TXPHALIGNDONE;
13523    output TXPHINITDONE;
13524    output TXPMARESETDONE;
13525    output TXRATEDONE;
13526    output TXRESETDONE;
13527    output TXSYNCDONE;
13528    output TXSYNCOUT;
13529    output [14:0] DMONITOROUT;
13530    output [15:0] DRPDO;
13531    output [15:0] PCSRSVDOUT;
13532    output [1:0] RXCLKCORCNT;
13533    output [1:0] RXDATAVALID;
13534    output [1:0] RXSTARTOFSEQ;
13535    output [1:0] TXBUFSTATUS;
13536    output [2:0] RXBUFSTATUS;
13537    output [2:0] RXHEADER;
13538    output [2:0] RXSTATUS;
13539    output [31:0] RXDATA;
13540    output [3:0] RXCHARISCOMMA;
13541    output [3:0] RXCHARISK;
13542    output [3:0] RXCHBONDO;
13543    output [3:0] RXDISPERR;
13544    output [3:0] RXNOTINTABLE;
13545    output [4:0] RXPHMONITOR;
13546    output [4:0] RXPHSLIPMONITOR;
13547    input CFGRESET;
13548    (* invertible_pin = "IS_CLKRSVD0_INVERTED" *)
13549    input CLKRSVD0;
13550    (* invertible_pin = "IS_CLKRSVD1_INVERTED" *)
13551    input CLKRSVD1;
13552    input DMONFIFORESET;
13553    (* invertible_pin = "IS_DMONITORCLK_INVERTED" *)
13554    input DMONITORCLK;
13555    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
13556    input DRPCLK;
13557    input DRPEN;
13558    input DRPWE;
13559    input EYESCANMODE;
13560    input EYESCANRESET;
13561    input EYESCANTRIGGER;
13562    input GTPRXN;
13563    input GTPRXP;
13564    input GTRESETSEL;
13565    input GTRXRESET;
13566    input GTTXRESET;
13567    input PLL0CLK;
13568    input PLL0REFCLK;
13569    input PLL1CLK;
13570    input PLL1REFCLK;
13571    input PMARSVDIN0;
13572    input PMARSVDIN1;
13573    input PMARSVDIN2;
13574    input PMARSVDIN3;
13575    input PMARSVDIN4;
13576    input RESETOVRD;
13577    input RX8B10BEN;
13578    input RXBUFRESET;
13579    input RXCDRFREQRESET;
13580    input RXCDRHOLD;
13581    input RXCDROVRDEN;
13582    input RXCDRRESET;
13583    input RXCDRRESETRSV;
13584    input RXCHBONDEN;
13585    input RXCHBONDMASTER;
13586    input RXCHBONDSLAVE;
13587    input RXCOMMADETEN;
13588    input RXDDIEN;
13589    input RXDFEXYDEN;
13590    input RXDLYBYPASS;
13591    input RXDLYEN;
13592    input RXDLYOVRDEN;
13593    input RXDLYSRESET;
13594    input RXGEARBOXSLIP;
13595    input RXLPMHFHOLD;
13596    input RXLPMHFOVRDEN;
13597    input RXLPMLFHOLD;
13598    input RXLPMLFOVRDEN;
13599    input RXLPMOSINTNTRLEN;
13600    input RXLPMRESET;
13601    input RXMCOMMAALIGNEN;
13602    input RXOOBRESET;
13603    input RXOSCALRESET;
13604    input RXOSHOLD;
13605    input RXOSINTEN;
13606    input RXOSINTHOLD;
13607    input RXOSINTNTRLEN;
13608    input RXOSINTOVRDEN;
13609    input RXOSINTPD;
13610    input RXOSINTSTROBE;
13611    input RXOSINTTESTOVRDEN;
13612    input RXOSOVRDEN;
13613    input RXPCOMMAALIGNEN;
13614    input RXPCSRESET;
13615    input RXPHALIGN;
13616    input RXPHALIGNEN;
13617    input RXPHDLYPD;
13618    input RXPHDLYRESET;
13619    input RXPHOVRDEN;
13620    input RXPMARESET;
13621    input RXPOLARITY;
13622    input RXPRBSCNTRESET;
13623    input RXRATEMODE;
13624    input RXSLIDE;
13625    input RXSYNCALLIN;
13626    input RXSYNCIN;
13627    input RXSYNCMODE;
13628    input RXUSERRDY;
13629    (* invertible_pin = "IS_RXUSRCLK2_INVERTED" *)
13630    input RXUSRCLK2;
13631    (* invertible_pin = "IS_RXUSRCLK_INVERTED" *)
13632    input RXUSRCLK;
13633    input SETERRSTATUS;
13634    (* invertible_pin = "IS_SIGVALIDCLK_INVERTED" *)
13635    input SIGVALIDCLK;
13636    input TX8B10BEN;
13637    input TXCOMINIT;
13638    input TXCOMSAS;
13639    input TXCOMWAKE;
13640    input TXDEEMPH;
13641    input TXDETECTRX;
13642    input TXDIFFPD;
13643    input TXDLYBYPASS;
13644    input TXDLYEN;
13645    input TXDLYHOLD;
13646    input TXDLYOVRDEN;
13647    input TXDLYSRESET;
13648    input TXDLYUPDOWN;
13649    input TXELECIDLE;
13650    input TXINHIBIT;
13651    input TXPCSRESET;
13652    input TXPDELECIDLEMODE;
13653    input TXPHALIGN;
13654    input TXPHALIGNEN;
13655    input TXPHDLYPD;
13656    input TXPHDLYRESET;
13657    (* invertible_pin = "IS_TXPHDLYTSTCLK_INVERTED" *)
13658    input TXPHDLYTSTCLK;
13659    input TXPHINIT;
13660    input TXPHOVRDEN;
13661    input TXPIPPMEN;
13662    input TXPIPPMOVRDEN;
13663    input TXPIPPMPD;
13664    input TXPIPPMSEL;
13665    input TXPISOPD;
13666    input TXPMARESET;
13667    input TXPOLARITY;
13668    input TXPOSTCURSORINV;
13669    input TXPRBSFORCEERR;
13670    input TXPRECURSORINV;
13671    input TXRATEMODE;
13672    input TXSTARTSEQ;
13673    input TXSWING;
13674    input TXSYNCALLIN;
13675    input TXSYNCIN;
13676    input TXSYNCMODE;
13677    input TXUSERRDY;
13678    (* invertible_pin = "IS_TXUSRCLK2_INVERTED" *)
13679    input TXUSRCLK2;
13680    (* invertible_pin = "IS_TXUSRCLK_INVERTED" *)
13681    input TXUSRCLK;
13682    input [13:0] RXADAPTSELTEST;
13683    input [15:0] DRPDI;
13684    input [15:0] GTRSVD;
13685    input [15:0] PCSRSVDIN;
13686    input [19:0] TSTIN;
13687    input [1:0] RXELECIDLEMODE;
13688    input [1:0] RXPD;
13689    input [1:0] RXSYSCLKSEL;
13690    input [1:0] TXPD;
13691    input [1:0] TXSYSCLKSEL;
13692    input [2:0] LOOPBACK;
13693    input [2:0] RXCHBONDLEVEL;
13694    input [2:0] RXOUTCLKSEL;
13695    input [2:0] RXPRBSSEL;
13696    input [2:0] RXRATE;
13697    input [2:0] TXBUFDIFFCTRL;
13698    input [2:0] TXHEADER;
13699    input [2:0] TXMARGIN;
13700    input [2:0] TXOUTCLKSEL;
13701    input [2:0] TXPRBSSEL;
13702    input [2:0] TXRATE;
13703    input [31:0] TXDATA;
13704    input [3:0] RXCHBONDI;
13705    input [3:0] RXOSINTCFG;
13706    input [3:0] RXOSINTID0;
13707    input [3:0] TX8B10BBYPASS;
13708    input [3:0] TXCHARDISPMODE;
13709    input [3:0] TXCHARDISPVAL;
13710    input [3:0] TXCHARISK;
13711    input [3:0] TXDIFFCTRL;
13712    input [4:0] TXPIPPMSTEPSIZE;
13713    input [4:0] TXPOSTCURSOR;
13714    input [4:0] TXPRECURSOR;
13715    input [6:0] TXMAINCURSOR;
13716    input [6:0] TXSEQUENCE;
13717    input [8:0] DRPADDR;
13718endmodule
13719
13720module GTPE2_COMMON (...);
13721    parameter [63:0] BIAS_CFG = 64'h0000000000000000;
13722    parameter [31:0] COMMON_CFG = 32'h00000000;
13723    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
13724    parameter [0:0] IS_GTGREFCLK0_INVERTED = 1'b0;
13725    parameter [0:0] IS_GTGREFCLK1_INVERTED = 1'b0;
13726    parameter [0:0] IS_PLL0LOCKDETCLK_INVERTED = 1'b0;
13727    parameter [0:0] IS_PLL1LOCKDETCLK_INVERTED = 1'b0;
13728    parameter [26:0] PLL0_CFG = 27'h01F03DC;
13729    parameter [0:0] PLL0_DMON_CFG = 1'b0;
13730    parameter integer PLL0_FBDIV = 4;
13731    parameter integer PLL0_FBDIV_45 = 5;
13732    parameter [23:0] PLL0_INIT_CFG = 24'h00001E;
13733    parameter [8:0] PLL0_LOCK_CFG = 9'h1E8;
13734    parameter integer PLL0_REFCLK_DIV = 1;
13735    parameter [26:0] PLL1_CFG = 27'h01F03DC;
13736    parameter [0:0] PLL1_DMON_CFG = 1'b0;
13737    parameter integer PLL1_FBDIV = 4;
13738    parameter integer PLL1_FBDIV_45 = 5;
13739    parameter [23:0] PLL1_INIT_CFG = 24'h00001E;
13740    parameter [8:0] PLL1_LOCK_CFG = 9'h1E8;
13741    parameter integer PLL1_REFCLK_DIV = 1;
13742    parameter [7:0] PLL_CLKOUT_CFG = 8'b00000000;
13743    parameter [15:0] RSVD_ATTR0 = 16'h0000;
13744    parameter [15:0] RSVD_ATTR1 = 16'h0000;
13745    parameter [2:0] SIM_PLL0REFCLK_SEL = 3'b001;
13746    parameter [2:0] SIM_PLL1REFCLK_SEL = 3'b001;
13747    parameter SIM_RESET_SPEEDUP = "TRUE";
13748    parameter SIM_VERSION = "1.0";
13749    output DRPRDY;
13750    output PLL0FBCLKLOST;
13751    output PLL0LOCK;
13752    output PLL0OUTCLK;
13753    output PLL0OUTREFCLK;
13754    output PLL0REFCLKLOST;
13755    output PLL1FBCLKLOST;
13756    output PLL1LOCK;
13757    output PLL1OUTCLK;
13758    output PLL1OUTREFCLK;
13759    output PLL1REFCLKLOST;
13760    output REFCLKOUTMONITOR0;
13761    output REFCLKOUTMONITOR1;
13762    output [15:0] DRPDO;
13763    output [15:0] PMARSVDOUT;
13764    output [7:0] DMONITOROUT;
13765    input BGBYPASSB;
13766    input BGMONITORENB;
13767    input BGPDB;
13768    input BGRCALOVRDENB;
13769    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
13770    input DRPCLK;
13771    input DRPEN;
13772    input DRPWE;
13773    input GTEASTREFCLK0;
13774    input GTEASTREFCLK1;
13775    (* invertible_pin = "IS_GTGREFCLK0_INVERTED" *)
13776    input GTGREFCLK0;
13777    (* invertible_pin = "IS_GTGREFCLK1_INVERTED" *)
13778    input GTGREFCLK1;
13779    input GTREFCLK0;
13780    input GTREFCLK1;
13781    input GTWESTREFCLK0;
13782    input GTWESTREFCLK1;
13783    (* invertible_pin = "IS_PLL0LOCKDETCLK_INVERTED" *)
13784    input PLL0LOCKDETCLK;
13785    input PLL0LOCKEN;
13786    input PLL0PD;
13787    input PLL0RESET;
13788    (* invertible_pin = "IS_PLL1LOCKDETCLK_INVERTED" *)
13789    input PLL1LOCKDETCLK;
13790    input PLL1LOCKEN;
13791    input PLL1PD;
13792    input PLL1RESET;
13793    input RCALENB;
13794    input [15:0] DRPDI;
13795    input [15:0] PLLRSVD1;
13796    input [2:0] PLL0REFCLKSEL;
13797    input [2:0] PLL1REFCLKSEL;
13798    input [4:0] BGRCALOVRD;
13799    input [4:0] PLLRSVD2;
13800    input [7:0] DRPADDR;
13801    input [7:0] PMARSVD;
13802endmodule
13803
13804module GTXE2_CHANNEL (...);
13805    parameter ALIGN_COMMA_DOUBLE = "FALSE";
13806    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
13807    parameter integer ALIGN_COMMA_WORD = 1;
13808    parameter ALIGN_MCOMMA_DET = "TRUE";
13809    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
13810    parameter ALIGN_PCOMMA_DET = "TRUE";
13811    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
13812    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
13813    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
13814    parameter integer CHAN_BOND_MAX_SKEW = 7;
13815    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
13816    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
13817    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
13818    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
13819    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
13820    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
13821    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
13822    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
13823    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
13824    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
13825    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
13826    parameter integer CHAN_BOND_SEQ_LEN = 1;
13827    parameter CLK_CORRECT_USE = "TRUE";
13828    parameter CLK_COR_KEEP_IDLE = "FALSE";
13829    parameter integer CLK_COR_MAX_LAT = 20;
13830    parameter integer CLK_COR_MIN_LAT = 18;
13831    parameter CLK_COR_PRECEDENCE = "TRUE";
13832    parameter integer CLK_COR_REPEAT_WAIT = 0;
13833    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
13834    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
13835    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
13836    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
13837    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
13838    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
13839    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
13840    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
13841    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
13842    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
13843    parameter CLK_COR_SEQ_2_USE = "FALSE";
13844    parameter integer CLK_COR_SEQ_LEN = 1;
13845    parameter [23:0] CPLL_CFG = 24'hB007D8;
13846    parameter integer CPLL_FBDIV = 4;
13847    parameter integer CPLL_FBDIV_45 = 5;
13848    parameter [23:0] CPLL_INIT_CFG = 24'h00001E;
13849    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
13850    parameter integer CPLL_REFCLK_DIV = 1;
13851    parameter DEC_MCOMMA_DETECT = "TRUE";
13852    parameter DEC_PCOMMA_DETECT = "TRUE";
13853    parameter DEC_VALID_COMMA_ONLY = "TRUE";
13854    parameter [23:0] DMONITOR_CFG = 24'h000A00;
13855    parameter [5:0] ES_CONTROL = 6'b000000;
13856    parameter ES_ERRDET_EN = "FALSE";
13857    parameter ES_EYE_SCAN_EN = "FALSE";
13858    parameter [11:0] ES_HORZ_OFFSET = 12'h000;
13859    parameter [9:0] ES_PMA_CFG = 10'b0000000000;
13860    parameter [4:0] ES_PRESCALE = 5'b00000;
13861    parameter [79:0] ES_QUALIFIER = 80'h00000000000000000000;
13862    parameter [79:0] ES_QUAL_MASK = 80'h00000000000000000000;
13863    parameter [79:0] ES_SDATA_MASK = 80'h00000000000000000000;
13864    parameter [8:0] ES_VERT_OFFSET = 9'b000000000;
13865    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
13866    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
13867    parameter FTS_LANE_DESKEW_EN = "FALSE";
13868    parameter [2:0] GEARBOX_MODE = 3'b000;
13869    parameter [0:0] IS_CPLLLOCKDETCLK_INVERTED = 1'b0;
13870    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
13871    parameter [0:0] IS_GTGREFCLK_INVERTED = 1'b0;
13872    parameter [0:0] IS_RXUSRCLK2_INVERTED = 1'b0;
13873    parameter [0:0] IS_RXUSRCLK_INVERTED = 1'b0;
13874    parameter [0:0] IS_TXPHDLYTSTCLK_INVERTED = 1'b0;
13875    parameter [0:0] IS_TXUSRCLK2_INVERTED = 1'b0;
13876    parameter [0:0] IS_TXUSRCLK_INVERTED = 1'b0;
13877    parameter [1:0] OUTREFCLK_SEL_INV = 2'b11;
13878    parameter PCS_PCIE_EN = "FALSE";
13879    parameter [47:0] PCS_RSVD_ATTR = 48'h000000000000;
13880    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
13881    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
13882    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
13883    parameter [31:0] PMA_RSV = 32'h00000000;
13884    parameter [15:0] PMA_RSV2 = 16'h2050;
13885    parameter [1:0] PMA_RSV3 = 2'b00;
13886    parameter [31:0] PMA_RSV4 = 32'h00000000;
13887    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
13888    parameter RXBUF_ADDR_MODE = "FULL";
13889    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
13890    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
13891    parameter RXBUF_EN = "TRUE";
13892    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
13893    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
13894    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
13895    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
13896    parameter integer RXBUF_THRESH_OVFLW = 61;
13897    parameter RXBUF_THRESH_OVRD = "FALSE";
13898    parameter integer RXBUF_THRESH_UNDFLW = 4;
13899    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
13900    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
13901    parameter [71:0] RXCDR_CFG = 72'h0B000023FF20400020;
13902    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
13903    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
13904    parameter [5:0] RXCDR_LOCK_CFG = 6'b010101;
13905    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
13906    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
13907    parameter [15:0] RXDLY_CFG = 16'h001F;
13908    parameter [8:0] RXDLY_LCFG = 9'h030;
13909    parameter [15:0] RXDLY_TAP_CFG = 16'h0000;
13910    parameter RXGEARBOX_EN = "FALSE";
13911    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
13912    parameter [13:0] RXLPM_HF_CFG = 14'b00000011110000;
13913    parameter [13:0] RXLPM_LF_CFG = 14'b00000011110000;
13914    parameter [6:0] RXOOB_CFG = 7'b0000110;
13915    parameter integer RXOUT_DIV = 2;
13916    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
13917    parameter [23:0] RXPHDLY_CFG = 24'h084020;
13918    parameter [23:0] RXPH_CFG = 24'h000000;
13919    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
13920    parameter [4:0] RXPMARESET_TIME = 5'b00011;
13921    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
13922    parameter integer RXSLIDE_AUTO_WAIT = 7;
13923    parameter RXSLIDE_MODE = "OFF";
13924    parameter [11:0] RX_BIAS_CFG = 12'b000000000000;
13925    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
13926    parameter integer RX_CLK25_DIV = 7;
13927    parameter [0:0] RX_CLKMUX_PD = 1'b1;
13928    parameter [1:0] RX_CM_SEL = 2'b11;
13929    parameter [2:0] RX_CM_TRIM = 3'b100;
13930    parameter integer RX_DATA_WIDTH = 20;
13931    parameter [5:0] RX_DDI_SEL = 6'b000000;
13932    parameter [11:0] RX_DEBUG_CFG = 12'b000000000000;
13933    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
13934    parameter [22:0] RX_DFE_GAIN_CFG = 23'h180E0F;
13935    parameter [11:0] RX_DFE_H2_CFG = 12'b000111100000;
13936    parameter [11:0] RX_DFE_H3_CFG = 12'b000111100000;
13937    parameter [10:0] RX_DFE_H4_CFG = 11'b00011110000;
13938    parameter [10:0] RX_DFE_H5_CFG = 11'b00011110000;
13939    parameter [12:0] RX_DFE_KL_CFG = 13'b0001111110000;
13940    parameter [31:0] RX_DFE_KL_CFG2 = 32'h3008E56A;
13941    parameter [15:0] RX_DFE_LPM_CFG = 16'h0904;
13942    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
13943    parameter [16:0] RX_DFE_UT_CFG = 17'b00111111000000000;
13944    parameter [16:0] RX_DFE_VP_CFG = 17'b00011111100000000;
13945    parameter [12:0] RX_DFE_XYD_CFG = 13'b0000000010000;
13946    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
13947    parameter integer RX_INT_DATAWIDTH = 0;
13948    parameter [12:0] RX_OS_CFG = 13'b0001111110000;
13949    parameter integer RX_SIG_VALID_DLY = 10;
13950    parameter RX_XCLK_SEL = "RXREC";
13951    parameter integer SAS_MAX_COM = 64;
13952    parameter integer SAS_MIN_COM = 36;
13953    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
13954    parameter [2:0] SATA_BURST_VAL = 3'b100;
13955    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
13956    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
13957    parameter integer SATA_MAX_BURST = 8;
13958    parameter integer SATA_MAX_INIT = 21;
13959    parameter integer SATA_MAX_WAKE = 7;
13960    parameter integer SATA_MIN_BURST = 4;
13961    parameter integer SATA_MIN_INIT = 12;
13962    parameter integer SATA_MIN_WAKE = 4;
13963    parameter SHOW_REALIGN_COMMA = "TRUE";
13964    parameter [2:0] SIM_CPLLREFCLK_SEL = 3'b001;
13965    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
13966    parameter SIM_RESET_SPEEDUP = "TRUE";
13967    parameter SIM_TX_EIDLE_DRIVE_LEVEL = "X";
13968    parameter SIM_VERSION = "4.0";
13969    parameter [4:0] TERM_RCAL_CFG = 5'b10000;
13970    parameter [0:0] TERM_RCAL_OVRD = 1'b0;
13971    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
13972    parameter [31:0] TST_RSV = 32'h00000000;
13973    parameter TXBUF_EN = "TRUE";
13974    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
13975    parameter [15:0] TXDLY_CFG = 16'h001F;
13976    parameter [8:0] TXDLY_LCFG = 9'h030;
13977    parameter [15:0] TXDLY_TAP_CFG = 16'h0000;
13978    parameter TXGEARBOX_EN = "FALSE";
13979    parameter integer TXOUT_DIV = 2;
13980    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
13981    parameter [23:0] TXPHDLY_CFG = 24'h084020;
13982    parameter [15:0] TXPH_CFG = 16'h0780;
13983    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
13984    parameter [4:0] TXPMARESET_TIME = 5'b00001;
13985    parameter integer TX_CLK25_DIV = 7;
13986    parameter [0:0] TX_CLKMUX_PD = 1'b1;
13987    parameter integer TX_DATA_WIDTH = 20;
13988    parameter [4:0] TX_DEEMPH0 = 5'b00000;
13989    parameter [4:0] TX_DEEMPH1 = 5'b00000;
13990    parameter TX_DRIVE_MODE = "DIRECT";
13991    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
13992    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
13993    parameter integer TX_INT_DATAWIDTH = 0;
13994    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
13995    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
13996    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
13997    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
13998    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
13999    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
14000    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
14001    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
14002    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
14003    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
14004    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
14005    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
14006    parameter [0:0] TX_PREDRIVER_MODE = 1'b0;
14007    parameter [0:0] TX_QPI_STATUS_EN = 1'b0;
14008    parameter [13:0] TX_RXDETECT_CFG = 14'h1832;
14009    parameter [2:0] TX_RXDETECT_REF = 3'b100;
14010    parameter TX_XCLK_SEL = "TXUSR";
14011    parameter [0:0] UCODEER_CLR = 1'b0;
14012    output CPLLFBCLKLOST;
14013    output CPLLLOCK;
14014    output CPLLREFCLKLOST;
14015    output DRPRDY;
14016    output EYESCANDATAERROR;
14017    output GTREFCLKMONITOR;
14018    output GTXTXN;
14019    output GTXTXP;
14020    output PHYSTATUS;
14021    output RXBYTEISALIGNED;
14022    output RXBYTEREALIGN;
14023    output RXCDRLOCK;
14024    output RXCHANBONDSEQ;
14025    output RXCHANISALIGNED;
14026    output RXCHANREALIGN;
14027    output RXCOMINITDET;
14028    output RXCOMMADET;
14029    output RXCOMSASDET;
14030    output RXCOMWAKEDET;
14031    output RXDATAVALID;
14032    output RXDLYSRESETDONE;
14033    output RXELECIDLE;
14034    output RXHEADERVALID;
14035    output RXOUTCLK;
14036    output RXOUTCLKFABRIC;
14037    output RXOUTCLKPCS;
14038    output RXPHALIGNDONE;
14039    output RXPRBSERR;
14040    output RXQPISENN;
14041    output RXQPISENP;
14042    output RXRATEDONE;
14043    output RXRESETDONE;
14044    output RXSTARTOFSEQ;
14045    output RXVALID;
14046    output TXCOMFINISH;
14047    output TXDLYSRESETDONE;
14048    output TXGEARBOXREADY;
14049    output TXOUTCLK;
14050    output TXOUTCLKFABRIC;
14051    output TXOUTCLKPCS;
14052    output TXPHALIGNDONE;
14053    output TXPHINITDONE;
14054    output TXQPISENN;
14055    output TXQPISENP;
14056    output TXRATEDONE;
14057    output TXRESETDONE;
14058    output [15:0] DRPDO;
14059    output [15:0] PCSRSVDOUT;
14060    output [1:0] RXCLKCORCNT;
14061    output [1:0] TXBUFSTATUS;
14062    output [2:0] RXBUFSTATUS;
14063    output [2:0] RXHEADER;
14064    output [2:0] RXSTATUS;
14065    output [4:0] RXCHBONDO;
14066    output [4:0] RXPHMONITOR;
14067    output [4:0] RXPHSLIPMONITOR;
14068    output [63:0] RXDATA;
14069    output [6:0] RXMONITOROUT;
14070    output [7:0] DMONITOROUT;
14071    output [7:0] RXCHARISCOMMA;
14072    output [7:0] RXCHARISK;
14073    output [7:0] RXDISPERR;
14074    output [7:0] RXNOTINTABLE;
14075    output [9:0] TSTOUT;
14076    input CFGRESET;
14077    (* invertible_pin = "IS_CPLLLOCKDETCLK_INVERTED" *)
14078    input CPLLLOCKDETCLK;
14079    input CPLLLOCKEN;
14080    input CPLLPD;
14081    input CPLLRESET;
14082    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
14083    input DRPCLK;
14084    input DRPEN;
14085    input DRPWE;
14086    input EYESCANMODE;
14087    input EYESCANRESET;
14088    input EYESCANTRIGGER;
14089    (* invertible_pin = "IS_GTGREFCLK_INVERTED" *)
14090    input GTGREFCLK;
14091    input GTNORTHREFCLK0;
14092    input GTNORTHREFCLK1;
14093    input GTREFCLK0;
14094    input GTREFCLK1;
14095    input GTRESETSEL;
14096    input GTRXRESET;
14097    input GTSOUTHREFCLK0;
14098    input GTSOUTHREFCLK1;
14099    input GTTXRESET;
14100    input GTXRXN;
14101    input GTXRXP;
14102    input QPLLCLK;
14103    input QPLLREFCLK;
14104    input RESETOVRD;
14105    input RX8B10BEN;
14106    input RXBUFRESET;
14107    input RXCDRFREQRESET;
14108    input RXCDRHOLD;
14109    input RXCDROVRDEN;
14110    input RXCDRRESET;
14111    input RXCDRRESETRSV;
14112    input RXCHBONDEN;
14113    input RXCHBONDMASTER;
14114    input RXCHBONDSLAVE;
14115    input RXCOMMADETEN;
14116    input RXDDIEN;
14117    input RXDFEAGCHOLD;
14118    input RXDFEAGCOVRDEN;
14119    input RXDFECM1EN;
14120    input RXDFELFHOLD;
14121    input RXDFELFOVRDEN;
14122    input RXDFELPMRESET;
14123    input RXDFETAP2HOLD;
14124    input RXDFETAP2OVRDEN;
14125    input RXDFETAP3HOLD;
14126    input RXDFETAP3OVRDEN;
14127    input RXDFETAP4HOLD;
14128    input RXDFETAP4OVRDEN;
14129    input RXDFETAP5HOLD;
14130    input RXDFETAP5OVRDEN;
14131    input RXDFEUTHOLD;
14132    input RXDFEUTOVRDEN;
14133    input RXDFEVPHOLD;
14134    input RXDFEVPOVRDEN;
14135    input RXDFEVSEN;
14136    input RXDFEXYDEN;
14137    input RXDFEXYDHOLD;
14138    input RXDFEXYDOVRDEN;
14139    input RXDLYBYPASS;
14140    input RXDLYEN;
14141    input RXDLYOVRDEN;
14142    input RXDLYSRESET;
14143    input RXGEARBOXSLIP;
14144    input RXLPMEN;
14145    input RXLPMHFHOLD;
14146    input RXLPMHFOVRDEN;
14147    input RXLPMLFHOLD;
14148    input RXLPMLFKLOVRDEN;
14149    input RXMCOMMAALIGNEN;
14150    input RXOOBRESET;
14151    input RXOSHOLD;
14152    input RXOSOVRDEN;
14153    input RXPCOMMAALIGNEN;
14154    input RXPCSRESET;
14155    input RXPHALIGN;
14156    input RXPHALIGNEN;
14157    input RXPHDLYPD;
14158    input RXPHDLYRESET;
14159    input RXPHOVRDEN;
14160    input RXPMARESET;
14161    input RXPOLARITY;
14162    input RXPRBSCNTRESET;
14163    input RXQPIEN;
14164    input RXSLIDE;
14165    input RXUSERRDY;
14166    (* invertible_pin = "IS_RXUSRCLK2_INVERTED" *)
14167    input RXUSRCLK2;
14168    (* invertible_pin = "IS_RXUSRCLK_INVERTED" *)
14169    input RXUSRCLK;
14170    input SETERRSTATUS;
14171    input TX8B10BEN;
14172    input TXCOMINIT;
14173    input TXCOMSAS;
14174    input TXCOMWAKE;
14175    input TXDEEMPH;
14176    input TXDETECTRX;
14177    input TXDIFFPD;
14178    input TXDLYBYPASS;
14179    input TXDLYEN;
14180    input TXDLYHOLD;
14181    input TXDLYOVRDEN;
14182    input TXDLYSRESET;
14183    input TXDLYUPDOWN;
14184    input TXELECIDLE;
14185    input TXINHIBIT;
14186    input TXPCSRESET;
14187    input TXPDELECIDLEMODE;
14188    input TXPHALIGN;
14189    input TXPHALIGNEN;
14190    input TXPHDLYPD;
14191    input TXPHDLYRESET;
14192    (* invertible_pin = "IS_TXPHDLYTSTCLK_INVERTED" *)
14193    input TXPHDLYTSTCLK;
14194    input TXPHINIT;
14195    input TXPHOVRDEN;
14196    input TXPISOPD;
14197    input TXPMARESET;
14198    input TXPOLARITY;
14199    input TXPOSTCURSORINV;
14200    input TXPRBSFORCEERR;
14201    input TXPRECURSORINV;
14202    input TXQPIBIASEN;
14203    input TXQPISTRONGPDOWN;
14204    input TXQPIWEAKPUP;
14205    input TXSTARTSEQ;
14206    input TXSWING;
14207    input TXUSERRDY;
14208    (* invertible_pin = "IS_TXUSRCLK2_INVERTED" *)
14209    input TXUSRCLK2;
14210    (* invertible_pin = "IS_TXUSRCLK_INVERTED" *)
14211    input TXUSRCLK;
14212    input [15:0] DRPDI;
14213    input [15:0] GTRSVD;
14214    input [15:0] PCSRSVDIN;
14215    input [19:0] TSTIN;
14216    input [1:0] RXELECIDLEMODE;
14217    input [1:0] RXMONITORSEL;
14218    input [1:0] RXPD;
14219    input [1:0] RXSYSCLKSEL;
14220    input [1:0] TXPD;
14221    input [1:0] TXSYSCLKSEL;
14222    input [2:0] CPLLREFCLKSEL;
14223    input [2:0] LOOPBACK;
14224    input [2:0] RXCHBONDLEVEL;
14225    input [2:0] RXOUTCLKSEL;
14226    input [2:0] RXPRBSSEL;
14227    input [2:0] RXRATE;
14228    input [2:0] TXBUFDIFFCTRL;
14229    input [2:0] TXHEADER;
14230    input [2:0] TXMARGIN;
14231    input [2:0] TXOUTCLKSEL;
14232    input [2:0] TXPRBSSEL;
14233    input [2:0] TXRATE;
14234    input [3:0] CLKRSVD;
14235    input [3:0] TXDIFFCTRL;
14236    input [4:0] PCSRSVDIN2;
14237    input [4:0] PMARSVDIN2;
14238    input [4:0] PMARSVDIN;
14239    input [4:0] RXCHBONDI;
14240    input [4:0] TXPOSTCURSOR;
14241    input [4:0] TXPRECURSOR;
14242    input [63:0] TXDATA;
14243    input [6:0] TXMAINCURSOR;
14244    input [6:0] TXSEQUENCE;
14245    input [7:0] TX8B10BBYPASS;
14246    input [7:0] TXCHARDISPMODE;
14247    input [7:0] TXCHARDISPVAL;
14248    input [7:0] TXCHARISK;
14249    input [8:0] DRPADDR;
14250endmodule
14251
14252module GTXE2_COMMON (...);
14253    parameter [63:0] BIAS_CFG = 64'h0000040000001000;
14254    parameter [31:0] COMMON_CFG = 32'h00000000;
14255    parameter [0:0] IS_DRPCLK_INVERTED = 1'b0;
14256    parameter [0:0] IS_GTGREFCLK_INVERTED = 1'b0;
14257    parameter [0:0] IS_QPLLLOCKDETCLK_INVERTED = 1'b0;
14258    parameter [26:0] QPLL_CFG = 27'h0680181;
14259    parameter [3:0] QPLL_CLKOUT_CFG = 4'b0000;
14260    parameter [5:0] QPLL_COARSE_FREQ_OVRD = 6'b010000;
14261    parameter [0:0] QPLL_COARSE_FREQ_OVRD_EN = 1'b0;
14262    parameter [9:0] QPLL_CP = 10'b0000011111;
14263    parameter [0:0] QPLL_CP_MONITOR_EN = 1'b0;
14264    parameter [0:0] QPLL_DMONITOR_SEL = 1'b0;
14265    parameter [9:0] QPLL_FBDIV = 10'b0000000000;
14266    parameter [0:0] QPLL_FBDIV_MONITOR_EN = 1'b0;
14267    parameter [0:0] QPLL_FBDIV_RATIO = 1'b0;
14268    parameter [23:0] QPLL_INIT_CFG = 24'h000006;
14269    parameter [15:0] QPLL_LOCK_CFG = 16'h21E8;
14270    parameter [3:0] QPLL_LPF = 4'b1111;
14271    parameter integer QPLL_REFCLK_DIV = 2;
14272    parameter [2:0] SIM_QPLLREFCLK_SEL = 3'b001;
14273    parameter SIM_RESET_SPEEDUP = "TRUE";
14274    parameter SIM_VERSION = "4.0";
14275    output DRPRDY;
14276    output QPLLFBCLKLOST;
14277    output QPLLLOCK;
14278    output QPLLOUTCLK;
14279    output QPLLOUTREFCLK;
14280    output QPLLREFCLKLOST;
14281    output REFCLKOUTMONITOR;
14282    output [15:0] DRPDO;
14283    output [7:0] QPLLDMONITOR;
14284    input BGBYPASSB;
14285    input BGMONITORENB;
14286    input BGPDB;
14287    (* invertible_pin = "IS_DRPCLK_INVERTED" *)
14288    input DRPCLK;
14289    input DRPEN;
14290    input DRPWE;
14291    (* invertible_pin = "IS_GTGREFCLK_INVERTED" *)
14292    input GTGREFCLK;
14293    input GTNORTHREFCLK0;
14294    input GTNORTHREFCLK1;
14295    input GTREFCLK0;
14296    input GTREFCLK1;
14297    input GTSOUTHREFCLK0;
14298    input GTSOUTHREFCLK1;
14299    (* invertible_pin = "IS_QPLLLOCKDETCLK_INVERTED" *)
14300    input QPLLLOCKDETCLK;
14301    input QPLLLOCKEN;
14302    input QPLLOUTRESET;
14303    input QPLLPD;
14304    input QPLLRESET;
14305    input RCALENB;
14306    input [15:0] DRPDI;
14307    input [15:0] QPLLRSVD1;
14308    input [2:0] QPLLREFCLKSEL;
14309    input [4:0] BGRCALOVRD;
14310    input [4:0] QPLLRSVD2;
14311    input [7:0] DRPADDR;
14312    input [7:0] PMARSVD;
14313endmodule
14314
14315module IBUFDS_GTE2 (...);
14316    parameter CLKCM_CFG = "TRUE";
14317    parameter CLKRCV_TRST = "TRUE";
14318    parameter CLKSWING_CFG = "TRUE";
14319    output O;
14320    output ODIV2;
14321    input CEB;
14322    (* iopad_external_pin *)
14323    input I;
14324    (* iopad_external_pin *)
14325    input IB;
14326endmodule
14327
14328module GTHE3_CHANNEL (...);
14329    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
14330    parameter [0:0] ACJTAG_MODE = 1'b0;
14331    parameter [0:0] ACJTAG_RESET = 1'b0;
14332    parameter [15:0] ADAPT_CFG0 = 16'hF800;
14333    parameter [15:0] ADAPT_CFG1 = 16'h0000;
14334    parameter ALIGN_COMMA_DOUBLE = "FALSE";
14335    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
14336    parameter integer ALIGN_COMMA_WORD = 1;
14337    parameter ALIGN_MCOMMA_DET = "TRUE";
14338    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
14339    parameter ALIGN_PCOMMA_DET = "TRUE";
14340    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
14341    parameter [0:0] A_RXOSCALRESET = 1'b0;
14342    parameter [0:0] A_RXPROGDIVRESET = 1'b0;
14343    parameter [0:0] A_TXPROGDIVRESET = 1'b0;
14344    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
14345    parameter [0:0] CDR_SWAP_MODE_EN = 1'b0;
14346    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
14347    parameter integer CHAN_BOND_MAX_SKEW = 7;
14348    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
14349    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
14350    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
14351    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
14352    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
14353    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
14354    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
14355    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
14356    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
14357    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
14358    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
14359    parameter integer CHAN_BOND_SEQ_LEN = 2;
14360    parameter CLK_CORRECT_USE = "TRUE";
14361    parameter CLK_COR_KEEP_IDLE = "FALSE";
14362    parameter integer CLK_COR_MAX_LAT = 20;
14363    parameter integer CLK_COR_MIN_LAT = 18;
14364    parameter CLK_COR_PRECEDENCE = "TRUE";
14365    parameter integer CLK_COR_REPEAT_WAIT = 0;
14366    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
14367    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
14368    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
14369    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
14370    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
14371    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
14372    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
14373    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
14374    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
14375    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
14376    parameter CLK_COR_SEQ_2_USE = "FALSE";
14377    parameter integer CLK_COR_SEQ_LEN = 2;
14378    parameter [15:0] CPLL_CFG0 = 16'h20F8;
14379    parameter [15:0] CPLL_CFG1 = 16'hA494;
14380    parameter [15:0] CPLL_CFG2 = 16'hF001;
14381    parameter [5:0] CPLL_CFG3 = 6'h00;
14382    parameter integer CPLL_FBDIV = 4;
14383    parameter integer CPLL_FBDIV_45 = 4;
14384    parameter [15:0] CPLL_INIT_CFG0 = 16'h001E;
14385    parameter [7:0] CPLL_INIT_CFG1 = 8'h00;
14386    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
14387    parameter integer CPLL_REFCLK_DIV = 1;
14388    parameter [1:0] DDI_CTRL = 2'b00;
14389    parameter integer DDI_REALIGN_WAIT = 15;
14390    parameter DEC_MCOMMA_DETECT = "TRUE";
14391    parameter DEC_PCOMMA_DETECT = "TRUE";
14392    parameter DEC_VALID_COMMA_ONLY = "TRUE";
14393    parameter [0:0] DFE_D_X_REL_POS = 1'b0;
14394    parameter [0:0] DFE_VCM_COMP_EN = 1'b0;
14395    parameter [9:0] DMONITOR_CFG0 = 10'h000;
14396    parameter [7:0] DMONITOR_CFG1 = 8'h00;
14397    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
14398    parameter [5:0] ES_CONTROL = 6'b000000;
14399    parameter ES_ERRDET_EN = "FALSE";
14400    parameter ES_EYE_SCAN_EN = "FALSE";
14401    parameter [11:0] ES_HORZ_OFFSET = 12'h000;
14402    parameter [9:0] ES_PMA_CFG = 10'b0000000000;
14403    parameter [4:0] ES_PRESCALE = 5'b00000;
14404    parameter [15:0] ES_QUALIFIER0 = 16'h0000;
14405    parameter [15:0] ES_QUALIFIER1 = 16'h0000;
14406    parameter [15:0] ES_QUALIFIER2 = 16'h0000;
14407    parameter [15:0] ES_QUALIFIER3 = 16'h0000;
14408    parameter [15:0] ES_QUALIFIER4 = 16'h0000;
14409    parameter [15:0] ES_QUAL_MASK0 = 16'h0000;
14410    parameter [15:0] ES_QUAL_MASK1 = 16'h0000;
14411    parameter [15:0] ES_QUAL_MASK2 = 16'h0000;
14412    parameter [15:0] ES_QUAL_MASK3 = 16'h0000;
14413    parameter [15:0] ES_QUAL_MASK4 = 16'h0000;
14414    parameter [15:0] ES_SDATA_MASK0 = 16'h0000;
14415    parameter [15:0] ES_SDATA_MASK1 = 16'h0000;
14416    parameter [15:0] ES_SDATA_MASK2 = 16'h0000;
14417    parameter [15:0] ES_SDATA_MASK3 = 16'h0000;
14418    parameter [15:0] ES_SDATA_MASK4 = 16'h0000;
14419    parameter [10:0] EVODD_PHI_CFG = 11'b00000000000;
14420    parameter [0:0] EYE_SCAN_SWAP_EN = 1'b0;
14421    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
14422    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
14423    parameter FTS_LANE_DESKEW_EN = "FALSE";
14424    parameter [4:0] GEARBOX_MODE = 5'b00000;
14425    parameter [0:0] GM_BIAS_SELECT = 1'b0;
14426    parameter [0:0] LOCAL_MASTER = 1'b0;
14427    parameter [1:0] OOBDIVCTL = 2'b00;
14428    parameter [0:0] OOB_PWRUP = 1'b0;
14429    parameter PCI3_AUTO_REALIGN = "FRST_SMPL";
14430    parameter [0:0] PCI3_PIPE_RX_ELECIDLE = 1'b1;
14431    parameter [1:0] PCI3_RX_ASYNC_EBUF_BYPASS = 2'b00;
14432    parameter [0:0] PCI3_RX_ELECIDLE_EI2_ENABLE = 1'b0;
14433    parameter [5:0] PCI3_RX_ELECIDLE_H2L_COUNT = 6'b000000;
14434    parameter [2:0] PCI3_RX_ELECIDLE_H2L_DISABLE = 3'b000;
14435    parameter [5:0] PCI3_RX_ELECIDLE_HI_COUNT = 6'b000000;
14436    parameter [0:0] PCI3_RX_ELECIDLE_LP4_DISABLE = 1'b0;
14437    parameter [0:0] PCI3_RX_FIFO_DISABLE = 1'b0;
14438    parameter [15:0] PCIE_BUFG_DIV_CTRL = 16'h0000;
14439    parameter [15:0] PCIE_RXPCS_CFG_GEN3 = 16'h0000;
14440    parameter [15:0] PCIE_RXPMA_CFG = 16'h0000;
14441    parameter [15:0] PCIE_TXPCS_CFG_GEN3 = 16'h0000;
14442    parameter [15:0] PCIE_TXPMA_CFG = 16'h0000;
14443    parameter PCS_PCIE_EN = "FALSE";
14444    parameter [15:0] PCS_RSVD0 = 16'b0000000000000000;
14445    parameter [2:0] PCS_RSVD1 = 3'b000;
14446    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
14447    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
14448    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
14449    parameter [1:0] PLL_SEL_MODE_GEN12 = 2'h0;
14450    parameter [1:0] PLL_SEL_MODE_GEN3 = 2'h0;
14451    parameter [15:0] PMA_RSV1 = 16'h0000;
14452    parameter [2:0] PROCESS_PAR = 3'b010;
14453    parameter [0:0] RATE_SW_USE_DRP = 1'b0;
14454    parameter [0:0] RESET_POWERSAVE_DISABLE = 1'b0;
14455    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
14456    parameter RXBUF_ADDR_MODE = "FULL";
14457    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
14458    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
14459    parameter RXBUF_EN = "TRUE";
14460    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
14461    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
14462    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
14463    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
14464    parameter integer RXBUF_THRESH_OVFLW = 0;
14465    parameter RXBUF_THRESH_OVRD = "FALSE";
14466    parameter integer RXBUF_THRESH_UNDFLW = 4;
14467    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
14468    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
14469    parameter [15:0] RXCDR_CFG0 = 16'h0000;
14470    parameter [15:0] RXCDR_CFG0_GEN3 = 16'h0000;
14471    parameter [15:0] RXCDR_CFG1 = 16'h0080;
14472    parameter [15:0] RXCDR_CFG1_GEN3 = 16'h0000;
14473    parameter [15:0] RXCDR_CFG2 = 16'h07E6;
14474    parameter [15:0] RXCDR_CFG2_GEN3 = 16'h0000;
14475    parameter [15:0] RXCDR_CFG3 = 16'h0000;
14476    parameter [15:0] RXCDR_CFG3_GEN3 = 16'h0000;
14477    parameter [15:0] RXCDR_CFG4 = 16'h0000;
14478    parameter [15:0] RXCDR_CFG4_GEN3 = 16'h0000;
14479    parameter [15:0] RXCDR_CFG5 = 16'h0000;
14480    parameter [15:0] RXCDR_CFG5_GEN3 = 16'h0000;
14481    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
14482    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
14483    parameter [15:0] RXCDR_LOCK_CFG0 = 16'h5080;
14484    parameter [15:0] RXCDR_LOCK_CFG1 = 16'h07E0;
14485    parameter [15:0] RXCDR_LOCK_CFG2 = 16'h7C42;
14486    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
14487    parameter [15:0] RXCFOK_CFG0 = 16'h4000;
14488    parameter [15:0] RXCFOK_CFG1 = 16'h0060;
14489    parameter [15:0] RXCFOK_CFG2 = 16'h000E;
14490    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
14491    parameter [15:0] RXDFELPM_KL_CFG0 = 16'h0000;
14492    parameter [15:0] RXDFELPM_KL_CFG1 = 16'h0032;
14493    parameter [15:0] RXDFELPM_KL_CFG2 = 16'h0000;
14494    parameter [15:0] RXDFE_CFG0 = 16'h0A00;
14495    parameter [15:0] RXDFE_CFG1 = 16'h0000;
14496    parameter [15:0] RXDFE_GC_CFG0 = 16'h0000;
14497    parameter [15:0] RXDFE_GC_CFG1 = 16'h7840;
14498    parameter [15:0] RXDFE_GC_CFG2 = 16'h0000;
14499    parameter [15:0] RXDFE_H2_CFG0 = 16'h0000;
14500    parameter [15:0] RXDFE_H2_CFG1 = 16'h0000;
14501    parameter [15:0] RXDFE_H3_CFG0 = 16'h4000;
14502    parameter [15:0] RXDFE_H3_CFG1 = 16'h0000;
14503    parameter [15:0] RXDFE_H4_CFG0 = 16'h2000;
14504    parameter [15:0] RXDFE_H4_CFG1 = 16'h0003;
14505    parameter [15:0] RXDFE_H5_CFG0 = 16'h2000;
14506    parameter [15:0] RXDFE_H5_CFG1 = 16'h0003;
14507    parameter [15:0] RXDFE_H6_CFG0 = 16'h2000;
14508    parameter [15:0] RXDFE_H6_CFG1 = 16'h0000;
14509    parameter [15:0] RXDFE_H7_CFG0 = 16'h2000;
14510    parameter [15:0] RXDFE_H7_CFG1 = 16'h0000;
14511    parameter [15:0] RXDFE_H8_CFG0 = 16'h2000;
14512    parameter [15:0] RXDFE_H8_CFG1 = 16'h0000;
14513    parameter [15:0] RXDFE_H9_CFG0 = 16'h2000;
14514    parameter [15:0] RXDFE_H9_CFG1 = 16'h0000;
14515    parameter [15:0] RXDFE_HA_CFG0 = 16'h2000;
14516    parameter [15:0] RXDFE_HA_CFG1 = 16'h0000;
14517    parameter [15:0] RXDFE_HB_CFG0 = 16'h2000;
14518    parameter [15:0] RXDFE_HB_CFG1 = 16'h0000;
14519    parameter [15:0] RXDFE_HC_CFG0 = 16'h0000;
14520    parameter [15:0] RXDFE_HC_CFG1 = 16'h0000;
14521    parameter [15:0] RXDFE_HD_CFG0 = 16'h0000;
14522    parameter [15:0] RXDFE_HD_CFG1 = 16'h0000;
14523    parameter [15:0] RXDFE_HE_CFG0 = 16'h0000;
14524    parameter [15:0] RXDFE_HE_CFG1 = 16'h0000;
14525    parameter [15:0] RXDFE_HF_CFG0 = 16'h0000;
14526    parameter [15:0] RXDFE_HF_CFG1 = 16'h0000;
14527    parameter [15:0] RXDFE_OS_CFG0 = 16'h8000;
14528    parameter [15:0] RXDFE_OS_CFG1 = 16'h0000;
14529    parameter [15:0] RXDFE_UT_CFG0 = 16'h8000;
14530    parameter [15:0] RXDFE_UT_CFG1 = 16'h0003;
14531    parameter [15:0] RXDFE_VP_CFG0 = 16'hAA00;
14532    parameter [15:0] RXDFE_VP_CFG1 = 16'h0033;
14533    parameter [15:0] RXDLY_CFG = 16'h001F;
14534    parameter [15:0] RXDLY_LCFG = 16'h0030;
14535    parameter RXELECIDLE_CFG = "Sigcfg_4";
14536    parameter integer RXGBOX_FIFO_INIT_RD_ADDR = 4;
14537    parameter RXGEARBOX_EN = "FALSE";
14538    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
14539    parameter [15:0] RXLPM_CFG = 16'h0000;
14540    parameter [15:0] RXLPM_GC_CFG = 16'h0000;
14541    parameter [15:0] RXLPM_KH_CFG0 = 16'h0000;
14542    parameter [15:0] RXLPM_KH_CFG1 = 16'h0002;
14543    parameter [15:0] RXLPM_OS_CFG0 = 16'h8000;
14544    parameter [15:0] RXLPM_OS_CFG1 = 16'h0002;
14545    parameter [8:0] RXOOB_CFG = 9'b000000110;
14546    parameter RXOOB_CLK_CFG = "PMA";
14547    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
14548    parameter integer RXOUT_DIV = 4;
14549    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
14550    parameter [15:0] RXPHBEACON_CFG = 16'h0000;
14551    parameter [15:0] RXPHDLY_CFG = 16'h2020;
14552    parameter [15:0] RXPHSAMP_CFG = 16'h2100;
14553    parameter [15:0] RXPHSLIP_CFG = 16'h6622;
14554    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
14555    parameter [1:0] RXPI_CFG0 = 2'b00;
14556    parameter [1:0] RXPI_CFG1 = 2'b00;
14557    parameter [1:0] RXPI_CFG2 = 2'b00;
14558    parameter [1:0] RXPI_CFG3 = 2'b00;
14559    parameter [0:0] RXPI_CFG4 = 1'b0;
14560    parameter [0:0] RXPI_CFG5 = 1'b1;
14561    parameter [2:0] RXPI_CFG6 = 3'b000;
14562    parameter [0:0] RXPI_LPM = 1'b0;
14563    parameter [0:0] RXPI_VREFSEL = 1'b0;
14564    parameter RXPMACLK_SEL = "DATA";
14565    parameter [4:0] RXPMARESET_TIME = 5'b00001;
14566    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
14567    parameter integer RXPRBS_LINKACQ_CNT = 15;
14568    parameter integer RXSLIDE_AUTO_WAIT = 7;
14569    parameter RXSLIDE_MODE = "OFF";
14570    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
14571    parameter [0:0] RXSYNC_OVRD = 1'b0;
14572    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
14573    parameter [0:0] RX_AFE_CM_EN = 1'b0;
14574    parameter [15:0] RX_BIAS_CFG0 = 16'h0AD4;
14575    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
14576    parameter [0:0] RX_CAPFF_SARC_ENB = 1'b0;
14577    parameter integer RX_CLK25_DIV = 8;
14578    parameter [0:0] RX_CLKMUX_EN = 1'b1;
14579    parameter [4:0] RX_CLK_SLIP_OVRD = 5'b00000;
14580    parameter [3:0] RX_CM_BUF_CFG = 4'b1010;
14581    parameter [0:0] RX_CM_BUF_PD = 1'b0;
14582    parameter [1:0] RX_CM_SEL = 2'b11;
14583    parameter [3:0] RX_CM_TRIM = 4'b0100;
14584    parameter [7:0] RX_CTLE3_LPF = 8'b00000000;
14585    parameter integer RX_DATA_WIDTH = 20;
14586    parameter [5:0] RX_DDI_SEL = 6'b000000;
14587    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
14588    parameter [3:0] RX_DFELPM_CFG0 = 4'b0110;
14589    parameter [0:0] RX_DFELPM_CFG1 = 1'b0;
14590    parameter [0:0] RX_DFELPM_KLKH_AGC_STUP_EN = 1'b1;
14591    parameter [1:0] RX_DFE_AGC_CFG0 = 2'b00;
14592    parameter [2:0] RX_DFE_AGC_CFG1 = 3'b100;
14593    parameter [1:0] RX_DFE_KL_LPM_KH_CFG0 = 2'b01;
14594    parameter [2:0] RX_DFE_KL_LPM_KH_CFG1 = 3'b010;
14595    parameter [1:0] RX_DFE_KL_LPM_KL_CFG0 = 2'b01;
14596    parameter [2:0] RX_DFE_KL_LPM_KL_CFG1 = 3'b010;
14597    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
14598    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
14599    parameter [4:0] RX_DIVRESET_TIME = 5'b00001;
14600    parameter [0:0] RX_EN_HI_LR = 1'b0;
14601    parameter [6:0] RX_EYESCAN_VS_CODE = 7'b0000000;
14602    parameter [0:0] RX_EYESCAN_VS_NEG_DIR = 1'b0;
14603    parameter [1:0] RX_EYESCAN_VS_RANGE = 2'b00;
14604    parameter [0:0] RX_EYESCAN_VS_UT_SIGN = 1'b0;
14605    parameter [0:0] RX_FABINT_USRCLK_FLOP = 1'b0;
14606    parameter integer RX_INT_DATAWIDTH = 1;
14607    parameter [0:0] RX_PMA_POWER_SAVE = 1'b0;
14608    parameter real RX_PROGDIV_CFG = 4.0;
14609    parameter [2:0] RX_SAMPLE_PERIOD = 3'b101;
14610    parameter integer RX_SIG_VALID_DLY = 11;
14611    parameter [0:0] RX_SUM_DFETAPREP_EN = 1'b0;
14612    parameter [3:0] RX_SUM_IREF_TUNE = 4'b0000;
14613    parameter [1:0] RX_SUM_RES_CTRL = 2'b00;
14614    parameter [3:0] RX_SUM_VCMTUNE = 4'b0000;
14615    parameter [0:0] RX_SUM_VCM_OVWR = 1'b0;
14616    parameter [2:0] RX_SUM_VREF_TUNE = 3'b000;
14617    parameter [1:0] RX_TUNE_AFE_OS = 2'b00;
14618    parameter [0:0] RX_WIDEMODE_CDR = 1'b0;
14619    parameter RX_XCLK_SEL = "RXDES";
14620    parameter integer SAS_MAX_COM = 64;
14621    parameter integer SAS_MIN_COM = 36;
14622    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
14623    parameter [2:0] SATA_BURST_VAL = 3'b100;
14624    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
14625    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
14626    parameter integer SATA_MAX_BURST = 8;
14627    parameter integer SATA_MAX_INIT = 21;
14628    parameter integer SATA_MAX_WAKE = 7;
14629    parameter integer SATA_MIN_BURST = 4;
14630    parameter integer SATA_MIN_INIT = 12;
14631    parameter integer SATA_MIN_WAKE = 4;
14632    parameter SHOW_REALIGN_COMMA = "TRUE";
14633    parameter SIM_MODE = "FAST";
14634    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
14635    parameter SIM_RESET_SPEEDUP = "TRUE";
14636    parameter [0:0] SIM_TX_EIDLE_DRIVE_LEVEL = 1'b0;
14637    parameter integer SIM_VERSION = 2;
14638    parameter [1:0] TAPDLY_SET_TX = 2'h0;
14639    parameter [3:0] TEMPERATUR_PAR = 4'b0010;
14640    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
14641    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
14642    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
14643    parameter [7:0] TST_RSV0 = 8'h00;
14644    parameter [7:0] TST_RSV1 = 8'h00;
14645    parameter TXBUF_EN = "TRUE";
14646    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
14647    parameter [15:0] TXDLY_CFG = 16'h001F;
14648    parameter [15:0] TXDLY_LCFG = 16'h0030;
14649    parameter [3:0] TXDRVBIAS_N = 4'b1010;
14650    parameter [3:0] TXDRVBIAS_P = 4'b1100;
14651    parameter TXFIFO_ADDR_CFG = "LOW";
14652    parameter integer TXGBOX_FIFO_INIT_RD_ADDR = 4;
14653    parameter TXGEARBOX_EN = "FALSE";
14654    parameter integer TXOUT_DIV = 4;
14655    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
14656    parameter [15:0] TXPHDLY_CFG0 = 16'h2020;
14657    parameter [15:0] TXPHDLY_CFG1 = 16'h0001;
14658    parameter [15:0] TXPH_CFG = 16'h0980;
14659    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
14660    parameter [1:0] TXPI_CFG0 = 2'b00;
14661    parameter [1:0] TXPI_CFG1 = 2'b00;
14662    parameter [1:0] TXPI_CFG2 = 2'b00;
14663    parameter [0:0] TXPI_CFG3 = 1'b0;
14664    parameter [0:0] TXPI_CFG4 = 1'b1;
14665    parameter [2:0] TXPI_CFG5 = 3'b000;
14666    parameter [0:0] TXPI_GRAY_SEL = 1'b0;
14667    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
14668    parameter [0:0] TXPI_LPM = 1'b0;
14669    parameter TXPI_PPMCLK_SEL = "TXUSRCLK2";
14670    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
14671    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
14672    parameter [0:0] TXPI_VREFSEL = 1'b0;
14673    parameter [4:0] TXPMARESET_TIME = 5'b00001;
14674    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
14675    parameter [0:0] TXSYNC_OVRD = 1'b0;
14676    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
14677    parameter integer TX_CLK25_DIV = 8;
14678    parameter [0:0] TX_CLKMUX_EN = 1'b1;
14679    parameter integer TX_DATA_WIDTH = 20;
14680    parameter [5:0] TX_DCD_CFG = 6'b000010;
14681    parameter [0:0] TX_DCD_EN = 1'b0;
14682    parameter [5:0] TX_DEEMPH0 = 6'b000000;
14683    parameter [5:0] TX_DEEMPH1 = 6'b000000;
14684    parameter [4:0] TX_DIVRESET_TIME = 5'b00001;
14685    parameter TX_DRIVE_MODE = "DIRECT";
14686    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
14687    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
14688    parameter [0:0] TX_EML_PHI_TUNE = 1'b0;
14689    parameter [0:0] TX_FABINT_USRCLK_FLOP = 1'b0;
14690    parameter [0:0] TX_IDLE_DATA_ZERO = 1'b0;
14691    parameter integer TX_INT_DATAWIDTH = 1;
14692    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
14693    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
14694    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
14695    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
14696    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
14697    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
14698    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
14699    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
14700    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
14701    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
14702    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
14703    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
14704    parameter [2:0] TX_MODE_SEL = 3'b000;
14705    parameter [0:0] TX_PMADATA_OPT = 1'b0;
14706    parameter [0:0] TX_PMA_POWER_SAVE = 1'b0;
14707    parameter TX_PROGCLK_SEL = "POSTPI";
14708    parameter real TX_PROGDIV_CFG = 4.0;
14709    parameter [0:0] TX_QPI_STATUS_EN = 1'b0;
14710    parameter [13:0] TX_RXDETECT_CFG = 14'h0032;
14711    parameter [2:0] TX_RXDETECT_REF = 3'b100;
14712    parameter [2:0] TX_SAMPLE_PERIOD = 3'b101;
14713    parameter [0:0] TX_SARC_LPBK_ENB = 1'b0;
14714    parameter TX_XCLK_SEL = "TXOUT";
14715    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
14716    parameter [1:0] WB_MODE = 2'b00;
14717    output [2:0] BUFGTCE;
14718    output [2:0] BUFGTCEMASK;
14719    output [8:0] BUFGTDIV;
14720    output [2:0] BUFGTRESET;
14721    output [2:0] BUFGTRSTMASK;
14722    output CPLLFBCLKLOST;
14723    output CPLLLOCK;
14724    output CPLLREFCLKLOST;
14725    output [16:0] DMONITOROUT;
14726    output [15:0] DRPDO;
14727    output DRPRDY;
14728    output EYESCANDATAERROR;
14729    output GTHTXN;
14730    output GTHTXP;
14731    output GTPOWERGOOD;
14732    output GTREFCLKMONITOR;
14733    output PCIERATEGEN3;
14734    output PCIERATEIDLE;
14735    output [1:0] PCIERATEQPLLPD;
14736    output [1:0] PCIERATEQPLLRESET;
14737    output PCIESYNCTXSYNCDONE;
14738    output PCIEUSERGEN3RDY;
14739    output PCIEUSERPHYSTATUSRST;
14740    output PCIEUSERRATESTART;
14741    output [11:0] PCSRSVDOUT;
14742    output PHYSTATUS;
14743    output [7:0] PINRSRVDAS;
14744    output RESETEXCEPTION;
14745    output [2:0] RXBUFSTATUS;
14746    output RXBYTEISALIGNED;
14747    output RXBYTEREALIGN;
14748    output RXCDRLOCK;
14749    output RXCDRPHDONE;
14750    output RXCHANBONDSEQ;
14751    output RXCHANISALIGNED;
14752    output RXCHANREALIGN;
14753    output [4:0] RXCHBONDO;
14754    output [1:0] RXCLKCORCNT;
14755    output RXCOMINITDET;
14756    output RXCOMMADET;
14757    output RXCOMSASDET;
14758    output RXCOMWAKEDET;
14759    output [15:0] RXCTRL0;
14760    output [15:0] RXCTRL1;
14761    output [7:0] RXCTRL2;
14762    output [7:0] RXCTRL3;
14763    output [127:0] RXDATA;
14764    output [7:0] RXDATAEXTENDRSVD;
14765    output [1:0] RXDATAVALID;
14766    output RXDLYSRESETDONE;
14767    output RXELECIDLE;
14768    output [5:0] RXHEADER;
14769    output [1:0] RXHEADERVALID;
14770    output [6:0] RXMONITOROUT;
14771    output RXOSINTDONE;
14772    output RXOSINTSTARTED;
14773    output RXOSINTSTROBEDONE;
14774    output RXOSINTSTROBESTARTED;
14775    output RXOUTCLK;
14776    output RXOUTCLKFABRIC;
14777    output RXOUTCLKPCS;
14778    output RXPHALIGNDONE;
14779    output RXPHALIGNERR;
14780    output RXPMARESETDONE;
14781    output RXPRBSERR;
14782    output RXPRBSLOCKED;
14783    output RXPRGDIVRESETDONE;
14784    output RXQPISENN;
14785    output RXQPISENP;
14786    output RXRATEDONE;
14787    output RXRECCLKOUT;
14788    output RXRESETDONE;
14789    output RXSLIDERDY;
14790    output RXSLIPDONE;
14791    output RXSLIPOUTCLKRDY;
14792    output RXSLIPPMARDY;
14793    output [1:0] RXSTARTOFSEQ;
14794    output [2:0] RXSTATUS;
14795    output RXSYNCDONE;
14796    output RXSYNCOUT;
14797    output RXVALID;
14798    output [1:0] TXBUFSTATUS;
14799    output TXCOMFINISH;
14800    output TXDLYSRESETDONE;
14801    output TXOUTCLK;
14802    output TXOUTCLKFABRIC;
14803    output TXOUTCLKPCS;
14804    output TXPHALIGNDONE;
14805    output TXPHINITDONE;
14806    output TXPMARESETDONE;
14807    output TXPRGDIVRESETDONE;
14808    output TXQPISENN;
14809    output TXQPISENP;
14810    output TXRATEDONE;
14811    output TXRESETDONE;
14812    output TXSYNCDONE;
14813    output TXSYNCOUT;
14814    input CFGRESET;
14815    input CLKRSVD0;
14816    input CLKRSVD1;
14817    input CPLLLOCKDETCLK;
14818    input CPLLLOCKEN;
14819    input CPLLPD;
14820    input [2:0] CPLLREFCLKSEL;
14821    input CPLLRESET;
14822    input DMONFIFORESET;
14823    input DMONITORCLK;
14824    input [8:0] DRPADDR;
14825    input DRPCLK;
14826    input [15:0] DRPDI;
14827    input DRPEN;
14828    input DRPWE;
14829    input EVODDPHICALDONE;
14830    input EVODDPHICALSTART;
14831    input EVODDPHIDRDEN;
14832    input EVODDPHIDWREN;
14833    input EVODDPHIXRDEN;
14834    input EVODDPHIXWREN;
14835    input EYESCANMODE;
14836    input EYESCANRESET;
14837    input EYESCANTRIGGER;
14838    input GTGREFCLK;
14839    input GTHRXN;
14840    input GTHRXP;
14841    input GTNORTHREFCLK0;
14842    input GTNORTHREFCLK1;
14843    input GTREFCLK0;
14844    input GTREFCLK1;
14845    input GTRESETSEL;
14846    input [15:0] GTRSVD;
14847    input GTRXRESET;
14848    input GTSOUTHREFCLK0;
14849    input GTSOUTHREFCLK1;
14850    input GTTXRESET;
14851    input [2:0] LOOPBACK;
14852    input LPBKRXTXSEREN;
14853    input LPBKTXRXSEREN;
14854    input PCIEEQRXEQADAPTDONE;
14855    input PCIERSTIDLE;
14856    input PCIERSTTXSYNCSTART;
14857    input PCIEUSERRATEDONE;
14858    input [15:0] PCSRSVDIN;
14859    input [4:0] PCSRSVDIN2;
14860    input [4:0] PMARSVDIN;
14861    input QPLL0CLK;
14862    input QPLL0REFCLK;
14863    input QPLL1CLK;
14864    input QPLL1REFCLK;
14865    input RESETOVRD;
14866    input RSTCLKENTX;
14867    input RX8B10BEN;
14868    input RXBUFRESET;
14869    input RXCDRFREQRESET;
14870    input RXCDRHOLD;
14871    input RXCDROVRDEN;
14872    input RXCDRRESET;
14873    input RXCDRRESETRSV;
14874    input RXCHBONDEN;
14875    input [4:0] RXCHBONDI;
14876    input [2:0] RXCHBONDLEVEL;
14877    input RXCHBONDMASTER;
14878    input RXCHBONDSLAVE;
14879    input RXCOMMADETEN;
14880    input [1:0] RXDFEAGCCTRL;
14881    input RXDFEAGCHOLD;
14882    input RXDFEAGCOVRDEN;
14883    input RXDFELFHOLD;
14884    input RXDFELFOVRDEN;
14885    input RXDFELPMRESET;
14886    input RXDFETAP10HOLD;
14887    input RXDFETAP10OVRDEN;
14888    input RXDFETAP11HOLD;
14889    input RXDFETAP11OVRDEN;
14890    input RXDFETAP12HOLD;
14891    input RXDFETAP12OVRDEN;
14892    input RXDFETAP13HOLD;
14893    input RXDFETAP13OVRDEN;
14894    input RXDFETAP14HOLD;
14895    input RXDFETAP14OVRDEN;
14896    input RXDFETAP15HOLD;
14897    input RXDFETAP15OVRDEN;
14898    input RXDFETAP2HOLD;
14899    input RXDFETAP2OVRDEN;
14900    input RXDFETAP3HOLD;
14901    input RXDFETAP3OVRDEN;
14902    input RXDFETAP4HOLD;
14903    input RXDFETAP4OVRDEN;
14904    input RXDFETAP5HOLD;
14905    input RXDFETAP5OVRDEN;
14906    input RXDFETAP6HOLD;
14907    input RXDFETAP6OVRDEN;
14908    input RXDFETAP7HOLD;
14909    input RXDFETAP7OVRDEN;
14910    input RXDFETAP8HOLD;
14911    input RXDFETAP8OVRDEN;
14912    input RXDFETAP9HOLD;
14913    input RXDFETAP9OVRDEN;
14914    input RXDFEUTHOLD;
14915    input RXDFEUTOVRDEN;
14916    input RXDFEVPHOLD;
14917    input RXDFEVPOVRDEN;
14918    input RXDFEVSEN;
14919    input RXDFEXYDEN;
14920    input RXDLYBYPASS;
14921    input RXDLYEN;
14922    input RXDLYOVRDEN;
14923    input RXDLYSRESET;
14924    input [1:0] RXELECIDLEMODE;
14925    input RXGEARBOXSLIP;
14926    input RXLATCLK;
14927    input RXLPMEN;
14928    input RXLPMGCHOLD;
14929    input RXLPMGCOVRDEN;
14930    input RXLPMHFHOLD;
14931    input RXLPMHFOVRDEN;
14932    input RXLPMLFHOLD;
14933    input RXLPMLFKLOVRDEN;
14934    input RXLPMOSHOLD;
14935    input RXLPMOSOVRDEN;
14936    input RXMCOMMAALIGNEN;
14937    input [1:0] RXMONITORSEL;
14938    input RXOOBRESET;
14939    input RXOSCALRESET;
14940    input RXOSHOLD;
14941    input [3:0] RXOSINTCFG;
14942    input RXOSINTEN;
14943    input RXOSINTHOLD;
14944    input RXOSINTOVRDEN;
14945    input RXOSINTSTROBE;
14946    input RXOSINTTESTOVRDEN;
14947    input RXOSOVRDEN;
14948    input [2:0] RXOUTCLKSEL;
14949    input RXPCOMMAALIGNEN;
14950    input RXPCSRESET;
14951    input [1:0] RXPD;
14952    input RXPHALIGN;
14953    input RXPHALIGNEN;
14954    input RXPHDLYPD;
14955    input RXPHDLYRESET;
14956    input RXPHOVRDEN;
14957    input [1:0] RXPLLCLKSEL;
14958    input RXPMARESET;
14959    input RXPOLARITY;
14960    input RXPRBSCNTRESET;
14961    input [3:0] RXPRBSSEL;
14962    input RXPROGDIVRESET;
14963    input RXQPIEN;
14964    input [2:0] RXRATE;
14965    input RXRATEMODE;
14966    input RXSLIDE;
14967    input RXSLIPOUTCLK;
14968    input RXSLIPPMA;
14969    input RXSYNCALLIN;
14970    input RXSYNCIN;
14971    input RXSYNCMODE;
14972    input [1:0] RXSYSCLKSEL;
14973    input RXUSERRDY;
14974    input RXUSRCLK;
14975    input RXUSRCLK2;
14976    input SIGVALIDCLK;
14977    input [19:0] TSTIN;
14978    input [7:0] TX8B10BBYPASS;
14979    input TX8B10BEN;
14980    input [2:0] TXBUFDIFFCTRL;
14981    input TXCOMINIT;
14982    input TXCOMSAS;
14983    input TXCOMWAKE;
14984    input [15:0] TXCTRL0;
14985    input [15:0] TXCTRL1;
14986    input [7:0] TXCTRL2;
14987    input [127:0] TXDATA;
14988    input [7:0] TXDATAEXTENDRSVD;
14989    input TXDEEMPH;
14990    input TXDETECTRX;
14991    input [3:0] TXDIFFCTRL;
14992    input TXDIFFPD;
14993    input TXDLYBYPASS;
14994    input TXDLYEN;
14995    input TXDLYHOLD;
14996    input TXDLYOVRDEN;
14997    input TXDLYSRESET;
14998    input TXDLYUPDOWN;
14999    input TXELECIDLE;
15000    input [5:0] TXHEADER;
15001    input TXINHIBIT;
15002    input TXLATCLK;
15003    input [6:0] TXMAINCURSOR;
15004    input [2:0] TXMARGIN;
15005    input [2:0] TXOUTCLKSEL;
15006    input TXPCSRESET;
15007    input [1:0] TXPD;
15008    input TXPDELECIDLEMODE;
15009    input TXPHALIGN;
15010    input TXPHALIGNEN;
15011    input TXPHDLYPD;
15012    input TXPHDLYRESET;
15013    input TXPHDLYTSTCLK;
15014    input TXPHINIT;
15015    input TXPHOVRDEN;
15016    input TXPIPPMEN;
15017    input TXPIPPMOVRDEN;
15018    input TXPIPPMPD;
15019    input TXPIPPMSEL;
15020    input [4:0] TXPIPPMSTEPSIZE;
15021    input TXPISOPD;
15022    input [1:0] TXPLLCLKSEL;
15023    input TXPMARESET;
15024    input TXPOLARITY;
15025    input [4:0] TXPOSTCURSOR;
15026    input TXPOSTCURSORINV;
15027    input TXPRBSFORCEERR;
15028    input [3:0] TXPRBSSEL;
15029    input [4:0] TXPRECURSOR;
15030    input TXPRECURSORINV;
15031    input TXPROGDIVRESET;
15032    input TXQPIBIASEN;
15033    input TXQPISTRONGPDOWN;
15034    input TXQPIWEAKPUP;
15035    input [2:0] TXRATE;
15036    input TXRATEMODE;
15037    input [6:0] TXSEQUENCE;
15038    input TXSWING;
15039    input TXSYNCALLIN;
15040    input TXSYNCIN;
15041    input TXSYNCMODE;
15042    input [1:0] TXSYSCLKSEL;
15043    input TXUSERRDY;
15044    input TXUSRCLK;
15045    input TXUSRCLK2;
15046endmodule
15047
15048module GTHE3_COMMON (...);
15049    parameter [15:0] BIAS_CFG0 = 16'h0000;
15050    parameter [15:0] BIAS_CFG1 = 16'h0000;
15051    parameter [15:0] BIAS_CFG2 = 16'h0000;
15052    parameter [15:0] BIAS_CFG3 = 16'h0000;
15053    parameter [15:0] BIAS_CFG4 = 16'h0000;
15054    parameter [9:0] BIAS_CFG_RSVD = 10'b0000000000;
15055    parameter [15:0] COMMON_CFG0 = 16'h0000;
15056    parameter [15:0] COMMON_CFG1 = 16'h0000;
15057    parameter [15:0] POR_CFG = 16'h0004;
15058    parameter [15:0] QPLL0_CFG0 = 16'h3018;
15059    parameter [15:0] QPLL0_CFG1 = 16'h0000;
15060    parameter [15:0] QPLL0_CFG1_G3 = 16'h0020;
15061    parameter [15:0] QPLL0_CFG2 = 16'h0000;
15062    parameter [15:0] QPLL0_CFG2_G3 = 16'h0000;
15063    parameter [15:0] QPLL0_CFG3 = 16'h0120;
15064    parameter [15:0] QPLL0_CFG4 = 16'h0009;
15065    parameter [9:0] QPLL0_CP = 10'b0000011111;
15066    parameter [9:0] QPLL0_CP_G3 = 10'b0000011111;
15067    parameter integer QPLL0_FBDIV = 66;
15068    parameter integer QPLL0_FBDIV_G3 = 80;
15069    parameter [15:0] QPLL0_INIT_CFG0 = 16'h0000;
15070    parameter [7:0] QPLL0_INIT_CFG1 = 8'h00;
15071    parameter [15:0] QPLL0_LOCK_CFG = 16'h01E8;
15072    parameter [15:0] QPLL0_LOCK_CFG_G3 = 16'h01E8;
15073    parameter [9:0] QPLL0_LPF = 10'b1111111111;
15074    parameter [9:0] QPLL0_LPF_G3 = 10'b1111111111;
15075    parameter integer QPLL0_REFCLK_DIV = 2;
15076    parameter [15:0] QPLL0_SDM_CFG0 = 16'b0000000000000000;
15077    parameter [15:0] QPLL0_SDM_CFG1 = 16'b0000000000000000;
15078    parameter [15:0] QPLL0_SDM_CFG2 = 16'b0000000000000000;
15079    parameter [15:0] QPLL1_CFG0 = 16'h3018;
15080    parameter [15:0] QPLL1_CFG1 = 16'h0000;
15081    parameter [15:0] QPLL1_CFG1_G3 = 16'h0020;
15082    parameter [15:0] QPLL1_CFG2 = 16'h0000;
15083    parameter [15:0] QPLL1_CFG2_G3 = 16'h0000;
15084    parameter [15:0] QPLL1_CFG3 = 16'h0120;
15085    parameter [15:0] QPLL1_CFG4 = 16'h0009;
15086    parameter [9:0] QPLL1_CP = 10'b0000011111;
15087    parameter [9:0] QPLL1_CP_G3 = 10'b0000011111;
15088    parameter integer QPLL1_FBDIV = 66;
15089    parameter integer QPLL1_FBDIV_G3 = 80;
15090    parameter [15:0] QPLL1_INIT_CFG0 = 16'h0000;
15091    parameter [7:0] QPLL1_INIT_CFG1 = 8'h00;
15092    parameter [15:0] QPLL1_LOCK_CFG = 16'h01E8;
15093    parameter [15:0] QPLL1_LOCK_CFG_G3 = 16'h21E8;
15094    parameter [9:0] QPLL1_LPF = 10'b1111111111;
15095    parameter [9:0] QPLL1_LPF_G3 = 10'b1111111111;
15096    parameter integer QPLL1_REFCLK_DIV = 2;
15097    parameter [15:0] QPLL1_SDM_CFG0 = 16'b0000000000000000;
15098    parameter [15:0] QPLL1_SDM_CFG1 = 16'b0000000000000000;
15099    parameter [15:0] QPLL1_SDM_CFG2 = 16'b0000000000000000;
15100    parameter [15:0] RSVD_ATTR0 = 16'h0000;
15101    parameter [15:0] RSVD_ATTR1 = 16'h0000;
15102    parameter [15:0] RSVD_ATTR2 = 16'h0000;
15103    parameter [15:0] RSVD_ATTR3 = 16'h0000;
15104    parameter [1:0] RXRECCLKOUT0_SEL = 2'b00;
15105    parameter [1:0] RXRECCLKOUT1_SEL = 2'b00;
15106    parameter [0:0] SARC_EN = 1'b1;
15107    parameter [0:0] SARC_SEL = 1'b0;
15108    parameter [15:0] SDM0DATA1_0 = 16'b0000000000000000;
15109    parameter [8:0] SDM0DATA1_1 = 9'b000000000;
15110    parameter [15:0] SDM0INITSEED0_0 = 16'b0000000000000000;
15111    parameter [8:0] SDM0INITSEED0_1 = 9'b000000000;
15112    parameter [0:0] SDM0_DATA_PIN_SEL = 1'b0;
15113    parameter [0:0] SDM0_WIDTH_PIN_SEL = 1'b0;
15114    parameter [15:0] SDM1DATA1_0 = 16'b0000000000000000;
15115    parameter [8:0] SDM1DATA1_1 = 9'b000000000;
15116    parameter [15:0] SDM1INITSEED0_0 = 16'b0000000000000000;
15117    parameter [8:0] SDM1INITSEED0_1 = 9'b000000000;
15118    parameter [0:0] SDM1_DATA_PIN_SEL = 1'b0;
15119    parameter [0:0] SDM1_WIDTH_PIN_SEL = 1'b0;
15120    parameter SIM_MODE = "FAST";
15121    parameter SIM_RESET_SPEEDUP = "TRUE";
15122    parameter integer SIM_VERSION = 2;
15123    output [15:0] DRPDO;
15124    output DRPRDY;
15125    output [7:0] PMARSVDOUT0;
15126    output [7:0] PMARSVDOUT1;
15127    output QPLL0FBCLKLOST;
15128    output QPLL0LOCK;
15129    output QPLL0OUTCLK;
15130    output QPLL0OUTREFCLK;
15131    output QPLL0REFCLKLOST;
15132    output QPLL1FBCLKLOST;
15133    output QPLL1LOCK;
15134    output QPLL1OUTCLK;
15135    output QPLL1OUTREFCLK;
15136    output QPLL1REFCLKLOST;
15137    output [7:0] QPLLDMONITOR0;
15138    output [7:0] QPLLDMONITOR1;
15139    output REFCLKOUTMONITOR0;
15140    output REFCLKOUTMONITOR1;
15141    output [1:0] RXRECCLK0_SEL;
15142    output [1:0] RXRECCLK1_SEL;
15143    input BGBYPASSB;
15144    input BGMONITORENB;
15145    input BGPDB;
15146    input [4:0] BGRCALOVRD;
15147    input BGRCALOVRDENB;
15148    input [8:0] DRPADDR;
15149    input DRPCLK;
15150    input [15:0] DRPDI;
15151    input DRPEN;
15152    input DRPWE;
15153    input GTGREFCLK0;
15154    input GTGREFCLK1;
15155    input GTNORTHREFCLK00;
15156    input GTNORTHREFCLK01;
15157    input GTNORTHREFCLK10;
15158    input GTNORTHREFCLK11;
15159    input GTREFCLK00;
15160    input GTREFCLK01;
15161    input GTREFCLK10;
15162    input GTREFCLK11;
15163    input GTSOUTHREFCLK00;
15164    input GTSOUTHREFCLK01;
15165    input GTSOUTHREFCLK10;
15166    input GTSOUTHREFCLK11;
15167    input [7:0] PMARSVD0;
15168    input [7:0] PMARSVD1;
15169    input QPLL0CLKRSVD0;
15170    input QPLL0CLKRSVD1;
15171    input QPLL0LOCKDETCLK;
15172    input QPLL0LOCKEN;
15173    input QPLL0PD;
15174    input [2:0] QPLL0REFCLKSEL;
15175    input QPLL0RESET;
15176    input QPLL1CLKRSVD0;
15177    input QPLL1CLKRSVD1;
15178    input QPLL1LOCKDETCLK;
15179    input QPLL1LOCKEN;
15180    input QPLL1PD;
15181    input [2:0] QPLL1REFCLKSEL;
15182    input QPLL1RESET;
15183    input [7:0] QPLLRSVD1;
15184    input [4:0] QPLLRSVD2;
15185    input [4:0] QPLLRSVD3;
15186    input [7:0] QPLLRSVD4;
15187    input RCALENB;
15188endmodule
15189
15190module GTYE3_CHANNEL (...);
15191    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
15192    parameter [0:0] ACJTAG_MODE = 1'b0;
15193    parameter [0:0] ACJTAG_RESET = 1'b0;
15194    parameter [15:0] ADAPT_CFG0 = 16'h9200;
15195    parameter [15:0] ADAPT_CFG1 = 16'h801C;
15196    parameter [15:0] ADAPT_CFG2 = 16'b0000000000000000;
15197    parameter ALIGN_COMMA_DOUBLE = "FALSE";
15198    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
15199    parameter integer ALIGN_COMMA_WORD = 1;
15200    parameter ALIGN_MCOMMA_DET = "TRUE";
15201    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
15202    parameter ALIGN_PCOMMA_DET = "TRUE";
15203    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
15204    parameter [0:0] AUTO_BW_SEL_BYPASS = 1'b0;
15205    parameter [0:0] A_RXOSCALRESET = 1'b0;
15206    parameter [0:0] A_RXPROGDIVRESET = 1'b0;
15207    parameter [4:0] A_TXDIFFCTRL = 5'b01100;
15208    parameter [0:0] A_TXPROGDIVRESET = 1'b0;
15209    parameter [0:0] CAPBYPASS_FORCE = 1'b0;
15210    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
15211    parameter [0:0] CDR_SWAP_MODE_EN = 1'b0;
15212    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
15213    parameter integer CHAN_BOND_MAX_SKEW = 7;
15214    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
15215    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
15216    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
15217    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
15218    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
15219    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
15220    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
15221    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
15222    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
15223    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
15224    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
15225    parameter integer CHAN_BOND_SEQ_LEN = 2;
15226    parameter [15:0] CH_HSPMUX = 16'h0000;
15227    parameter [15:0] CKCAL1_CFG_0 = 16'b0000000000000000;
15228    parameter [15:0] CKCAL1_CFG_1 = 16'b0000000000000000;
15229    parameter [15:0] CKCAL1_CFG_2 = 16'b0000000000000000;
15230    parameter [15:0] CKCAL1_CFG_3 = 16'b0000000000000000;
15231    parameter [15:0] CKCAL2_CFG_0 = 16'b0000000000000000;
15232    parameter [15:0] CKCAL2_CFG_1 = 16'b0000000000000000;
15233    parameter [15:0] CKCAL2_CFG_2 = 16'b0000000000000000;
15234    parameter [15:0] CKCAL2_CFG_3 = 16'b0000000000000000;
15235    parameter [15:0] CKCAL2_CFG_4 = 16'b0000000000000000;
15236    parameter [15:0] CKCAL_RSVD0 = 16'h0000;
15237    parameter [15:0] CKCAL_RSVD1 = 16'h0000;
15238    parameter CLK_CORRECT_USE = "TRUE";
15239    parameter CLK_COR_KEEP_IDLE = "FALSE";
15240    parameter integer CLK_COR_MAX_LAT = 20;
15241    parameter integer CLK_COR_MIN_LAT = 18;
15242    parameter CLK_COR_PRECEDENCE = "TRUE";
15243    parameter integer CLK_COR_REPEAT_WAIT = 0;
15244    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
15245    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
15246    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
15247    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
15248    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
15249    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
15250    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
15251    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
15252    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
15253    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
15254    parameter CLK_COR_SEQ_2_USE = "FALSE";
15255    parameter integer CLK_COR_SEQ_LEN = 2;
15256    parameter [15:0] CPLL_CFG0 = 16'h20F8;
15257    parameter [15:0] CPLL_CFG1 = 16'hA494;
15258    parameter [15:0] CPLL_CFG2 = 16'hF001;
15259    parameter [5:0] CPLL_CFG3 = 6'h00;
15260    parameter integer CPLL_FBDIV = 4;
15261    parameter integer CPLL_FBDIV_45 = 4;
15262    parameter [15:0] CPLL_INIT_CFG0 = 16'h001E;
15263    parameter [7:0] CPLL_INIT_CFG1 = 8'h00;
15264    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
15265    parameter integer CPLL_REFCLK_DIV = 1;
15266    parameter [2:0] CTLE3_OCAP_EXT_CTRL = 3'b000;
15267    parameter [0:0] CTLE3_OCAP_EXT_EN = 1'b0;
15268    parameter [1:0] DDI_CTRL = 2'b00;
15269    parameter integer DDI_REALIGN_WAIT = 15;
15270    parameter DEC_MCOMMA_DETECT = "TRUE";
15271    parameter DEC_PCOMMA_DETECT = "TRUE";
15272    parameter DEC_VALID_COMMA_ONLY = "TRUE";
15273    parameter [0:0] DFE_D_X_REL_POS = 1'b0;
15274    parameter [0:0] DFE_VCM_COMP_EN = 1'b0;
15275    parameter [9:0] DMONITOR_CFG0 = 10'h000;
15276    parameter [7:0] DMONITOR_CFG1 = 8'h00;
15277    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
15278    parameter [5:0] ES_CONTROL = 6'b000000;
15279    parameter ES_ERRDET_EN = "FALSE";
15280    parameter ES_EYE_SCAN_EN = "FALSE";
15281    parameter [11:0] ES_HORZ_OFFSET = 12'h000;
15282    parameter [9:0] ES_PMA_CFG = 10'b0000000000;
15283    parameter [4:0] ES_PRESCALE = 5'b00000;
15284    parameter [15:0] ES_QUALIFIER0 = 16'h0000;
15285    parameter [15:0] ES_QUALIFIER1 = 16'h0000;
15286    parameter [15:0] ES_QUALIFIER2 = 16'h0000;
15287    parameter [15:0] ES_QUALIFIER3 = 16'h0000;
15288    parameter [15:0] ES_QUALIFIER4 = 16'h0000;
15289    parameter [15:0] ES_QUALIFIER5 = 16'h0000;
15290    parameter [15:0] ES_QUALIFIER6 = 16'h0000;
15291    parameter [15:0] ES_QUALIFIER7 = 16'h0000;
15292    parameter [15:0] ES_QUALIFIER8 = 16'h0000;
15293    parameter [15:0] ES_QUALIFIER9 = 16'h0000;
15294    parameter [15:0] ES_QUAL_MASK0 = 16'h0000;
15295    parameter [15:0] ES_QUAL_MASK1 = 16'h0000;
15296    parameter [15:0] ES_QUAL_MASK2 = 16'h0000;
15297    parameter [15:0] ES_QUAL_MASK3 = 16'h0000;
15298    parameter [15:0] ES_QUAL_MASK4 = 16'h0000;
15299    parameter [15:0] ES_QUAL_MASK5 = 16'h0000;
15300    parameter [15:0] ES_QUAL_MASK6 = 16'h0000;
15301    parameter [15:0] ES_QUAL_MASK7 = 16'h0000;
15302    parameter [15:0] ES_QUAL_MASK8 = 16'h0000;
15303    parameter [15:0] ES_QUAL_MASK9 = 16'h0000;
15304    parameter [15:0] ES_SDATA_MASK0 = 16'h0000;
15305    parameter [15:0] ES_SDATA_MASK1 = 16'h0000;
15306    parameter [15:0] ES_SDATA_MASK2 = 16'h0000;
15307    parameter [15:0] ES_SDATA_MASK3 = 16'h0000;
15308    parameter [15:0] ES_SDATA_MASK4 = 16'h0000;
15309    parameter [15:0] ES_SDATA_MASK5 = 16'h0000;
15310    parameter [15:0] ES_SDATA_MASK6 = 16'h0000;
15311    parameter [15:0] ES_SDATA_MASK7 = 16'h0000;
15312    parameter [15:0] ES_SDATA_MASK8 = 16'h0000;
15313    parameter [15:0] ES_SDATA_MASK9 = 16'h0000;
15314    parameter [10:0] EVODD_PHI_CFG = 11'b00000000000;
15315    parameter [0:0] EYE_SCAN_SWAP_EN = 1'b0;
15316    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
15317    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
15318    parameter FTS_LANE_DESKEW_EN = "FALSE";
15319    parameter [4:0] GEARBOX_MODE = 5'b00000;
15320    parameter [0:0] GM_BIAS_SELECT = 1'b0;
15321    parameter [0:0] ISCAN_CK_PH_SEL2 = 1'b0;
15322    parameter [0:0] LOCAL_MASTER = 1'b0;
15323    parameter [15:0] LOOP0_CFG = 16'h0000;
15324    parameter [15:0] LOOP10_CFG = 16'h0000;
15325    parameter [15:0] LOOP11_CFG = 16'h0000;
15326    parameter [15:0] LOOP12_CFG = 16'h0000;
15327    parameter [15:0] LOOP13_CFG = 16'h0000;
15328    parameter [15:0] LOOP1_CFG = 16'h0000;
15329    parameter [15:0] LOOP2_CFG = 16'h0000;
15330    parameter [15:0] LOOP3_CFG = 16'h0000;
15331    parameter [15:0] LOOP4_CFG = 16'h0000;
15332    parameter [15:0] LOOP5_CFG = 16'h0000;
15333    parameter [15:0] LOOP6_CFG = 16'h0000;
15334    parameter [15:0] LOOP7_CFG = 16'h0000;
15335    parameter [15:0] LOOP8_CFG = 16'h0000;
15336    parameter [15:0] LOOP9_CFG = 16'h0000;
15337    parameter [2:0] LPBK_BIAS_CTRL = 3'b000;
15338    parameter [0:0] LPBK_EN_RCAL_B = 1'b0;
15339    parameter [3:0] LPBK_EXT_RCAL = 4'b0000;
15340    parameter [3:0] LPBK_RG_CTRL = 4'b0000;
15341    parameter [1:0] OOBDIVCTL = 2'b00;
15342    parameter [0:0] OOB_PWRUP = 1'b0;
15343    parameter PCI3_AUTO_REALIGN = "FRST_SMPL";
15344    parameter [0:0] PCI3_PIPE_RX_ELECIDLE = 1'b1;
15345    parameter [1:0] PCI3_RX_ASYNC_EBUF_BYPASS = 2'b00;
15346    parameter [0:0] PCI3_RX_ELECIDLE_EI2_ENABLE = 1'b0;
15347    parameter [5:0] PCI3_RX_ELECIDLE_H2L_COUNT = 6'b000000;
15348    parameter [2:0] PCI3_RX_ELECIDLE_H2L_DISABLE = 3'b000;
15349    parameter [5:0] PCI3_RX_ELECIDLE_HI_COUNT = 6'b000000;
15350    parameter [0:0] PCI3_RX_ELECIDLE_LP4_DISABLE = 1'b0;
15351    parameter [0:0] PCI3_RX_FIFO_DISABLE = 1'b0;
15352    parameter [15:0] PCIE_BUFG_DIV_CTRL = 16'h0000;
15353    parameter [15:0] PCIE_RXPCS_CFG_GEN3 = 16'h0000;
15354    parameter [15:0] PCIE_RXPMA_CFG = 16'h0000;
15355    parameter [15:0] PCIE_TXPCS_CFG_GEN3 = 16'h0000;
15356    parameter [15:0] PCIE_TXPMA_CFG = 16'h0000;
15357    parameter PCS_PCIE_EN = "FALSE";
15358    parameter [15:0] PCS_RSVD0 = 16'b0000000000000000;
15359    parameter [2:0] PCS_RSVD1 = 3'b000;
15360    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
15361    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
15362    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
15363    parameter [1:0] PLL_SEL_MODE_GEN12 = 2'h0;
15364    parameter [1:0] PLL_SEL_MODE_GEN3 = 2'h0;
15365    parameter [15:0] PMA_RSV0 = 16'h0000;
15366    parameter [15:0] PMA_RSV1 = 16'h0000;
15367    parameter integer PREIQ_FREQ_BST = 0;
15368    parameter [2:0] PROCESS_PAR = 3'b010;
15369    parameter [0:0] RATE_SW_USE_DRP = 1'b0;
15370    parameter [0:0] RESET_POWERSAVE_DISABLE = 1'b0;
15371    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
15372    parameter RXBUF_ADDR_MODE = "FULL";
15373    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
15374    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
15375    parameter RXBUF_EN = "TRUE";
15376    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
15377    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
15378    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
15379    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
15380    parameter integer RXBUF_THRESH_OVFLW = 0;
15381    parameter RXBUF_THRESH_OVRD = "FALSE";
15382    parameter integer RXBUF_THRESH_UNDFLW = 4;
15383    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
15384    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
15385    parameter [15:0] RXCDR_CFG0 = 16'h0000;
15386    parameter [15:0] RXCDR_CFG0_GEN3 = 16'h0000;
15387    parameter [15:0] RXCDR_CFG1 = 16'h0300;
15388    parameter [15:0] RXCDR_CFG1_GEN3 = 16'h0300;
15389    parameter [15:0] RXCDR_CFG2 = 16'h0060;
15390    parameter [15:0] RXCDR_CFG2_GEN3 = 16'h0060;
15391    parameter [15:0] RXCDR_CFG3 = 16'h0000;
15392    parameter [15:0] RXCDR_CFG3_GEN3 = 16'h0000;
15393    parameter [15:0] RXCDR_CFG4 = 16'h0002;
15394    parameter [15:0] RXCDR_CFG4_GEN3 = 16'h0002;
15395    parameter [15:0] RXCDR_CFG5 = 16'h0000;
15396    parameter [15:0] RXCDR_CFG5_GEN3 = 16'h0000;
15397    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
15398    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
15399    parameter [15:0] RXCDR_LOCK_CFG0 = 16'h0001;
15400    parameter [15:0] RXCDR_LOCK_CFG1 = 16'h0000;
15401    parameter [15:0] RXCDR_LOCK_CFG2 = 16'h0000;
15402    parameter [15:0] RXCDR_LOCK_CFG3 = 16'h0000;
15403    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
15404    parameter [1:0] RXCFOKDONE_SRC = 2'b00;
15405    parameter [15:0] RXCFOK_CFG0 = 16'h3E00;
15406    parameter [15:0] RXCFOK_CFG1 = 16'h0042;
15407    parameter [15:0] RXCFOK_CFG2 = 16'h002D;
15408    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
15409    parameter [15:0] RXDFELPM_KL_CFG0 = 16'h0000;
15410    parameter [15:0] RXDFELPM_KL_CFG1 = 16'h0022;
15411    parameter [15:0] RXDFELPM_KL_CFG2 = 16'h0100;
15412    parameter [15:0] RXDFE_CFG0 = 16'h4C00;
15413    parameter [15:0] RXDFE_CFG1 = 16'h0000;
15414    parameter [15:0] RXDFE_GC_CFG0 = 16'h1E00;
15415    parameter [15:0] RXDFE_GC_CFG1 = 16'h1900;
15416    parameter [15:0] RXDFE_GC_CFG2 = 16'h0000;
15417    parameter [15:0] RXDFE_H2_CFG0 = 16'h0000;
15418    parameter [15:0] RXDFE_H2_CFG1 = 16'h0002;
15419    parameter [15:0] RXDFE_H3_CFG0 = 16'h0000;
15420    parameter [15:0] RXDFE_H3_CFG1 = 16'h0002;
15421    parameter [15:0] RXDFE_H4_CFG0 = 16'h0000;
15422    parameter [15:0] RXDFE_H4_CFG1 = 16'h0003;
15423    parameter [15:0] RXDFE_H5_CFG0 = 16'h0000;
15424    parameter [15:0] RXDFE_H5_CFG1 = 16'h0002;
15425    parameter [15:0] RXDFE_H6_CFG0 = 16'h0000;
15426    parameter [15:0] RXDFE_H6_CFG1 = 16'h0002;
15427    parameter [15:0] RXDFE_H7_CFG0 = 16'h0000;
15428    parameter [15:0] RXDFE_H7_CFG1 = 16'h0002;
15429    parameter [15:0] RXDFE_H8_CFG0 = 16'h0000;
15430    parameter [15:0] RXDFE_H8_CFG1 = 16'h0002;
15431    parameter [15:0] RXDFE_H9_CFG0 = 16'h0000;
15432    parameter [15:0] RXDFE_H9_CFG1 = 16'h0002;
15433    parameter [15:0] RXDFE_HA_CFG0 = 16'h0000;
15434    parameter [15:0] RXDFE_HA_CFG1 = 16'h0002;
15435    parameter [15:0] RXDFE_HB_CFG0 = 16'h0000;
15436    parameter [15:0] RXDFE_HB_CFG1 = 16'h0002;
15437    parameter [15:0] RXDFE_HC_CFG0 = 16'h0000;
15438    parameter [15:0] RXDFE_HC_CFG1 = 16'h0002;
15439    parameter [15:0] RXDFE_HD_CFG0 = 16'h0000;
15440    parameter [15:0] RXDFE_HD_CFG1 = 16'h0002;
15441    parameter [15:0] RXDFE_HE_CFG0 = 16'h0000;
15442    parameter [15:0] RXDFE_HE_CFG1 = 16'h0002;
15443    parameter [15:0] RXDFE_HF_CFG0 = 16'h0000;
15444    parameter [15:0] RXDFE_HF_CFG1 = 16'h0002;
15445    parameter [15:0] RXDFE_OS_CFG0 = 16'h0000;
15446    parameter [15:0] RXDFE_OS_CFG1 = 16'h0200;
15447    parameter [0:0] RXDFE_PWR_SAVING = 1'b0;
15448    parameter [15:0] RXDFE_UT_CFG0 = 16'h0000;
15449    parameter [15:0] RXDFE_UT_CFG1 = 16'h0002;
15450    parameter [15:0] RXDFE_VP_CFG0 = 16'h0000;
15451    parameter [15:0] RXDFE_VP_CFG1 = 16'h0022;
15452    parameter [15:0] RXDLY_CFG = 16'h001F;
15453    parameter [15:0] RXDLY_LCFG = 16'h0030;
15454    parameter RXELECIDLE_CFG = "SIGCFG_4";
15455    parameter integer RXGBOX_FIFO_INIT_RD_ADDR = 4;
15456    parameter RXGEARBOX_EN = "FALSE";
15457    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
15458    parameter [15:0] RXLPM_CFG = 16'h0000;
15459    parameter [15:0] RXLPM_GC_CFG = 16'h0200;
15460    parameter [15:0] RXLPM_KH_CFG0 = 16'h0000;
15461    parameter [15:0] RXLPM_KH_CFG1 = 16'h0002;
15462    parameter [15:0] RXLPM_OS_CFG0 = 16'h0400;
15463    parameter [15:0] RXLPM_OS_CFG1 = 16'h0000;
15464    parameter [8:0] RXOOB_CFG = 9'b000000110;
15465    parameter RXOOB_CLK_CFG = "PMA";
15466    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
15467    parameter integer RXOUT_DIV = 4;
15468    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
15469    parameter [15:0] RXPHBEACON_CFG = 16'h0000;
15470    parameter [15:0] RXPHDLY_CFG = 16'h2020;
15471    parameter [15:0] RXPHSAMP_CFG = 16'h2100;
15472    parameter [15:0] RXPHSLIP_CFG = 16'h9933;
15473    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
15474    parameter [0:0] RXPI_AUTO_BW_SEL_BYPASS = 1'b0;
15475    parameter [15:0] RXPI_CFG = 16'h0100;
15476    parameter [0:0] RXPI_LPM = 1'b0;
15477    parameter [15:0] RXPI_RSV0 = 16'h0000;
15478    parameter [1:0] RXPI_SEL_LC = 2'b00;
15479    parameter [1:0] RXPI_STARTCODE = 2'b00;
15480    parameter [0:0] RXPI_VREFSEL = 1'b0;
15481    parameter RXPMACLK_SEL = "DATA";
15482    parameter [4:0] RXPMARESET_TIME = 5'b00001;
15483    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
15484    parameter integer RXPRBS_LINKACQ_CNT = 15;
15485    parameter integer RXSLIDE_AUTO_WAIT = 7;
15486    parameter RXSLIDE_MODE = "OFF";
15487    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
15488    parameter [0:0] RXSYNC_OVRD = 1'b0;
15489    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
15490    parameter [0:0] RX_AFE_CM_EN = 1'b0;
15491    parameter [15:0] RX_BIAS_CFG0 = 16'h1534;
15492    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
15493    parameter [0:0] RX_CAPFF_SARC_ENB = 1'b0;
15494    parameter integer RX_CLK25_DIV = 8;
15495    parameter [0:0] RX_CLKMUX_EN = 1'b1;
15496    parameter [4:0] RX_CLK_SLIP_OVRD = 5'b00000;
15497    parameter [3:0] RX_CM_BUF_CFG = 4'b1010;
15498    parameter [0:0] RX_CM_BUF_PD = 1'b0;
15499    parameter integer RX_CM_SEL = 3;
15500    parameter integer RX_CM_TRIM = 10;
15501    parameter [0:0] RX_CTLE1_KHKL = 1'b0;
15502    parameter [0:0] RX_CTLE2_KHKL = 1'b0;
15503    parameter [0:0] RX_CTLE3_AGC = 1'b0;
15504    parameter integer RX_DATA_WIDTH = 20;
15505    parameter [5:0] RX_DDI_SEL = 6'b000000;
15506    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
15507    parameter [2:0] RX_DEGEN_CTRL = 3'b010;
15508    parameter integer RX_DFELPM_CFG0 = 6;
15509    parameter [0:0] RX_DFELPM_CFG1 = 1'b0;
15510    parameter [0:0] RX_DFELPM_KLKH_AGC_STUP_EN = 1'b1;
15511    parameter [1:0] RX_DFE_AGC_CFG0 = 2'b00;
15512    parameter integer RX_DFE_AGC_CFG1 = 4;
15513    parameter integer RX_DFE_KL_LPM_KH_CFG0 = 1;
15514    parameter integer RX_DFE_KL_LPM_KH_CFG1 = 2;
15515    parameter [1:0] RX_DFE_KL_LPM_KL_CFG0 = 2'b01;
15516    parameter [2:0] RX_DFE_KL_LPM_KL_CFG1 = 3'b010;
15517    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
15518    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
15519    parameter [0:0] RX_DIV2_MODE_B = 1'b0;
15520    parameter [4:0] RX_DIVRESET_TIME = 5'b00001;
15521    parameter [0:0] RX_EN_CTLE_RCAL_B = 1'b0;
15522    parameter [0:0] RX_EN_HI_LR = 1'b0;
15523    parameter [8:0] RX_EXT_RL_CTRL = 9'b000000000;
15524    parameter [6:0] RX_EYESCAN_VS_CODE = 7'b0000000;
15525    parameter [0:0] RX_EYESCAN_VS_NEG_DIR = 1'b0;
15526    parameter [1:0] RX_EYESCAN_VS_RANGE = 2'b00;
15527    parameter [0:0] RX_EYESCAN_VS_UT_SIGN = 1'b0;
15528    parameter [0:0] RX_FABINT_USRCLK_FLOP = 1'b0;
15529    parameter integer RX_INT_DATAWIDTH = 1;
15530    parameter [0:0] RX_PMA_POWER_SAVE = 1'b0;
15531    parameter real RX_PROGDIV_CFG = 0.0;
15532    parameter [15:0] RX_PROGDIV_RATE = 16'h0001;
15533    parameter [3:0] RX_RESLOAD_CTRL = 4'b0000;
15534    parameter [0:0] RX_RESLOAD_OVRD = 1'b0;
15535    parameter [2:0] RX_SAMPLE_PERIOD = 3'b101;
15536    parameter integer RX_SIG_VALID_DLY = 11;
15537    parameter [0:0] RX_SUM_DFETAPREP_EN = 1'b0;
15538    parameter [3:0] RX_SUM_IREF_TUNE = 4'b0000;
15539    parameter [3:0] RX_SUM_VCMTUNE = 4'b1000;
15540    parameter [0:0] RX_SUM_VCM_OVWR = 1'b0;
15541    parameter [2:0] RX_SUM_VREF_TUNE = 3'b100;
15542    parameter [1:0] RX_TUNE_AFE_OS = 2'b00;
15543    parameter [2:0] RX_VREG_CTRL = 3'b101;
15544    parameter [0:0] RX_VREG_PDB = 1'b1;
15545    parameter [1:0] RX_WIDEMODE_CDR = 2'b01;
15546    parameter RX_XCLK_SEL = "RXDES";
15547    parameter [0:0] RX_XMODE_SEL = 1'b0;
15548    parameter integer SAS_MAX_COM = 64;
15549    parameter integer SAS_MIN_COM = 36;
15550    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
15551    parameter [2:0] SATA_BURST_VAL = 3'b100;
15552    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
15553    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
15554    parameter integer SATA_MAX_BURST = 8;
15555    parameter integer SATA_MAX_INIT = 21;
15556    parameter integer SATA_MAX_WAKE = 7;
15557    parameter integer SATA_MIN_BURST = 4;
15558    parameter integer SATA_MIN_INIT = 12;
15559    parameter integer SATA_MIN_WAKE = 4;
15560    parameter SHOW_REALIGN_COMMA = "TRUE";
15561    parameter SIM_MODE = "FAST";
15562    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
15563    parameter SIM_RESET_SPEEDUP = "TRUE";
15564    parameter [0:0] SIM_TX_EIDLE_DRIVE_LEVEL = 1'b0;
15565    parameter integer SIM_VERSION = 2;
15566    parameter [1:0] TAPDLY_SET_TX = 2'h0;
15567    parameter [3:0] TEMPERATURE_PAR = 4'b0010;
15568    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
15569    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
15570    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
15571    parameter [7:0] TST_RSV0 = 8'h00;
15572    parameter [7:0] TST_RSV1 = 8'h00;
15573    parameter TXBUF_EN = "TRUE";
15574    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
15575    parameter [15:0] TXDLY_CFG = 16'h001F;
15576    parameter [15:0] TXDLY_LCFG = 16'h0030;
15577    parameter TXFIFO_ADDR_CFG = "LOW";
15578    parameter integer TXGBOX_FIFO_INIT_RD_ADDR = 4;
15579    parameter TXGEARBOX_EN = "FALSE";
15580    parameter integer TXOUT_DIV = 4;
15581    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
15582    parameter [15:0] TXPHDLY_CFG0 = 16'h2020;
15583    parameter [15:0] TXPHDLY_CFG1 = 16'h0001;
15584    parameter [15:0] TXPH_CFG = 16'h0123;
15585    parameter [15:0] TXPH_CFG2 = 16'h0000;
15586    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
15587    parameter [1:0] TXPI_CFG0 = 2'b00;
15588    parameter [1:0] TXPI_CFG1 = 2'b00;
15589    parameter [1:0] TXPI_CFG2 = 2'b00;
15590    parameter [0:0] TXPI_CFG3 = 1'b0;
15591    parameter [0:0] TXPI_CFG4 = 1'b1;
15592    parameter [2:0] TXPI_CFG5 = 3'b000;
15593    parameter [0:0] TXPI_GRAY_SEL = 1'b0;
15594    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
15595    parameter [0:0] TXPI_LPM = 1'b0;
15596    parameter TXPI_PPMCLK_SEL = "TXUSRCLK2";
15597    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
15598    parameter [15:0] TXPI_RSV0 = 16'h0000;
15599    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
15600    parameter [0:0] TXPI_VREFSEL = 1'b0;
15601    parameter [4:0] TXPMARESET_TIME = 5'b00001;
15602    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
15603    parameter [0:0] TXSYNC_OVRD = 1'b0;
15604    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
15605    parameter integer TX_CLK25_DIV = 8;
15606    parameter [0:0] TX_CLKMUX_EN = 1'b1;
15607    parameter [0:0] TX_CLKREG_PDB = 1'b0;
15608    parameter [2:0] TX_CLKREG_SET = 3'b000;
15609    parameter integer TX_DATA_WIDTH = 20;
15610    parameter [5:0] TX_DCD_CFG = 6'b000010;
15611    parameter [0:0] TX_DCD_EN = 1'b0;
15612    parameter [5:0] TX_DEEMPH0 = 6'b000000;
15613    parameter [5:0] TX_DEEMPH1 = 6'b000000;
15614    parameter [4:0] TX_DIVRESET_TIME = 5'b00001;
15615    parameter TX_DRIVE_MODE = "DIRECT";
15616    parameter integer TX_DRVMUX_CTRL = 2;
15617    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
15618    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
15619    parameter [0:0] TX_EML_PHI_TUNE = 1'b0;
15620    parameter [0:0] TX_FABINT_USRCLK_FLOP = 1'b0;
15621    parameter [0:0] TX_FIFO_BYP_EN = 1'b0;
15622    parameter [0:0] TX_IDLE_DATA_ZERO = 1'b0;
15623    parameter integer TX_INT_DATAWIDTH = 1;
15624    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
15625    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
15626    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
15627    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
15628    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
15629    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
15630    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
15631    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
15632    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
15633    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
15634    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
15635    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
15636    parameter [2:0] TX_MODE_SEL = 3'b000;
15637    parameter [15:0] TX_PHICAL_CFG0 = 16'h0000;
15638    parameter [15:0] TX_PHICAL_CFG1 = 16'h7E00;
15639    parameter [15:0] TX_PHICAL_CFG2 = 16'h0000;
15640    parameter integer TX_PI_BIASSET = 0;
15641    parameter [15:0] TX_PI_CFG0 = 16'h0000;
15642    parameter [15:0] TX_PI_CFG1 = 16'h0000;
15643    parameter [0:0] TX_PI_DIV2_MODE_B = 1'b0;
15644    parameter [0:0] TX_PI_SEL_QPLL0 = 1'b0;
15645    parameter [0:0] TX_PI_SEL_QPLL1 = 1'b0;
15646    parameter [0:0] TX_PMADATA_OPT = 1'b0;
15647    parameter [0:0] TX_PMA_POWER_SAVE = 1'b0;
15648    parameter integer TX_PREDRV_CTRL = 2;
15649    parameter TX_PROGCLK_SEL = "POSTPI";
15650    parameter real TX_PROGDIV_CFG = 0.0;
15651    parameter [15:0] TX_PROGDIV_RATE = 16'h0001;
15652    parameter [13:0] TX_RXDETECT_CFG = 14'h0032;
15653    parameter integer TX_RXDETECT_REF = 4;
15654    parameter [2:0] TX_SAMPLE_PERIOD = 3'b101;
15655    parameter [0:0] TX_SARC_LPBK_ENB = 1'b0;
15656    parameter TX_XCLK_SEL = "TXOUT";
15657    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
15658    output [2:0] BUFGTCE;
15659    output [2:0] BUFGTCEMASK;
15660    output [8:0] BUFGTDIV;
15661    output [2:0] BUFGTRESET;
15662    output [2:0] BUFGTRSTMASK;
15663    output CPLLFBCLKLOST;
15664    output CPLLLOCK;
15665    output CPLLREFCLKLOST;
15666    output [16:0] DMONITOROUT;
15667    output [15:0] DRPDO;
15668    output DRPRDY;
15669    output EYESCANDATAERROR;
15670    output GTPOWERGOOD;
15671    output GTREFCLKMONITOR;
15672    output GTYTXN;
15673    output GTYTXP;
15674    output PCIERATEGEN3;
15675    output PCIERATEIDLE;
15676    output [1:0] PCIERATEQPLLPD;
15677    output [1:0] PCIERATEQPLLRESET;
15678    output PCIESYNCTXSYNCDONE;
15679    output PCIEUSERGEN3RDY;
15680    output PCIEUSERPHYSTATUSRST;
15681    output PCIEUSERRATESTART;
15682    output [15:0] PCSRSVDOUT;
15683    output PHYSTATUS;
15684    output [7:0] PINRSRVDAS;
15685    output RESETEXCEPTION;
15686    output [2:0] RXBUFSTATUS;
15687    output RXBYTEISALIGNED;
15688    output RXBYTEREALIGN;
15689    output RXCDRLOCK;
15690    output RXCDRPHDONE;
15691    output RXCHANBONDSEQ;
15692    output RXCHANISALIGNED;
15693    output RXCHANREALIGN;
15694    output [4:0] RXCHBONDO;
15695    output RXCKCALDONE;
15696    output [1:0] RXCLKCORCNT;
15697    output RXCOMINITDET;
15698    output RXCOMMADET;
15699    output RXCOMSASDET;
15700    output RXCOMWAKEDET;
15701    output [15:0] RXCTRL0;
15702    output [15:0] RXCTRL1;
15703    output [7:0] RXCTRL2;
15704    output [7:0] RXCTRL3;
15705    output [127:0] RXDATA;
15706    output [7:0] RXDATAEXTENDRSVD;
15707    output [1:0] RXDATAVALID;
15708    output RXDLYSRESETDONE;
15709    output RXELECIDLE;
15710    output [5:0] RXHEADER;
15711    output [1:0] RXHEADERVALID;
15712    output [6:0] RXMONITOROUT;
15713    output RXOSINTDONE;
15714    output RXOSINTSTARTED;
15715    output RXOSINTSTROBEDONE;
15716    output RXOSINTSTROBESTARTED;
15717    output RXOUTCLK;
15718    output RXOUTCLKFABRIC;
15719    output RXOUTCLKPCS;
15720    output RXPHALIGNDONE;
15721    output RXPHALIGNERR;
15722    output RXPMARESETDONE;
15723    output RXPRBSERR;
15724    output RXPRBSLOCKED;
15725    output RXPRGDIVRESETDONE;
15726    output RXRATEDONE;
15727    output RXRECCLKOUT;
15728    output RXRESETDONE;
15729    output RXSLIDERDY;
15730    output RXSLIPDONE;
15731    output RXSLIPOUTCLKRDY;
15732    output RXSLIPPMARDY;
15733    output [1:0] RXSTARTOFSEQ;
15734    output [2:0] RXSTATUS;
15735    output RXSYNCDONE;
15736    output RXSYNCOUT;
15737    output RXVALID;
15738    output [1:0] TXBUFSTATUS;
15739    output TXCOMFINISH;
15740    output TXDCCDONE;
15741    output TXDLYSRESETDONE;
15742    output TXOUTCLK;
15743    output TXOUTCLKFABRIC;
15744    output TXOUTCLKPCS;
15745    output TXPHALIGNDONE;
15746    output TXPHINITDONE;
15747    output TXPMARESETDONE;
15748    output TXPRGDIVRESETDONE;
15749    output TXRATEDONE;
15750    output TXRESETDONE;
15751    output TXSYNCDONE;
15752    output TXSYNCOUT;
15753    input CDRSTEPDIR;
15754    input CDRSTEPSQ;
15755    input CDRSTEPSX;
15756    input CFGRESET;
15757    input CLKRSVD0;
15758    input CLKRSVD1;
15759    input CPLLLOCKDETCLK;
15760    input CPLLLOCKEN;
15761    input CPLLPD;
15762    input [2:0] CPLLREFCLKSEL;
15763    input CPLLRESET;
15764    input DMONFIFORESET;
15765    input DMONITORCLK;
15766    input [9:0] DRPADDR;
15767    input DRPCLK;
15768    input [15:0] DRPDI;
15769    input DRPEN;
15770    input DRPWE;
15771    input ELPCALDVORWREN;
15772    input ELPCALPAORWREN;
15773    input EVODDPHICALDONE;
15774    input EVODDPHICALSTART;
15775    input EVODDPHIDRDEN;
15776    input EVODDPHIDWREN;
15777    input EVODDPHIXRDEN;
15778    input EVODDPHIXWREN;
15779    input EYESCANMODE;
15780    input EYESCANRESET;
15781    input EYESCANTRIGGER;
15782    input GTGREFCLK;
15783    input GTNORTHREFCLK0;
15784    input GTNORTHREFCLK1;
15785    input GTREFCLK0;
15786    input GTREFCLK1;
15787    input GTRESETSEL;
15788    input [15:0] GTRSVD;
15789    input GTRXRESET;
15790    input GTSOUTHREFCLK0;
15791    input GTSOUTHREFCLK1;
15792    input GTTXRESET;
15793    input GTYRXN;
15794    input GTYRXP;
15795    input [2:0] LOOPBACK;
15796    input [15:0] LOOPRSVD;
15797    input LPBKRXTXSEREN;
15798    input LPBKTXRXSEREN;
15799    input PCIEEQRXEQADAPTDONE;
15800    input PCIERSTIDLE;
15801    input PCIERSTTXSYNCSTART;
15802    input PCIEUSERRATEDONE;
15803    input [15:0] PCSRSVDIN;
15804    input [4:0] PCSRSVDIN2;
15805    input [4:0] PMARSVDIN;
15806    input QPLL0CLK;
15807    input QPLL0REFCLK;
15808    input QPLL1CLK;
15809    input QPLL1REFCLK;
15810    input RESETOVRD;
15811    input RSTCLKENTX;
15812    input RX8B10BEN;
15813    input RXBUFRESET;
15814    input RXCDRFREQRESET;
15815    input RXCDRHOLD;
15816    input RXCDROVRDEN;
15817    input RXCDRRESET;
15818    input RXCDRRESETRSV;
15819    input RXCHBONDEN;
15820    input [4:0] RXCHBONDI;
15821    input [2:0] RXCHBONDLEVEL;
15822    input RXCHBONDMASTER;
15823    input RXCHBONDSLAVE;
15824    input RXCKCALRESET;
15825    input RXCOMMADETEN;
15826    input RXDCCFORCESTART;
15827    input RXDFEAGCHOLD;
15828    input RXDFEAGCOVRDEN;
15829    input RXDFELFHOLD;
15830    input RXDFELFOVRDEN;
15831    input RXDFELPMRESET;
15832    input RXDFETAP10HOLD;
15833    input RXDFETAP10OVRDEN;
15834    input RXDFETAP11HOLD;
15835    input RXDFETAP11OVRDEN;
15836    input RXDFETAP12HOLD;
15837    input RXDFETAP12OVRDEN;
15838    input RXDFETAP13HOLD;
15839    input RXDFETAP13OVRDEN;
15840    input RXDFETAP14HOLD;
15841    input RXDFETAP14OVRDEN;
15842    input RXDFETAP15HOLD;
15843    input RXDFETAP15OVRDEN;
15844    input RXDFETAP2HOLD;
15845    input RXDFETAP2OVRDEN;
15846    input RXDFETAP3HOLD;
15847    input RXDFETAP3OVRDEN;
15848    input RXDFETAP4HOLD;
15849    input RXDFETAP4OVRDEN;
15850    input RXDFETAP5HOLD;
15851    input RXDFETAP5OVRDEN;
15852    input RXDFETAP6HOLD;
15853    input RXDFETAP6OVRDEN;
15854    input RXDFETAP7HOLD;
15855    input RXDFETAP7OVRDEN;
15856    input RXDFETAP8HOLD;
15857    input RXDFETAP8OVRDEN;
15858    input RXDFETAP9HOLD;
15859    input RXDFETAP9OVRDEN;
15860    input RXDFEUTHOLD;
15861    input RXDFEUTOVRDEN;
15862    input RXDFEVPHOLD;
15863    input RXDFEVPOVRDEN;
15864    input RXDFEVSEN;
15865    input RXDFEXYDEN;
15866    input RXDLYBYPASS;
15867    input RXDLYEN;
15868    input RXDLYOVRDEN;
15869    input RXDLYSRESET;
15870    input [1:0] RXELECIDLEMODE;
15871    input RXGEARBOXSLIP;
15872    input RXLATCLK;
15873    input RXLPMEN;
15874    input RXLPMGCHOLD;
15875    input RXLPMGCOVRDEN;
15876    input RXLPMHFHOLD;
15877    input RXLPMHFOVRDEN;
15878    input RXLPMLFHOLD;
15879    input RXLPMLFKLOVRDEN;
15880    input RXLPMOSHOLD;
15881    input RXLPMOSOVRDEN;
15882    input RXMCOMMAALIGNEN;
15883    input [1:0] RXMONITORSEL;
15884    input RXOOBRESET;
15885    input RXOSCALRESET;
15886    input RXOSHOLD;
15887    input [3:0] RXOSINTCFG;
15888    input RXOSINTEN;
15889    input RXOSINTHOLD;
15890    input RXOSINTOVRDEN;
15891    input RXOSINTSTROBE;
15892    input RXOSINTTESTOVRDEN;
15893    input RXOSOVRDEN;
15894    input [2:0] RXOUTCLKSEL;
15895    input RXPCOMMAALIGNEN;
15896    input RXPCSRESET;
15897    input [1:0] RXPD;
15898    input RXPHALIGN;
15899    input RXPHALIGNEN;
15900    input RXPHDLYPD;
15901    input RXPHDLYRESET;
15902    input RXPHOVRDEN;
15903    input [1:0] RXPLLCLKSEL;
15904    input RXPMARESET;
15905    input RXPOLARITY;
15906    input RXPRBSCNTRESET;
15907    input [3:0] RXPRBSSEL;
15908    input RXPROGDIVRESET;
15909    input [2:0] RXRATE;
15910    input RXRATEMODE;
15911    input RXSLIDE;
15912    input RXSLIPOUTCLK;
15913    input RXSLIPPMA;
15914    input RXSYNCALLIN;
15915    input RXSYNCIN;
15916    input RXSYNCMODE;
15917    input [1:0] RXSYSCLKSEL;
15918    input RXUSERRDY;
15919    input RXUSRCLK;
15920    input RXUSRCLK2;
15921    input SIGVALIDCLK;
15922    input [19:0] TSTIN;
15923    input [7:0] TX8B10BBYPASS;
15924    input TX8B10BEN;
15925    input [2:0] TXBUFDIFFCTRL;
15926    input TXCOMINIT;
15927    input TXCOMSAS;
15928    input TXCOMWAKE;
15929    input [15:0] TXCTRL0;
15930    input [15:0] TXCTRL1;
15931    input [7:0] TXCTRL2;
15932    input [127:0] TXDATA;
15933    input [7:0] TXDATAEXTENDRSVD;
15934    input TXDCCFORCESTART;
15935    input TXDCCRESET;
15936    input TXDEEMPH;
15937    input TXDETECTRX;
15938    input [4:0] TXDIFFCTRL;
15939    input TXDIFFPD;
15940    input TXDLYBYPASS;
15941    input TXDLYEN;
15942    input TXDLYHOLD;
15943    input TXDLYOVRDEN;
15944    input TXDLYSRESET;
15945    input TXDLYUPDOWN;
15946    input TXELECIDLE;
15947    input TXELFORCESTART;
15948    input [5:0] TXHEADER;
15949    input TXINHIBIT;
15950    input TXLATCLK;
15951    input [6:0] TXMAINCURSOR;
15952    input [2:0] TXMARGIN;
15953    input [2:0] TXOUTCLKSEL;
15954    input TXPCSRESET;
15955    input [1:0] TXPD;
15956    input TXPDELECIDLEMODE;
15957    input TXPHALIGN;
15958    input TXPHALIGNEN;
15959    input TXPHDLYPD;
15960    input TXPHDLYRESET;
15961    input TXPHDLYTSTCLK;
15962    input TXPHINIT;
15963    input TXPHOVRDEN;
15964    input TXPIPPMEN;
15965    input TXPIPPMOVRDEN;
15966    input TXPIPPMPD;
15967    input TXPIPPMSEL;
15968    input [4:0] TXPIPPMSTEPSIZE;
15969    input TXPISOPD;
15970    input [1:0] TXPLLCLKSEL;
15971    input TXPMARESET;
15972    input TXPOLARITY;
15973    input [4:0] TXPOSTCURSOR;
15974    input TXPRBSFORCEERR;
15975    input [3:0] TXPRBSSEL;
15976    input [4:0] TXPRECURSOR;
15977    input TXPROGDIVRESET;
15978    input [2:0] TXRATE;
15979    input TXRATEMODE;
15980    input [6:0] TXSEQUENCE;
15981    input TXSWING;
15982    input TXSYNCALLIN;
15983    input TXSYNCIN;
15984    input TXSYNCMODE;
15985    input [1:0] TXSYSCLKSEL;
15986    input TXUSERRDY;
15987    input TXUSRCLK;
15988    input TXUSRCLK2;
15989endmodule
15990
15991module GTYE3_COMMON (...);
15992    parameter [15:0] A_SDM1DATA1_0 = 16'b0000000000000000;
15993    parameter [8:0] A_SDM1DATA1_1 = 9'b000000000;
15994    parameter [15:0] BIAS_CFG0 = 16'h0000;
15995    parameter [15:0] BIAS_CFG1 = 16'h0000;
15996    parameter [15:0] BIAS_CFG2 = 16'h0000;
15997    parameter [15:0] BIAS_CFG3 = 16'h0000;
15998    parameter [15:0] BIAS_CFG4 = 16'h0000;
15999    parameter [9:0] BIAS_CFG_RSVD = 10'b0000000000;
16000    parameter [15:0] COMMON_CFG0 = 16'h0000;
16001    parameter [15:0] COMMON_CFG1 = 16'h0000;
16002    parameter [15:0] POR_CFG = 16'h0004;
16003    parameter [15:0] PPF0_CFG = 16'h0FFF;
16004    parameter [15:0] PPF1_CFG = 16'h0FFF;
16005    parameter QPLL0CLKOUT_RATE = "FULL";
16006    parameter [15:0] QPLL0_CFG0 = 16'h301C;
16007    parameter [15:0] QPLL0_CFG1 = 16'h0000;
16008    parameter [15:0] QPLL0_CFG1_G3 = 16'h0020;
16009    parameter [15:0] QPLL0_CFG2 = 16'h0780;
16010    parameter [15:0] QPLL0_CFG2_G3 = 16'h0780;
16011    parameter [15:0] QPLL0_CFG3 = 16'h0120;
16012    parameter [15:0] QPLL0_CFG4 = 16'h0021;
16013    parameter [9:0] QPLL0_CP = 10'b0000011111;
16014    parameter [9:0] QPLL0_CP_G3 = 10'b0000011111;
16015    parameter integer QPLL0_FBDIV = 66;
16016    parameter integer QPLL0_FBDIV_G3 = 80;
16017    parameter [15:0] QPLL0_INIT_CFG0 = 16'h0000;
16018    parameter [7:0] QPLL0_INIT_CFG1 = 8'h00;
16019    parameter [15:0] QPLL0_LOCK_CFG = 16'h01E8;
16020    parameter [15:0] QPLL0_LOCK_CFG_G3 = 16'h21E8;
16021    parameter [9:0] QPLL0_LPF = 10'b1111111111;
16022    parameter [9:0] QPLL0_LPF_G3 = 10'b1111111111;
16023    parameter integer QPLL0_REFCLK_DIV = 2;
16024    parameter [15:0] QPLL0_SDM_CFG0 = 16'h0040;
16025    parameter [15:0] QPLL0_SDM_CFG1 = 16'h0000;
16026    parameter [15:0] QPLL0_SDM_CFG2 = 16'h0000;
16027    parameter QPLL1CLKOUT_RATE = "FULL";
16028    parameter [15:0] QPLL1_CFG0 = 16'h301C;
16029    parameter [15:0] QPLL1_CFG1 = 16'h0000;
16030    parameter [15:0] QPLL1_CFG1_G3 = 16'h0020;
16031    parameter [15:0] QPLL1_CFG2 = 16'h0780;
16032    parameter [15:0] QPLL1_CFG2_G3 = 16'h0780;
16033    parameter [15:0] QPLL1_CFG3 = 16'h0120;
16034    parameter [15:0] QPLL1_CFG4 = 16'h0021;
16035    parameter [9:0] QPLL1_CP = 10'b0000011111;
16036    parameter [9:0] QPLL1_CP_G3 = 10'b0000011111;
16037    parameter integer QPLL1_FBDIV = 66;
16038    parameter integer QPLL1_FBDIV_G3 = 80;
16039    parameter [15:0] QPLL1_INIT_CFG0 = 16'h0000;
16040    parameter [7:0] QPLL1_INIT_CFG1 = 8'h00;
16041    parameter [15:0] QPLL1_LOCK_CFG = 16'h01E8;
16042    parameter [15:0] QPLL1_LOCK_CFG_G3 = 16'h21E8;
16043    parameter [9:0] QPLL1_LPF = 10'b1111111111;
16044    parameter [9:0] QPLL1_LPF_G3 = 10'b1111111111;
16045    parameter integer QPLL1_REFCLK_DIV = 2;
16046    parameter [15:0] QPLL1_SDM_CFG0 = 16'h0040;
16047    parameter [15:0] QPLL1_SDM_CFG1 = 16'h0000;
16048    parameter [15:0] QPLL1_SDM_CFG2 = 16'h0000;
16049    parameter [15:0] RSVD_ATTR0 = 16'h0000;
16050    parameter [15:0] RSVD_ATTR1 = 16'h0000;
16051    parameter [15:0] RSVD_ATTR2 = 16'h0000;
16052    parameter [15:0] RSVD_ATTR3 = 16'h0000;
16053    parameter [1:0] RXRECCLKOUT0_SEL = 2'b00;
16054    parameter [1:0] RXRECCLKOUT1_SEL = 2'b00;
16055    parameter [0:0] SARC_EN = 1'b1;
16056    parameter [0:0] SARC_SEL = 1'b0;
16057    parameter [15:0] SDM0INITSEED0_0 = 16'b0000000000000000;
16058    parameter [8:0] SDM0INITSEED0_1 = 9'b000000000;
16059    parameter [15:0] SDM1INITSEED0_0 = 16'b0000000000000000;
16060    parameter [8:0] SDM1INITSEED0_1 = 9'b000000000;
16061    parameter SIM_MODE = "FAST";
16062    parameter SIM_RESET_SPEEDUP = "TRUE";
16063    parameter integer SIM_VERSION = 2;
16064    output [15:0] DRPDO;
16065    output DRPRDY;
16066    output [7:0] PMARSVDOUT0;
16067    output [7:0] PMARSVDOUT1;
16068    output QPLL0FBCLKLOST;
16069    output QPLL0LOCK;
16070    output QPLL0OUTCLK;
16071    output QPLL0OUTREFCLK;
16072    output QPLL0REFCLKLOST;
16073    output QPLL1FBCLKLOST;
16074    output QPLL1LOCK;
16075    output QPLL1OUTCLK;
16076    output QPLL1OUTREFCLK;
16077    output QPLL1REFCLKLOST;
16078    output [7:0] QPLLDMONITOR0;
16079    output [7:0] QPLLDMONITOR1;
16080    output REFCLKOUTMONITOR0;
16081    output REFCLKOUTMONITOR1;
16082    output [1:0] RXRECCLK0_SEL;
16083    output [1:0] RXRECCLK1_SEL;
16084    output [3:0] SDM0FINALOUT;
16085    output [14:0] SDM0TESTDATA;
16086    output [3:0] SDM1FINALOUT;
16087    output [14:0] SDM1TESTDATA;
16088    input BGBYPASSB;
16089    input BGMONITORENB;
16090    input BGPDB;
16091    input [4:0] BGRCALOVRD;
16092    input BGRCALOVRDENB;
16093    input [9:0] DRPADDR;
16094    input DRPCLK;
16095    input [15:0] DRPDI;
16096    input DRPEN;
16097    input DRPWE;
16098    input GTGREFCLK0;
16099    input GTGREFCLK1;
16100    input GTNORTHREFCLK00;
16101    input GTNORTHREFCLK01;
16102    input GTNORTHREFCLK10;
16103    input GTNORTHREFCLK11;
16104    input GTREFCLK00;
16105    input GTREFCLK01;
16106    input GTREFCLK10;
16107    input GTREFCLK11;
16108    input GTSOUTHREFCLK00;
16109    input GTSOUTHREFCLK01;
16110    input GTSOUTHREFCLK10;
16111    input GTSOUTHREFCLK11;
16112    input [7:0] PMARSVD0;
16113    input [7:0] PMARSVD1;
16114    input QPLL0CLKRSVD0;
16115    input QPLL0LOCKDETCLK;
16116    input QPLL0LOCKEN;
16117    input QPLL0PD;
16118    input [2:0] QPLL0REFCLKSEL;
16119    input QPLL0RESET;
16120    input QPLL1CLKRSVD0;
16121    input QPLL1LOCKDETCLK;
16122    input QPLL1LOCKEN;
16123    input QPLL1PD;
16124    input [2:0] QPLL1REFCLKSEL;
16125    input QPLL1RESET;
16126    input [7:0] QPLLRSVD1;
16127    input [4:0] QPLLRSVD2;
16128    input [4:0] QPLLRSVD3;
16129    input [7:0] QPLLRSVD4;
16130    input RCALENB;
16131    input [24:0] SDM0DATA;
16132    input SDM0RESET;
16133    input [1:0] SDM0WIDTH;
16134    input [24:0] SDM1DATA;
16135    input SDM1RESET;
16136    input [1:0] SDM1WIDTH;
16137endmodule
16138
16139module IBUFDS_GTE3 (...);
16140    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
16141    parameter [1:0] REFCLK_HROW_CK_SEL = 2'b00;
16142    parameter [1:0] REFCLK_ICNTL_RX = 2'b00;
16143    output O;
16144    output ODIV2;
16145    input CEB;
16146    (* iopad_external_pin *)
16147    input I;
16148    (* iopad_external_pin *)
16149    input IB;
16150endmodule
16151
16152module OBUFDS_GTE3 (...);
16153    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
16154    parameter [4:0] REFCLK_ICNTL_TX = 5'b00000;
16155    (* iopad_external_pin *)
16156    output O;
16157    (* iopad_external_pin *)
16158    output OB;
16159    input CEB;
16160    input I;
16161endmodule
16162
16163module OBUFDS_GTE3_ADV (...);
16164    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
16165    parameter [4:0] REFCLK_ICNTL_TX = 5'b00000;
16166    (* iopad_external_pin *)
16167    output O;
16168    (* iopad_external_pin *)
16169    output OB;
16170    input CEB;
16171    input [3:0] I;
16172    input [1:0] RXRECCLK_SEL;
16173endmodule
16174
16175module GTHE4_CHANNEL (...);
16176    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
16177    parameter [0:0] ACJTAG_MODE = 1'b0;
16178    parameter [0:0] ACJTAG_RESET = 1'b0;
16179    parameter [15:0] ADAPT_CFG0 = 16'h9200;
16180    parameter [15:0] ADAPT_CFG1 = 16'h801C;
16181    parameter [15:0] ADAPT_CFG2 = 16'h0000;
16182    parameter ALIGN_COMMA_DOUBLE = "FALSE";
16183    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
16184    parameter integer ALIGN_COMMA_WORD = 1;
16185    parameter ALIGN_MCOMMA_DET = "TRUE";
16186    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
16187    parameter ALIGN_PCOMMA_DET = "TRUE";
16188    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
16189    parameter [0:0] A_RXOSCALRESET = 1'b0;
16190    parameter [0:0] A_RXPROGDIVRESET = 1'b0;
16191    parameter [0:0] A_RXTERMINATION = 1'b1;
16192    parameter [4:0] A_TXDIFFCTRL = 5'b01100;
16193    parameter [0:0] A_TXPROGDIVRESET = 1'b0;
16194    parameter [0:0] CAPBYPASS_FORCE = 1'b0;
16195    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
16196    parameter [0:0] CDR_SWAP_MODE_EN = 1'b0;
16197    parameter [0:0] CFOK_PWRSVE_EN = 1'b1;
16198    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
16199    parameter integer CHAN_BOND_MAX_SKEW = 7;
16200    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
16201    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
16202    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
16203    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
16204    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
16205    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
16206    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
16207    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
16208    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
16209    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
16210    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
16211    parameter integer CHAN_BOND_SEQ_LEN = 2;
16212    parameter [15:0] CH_HSPMUX = 16'h2424;
16213    parameter [15:0] CKCAL1_CFG_0 = 16'b0000000000000000;
16214    parameter [15:0] CKCAL1_CFG_1 = 16'b0000000000000000;
16215    parameter [15:0] CKCAL1_CFG_2 = 16'b0000000000000000;
16216    parameter [15:0] CKCAL1_CFG_3 = 16'b0000000000000000;
16217    parameter [15:0] CKCAL2_CFG_0 = 16'b0000000000000000;
16218    parameter [15:0] CKCAL2_CFG_1 = 16'b0000000000000000;
16219    parameter [15:0] CKCAL2_CFG_2 = 16'b0000000000000000;
16220    parameter [15:0] CKCAL2_CFG_3 = 16'b0000000000000000;
16221    parameter [15:0] CKCAL2_CFG_4 = 16'b0000000000000000;
16222    parameter [15:0] CKCAL_RSVD0 = 16'h4000;
16223    parameter [15:0] CKCAL_RSVD1 = 16'h0000;
16224    parameter CLK_CORRECT_USE = "TRUE";
16225    parameter CLK_COR_KEEP_IDLE = "FALSE";
16226    parameter integer CLK_COR_MAX_LAT = 20;
16227    parameter integer CLK_COR_MIN_LAT = 18;
16228    parameter CLK_COR_PRECEDENCE = "TRUE";
16229    parameter integer CLK_COR_REPEAT_WAIT = 0;
16230    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
16231    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
16232    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
16233    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
16234    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
16235    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
16236    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
16237    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
16238    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
16239    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
16240    parameter CLK_COR_SEQ_2_USE = "FALSE";
16241    parameter integer CLK_COR_SEQ_LEN = 2;
16242    parameter [15:0] CPLL_CFG0 = 16'h01FA;
16243    parameter [15:0] CPLL_CFG1 = 16'h24A9;
16244    parameter [15:0] CPLL_CFG2 = 16'h6807;
16245    parameter [15:0] CPLL_CFG3 = 16'h0000;
16246    parameter integer CPLL_FBDIV = 4;
16247    parameter integer CPLL_FBDIV_45 = 4;
16248    parameter [15:0] CPLL_INIT_CFG0 = 16'h001E;
16249    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
16250    parameter integer CPLL_REFCLK_DIV = 1;
16251    parameter [2:0] CTLE3_OCAP_EXT_CTRL = 3'b000;
16252    parameter [0:0] CTLE3_OCAP_EXT_EN = 1'b0;
16253    parameter [1:0] DDI_CTRL = 2'b00;
16254    parameter integer DDI_REALIGN_WAIT = 15;
16255    parameter DEC_MCOMMA_DETECT = "TRUE";
16256    parameter DEC_PCOMMA_DETECT = "TRUE";
16257    parameter DEC_VALID_COMMA_ONLY = "TRUE";
16258    parameter [0:0] DELAY_ELEC = 1'b0;
16259    parameter [9:0] DMONITOR_CFG0 = 10'h000;
16260    parameter [7:0] DMONITOR_CFG1 = 8'h00;
16261    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
16262    parameter [5:0] ES_CONTROL = 6'b000000;
16263    parameter ES_ERRDET_EN = "FALSE";
16264    parameter ES_EYE_SCAN_EN = "FALSE";
16265    parameter [11:0] ES_HORZ_OFFSET = 12'h800;
16266    parameter [4:0] ES_PRESCALE = 5'b00000;
16267    parameter [15:0] ES_QUALIFIER0 = 16'h0000;
16268    parameter [15:0] ES_QUALIFIER1 = 16'h0000;
16269    parameter [15:0] ES_QUALIFIER2 = 16'h0000;
16270    parameter [15:0] ES_QUALIFIER3 = 16'h0000;
16271    parameter [15:0] ES_QUALIFIER4 = 16'h0000;
16272    parameter [15:0] ES_QUALIFIER5 = 16'h0000;
16273    parameter [15:0] ES_QUALIFIER6 = 16'h0000;
16274    parameter [15:0] ES_QUALIFIER7 = 16'h0000;
16275    parameter [15:0] ES_QUALIFIER8 = 16'h0000;
16276    parameter [15:0] ES_QUALIFIER9 = 16'h0000;
16277    parameter [15:0] ES_QUAL_MASK0 = 16'h0000;
16278    parameter [15:0] ES_QUAL_MASK1 = 16'h0000;
16279    parameter [15:0] ES_QUAL_MASK2 = 16'h0000;
16280    parameter [15:0] ES_QUAL_MASK3 = 16'h0000;
16281    parameter [15:0] ES_QUAL_MASK4 = 16'h0000;
16282    parameter [15:0] ES_QUAL_MASK5 = 16'h0000;
16283    parameter [15:0] ES_QUAL_MASK6 = 16'h0000;
16284    parameter [15:0] ES_QUAL_MASK7 = 16'h0000;
16285    parameter [15:0] ES_QUAL_MASK8 = 16'h0000;
16286    parameter [15:0] ES_QUAL_MASK9 = 16'h0000;
16287    parameter [15:0] ES_SDATA_MASK0 = 16'h0000;
16288    parameter [15:0] ES_SDATA_MASK1 = 16'h0000;
16289    parameter [15:0] ES_SDATA_MASK2 = 16'h0000;
16290    parameter [15:0] ES_SDATA_MASK3 = 16'h0000;
16291    parameter [15:0] ES_SDATA_MASK4 = 16'h0000;
16292    parameter [15:0] ES_SDATA_MASK5 = 16'h0000;
16293    parameter [15:0] ES_SDATA_MASK6 = 16'h0000;
16294    parameter [15:0] ES_SDATA_MASK7 = 16'h0000;
16295    parameter [15:0] ES_SDATA_MASK8 = 16'h0000;
16296    parameter [15:0] ES_SDATA_MASK9 = 16'h0000;
16297    parameter [0:0] EYE_SCAN_SWAP_EN = 1'b0;
16298    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
16299    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
16300    parameter FTS_LANE_DESKEW_EN = "FALSE";
16301    parameter [4:0] GEARBOX_MODE = 5'b00000;
16302    parameter [0:0] ISCAN_CK_PH_SEL2 = 1'b0;
16303    parameter [0:0] LOCAL_MASTER = 1'b0;
16304    parameter [2:0] LPBK_BIAS_CTRL = 3'b000;
16305    parameter [0:0] LPBK_EN_RCAL_B = 1'b0;
16306    parameter [3:0] LPBK_EXT_RCAL = 4'b0000;
16307    parameter [2:0] LPBK_IND_CTRL0 = 3'b000;
16308    parameter [2:0] LPBK_IND_CTRL1 = 3'b000;
16309    parameter [2:0] LPBK_IND_CTRL2 = 3'b000;
16310    parameter [3:0] LPBK_RG_CTRL = 4'b0000;
16311    parameter [1:0] OOBDIVCTL = 2'b00;
16312    parameter [0:0] OOB_PWRUP = 1'b0;
16313    parameter PCI3_AUTO_REALIGN = "FRST_SMPL";
16314    parameter [0:0] PCI3_PIPE_RX_ELECIDLE = 1'b1;
16315    parameter [1:0] PCI3_RX_ASYNC_EBUF_BYPASS = 2'b00;
16316    parameter [0:0] PCI3_RX_ELECIDLE_EI2_ENABLE = 1'b0;
16317    parameter [5:0] PCI3_RX_ELECIDLE_H2L_COUNT = 6'b000000;
16318    parameter [2:0] PCI3_RX_ELECIDLE_H2L_DISABLE = 3'b000;
16319    parameter [5:0] PCI3_RX_ELECIDLE_HI_COUNT = 6'b000000;
16320    parameter [0:0] PCI3_RX_ELECIDLE_LP4_DISABLE = 1'b0;
16321    parameter [0:0] PCI3_RX_FIFO_DISABLE = 1'b0;
16322    parameter [4:0] PCIE3_CLK_COR_EMPTY_THRSH = 5'b00000;
16323    parameter [5:0] PCIE3_CLK_COR_FULL_THRSH = 6'b010000;
16324    parameter [4:0] PCIE3_CLK_COR_MAX_LAT = 5'b01000;
16325    parameter [4:0] PCIE3_CLK_COR_MIN_LAT = 5'b00100;
16326    parameter [5:0] PCIE3_CLK_COR_THRSH_TIMER = 6'b001000;
16327    parameter [15:0] PCIE_BUFG_DIV_CTRL = 16'h0000;
16328    parameter [1:0] PCIE_PLL_SEL_MODE_GEN12 = 2'h0;
16329    parameter [1:0] PCIE_PLL_SEL_MODE_GEN3 = 2'h0;
16330    parameter [1:0] PCIE_PLL_SEL_MODE_GEN4 = 2'h0;
16331    parameter [15:0] PCIE_RXPCS_CFG_GEN3 = 16'h0000;
16332    parameter [15:0] PCIE_RXPMA_CFG = 16'h0000;
16333    parameter [15:0] PCIE_TXPCS_CFG_GEN3 = 16'h0000;
16334    parameter [15:0] PCIE_TXPMA_CFG = 16'h0000;
16335    parameter PCS_PCIE_EN = "FALSE";
16336    parameter [15:0] PCS_RSVD0 = 16'b0000000000000000;
16337    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
16338    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
16339    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
16340    parameter integer PREIQ_FREQ_BST = 0;
16341    parameter [2:0] PROCESS_PAR = 3'b010;
16342    parameter [0:0] RATE_SW_USE_DRP = 1'b0;
16343    parameter [0:0] RCLK_SIPO_DLY_ENB = 1'b0;
16344    parameter [0:0] RCLK_SIPO_INV_EN = 1'b0;
16345    parameter [0:0] RESET_POWERSAVE_DISABLE = 1'b0;
16346    parameter [2:0] RTX_BUF_CML_CTRL = 3'b010;
16347    parameter [1:0] RTX_BUF_TERM_CTRL = 2'b00;
16348    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
16349    parameter RXBUF_ADDR_MODE = "FULL";
16350    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
16351    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
16352    parameter RXBUF_EN = "TRUE";
16353    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
16354    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
16355    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
16356    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
16357    parameter integer RXBUF_THRESH_OVFLW = 0;
16358    parameter RXBUF_THRESH_OVRD = "FALSE";
16359    parameter integer RXBUF_THRESH_UNDFLW = 4;
16360    parameter [4:0] RXCDRFREQRESET_TIME = 5'b00001;
16361    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
16362    parameter [15:0] RXCDR_CFG0 = 16'h0003;
16363    parameter [15:0] RXCDR_CFG0_GEN3 = 16'h0003;
16364    parameter [15:0] RXCDR_CFG1 = 16'h0000;
16365    parameter [15:0] RXCDR_CFG1_GEN3 = 16'h0000;
16366    parameter [15:0] RXCDR_CFG2 = 16'h0164;
16367    parameter [9:0] RXCDR_CFG2_GEN2 = 10'h164;
16368    parameter [15:0] RXCDR_CFG2_GEN3 = 16'h0034;
16369    parameter [15:0] RXCDR_CFG2_GEN4 = 16'h0034;
16370    parameter [15:0] RXCDR_CFG3 = 16'h0024;
16371    parameter [5:0] RXCDR_CFG3_GEN2 = 6'h24;
16372    parameter [15:0] RXCDR_CFG3_GEN3 = 16'h0024;
16373    parameter [15:0] RXCDR_CFG3_GEN4 = 16'h0024;
16374    parameter [15:0] RXCDR_CFG4 = 16'h5CF6;
16375    parameter [15:0] RXCDR_CFG4_GEN3 = 16'h5CF6;
16376    parameter [15:0] RXCDR_CFG5 = 16'hB46B;
16377    parameter [15:0] RXCDR_CFG5_GEN3 = 16'h146B;
16378    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
16379    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
16380    parameter [15:0] RXCDR_LOCK_CFG0 = 16'h0040;
16381    parameter [15:0] RXCDR_LOCK_CFG1 = 16'h8000;
16382    parameter [15:0] RXCDR_LOCK_CFG2 = 16'h0000;
16383    parameter [15:0] RXCDR_LOCK_CFG3 = 16'h0000;
16384    parameter [15:0] RXCDR_LOCK_CFG4 = 16'h0000;
16385    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
16386    parameter [15:0] RXCFOK_CFG0 = 16'h0000;
16387    parameter [15:0] RXCFOK_CFG1 = 16'h0002;
16388    parameter [15:0] RXCFOK_CFG2 = 16'h002D;
16389    parameter [15:0] RXCKCAL1_IQ_LOOP_RST_CFG = 16'h0000;
16390    parameter [15:0] RXCKCAL1_I_LOOP_RST_CFG = 16'h0000;
16391    parameter [15:0] RXCKCAL1_Q_LOOP_RST_CFG = 16'h0000;
16392    parameter [15:0] RXCKCAL2_DX_LOOP_RST_CFG = 16'h0000;
16393    parameter [15:0] RXCKCAL2_D_LOOP_RST_CFG = 16'h0000;
16394    parameter [15:0] RXCKCAL2_S_LOOP_RST_CFG = 16'h0000;
16395    parameter [15:0] RXCKCAL2_X_LOOP_RST_CFG = 16'h0000;
16396    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
16397    parameter [15:0] RXDFELPM_KL_CFG0 = 16'h0000;
16398    parameter [15:0] RXDFELPM_KL_CFG1 = 16'h0022;
16399    parameter [15:0] RXDFELPM_KL_CFG2 = 16'h0100;
16400    parameter [15:0] RXDFE_CFG0 = 16'h4000;
16401    parameter [15:0] RXDFE_CFG1 = 16'h0000;
16402    parameter [15:0] RXDFE_GC_CFG0 = 16'h0000;
16403    parameter [15:0] RXDFE_GC_CFG1 = 16'h0000;
16404    parameter [15:0] RXDFE_GC_CFG2 = 16'h0000;
16405    parameter [15:0] RXDFE_H2_CFG0 = 16'h0000;
16406    parameter [15:0] RXDFE_H2_CFG1 = 16'h0002;
16407    parameter [15:0] RXDFE_H3_CFG0 = 16'h0000;
16408    parameter [15:0] RXDFE_H3_CFG1 = 16'h0002;
16409    parameter [15:0] RXDFE_H4_CFG0 = 16'h0000;
16410    parameter [15:0] RXDFE_H4_CFG1 = 16'h0003;
16411    parameter [15:0] RXDFE_H5_CFG0 = 16'h0000;
16412    parameter [15:0] RXDFE_H5_CFG1 = 16'h0002;
16413    parameter [15:0] RXDFE_H6_CFG0 = 16'h0000;
16414    parameter [15:0] RXDFE_H6_CFG1 = 16'h0002;
16415    parameter [15:0] RXDFE_H7_CFG0 = 16'h0000;
16416    parameter [15:0] RXDFE_H7_CFG1 = 16'h0002;
16417    parameter [15:0] RXDFE_H8_CFG0 = 16'h0000;
16418    parameter [15:0] RXDFE_H8_CFG1 = 16'h0002;
16419    parameter [15:0] RXDFE_H9_CFG0 = 16'h0000;
16420    parameter [15:0] RXDFE_H9_CFG1 = 16'h0002;
16421    parameter [15:0] RXDFE_HA_CFG0 = 16'h0000;
16422    parameter [15:0] RXDFE_HA_CFG1 = 16'h0002;
16423    parameter [15:0] RXDFE_HB_CFG0 = 16'h0000;
16424    parameter [15:0] RXDFE_HB_CFG1 = 16'h0002;
16425    parameter [15:0] RXDFE_HC_CFG0 = 16'h0000;
16426    parameter [15:0] RXDFE_HC_CFG1 = 16'h0002;
16427    parameter [15:0] RXDFE_HD_CFG0 = 16'h0000;
16428    parameter [15:0] RXDFE_HD_CFG1 = 16'h0002;
16429    parameter [15:0] RXDFE_HE_CFG0 = 16'h0000;
16430    parameter [15:0] RXDFE_HE_CFG1 = 16'h0002;
16431    parameter [15:0] RXDFE_HF_CFG0 = 16'h0000;
16432    parameter [15:0] RXDFE_HF_CFG1 = 16'h0002;
16433    parameter [15:0] RXDFE_KH_CFG0 = 16'h0000;
16434    parameter [15:0] RXDFE_KH_CFG1 = 16'h0000;
16435    parameter [15:0] RXDFE_KH_CFG2 = 16'h0000;
16436    parameter [15:0] RXDFE_KH_CFG3 = 16'h0000;
16437    parameter [15:0] RXDFE_OS_CFG0 = 16'h0000;
16438    parameter [15:0] RXDFE_OS_CFG1 = 16'h0002;
16439    parameter [0:0] RXDFE_PWR_SAVING = 1'b0;
16440    parameter [15:0] RXDFE_UT_CFG0 = 16'h0000;
16441    parameter [15:0] RXDFE_UT_CFG1 = 16'h0002;
16442    parameter [15:0] RXDFE_UT_CFG2 = 16'h0000;
16443    parameter [15:0] RXDFE_VP_CFG0 = 16'h0000;
16444    parameter [15:0] RXDFE_VP_CFG1 = 16'h0022;
16445    parameter [15:0] RXDLY_CFG = 16'h0010;
16446    parameter [15:0] RXDLY_LCFG = 16'h0030;
16447    parameter RXELECIDLE_CFG = "SIGCFG_4";
16448    parameter integer RXGBOX_FIFO_INIT_RD_ADDR = 4;
16449    parameter RXGEARBOX_EN = "FALSE";
16450    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
16451    parameter [15:0] RXLPM_CFG = 16'h0000;
16452    parameter [15:0] RXLPM_GC_CFG = 16'h1000;
16453    parameter [15:0] RXLPM_KH_CFG0 = 16'h0000;
16454    parameter [15:0] RXLPM_KH_CFG1 = 16'h0002;
16455    parameter [15:0] RXLPM_OS_CFG0 = 16'h0000;
16456    parameter [15:0] RXLPM_OS_CFG1 = 16'h0000;
16457    parameter [8:0] RXOOB_CFG = 9'b000110000;
16458    parameter RXOOB_CLK_CFG = "PMA";
16459    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
16460    parameter integer RXOUT_DIV = 4;
16461    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
16462    parameter [15:0] RXPHBEACON_CFG = 16'h0000;
16463    parameter [15:0] RXPHDLY_CFG = 16'h2020;
16464    parameter [15:0] RXPHSAMP_CFG = 16'h2100;
16465    parameter [15:0] RXPHSLIP_CFG = 16'h9933;
16466    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
16467    parameter [0:0] RXPI_AUTO_BW_SEL_BYPASS = 1'b0;
16468    parameter [15:0] RXPI_CFG0 = 16'h0002;
16469    parameter [15:0] RXPI_CFG1 = 16'b0000000000000000;
16470    parameter [0:0] RXPI_LPM = 1'b0;
16471    parameter [1:0] RXPI_SEL_LC = 2'b00;
16472    parameter [1:0] RXPI_STARTCODE = 2'b00;
16473    parameter [0:0] RXPI_VREFSEL = 1'b0;
16474    parameter RXPMACLK_SEL = "DATA";
16475    parameter [4:0] RXPMARESET_TIME = 5'b00001;
16476    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
16477    parameter integer RXPRBS_LINKACQ_CNT = 15;
16478    parameter [0:0] RXREFCLKDIV2_SEL = 1'b0;
16479    parameter integer RXSLIDE_AUTO_WAIT = 7;
16480    parameter RXSLIDE_MODE = "OFF";
16481    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
16482    parameter [0:0] RXSYNC_OVRD = 1'b0;
16483    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
16484    parameter [0:0] RX_AFE_CM_EN = 1'b0;
16485    parameter [15:0] RX_BIAS_CFG0 = 16'h12B0;
16486    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
16487    parameter [0:0] RX_CAPFF_SARC_ENB = 1'b0;
16488    parameter integer RX_CLK25_DIV = 8;
16489    parameter [0:0] RX_CLKMUX_EN = 1'b1;
16490    parameter [4:0] RX_CLK_SLIP_OVRD = 5'b00000;
16491    parameter [3:0] RX_CM_BUF_CFG = 4'b1010;
16492    parameter [0:0] RX_CM_BUF_PD = 1'b0;
16493    parameter integer RX_CM_SEL = 3;
16494    parameter integer RX_CM_TRIM = 12;
16495    parameter [7:0] RX_CTLE3_LPF = 8'b00000000;
16496    parameter integer RX_DATA_WIDTH = 20;
16497    parameter [5:0] RX_DDI_SEL = 6'b000000;
16498    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
16499    parameter [2:0] RX_DEGEN_CTRL = 3'b011;
16500    parameter integer RX_DFELPM_CFG0 = 0;
16501    parameter [0:0] RX_DFELPM_CFG1 = 1'b1;
16502    parameter [0:0] RX_DFELPM_KLKH_AGC_STUP_EN = 1'b1;
16503    parameter [1:0] RX_DFE_AGC_CFG0 = 2'b00;
16504    parameter integer RX_DFE_AGC_CFG1 = 4;
16505    parameter integer RX_DFE_KL_LPM_KH_CFG0 = 1;
16506    parameter integer RX_DFE_KL_LPM_KH_CFG1 = 4;
16507    parameter [1:0] RX_DFE_KL_LPM_KL_CFG0 = 2'b01;
16508    parameter integer RX_DFE_KL_LPM_KL_CFG1 = 4;
16509    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
16510    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
16511    parameter [0:0] RX_DIV2_MODE_B = 1'b0;
16512    parameter [4:0] RX_DIVRESET_TIME = 5'b00001;
16513    parameter [0:0] RX_EN_CTLE_RCAL_B = 1'b0;
16514    parameter [0:0] RX_EN_HI_LR = 1'b1;
16515    parameter [8:0] RX_EXT_RL_CTRL = 9'b000000000;
16516    parameter [6:0] RX_EYESCAN_VS_CODE = 7'b0000000;
16517    parameter [0:0] RX_EYESCAN_VS_NEG_DIR = 1'b0;
16518    parameter [1:0] RX_EYESCAN_VS_RANGE = 2'b00;
16519    parameter [0:0] RX_EYESCAN_VS_UT_SIGN = 1'b0;
16520    parameter [0:0] RX_FABINT_USRCLK_FLOP = 1'b0;
16521    parameter integer RX_INT_DATAWIDTH = 1;
16522    parameter [0:0] RX_PMA_POWER_SAVE = 1'b0;
16523    parameter [15:0] RX_PMA_RSV0 = 16'h0000;
16524    parameter real RX_PROGDIV_CFG = 0.0;
16525    parameter [15:0] RX_PROGDIV_RATE = 16'h0001;
16526    parameter [3:0] RX_RESLOAD_CTRL = 4'b0000;
16527    parameter [0:0] RX_RESLOAD_OVRD = 1'b0;
16528    parameter [2:0] RX_SAMPLE_PERIOD = 3'b101;
16529    parameter integer RX_SIG_VALID_DLY = 11;
16530    parameter [0:0] RX_SUM_DFETAPREP_EN = 1'b0;
16531    parameter [3:0] RX_SUM_IREF_TUNE = 4'b1001;
16532    parameter [3:0] RX_SUM_RESLOAD_CTRL = 4'b0000;
16533    parameter [3:0] RX_SUM_VCMTUNE = 4'b1010;
16534    parameter [0:0] RX_SUM_VCM_OVWR = 1'b0;
16535    parameter [2:0] RX_SUM_VREF_TUNE = 3'b100;
16536    parameter [1:0] RX_TUNE_AFE_OS = 2'b00;
16537    parameter [2:0] RX_VREG_CTRL = 3'b101;
16538    parameter [0:0] RX_VREG_PDB = 1'b1;
16539    parameter [1:0] RX_WIDEMODE_CDR = 2'b01;
16540    parameter [1:0] RX_WIDEMODE_CDR_GEN3 = 2'b01;
16541    parameter [1:0] RX_WIDEMODE_CDR_GEN4 = 2'b01;
16542    parameter RX_XCLK_SEL = "RXDES";
16543    parameter [0:0] RX_XMODE_SEL = 1'b0;
16544    parameter [0:0] SAMPLE_CLK_PHASE = 1'b0;
16545    parameter [0:0] SAS_12G_MODE = 1'b0;
16546    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
16547    parameter [2:0] SATA_BURST_VAL = 3'b100;
16548    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
16549    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
16550    parameter SHOW_REALIGN_COMMA = "TRUE";
16551    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
16552    parameter SIM_MODE = "FAST";
16553    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
16554    parameter SIM_RESET_SPEEDUP = "TRUE";
16555    parameter SIM_TX_EIDLE_DRIVE_LEVEL = "Z";
16556    parameter [0:0] SRSTMODE = 1'b0;
16557    parameter [1:0] TAPDLY_SET_TX = 2'h0;
16558    parameter [3:0] TEMPERATURE_PAR = 4'b0010;
16559    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
16560    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
16561    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
16562    parameter [7:0] TST_RSV0 = 8'h00;
16563    parameter [7:0] TST_RSV1 = 8'h00;
16564    parameter TXBUF_EN = "TRUE";
16565    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
16566    parameter [15:0] TXDLY_CFG = 16'h0010;
16567    parameter [15:0] TXDLY_LCFG = 16'h0030;
16568    parameter [3:0] TXDRVBIAS_N = 4'b1010;
16569    parameter TXFIFO_ADDR_CFG = "LOW";
16570    parameter integer TXGBOX_FIFO_INIT_RD_ADDR = 4;
16571    parameter TXGEARBOX_EN = "FALSE";
16572    parameter integer TXOUT_DIV = 4;
16573    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
16574    parameter [15:0] TXPHDLY_CFG0 = 16'h6020;
16575    parameter [15:0] TXPHDLY_CFG1 = 16'h0002;
16576    parameter [15:0] TXPH_CFG = 16'h0123;
16577    parameter [15:0] TXPH_CFG2 = 16'h0000;
16578    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
16579    parameter [15:0] TXPI_CFG = 16'h0000;
16580    parameter [1:0] TXPI_CFG0 = 2'b00;
16581    parameter [1:0] TXPI_CFG1 = 2'b00;
16582    parameter [1:0] TXPI_CFG2 = 2'b00;
16583    parameter [0:0] TXPI_CFG3 = 1'b0;
16584    parameter [0:0] TXPI_CFG4 = 1'b1;
16585    parameter [2:0] TXPI_CFG5 = 3'b000;
16586    parameter [0:0] TXPI_GRAY_SEL = 1'b0;
16587    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
16588    parameter [0:0] TXPI_LPM = 1'b0;
16589    parameter [0:0] TXPI_PPM = 1'b0;
16590    parameter TXPI_PPMCLK_SEL = "TXUSRCLK2";
16591    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
16592    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
16593    parameter [0:0] TXPI_VREFSEL = 1'b0;
16594    parameter [4:0] TXPMARESET_TIME = 5'b00001;
16595    parameter [0:0] TXREFCLKDIV2_SEL = 1'b0;
16596    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
16597    parameter [0:0] TXSYNC_OVRD = 1'b0;
16598    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
16599    parameter integer TX_CLK25_DIV = 8;
16600    parameter [0:0] TX_CLKMUX_EN = 1'b1;
16601    parameter integer TX_DATA_WIDTH = 20;
16602    parameter [15:0] TX_DCC_LOOP_RST_CFG = 16'h0000;
16603    parameter [5:0] TX_DEEMPH0 = 6'b000000;
16604    parameter [5:0] TX_DEEMPH1 = 6'b000000;
16605    parameter [5:0] TX_DEEMPH2 = 6'b000000;
16606    parameter [5:0] TX_DEEMPH3 = 6'b000000;
16607    parameter [4:0] TX_DIVRESET_TIME = 5'b00001;
16608    parameter TX_DRIVE_MODE = "DIRECT";
16609    parameter integer TX_DRVMUX_CTRL = 2;
16610    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
16611    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
16612    parameter [0:0] TX_FABINT_USRCLK_FLOP = 1'b0;
16613    parameter [0:0] TX_FIFO_BYP_EN = 1'b0;
16614    parameter [0:0] TX_IDLE_DATA_ZERO = 1'b0;
16615    parameter integer TX_INT_DATAWIDTH = 1;
16616    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
16617    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
16618    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
16619    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
16620    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
16621    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
16622    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
16623    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
16624    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
16625    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
16626    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
16627    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
16628    parameter [15:0] TX_PHICAL_CFG0 = 16'h0000;
16629    parameter [15:0] TX_PHICAL_CFG1 = 16'h003F;
16630    parameter [15:0] TX_PHICAL_CFG2 = 16'h0000;
16631    parameter integer TX_PI_BIASSET = 0;
16632    parameter [1:0] TX_PI_IBIAS_MID = 2'b00;
16633    parameter [0:0] TX_PMADATA_OPT = 1'b0;
16634    parameter [0:0] TX_PMA_POWER_SAVE = 1'b0;
16635    parameter [15:0] TX_PMA_RSV0 = 16'h0008;
16636    parameter integer TX_PREDRV_CTRL = 2;
16637    parameter TX_PROGCLK_SEL = "POSTPI";
16638    parameter real TX_PROGDIV_CFG = 0.0;
16639    parameter [15:0] TX_PROGDIV_RATE = 16'h0001;
16640    parameter [0:0] TX_QPI_STATUS_EN = 1'b0;
16641    parameter [13:0] TX_RXDETECT_CFG = 14'h0032;
16642    parameter integer TX_RXDETECT_REF = 3;
16643    parameter [2:0] TX_SAMPLE_PERIOD = 3'b101;
16644    parameter [0:0] TX_SARC_LPBK_ENB = 1'b0;
16645    parameter [1:0] TX_SW_MEAS = 2'b00;
16646    parameter [2:0] TX_VREG_CTRL = 3'b000;
16647    parameter [0:0] TX_VREG_PDB = 1'b0;
16648    parameter [1:0] TX_VREG_VREFSEL = 2'b00;
16649    parameter TX_XCLK_SEL = "TXOUT";
16650    parameter [0:0] USB_BOTH_BURST_IDLE = 1'b0;
16651    parameter [6:0] USB_BURSTMAX_U3WAKE = 7'b1111111;
16652    parameter [6:0] USB_BURSTMIN_U3WAKE = 7'b1100011;
16653    parameter [0:0] USB_CLK_COR_EQ_EN = 1'b0;
16654    parameter [0:0] USB_EXT_CNTL = 1'b1;
16655    parameter [9:0] USB_IDLEMAX_POLLING = 10'b1010111011;
16656    parameter [9:0] USB_IDLEMIN_POLLING = 10'b0100101011;
16657    parameter [8:0] USB_LFPSPING_BURST = 9'b000000101;
16658    parameter [8:0] USB_LFPSPOLLING_BURST = 9'b000110001;
16659    parameter [8:0] USB_LFPSPOLLING_IDLE_MS = 9'b000000100;
16660    parameter [8:0] USB_LFPSU1EXIT_BURST = 9'b000011101;
16661    parameter [8:0] USB_LFPSU2LPEXIT_BURST_MS = 9'b001100011;
16662    parameter [8:0] USB_LFPSU3WAKE_BURST_MS = 9'b111110011;
16663    parameter [3:0] USB_LFPS_TPERIOD = 4'b0011;
16664    parameter [0:0] USB_LFPS_TPERIOD_ACCURATE = 1'b1;
16665    parameter [0:0] USB_MODE = 1'b0;
16666    parameter [0:0] USB_PCIE_ERR_REP_DIS = 1'b0;
16667    parameter integer USB_PING_SATA_MAX_INIT = 21;
16668    parameter integer USB_PING_SATA_MIN_INIT = 12;
16669    parameter integer USB_POLL_SATA_MAX_BURST = 8;
16670    parameter integer USB_POLL_SATA_MIN_BURST = 4;
16671    parameter [0:0] USB_RAW_ELEC = 1'b0;
16672    parameter [0:0] USB_RXIDLE_P0_CTRL = 1'b1;
16673    parameter [0:0] USB_TXIDLE_TUNE_ENABLE = 1'b1;
16674    parameter integer USB_U1_SATA_MAX_WAKE = 7;
16675    parameter integer USB_U1_SATA_MIN_WAKE = 4;
16676    parameter integer USB_U2_SAS_MAX_COM = 64;
16677    parameter integer USB_U2_SAS_MIN_COM = 36;
16678    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
16679    parameter [0:0] Y_ALL_MODE = 1'b0;
16680    output BUFGTCE;
16681    output [2:0] BUFGTCEMASK;
16682    output [8:0] BUFGTDIV;
16683    output BUFGTRESET;
16684    output [2:0] BUFGTRSTMASK;
16685    output CPLLFBCLKLOST;
16686    output CPLLLOCK;
16687    output CPLLREFCLKLOST;
16688    output [15:0] DMONITOROUT;
16689    output DMONITOROUTCLK;
16690    output [15:0] DRPDO;
16691    output DRPRDY;
16692    output EYESCANDATAERROR;
16693    output GTHTXN;
16694    output GTHTXP;
16695    output GTPOWERGOOD;
16696    output GTREFCLKMONITOR;
16697    output PCIERATEGEN3;
16698    output PCIERATEIDLE;
16699    output [1:0] PCIERATEQPLLPD;
16700    output [1:0] PCIERATEQPLLRESET;
16701    output PCIESYNCTXSYNCDONE;
16702    output PCIEUSERGEN3RDY;
16703    output PCIEUSERPHYSTATUSRST;
16704    output PCIEUSERRATESTART;
16705    output [15:0] PCSRSVDOUT;
16706    output PHYSTATUS;
16707    output [15:0] PINRSRVDAS;
16708    output POWERPRESENT;
16709    output RESETEXCEPTION;
16710    output [2:0] RXBUFSTATUS;
16711    output RXBYTEISALIGNED;
16712    output RXBYTEREALIGN;
16713    output RXCDRLOCK;
16714    output RXCDRPHDONE;
16715    output RXCHANBONDSEQ;
16716    output RXCHANISALIGNED;
16717    output RXCHANREALIGN;
16718    output [4:0] RXCHBONDO;
16719    output RXCKCALDONE;
16720    output [1:0] RXCLKCORCNT;
16721    output RXCOMINITDET;
16722    output RXCOMMADET;
16723    output RXCOMSASDET;
16724    output RXCOMWAKEDET;
16725    output [15:0] RXCTRL0;
16726    output [15:0] RXCTRL1;
16727    output [7:0] RXCTRL2;
16728    output [7:0] RXCTRL3;
16729    output [127:0] RXDATA;
16730    output [7:0] RXDATAEXTENDRSVD;
16731    output [1:0] RXDATAVALID;
16732    output RXDLYSRESETDONE;
16733    output RXELECIDLE;
16734    output [5:0] RXHEADER;
16735    output [1:0] RXHEADERVALID;
16736    output RXLFPSTRESETDET;
16737    output RXLFPSU2LPEXITDET;
16738    output RXLFPSU3WAKEDET;
16739    output [7:0] RXMONITOROUT;
16740    output RXOSINTDONE;
16741    output RXOSINTSTARTED;
16742    output RXOSINTSTROBEDONE;
16743    output RXOSINTSTROBESTARTED;
16744    output RXOUTCLK;
16745    output RXOUTCLKFABRIC;
16746    output RXOUTCLKPCS;
16747    output RXPHALIGNDONE;
16748    output RXPHALIGNERR;
16749    output RXPMARESETDONE;
16750    output RXPRBSERR;
16751    output RXPRBSLOCKED;
16752    output RXPRGDIVRESETDONE;
16753    output RXQPISENN;
16754    output RXQPISENP;
16755    output RXRATEDONE;
16756    output RXRECCLKOUT;
16757    output RXRESETDONE;
16758    output RXSLIDERDY;
16759    output RXSLIPDONE;
16760    output RXSLIPOUTCLKRDY;
16761    output RXSLIPPMARDY;
16762    output [1:0] RXSTARTOFSEQ;
16763    output [2:0] RXSTATUS;
16764    output RXSYNCDONE;
16765    output RXSYNCOUT;
16766    output RXVALID;
16767    output [1:0] TXBUFSTATUS;
16768    output TXCOMFINISH;
16769    output TXDCCDONE;
16770    output TXDLYSRESETDONE;
16771    output TXOUTCLK;
16772    output TXOUTCLKFABRIC;
16773    output TXOUTCLKPCS;
16774    output TXPHALIGNDONE;
16775    output TXPHINITDONE;
16776    output TXPMARESETDONE;
16777    output TXPRGDIVRESETDONE;
16778    output TXQPISENN;
16779    output TXQPISENP;
16780    output TXRATEDONE;
16781    output TXRESETDONE;
16782    output TXSYNCDONE;
16783    output TXSYNCOUT;
16784    input CDRSTEPDIR;
16785    input CDRSTEPSQ;
16786    input CDRSTEPSX;
16787    input CFGRESET;
16788    input CLKRSVD0;
16789    input CLKRSVD1;
16790    input CPLLFREQLOCK;
16791    input CPLLLOCKDETCLK;
16792    input CPLLLOCKEN;
16793    input CPLLPD;
16794    input [2:0] CPLLREFCLKSEL;
16795    input CPLLRESET;
16796    input DMONFIFORESET;
16797    input DMONITORCLK;
16798    input [9:0] DRPADDR;
16799    input DRPCLK;
16800    input [15:0] DRPDI;
16801    input DRPEN;
16802    input DRPRST;
16803    input DRPWE;
16804    input EYESCANRESET;
16805    input EYESCANTRIGGER;
16806    input FREQOS;
16807    input GTGREFCLK;
16808    input GTHRXN;
16809    input GTHRXP;
16810    input GTNORTHREFCLK0;
16811    input GTNORTHREFCLK1;
16812    input GTREFCLK0;
16813    input GTREFCLK1;
16814    input [15:0] GTRSVD;
16815    input GTRXRESET;
16816    input GTRXRESETSEL;
16817    input GTSOUTHREFCLK0;
16818    input GTSOUTHREFCLK1;
16819    input GTTXRESET;
16820    input GTTXRESETSEL;
16821    input INCPCTRL;
16822    input [2:0] LOOPBACK;
16823    input PCIEEQRXEQADAPTDONE;
16824    input PCIERSTIDLE;
16825    input PCIERSTTXSYNCSTART;
16826    input PCIEUSERRATEDONE;
16827    input [15:0] PCSRSVDIN;
16828    input QPLL0CLK;
16829    input QPLL0FREQLOCK;
16830    input QPLL0REFCLK;
16831    input QPLL1CLK;
16832    input QPLL1FREQLOCK;
16833    input QPLL1REFCLK;
16834    input RESETOVRD;
16835    input RX8B10BEN;
16836    input RXAFECFOKEN;
16837    input RXBUFRESET;
16838    input RXCDRFREQRESET;
16839    input RXCDRHOLD;
16840    input RXCDROVRDEN;
16841    input RXCDRRESET;
16842    input RXCHBONDEN;
16843    input [4:0] RXCHBONDI;
16844    input [2:0] RXCHBONDLEVEL;
16845    input RXCHBONDMASTER;
16846    input RXCHBONDSLAVE;
16847    input RXCKCALRESET;
16848    input [6:0] RXCKCALSTART;
16849    input RXCOMMADETEN;
16850    input [1:0] RXDFEAGCCTRL;
16851    input RXDFEAGCHOLD;
16852    input RXDFEAGCOVRDEN;
16853    input [3:0] RXDFECFOKFCNUM;
16854    input RXDFECFOKFEN;
16855    input RXDFECFOKFPULSE;
16856    input RXDFECFOKHOLD;
16857    input RXDFECFOKOVREN;
16858    input RXDFEKHHOLD;
16859    input RXDFEKHOVRDEN;
16860    input RXDFELFHOLD;
16861    input RXDFELFOVRDEN;
16862    input RXDFELPMRESET;
16863    input RXDFETAP10HOLD;
16864    input RXDFETAP10OVRDEN;
16865    input RXDFETAP11HOLD;
16866    input RXDFETAP11OVRDEN;
16867    input RXDFETAP12HOLD;
16868    input RXDFETAP12OVRDEN;
16869    input RXDFETAP13HOLD;
16870    input RXDFETAP13OVRDEN;
16871    input RXDFETAP14HOLD;
16872    input RXDFETAP14OVRDEN;
16873    input RXDFETAP15HOLD;
16874    input RXDFETAP15OVRDEN;
16875    input RXDFETAP2HOLD;
16876    input RXDFETAP2OVRDEN;
16877    input RXDFETAP3HOLD;
16878    input RXDFETAP3OVRDEN;
16879    input RXDFETAP4HOLD;
16880    input RXDFETAP4OVRDEN;
16881    input RXDFETAP5HOLD;
16882    input RXDFETAP5OVRDEN;
16883    input RXDFETAP6HOLD;
16884    input RXDFETAP6OVRDEN;
16885    input RXDFETAP7HOLD;
16886    input RXDFETAP7OVRDEN;
16887    input RXDFETAP8HOLD;
16888    input RXDFETAP8OVRDEN;
16889    input RXDFETAP9HOLD;
16890    input RXDFETAP9OVRDEN;
16891    input RXDFEUTHOLD;
16892    input RXDFEUTOVRDEN;
16893    input RXDFEVPHOLD;
16894    input RXDFEVPOVRDEN;
16895    input RXDFEXYDEN;
16896    input RXDLYBYPASS;
16897    input RXDLYEN;
16898    input RXDLYOVRDEN;
16899    input RXDLYSRESET;
16900    input [1:0] RXELECIDLEMODE;
16901    input RXEQTRAINING;
16902    input RXGEARBOXSLIP;
16903    input RXLATCLK;
16904    input RXLPMEN;
16905    input RXLPMGCHOLD;
16906    input RXLPMGCOVRDEN;
16907    input RXLPMHFHOLD;
16908    input RXLPMHFOVRDEN;
16909    input RXLPMLFHOLD;
16910    input RXLPMLFKLOVRDEN;
16911    input RXLPMOSHOLD;
16912    input RXLPMOSOVRDEN;
16913    input RXMCOMMAALIGNEN;
16914    input [1:0] RXMONITORSEL;
16915    input RXOOBRESET;
16916    input RXOSCALRESET;
16917    input RXOSHOLD;
16918    input RXOSOVRDEN;
16919    input [2:0] RXOUTCLKSEL;
16920    input RXPCOMMAALIGNEN;
16921    input RXPCSRESET;
16922    input [1:0] RXPD;
16923    input RXPHALIGN;
16924    input RXPHALIGNEN;
16925    input RXPHDLYPD;
16926    input RXPHDLYRESET;
16927    input RXPHOVRDEN;
16928    input [1:0] RXPLLCLKSEL;
16929    input RXPMARESET;
16930    input RXPOLARITY;
16931    input RXPRBSCNTRESET;
16932    input [3:0] RXPRBSSEL;
16933    input RXPROGDIVRESET;
16934    input RXQPIEN;
16935    input [2:0] RXRATE;
16936    input RXRATEMODE;
16937    input RXSLIDE;
16938    input RXSLIPOUTCLK;
16939    input RXSLIPPMA;
16940    input RXSYNCALLIN;
16941    input RXSYNCIN;
16942    input RXSYNCMODE;
16943    input [1:0] RXSYSCLKSEL;
16944    input RXTERMINATION;
16945    input RXUSERRDY;
16946    input RXUSRCLK;
16947    input RXUSRCLK2;
16948    input SIGVALIDCLK;
16949    input [19:0] TSTIN;
16950    input [7:0] TX8B10BBYPASS;
16951    input TX8B10BEN;
16952    input TXCOMINIT;
16953    input TXCOMSAS;
16954    input TXCOMWAKE;
16955    input [15:0] TXCTRL0;
16956    input [15:0] TXCTRL1;
16957    input [7:0] TXCTRL2;
16958    input [127:0] TXDATA;
16959    input [7:0] TXDATAEXTENDRSVD;
16960    input TXDCCFORCESTART;
16961    input TXDCCRESET;
16962    input [1:0] TXDEEMPH;
16963    input TXDETECTRX;
16964    input [4:0] TXDIFFCTRL;
16965    input TXDLYBYPASS;
16966    input TXDLYEN;
16967    input TXDLYHOLD;
16968    input TXDLYOVRDEN;
16969    input TXDLYSRESET;
16970    input TXDLYUPDOWN;
16971    input TXELECIDLE;
16972    input [5:0] TXHEADER;
16973    input TXINHIBIT;
16974    input TXLATCLK;
16975    input TXLFPSTRESET;
16976    input TXLFPSU2LPEXIT;
16977    input TXLFPSU3WAKE;
16978    input [6:0] TXMAINCURSOR;
16979    input [2:0] TXMARGIN;
16980    input TXMUXDCDEXHOLD;
16981    input TXMUXDCDORWREN;
16982    input TXONESZEROS;
16983    input [2:0] TXOUTCLKSEL;
16984    input TXPCSRESET;
16985    input [1:0] TXPD;
16986    input TXPDELECIDLEMODE;
16987    input TXPHALIGN;
16988    input TXPHALIGNEN;
16989    input TXPHDLYPD;
16990    input TXPHDLYRESET;
16991    input TXPHDLYTSTCLK;
16992    input TXPHINIT;
16993    input TXPHOVRDEN;
16994    input TXPIPPMEN;
16995    input TXPIPPMOVRDEN;
16996    input TXPIPPMPD;
16997    input TXPIPPMSEL;
16998    input [4:0] TXPIPPMSTEPSIZE;
16999    input TXPISOPD;
17000    input [1:0] TXPLLCLKSEL;
17001    input TXPMARESET;
17002    input TXPOLARITY;
17003    input [4:0] TXPOSTCURSOR;
17004    input TXPRBSFORCEERR;
17005    input [3:0] TXPRBSSEL;
17006    input [4:0] TXPRECURSOR;
17007    input TXPROGDIVRESET;
17008    input TXQPIBIASEN;
17009    input TXQPIWEAKPUP;
17010    input [2:0] TXRATE;
17011    input TXRATEMODE;
17012    input [6:0] TXSEQUENCE;
17013    input TXSWING;
17014    input TXSYNCALLIN;
17015    input TXSYNCIN;
17016    input TXSYNCMODE;
17017    input [1:0] TXSYSCLKSEL;
17018    input TXUSERRDY;
17019    input TXUSRCLK;
17020    input TXUSRCLK2;
17021endmodule
17022
17023module GTHE4_COMMON (...);
17024    parameter [0:0] AEN_QPLL0_FBDIV = 1'b1;
17025    parameter [0:0] AEN_QPLL1_FBDIV = 1'b1;
17026    parameter [0:0] AEN_SDM0TOGGLE = 1'b0;
17027    parameter [0:0] AEN_SDM1TOGGLE = 1'b0;
17028    parameter [0:0] A_SDM0TOGGLE = 1'b0;
17029    parameter [8:0] A_SDM1DATA_HIGH = 9'b000000000;
17030    parameter [15:0] A_SDM1DATA_LOW = 16'b0000000000000000;
17031    parameter [0:0] A_SDM1TOGGLE = 1'b0;
17032    parameter [15:0] BIAS_CFG0 = 16'h0000;
17033    parameter [15:0] BIAS_CFG1 = 16'h0000;
17034    parameter [15:0] BIAS_CFG2 = 16'h0000;
17035    parameter [15:0] BIAS_CFG3 = 16'h0000;
17036    parameter [15:0] BIAS_CFG4 = 16'h0000;
17037    parameter [15:0] BIAS_CFG_RSVD = 16'h0000;
17038    parameter [15:0] COMMON_CFG0 = 16'h0000;
17039    parameter [15:0] COMMON_CFG1 = 16'h0000;
17040    parameter [15:0] POR_CFG = 16'h0000;
17041    parameter [15:0] PPF0_CFG = 16'h0F00;
17042    parameter [15:0] PPF1_CFG = 16'h0F00;
17043    parameter QPLL0CLKOUT_RATE = "FULL";
17044    parameter [15:0] QPLL0_CFG0 = 16'h391C;
17045    parameter [15:0] QPLL0_CFG1 = 16'h0000;
17046    parameter [15:0] QPLL0_CFG1_G3 = 16'h0020;
17047    parameter [15:0] QPLL0_CFG2 = 16'h0F80;
17048    parameter [15:0] QPLL0_CFG2_G3 = 16'h0F80;
17049    parameter [15:0] QPLL0_CFG3 = 16'h0120;
17050    parameter [15:0] QPLL0_CFG4 = 16'h0002;
17051    parameter [9:0] QPLL0_CP = 10'b0000011111;
17052    parameter [9:0] QPLL0_CP_G3 = 10'b0000011111;
17053    parameter integer QPLL0_FBDIV = 66;
17054    parameter integer QPLL0_FBDIV_G3 = 80;
17055    parameter [15:0] QPLL0_INIT_CFG0 = 16'h0000;
17056    parameter [7:0] QPLL0_INIT_CFG1 = 8'h00;
17057    parameter [15:0] QPLL0_LOCK_CFG = 16'h01E8;
17058    parameter [15:0] QPLL0_LOCK_CFG_G3 = 16'h21E8;
17059    parameter [9:0] QPLL0_LPF = 10'b1011111111;
17060    parameter [9:0] QPLL0_LPF_G3 = 10'b1111111111;
17061    parameter [0:0] QPLL0_PCI_EN = 1'b0;
17062    parameter [0:0] QPLL0_RATE_SW_USE_DRP = 1'b0;
17063    parameter integer QPLL0_REFCLK_DIV = 1;
17064    parameter [15:0] QPLL0_SDM_CFG0 = 16'h0040;
17065    parameter [15:0] QPLL0_SDM_CFG1 = 16'h0000;
17066    parameter [15:0] QPLL0_SDM_CFG2 = 16'h0000;
17067    parameter QPLL1CLKOUT_RATE = "FULL";
17068    parameter [15:0] QPLL1_CFG0 = 16'h691C;
17069    parameter [15:0] QPLL1_CFG1 = 16'h0020;
17070    parameter [15:0] QPLL1_CFG1_G3 = 16'h0020;
17071    parameter [15:0] QPLL1_CFG2 = 16'h0F80;
17072    parameter [15:0] QPLL1_CFG2_G3 = 16'h0F80;
17073    parameter [15:0] QPLL1_CFG3 = 16'h0120;
17074    parameter [15:0] QPLL1_CFG4 = 16'h0002;
17075    parameter [9:0] QPLL1_CP = 10'b0000011111;
17076    parameter [9:0] QPLL1_CP_G3 = 10'b0000011111;
17077    parameter integer QPLL1_FBDIV = 66;
17078    parameter integer QPLL1_FBDIV_G3 = 80;
17079    parameter [15:0] QPLL1_INIT_CFG0 = 16'h0000;
17080    parameter [7:0] QPLL1_INIT_CFG1 = 8'h00;
17081    parameter [15:0] QPLL1_LOCK_CFG = 16'h01E8;
17082    parameter [15:0] QPLL1_LOCK_CFG_G3 = 16'h21E8;
17083    parameter [9:0] QPLL1_LPF = 10'b1011111111;
17084    parameter [9:0] QPLL1_LPF_G3 = 10'b1111111111;
17085    parameter [0:0] QPLL1_PCI_EN = 1'b0;
17086    parameter [0:0] QPLL1_RATE_SW_USE_DRP = 1'b0;
17087    parameter integer QPLL1_REFCLK_DIV = 1;
17088    parameter [15:0] QPLL1_SDM_CFG0 = 16'h0000;
17089    parameter [15:0] QPLL1_SDM_CFG1 = 16'h0000;
17090    parameter [15:0] QPLL1_SDM_CFG2 = 16'h0000;
17091    parameter [15:0] RSVD_ATTR0 = 16'h0000;
17092    parameter [15:0] RSVD_ATTR1 = 16'h0000;
17093    parameter [15:0] RSVD_ATTR2 = 16'h0000;
17094    parameter [15:0] RSVD_ATTR3 = 16'h0000;
17095    parameter [1:0] RXRECCLKOUT0_SEL = 2'b00;
17096    parameter [1:0] RXRECCLKOUT1_SEL = 2'b00;
17097    parameter [0:0] SARC_ENB = 1'b0;
17098    parameter [0:0] SARC_SEL = 1'b0;
17099    parameter [15:0] SDM0INITSEED0_0 = 16'b0000000000000000;
17100    parameter [8:0] SDM0INITSEED0_1 = 9'b000000000;
17101    parameter [15:0] SDM1INITSEED0_0 = 16'b0000000000000000;
17102    parameter [8:0] SDM1INITSEED0_1 = 9'b000000000;
17103    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
17104    parameter SIM_MODE = "FAST";
17105    parameter SIM_RESET_SPEEDUP = "TRUE";
17106    output [15:0] DRPDO;
17107    output DRPRDY;
17108    output [7:0] PMARSVDOUT0;
17109    output [7:0] PMARSVDOUT1;
17110    output QPLL0FBCLKLOST;
17111    output QPLL0LOCK;
17112    output QPLL0OUTCLK;
17113    output QPLL0OUTREFCLK;
17114    output QPLL0REFCLKLOST;
17115    output QPLL1FBCLKLOST;
17116    output QPLL1LOCK;
17117    output QPLL1OUTCLK;
17118    output QPLL1OUTREFCLK;
17119    output QPLL1REFCLKLOST;
17120    output [7:0] QPLLDMONITOR0;
17121    output [7:0] QPLLDMONITOR1;
17122    output REFCLKOUTMONITOR0;
17123    output REFCLKOUTMONITOR1;
17124    output [1:0] RXRECCLK0SEL;
17125    output [1:0] RXRECCLK1SEL;
17126    output [3:0] SDM0FINALOUT;
17127    output [14:0] SDM0TESTDATA;
17128    output [3:0] SDM1FINALOUT;
17129    output [14:0] SDM1TESTDATA;
17130    output [9:0] TCONGPO;
17131    output TCONRSVDOUT0;
17132    input BGBYPASSB;
17133    input BGMONITORENB;
17134    input BGPDB;
17135    input [4:0] BGRCALOVRD;
17136    input BGRCALOVRDENB;
17137    input [15:0] DRPADDR;
17138    input DRPCLK;
17139    input [15:0] DRPDI;
17140    input DRPEN;
17141    input DRPWE;
17142    input GTGREFCLK0;
17143    input GTGREFCLK1;
17144    input GTNORTHREFCLK00;
17145    input GTNORTHREFCLK01;
17146    input GTNORTHREFCLK10;
17147    input GTNORTHREFCLK11;
17148    input GTREFCLK00;
17149    input GTREFCLK01;
17150    input GTREFCLK10;
17151    input GTREFCLK11;
17152    input GTSOUTHREFCLK00;
17153    input GTSOUTHREFCLK01;
17154    input GTSOUTHREFCLK10;
17155    input GTSOUTHREFCLK11;
17156    input [2:0] PCIERATEQPLL0;
17157    input [2:0] PCIERATEQPLL1;
17158    input [7:0] PMARSVD0;
17159    input [7:0] PMARSVD1;
17160    input QPLL0CLKRSVD0;
17161    input QPLL0CLKRSVD1;
17162    input [7:0] QPLL0FBDIV;
17163    input QPLL0LOCKDETCLK;
17164    input QPLL0LOCKEN;
17165    input QPLL0PD;
17166    input [2:0] QPLL0REFCLKSEL;
17167    input QPLL0RESET;
17168    input QPLL1CLKRSVD0;
17169    input QPLL1CLKRSVD1;
17170    input [7:0] QPLL1FBDIV;
17171    input QPLL1LOCKDETCLK;
17172    input QPLL1LOCKEN;
17173    input QPLL1PD;
17174    input [2:0] QPLL1REFCLKSEL;
17175    input QPLL1RESET;
17176    input [7:0] QPLLRSVD1;
17177    input [4:0] QPLLRSVD2;
17178    input [4:0] QPLLRSVD3;
17179    input [7:0] QPLLRSVD4;
17180    input RCALENB;
17181    input [24:0] SDM0DATA;
17182    input SDM0RESET;
17183    input SDM0TOGGLE;
17184    input [1:0] SDM0WIDTH;
17185    input [24:0] SDM1DATA;
17186    input SDM1RESET;
17187    input SDM1TOGGLE;
17188    input [1:0] SDM1WIDTH;
17189    input [9:0] TCONGPI;
17190    input TCONPOWERUP;
17191    input [1:0] TCONRESET;
17192    input [1:0] TCONRSVDIN1;
17193endmodule
17194
17195module GTYE4_CHANNEL (...);
17196    parameter [0:0] ACJTAG_DEBUG_MODE = 1'b0;
17197    parameter [0:0] ACJTAG_MODE = 1'b0;
17198    parameter [0:0] ACJTAG_RESET = 1'b0;
17199    parameter [15:0] ADAPT_CFG0 = 16'h9200;
17200    parameter [15:0] ADAPT_CFG1 = 16'h801C;
17201    parameter [15:0] ADAPT_CFG2 = 16'h0000;
17202    parameter ALIGN_COMMA_DOUBLE = "FALSE";
17203    parameter [9:0] ALIGN_COMMA_ENABLE = 10'b0001111111;
17204    parameter integer ALIGN_COMMA_WORD = 1;
17205    parameter ALIGN_MCOMMA_DET = "TRUE";
17206    parameter [9:0] ALIGN_MCOMMA_VALUE = 10'b1010000011;
17207    parameter ALIGN_PCOMMA_DET = "TRUE";
17208    parameter [9:0] ALIGN_PCOMMA_VALUE = 10'b0101111100;
17209    parameter [0:0] A_RXOSCALRESET = 1'b0;
17210    parameter [0:0] A_RXPROGDIVRESET = 1'b0;
17211    parameter [0:0] A_RXTERMINATION = 1'b1;
17212    parameter [4:0] A_TXDIFFCTRL = 5'b01100;
17213    parameter [0:0] A_TXPROGDIVRESET = 1'b0;
17214    parameter CBCC_DATA_SOURCE_SEL = "DECODED";
17215    parameter [0:0] CDR_SWAP_MODE_EN = 1'b0;
17216    parameter [0:0] CFOK_PWRSVE_EN = 1'b1;
17217    parameter CHAN_BOND_KEEP_ALIGN = "FALSE";
17218    parameter integer CHAN_BOND_MAX_SKEW = 7;
17219    parameter [9:0] CHAN_BOND_SEQ_1_1 = 10'b0101111100;
17220    parameter [9:0] CHAN_BOND_SEQ_1_2 = 10'b0000000000;
17221    parameter [9:0] CHAN_BOND_SEQ_1_3 = 10'b0000000000;
17222    parameter [9:0] CHAN_BOND_SEQ_1_4 = 10'b0000000000;
17223    parameter [3:0] CHAN_BOND_SEQ_1_ENABLE = 4'b1111;
17224    parameter [9:0] CHAN_BOND_SEQ_2_1 = 10'b0100000000;
17225    parameter [9:0] CHAN_BOND_SEQ_2_2 = 10'b0100000000;
17226    parameter [9:0] CHAN_BOND_SEQ_2_3 = 10'b0100000000;
17227    parameter [9:0] CHAN_BOND_SEQ_2_4 = 10'b0100000000;
17228    parameter [3:0] CHAN_BOND_SEQ_2_ENABLE = 4'b1111;
17229    parameter CHAN_BOND_SEQ_2_USE = "FALSE";
17230    parameter integer CHAN_BOND_SEQ_LEN = 2;
17231    parameter [15:0] CH_HSPMUX = 16'h2424;
17232    parameter [15:0] CKCAL1_CFG_0 = 16'b1100000011000000;
17233    parameter [15:0] CKCAL1_CFG_1 = 16'b0101000011000000;
17234    parameter [15:0] CKCAL1_CFG_2 = 16'b0000000000000000;
17235    parameter [15:0] CKCAL1_CFG_3 = 16'b0000000000000000;
17236    parameter [15:0] CKCAL2_CFG_0 = 16'b1100000011000000;
17237    parameter [15:0] CKCAL2_CFG_1 = 16'b1000000011000000;
17238    parameter [15:0] CKCAL2_CFG_2 = 16'b0000000000000000;
17239    parameter [15:0] CKCAL2_CFG_3 = 16'b0000000000000000;
17240    parameter [15:0] CKCAL2_CFG_4 = 16'b0000000000000000;
17241    parameter CLK_CORRECT_USE = "TRUE";
17242    parameter CLK_COR_KEEP_IDLE = "FALSE";
17243    parameter integer CLK_COR_MAX_LAT = 20;
17244    parameter integer CLK_COR_MIN_LAT = 18;
17245    parameter CLK_COR_PRECEDENCE = "TRUE";
17246    parameter integer CLK_COR_REPEAT_WAIT = 0;
17247    parameter [9:0] CLK_COR_SEQ_1_1 = 10'b0100011100;
17248    parameter [9:0] CLK_COR_SEQ_1_2 = 10'b0000000000;
17249    parameter [9:0] CLK_COR_SEQ_1_3 = 10'b0000000000;
17250    parameter [9:0] CLK_COR_SEQ_1_4 = 10'b0000000000;
17251    parameter [3:0] CLK_COR_SEQ_1_ENABLE = 4'b1111;
17252    parameter [9:0] CLK_COR_SEQ_2_1 = 10'b0100000000;
17253    parameter [9:0] CLK_COR_SEQ_2_2 = 10'b0100000000;
17254    parameter [9:0] CLK_COR_SEQ_2_3 = 10'b0100000000;
17255    parameter [9:0] CLK_COR_SEQ_2_4 = 10'b0100000000;
17256    parameter [3:0] CLK_COR_SEQ_2_ENABLE = 4'b1111;
17257    parameter CLK_COR_SEQ_2_USE = "FALSE";
17258    parameter integer CLK_COR_SEQ_LEN = 2;
17259    parameter [15:0] CPLL_CFG0 = 16'h01FA;
17260    parameter [15:0] CPLL_CFG1 = 16'h24A9;
17261    parameter [15:0] CPLL_CFG2 = 16'h6807;
17262    parameter [15:0] CPLL_CFG3 = 16'h0000;
17263    parameter integer CPLL_FBDIV = 4;
17264    parameter integer CPLL_FBDIV_45 = 4;
17265    parameter [15:0] CPLL_INIT_CFG0 = 16'h001E;
17266    parameter [15:0] CPLL_LOCK_CFG = 16'h01E8;
17267    parameter integer CPLL_REFCLK_DIV = 1;
17268    parameter [2:0] CTLE3_OCAP_EXT_CTRL = 3'b000;
17269    parameter [0:0] CTLE3_OCAP_EXT_EN = 1'b0;
17270    parameter [1:0] DDI_CTRL = 2'b00;
17271    parameter integer DDI_REALIGN_WAIT = 15;
17272    parameter DEC_MCOMMA_DETECT = "TRUE";
17273    parameter DEC_PCOMMA_DETECT = "TRUE";
17274    parameter DEC_VALID_COMMA_ONLY = "TRUE";
17275    parameter [0:0] DELAY_ELEC = 1'b0;
17276    parameter [9:0] DMONITOR_CFG0 = 10'h000;
17277    parameter [7:0] DMONITOR_CFG1 = 8'h00;
17278    parameter [0:0] ES_CLK_PHASE_SEL = 1'b0;
17279    parameter [5:0] ES_CONTROL = 6'b000000;
17280    parameter ES_ERRDET_EN = "FALSE";
17281    parameter ES_EYE_SCAN_EN = "FALSE";
17282    parameter [11:0] ES_HORZ_OFFSET = 12'h800;
17283    parameter [4:0] ES_PRESCALE = 5'b00000;
17284    parameter [15:0] ES_QUALIFIER0 = 16'h0000;
17285    parameter [15:0] ES_QUALIFIER1 = 16'h0000;
17286    parameter [15:0] ES_QUALIFIER2 = 16'h0000;
17287    parameter [15:0] ES_QUALIFIER3 = 16'h0000;
17288    parameter [15:0] ES_QUALIFIER4 = 16'h0000;
17289    parameter [15:0] ES_QUALIFIER5 = 16'h0000;
17290    parameter [15:0] ES_QUALIFIER6 = 16'h0000;
17291    parameter [15:0] ES_QUALIFIER7 = 16'h0000;
17292    parameter [15:0] ES_QUALIFIER8 = 16'h0000;
17293    parameter [15:0] ES_QUALIFIER9 = 16'h0000;
17294    parameter [15:0] ES_QUAL_MASK0 = 16'h0000;
17295    parameter [15:0] ES_QUAL_MASK1 = 16'h0000;
17296    parameter [15:0] ES_QUAL_MASK2 = 16'h0000;
17297    parameter [15:0] ES_QUAL_MASK3 = 16'h0000;
17298    parameter [15:0] ES_QUAL_MASK4 = 16'h0000;
17299    parameter [15:0] ES_QUAL_MASK5 = 16'h0000;
17300    parameter [15:0] ES_QUAL_MASK6 = 16'h0000;
17301    parameter [15:0] ES_QUAL_MASK7 = 16'h0000;
17302    parameter [15:0] ES_QUAL_MASK8 = 16'h0000;
17303    parameter [15:0] ES_QUAL_MASK9 = 16'h0000;
17304    parameter [15:0] ES_SDATA_MASK0 = 16'h0000;
17305    parameter [15:0] ES_SDATA_MASK1 = 16'h0000;
17306    parameter [15:0] ES_SDATA_MASK2 = 16'h0000;
17307    parameter [15:0] ES_SDATA_MASK3 = 16'h0000;
17308    parameter [15:0] ES_SDATA_MASK4 = 16'h0000;
17309    parameter [15:0] ES_SDATA_MASK5 = 16'h0000;
17310    parameter [15:0] ES_SDATA_MASK6 = 16'h0000;
17311    parameter [15:0] ES_SDATA_MASK7 = 16'h0000;
17312    parameter [15:0] ES_SDATA_MASK8 = 16'h0000;
17313    parameter [15:0] ES_SDATA_MASK9 = 16'h0000;
17314    parameter integer EYESCAN_VP_RANGE = 0;
17315    parameter [0:0] EYE_SCAN_SWAP_EN = 1'b0;
17316    parameter [3:0] FTS_DESKEW_SEQ_ENABLE = 4'b1111;
17317    parameter [3:0] FTS_LANE_DESKEW_CFG = 4'b1111;
17318    parameter FTS_LANE_DESKEW_EN = "FALSE";
17319    parameter [4:0] GEARBOX_MODE = 5'b00000;
17320    parameter [0:0] ISCAN_CK_PH_SEL2 = 1'b0;
17321    parameter [0:0] LOCAL_MASTER = 1'b0;
17322    parameter integer LPBK_BIAS_CTRL = 4;
17323    parameter [0:0] LPBK_EN_RCAL_B = 1'b0;
17324    parameter [3:0] LPBK_EXT_RCAL = 4'b0000;
17325    parameter integer LPBK_IND_CTRL0 = 5;
17326    parameter integer LPBK_IND_CTRL1 = 5;
17327    parameter integer LPBK_IND_CTRL2 = 5;
17328    parameter integer LPBK_RG_CTRL = 2;
17329    parameter [1:0] OOBDIVCTL = 2'b00;
17330    parameter [0:0] OOB_PWRUP = 1'b0;
17331    parameter PCI3_AUTO_REALIGN = "FRST_SMPL";
17332    parameter [0:0] PCI3_PIPE_RX_ELECIDLE = 1'b1;
17333    parameter [1:0] PCI3_RX_ASYNC_EBUF_BYPASS = 2'b00;
17334    parameter [0:0] PCI3_RX_ELECIDLE_EI2_ENABLE = 1'b0;
17335    parameter [5:0] PCI3_RX_ELECIDLE_H2L_COUNT = 6'b000000;
17336    parameter [2:0] PCI3_RX_ELECIDLE_H2L_DISABLE = 3'b000;
17337    parameter [5:0] PCI3_RX_ELECIDLE_HI_COUNT = 6'b000000;
17338    parameter [0:0] PCI3_RX_ELECIDLE_LP4_DISABLE = 1'b0;
17339    parameter [0:0] PCI3_RX_FIFO_DISABLE = 1'b0;
17340    parameter [4:0] PCIE3_CLK_COR_EMPTY_THRSH = 5'b00000;
17341    parameter [5:0] PCIE3_CLK_COR_FULL_THRSH = 6'b010000;
17342    parameter [4:0] PCIE3_CLK_COR_MAX_LAT = 5'b01000;
17343    parameter [4:0] PCIE3_CLK_COR_MIN_LAT = 5'b00100;
17344    parameter [5:0] PCIE3_CLK_COR_THRSH_TIMER = 6'b001000;
17345    parameter PCIE_64B_DYN_CLKSW_DIS = "FALSE";
17346    parameter [15:0] PCIE_BUFG_DIV_CTRL = 16'h0000;
17347    parameter PCIE_GEN4_64BIT_INT_EN = "FALSE";
17348    parameter [1:0] PCIE_PLL_SEL_MODE_GEN12 = 2'h0;
17349    parameter [1:0] PCIE_PLL_SEL_MODE_GEN3 = 2'h0;
17350    parameter [1:0] PCIE_PLL_SEL_MODE_GEN4 = 2'h0;
17351    parameter [15:0] PCIE_RXPCS_CFG_GEN3 = 16'h0000;
17352    parameter [15:0] PCIE_RXPMA_CFG = 16'h0000;
17353    parameter [15:0] PCIE_TXPCS_CFG_GEN3 = 16'h0000;
17354    parameter [15:0] PCIE_TXPMA_CFG = 16'h0000;
17355    parameter PCS_PCIE_EN = "FALSE";
17356    parameter [15:0] PCS_RSVD0 = 16'h0000;
17357    parameter [11:0] PD_TRANS_TIME_FROM_P2 = 12'h03C;
17358    parameter [7:0] PD_TRANS_TIME_NONE_P2 = 8'h19;
17359    parameter [7:0] PD_TRANS_TIME_TO_P2 = 8'h64;
17360    parameter integer PREIQ_FREQ_BST = 0;
17361    parameter [0:0] RATE_SW_USE_DRP = 1'b0;
17362    parameter [0:0] RCLK_SIPO_DLY_ENB = 1'b0;
17363    parameter [0:0] RCLK_SIPO_INV_EN = 1'b0;
17364    parameter [2:0] RTX_BUF_CML_CTRL = 3'b010;
17365    parameter [1:0] RTX_BUF_TERM_CTRL = 2'b00;
17366    parameter [4:0] RXBUFRESET_TIME = 5'b00001;
17367    parameter RXBUF_ADDR_MODE = "FULL";
17368    parameter [3:0] RXBUF_EIDLE_HI_CNT = 4'b1000;
17369    parameter [3:0] RXBUF_EIDLE_LO_CNT = 4'b0000;
17370    parameter RXBUF_EN = "TRUE";
17371    parameter RXBUF_RESET_ON_CB_CHANGE = "TRUE";
17372    parameter RXBUF_RESET_ON_COMMAALIGN = "FALSE";
17373    parameter RXBUF_RESET_ON_EIDLE = "FALSE";
17374    parameter RXBUF_RESET_ON_RATE_CHANGE = "TRUE";
17375    parameter integer RXBUF_THRESH_OVFLW = 0;
17376    parameter RXBUF_THRESH_OVRD = "FALSE";
17377    parameter integer RXBUF_THRESH_UNDFLW = 4;
17378    parameter [4:0] RXCDRFREQRESET_TIME = 5'b10000;
17379    parameter [4:0] RXCDRPHRESET_TIME = 5'b00001;
17380    parameter [15:0] RXCDR_CFG0 = 16'h0003;
17381    parameter [15:0] RXCDR_CFG0_GEN3 = 16'h0003;
17382    parameter [15:0] RXCDR_CFG1 = 16'h0000;
17383    parameter [15:0] RXCDR_CFG1_GEN3 = 16'h0000;
17384    parameter [15:0] RXCDR_CFG2 = 16'h0164;
17385    parameter [9:0] RXCDR_CFG2_GEN2 = 10'h164;
17386    parameter [15:0] RXCDR_CFG2_GEN3 = 16'h0034;
17387    parameter [15:0] RXCDR_CFG2_GEN4 = 16'h0034;
17388    parameter [15:0] RXCDR_CFG3 = 16'h0024;
17389    parameter [5:0] RXCDR_CFG3_GEN2 = 6'h24;
17390    parameter [15:0] RXCDR_CFG3_GEN3 = 16'h0024;
17391    parameter [15:0] RXCDR_CFG3_GEN4 = 16'h0024;
17392    parameter [15:0] RXCDR_CFG4 = 16'h5CF6;
17393    parameter [15:0] RXCDR_CFG4_GEN3 = 16'h5CF6;
17394    parameter [15:0] RXCDR_CFG5 = 16'hB46B;
17395    parameter [15:0] RXCDR_CFG5_GEN3 = 16'h146B;
17396    parameter [0:0] RXCDR_FR_RESET_ON_EIDLE = 1'b0;
17397    parameter [0:0] RXCDR_HOLD_DURING_EIDLE = 1'b0;
17398    parameter [15:0] RXCDR_LOCK_CFG0 = 16'h0040;
17399    parameter [15:0] RXCDR_LOCK_CFG1 = 16'h8000;
17400    parameter [15:0] RXCDR_LOCK_CFG2 = 16'h0000;
17401    parameter [15:0] RXCDR_LOCK_CFG3 = 16'h0000;
17402    parameter [15:0] RXCDR_LOCK_CFG4 = 16'h0000;
17403    parameter [0:0] RXCDR_PH_RESET_ON_EIDLE = 1'b0;
17404    parameter [15:0] RXCFOK_CFG0 = 16'h0000;
17405    parameter [15:0] RXCFOK_CFG1 = 16'h0002;
17406    parameter [15:0] RXCFOK_CFG2 = 16'h002D;
17407    parameter [15:0] RXCKCAL1_IQ_LOOP_RST_CFG = 16'h0000;
17408    parameter [15:0] RXCKCAL1_I_LOOP_RST_CFG = 16'h0000;
17409    parameter [15:0] RXCKCAL1_Q_LOOP_RST_CFG = 16'h0000;
17410    parameter [15:0] RXCKCAL2_DX_LOOP_RST_CFG = 16'h0000;
17411    parameter [15:0] RXCKCAL2_D_LOOP_RST_CFG = 16'h0000;
17412    parameter [15:0] RXCKCAL2_S_LOOP_RST_CFG = 16'h0000;
17413    parameter [15:0] RXCKCAL2_X_LOOP_RST_CFG = 16'h0000;
17414    parameter [6:0] RXDFELPMRESET_TIME = 7'b0001111;
17415    parameter [15:0] RXDFELPM_KL_CFG0 = 16'h0000;
17416    parameter [15:0] RXDFELPM_KL_CFG1 = 16'h0022;
17417    parameter [15:0] RXDFELPM_KL_CFG2 = 16'h0100;
17418    parameter [15:0] RXDFE_CFG0 = 16'h4000;
17419    parameter [15:0] RXDFE_CFG1 = 16'h0000;
17420    parameter [15:0] RXDFE_GC_CFG0 = 16'h0000;
17421    parameter [15:0] RXDFE_GC_CFG1 = 16'h0000;
17422    parameter [15:0] RXDFE_GC_CFG2 = 16'h0000;
17423    parameter [15:0] RXDFE_H2_CFG0 = 16'h0000;
17424    parameter [15:0] RXDFE_H2_CFG1 = 16'h0002;
17425    parameter [15:0] RXDFE_H3_CFG0 = 16'h0000;
17426    parameter [15:0] RXDFE_H3_CFG1 = 16'h0002;
17427    parameter [15:0] RXDFE_H4_CFG0 = 16'h0000;
17428    parameter [15:0] RXDFE_H4_CFG1 = 16'h0003;
17429    parameter [15:0] RXDFE_H5_CFG0 = 16'h0000;
17430    parameter [15:0] RXDFE_H5_CFG1 = 16'h0002;
17431    parameter [15:0] RXDFE_H6_CFG0 = 16'h0000;
17432    parameter [15:0] RXDFE_H6_CFG1 = 16'h0002;
17433    parameter [15:0] RXDFE_H7_CFG0 = 16'h0000;
17434    parameter [15:0] RXDFE_H7_CFG1 = 16'h0002;
17435    parameter [15:0] RXDFE_H8_CFG0 = 16'h0000;
17436    parameter [15:0] RXDFE_H8_CFG1 = 16'h0002;
17437    parameter [15:0] RXDFE_H9_CFG0 = 16'h0000;
17438    parameter [15:0] RXDFE_H9_CFG1 = 16'h0002;
17439    parameter [15:0] RXDFE_HA_CFG0 = 16'h0000;
17440    parameter [15:0] RXDFE_HA_CFG1 = 16'h0002;
17441    parameter [15:0] RXDFE_HB_CFG0 = 16'h0000;
17442    parameter [15:0] RXDFE_HB_CFG1 = 16'h0002;
17443    parameter [15:0] RXDFE_HC_CFG0 = 16'h0000;
17444    parameter [15:0] RXDFE_HC_CFG1 = 16'h0002;
17445    parameter [15:0] RXDFE_HD_CFG0 = 16'h0000;
17446    parameter [15:0] RXDFE_HD_CFG1 = 16'h0002;
17447    parameter [15:0] RXDFE_HE_CFG0 = 16'h0000;
17448    parameter [15:0] RXDFE_HE_CFG1 = 16'h0002;
17449    parameter [15:0] RXDFE_HF_CFG0 = 16'h0000;
17450    parameter [15:0] RXDFE_HF_CFG1 = 16'h0002;
17451    parameter [15:0] RXDFE_KH_CFG0 = 16'h0000;
17452    parameter [15:0] RXDFE_KH_CFG1 = 16'h0000;
17453    parameter [15:0] RXDFE_KH_CFG2 = 16'h0000;
17454    parameter [15:0] RXDFE_KH_CFG3 = 16'h2000;
17455    parameter [15:0] RXDFE_OS_CFG0 = 16'h0000;
17456    parameter [15:0] RXDFE_OS_CFG1 = 16'h0000;
17457    parameter [15:0] RXDFE_UT_CFG0 = 16'h0000;
17458    parameter [15:0] RXDFE_UT_CFG1 = 16'h0002;
17459    parameter [15:0] RXDFE_UT_CFG2 = 16'h0000;
17460    parameter [15:0] RXDFE_VP_CFG0 = 16'h0000;
17461    parameter [15:0] RXDFE_VP_CFG1 = 16'h0022;
17462    parameter [15:0] RXDLY_CFG = 16'h0010;
17463    parameter [15:0] RXDLY_LCFG = 16'h0030;
17464    parameter RXELECIDLE_CFG = "SIGCFG_4";
17465    parameter integer RXGBOX_FIFO_INIT_RD_ADDR = 4;
17466    parameter RXGEARBOX_EN = "FALSE";
17467    parameter [4:0] RXISCANRESET_TIME = 5'b00001;
17468    parameter [15:0] RXLPM_CFG = 16'h0000;
17469    parameter [15:0] RXLPM_GC_CFG = 16'h1000;
17470    parameter [15:0] RXLPM_KH_CFG0 = 16'h0000;
17471    parameter [15:0] RXLPM_KH_CFG1 = 16'h0002;
17472    parameter [15:0] RXLPM_OS_CFG0 = 16'h0000;
17473    parameter [15:0] RXLPM_OS_CFG1 = 16'h0000;
17474    parameter [8:0] RXOOB_CFG = 9'b000110000;
17475    parameter RXOOB_CLK_CFG = "PMA";
17476    parameter [4:0] RXOSCALRESET_TIME = 5'b00011;
17477    parameter integer RXOUT_DIV = 4;
17478    parameter [4:0] RXPCSRESET_TIME = 5'b00001;
17479    parameter [15:0] RXPHBEACON_CFG = 16'h0000;
17480    parameter [15:0] RXPHDLY_CFG = 16'h2020;
17481    parameter [15:0] RXPHSAMP_CFG = 16'h2100;
17482    parameter [15:0] RXPHSLIP_CFG = 16'h9933;
17483    parameter [4:0] RXPH_MONITOR_SEL = 5'b00000;
17484    parameter [15:0] RXPI_CFG0 = 16'h0102;
17485    parameter [15:0] RXPI_CFG1 = 16'b0000000001010100;
17486    parameter RXPMACLK_SEL = "DATA";
17487    parameter [4:0] RXPMARESET_TIME = 5'b00001;
17488    parameter [0:0] RXPRBS_ERR_LOOPBACK = 1'b0;
17489    parameter integer RXPRBS_LINKACQ_CNT = 15;
17490    parameter [0:0] RXREFCLKDIV2_SEL = 1'b0;
17491    parameter integer RXSLIDE_AUTO_WAIT = 7;
17492    parameter RXSLIDE_MODE = "OFF";
17493    parameter [0:0] RXSYNC_MULTILANE = 1'b0;
17494    parameter [0:0] RXSYNC_OVRD = 1'b0;
17495    parameter [0:0] RXSYNC_SKIP_DA = 1'b0;
17496    parameter [0:0] RX_AFE_CM_EN = 1'b0;
17497    parameter [15:0] RX_BIAS_CFG0 = 16'h12B0;
17498    parameter [5:0] RX_BUFFER_CFG = 6'b000000;
17499    parameter [0:0] RX_CAPFF_SARC_ENB = 1'b0;
17500    parameter integer RX_CLK25_DIV = 8;
17501    parameter [0:0] RX_CLKMUX_EN = 1'b1;
17502    parameter [4:0] RX_CLK_SLIP_OVRD = 5'b00000;
17503    parameter [3:0] RX_CM_BUF_CFG = 4'b1010;
17504    parameter [0:0] RX_CM_BUF_PD = 1'b0;
17505    parameter integer RX_CM_SEL = 2;
17506    parameter integer RX_CM_TRIM = 12;
17507    parameter [0:0] RX_CTLE_PWR_SAVING = 1'b0;
17508    parameter [3:0] RX_CTLE_RES_CTRL = 4'b0000;
17509    parameter integer RX_DATA_WIDTH = 20;
17510    parameter [5:0] RX_DDI_SEL = 6'b000000;
17511    parameter RX_DEFER_RESET_BUF_EN = "TRUE";
17512    parameter [2:0] RX_DEGEN_CTRL = 3'b100;
17513    parameter integer RX_DFELPM_CFG0 = 10;
17514    parameter [0:0] RX_DFELPM_CFG1 = 1'b1;
17515    parameter [0:0] RX_DFELPM_KLKH_AGC_STUP_EN = 1'b1;
17516    parameter integer RX_DFE_AGC_CFG1 = 4;
17517    parameter integer RX_DFE_KL_LPM_KH_CFG0 = 1;
17518    parameter integer RX_DFE_KL_LPM_KH_CFG1 = 2;
17519    parameter [1:0] RX_DFE_KL_LPM_KL_CFG0 = 2'b01;
17520    parameter integer RX_DFE_KL_LPM_KL_CFG1 = 4;
17521    parameter [0:0] RX_DFE_LPM_HOLD_DURING_EIDLE = 1'b0;
17522    parameter RX_DISPERR_SEQ_MATCH = "TRUE";
17523    parameter [4:0] RX_DIVRESET_TIME = 5'b00001;
17524    parameter [0:0] RX_EN_CTLE_RCAL_B = 1'b0;
17525    parameter integer RX_EN_SUM_RCAL_B = 0;
17526    parameter [6:0] RX_EYESCAN_VS_CODE = 7'b0000000;
17527    parameter [0:0] RX_EYESCAN_VS_NEG_DIR = 1'b0;
17528    parameter [1:0] RX_EYESCAN_VS_RANGE = 2'b10;
17529    parameter [0:0] RX_EYESCAN_VS_UT_SIGN = 1'b0;
17530    parameter [0:0] RX_FABINT_USRCLK_FLOP = 1'b0;
17531    parameter [0:0] RX_I2V_FILTER_EN = 1'b1;
17532    parameter integer RX_INT_DATAWIDTH = 1;
17533    parameter [0:0] RX_PMA_POWER_SAVE = 1'b0;
17534    parameter [15:0] RX_PMA_RSV0 = 16'h002F;
17535    parameter real RX_PROGDIV_CFG = 0.0;
17536    parameter [15:0] RX_PROGDIV_RATE = 16'h0001;
17537    parameter [3:0] RX_RESLOAD_CTRL = 4'b0000;
17538    parameter [0:0] RX_RESLOAD_OVRD = 1'b0;
17539    parameter [2:0] RX_SAMPLE_PERIOD = 3'b101;
17540    parameter integer RX_SIG_VALID_DLY = 11;
17541    parameter integer RX_SUM_DEGEN_AVTT_OVERITE = 0;
17542    parameter [0:0] RX_SUM_DFETAPREP_EN = 1'b0;
17543    parameter [3:0] RX_SUM_IREF_TUNE = 4'b0000;
17544    parameter integer RX_SUM_PWR_SAVING = 0;
17545    parameter [3:0] RX_SUM_RES_CTRL = 4'b0000;
17546    parameter [3:0] RX_SUM_VCMTUNE = 4'b0011;
17547    parameter [0:0] RX_SUM_VCM_BIAS_TUNE_EN = 1'b1;
17548    parameter [0:0] RX_SUM_VCM_OVWR = 1'b0;
17549    parameter [2:0] RX_SUM_VREF_TUNE = 3'b100;
17550    parameter [1:0] RX_TUNE_AFE_OS = 2'b00;
17551    parameter [2:0] RX_VREG_CTRL = 3'b010;
17552    parameter [0:0] RX_VREG_PDB = 1'b1;
17553    parameter [1:0] RX_WIDEMODE_CDR = 2'b01;
17554    parameter [1:0] RX_WIDEMODE_CDR_GEN3 = 2'b01;
17555    parameter [1:0] RX_WIDEMODE_CDR_GEN4 = 2'b01;
17556    parameter RX_XCLK_SEL = "RXDES";
17557    parameter [0:0] RX_XMODE_SEL = 1'b0;
17558    parameter [0:0] SAMPLE_CLK_PHASE = 1'b0;
17559    parameter [0:0] SAS_12G_MODE = 1'b0;
17560    parameter [3:0] SATA_BURST_SEQ_LEN = 4'b1111;
17561    parameter [2:0] SATA_BURST_VAL = 3'b100;
17562    parameter SATA_CPLL_CFG = "VCO_3000MHZ";
17563    parameter [2:0] SATA_EIDLE_VAL = 3'b100;
17564    parameter SHOW_REALIGN_COMMA = "TRUE";
17565    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
17566    parameter SIM_MODE = "FAST";
17567    parameter SIM_RECEIVER_DETECT_PASS = "TRUE";
17568    parameter SIM_RESET_SPEEDUP = "TRUE";
17569    parameter SIM_TX_EIDLE_DRIVE_LEVEL = "Z";
17570    parameter [0:0] SRSTMODE = 1'b0;
17571    parameter [1:0] TAPDLY_SET_TX = 2'h0;
17572    parameter [14:0] TERM_RCAL_CFG = 15'b100001000010000;
17573    parameter [2:0] TERM_RCAL_OVRD = 3'b000;
17574    parameter [7:0] TRANS_TIME_RATE = 8'h0E;
17575    parameter [7:0] TST_RSV0 = 8'h00;
17576    parameter [7:0] TST_RSV1 = 8'h00;
17577    parameter TXBUF_EN = "TRUE";
17578    parameter TXBUF_RESET_ON_RATE_CHANGE = "FALSE";
17579    parameter [15:0] TXDLY_CFG = 16'h0010;
17580    parameter [15:0] TXDLY_LCFG = 16'h0030;
17581    parameter integer TXDRV_FREQBAND = 0;
17582    parameter [15:0] TXFE_CFG0 = 16'b0000000000000000;
17583    parameter [15:0] TXFE_CFG1 = 16'b0000000000000000;
17584    parameter [15:0] TXFE_CFG2 = 16'b0000000000000000;
17585    parameter [15:0] TXFE_CFG3 = 16'b0000000000000000;
17586    parameter TXFIFO_ADDR_CFG = "LOW";
17587    parameter integer TXGBOX_FIFO_INIT_RD_ADDR = 4;
17588    parameter TXGEARBOX_EN = "FALSE";
17589    parameter integer TXOUT_DIV = 4;
17590    parameter [4:0] TXPCSRESET_TIME = 5'b00001;
17591    parameter [15:0] TXPHDLY_CFG0 = 16'h6020;
17592    parameter [15:0] TXPHDLY_CFG1 = 16'h0002;
17593    parameter [15:0] TXPH_CFG = 16'h0123;
17594    parameter [15:0] TXPH_CFG2 = 16'h0000;
17595    parameter [4:0] TXPH_MONITOR_SEL = 5'b00000;
17596    parameter [15:0] TXPI_CFG0 = 16'b0000000100000000;
17597    parameter [15:0] TXPI_CFG1 = 16'b0000000000000000;
17598    parameter [0:0] TXPI_GRAY_SEL = 1'b0;
17599    parameter [0:0] TXPI_INVSTROBE_SEL = 1'b0;
17600    parameter [0:0] TXPI_PPM = 1'b0;
17601    parameter [7:0] TXPI_PPM_CFG = 8'b00000000;
17602    parameter [2:0] TXPI_SYNFREQ_PPM = 3'b000;
17603    parameter [4:0] TXPMARESET_TIME = 5'b00001;
17604    parameter [0:0] TXREFCLKDIV2_SEL = 1'b0;
17605    parameter integer TXSWBST_BST = 1;
17606    parameter integer TXSWBST_EN = 0;
17607    parameter integer TXSWBST_MAG = 6;
17608    parameter [0:0] TXSYNC_MULTILANE = 1'b0;
17609    parameter [0:0] TXSYNC_OVRD = 1'b0;
17610    parameter [0:0] TXSYNC_SKIP_DA = 1'b0;
17611    parameter integer TX_CLK25_DIV = 8;
17612    parameter [0:0] TX_CLKMUX_EN = 1'b1;
17613    parameter integer TX_DATA_WIDTH = 20;
17614    parameter [15:0] TX_DCC_LOOP_RST_CFG = 16'h0000;
17615    parameter [5:0] TX_DEEMPH0 = 6'b000000;
17616    parameter [5:0] TX_DEEMPH1 = 6'b000000;
17617    parameter [5:0] TX_DEEMPH2 = 6'b000000;
17618    parameter [5:0] TX_DEEMPH3 = 6'b000000;
17619    parameter [4:0] TX_DIVRESET_TIME = 5'b00001;
17620    parameter TX_DRIVE_MODE = "DIRECT";
17621    parameter [2:0] TX_EIDLE_ASSERT_DELAY = 3'b110;
17622    parameter [2:0] TX_EIDLE_DEASSERT_DELAY = 3'b100;
17623    parameter [0:0] TX_FABINT_USRCLK_FLOP = 1'b0;
17624    parameter [0:0] TX_FIFO_BYP_EN = 1'b0;
17625    parameter [0:0] TX_IDLE_DATA_ZERO = 1'b0;
17626    parameter integer TX_INT_DATAWIDTH = 1;
17627    parameter TX_LOOPBACK_DRIVE_HIZ = "FALSE";
17628    parameter [0:0] TX_MAINCURSOR_SEL = 1'b0;
17629    parameter [6:0] TX_MARGIN_FULL_0 = 7'b1001110;
17630    parameter [6:0] TX_MARGIN_FULL_1 = 7'b1001001;
17631    parameter [6:0] TX_MARGIN_FULL_2 = 7'b1000101;
17632    parameter [6:0] TX_MARGIN_FULL_3 = 7'b1000010;
17633    parameter [6:0] TX_MARGIN_FULL_4 = 7'b1000000;
17634    parameter [6:0] TX_MARGIN_LOW_0 = 7'b1000110;
17635    parameter [6:0] TX_MARGIN_LOW_1 = 7'b1000100;
17636    parameter [6:0] TX_MARGIN_LOW_2 = 7'b1000010;
17637    parameter [6:0] TX_MARGIN_LOW_3 = 7'b1000000;
17638    parameter [6:0] TX_MARGIN_LOW_4 = 7'b1000000;
17639    parameter [15:0] TX_PHICAL_CFG0 = 16'h0000;
17640    parameter [15:0] TX_PHICAL_CFG1 = 16'h003F;
17641    parameter integer TX_PI_BIASSET = 0;
17642    parameter [0:0] TX_PMADATA_OPT = 1'b0;
17643    parameter [0:0] TX_PMA_POWER_SAVE = 1'b0;
17644    parameter [15:0] TX_PMA_RSV0 = 16'h0000;
17645    parameter [15:0] TX_PMA_RSV1 = 16'h0000;
17646    parameter TX_PROGCLK_SEL = "POSTPI";
17647    parameter real TX_PROGDIV_CFG = 0.0;
17648    parameter [15:0] TX_PROGDIV_RATE = 16'h0001;
17649    parameter [13:0] TX_RXDETECT_CFG = 14'h0032;
17650    parameter integer TX_RXDETECT_REF = 3;
17651    parameter [2:0] TX_SAMPLE_PERIOD = 3'b101;
17652    parameter [1:0] TX_SW_MEAS = 2'b00;
17653    parameter [2:0] TX_VREG_CTRL = 3'b000;
17654    parameter [0:0] TX_VREG_PDB = 1'b0;
17655    parameter [1:0] TX_VREG_VREFSEL = 2'b00;
17656    parameter TX_XCLK_SEL = "TXOUT";
17657    parameter [0:0] USB_BOTH_BURST_IDLE = 1'b0;
17658    parameter [6:0] USB_BURSTMAX_U3WAKE = 7'b1111111;
17659    parameter [6:0] USB_BURSTMIN_U3WAKE = 7'b1100011;
17660    parameter [0:0] USB_CLK_COR_EQ_EN = 1'b0;
17661    parameter [0:0] USB_EXT_CNTL = 1'b1;
17662    parameter [9:0] USB_IDLEMAX_POLLING = 10'b1010111011;
17663    parameter [9:0] USB_IDLEMIN_POLLING = 10'b0100101011;
17664    parameter [8:0] USB_LFPSPING_BURST = 9'b000000101;
17665    parameter [8:0] USB_LFPSPOLLING_BURST = 9'b000110001;
17666    parameter [8:0] USB_LFPSPOLLING_IDLE_MS = 9'b000000100;
17667    parameter [8:0] USB_LFPSU1EXIT_BURST = 9'b000011101;
17668    parameter [8:0] USB_LFPSU2LPEXIT_BURST_MS = 9'b001100011;
17669    parameter [8:0] USB_LFPSU3WAKE_BURST_MS = 9'b111110011;
17670    parameter [3:0] USB_LFPS_TPERIOD = 4'b0011;
17671    parameter [0:0] USB_LFPS_TPERIOD_ACCURATE = 1'b1;
17672    parameter [0:0] USB_MODE = 1'b0;
17673    parameter [0:0] USB_PCIE_ERR_REP_DIS = 1'b0;
17674    parameter integer USB_PING_SATA_MAX_INIT = 21;
17675    parameter integer USB_PING_SATA_MIN_INIT = 12;
17676    parameter integer USB_POLL_SATA_MAX_BURST = 8;
17677    parameter integer USB_POLL_SATA_MIN_BURST = 4;
17678    parameter [0:0] USB_RAW_ELEC = 1'b0;
17679    parameter [0:0] USB_RXIDLE_P0_CTRL = 1'b1;
17680    parameter [0:0] USB_TXIDLE_TUNE_ENABLE = 1'b1;
17681    parameter integer USB_U1_SATA_MAX_WAKE = 7;
17682    parameter integer USB_U1_SATA_MIN_WAKE = 4;
17683    parameter integer USB_U2_SAS_MAX_COM = 64;
17684    parameter integer USB_U2_SAS_MIN_COM = 36;
17685    parameter [0:0] USE_PCS_CLK_PHASE_SEL = 1'b0;
17686    parameter [0:0] Y_ALL_MODE = 1'b0;
17687    output BUFGTCE;
17688    output [2:0] BUFGTCEMASK;
17689    output [8:0] BUFGTDIV;
17690    output BUFGTRESET;
17691    output [2:0] BUFGTRSTMASK;
17692    output CPLLFBCLKLOST;
17693    output CPLLLOCK;
17694    output CPLLREFCLKLOST;
17695    output [15:0] DMONITOROUT;
17696    output DMONITOROUTCLK;
17697    output [15:0] DRPDO;
17698    output DRPRDY;
17699    output EYESCANDATAERROR;
17700    output GTPOWERGOOD;
17701    output GTREFCLKMONITOR;
17702    output GTYTXN;
17703    output GTYTXP;
17704    output PCIERATEGEN3;
17705    output PCIERATEIDLE;
17706    output [1:0] PCIERATEQPLLPD;
17707    output [1:0] PCIERATEQPLLRESET;
17708    output PCIESYNCTXSYNCDONE;
17709    output PCIEUSERGEN3RDY;
17710    output PCIEUSERPHYSTATUSRST;
17711    output PCIEUSERRATESTART;
17712    output [15:0] PCSRSVDOUT;
17713    output PHYSTATUS;
17714    output [15:0] PINRSRVDAS;
17715    output POWERPRESENT;
17716    output RESETEXCEPTION;
17717    output [2:0] RXBUFSTATUS;
17718    output RXBYTEISALIGNED;
17719    output RXBYTEREALIGN;
17720    output RXCDRLOCK;
17721    output RXCDRPHDONE;
17722    output RXCHANBONDSEQ;
17723    output RXCHANISALIGNED;
17724    output RXCHANREALIGN;
17725    output [4:0] RXCHBONDO;
17726    output RXCKCALDONE;
17727    output [1:0] RXCLKCORCNT;
17728    output RXCOMINITDET;
17729    output RXCOMMADET;
17730    output RXCOMSASDET;
17731    output RXCOMWAKEDET;
17732    output [15:0] RXCTRL0;
17733    output [15:0] RXCTRL1;
17734    output [7:0] RXCTRL2;
17735    output [7:0] RXCTRL3;
17736    output [127:0] RXDATA;
17737    output [7:0] RXDATAEXTENDRSVD;
17738    output [1:0] RXDATAVALID;
17739    output RXDLYSRESETDONE;
17740    output RXELECIDLE;
17741    output [5:0] RXHEADER;
17742    output [1:0] RXHEADERVALID;
17743    output RXLFPSTRESETDET;
17744    output RXLFPSU2LPEXITDET;
17745    output RXLFPSU3WAKEDET;
17746    output [7:0] RXMONITOROUT;
17747    output RXOSINTDONE;
17748    output RXOSINTSTARTED;
17749    output RXOSINTSTROBEDONE;
17750    output RXOSINTSTROBESTARTED;
17751    output RXOUTCLK;
17752    output RXOUTCLKFABRIC;
17753    output RXOUTCLKPCS;
17754    output RXPHALIGNDONE;
17755    output RXPHALIGNERR;
17756    output RXPMARESETDONE;
17757    output RXPRBSERR;
17758    output RXPRBSLOCKED;
17759    output RXPRGDIVRESETDONE;
17760    output RXRATEDONE;
17761    output RXRECCLKOUT;
17762    output RXRESETDONE;
17763    output RXSLIDERDY;
17764    output RXSLIPDONE;
17765    output RXSLIPOUTCLKRDY;
17766    output RXSLIPPMARDY;
17767    output [1:0] RXSTARTOFSEQ;
17768    output [2:0] RXSTATUS;
17769    output RXSYNCDONE;
17770    output RXSYNCOUT;
17771    output RXVALID;
17772    output [1:0] TXBUFSTATUS;
17773    output TXCOMFINISH;
17774    output TXDCCDONE;
17775    output TXDLYSRESETDONE;
17776    output TXOUTCLK;
17777    output TXOUTCLKFABRIC;
17778    output TXOUTCLKPCS;
17779    output TXPHALIGNDONE;
17780    output TXPHINITDONE;
17781    output TXPMARESETDONE;
17782    output TXPRGDIVRESETDONE;
17783    output TXRATEDONE;
17784    output TXRESETDONE;
17785    output TXSYNCDONE;
17786    output TXSYNCOUT;
17787    input CDRSTEPDIR;
17788    input CDRSTEPSQ;
17789    input CDRSTEPSX;
17790    input CFGRESET;
17791    input CLKRSVD0;
17792    input CLKRSVD1;
17793    input CPLLFREQLOCK;
17794    input CPLLLOCKDETCLK;
17795    input CPLLLOCKEN;
17796    input CPLLPD;
17797    input [2:0] CPLLREFCLKSEL;
17798    input CPLLRESET;
17799    input DMONFIFORESET;
17800    input DMONITORCLK;
17801    input [9:0] DRPADDR;
17802    input DRPCLK;
17803    input [15:0] DRPDI;
17804    input DRPEN;
17805    input DRPRST;
17806    input DRPWE;
17807    input EYESCANRESET;
17808    input EYESCANTRIGGER;
17809    input FREQOS;
17810    input GTGREFCLK;
17811    input GTNORTHREFCLK0;
17812    input GTNORTHREFCLK1;
17813    input GTREFCLK0;
17814    input GTREFCLK1;
17815    input [15:0] GTRSVD;
17816    input GTRXRESET;
17817    input GTRXRESETSEL;
17818    input GTSOUTHREFCLK0;
17819    input GTSOUTHREFCLK1;
17820    input GTTXRESET;
17821    input GTTXRESETSEL;
17822    input GTYRXN;
17823    input GTYRXP;
17824    input INCPCTRL;
17825    input [2:0] LOOPBACK;
17826    input PCIEEQRXEQADAPTDONE;
17827    input PCIERSTIDLE;
17828    input PCIERSTTXSYNCSTART;
17829    input PCIEUSERRATEDONE;
17830    input [15:0] PCSRSVDIN;
17831    input QPLL0CLK;
17832    input QPLL0FREQLOCK;
17833    input QPLL0REFCLK;
17834    input QPLL1CLK;
17835    input QPLL1FREQLOCK;
17836    input QPLL1REFCLK;
17837    input RESETOVRD;
17838    input RX8B10BEN;
17839    input RXAFECFOKEN;
17840    input RXBUFRESET;
17841    input RXCDRFREQRESET;
17842    input RXCDRHOLD;
17843    input RXCDROVRDEN;
17844    input RXCDRRESET;
17845    input RXCHBONDEN;
17846    input [4:0] RXCHBONDI;
17847    input [2:0] RXCHBONDLEVEL;
17848    input RXCHBONDMASTER;
17849    input RXCHBONDSLAVE;
17850    input RXCKCALRESET;
17851    input [6:0] RXCKCALSTART;
17852    input RXCOMMADETEN;
17853    input RXDFEAGCHOLD;
17854    input RXDFEAGCOVRDEN;
17855    input [3:0] RXDFECFOKFCNUM;
17856    input RXDFECFOKFEN;
17857    input RXDFECFOKFPULSE;
17858    input RXDFECFOKHOLD;
17859    input RXDFECFOKOVREN;
17860    input RXDFEKHHOLD;
17861    input RXDFEKHOVRDEN;
17862    input RXDFELFHOLD;
17863    input RXDFELFOVRDEN;
17864    input RXDFELPMRESET;
17865    input RXDFETAP10HOLD;
17866    input RXDFETAP10OVRDEN;
17867    input RXDFETAP11HOLD;
17868    input RXDFETAP11OVRDEN;
17869    input RXDFETAP12HOLD;
17870    input RXDFETAP12OVRDEN;
17871    input RXDFETAP13HOLD;
17872    input RXDFETAP13OVRDEN;
17873    input RXDFETAP14HOLD;
17874    input RXDFETAP14OVRDEN;
17875    input RXDFETAP15HOLD;
17876    input RXDFETAP15OVRDEN;
17877    input RXDFETAP2HOLD;
17878    input RXDFETAP2OVRDEN;
17879    input RXDFETAP3HOLD;
17880    input RXDFETAP3OVRDEN;
17881    input RXDFETAP4HOLD;
17882    input RXDFETAP4OVRDEN;
17883    input RXDFETAP5HOLD;
17884    input RXDFETAP5OVRDEN;
17885    input RXDFETAP6HOLD;
17886    input RXDFETAP6OVRDEN;
17887    input RXDFETAP7HOLD;
17888    input RXDFETAP7OVRDEN;
17889    input RXDFETAP8HOLD;
17890    input RXDFETAP8OVRDEN;
17891    input RXDFETAP9HOLD;
17892    input RXDFETAP9OVRDEN;
17893    input RXDFEUTHOLD;
17894    input RXDFEUTOVRDEN;
17895    input RXDFEVPHOLD;
17896    input RXDFEVPOVRDEN;
17897    input RXDFEXYDEN;
17898    input RXDLYBYPASS;
17899    input RXDLYEN;
17900    input RXDLYOVRDEN;
17901    input RXDLYSRESET;
17902    input [1:0] RXELECIDLEMODE;
17903    input RXEQTRAINING;
17904    input RXGEARBOXSLIP;
17905    input RXLATCLK;
17906    input RXLPMEN;
17907    input RXLPMGCHOLD;
17908    input RXLPMGCOVRDEN;
17909    input RXLPMHFHOLD;
17910    input RXLPMHFOVRDEN;
17911    input RXLPMLFHOLD;
17912    input RXLPMLFKLOVRDEN;
17913    input RXLPMOSHOLD;
17914    input RXLPMOSOVRDEN;
17915    input RXMCOMMAALIGNEN;
17916    input [1:0] RXMONITORSEL;
17917    input RXOOBRESET;
17918    input RXOSCALRESET;
17919    input RXOSHOLD;
17920    input RXOSOVRDEN;
17921    input [2:0] RXOUTCLKSEL;
17922    input RXPCOMMAALIGNEN;
17923    input RXPCSRESET;
17924    input [1:0] RXPD;
17925    input RXPHALIGN;
17926    input RXPHALIGNEN;
17927    input RXPHDLYPD;
17928    input RXPHDLYRESET;
17929    input [1:0] RXPLLCLKSEL;
17930    input RXPMARESET;
17931    input RXPOLARITY;
17932    input RXPRBSCNTRESET;
17933    input [3:0] RXPRBSSEL;
17934    input RXPROGDIVRESET;
17935    input [2:0] RXRATE;
17936    input RXRATEMODE;
17937    input RXSLIDE;
17938    input RXSLIPOUTCLK;
17939    input RXSLIPPMA;
17940    input RXSYNCALLIN;
17941    input RXSYNCIN;
17942    input RXSYNCMODE;
17943    input [1:0] RXSYSCLKSEL;
17944    input RXTERMINATION;
17945    input RXUSERRDY;
17946    input RXUSRCLK;
17947    input RXUSRCLK2;
17948    input SIGVALIDCLK;
17949    input [19:0] TSTIN;
17950    input [7:0] TX8B10BBYPASS;
17951    input TX8B10BEN;
17952    input TXCOMINIT;
17953    input TXCOMSAS;
17954    input TXCOMWAKE;
17955    input [15:0] TXCTRL0;
17956    input [15:0] TXCTRL1;
17957    input [7:0] TXCTRL2;
17958    input [127:0] TXDATA;
17959    input [7:0] TXDATAEXTENDRSVD;
17960    input TXDCCFORCESTART;
17961    input TXDCCRESET;
17962    input [1:0] TXDEEMPH;
17963    input TXDETECTRX;
17964    input [4:0] TXDIFFCTRL;
17965    input TXDLYBYPASS;
17966    input TXDLYEN;
17967    input TXDLYHOLD;
17968    input TXDLYOVRDEN;
17969    input TXDLYSRESET;
17970    input TXDLYUPDOWN;
17971    input TXELECIDLE;
17972    input [5:0] TXHEADER;
17973    input TXINHIBIT;
17974    input TXLATCLK;
17975    input TXLFPSTRESET;
17976    input TXLFPSU2LPEXIT;
17977    input TXLFPSU3WAKE;
17978    input [6:0] TXMAINCURSOR;
17979    input [2:0] TXMARGIN;
17980    input TXMUXDCDEXHOLD;
17981    input TXMUXDCDORWREN;
17982    input TXONESZEROS;
17983    input [2:0] TXOUTCLKSEL;
17984    input TXPCSRESET;
17985    input [1:0] TXPD;
17986    input TXPDELECIDLEMODE;
17987    input TXPHALIGN;
17988    input TXPHALIGNEN;
17989    input TXPHDLYPD;
17990    input TXPHDLYRESET;
17991    input TXPHDLYTSTCLK;
17992    input TXPHINIT;
17993    input TXPHOVRDEN;
17994    input TXPIPPMEN;
17995    input TXPIPPMOVRDEN;
17996    input TXPIPPMPD;
17997    input TXPIPPMSEL;
17998    input [4:0] TXPIPPMSTEPSIZE;
17999    input TXPISOPD;
18000    input [1:0] TXPLLCLKSEL;
18001    input TXPMARESET;
18002    input TXPOLARITY;
18003    input [4:0] TXPOSTCURSOR;
18004    input TXPRBSFORCEERR;
18005    input [3:0] TXPRBSSEL;
18006    input [4:0] TXPRECURSOR;
18007    input TXPROGDIVRESET;
18008    input [2:0] TXRATE;
18009    input TXRATEMODE;
18010    input [6:0] TXSEQUENCE;
18011    input TXSWING;
18012    input TXSYNCALLIN;
18013    input TXSYNCIN;
18014    input TXSYNCMODE;
18015    input [1:0] TXSYSCLKSEL;
18016    input TXUSERRDY;
18017    input TXUSRCLK;
18018    input TXUSRCLK2;
18019endmodule
18020
18021module GTYE4_COMMON (...);
18022    parameter [0:0] AEN_QPLL0_FBDIV = 1'b1;
18023    parameter [0:0] AEN_QPLL1_FBDIV = 1'b1;
18024    parameter [0:0] AEN_SDM0TOGGLE = 1'b0;
18025    parameter [0:0] AEN_SDM1TOGGLE = 1'b0;
18026    parameter [0:0] A_SDM0TOGGLE = 1'b0;
18027    parameter [8:0] A_SDM1DATA_HIGH = 9'b000000000;
18028    parameter [15:0] A_SDM1DATA_LOW = 16'b0000000000000000;
18029    parameter [0:0] A_SDM1TOGGLE = 1'b0;
18030    parameter [15:0] BIAS_CFG0 = 16'h0000;
18031    parameter [15:0] BIAS_CFG1 = 16'h0000;
18032    parameter [15:0] BIAS_CFG2 = 16'h0000;
18033    parameter [15:0] BIAS_CFG3 = 16'h0000;
18034    parameter [15:0] BIAS_CFG4 = 16'h0000;
18035    parameter [15:0] BIAS_CFG_RSVD = 16'h0000;
18036    parameter [15:0] COMMON_CFG0 = 16'h0000;
18037    parameter [15:0] COMMON_CFG1 = 16'h0000;
18038    parameter [15:0] POR_CFG = 16'h0000;
18039    parameter [15:0] PPF0_CFG = 16'h0F00;
18040    parameter [15:0] PPF1_CFG = 16'h0F00;
18041    parameter QPLL0CLKOUT_RATE = "FULL";
18042    parameter [15:0] QPLL0_CFG0 = 16'h391C;
18043    parameter [15:0] QPLL0_CFG1 = 16'h0000;
18044    parameter [15:0] QPLL0_CFG1_G3 = 16'h0020;
18045    parameter [15:0] QPLL0_CFG2 = 16'h0F80;
18046    parameter [15:0] QPLL0_CFG2_G3 = 16'h0F80;
18047    parameter [15:0] QPLL0_CFG3 = 16'h0120;
18048    parameter [15:0] QPLL0_CFG4 = 16'h0002;
18049    parameter [9:0] QPLL0_CP = 10'b0000011111;
18050    parameter [9:0] QPLL0_CP_G3 = 10'b0000011111;
18051    parameter integer QPLL0_FBDIV = 66;
18052    parameter integer QPLL0_FBDIV_G3 = 80;
18053    parameter [15:0] QPLL0_INIT_CFG0 = 16'h0000;
18054    parameter [7:0] QPLL0_INIT_CFG1 = 8'h00;
18055    parameter [15:0] QPLL0_LOCK_CFG = 16'h01E8;
18056    parameter [15:0] QPLL0_LOCK_CFG_G3 = 16'h21E8;
18057    parameter [9:0] QPLL0_LPF = 10'b1011111111;
18058    parameter [9:0] QPLL0_LPF_G3 = 10'b1111111111;
18059    parameter [0:0] QPLL0_PCI_EN = 1'b0;
18060    parameter [0:0] QPLL0_RATE_SW_USE_DRP = 1'b0;
18061    parameter integer QPLL0_REFCLK_DIV = 1;
18062    parameter [15:0] QPLL0_SDM_CFG0 = 16'h0040;
18063    parameter [15:0] QPLL0_SDM_CFG1 = 16'h0000;
18064    parameter [15:0] QPLL0_SDM_CFG2 = 16'h0000;
18065    parameter QPLL1CLKOUT_RATE = "FULL";
18066    parameter [15:0] QPLL1_CFG0 = 16'h691C;
18067    parameter [15:0] QPLL1_CFG1 = 16'h0020;
18068    parameter [15:0] QPLL1_CFG1_G3 = 16'h0020;
18069    parameter [15:0] QPLL1_CFG2 = 16'h0F80;
18070    parameter [15:0] QPLL1_CFG2_G3 = 16'h0F80;
18071    parameter [15:0] QPLL1_CFG3 = 16'h0120;
18072    parameter [15:0] QPLL1_CFG4 = 16'h0002;
18073    parameter [9:0] QPLL1_CP = 10'b0000011111;
18074    parameter [9:0] QPLL1_CP_G3 = 10'b0000011111;
18075    parameter integer QPLL1_FBDIV = 66;
18076    parameter integer QPLL1_FBDIV_G3 = 80;
18077    parameter [15:0] QPLL1_INIT_CFG0 = 16'h0000;
18078    parameter [7:0] QPLL1_INIT_CFG1 = 8'h00;
18079    parameter [15:0] QPLL1_LOCK_CFG = 16'h01E8;
18080    parameter [15:0] QPLL1_LOCK_CFG_G3 = 16'h21E8;
18081    parameter [9:0] QPLL1_LPF = 10'b1011111111;
18082    parameter [9:0] QPLL1_LPF_G3 = 10'b1111111111;
18083    parameter [0:0] QPLL1_PCI_EN = 1'b0;
18084    parameter [0:0] QPLL1_RATE_SW_USE_DRP = 1'b0;
18085    parameter integer QPLL1_REFCLK_DIV = 1;
18086    parameter [15:0] QPLL1_SDM_CFG0 = 16'h0000;
18087    parameter [15:0] QPLL1_SDM_CFG1 = 16'h0000;
18088    parameter [15:0] QPLL1_SDM_CFG2 = 16'h0000;
18089    parameter [15:0] RSVD_ATTR0 = 16'h0000;
18090    parameter [15:0] RSVD_ATTR1 = 16'h0000;
18091    parameter [15:0] RSVD_ATTR2 = 16'h0000;
18092    parameter [15:0] RSVD_ATTR3 = 16'h0000;
18093    parameter [1:0] RXRECCLKOUT0_SEL = 2'b00;
18094    parameter [1:0] RXRECCLKOUT1_SEL = 2'b00;
18095    parameter [0:0] SARC_ENB = 1'b0;
18096    parameter [0:0] SARC_SEL = 1'b0;
18097    parameter [15:0] SDM0INITSEED0_0 = 16'b0000000000000000;
18098    parameter [8:0] SDM0INITSEED0_1 = 9'b000000000;
18099    parameter [15:0] SDM1INITSEED0_0 = 16'b0000000000000000;
18100    parameter [8:0] SDM1INITSEED0_1 = 9'b000000000;
18101    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
18102    parameter SIM_MODE = "FAST";
18103    parameter SIM_RESET_SPEEDUP = "TRUE";
18104    parameter [15:0] UB_CFG0 = 16'h0000;
18105    parameter [15:0] UB_CFG1 = 16'h0000;
18106    parameter [15:0] UB_CFG2 = 16'h0000;
18107    parameter [15:0] UB_CFG3 = 16'h0000;
18108    parameter [15:0] UB_CFG4 = 16'h0000;
18109    parameter [15:0] UB_CFG5 = 16'h0400;
18110    parameter [15:0] UB_CFG6 = 16'h0000;
18111    output [15:0] DRPDO;
18112    output DRPRDY;
18113    output [7:0] PMARSVDOUT0;
18114    output [7:0] PMARSVDOUT1;
18115    output QPLL0FBCLKLOST;
18116    output QPLL0LOCK;
18117    output QPLL0OUTCLK;
18118    output QPLL0OUTREFCLK;
18119    output QPLL0REFCLKLOST;
18120    output QPLL1FBCLKLOST;
18121    output QPLL1LOCK;
18122    output QPLL1OUTCLK;
18123    output QPLL1OUTREFCLK;
18124    output QPLL1REFCLKLOST;
18125    output [7:0] QPLLDMONITOR0;
18126    output [7:0] QPLLDMONITOR1;
18127    output REFCLKOUTMONITOR0;
18128    output REFCLKOUTMONITOR1;
18129    output [1:0] RXRECCLK0SEL;
18130    output [1:0] RXRECCLK1SEL;
18131    output [3:0] SDM0FINALOUT;
18132    output [14:0] SDM0TESTDATA;
18133    output [3:0] SDM1FINALOUT;
18134    output [14:0] SDM1TESTDATA;
18135    output [15:0] UBDADDR;
18136    output UBDEN;
18137    output [15:0] UBDI;
18138    output UBDWE;
18139    output UBMDMTDO;
18140    output UBRSVDOUT;
18141    output UBTXUART;
18142    input BGBYPASSB;
18143    input BGMONITORENB;
18144    input BGPDB;
18145    input [4:0] BGRCALOVRD;
18146    input BGRCALOVRDENB;
18147    input [15:0] DRPADDR;
18148    input DRPCLK;
18149    input [15:0] DRPDI;
18150    input DRPEN;
18151    input DRPWE;
18152    input GTGREFCLK0;
18153    input GTGREFCLK1;
18154    input GTNORTHREFCLK00;
18155    input GTNORTHREFCLK01;
18156    input GTNORTHREFCLK10;
18157    input GTNORTHREFCLK11;
18158    input GTREFCLK00;
18159    input GTREFCLK01;
18160    input GTREFCLK10;
18161    input GTREFCLK11;
18162    input GTSOUTHREFCLK00;
18163    input GTSOUTHREFCLK01;
18164    input GTSOUTHREFCLK10;
18165    input GTSOUTHREFCLK11;
18166    input [2:0] PCIERATEQPLL0;
18167    input [2:0] PCIERATEQPLL1;
18168    input [7:0] PMARSVD0;
18169    input [7:0] PMARSVD1;
18170    input QPLL0CLKRSVD0;
18171    input QPLL0CLKRSVD1;
18172    input [7:0] QPLL0FBDIV;
18173    input QPLL0LOCKDETCLK;
18174    input QPLL0LOCKEN;
18175    input QPLL0PD;
18176    input [2:0] QPLL0REFCLKSEL;
18177    input QPLL0RESET;
18178    input QPLL1CLKRSVD0;
18179    input QPLL1CLKRSVD1;
18180    input [7:0] QPLL1FBDIV;
18181    input QPLL1LOCKDETCLK;
18182    input QPLL1LOCKEN;
18183    input QPLL1PD;
18184    input [2:0] QPLL1REFCLKSEL;
18185    input QPLL1RESET;
18186    input [7:0] QPLLRSVD1;
18187    input [4:0] QPLLRSVD2;
18188    input [4:0] QPLLRSVD3;
18189    input [7:0] QPLLRSVD4;
18190    input RCALENB;
18191    input [24:0] SDM0DATA;
18192    input SDM0RESET;
18193    input SDM0TOGGLE;
18194    input [1:0] SDM0WIDTH;
18195    input [24:0] SDM1DATA;
18196    input SDM1RESET;
18197    input SDM1TOGGLE;
18198    input [1:0] SDM1WIDTH;
18199    input UBCFGSTREAMEN;
18200    input [15:0] UBDO;
18201    input UBDRDY;
18202    input UBENABLE;
18203    input [1:0] UBGPI;
18204    input [1:0] UBINTR;
18205    input UBIOLMBRST;
18206    input UBMBRST;
18207    input UBMDMCAPTURE;
18208    input UBMDMDBGRST;
18209    input UBMDMDBGUPDATE;
18210    input [3:0] UBMDMREGEN;
18211    input UBMDMSHIFT;
18212    input UBMDMSYSRST;
18213    input UBMDMTCK;
18214    input UBMDMTDI;
18215endmodule
18216
18217module IBUFDS_GTE4 (...);
18218    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18219    parameter [1:0] REFCLK_HROW_CK_SEL = 2'b00;
18220    parameter [1:0] REFCLK_ICNTL_RX = 2'b00;
18221    output O;
18222    output ODIV2;
18223    input CEB;
18224    (* iopad_external_pin *)
18225    input I;
18226    (* iopad_external_pin *)
18227    input IB;
18228endmodule
18229
18230module OBUFDS_GTE4 (...);
18231    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18232    parameter [4:0] REFCLK_ICNTL_TX = 5'b00000;
18233    (* iopad_external_pin *)
18234    output O;
18235    (* iopad_external_pin *)
18236    output OB;
18237    input CEB;
18238    input I;
18239endmodule
18240
18241module OBUFDS_GTE4_ADV (...);
18242    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18243    parameter [4:0] REFCLK_ICNTL_TX = 5'b00000;
18244    (* iopad_external_pin *)
18245    output O;
18246    (* iopad_external_pin *)
18247    output OB;
18248    input CEB;
18249    input [3:0] I;
18250    input [1:0] RXRECCLK_SEL;
18251endmodule
18252
18253module GTM_DUAL (...);
18254    parameter [15:0] A_CFG = 16'b0000100001000000;
18255    parameter [15:0] A_SDM_DATA_CFG0 = 16'b0000000011010000;
18256    parameter [15:0] A_SDM_DATA_CFG1 = 16'b0000000011010000;
18257    parameter [15:0] BIAS_CFG0 = 16'b0000000000000000;
18258    parameter [15:0] BIAS_CFG1 = 16'b0000000000000000;
18259    parameter [15:0] BIAS_CFG2 = 16'b0001000000000000;
18260    parameter [15:0] BIAS_CFG3 = 16'b0000000000000001;
18261    parameter [15:0] BIAS_CFG4 = 16'b0000000000000000;
18262    parameter [15:0] BIAS_CFG5 = 16'b0000000000000000;
18263    parameter [15:0] BIAS_CFG6 = 16'b0000000010000000;
18264    parameter [15:0] BIAS_CFG7 = 16'b0000000000000000;
18265    parameter [15:0] CH0_A_CH_CFG0 = 16'b0000000000000011;
18266    parameter [15:0] CH0_A_CH_CFG1 = 16'b0000000000000000;
18267    parameter [15:0] CH0_A_CH_CFG2 = 16'b0111101111110000;
18268    parameter [15:0] CH0_A_CH_CFG3 = 16'b0000000000000000;
18269    parameter [15:0] CH0_A_CH_CFG4 = 16'b0000000000000000;
18270    parameter [15:0] CH0_A_CH_CFG5 = 16'b0000000000000000;
18271    parameter [15:0] CH0_A_CH_CFG6 = 16'b0000000000000000;
18272    parameter [15:0] CH0_RST_LP_CFG0 = 16'b0001000000010000;
18273    parameter [15:0] CH0_RST_LP_CFG1 = 16'b0011001000010000;
18274    parameter [15:0] CH0_RST_LP_CFG2 = 16'b0110010100000100;
18275    parameter [15:0] CH0_RST_LP_CFG3 = 16'b0011001000010000;
18276    parameter [15:0] CH0_RST_LP_CFG4 = 16'b0000000001000100;
18277    parameter [15:0] CH0_RST_LP_ID_CFG0 = 16'b0011000001110000;
18278    parameter [15:0] CH0_RST_LP_ID_CFG1 = 16'b0001000000010000;
18279    parameter [15:0] CH0_RST_TIME_CFG0 = 16'b0000010000100001;
18280    parameter [15:0] CH0_RST_TIME_CFG1 = 16'b0000010000100001;
18281    parameter [15:0] CH0_RST_TIME_CFG2 = 16'b0000010000100001;
18282    parameter [15:0] CH0_RST_TIME_CFG3 = 16'b0000010000100000;
18283    parameter [15:0] CH0_RST_TIME_CFG4 = 16'b0000010000100001;
18284    parameter [15:0] CH0_RST_TIME_CFG5 = 16'b0000000000000001;
18285    parameter [15:0] CH0_RST_TIME_CFG6 = 16'b0000000000100001;
18286    parameter [15:0] CH0_RX_ADC_CFG0 = 16'b0011010010001111;
18287    parameter [15:0] CH0_RX_ADC_CFG1 = 16'b0011111001010101;
18288    parameter [15:0] CH0_RX_ANA_CFG0 = 16'b1000000000011101;
18289    parameter [15:0] CH0_RX_ANA_CFG1 = 16'b1110100010000000;
18290    parameter [15:0] CH0_RX_ANA_CFG2 = 16'b0000000010001010;
18291    parameter [15:0] CH0_RX_APT_CFG0A = 16'b0000000001110000;
18292    parameter [15:0] CH0_RX_APT_CFG0B = 16'b0000000001110000;
18293    parameter [15:0] CH0_RX_APT_CFG10A = 16'b0000000001110000;
18294    parameter [15:0] CH0_RX_APT_CFG10B = 16'b0000000001010000;
18295    parameter [15:0] CH0_RX_APT_CFG11A = 16'b0000000001000000;
18296    parameter [15:0] CH0_RX_APT_CFG11B = 16'b0000000001110000;
18297    parameter [15:0] CH0_RX_APT_CFG12A = 16'b0000000001010000;
18298    parameter [15:0] CH0_RX_APT_CFG12B = 16'b0000000000000000;
18299    parameter [15:0] CH0_RX_APT_CFG13A = 16'b0000000000000000;
18300    parameter [15:0] CH0_RX_APT_CFG13B = 16'b0000000000000000;
18301    parameter [15:0] CH0_RX_APT_CFG14A = 16'b0000000000000000;
18302    parameter [15:0] CH0_RX_APT_CFG14B = 16'b0000000000000000;
18303    parameter [15:0] CH0_RX_APT_CFG15A = 16'b0000000000000000;
18304    parameter [15:0] CH0_RX_APT_CFG15B = 16'b0000100000000000;
18305    parameter [15:0] CH0_RX_APT_CFG16A = 16'b0000000000000000;
18306    parameter [15:0] CH0_RX_APT_CFG16B = 16'b0010000000000000;
18307    parameter [15:0] CH0_RX_APT_CFG17A = 16'b0000000000000000;
18308    parameter [15:0] CH0_RX_APT_CFG17B = 16'b0001000001000000;
18309    parameter [15:0] CH0_RX_APT_CFG18A = 16'b0000100000100000;
18310    parameter [15:0] CH0_RX_APT_CFG18B = 16'b0000000000000000;
18311    parameter [15:0] CH0_RX_APT_CFG19A = 16'b0000000000000000;
18312    parameter [15:0] CH0_RX_APT_CFG19B = 16'b0000100000000000;
18313    parameter [15:0] CH0_RX_APT_CFG1A = 16'b0000000001110000;
18314    parameter [15:0] CH0_RX_APT_CFG1B = 16'b0000000001110000;
18315    parameter [15:0] CH0_RX_APT_CFG20A = 16'b1110000000100000;
18316    parameter [15:0] CH0_RX_APT_CFG20B = 16'b0000000001000000;
18317    parameter [15:0] CH0_RX_APT_CFG21A = 16'b0001000000000100;
18318    parameter [15:0] CH0_RX_APT_CFG21B = 16'b0000000000000000;
18319    parameter [15:0] CH0_RX_APT_CFG22A = 16'b0000000001110000;
18320    parameter [15:0] CH0_RX_APT_CFG22B = 16'b0000000001110000;
18321    parameter [15:0] CH0_RX_APT_CFG23A = 16'b0000100000000000;
18322    parameter [15:0] CH0_RX_APT_CFG23B = 16'b0000000000000000;
18323    parameter [15:0] CH0_RX_APT_CFG24A = 16'b0000000000000000;
18324    parameter [15:0] CH0_RX_APT_CFG24B = 16'b0000000000000000;
18325    parameter [15:0] CH0_RX_APT_CFG25A = 16'b0000000000000000;
18326    parameter [15:0] CH0_RX_APT_CFG25B = 16'b0000000000000000;
18327    parameter [15:0] CH0_RX_APT_CFG26A = 16'b0000000000000000;
18328    parameter [15:0] CH0_RX_APT_CFG26B = 16'b0000000000000000;
18329    parameter [15:0] CH0_RX_APT_CFG27A = 16'b0100000000000000;
18330    parameter [15:0] CH0_RX_APT_CFG27B = 16'b0000000000000000;
18331    parameter [15:0] CH0_RX_APT_CFG28A = 16'b0000000000000000;
18332    parameter [15:0] CH0_RX_APT_CFG28B = 16'b1000000000000000;
18333    parameter [15:0] CH0_RX_APT_CFG2A = 16'b0000000001110000;
18334    parameter [15:0] CH0_RX_APT_CFG2B = 16'b0000000001110000;
18335    parameter [15:0] CH0_RX_APT_CFG3A = 16'b0000000001110000;
18336    parameter [15:0] CH0_RX_APT_CFG3B = 16'b0000000001110000;
18337    parameter [15:0] CH0_RX_APT_CFG4A = 16'b0000000001110000;
18338    parameter [15:0] CH0_RX_APT_CFG4B = 16'b0000000001110000;
18339    parameter [15:0] CH0_RX_APT_CFG5A = 16'b0000000001110000;
18340    parameter [15:0] CH0_RX_APT_CFG5B = 16'b0000000001110000;
18341    parameter [15:0] CH0_RX_APT_CFG6A = 16'b0000000001110000;
18342    parameter [15:0] CH0_RX_APT_CFG6B = 16'b0000000001110000;
18343    parameter [15:0] CH0_RX_APT_CFG7A = 16'b0000000001110000;
18344    parameter [15:0] CH0_RX_APT_CFG7B = 16'b0000000001110000;
18345    parameter [15:0] CH0_RX_APT_CFG8A = 16'b0000100000000000;
18346    parameter [15:0] CH0_RX_APT_CFG8B = 16'b0000100000000000;
18347    parameter [15:0] CH0_RX_APT_CFG9A = 16'b0000000001110000;
18348    parameter [15:0] CH0_RX_APT_CFG9B = 16'b0000000001110000;
18349    parameter [15:0] CH0_RX_APT_CTRL_CFG2 = 16'b0000000000000100;
18350    parameter [15:0] CH0_RX_APT_CTRL_CFG3 = 16'b0000000000000000;
18351    parameter [15:0] CH0_RX_CAL_CFG0A = 16'b0000000000000000;
18352    parameter [15:0] CH0_RX_CAL_CFG0B = 16'b0011001100110000;
18353    parameter [15:0] CH0_RX_CAL_CFG1A = 16'b1110111011100001;
18354    parameter [15:0] CH0_RX_CAL_CFG1B = 16'b1111111100000100;
18355    parameter [15:0] CH0_RX_CAL_CFG2A = 16'b0000000000000000;
18356    parameter [15:0] CH0_RX_CAL_CFG2B = 16'b0011000000000000;
18357    parameter [15:0] CH0_RX_CDR_CFG0A = 16'b0000000000000011;
18358    parameter [15:0] CH0_RX_CDR_CFG0B = 16'b0000000000000000;
18359    parameter [15:0] CH0_RX_CDR_CFG1A = 16'b0000000000000000;
18360    parameter [15:0] CH0_RX_CDR_CFG1B = 16'b0000000000000000;
18361    parameter [15:0] CH0_RX_CDR_CFG2A = 16'b1001000101100100;
18362    parameter [15:0] CH0_RX_CDR_CFG2B = 16'b0000000100100100;
18363    parameter [15:0] CH0_RX_CDR_CFG3A = 16'b0101110011110110;
18364    parameter [15:0] CH0_RX_CDR_CFG3B = 16'b0000000000001011;
18365    parameter [15:0] CH0_RX_CDR_CFG4A = 16'b0000000000000110;
18366    parameter [15:0] CH0_RX_CDR_CFG4B = 16'b0000000000000000;
18367    parameter [15:0] CH0_RX_CLKGN_CFG0 = 16'b1100000000000000;
18368    parameter [15:0] CH0_RX_CLKGN_CFG1 = 16'b0000000110000000;
18369    parameter [15:0] CH0_RX_CTLE_CFG0 = 16'b0011010010001000;
18370    parameter [15:0] CH0_RX_CTLE_CFG1 = 16'b0010000000100010;
18371    parameter [15:0] CH0_RX_CTLE_CFG2 = 16'b0000101000000000;
18372    parameter [15:0] CH0_RX_CTLE_CFG3 = 16'b1111001001000000;
18373    parameter [15:0] CH0_RX_DSP_CFG = 16'b0000000000000000;
18374    parameter [15:0] CH0_RX_MON_CFG = 16'b0000000000000000;
18375    parameter [15:0] CH0_RX_PAD_CFG0 = 16'b0001111000000000;
18376    parameter [15:0] CH0_RX_PAD_CFG1 = 16'b0001100000001010;
18377    parameter [15:0] CH0_RX_PCS_CFG0 = 16'b0000000100000000;
18378    parameter [15:0] CH0_RX_PCS_CFG1 = 16'b0000000000000000;
18379    parameter [15:0] CH0_TX_ANA_CFG0 = 16'b0000001010101111;
18380    parameter [15:0] CH0_TX_ANA_CFG1 = 16'b0000000100000000;
18381    parameter [15:0] CH0_TX_ANA_CFG2 = 16'b1000000000010100;
18382    parameter [15:0] CH0_TX_ANA_CFG3 = 16'b0000101000100010;
18383    parameter [15:0] CH0_TX_ANA_CFG4 = 16'b0000000000000000;
18384    parameter [15:0] CH0_TX_CAL_CFG0 = 16'b0000000000100000;
18385    parameter [15:0] CH0_TX_CAL_CFG1 = 16'b0000000001000000;
18386    parameter [15:0] CH0_TX_DRV_CFG0 = 16'b0000000000000000;
18387    parameter [15:0] CH0_TX_DRV_CFG1 = 16'b0000000000100111;
18388    parameter [15:0] CH0_TX_DRV_CFG2 = 16'b0000000000000000;
18389    parameter [15:0] CH0_TX_DRV_CFG3 = 16'b0110110000000000;
18390    parameter [15:0] CH0_TX_DRV_CFG4 = 16'b0000000011000101;
18391    parameter [15:0] CH0_TX_DRV_CFG5 = 16'b0000000000000000;
18392    parameter [15:0] CH0_TX_LPBK_CFG0 = 16'b0000000000000011;
18393    parameter [15:0] CH0_TX_LPBK_CFG1 = 16'b0000000000000000;
18394    parameter [15:0] CH0_TX_PCS_CFG0 = 16'b0000000101100000;
18395    parameter [15:0] CH0_TX_PCS_CFG1 = 16'b0000000000000000;
18396    parameter [15:0] CH0_TX_PCS_CFG10 = 16'b0000000000000000;
18397    parameter [15:0] CH0_TX_PCS_CFG11 = 16'b0000000000000000;
18398    parameter [15:0] CH0_TX_PCS_CFG12 = 16'b0000000000000000;
18399    parameter [15:0] CH0_TX_PCS_CFG13 = 16'b0000000000000000;
18400    parameter [15:0] CH0_TX_PCS_CFG14 = 16'b0000000000000000;
18401    parameter [15:0] CH0_TX_PCS_CFG15 = 16'b0000000000000000;
18402    parameter [15:0] CH0_TX_PCS_CFG16 = 16'b0000000000000000;
18403    parameter [15:0] CH0_TX_PCS_CFG17 = 16'b0000000000000000;
18404    parameter [15:0] CH0_TX_PCS_CFG2 = 16'b0000000000000000;
18405    parameter [15:0] CH0_TX_PCS_CFG3 = 16'b0000000000000000;
18406    parameter [15:0] CH0_TX_PCS_CFG4 = 16'b0000000000000000;
18407    parameter [15:0] CH0_TX_PCS_CFG5 = 16'b0000000000000000;
18408    parameter [15:0] CH0_TX_PCS_CFG6 = 16'b0000000000000000;
18409    parameter [15:0] CH0_TX_PCS_CFG7 = 16'b0000000000000000;
18410    parameter [15:0] CH0_TX_PCS_CFG8 = 16'b0000000000000000;
18411    parameter [15:0] CH0_TX_PCS_CFG9 = 16'b0000000000000000;
18412    parameter [15:0] CH1_A_CH_CFG0 = 16'b0000000000000011;
18413    parameter [15:0] CH1_A_CH_CFG1 = 16'b0000000000000000;
18414    parameter [15:0] CH1_A_CH_CFG2 = 16'b0111101111110000;
18415    parameter [15:0] CH1_A_CH_CFG3 = 16'b0000000000000000;
18416    parameter [15:0] CH1_A_CH_CFG4 = 16'b0000000000000000;
18417    parameter [15:0] CH1_A_CH_CFG5 = 16'b0000000000000000;
18418    parameter [15:0] CH1_A_CH_CFG6 = 16'b0000000000000000;
18419    parameter [15:0] CH1_RST_LP_CFG0 = 16'b0001000000010000;
18420    parameter [15:0] CH1_RST_LP_CFG1 = 16'b0011001000010000;
18421    parameter [15:0] CH1_RST_LP_CFG2 = 16'b0110010100000100;
18422    parameter [15:0] CH1_RST_LP_CFG3 = 16'b0011001000010000;
18423    parameter [15:0] CH1_RST_LP_CFG4 = 16'b0000000001000100;
18424    parameter [15:0] CH1_RST_LP_ID_CFG0 = 16'b0011000001110000;
18425    parameter [15:0] CH1_RST_LP_ID_CFG1 = 16'b0001000000010000;
18426    parameter [15:0] CH1_RST_TIME_CFG0 = 16'b0000010000100001;
18427    parameter [15:0] CH1_RST_TIME_CFG1 = 16'b0000010000100001;
18428    parameter [15:0] CH1_RST_TIME_CFG2 = 16'b0000010000100001;
18429    parameter [15:0] CH1_RST_TIME_CFG3 = 16'b0000010000100000;
18430    parameter [15:0] CH1_RST_TIME_CFG4 = 16'b0000010000100001;
18431    parameter [15:0] CH1_RST_TIME_CFG5 = 16'b0000000000000001;
18432    parameter [15:0] CH1_RST_TIME_CFG6 = 16'b0000000000100001;
18433    parameter [15:0] CH1_RX_ADC_CFG0 = 16'b0011010010001111;
18434    parameter [15:0] CH1_RX_ADC_CFG1 = 16'b0011111001010101;
18435    parameter [15:0] CH1_RX_ANA_CFG0 = 16'b1000000000011101;
18436    parameter [15:0] CH1_RX_ANA_CFG1 = 16'b1110100010000000;
18437    parameter [15:0] CH1_RX_ANA_CFG2 = 16'b0000000010001010;
18438    parameter [15:0] CH1_RX_APT_CFG0A = 16'b0000000001110000;
18439    parameter [15:0] CH1_RX_APT_CFG0B = 16'b0000000001110000;
18440    parameter [15:0] CH1_RX_APT_CFG10A = 16'b0000000001110000;
18441    parameter [15:0] CH1_RX_APT_CFG10B = 16'b0000000001010000;
18442    parameter [15:0] CH1_RX_APT_CFG11A = 16'b0000000001000000;
18443    parameter [15:0] CH1_RX_APT_CFG11B = 16'b0000000001110000;
18444    parameter [15:0] CH1_RX_APT_CFG12A = 16'b0000000001010000;
18445    parameter [15:0] CH1_RX_APT_CFG12B = 16'b0000000000000000;
18446    parameter [15:0] CH1_RX_APT_CFG13A = 16'b0000000000000000;
18447    parameter [15:0] CH1_RX_APT_CFG13B = 16'b0000000000000000;
18448    parameter [15:0] CH1_RX_APT_CFG14A = 16'b0000000000000000;
18449    parameter [15:0] CH1_RX_APT_CFG14B = 16'b0000000000000000;
18450    parameter [15:0] CH1_RX_APT_CFG15A = 16'b0000000000000000;
18451    parameter [15:0] CH1_RX_APT_CFG15B = 16'b0000100000000000;
18452    parameter [15:0] CH1_RX_APT_CFG16A = 16'b0000000000000000;
18453    parameter [15:0] CH1_RX_APT_CFG16B = 16'b0010000000000000;
18454    parameter [15:0] CH1_RX_APT_CFG17A = 16'b0000000000000000;
18455    parameter [15:0] CH1_RX_APT_CFG17B = 16'b0001000001000000;
18456    parameter [15:0] CH1_RX_APT_CFG18A = 16'b0000100000100000;
18457    parameter [15:0] CH1_RX_APT_CFG18B = 16'b0000100010000000;
18458    parameter [15:0] CH1_RX_APT_CFG19A = 16'b0000000000000000;
18459    parameter [15:0] CH1_RX_APT_CFG19B = 16'b0000100000000000;
18460    parameter [15:0] CH1_RX_APT_CFG1A = 16'b0000000001110000;
18461    parameter [15:0] CH1_RX_APT_CFG1B = 16'b0000000001110000;
18462    parameter [15:0] CH1_RX_APT_CFG20A = 16'b1110000000100000;
18463    parameter [15:0] CH1_RX_APT_CFG20B = 16'b0000000001000000;
18464    parameter [15:0] CH1_RX_APT_CFG21A = 16'b0001000000000100;
18465    parameter [15:0] CH1_RX_APT_CFG21B = 16'b0000000000000000;
18466    parameter [15:0] CH1_RX_APT_CFG22A = 16'b0000000001110000;
18467    parameter [15:0] CH1_RX_APT_CFG22B = 16'b0000000001110000;
18468    parameter [15:0] CH1_RX_APT_CFG23A = 16'b0000100000000000;
18469    parameter [15:0] CH1_RX_APT_CFG23B = 16'b0000100000000000;
18470    parameter [15:0] CH1_RX_APT_CFG24A = 16'b0000000000000000;
18471    parameter [15:0] CH1_RX_APT_CFG24B = 16'b0000000000000000;
18472    parameter [15:0] CH1_RX_APT_CFG25A = 16'b0000000000000000;
18473    parameter [15:0] CH1_RX_APT_CFG25B = 16'b0000000000000000;
18474    parameter [15:0] CH1_RX_APT_CFG26A = 16'b0000000000000000;
18475    parameter [15:0] CH1_RX_APT_CFG26B = 16'b0000000000000000;
18476    parameter [15:0] CH1_RX_APT_CFG27A = 16'b0100000000000000;
18477    parameter [15:0] CH1_RX_APT_CFG27B = 16'b0000000000000000;
18478    parameter [15:0] CH1_RX_APT_CFG28A = 16'b0000000000000000;
18479    parameter [15:0] CH1_RX_APT_CFG28B = 16'b1000000000000000;
18480    parameter [15:0] CH1_RX_APT_CFG2A = 16'b0000000001110000;
18481    parameter [15:0] CH1_RX_APT_CFG2B = 16'b0000000001110000;
18482    parameter [15:0] CH1_RX_APT_CFG3A = 16'b0000000001110000;
18483    parameter [15:0] CH1_RX_APT_CFG3B = 16'b0000000001110000;
18484    parameter [15:0] CH1_RX_APT_CFG4A = 16'b0000000001110000;
18485    parameter [15:0] CH1_RX_APT_CFG4B = 16'b0000000001110000;
18486    parameter [15:0] CH1_RX_APT_CFG5A = 16'b0000000001110000;
18487    parameter [15:0] CH1_RX_APT_CFG5B = 16'b0000000001110000;
18488    parameter [15:0] CH1_RX_APT_CFG6A = 16'b0000000001110000;
18489    parameter [15:0] CH1_RX_APT_CFG6B = 16'b0000000001110000;
18490    parameter [15:0] CH1_RX_APT_CFG7A = 16'b0000000001110000;
18491    parameter [15:0] CH1_RX_APT_CFG7B = 16'b0000000001110000;
18492    parameter [15:0] CH1_RX_APT_CFG8A = 16'b0000100000000000;
18493    parameter [15:0] CH1_RX_APT_CFG8B = 16'b0000100000000000;
18494    parameter [15:0] CH1_RX_APT_CFG9A = 16'b0000000001110000;
18495    parameter [15:0] CH1_RX_APT_CFG9B = 16'b0000000001110000;
18496    parameter [15:0] CH1_RX_APT_CTRL_CFG2 = 16'b0000000000000100;
18497    parameter [15:0] CH1_RX_APT_CTRL_CFG3 = 16'b0000000000000000;
18498    parameter [15:0] CH1_RX_CAL_CFG0A = 16'b0000000000000000;
18499    parameter [15:0] CH1_RX_CAL_CFG0B = 16'b0011001100110000;
18500    parameter [15:0] CH1_RX_CAL_CFG1A = 16'b1110111011100001;
18501    parameter [15:0] CH1_RX_CAL_CFG1B = 16'b1111111100000100;
18502    parameter [15:0] CH1_RX_CAL_CFG2A = 16'b0000000000000000;
18503    parameter [15:0] CH1_RX_CAL_CFG2B = 16'b0011000000000000;
18504    parameter [15:0] CH1_RX_CDR_CFG0A = 16'b0000000000000011;
18505    parameter [15:0] CH1_RX_CDR_CFG0B = 16'b0000000000000000;
18506    parameter [15:0] CH1_RX_CDR_CFG1A = 16'b0000000000000000;
18507    parameter [15:0] CH1_RX_CDR_CFG1B = 16'b0000000000000000;
18508    parameter [15:0] CH1_RX_CDR_CFG2A = 16'b1001000101100100;
18509    parameter [15:0] CH1_RX_CDR_CFG2B = 16'b0000000100100100;
18510    parameter [15:0] CH1_RX_CDR_CFG3A = 16'b0101110011110110;
18511    parameter [15:0] CH1_RX_CDR_CFG3B = 16'b0000000000001011;
18512    parameter [15:0] CH1_RX_CDR_CFG4A = 16'b0000000000000110;
18513    parameter [15:0] CH1_RX_CDR_CFG4B = 16'b0000000000000000;
18514    parameter [15:0] CH1_RX_CLKGN_CFG0 = 16'b1100000000000000;
18515    parameter [15:0] CH1_RX_CLKGN_CFG1 = 16'b0000000110000000;
18516    parameter [15:0] CH1_RX_CTLE_CFG0 = 16'b0011010010001000;
18517    parameter [15:0] CH1_RX_CTLE_CFG1 = 16'b0010000000100010;
18518    parameter [15:0] CH1_RX_CTLE_CFG2 = 16'b0000101000000000;
18519    parameter [15:0] CH1_RX_CTLE_CFG3 = 16'b1111001001000000;
18520    parameter [15:0] CH1_RX_DSP_CFG = 16'b0000000000000000;
18521    parameter [15:0] CH1_RX_MON_CFG = 16'b0000000000000000;
18522    parameter [15:0] CH1_RX_PAD_CFG0 = 16'b0001111000000000;
18523    parameter [15:0] CH1_RX_PAD_CFG1 = 16'b0001100000001010;
18524    parameter [15:0] CH1_RX_PCS_CFG0 = 16'b0000000100000000;
18525    parameter [15:0] CH1_RX_PCS_CFG1 = 16'b0000000000000000;
18526    parameter [15:0] CH1_TX_ANA_CFG0 = 16'b0000001010101111;
18527    parameter [15:0] CH1_TX_ANA_CFG1 = 16'b0000000100000000;
18528    parameter [15:0] CH1_TX_ANA_CFG2 = 16'b1000000000010100;
18529    parameter [15:0] CH1_TX_ANA_CFG3 = 16'b0000101000100010;
18530    parameter [15:0] CH1_TX_ANA_CFG4 = 16'b0000000000000000;
18531    parameter [15:0] CH1_TX_CAL_CFG0 = 16'b0000000000100000;
18532    parameter [15:0] CH1_TX_CAL_CFG1 = 16'b0000000001000000;
18533    parameter [15:0] CH1_TX_DRV_CFG0 = 16'b0000000000000000;
18534    parameter [15:0] CH1_TX_DRV_CFG1 = 16'b0000000000100111;
18535    parameter [15:0] CH1_TX_DRV_CFG2 = 16'b0000000000000000;
18536    parameter [15:0] CH1_TX_DRV_CFG3 = 16'b0110110000000000;
18537    parameter [15:0] CH1_TX_DRV_CFG4 = 16'b0000000011000101;
18538    parameter [15:0] CH1_TX_DRV_CFG5 = 16'b0000000000000000;
18539    parameter [15:0] CH1_TX_LPBK_CFG0 = 16'b0000000000000011;
18540    parameter [15:0] CH1_TX_LPBK_CFG1 = 16'b0000000000000000;
18541    parameter [15:0] CH1_TX_PCS_CFG0 = 16'b0000000101100000;
18542    parameter [15:0] CH1_TX_PCS_CFG1 = 16'b0000000000000000;
18543    parameter [15:0] CH1_TX_PCS_CFG10 = 16'b0000000000000000;
18544    parameter [15:0] CH1_TX_PCS_CFG11 = 16'b0000000000000000;
18545    parameter [15:0] CH1_TX_PCS_CFG12 = 16'b0000000000000000;
18546    parameter [15:0] CH1_TX_PCS_CFG13 = 16'b0000000000000000;
18547    parameter [15:0] CH1_TX_PCS_CFG14 = 16'b0000000000000000;
18548    parameter [15:0] CH1_TX_PCS_CFG15 = 16'b0000000000000000;
18549    parameter [15:0] CH1_TX_PCS_CFG16 = 16'b0000000000000000;
18550    parameter [15:0] CH1_TX_PCS_CFG17 = 16'b0000000000000000;
18551    parameter [15:0] CH1_TX_PCS_CFG2 = 16'b0000000000000000;
18552    parameter [15:0] CH1_TX_PCS_CFG3 = 16'b0000000000000000;
18553    parameter [15:0] CH1_TX_PCS_CFG4 = 16'b0000000000000000;
18554    parameter [15:0] CH1_TX_PCS_CFG5 = 16'b0000000000000000;
18555    parameter [15:0] CH1_TX_PCS_CFG6 = 16'b0000000000000000;
18556    parameter [15:0] CH1_TX_PCS_CFG7 = 16'b0000000000000000;
18557    parameter [15:0] CH1_TX_PCS_CFG8 = 16'b0000000000000000;
18558    parameter [15:0] CH1_TX_PCS_CFG9 = 16'b0000000000000000;
18559    parameter real DATARATE = 10.000;
18560    parameter [15:0] DRPEN_CFG = 16'b0000000000000000;
18561    parameter [15:0] FEC_CFG0 = 16'b0000000000000000;
18562    parameter [15:0] FEC_CFG1 = 16'b0000000000000000;
18563    parameter [15:0] FEC_CFG10 = 16'b0000000000000000;
18564    parameter [15:0] FEC_CFG11 = 16'b0000000000000000;
18565    parameter [15:0] FEC_CFG12 = 16'b0000000000000000;
18566    parameter [15:0] FEC_CFG13 = 16'b0000000000000000;
18567    parameter [15:0] FEC_CFG14 = 16'b0000000000000000;
18568    parameter [15:0] FEC_CFG15 = 16'b0000000000000000;
18569    parameter [15:0] FEC_CFG16 = 16'b0000000000000000;
18570    parameter [15:0] FEC_CFG17 = 16'b0000000000000000;
18571    parameter [15:0] FEC_CFG18 = 16'b0000000000000000;
18572    parameter [15:0] FEC_CFG19 = 16'b0000000000000000;
18573    parameter [15:0] FEC_CFG2 = 16'b0000000000000000;
18574    parameter [15:0] FEC_CFG20 = 16'b0000000000000000;
18575    parameter [15:0] FEC_CFG21 = 16'b0000000000000000;
18576    parameter [15:0] FEC_CFG22 = 16'b0000000000000000;
18577    parameter [15:0] FEC_CFG23 = 16'b0000000000000000;
18578    parameter [15:0] FEC_CFG24 = 16'b0000000000000000;
18579    parameter [15:0] FEC_CFG25 = 16'b0000000000000000;
18580    parameter [15:0] FEC_CFG26 = 16'b0000000000000000;
18581    parameter [15:0] FEC_CFG27 = 16'b0000000000000000;
18582    parameter [15:0] FEC_CFG3 = 16'b0000000000000000;
18583    parameter [15:0] FEC_CFG4 = 16'b0000000000000000;
18584    parameter [15:0] FEC_CFG5 = 16'b0000000000000000;
18585    parameter [15:0] FEC_CFG6 = 16'b0000000000000000;
18586    parameter [15:0] FEC_CFG7 = 16'b0000000000000000;
18587    parameter [15:0] FEC_CFG8 = 16'b0000000000000000;
18588    parameter [15:0] FEC_CFG9 = 16'b0000000000000000;
18589    parameter FEC_MODE = "BYPASS";
18590    parameter real INS_LOSS_NYQ = 20.000;
18591    parameter integer INTERFACE_WIDTH = 64;
18592    parameter MODULATION_MODE = "NRZ";
18593    parameter [15:0] PLL_CFG0 = 16'b0001100111110000;
18594    parameter [15:0] PLL_CFG1 = 16'b0000111101110000;
18595    parameter [15:0] PLL_CFG2 = 16'b1000000111101000;
18596    parameter [15:0] PLL_CFG3 = 16'b0100000000000000;
18597    parameter [15:0] PLL_CFG4 = 16'b0111111111101010;
18598    parameter [15:0] PLL_CFG5 = 16'b0100101100111000;
18599    parameter [15:0] PLL_CFG6 = 16'b0000000000100101;
18600    parameter [15:0] PLL_CRS_CTRL_CFG0 = 16'b0000101100100000;
18601    parameter [15:0] PLL_CRS_CTRL_CFG1 = 16'b1100010111010100;
18602    parameter [0:0] PLL_IPS_PIN_EN = 1'b1;
18603    parameter integer PLL_IPS_REFCLK_SEL = 0;
18604    parameter [0:0] RCALSAP_TESTEN = 1'b0;
18605    parameter [0:0] RCAL_APROBE = 1'b0;
18606    parameter [15:0] RST_CFG = 16'b0000000000000010;
18607    parameter [15:0] RST_PLL_CFG0 = 16'b0111011000010100;
18608    parameter [15:0] SAP_CFG0 = 16'b0000000000000000;
18609    parameter [15:0] SDM_CFG0 = 16'b0001100001000000;
18610    parameter [15:0] SDM_CFG1 = 16'b0000000000000000;
18611    parameter [15:0] SDM_CFG2 = 16'b0000000000000000;
18612    parameter [15:0] SDM_SEED_CFG0 = 16'b0000000000000000;
18613    parameter [15:0] SDM_SEED_CFG1 = 16'b0000000000000000;
18614    parameter SIM_DEVICE = "ULTRASCALE_PLUS_ES1";
18615    parameter SIM_RESET_SPEEDUP = "TRUE";
18616    parameter integer TX_AMPLITUDE_SWING = 250;
18617    output [27:0] CH0_AXISTDATA;
18618    output CH0_AXISTLAST;
18619    output CH0_AXISTVALID;
18620    output [31:0] CH0_DMONITOROUT;
18621    output CH0_DMONITOROUTCLK;
18622    output CH0_GTMTXN;
18623    output CH0_GTMTXP;
18624    output [15:0] CH0_PCSRSVDOUT;
18625    output [15:0] CH0_PMARSVDOUT;
18626    output CH0_RESETEXCEPTION;
18627    output [2:0] CH0_RXBUFSTATUS;
18628    output [255:0] CH0_RXDATA;
18629    output [3:0] CH0_RXDATAFLAGS;
18630    output CH0_RXDATAISAM;
18631    output CH0_RXDATASTART;
18632    output CH0_RXOUTCLK;
18633    output CH0_RXPMARESETDONE;
18634    output CH0_RXPRBSERR;
18635    output CH0_RXPRBSLOCKED;
18636    output CH0_RXPRGDIVRESETDONE;
18637    output CH0_RXPROGDIVCLK;
18638    output CH0_RXRESETDONE;
18639    output [1:0] CH0_TXBUFSTATUS;
18640    output CH0_TXOUTCLK;
18641    output CH0_TXPMARESETDONE;
18642    output CH0_TXPRGDIVRESETDONE;
18643    output CH0_TXPROGDIVCLK;
18644    output CH0_TXRESETDONE;
18645    output [27:0] CH1_AXISTDATA;
18646    output CH1_AXISTLAST;
18647    output CH1_AXISTVALID;
18648    output [31:0] CH1_DMONITOROUT;
18649    output CH1_DMONITOROUTCLK;
18650    output CH1_GTMTXN;
18651    output CH1_GTMTXP;
18652    output [15:0] CH1_PCSRSVDOUT;
18653    output [15:0] CH1_PMARSVDOUT;
18654    output CH1_RESETEXCEPTION;
18655    output [2:0] CH1_RXBUFSTATUS;
18656    output [255:0] CH1_RXDATA;
18657    output [3:0] CH1_RXDATAFLAGS;
18658    output CH1_RXDATAISAM;
18659    output CH1_RXDATASTART;
18660    output CH1_RXOUTCLK;
18661    output CH1_RXPMARESETDONE;
18662    output CH1_RXPRBSERR;
18663    output CH1_RXPRBSLOCKED;
18664    output CH1_RXPRGDIVRESETDONE;
18665    output CH1_RXPROGDIVCLK;
18666    output CH1_RXRESETDONE;
18667    output [1:0] CH1_TXBUFSTATUS;
18668    output CH1_TXOUTCLK;
18669    output CH1_TXPMARESETDONE;
18670    output CH1_TXPRGDIVRESETDONE;
18671    output CH1_TXPROGDIVCLK;
18672    output CH1_TXRESETDONE;
18673    output CLKTESTSIG2PAD;
18674    output DMONITOROUTPLLCLK;
18675    output [15:0] DRPDO;
18676    output DRPRDY;
18677    output FECRX0ALIGNED;
18678    output FECRX0CORRCWINC;
18679    output FECRX0CWINC;
18680    output FECRX0UNCORRCWINC;
18681    output FECRX1ALIGNED;
18682    output FECRX1CORRCWINC;
18683    output FECRX1CWINC;
18684    output FECRX1UNCORRCWINC;
18685    output [7:0] FECRXLN0BITERR0TO1INC;
18686    output [7:0] FECRXLN0BITERR1TO0INC;
18687    output [14:0] FECRXLN0DLY;
18688    output [3:0] FECRXLN0ERRCNTINC;
18689    output [1:0] FECRXLN0MAPPING;
18690    output [7:0] FECRXLN1BITERR0TO1INC;
18691    output [7:0] FECRXLN1BITERR1TO0INC;
18692    output [14:0] FECRXLN1DLY;
18693    output [3:0] FECRXLN1ERRCNTINC;
18694    output [1:0] FECRXLN1MAPPING;
18695    output [7:0] FECRXLN2BITERR0TO1INC;
18696    output [7:0] FECRXLN2BITERR1TO0INC;
18697    output [14:0] FECRXLN2DLY;
18698    output [3:0] FECRXLN2ERRCNTINC;
18699    output [1:0] FECRXLN2MAPPING;
18700    output [7:0] FECRXLN3BITERR0TO1INC;
18701    output [7:0] FECRXLN3BITERR1TO0INC;
18702    output [14:0] FECRXLN3DLY;
18703    output [3:0] FECRXLN3ERRCNTINC;
18704    output [1:0] FECRXLN3MAPPING;
18705    output FECTRXLN0LOCK;
18706    output FECTRXLN1LOCK;
18707    output FECTRXLN2LOCK;
18708    output FECTRXLN3LOCK;
18709    output GTPOWERGOOD;
18710    output PLLFBCLKLOST;
18711    output PLLLOCK;
18712    output PLLREFCLKLOST;
18713    output PLLREFCLKMONITOR;
18714    output PLLRESETDONE;
18715    output [15:0] PLLRSVDOUT;
18716    output RCALCMP;
18717    output [4:0] RCALOUT;
18718    output RXRECCLK0;
18719    output RXRECCLK1;
18720    input BGBYPASSB;
18721    input BGMONITORENB;
18722    input BGPDB;
18723    input [4:0] BGRCALOVRD;
18724    input BGRCALOVRDENB;
18725    input CH0_AXISEN;
18726    input CH0_AXISRST;
18727    input CH0_AXISTRDY;
18728    input CH0_CFGRESET;
18729    input CH0_DMONFIFORESET;
18730    input CH0_DMONITORCLK;
18731    input CH0_GTMRXN;
18732    input CH0_GTMRXP;
18733    input CH0_GTRXRESET;
18734    input CH0_GTTXRESET;
18735    input [2:0] CH0_LOOPBACK;
18736    input [15:0] CH0_PCSRSVDIN;
18737    input [15:0] CH0_PMARSVDIN;
18738    input CH0_RESETOVRD;
18739    input CH0_RXADAPTRESET;
18740    input CH0_RXADCCALRESET;
18741    input CH0_RXADCCLKGENRESET;
18742    input CH0_RXBUFRESET;
18743    input CH0_RXCDRFREQOS;
18744    input CH0_RXCDRFRRESET;
18745    input CH0_RXCDRHOLD;
18746    input CH0_RXCDRINCPCTRL;
18747    input CH0_RXCDROVRDEN;
18748    input CH0_RXCDRPHRESET;
18749    input CH0_RXDFERESET;
18750    input CH0_RXDSPRESET;
18751    input CH0_RXEQTRAINING;
18752    input CH0_RXEYESCANRESET;
18753    input CH0_RXFECRESET;
18754    input [2:0] CH0_RXOUTCLKSEL;
18755    input CH0_RXPCSRESET;
18756    input [3:0] CH0_RXPCSRESETMASK;
18757    input CH0_RXPMARESET;
18758    input [7:0] CH0_RXPMARESETMASK;
18759    input CH0_RXPOLARITY;
18760    input CH0_RXPRBSCNTSTOP;
18761    input CH0_RXPRBSCSCNTRST;
18762    input [3:0] CH0_RXPRBSPTN;
18763    input CH0_RXPROGDIVRESET;
18764    input CH0_RXQPRBSEN;
18765    input [1:0] CH0_RXRESETMODE;
18766    input CH0_RXSPCSEQADV;
18767    input CH0_RXUSRCLK;
18768    input CH0_RXUSRCLK2;
18769    input CH0_RXUSRRDY;
18770    input CH0_RXUSRSTART;
18771    input CH0_RXUSRSTOP;
18772    input CH0_TXCKALRESET;
18773    input [5:0] CH0_TXCTLFIRDAT;
18774    input [255:0] CH0_TXDATA;
18775    input CH0_TXDATASTART;
18776    input [4:0] CH0_TXDRVAMP;
18777    input [5:0] CH0_TXEMPMAIN;
18778    input [4:0] CH0_TXEMPPOST;
18779    input [4:0] CH0_TXEMPPRE;
18780    input [3:0] CH0_TXEMPPRE2;
18781    input CH0_TXFECRESET;
18782    input CH0_TXINHIBIT;
18783    input CH0_TXMUXDCDEXHOLD;
18784    input CH0_TXMUXDCDORWREN;
18785    input [2:0] CH0_TXOUTCLKSEL;
18786    input CH0_TXPCSRESET;
18787    input [1:0] CH0_TXPCSRESETMASK;
18788    input CH0_TXPMARESET;
18789    input [1:0] CH0_TXPMARESETMASK;
18790    input CH0_TXPOLARITY;
18791    input CH0_TXPRBSINERR;
18792    input [3:0] CH0_TXPRBSPTN;
18793    input CH0_TXPROGDIVRESET;
18794    input CH0_TXQPRBSEN;
18795    input [1:0] CH0_TXRESETMODE;
18796    input CH0_TXSPCSEQADV;
18797    input CH0_TXUSRCLK;
18798    input CH0_TXUSRCLK2;
18799    input CH0_TXUSRRDY;
18800    input CH1_AXISEN;
18801    input CH1_AXISRST;
18802    input CH1_AXISTRDY;
18803    input CH1_CFGRESET;
18804    input CH1_DMONFIFORESET;
18805    input CH1_DMONITORCLK;
18806    input CH1_GTMRXN;
18807    input CH1_GTMRXP;
18808    input CH1_GTRXRESET;
18809    input CH1_GTTXRESET;
18810    input [2:0] CH1_LOOPBACK;
18811    input [15:0] CH1_PCSRSVDIN;
18812    input [15:0] CH1_PMARSVDIN;
18813    input CH1_RESETOVRD;
18814    input CH1_RXADAPTRESET;
18815    input CH1_RXADCCALRESET;
18816    input CH1_RXADCCLKGENRESET;
18817    input CH1_RXBUFRESET;
18818    input CH1_RXCDRFREQOS;
18819    input CH1_RXCDRFRRESET;
18820    input CH1_RXCDRHOLD;
18821    input CH1_RXCDRINCPCTRL;
18822    input CH1_RXCDROVRDEN;
18823    input CH1_RXCDRPHRESET;
18824    input CH1_RXDFERESET;
18825    input CH1_RXDSPRESET;
18826    input CH1_RXEQTRAINING;
18827    input CH1_RXEYESCANRESET;
18828    input CH1_RXFECRESET;
18829    input [2:0] CH1_RXOUTCLKSEL;
18830    input CH1_RXPCSRESET;
18831    input [3:0] CH1_RXPCSRESETMASK;
18832    input CH1_RXPMARESET;
18833    input [7:0] CH1_RXPMARESETMASK;
18834    input CH1_RXPOLARITY;
18835    input CH1_RXPRBSCNTSTOP;
18836    input CH1_RXPRBSCSCNTRST;
18837    input [3:0] CH1_RXPRBSPTN;
18838    input CH1_RXPROGDIVRESET;
18839    input CH1_RXQPRBSEN;
18840    input [1:0] CH1_RXRESETMODE;
18841    input CH1_RXSPCSEQADV;
18842    input CH1_RXUSRCLK;
18843    input CH1_RXUSRCLK2;
18844    input CH1_RXUSRRDY;
18845    input CH1_RXUSRSTART;
18846    input CH1_RXUSRSTOP;
18847    input CH1_TXCKALRESET;
18848    input [5:0] CH1_TXCTLFIRDAT;
18849    input [255:0] CH1_TXDATA;
18850    input CH1_TXDATASTART;
18851    input [4:0] CH1_TXDRVAMP;
18852    input [5:0] CH1_TXEMPMAIN;
18853    input [4:0] CH1_TXEMPPOST;
18854    input [4:0] CH1_TXEMPPRE;
18855    input [3:0] CH1_TXEMPPRE2;
18856    input CH1_TXFECRESET;
18857    input CH1_TXINHIBIT;
18858    input CH1_TXMUXDCDEXHOLD;
18859    input CH1_TXMUXDCDORWREN;
18860    input [2:0] CH1_TXOUTCLKSEL;
18861    input CH1_TXPCSRESET;
18862    input [1:0] CH1_TXPCSRESETMASK;
18863    input CH1_TXPMARESET;
18864    input [1:0] CH1_TXPMARESETMASK;
18865    input CH1_TXPOLARITY;
18866    input CH1_TXPRBSINERR;
18867    input [3:0] CH1_TXPRBSPTN;
18868    input CH1_TXPROGDIVRESET;
18869    input CH1_TXQPRBSEN;
18870    input [1:0] CH1_TXRESETMODE;
18871    input CH1_TXSPCSEQADV;
18872    input CH1_TXUSRCLK;
18873    input CH1_TXUSRCLK2;
18874    input CH1_TXUSRRDY;
18875    input [10:0] DRPADDR;
18876    input DRPCLK;
18877    input [15:0] DRPDI;
18878    input DRPEN;
18879    input DRPRST;
18880    input DRPWE;
18881    input FECCTRLRX0BITSLIPFS;
18882    input FECCTRLRX1BITSLIPFS;
18883    input GTGREFCLK2PLL;
18884    input GTNORTHREFCLK;
18885    input GTREFCLK;
18886    input GTSOUTHREFCLK;
18887    input [7:0] PLLFBDIV;
18888    input PLLMONCLK;
18889    input PLLPD;
18890    input [2:0] PLLREFCLKSEL;
18891    input PLLRESET;
18892    input PLLRESETBYPASSMODE;
18893    input [1:0] PLLRESETMASK;
18894    input [15:0] PLLRSVDIN;
18895    input RCALENB;
18896    input [25:0] SDMDATA;
18897    input SDMTOGGLE;
18898endmodule
18899
18900module IBUFDS_GTM (...);
18901    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18902    parameter integer REFCLK_HROW_CK_SEL = 0;
18903    parameter integer REFCLK_ICNTL_RX = 0;
18904    output O;
18905    output ODIV2;
18906    input CEB;
18907    (* iopad_external_pin *)
18908    input I;
18909    (* iopad_external_pin *)
18910    input IB;
18911endmodule
18912
18913module OBUFDS_GTM (...);
18914    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18915    parameter integer REFCLK_ICNTL_TX = 0;
18916    (* iopad_external_pin *)
18917    output O;
18918    (* iopad_external_pin *)
18919    output OB;
18920    input CEB;
18921    input I;
18922endmodule
18923
18924module OBUFDS_GTM_ADV (...);
18925    parameter [0:0] REFCLK_EN_TX_PATH = 1'b0;
18926    parameter integer REFCLK_ICNTL_TX = 0;
18927    parameter [1:0] RXRECCLK_SEL = 2'b00;
18928    (* iopad_external_pin *)
18929    output O;
18930    (* iopad_external_pin *)
18931    output OB;
18932    input CEB;
18933    input [3:0] I;
18934endmodule
18935
18936module HSDAC (...);
18937    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
18938    parameter integer XPA_CFG0 = 0;
18939    parameter integer XPA_CFG1 = 0;
18940    parameter integer XPA_NUM_DACS = 0;
18941    parameter integer XPA_NUM_DUCS = 0;
18942    parameter XPA_PLL_USED = "No";
18943    parameter integer XPA_SAMPLE_RATE_MSPS = 0;
18944    output CLK_DAC;
18945    output [15:0] DOUT;
18946    output DRDY;
18947    output PLL_DMON_OUT;
18948    output PLL_REFCLK_OUT;
18949    output [15:0] STATUS_COMMON;
18950    output [15:0] STATUS_DAC0;
18951    output [15:0] STATUS_DAC1;
18952    output [15:0] STATUS_DAC2;
18953    output [15:0] STATUS_DAC3;
18954    output SYSREF_OUT_NORTH;
18955    output SYSREF_OUT_SOUTH;
18956    output VOUT0_N;
18957    output VOUT0_P;
18958    output VOUT1_N;
18959    output VOUT1_P;
18960    output VOUT2_N;
18961    output VOUT2_P;
18962    output VOUT3_N;
18963    output VOUT3_P;
18964    input CLK_FIFO_LM;
18965    input [15:0] CONTROL_COMMON;
18966    input [15:0] CONTROL_DAC0;
18967    input [15:0] CONTROL_DAC1;
18968    input [15:0] CONTROL_DAC2;
18969    input [15:0] CONTROL_DAC3;
18970    input DAC_CLK_N;
18971    input DAC_CLK_P;
18972    input [11:0] DADDR;
18973    input [255:0] DATA_DAC0;
18974    input [255:0] DATA_DAC1;
18975    input [255:0] DATA_DAC2;
18976    input [255:0] DATA_DAC3;
18977    input DCLK;
18978    input DEN;
18979    input [15:0] DI;
18980    input DWE;
18981    input FABRIC_CLK;
18982    input PLL_MONCLK;
18983    input PLL_REFCLK_IN;
18984    input SYSREF_IN_NORTH;
18985    input SYSREF_IN_SOUTH;
18986    input SYSREF_N;
18987    input SYSREF_P;
18988endmodule
18989
18990module HSADC (...);
18991    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
18992    parameter integer XPA_CFG0 = 0;
18993    parameter integer XPA_CFG1 = 0;
18994    parameter XPA_NUM_ADCS = "0";
18995    parameter integer XPA_NUM_DDCS = 0;
18996    parameter XPA_PLL_USED = "No";
18997    parameter integer XPA_SAMPLE_RATE_MSPS = 0;
18998    output CLK_ADC;
18999    output [127:0] DATA_ADC0;
19000    output [127:0] DATA_ADC1;
19001    output [127:0] DATA_ADC2;
19002    output [127:0] DATA_ADC3;
19003    output [15:0] DOUT;
19004    output DRDY;
19005    output PLL_DMON_OUT;
19006    output PLL_REFCLK_OUT;
19007    output [15:0] STATUS_ADC0;
19008    output [15:0] STATUS_ADC1;
19009    output [15:0] STATUS_ADC2;
19010    output [15:0] STATUS_ADC3;
19011    output [15:0] STATUS_COMMON;
19012    output SYSREF_OUT_NORTH;
19013    output SYSREF_OUT_SOUTH;
19014    input ADC_CLK_N;
19015    input ADC_CLK_P;
19016    input CLK_FIFO_LM;
19017    input [15:0] CONTROL_ADC0;
19018    input [15:0] CONTROL_ADC1;
19019    input [15:0] CONTROL_ADC2;
19020    input [15:0] CONTROL_ADC3;
19021    input [15:0] CONTROL_COMMON;
19022    input [11:0] DADDR;
19023    input DCLK;
19024    input DEN;
19025    input [15:0] DI;
19026    input DWE;
19027    input FABRIC_CLK;
19028    input PLL_MONCLK;
19029    input PLL_REFCLK_IN;
19030    input SYSREF_IN_NORTH;
19031    input SYSREF_IN_SOUTH;
19032    input SYSREF_N;
19033    input SYSREF_P;
19034    input VIN0_N;
19035    input VIN0_P;
19036    input VIN1_N;
19037    input VIN1_P;
19038    input VIN2_N;
19039    input VIN2_P;
19040    input VIN3_N;
19041    input VIN3_P;
19042    input VIN_I01_N;
19043    input VIN_I01_P;
19044    input VIN_I23_N;
19045    input VIN_I23_P;
19046endmodule
19047
19048module RFDAC (...);
19049    parameter integer OPT_CLK_DIST = 0;
19050    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
19051    parameter integer XPA_ACTIVE_DUTYCYCLE = 100;
19052    parameter integer XPA_CFG0 = 0;
19053    parameter integer XPA_CFG1 = 0;
19054    parameter integer XPA_CFG2 = 0;
19055    parameter integer XPA_NUM_DACS = 0;
19056    parameter integer XPA_NUM_DUCS = 0;
19057    parameter XPA_PLL_USED = "EXTERNAL";
19058    parameter integer XPA_SAMPLE_RATE_MSPS = 0;
19059    output CLK_DAC;
19060    output CLK_DIST_OUT_NORTH;
19061    output CLK_DIST_OUT_SOUTH;
19062    output [15:0] DOUT;
19063    output DRDY;
19064    output PLL_DMON_OUT;
19065    output PLL_REFCLK_OUT;
19066    output [23:0] STATUS_COMMON;
19067    output [23:0] STATUS_DAC0;
19068    output [23:0] STATUS_DAC1;
19069    output [23:0] STATUS_DAC2;
19070    output [23:0] STATUS_DAC3;
19071    output SYSREF_OUT_NORTH;
19072    output SYSREF_OUT_SOUTH;
19073    output T1_ALLOWED_SOUTH;
19074    output VOUT0_N;
19075    output VOUT0_P;
19076    output VOUT1_N;
19077    output VOUT1_P;
19078    output VOUT2_N;
19079    output VOUT2_P;
19080    output VOUT3_N;
19081    output VOUT3_P;
19082    input CLK_DIST_IN_NORTH;
19083    input CLK_DIST_IN_SOUTH;
19084    input CLK_FIFO_LM;
19085    input [15:0] CONTROL_COMMON;
19086    input [15:0] CONTROL_DAC0;
19087    input [15:0] CONTROL_DAC1;
19088    input [15:0] CONTROL_DAC2;
19089    input [15:0] CONTROL_DAC3;
19090    input DAC_CLK_N;
19091    input DAC_CLK_P;
19092    input [11:0] DADDR;
19093    input [255:0] DATA_DAC0;
19094    input [255:0] DATA_DAC1;
19095    input [255:0] DATA_DAC2;
19096    input [255:0] DATA_DAC3;
19097    input DCLK;
19098    input DEN;
19099    input [15:0] DI;
19100    input DWE;
19101    input FABRIC_CLK;
19102    input PLL_MONCLK;
19103    input PLL_REFCLK_IN;
19104    input SYSREF_IN_NORTH;
19105    input SYSREF_IN_SOUTH;
19106    input SYSREF_N;
19107    input SYSREF_P;
19108    input T1_ALLOWED_NORTH;
19109endmodule
19110
19111module RFADC (...);
19112    parameter integer OPT_ANALOG = 0;
19113    parameter integer OPT_CLK_DIST = 0;
19114    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
19115    parameter integer XPA_ACTIVE_DUTYCYCLE = 100;
19116    parameter integer XPA_CFG0 = 0;
19117    parameter integer XPA_CFG1 = 0;
19118    parameter integer XPA_CFG2 = 0;
19119    parameter XPA_NUM_ADCS = "0";
19120    parameter integer XPA_NUM_DDCS = 0;
19121    parameter XPA_PLL_USED = "EXTERNAL";
19122    parameter integer XPA_SAMPLE_RATE_MSPS = 0;
19123    output CLK_ADC;
19124    output CLK_DIST_OUT_NORTH;
19125    output CLK_DIST_OUT_SOUTH;
19126    output [191:0] DATA_ADC0;
19127    output [191:0] DATA_ADC1;
19128    output [191:0] DATA_ADC2;
19129    output [191:0] DATA_ADC3;
19130    output [15:0] DOUT;
19131    output DRDY;
19132    output PLL_DMON_OUT;
19133    output PLL_REFCLK_OUT;
19134    output [23:0] STATUS_ADC0;
19135    output [23:0] STATUS_ADC1;
19136    output [23:0] STATUS_ADC2;
19137    output [23:0] STATUS_ADC3;
19138    output [23:0] STATUS_COMMON;
19139    output SYSREF_OUT_NORTH;
19140    output SYSREF_OUT_SOUTH;
19141    output T1_ALLOWED_SOUTH;
19142    input ADC_CLK_N;
19143    input ADC_CLK_P;
19144    input CLK_DIST_IN_NORTH;
19145    input CLK_DIST_IN_SOUTH;
19146    input CLK_FIFO_LM;
19147    input [15:0] CONTROL_ADC0;
19148    input [15:0] CONTROL_ADC1;
19149    input [15:0] CONTROL_ADC2;
19150    input [15:0] CONTROL_ADC3;
19151    input [15:0] CONTROL_COMMON;
19152    input [11:0] DADDR;
19153    input DCLK;
19154    input DEN;
19155    input [15:0] DI;
19156    input DWE;
19157    input FABRIC_CLK;
19158    input PLL_MONCLK;
19159    input PLL_REFCLK_IN;
19160    input SYSREF_IN_NORTH;
19161    input SYSREF_IN_SOUTH;
19162    input SYSREF_N;
19163    input SYSREF_P;
19164    input T1_ALLOWED_NORTH;
19165    input VIN0_N;
19166    input VIN0_P;
19167    input VIN1_N;
19168    input VIN1_P;
19169    input VIN2_N;
19170    input VIN2_P;
19171    input VIN3_N;
19172    input VIN3_P;
19173    input VIN_I01_N;
19174    input VIN_I01_P;
19175    input VIN_I23_N;
19176    input VIN_I23_P;
19177endmodule
19178
19179module PCIE_A1 (...);
19180    parameter [31:0] BAR0 = 32'h00000000;
19181    parameter [31:0] BAR1 = 32'h00000000;
19182    parameter [31:0] BAR2 = 32'h00000000;
19183    parameter [31:0] BAR3 = 32'h00000000;
19184    parameter [31:0] BAR4 = 32'h00000000;
19185    parameter [31:0] BAR5 = 32'h00000000;
19186    parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000;
19187    parameter [23:0] CLASS_CODE = 24'h000000;
19188    parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 7;
19189    parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 7;
19190    parameter DEV_CAP_EXT_TAG_SUPPORTED = "FALSE";
19191    parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2;
19192    parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0;
19193    parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE";
19194    parameter DISABLE_BAR_FILTERING = "FALSE";
19195    parameter DISABLE_ID_CHECK = "FALSE";
19196    parameter DISABLE_SCRAMBLING = "FALSE";
19197    parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE";
19198    parameter [21:0] EXPANSION_ROM = 22'h000000;
19199    parameter FAST_TRAIN = "FALSE";
19200    parameter integer GTP_SEL = 0;
19201    parameter integer LINK_CAP_ASPM_SUPPORT = 1;
19202    parameter integer LINK_CAP_L0S_EXIT_LATENCY = 7;
19203    parameter integer LINK_CAP_L1_EXIT_LATENCY = 7;
19204    parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "FALSE";
19205    parameter [14:0] LL_ACK_TIMEOUT = 15'h0204;
19206    parameter LL_ACK_TIMEOUT_EN = "FALSE";
19207    parameter [14:0] LL_REPLAY_TIMEOUT = 15'h060D;
19208    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
19209    parameter integer MSI_CAP_MULTIMSGCAP = 0;
19210    parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0;
19211    parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h1;
19212    parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0;
19213    parameter [4:0] PCIE_CAP_INT_MSG_NUM = 5'b00000;
19214    parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE";
19215    parameter [11:0] PCIE_GENERIC = 12'h000;
19216    parameter PLM_AUTO_CONFIG = "FALSE";
19217    parameter integer PM_CAP_AUXCURRENT = 0;
19218    parameter PM_CAP_D1SUPPORT = "TRUE";
19219    parameter PM_CAP_D2SUPPORT = "TRUE";
19220    parameter PM_CAP_DSI = "FALSE";
19221    parameter [4:0] PM_CAP_PMESUPPORT = 5'b01111;
19222    parameter PM_CAP_PME_CLOCK = "FALSE";
19223    parameter integer PM_CAP_VERSION = 3;
19224    parameter [7:0] PM_DATA0 = 8'h1E;
19225    parameter [7:0] PM_DATA1 = 8'h1E;
19226    parameter [7:0] PM_DATA2 = 8'h1E;
19227    parameter [7:0] PM_DATA3 = 8'h1E;
19228    parameter [7:0] PM_DATA4 = 8'h1E;
19229    parameter [7:0] PM_DATA5 = 8'h1E;
19230    parameter [7:0] PM_DATA6 = 8'h1E;
19231    parameter [7:0] PM_DATA7 = 8'h1E;
19232    parameter [1:0] PM_DATA_SCALE0 = 2'b01;
19233    parameter [1:0] PM_DATA_SCALE1 = 2'b01;
19234    parameter [1:0] PM_DATA_SCALE2 = 2'b01;
19235    parameter [1:0] PM_DATA_SCALE3 = 2'b01;
19236    parameter [1:0] PM_DATA_SCALE4 = 2'b01;
19237    parameter [1:0] PM_DATA_SCALE5 = 2'b01;
19238    parameter [1:0] PM_DATA_SCALE6 = 2'b01;
19239    parameter [1:0] PM_DATA_SCALE7 = 2'b01;
19240    parameter SIM_VERSION = "1.0";
19241    parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE";
19242    parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE";
19243    parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE";
19244    parameter integer TL_RX_RAM_RADDR_LATENCY = 1;
19245    parameter integer TL_RX_RAM_RDATA_LATENCY = 2;
19246    parameter integer TL_RX_RAM_WRITE_LATENCY = 0;
19247    parameter TL_TFC_DISABLE = "FALSE";
19248    parameter TL_TX_CHECKS_DISABLE = "FALSE";
19249    parameter integer TL_TX_RAM_RADDR_LATENCY = 0;
19250    parameter integer TL_TX_RAM_RDATA_LATENCY = 2;
19251    parameter USR_CFG = "FALSE";
19252    parameter USR_EXT_CFG = "FALSE";
19253    parameter VC0_CPL_INFINITE = "TRUE";
19254    parameter [11:0] VC0_RX_RAM_LIMIT = 12'h01E;
19255    parameter integer VC0_TOTAL_CREDITS_CD = 104;
19256    parameter integer VC0_TOTAL_CREDITS_CH = 36;
19257    parameter integer VC0_TOTAL_CREDITS_NPH = 8;
19258    parameter integer VC0_TOTAL_CREDITS_PD = 288;
19259    parameter integer VC0_TOTAL_CREDITS_PH = 32;
19260    parameter integer VC0_TX_LASTPACKET = 31;
19261    output CFGCOMMANDBUSMASTERENABLE;
19262    output CFGCOMMANDINTERRUPTDISABLE;
19263    output CFGCOMMANDIOENABLE;
19264    output CFGCOMMANDMEMENABLE;
19265    output CFGCOMMANDSERREN;
19266    output CFGDEVCONTROLAUXPOWEREN;
19267    output CFGDEVCONTROLCORRERRREPORTINGEN;
19268    output CFGDEVCONTROLENABLERO;
19269    output CFGDEVCONTROLEXTTAGEN;
19270    output CFGDEVCONTROLFATALERRREPORTINGEN;
19271    output CFGDEVCONTROLNONFATALREPORTINGEN;
19272    output CFGDEVCONTROLNOSNOOPEN;
19273    output CFGDEVCONTROLPHANTOMEN;
19274    output CFGDEVCONTROLURERRREPORTINGEN;
19275    output CFGDEVSTATUSCORRERRDETECTED;
19276    output CFGDEVSTATUSFATALERRDETECTED;
19277    output CFGDEVSTATUSNONFATALERRDETECTED;
19278    output CFGDEVSTATUSURDETECTED;
19279    output CFGERRCPLRDYN;
19280    output CFGINTERRUPTMSIENABLE;
19281    output CFGINTERRUPTRDYN;
19282    output CFGLINKCONTOLRCB;
19283    output CFGLINKCONTROLCOMMONCLOCK;
19284    output CFGLINKCONTROLEXTENDEDSYNC;
19285    output CFGRDWRDONEN;
19286    output CFGTOTURNOFFN;
19287    output DBGBADDLLPSTATUS;
19288    output DBGBADTLPLCRC;
19289    output DBGBADTLPSEQNUM;
19290    output DBGBADTLPSTATUS;
19291    output DBGDLPROTOCOLSTATUS;
19292    output DBGFCPROTOCOLERRSTATUS;
19293    output DBGMLFRMDLENGTH;
19294    output DBGMLFRMDMPS;
19295    output DBGMLFRMDTCVC;
19296    output DBGMLFRMDTLPSTATUS;
19297    output DBGMLFRMDUNRECTYPE;
19298    output DBGPOISTLPSTATUS;
19299    output DBGRCVROVERFLOWSTATUS;
19300    output DBGREGDETECTEDCORRECTABLE;
19301    output DBGREGDETECTEDFATAL;
19302    output DBGREGDETECTEDNONFATAL;
19303    output DBGREGDETECTEDUNSUPPORTED;
19304    output DBGRPLYROLLOVERSTATUS;
19305    output DBGRPLYTIMEOUTSTATUS;
19306    output DBGURNOBARHIT;
19307    output DBGURPOISCFGWR;
19308    output DBGURSTATUS;
19309    output DBGURUNSUPMSG;
19310    output MIMRXREN;
19311    output MIMRXWEN;
19312    output MIMTXREN;
19313    output MIMTXWEN;
19314    output PIPEGTTXELECIDLEA;
19315    output PIPEGTTXELECIDLEB;
19316    output PIPERXPOLARITYA;
19317    output PIPERXPOLARITYB;
19318    output PIPERXRESETA;
19319    output PIPERXRESETB;
19320    output PIPETXRCVRDETA;
19321    output PIPETXRCVRDETB;
19322    output RECEIVEDHOTRESET;
19323    output TRNLNKUPN;
19324    output TRNREOFN;
19325    output TRNRERRFWDN;
19326    output TRNRSOFN;
19327    output TRNRSRCDSCN;
19328    output TRNRSRCRDYN;
19329    output TRNTCFGREQN;
19330    output TRNTDSTRDYN;
19331    output TRNTERRDROPN;
19332    output USERRSTN;
19333    output [11:0] MIMRXRADDR;
19334    output [11:0] MIMRXWADDR;
19335    output [11:0] MIMTXRADDR;
19336    output [11:0] MIMTXWADDR;
19337    output [11:0] TRNFCCPLD;
19338    output [11:0] TRNFCNPD;
19339    output [11:0] TRNFCPD;
19340    output [15:0] PIPETXDATAA;
19341    output [15:0] PIPETXDATAB;
19342    output [1:0] CFGLINKCONTROLASPMCONTROL;
19343    output [1:0] PIPEGTPOWERDOWNA;
19344    output [1:0] PIPEGTPOWERDOWNB;
19345    output [1:0] PIPETXCHARDISPMODEA;
19346    output [1:0] PIPETXCHARDISPMODEB;
19347    output [1:0] PIPETXCHARDISPVALA;
19348    output [1:0] PIPETXCHARDISPVALB;
19349    output [1:0] PIPETXCHARISKA;
19350    output [1:0] PIPETXCHARISKB;
19351    output [2:0] CFGDEVCONTROLMAXPAYLOAD;
19352    output [2:0] CFGDEVCONTROLMAXREADREQ;
19353    output [2:0] CFGFUNCTIONNUMBER;
19354    output [2:0] CFGINTERRUPTMMENABLE;
19355    output [2:0] CFGPCIELINKSTATEN;
19356    output [31:0] CFGDO;
19357    output [31:0] TRNRD;
19358    output [34:0] MIMRXWDATA;
19359    output [35:0] MIMTXWDATA;
19360    output [4:0] CFGDEVICENUMBER;
19361    output [4:0] CFGLTSSMSTATE;
19362    output [5:0] TRNTBUFAV;
19363    output [6:0] TRNRBARHITN;
19364    output [7:0] CFGBUSNUMBER;
19365    output [7:0] CFGINTERRUPTDO;
19366    output [7:0] TRNFCCPLH;
19367    output [7:0] TRNFCNPH;
19368    output [7:0] TRNFCPH;
19369    input CFGERRCORN;
19370    input CFGERRCPLABORTN;
19371    input CFGERRCPLTIMEOUTN;
19372    input CFGERRECRCN;
19373    input CFGERRLOCKEDN;
19374    input CFGERRPOSTEDN;
19375    input CFGERRURN;
19376    input CFGINTERRUPTASSERTN;
19377    input CFGINTERRUPTN;
19378    input CFGPMWAKEN;
19379    input CFGRDENN;
19380    input CFGTRNPENDINGN;
19381    input CFGTURNOFFOKN;
19382    input CLOCKLOCKED;
19383    input MGTCLK;
19384    input PIPEGTRESETDONEA;
19385    input PIPEGTRESETDONEB;
19386    input PIPEPHYSTATUSA;
19387    input PIPEPHYSTATUSB;
19388    input PIPERXENTERELECIDLEA;
19389    input PIPERXENTERELECIDLEB;
19390    input SYSRESETN;
19391    input TRNRDSTRDYN;
19392    input TRNRNPOKN;
19393    input TRNTCFGGNTN;
19394    input TRNTEOFN;
19395    input TRNTERRFWDN;
19396    input TRNTSOFN;
19397    input TRNTSRCDSCN;
19398    input TRNTSRCRDYN;
19399    input TRNTSTRN;
19400    input USERCLK;
19401    input [15:0] CFGDEVID;
19402    input [15:0] CFGSUBSYSID;
19403    input [15:0] CFGSUBSYSVENID;
19404    input [15:0] CFGVENID;
19405    input [15:0] PIPERXDATAA;
19406    input [15:0] PIPERXDATAB;
19407    input [1:0] PIPERXCHARISKA;
19408    input [1:0] PIPERXCHARISKB;
19409    input [2:0] PIPERXSTATUSA;
19410    input [2:0] PIPERXSTATUSB;
19411    input [2:0] TRNFCSEL;
19412    input [31:0] TRNTD;
19413    input [34:0] MIMRXRDATA;
19414    input [35:0] MIMTXRDATA;
19415    input [47:0] CFGERRTLPCPLHEADER;
19416    input [63:0] CFGDSN;
19417    input [7:0] CFGINTERRUPTDI;
19418    input [7:0] CFGREVID;
19419    input [9:0] CFGDWADDR;
19420endmodule
19421
19422module PCIE_EP (...);
19423    parameter BAR0EXIST = "TRUE";
19424    parameter BAR0PREFETCHABLE = "TRUE";
19425    parameter BAR1EXIST = "FALSE";
19426    parameter BAR1PREFETCHABLE = "FALSE";
19427    parameter BAR2EXIST = "FALSE";
19428    parameter BAR2PREFETCHABLE = "FALSE";
19429    parameter BAR3EXIST = "FALSE";
19430    parameter BAR3PREFETCHABLE = "FALSE";
19431    parameter BAR4EXIST = "FALSE";
19432    parameter BAR4PREFETCHABLE = "FALSE";
19433    parameter BAR5EXIST = "FALSE";
19434    parameter BAR5PREFETCHABLE = "FALSE";
19435    parameter CLKDIVIDED = "FALSE";
19436    parameter INFINITECOMPLETIONS = "TRUE";
19437    parameter LINKSTATUSSLOTCLOCKCONFIG = "FALSE";
19438    parameter PBCAPABILITYSYSTEMALLOCATED = "FALSE";
19439    parameter PMCAPABILITYD1SUPPORT = "FALSE";
19440    parameter PMCAPABILITYD2SUPPORT = "FALSE";
19441    parameter PMCAPABILITYDSI = "TRUE";
19442    parameter RESETMODE = "FALSE";
19443    parameter [10:0] VC0TOTALCREDITSCD = 11'h0;
19444    parameter [10:0] VC0TOTALCREDITSPD = 11'h34;
19445    parameter [10:0] VC1TOTALCREDITSCD = 11'h0;
19446    parameter [10:0] VC1TOTALCREDITSPD = 11'h0;
19447    parameter [11:0] AERBASEPTR = 12'h110;
19448    parameter [11:0] AERCAPABILITYNEXTPTR = 12'h138;
19449    parameter [11:0] DSNBASEPTR = 12'h148;
19450    parameter [11:0] DSNCAPABILITYNEXTPTR = 12'h154;
19451    parameter [11:0] MSIBASEPTR = 12'h48;
19452    parameter [11:0] PBBASEPTR = 12'h138;
19453    parameter [11:0] PBCAPABILITYNEXTPTR = 12'h148;
19454    parameter [11:0] PMBASEPTR = 12'h40;
19455    parameter [11:0] RETRYRAMSIZE = 12'h9;
19456    parameter [11:0] VCBASEPTR = 12'h154;
19457    parameter [11:0] VCCAPABILITYNEXTPTR = 12'h0;
19458    parameter [12:0] VC0RXFIFOBASEC = 13'h98;
19459    parameter [12:0] VC0RXFIFOBASENP = 13'h80;
19460    parameter [12:0] VC0RXFIFOBASEP = 13'h0;
19461    parameter [12:0] VC0RXFIFOLIMITC = 13'h117;
19462    parameter [12:0] VC0RXFIFOLIMITNP = 13'h97;
19463    parameter [12:0] VC0RXFIFOLIMITP = 13'h7f;
19464    parameter [12:0] VC0TXFIFOBASEC = 13'h98;
19465    parameter [12:0] VC0TXFIFOBASENP = 13'h80;
19466    parameter [12:0] VC0TXFIFOBASEP = 13'h0;
19467    parameter [12:0] VC0TXFIFOLIMITC = 13'h117;
19468    parameter [12:0] VC0TXFIFOLIMITNP = 13'h97;
19469    parameter [12:0] VC0TXFIFOLIMITP = 13'h7f;
19470    parameter [12:0] VC1RXFIFOBASEC = 13'h118;
19471    parameter [12:0] VC1RXFIFOBASENP = 13'h118;
19472    parameter [12:0] VC1RXFIFOBASEP = 13'h118;
19473    parameter [12:0] VC1RXFIFOLIMITC = 13'h118;
19474    parameter [12:0] VC1RXFIFOLIMITNP = 13'h118;
19475    parameter [12:0] VC1RXFIFOLIMITP = 13'h118;
19476    parameter [12:0] VC1TXFIFOBASEC = 13'h118;
19477    parameter [12:0] VC1TXFIFOBASENP = 13'h118;
19478    parameter [12:0] VC1TXFIFOBASEP = 13'h118;
19479    parameter [12:0] VC1TXFIFOLIMITC = 13'h118;
19480    parameter [12:0] VC1TXFIFOLIMITNP = 13'h118;
19481    parameter [12:0] VC1TXFIFOLIMITP = 13'h118;
19482    parameter [15:0] DEVICEID = 16'h5050;
19483    parameter [15:0] SUBSYSTEMID = 16'h5050;
19484    parameter [15:0] SUBSYSTEMVENDORID = 16'h10EE;
19485    parameter [15:0] VENDORID = 16'h10EE;
19486    parameter [1:0] LINKCAPABILITYASPMSUPPORT = 2'h1;
19487    parameter [1:0] PBCAPABILITYDW0DATASCALE = 2'h0;
19488    parameter [1:0] PBCAPABILITYDW0PMSTATE = 2'h0;
19489    parameter [1:0] PBCAPABILITYDW1DATASCALE = 2'h0;
19490    parameter [1:0] PBCAPABILITYDW1PMSTATE = 2'h0;
19491    parameter [1:0] PBCAPABILITYDW2DATASCALE = 2'h0;
19492    parameter [1:0] PBCAPABILITYDW2PMSTATE = 2'h0;
19493    parameter [1:0] PBCAPABILITYDW3DATASCALE = 2'h0;
19494    parameter [1:0] PBCAPABILITYDW3PMSTATE = 2'h0;
19495    parameter [23:0] CLASSCODE = 24'h058000;
19496    parameter [2:0] DEVICECAPABILITYENDPOINTL0SLATENCY = 3'h0;
19497    parameter [2:0] DEVICECAPABILITYENDPOINTL1LATENCY = 3'h0;
19498    parameter [2:0] MSICAPABILITYMULTIMSGCAP = 3'h0;
19499    parameter [2:0] PBCAPABILITYDW0PMSUBSTATE = 3'h0;
19500    parameter [2:0] PBCAPABILITYDW0POWERRAIL = 3'h0;
19501    parameter [2:0] PBCAPABILITYDW0TYPE = 3'h0;
19502    parameter [2:0] PBCAPABILITYDW1PMSUBSTATE = 3'h0;
19503    parameter [2:0] PBCAPABILITYDW1POWERRAIL = 3'h0;
19504    parameter [2:0] PBCAPABILITYDW1TYPE = 3'h0;
19505    parameter [2:0] PBCAPABILITYDW2PMSUBSTATE = 3'h0;
19506    parameter [2:0] PBCAPABILITYDW2POWERRAIL = 3'h0;
19507    parameter [2:0] PBCAPABILITYDW2TYPE = 3'h0;
19508    parameter [2:0] PBCAPABILITYDW3PMSUBSTATE = 3'h0;
19509    parameter [2:0] PBCAPABILITYDW3POWERRAIL = 3'h0;
19510    parameter [2:0] PBCAPABILITYDW3TYPE = 3'h0;
19511    parameter [2:0] PMCAPABILITYAUXCURRENT = 3'h0;
19512    parameter [2:0] PORTVCCAPABILITYEXTENDEDVCCOUNT = 3'h0;
19513    parameter [31:0] CARDBUSCISPOINTER = 32'h0;
19514    parameter [3:0] XPDEVICEPORTTYPE = 4'h0;
19515    parameter [4:0] PMCAPABILITYPMESUPPORT = 5'h0;
19516    parameter [5:0] BAR0MASKWIDTH = 6'h14;
19517    parameter [5:0] BAR1MASKWIDTH = 6'h0;
19518    parameter [5:0] BAR2MASKWIDTH = 6'h0;
19519    parameter [5:0] BAR3MASKWIDTH = 6'h0;
19520    parameter [5:0] BAR4MASKWIDTH = 6'h0;
19521    parameter [5:0] BAR5MASKWIDTH = 6'h0;
19522    parameter [5:0] LINKCAPABILITYMAXLINKWIDTH = 6'h01;
19523    parameter [63:0] DEVICESERIALNUMBER = 64'hE000000001000A35;
19524    parameter [6:0] VC0TOTALCREDITSCH = 7'h0;
19525    parameter [6:0] VC0TOTALCREDITSNPH = 7'h08;
19526    parameter [6:0] VC0TOTALCREDITSPH = 7'h08;
19527    parameter [6:0] VC1TOTALCREDITSCH = 7'h0;
19528    parameter [6:0] VC1TOTALCREDITSNPH = 7'h0;
19529    parameter [6:0] VC1TOTALCREDITSPH = 7'h0;
19530    parameter [7:0] ACTIVELANESIN = 8'h1;
19531    parameter [7:0] CAPABILITIESPOINTER = 8'h40;
19532    parameter [7:0] INTERRUPTPIN = 8'h0;
19533    parameter [7:0] MSICAPABILITYNEXTPTR = 8'h60;
19534    parameter [7:0] PBCAPABILITYDW0BASEPOWER = 8'h0;
19535    parameter [7:0] PBCAPABILITYDW1BASEPOWER = 8'h0;
19536    parameter [7:0] PBCAPABILITYDW2BASEPOWER = 8'h0;
19537    parameter [7:0] PBCAPABILITYDW3BASEPOWER = 8'h0;
19538    parameter [7:0] PCIECAPABILITYNEXTPTR = 8'h0;
19539    parameter [7:0] PMCAPABILITYNEXTPTR = 8'h60;
19540    parameter [7:0] PMDATA0 = 8'h0;
19541    parameter [7:0] PMDATA1 = 8'h0;
19542    parameter [7:0] PMDATA2 = 8'h0;
19543    parameter [7:0] PMDATA3 = 8'h0;
19544    parameter [7:0] PMDATA4 = 8'h0;
19545    parameter [7:0] PMDATA5 = 8'h0;
19546    parameter [7:0] PMDATA6 = 8'h0;
19547    parameter [7:0] PMDATA7 = 8'h0;
19548    parameter [7:0] PORTVCCAPABILITYVCARBCAP = 8'h0;
19549    parameter [7:0] PORTVCCAPABILITYVCARBTABLEOFFSET = 8'h0;
19550    parameter [7:0] REVISIONID = 8'h0;
19551    parameter [7:0] XPBASEPTR = 8'h60;
19552    parameter BAR0ADDRWIDTH = 0;
19553    parameter BAR0IOMEMN = 0;
19554    parameter BAR1ADDRWIDTH = 0;
19555    parameter BAR1IOMEMN = 0;
19556    parameter BAR2ADDRWIDTH = 0;
19557    parameter BAR2IOMEMN = 0;
19558    parameter BAR3ADDRWIDTH = 0;
19559    parameter BAR3IOMEMN = 0;
19560    parameter BAR4ADDRWIDTH = 0;
19561    parameter BAR4IOMEMN = 0;
19562    parameter BAR5IOMEMN = 0;
19563    parameter L0SEXITLATENCY = 7;
19564    parameter L0SEXITLATENCYCOMCLK = 7;
19565    parameter L1EXITLATENCY = 7;
19566    parameter L1EXITLATENCYCOMCLK = 7;
19567    parameter LOWPRIORITYVCCOUNT = 0;
19568    parameter PMDATASCALE0 = 0;
19569    parameter PMDATASCALE1 = 0;
19570    parameter PMDATASCALE2 = 0;
19571    parameter PMDATASCALE3 = 0;
19572    parameter PMDATASCALE4 = 0;
19573    parameter PMDATASCALE5 = 0;
19574    parameter PMDATASCALE6 = 0;
19575    parameter PMDATASCALE7 = 0;
19576    parameter RETRYRAMREADLATENCY = 3;
19577    parameter RETRYRAMWRITELATENCY = 1;
19578    parameter TLRAMREADLATENCY = 3;
19579    parameter TLRAMWRITELATENCY = 1;
19580    parameter TXTSNFTS = 255;
19581    parameter TXTSNFTSCOMCLK = 255;
19582    parameter XPMAXPAYLOAD = 0;
19583    output BUSMASTERENABLE;
19584    output CRMDOHOTRESETN;
19585    output CRMPWRSOFTRESETN;
19586    output DLLTXPMDLLPOUTSTANDING;
19587    output INTERRUPTDISABLE;
19588    output IOSPACEENABLE;
19589    output L0CFGLOOPBACKACK;
19590    output L0DLLRXACKOUTSTANDING;
19591    output L0DLLTXNONFCOUTSTANDING;
19592    output L0DLLTXOUTSTANDING;
19593    output L0FIRSTCFGWRITEOCCURRED;
19594    output L0MACENTEREDL0;
19595    output L0MACLINKTRAINING;
19596    output L0MACLINKUP;
19597    output L0MACNEWSTATEACK;
19598    output L0MACRXL0SSTATE;
19599    output L0MSIENABLE0;
19600    output L0PMEACK;
19601    output L0PMEEN;
19602    output L0PMEREQOUT;
19603    output L0PWRL1STATE;
19604    output L0PWRL23READYSTATE;
19605    output L0PWRTURNOFFREQ;
19606    output L0PWRTXL0SSTATE;
19607    output L0RXDLLPM;
19608    output L0STATSCFGOTHERRECEIVED;
19609    output L0STATSCFGOTHERTRANSMITTED;
19610    output L0STATSCFGRECEIVED;
19611    output L0STATSCFGTRANSMITTED;
19612    output L0STATSDLLPRECEIVED;
19613    output L0STATSDLLPTRANSMITTED;
19614    output L0STATSOSRECEIVED;
19615    output L0STATSOSTRANSMITTED;
19616    output L0STATSTLPRECEIVED;
19617    output L0STATSTLPTRANSMITTED;
19618    output L0UNLOCKRECEIVED;
19619    output LLKRXEOFN;
19620    output LLKRXEOPN;
19621    output LLKRXSOFN;
19622    output LLKRXSOPN;
19623    output LLKRXSRCLASTREQN;
19624    output LLKRXSRCRDYN;
19625    output LLKTXCONFIGREADYN;
19626    output LLKTXDSTRDYN;
19627    output MEMSPACEENABLE;
19628    output MIMDLLBREN;
19629    output MIMDLLBWEN;
19630    output MIMRXBREN;
19631    output MIMRXBWEN;
19632    output MIMTXBREN;
19633    output MIMTXBWEN;
19634    output PARITYERRORRESPONSE;
19635    output PIPEDESKEWLANESL0;
19636    output PIPEDESKEWLANESL1;
19637    output PIPEDESKEWLANESL2;
19638    output PIPEDESKEWLANESL3;
19639    output PIPEDESKEWLANESL4;
19640    output PIPEDESKEWLANESL5;
19641    output PIPEDESKEWLANESL6;
19642    output PIPEDESKEWLANESL7;
19643    output PIPERESETL0;
19644    output PIPERESETL1;
19645    output PIPERESETL2;
19646    output PIPERESETL3;
19647    output PIPERESETL4;
19648    output PIPERESETL5;
19649    output PIPERESETL6;
19650    output PIPERESETL7;
19651    output PIPERXPOLARITYL0;
19652    output PIPERXPOLARITYL1;
19653    output PIPERXPOLARITYL2;
19654    output PIPERXPOLARITYL3;
19655    output PIPERXPOLARITYL4;
19656    output PIPERXPOLARITYL5;
19657    output PIPERXPOLARITYL6;
19658    output PIPERXPOLARITYL7;
19659    output PIPETXCOMPLIANCEL0;
19660    output PIPETXCOMPLIANCEL1;
19661    output PIPETXCOMPLIANCEL2;
19662    output PIPETXCOMPLIANCEL3;
19663    output PIPETXCOMPLIANCEL4;
19664    output PIPETXCOMPLIANCEL5;
19665    output PIPETXCOMPLIANCEL6;
19666    output PIPETXCOMPLIANCEL7;
19667    output PIPETXDATAKL0;
19668    output PIPETXDATAKL1;
19669    output PIPETXDATAKL2;
19670    output PIPETXDATAKL3;
19671    output PIPETXDATAKL4;
19672    output PIPETXDATAKL5;
19673    output PIPETXDATAKL6;
19674    output PIPETXDATAKL7;
19675    output PIPETXDETECTRXLOOPBACKL0;
19676    output PIPETXDETECTRXLOOPBACKL1;
19677    output PIPETXDETECTRXLOOPBACKL2;
19678    output PIPETXDETECTRXLOOPBACKL3;
19679    output PIPETXDETECTRXLOOPBACKL4;
19680    output PIPETXDETECTRXLOOPBACKL5;
19681    output PIPETXDETECTRXLOOPBACKL6;
19682    output PIPETXDETECTRXLOOPBACKL7;
19683    output PIPETXELECIDLEL0;
19684    output PIPETXELECIDLEL1;
19685    output PIPETXELECIDLEL2;
19686    output PIPETXELECIDLEL3;
19687    output PIPETXELECIDLEL4;
19688    output PIPETXELECIDLEL5;
19689    output PIPETXELECIDLEL6;
19690    output PIPETXELECIDLEL7;
19691    output SERRENABLE;
19692    output URREPORTINGENABLE;
19693    output [11:0] MGMTSTATSCREDIT;
19694    output [11:0] MIMDLLBRADD;
19695    output [11:0] MIMDLLBWADD;
19696    output [12:0] L0COMPLETERID;
19697    output [12:0] MIMRXBRADD;
19698    output [12:0] MIMRXBWADD;
19699    output [12:0] MIMTXBRADD;
19700    output [12:0] MIMTXBWADD;
19701    output [15:0] LLKRXPREFERREDTYPE;
19702    output [16:0] MGMTPSO;
19703    output [1:0] L0PWRSTATE0;
19704    output [1:0] L0RXMACLINKERROR;
19705    output [1:0] LLKRXVALIDN;
19706    output [1:0] PIPEPOWERDOWNL0;
19707    output [1:0] PIPEPOWERDOWNL1;
19708    output [1:0] PIPEPOWERDOWNL2;
19709    output [1:0] PIPEPOWERDOWNL3;
19710    output [1:0] PIPEPOWERDOWNL4;
19711    output [1:0] PIPEPOWERDOWNL5;
19712    output [1:0] PIPEPOWERDOWNL6;
19713    output [1:0] PIPEPOWERDOWNL7;
19714    output [2:0] L0MULTIMSGEN0;
19715    output [2:0] L0RXDLLPMTYPE;
19716    output [2:0] MAXPAYLOADSIZE;
19717    output [2:0] MAXREADREQUESTSIZE;
19718    output [31:0] MGMTRDATA;
19719    output [3:0] L0LTSSMSTATE;
19720    output [3:0] L0MACNEGOTIATEDLINKWIDTH;
19721    output [63:0] LLKRXDATA;
19722    output [63:0] MIMDLLBWDATA;
19723    output [63:0] MIMRXBWDATA;
19724    output [63:0] MIMTXBWDATA;
19725    output [6:0] L0DLLERRORVECTOR;
19726    output [7:0] L0DLLVCSTATUS;
19727    output [7:0] L0DLUPDOWN;
19728    output [7:0] LLKRXCHCOMPLETIONAVAILABLEN;
19729    output [7:0] LLKRXCHNONPOSTEDAVAILABLEN;
19730    output [7:0] LLKRXCHPOSTEDAVAILABLEN;
19731    output [7:0] LLKTCSTATUS;
19732    output [7:0] LLKTXCHCOMPLETIONREADYN;
19733    output [7:0] LLKTXCHNONPOSTEDREADYN;
19734    output [7:0] LLKTXCHPOSTEDREADYN;
19735    output [7:0] PIPETXDATAL0;
19736    output [7:0] PIPETXDATAL1;
19737    output [7:0] PIPETXDATAL2;
19738    output [7:0] PIPETXDATAL3;
19739    output [7:0] PIPETXDATAL4;
19740    output [7:0] PIPETXDATAL5;
19741    output [7:0] PIPETXDATAL6;
19742    output [7:0] PIPETXDATAL7;
19743    output [9:0] LLKTXCHANSPACE;
19744    input AUXPOWER;
19745    input COMPLIANCEAVOID;
19746    input CRMCORECLK;
19747    input CRMCORECLKDLO;
19748    input CRMCORECLKRXO;
19749    input CRMCORECLKTXO;
19750    input CRMLINKRSTN;
19751    input CRMMACRSTN;
19752    input CRMMGMTRSTN;
19753    input CRMNVRSTN;
19754    input CRMURSTN;
19755    input CRMUSERCFGRSTN;
19756    input CRMUSERCLK;
19757    input CRMUSERCLKRXO;
19758    input CRMUSERCLKTXO;
19759    input L0CFGDISABLESCRAMBLE;
19760    input L0CFGLOOPBACKMASTER;
19761    input L0LEGACYINTFUNCT0;
19762    input L0PMEREQIN;
19763    input L0SETCOMPLETERABORTERROR;
19764    input L0SETCOMPLETIONTIMEOUTCORRERROR;
19765    input L0SETCOMPLETIONTIMEOUTUNCORRERROR;
19766    input L0SETDETECTEDCORRERROR;
19767    input L0SETDETECTEDFATALERROR;
19768    input L0SETDETECTEDNONFATALERROR;
19769    input L0SETUNEXPECTEDCOMPLETIONCORRERROR;
19770    input L0SETUNEXPECTEDCOMPLETIONUNCORRERROR;
19771    input L0SETUNSUPPORTEDREQUESTNONPOSTEDERROR;
19772    input L0SETUNSUPPORTEDREQUESTOTHERERROR;
19773    input L0SETUSERDETECTEDPARITYERROR;
19774    input L0SETUSERMASTERDATAPARITY;
19775    input L0SETUSERRECEIVEDMASTERABORT;
19776    input L0SETUSERRECEIVEDTARGETABORT;
19777    input L0SETUSERSIGNALLEDTARGETABORT;
19778    input L0SETUSERSYSTEMERROR;
19779    input L0TRANSACTIONSPENDING;
19780    input LLKRXDSTCONTREQN;
19781    input LLKRXDSTREQN;
19782    input LLKTXEOFN;
19783    input LLKTXEOPN;
19784    input LLKTXSOFN;
19785    input LLKTXSOPN;
19786    input LLKTXSRCDSCN;
19787    input LLKTXSRCRDYN;
19788    input MGMTRDEN;
19789    input MGMTWREN;
19790    input PIPEPHYSTATUSL0;
19791    input PIPEPHYSTATUSL1;
19792    input PIPEPHYSTATUSL2;
19793    input PIPEPHYSTATUSL3;
19794    input PIPEPHYSTATUSL4;
19795    input PIPEPHYSTATUSL5;
19796    input PIPEPHYSTATUSL6;
19797    input PIPEPHYSTATUSL7;
19798    input PIPERXCHANISALIGNEDL0;
19799    input PIPERXCHANISALIGNEDL1;
19800    input PIPERXCHANISALIGNEDL2;
19801    input PIPERXCHANISALIGNEDL3;
19802    input PIPERXCHANISALIGNEDL4;
19803    input PIPERXCHANISALIGNEDL5;
19804    input PIPERXCHANISALIGNEDL6;
19805    input PIPERXCHANISALIGNEDL7;
19806    input PIPERXDATAKL0;
19807    input PIPERXDATAKL1;
19808    input PIPERXDATAKL2;
19809    input PIPERXDATAKL3;
19810    input PIPERXDATAKL4;
19811    input PIPERXDATAKL5;
19812    input PIPERXDATAKL6;
19813    input PIPERXDATAKL7;
19814    input PIPERXELECIDLEL0;
19815    input PIPERXELECIDLEL1;
19816    input PIPERXELECIDLEL2;
19817    input PIPERXELECIDLEL3;
19818    input PIPERXELECIDLEL4;
19819    input PIPERXELECIDLEL5;
19820    input PIPERXELECIDLEL6;
19821    input PIPERXELECIDLEL7;
19822    input PIPERXVALIDL0;
19823    input PIPERXVALIDL1;
19824    input PIPERXVALIDL2;
19825    input PIPERXVALIDL3;
19826    input PIPERXVALIDL4;
19827    input PIPERXVALIDL5;
19828    input PIPERXVALIDL6;
19829    input PIPERXVALIDL7;
19830    input [10:0] MGMTADDR;
19831    input [127:0] L0PACKETHEADERFROMUSER;
19832    input [1:0] LLKRXCHFIFO;
19833    input [1:0] LLKTXCHFIFO;
19834    input [1:0] LLKTXENABLEN;
19835    input [2:0] LLKRXCHTC;
19836    input [2:0] LLKTXCHTC;
19837    input [2:0] PIPERXSTATUSL0;
19838    input [2:0] PIPERXSTATUSL1;
19839    input [2:0] PIPERXSTATUSL2;
19840    input [2:0] PIPERXSTATUSL3;
19841    input [2:0] PIPERXSTATUSL4;
19842    input [2:0] PIPERXSTATUSL5;
19843    input [2:0] PIPERXSTATUSL6;
19844    input [2:0] PIPERXSTATUSL7;
19845    input [31:0] MGMTWDATA;
19846    input [3:0] L0MSIREQUEST0;
19847    input [3:0] MGMTBWREN;
19848    input [63:0] LLKTXDATA;
19849    input [63:0] MIMDLLBRDATA;
19850    input [63:0] MIMRXBRDATA;
19851    input [63:0] MIMTXBRDATA;
19852    input [6:0] MGMTSTATSCREDITSEL;
19853    input [7:0] PIPERXDATAL0;
19854    input [7:0] PIPERXDATAL1;
19855    input [7:0] PIPERXDATAL2;
19856    input [7:0] PIPERXDATAL3;
19857    input [7:0] PIPERXDATAL4;
19858    input [7:0] PIPERXDATAL5;
19859    input [7:0] PIPERXDATAL6;
19860    input [7:0] PIPERXDATAL7;
19861endmodule
19862
19863module PCIE_2_0 (...);
19864    parameter [11:0] AER_BASE_PTR = 12'h128;
19865    parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
19866    parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
19867    parameter [15:0] AER_CAP_ID = 16'h0001;
19868    parameter [4:0] AER_CAP_INT_MSG_NUM_MSI = 5'h0A;
19869    parameter [4:0] AER_CAP_INT_MSG_NUM_MSIX = 5'h15;
19870    parameter [11:0] AER_CAP_NEXTPTR = 12'h160;
19871    parameter AER_CAP_ON = "FALSE";
19872    parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE";
19873    parameter [3:0] AER_CAP_VERSION = 4'h1;
19874    parameter ALLOW_X8_GEN2 = "FALSE";
19875    parameter [31:0] BAR0 = 32'hFFFFFF00;
19876    parameter [31:0] BAR1 = 32'hFFFF0000;
19877    parameter [31:0] BAR2 = 32'hFFFF000C;
19878    parameter [31:0] BAR3 = 32'hFFFFFFFF;
19879    parameter [31:0] BAR4 = 32'h00000000;
19880    parameter [31:0] BAR5 = 32'h00000000;
19881    parameter [7:0] CAPABILITIES_PTR = 8'h40;
19882    parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000;
19883    parameter [23:0] CLASS_CODE = 24'h000000;
19884    parameter CMD_INTX_IMPLEMENTED = "TRUE";
19885    parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE";
19886    parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0;
19887    parameter [6:0] CRM_MODULE_RSTS = 7'h00;
19888    parameter [15:0] DEVICE_ID = 16'h0007;
19889    parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE";
19890    parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE";
19891    parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
19892    parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0;
19893    parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
19894    parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE";
19895    parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2;
19896    parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0;
19897    parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE";
19898    parameter integer DEV_CAP_RSVD_14_12 = 0;
19899    parameter integer DEV_CAP_RSVD_17_16 = 0;
19900    parameter integer DEV_CAP_RSVD_31_29 = 0;
19901    parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE";
19902    parameter DISABLE_ASPM_L1_TIMER = "FALSE";
19903    parameter DISABLE_BAR_FILTERING = "FALSE";
19904    parameter DISABLE_ID_CHECK = "FALSE";
19905    parameter DISABLE_LANE_REVERSAL = "FALSE";
19906    parameter DISABLE_RX_TC_FILTER = "FALSE";
19907    parameter DISABLE_SCRAMBLING = "FALSE";
19908    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
19909    parameter [11:0] DSN_BASE_PTR = 12'h100;
19910    parameter [15:0] DSN_CAP_ID = 16'h0003;
19911    parameter [11:0] DSN_CAP_NEXTPTR = 12'h000;
19912    parameter DSN_CAP_ON = "TRUE";
19913    parameter [3:0] DSN_CAP_VERSION = 4'h1;
19914    parameter [10:0] ENABLE_MSG_ROUTE = 11'h000;
19915    parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE";
19916    parameter ENTER_RVRY_EI_L0 = "TRUE";
19917    parameter EXIT_LOOPBACK_ON_EI = "TRUE";
19918    parameter [31:0] EXPANSION_ROM = 32'hFFFFF001;
19919    parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F;
19920    parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF;
19921    parameter [7:0] HEADER_TYPE = 8'h00;
19922    parameter [4:0] INFER_EI = 5'h00;
19923    parameter [7:0] INTERRUPT_PIN = 8'h01;
19924    parameter IS_SWITCH = "FALSE";
19925    parameter [9:0] LAST_CONFIG_DWORD = 10'h042;
19926    parameter integer LINK_CAP_ASPM_SUPPORT = 1;
19927    parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE";
19928    parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE";
19929    parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
19930    parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
19931    parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
19932    parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
19933    parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
19934    parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
19935    parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
19936    parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
19937    parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE";
19938    parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1;
19939    parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08;
19940    parameter integer LINK_CAP_RSVD_23_22 = 0;
19941    parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE";
19942    parameter integer LINK_CONTROL_RCB = 0;
19943    parameter LINK_CTRL2_DEEMPHASIS = "FALSE";
19944    parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE";
19945    parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2;
19946    parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
19947    parameter [14:0] LL_ACK_TIMEOUT = 15'h0000;
19948    parameter LL_ACK_TIMEOUT_EN = "FALSE";
19949    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
19950    parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000;
19951    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
19952    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
19953    parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01;
19954    parameter [7:0] MSIX_BASE_PTR = 8'h9C;
19955    parameter [7:0] MSIX_CAP_ID = 8'h11;
19956    parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00;
19957    parameter MSIX_CAP_ON = "FALSE";
19958    parameter integer MSIX_CAP_PBA_BIR = 0;
19959    parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050;
19960    parameter integer MSIX_CAP_TABLE_BIR = 0;
19961    parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040;
19962    parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000;
19963    parameter [7:0] MSI_BASE_PTR = 8'h48;
19964    parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE";
19965    parameter [7:0] MSI_CAP_ID = 8'h05;
19966    parameter integer MSI_CAP_MULTIMSGCAP = 0;
19967    parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0;
19968    parameter [7:0] MSI_CAP_NEXTPTR = 8'h60;
19969    parameter MSI_CAP_ON = "FALSE";
19970    parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE";
19971    parameter integer N_FTS_COMCLK_GEN1 = 255;
19972    parameter integer N_FTS_COMCLK_GEN2 = 255;
19973    parameter integer N_FTS_GEN1 = 255;
19974    parameter integer N_FTS_GEN2 = 255;
19975    parameter [7:0] PCIE_BASE_PTR = 8'h60;
19976    parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10;
19977    parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2;
19978    parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0;
19979    parameter [4:0] PCIE_CAP_INT_MSG_NUM = 5'h00;
19980    parameter [7:0] PCIE_CAP_NEXTPTR = 8'h00;
19981    parameter PCIE_CAP_ON = "TRUE";
19982    parameter integer PCIE_CAP_RSVD_15_14 = 0;
19983    parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE";
19984    parameter integer PCIE_REVISION = 2;
19985    parameter integer PGL0_LANE = 0;
19986    parameter integer PGL1_LANE = 1;
19987    parameter integer PGL2_LANE = 2;
19988    parameter integer PGL3_LANE = 3;
19989    parameter integer PGL4_LANE = 4;
19990    parameter integer PGL5_LANE = 5;
19991    parameter integer PGL6_LANE = 6;
19992    parameter integer PGL7_LANE = 7;
19993    parameter integer PL_AUTO_CONFIG = 0;
19994    parameter PL_FAST_TRAIN = "FALSE";
19995    parameter [7:0] PM_BASE_PTR = 8'h40;
19996    parameter integer PM_CAP_AUXCURRENT = 0;
19997    parameter PM_CAP_D1SUPPORT = "TRUE";
19998    parameter PM_CAP_D2SUPPORT = "TRUE";
19999    parameter PM_CAP_DSI = "FALSE";
20000    parameter [7:0] PM_CAP_ID = 8'h01;
20001    parameter [7:0] PM_CAP_NEXTPTR = 8'h48;
20002    parameter PM_CAP_ON = "TRUE";
20003    parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F;
20004    parameter PM_CAP_PME_CLOCK = "FALSE";
20005    parameter integer PM_CAP_RSVD_04 = 0;
20006    parameter integer PM_CAP_VERSION = 3;
20007    parameter PM_CSR_B2B3 = "FALSE";
20008    parameter PM_CSR_BPCCEN = "FALSE";
20009    parameter PM_CSR_NOSOFTRST = "TRUE";
20010    parameter [7:0] PM_DATA0 = 8'h01;
20011    parameter [7:0] PM_DATA1 = 8'h01;
20012    parameter [7:0] PM_DATA2 = 8'h01;
20013    parameter [7:0] PM_DATA3 = 8'h01;
20014    parameter [7:0] PM_DATA4 = 8'h01;
20015    parameter [7:0] PM_DATA5 = 8'h01;
20016    parameter [7:0] PM_DATA6 = 8'h01;
20017    parameter [7:0] PM_DATA7 = 8'h01;
20018    parameter [1:0] PM_DATA_SCALE0 = 2'h1;
20019    parameter [1:0] PM_DATA_SCALE1 = 2'h1;
20020    parameter [1:0] PM_DATA_SCALE2 = 2'h1;
20021    parameter [1:0] PM_DATA_SCALE3 = 2'h1;
20022    parameter [1:0] PM_DATA_SCALE4 = 2'h1;
20023    parameter [1:0] PM_DATA_SCALE5 = 2'h1;
20024    parameter [1:0] PM_DATA_SCALE6 = 2'h1;
20025    parameter [1:0] PM_DATA_SCALE7 = 2'h1;
20026    parameter integer RECRC_CHK = 0;
20027    parameter RECRC_CHK_TRIM = "FALSE";
20028    parameter [7:0] REVISION_ID = 8'h00;
20029    parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE";
20030    parameter SELECT_DLL_IF = "FALSE";
20031    parameter SIM_VERSION = "1.0";
20032    parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE";
20033    parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE";
20034    parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE";
20035    parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE";
20036    parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE";
20037    parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE";
20038    parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE";
20039    parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000;
20040    parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE";
20041    parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE";
20042    parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0;
20043    parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00;
20044    parameter integer SPARE_BIT0 = 0;
20045    parameter integer SPARE_BIT1 = 0;
20046    parameter integer SPARE_BIT2 = 0;
20047    parameter integer SPARE_BIT3 = 0;
20048    parameter integer SPARE_BIT4 = 0;
20049    parameter integer SPARE_BIT5 = 0;
20050    parameter integer SPARE_BIT6 = 0;
20051    parameter integer SPARE_BIT7 = 0;
20052    parameter integer SPARE_BIT8 = 0;
20053    parameter [7:0] SPARE_BYTE0 = 8'h00;
20054    parameter [7:0] SPARE_BYTE1 = 8'h00;
20055    parameter [7:0] SPARE_BYTE2 = 8'h00;
20056    parameter [7:0] SPARE_BYTE3 = 8'h00;
20057    parameter [31:0] SPARE_WORD0 = 32'h00000000;
20058    parameter [31:0] SPARE_WORD1 = 32'h00000000;
20059    parameter [31:0] SPARE_WORD2 = 32'h00000000;
20060    parameter [31:0] SPARE_WORD3 = 32'h00000000;
20061    parameter [15:0] SUBSYSTEM_ID = 16'h0007;
20062    parameter [15:0] SUBSYSTEM_VENDOR_ID = 16'h10EE;
20063    parameter TL_RBYPASS = "FALSE";
20064    parameter integer TL_RX_RAM_RADDR_LATENCY = 0;
20065    parameter integer TL_RX_RAM_RDATA_LATENCY = 2;
20066    parameter integer TL_RX_RAM_WRITE_LATENCY = 0;
20067    parameter TL_TFC_DISABLE = "FALSE";
20068    parameter TL_TX_CHECKS_DISABLE = "FALSE";
20069    parameter integer TL_TX_RAM_RADDR_LATENCY = 0;
20070    parameter integer TL_TX_RAM_RDATA_LATENCY = 2;
20071    parameter integer TL_TX_RAM_WRITE_LATENCY = 0;
20072    parameter UPCONFIG_CAPABLE = "TRUE";
20073    parameter UPSTREAM_FACING = "TRUE";
20074    parameter UR_INV_REQ = "TRUE";
20075    parameter integer USER_CLK_FREQ = 3;
20076    parameter VC0_CPL_INFINITE = "TRUE";
20077    parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF;
20078    parameter integer VC0_TOTAL_CREDITS_CD = 127;
20079    parameter integer VC0_TOTAL_CREDITS_CH = 31;
20080    parameter integer VC0_TOTAL_CREDITS_NPH = 12;
20081    parameter integer VC0_TOTAL_CREDITS_PD = 288;
20082    parameter integer VC0_TOTAL_CREDITS_PH = 32;
20083    parameter integer VC0_TX_LASTPACKET = 31;
20084    parameter [11:0] VC_BASE_PTR = 12'h10C;
20085    parameter [15:0] VC_CAP_ID = 16'h0002;
20086    parameter [11:0] VC_CAP_NEXTPTR = 12'h000;
20087    parameter VC_CAP_ON = "FALSE";
20088    parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE";
20089    parameter [3:0] VC_CAP_VERSION = 4'h1;
20090    parameter [15:0] VENDOR_ID = 16'h10EE;
20091    parameter [11:0] VSEC_BASE_PTR = 12'h160;
20092    parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234;
20093    parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018;
20094    parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1;
20095    parameter [15:0] VSEC_CAP_ID = 16'h000B;
20096    parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE";
20097    parameter [11:0] VSEC_CAP_NEXTPTR = 12'h000;
20098    parameter VSEC_CAP_ON = "FALSE";
20099    parameter [3:0] VSEC_CAP_VERSION = 4'h1;
20100    output CFGAERECRCCHECKEN;
20101    output CFGAERECRCGENEN;
20102    output CFGCOMMANDBUSMASTERENABLE;
20103    output CFGCOMMANDINTERRUPTDISABLE;
20104    output CFGCOMMANDIOENABLE;
20105    output CFGCOMMANDMEMENABLE;
20106    output CFGCOMMANDSERREN;
20107    output CFGDEVCONTROL2CPLTIMEOUTDIS;
20108    output CFGDEVCONTROLAUXPOWEREN;
20109    output CFGDEVCONTROLCORRERRREPORTINGEN;
20110    output CFGDEVCONTROLENABLERO;
20111    output CFGDEVCONTROLEXTTAGEN;
20112    output CFGDEVCONTROLFATALERRREPORTINGEN;
20113    output CFGDEVCONTROLNONFATALREPORTINGEN;
20114    output CFGDEVCONTROLNOSNOOPEN;
20115    output CFGDEVCONTROLPHANTOMEN;
20116    output CFGDEVCONTROLURERRREPORTINGEN;
20117    output CFGDEVSTATUSCORRERRDETECTED;
20118    output CFGDEVSTATUSFATALERRDETECTED;
20119    output CFGDEVSTATUSNONFATALERRDETECTED;
20120    output CFGDEVSTATUSURDETECTED;
20121    output CFGERRAERHEADERLOGSETN;
20122    output CFGERRCPLRDYN;
20123    output CFGINTERRUPTMSIENABLE;
20124    output CFGINTERRUPTMSIXENABLE;
20125    output CFGINTERRUPTMSIXFM;
20126    output CFGINTERRUPTRDYN;
20127    output CFGLINKCONTROLAUTOBANDWIDTHINTEN;
20128    output CFGLINKCONTROLBANDWIDTHINTEN;
20129    output CFGLINKCONTROLCLOCKPMEN;
20130    output CFGLINKCONTROLCOMMONCLOCK;
20131    output CFGLINKCONTROLEXTENDEDSYNC;
20132    output CFGLINKCONTROLHWAUTOWIDTHDIS;
20133    output CFGLINKCONTROLLINKDISABLE;
20134    output CFGLINKCONTROLRCB;
20135    output CFGLINKCONTROLRETRAINLINK;
20136    output CFGLINKSTATUSAUTOBANDWIDTHSTATUS;
20137    output CFGLINKSTATUSBANDWITHSTATUS;
20138    output CFGLINKSTATUSDLLACTIVE;
20139    output CFGLINKSTATUSLINKTRAINING;
20140    output CFGMSGRECEIVED;
20141    output CFGMSGRECEIVEDASSERTINTA;
20142    output CFGMSGRECEIVEDASSERTINTB;
20143    output CFGMSGRECEIVEDASSERTINTC;
20144    output CFGMSGRECEIVEDASSERTINTD;
20145    output CFGMSGRECEIVEDDEASSERTINTA;
20146    output CFGMSGRECEIVEDDEASSERTINTB;
20147    output CFGMSGRECEIVEDDEASSERTINTC;
20148    output CFGMSGRECEIVEDDEASSERTINTD;
20149    output CFGMSGRECEIVEDERRCOR;
20150    output CFGMSGRECEIVEDERRFATAL;
20151    output CFGMSGRECEIVEDERRNONFATAL;
20152    output CFGMSGRECEIVEDPMASNAK;
20153    output CFGMSGRECEIVEDPMETO;
20154    output CFGMSGRECEIVEDPMETOACK;
20155    output CFGMSGRECEIVEDPMPME;
20156    output CFGMSGRECEIVEDSETSLOTPOWERLIMIT;
20157    output CFGMSGRECEIVEDUNLOCK;
20158    output CFGPMCSRPMEEN;
20159    output CFGPMCSRPMESTATUS;
20160    output CFGPMRCVASREQL1N;
20161    output CFGPMRCVENTERL1N;
20162    output CFGPMRCVENTERL23N;
20163    output CFGPMRCVREQACKN;
20164    output CFGRDWRDONEN;
20165    output CFGSLOTCONTROLELECTROMECHILCTLPULSE;
20166    output CFGTRANSACTION;
20167    output CFGTRANSACTIONTYPE;
20168    output DBGSCLRA;
20169    output DBGSCLRB;
20170    output DBGSCLRC;
20171    output DBGSCLRD;
20172    output DBGSCLRE;
20173    output DBGSCLRF;
20174    output DBGSCLRG;
20175    output DBGSCLRH;
20176    output DBGSCLRI;
20177    output DBGSCLRJ;
20178    output DBGSCLRK;
20179    output DRPDRDY;
20180    output LL2BADDLLPERRN;
20181    output LL2BADTLPERRN;
20182    output LL2PROTOCOLERRN;
20183    output LL2REPLAYROERRN;
20184    output LL2REPLAYTOERRN;
20185    output LL2SUSPENDOKN;
20186    output LL2TFCINIT1SEQN;
20187    output LL2TFCINIT2SEQN;
20188    output LNKCLKEN;
20189    output MIMRXRCE;
20190    output MIMRXREN;
20191    output MIMRXWEN;
20192    output MIMTXRCE;
20193    output MIMTXREN;
20194    output MIMTXWEN;
20195    output PIPERX0POLARITY;
20196    output PIPERX1POLARITY;
20197    output PIPERX2POLARITY;
20198    output PIPERX3POLARITY;
20199    output PIPERX4POLARITY;
20200    output PIPERX5POLARITY;
20201    output PIPERX6POLARITY;
20202    output PIPERX7POLARITY;
20203    output PIPETX0COMPLIANCE;
20204    output PIPETX0ELECIDLE;
20205    output PIPETX1COMPLIANCE;
20206    output PIPETX1ELECIDLE;
20207    output PIPETX2COMPLIANCE;
20208    output PIPETX2ELECIDLE;
20209    output PIPETX3COMPLIANCE;
20210    output PIPETX3ELECIDLE;
20211    output PIPETX4COMPLIANCE;
20212    output PIPETX4ELECIDLE;
20213    output PIPETX5COMPLIANCE;
20214    output PIPETX5ELECIDLE;
20215    output PIPETX6COMPLIANCE;
20216    output PIPETX6ELECIDLE;
20217    output PIPETX7COMPLIANCE;
20218    output PIPETX7ELECIDLE;
20219    output PIPETXDEEMPH;
20220    output PIPETXRATE;
20221    output PIPETXRCVRDET;
20222    output PIPETXRESET;
20223    output PL2LINKUPN;
20224    output PL2RECEIVERERRN;
20225    output PL2RECOVERYN;
20226    output PL2RXELECIDLE;
20227    output PL2SUSPENDOK;
20228    output PLLINKGEN2CAP;
20229    output PLLINKPARTNERGEN2SUPPORTED;
20230    output PLLINKUPCFGCAP;
20231    output PLPHYLNKUPN;
20232    output PLRECEIVEDHOTRST;
20233    output PLSELLNKRATE;
20234    output RECEIVEDFUNCLVLRSTN;
20235    output TL2ASPMSUSPENDCREDITCHECKOKN;
20236    output TL2ASPMSUSPENDREQN;
20237    output TL2PPMSUSPENDOKN;
20238    output TRNLNKUPN;
20239    output TRNRDLLPSRCRDYN;
20240    output TRNRECRCERRN;
20241    output TRNREOFN;
20242    output TRNRERRFWDN;
20243    output TRNRREMN;
20244    output TRNRSOFN;
20245    output TRNRSRCDSCN;
20246    output TRNRSRCRDYN;
20247    output TRNTCFGREQN;
20248    output TRNTDLLPDSTRDYN;
20249    output TRNTDSTRDYN;
20250    output TRNTERRDROPN;
20251    output USERRSTN;
20252    output [11:0] DBGVECC;
20253    output [11:0] PLDBGVEC;
20254    output [11:0] TRNFCCPLD;
20255    output [11:0] TRNFCNPD;
20256    output [11:0] TRNFCPD;
20257    output [12:0] MIMRXRADDR;
20258    output [12:0] MIMRXWADDR;
20259    output [12:0] MIMTXRADDR;
20260    output [12:0] MIMTXWADDR;
20261    output [15:0] CFGMSGDATA;
20262    output [15:0] DRPDO;
20263    output [15:0] PIPETX0DATA;
20264    output [15:0] PIPETX1DATA;
20265    output [15:0] PIPETX2DATA;
20266    output [15:0] PIPETX3DATA;
20267    output [15:0] PIPETX4DATA;
20268    output [15:0] PIPETX5DATA;
20269    output [15:0] PIPETX6DATA;
20270    output [15:0] PIPETX7DATA;
20271    output [1:0] CFGLINKCONTROLASPMCONTROL;
20272    output [1:0] CFGLINKSTATUSCURRENTSPEED;
20273    output [1:0] CFGPMCSRPOWERSTATE;
20274    output [1:0] PIPETX0CHARISK;
20275    output [1:0] PIPETX0POWERDOWN;
20276    output [1:0] PIPETX1CHARISK;
20277    output [1:0] PIPETX1POWERDOWN;
20278    output [1:0] PIPETX2CHARISK;
20279    output [1:0] PIPETX2POWERDOWN;
20280    output [1:0] PIPETX3CHARISK;
20281    output [1:0] PIPETX3POWERDOWN;
20282    output [1:0] PIPETX4CHARISK;
20283    output [1:0] PIPETX4POWERDOWN;
20284    output [1:0] PIPETX5CHARISK;
20285    output [1:0] PIPETX5POWERDOWN;
20286    output [1:0] PIPETX6CHARISK;
20287    output [1:0] PIPETX6POWERDOWN;
20288    output [1:0] PIPETX7CHARISK;
20289    output [1:0] PIPETX7POWERDOWN;
20290    output [1:0] PLLANEREVERSALMODE;
20291    output [1:0] PLRXPMSTATE;
20292    output [1:0] PLSELLNKWIDTH;
20293    output [2:0] CFGDEVCONTROLMAXPAYLOAD;
20294    output [2:0] CFGDEVCONTROLMAXREADREQ;
20295    output [2:0] CFGINTERRUPTMMENABLE;
20296    output [2:0] CFGPCIELINKSTATE;
20297    output [2:0] PIPETXMARGIN;
20298    output [2:0] PLINITIALLINKWIDTH;
20299    output [2:0] PLTXPMSTATE;
20300    output [31:0] CFGDO;
20301    output [31:0] TRNRDLLPDATA;
20302    output [3:0] CFGDEVCONTROL2CPLTIMEOUTVAL;
20303    output [3:0] CFGLINKSTATUSNEGOTIATEDWIDTH;
20304    output [5:0] PLLTSSMSTATE;
20305    output [5:0] TRNTBUFAV;
20306    output [63:0] DBGVECA;
20307    output [63:0] DBGVECB;
20308    output [63:0] TRNRD;
20309    output [67:0] MIMRXWDATA;
20310    output [68:0] MIMTXWDATA;
20311    output [6:0] CFGTRANSACTIONADDR;
20312    output [6:0] CFGVCTCVCMAP;
20313    output [6:0] TRNRBARHITN;
20314    output [7:0] CFGINTERRUPTDO;
20315    output [7:0] TRNFCCPLH;
20316    output [7:0] TRNFCNPH;
20317    output [7:0] TRNFCPH;
20318    input CFGERRACSN;
20319    input CFGERRCORN;
20320    input CFGERRCPLABORTN;
20321    input CFGERRCPLTIMEOUTN;
20322    input CFGERRCPLUNEXPECTN;
20323    input CFGERRECRCN;
20324    input CFGERRLOCKEDN;
20325    input CFGERRPOSTEDN;
20326    input CFGERRURN;
20327    input CFGINTERRUPTASSERTN;
20328    input CFGINTERRUPTN;
20329    input CFGPMDIRECTASPML1N;
20330    input CFGPMSENDPMACKN;
20331    input CFGPMSENDPMETON;
20332    input CFGPMSENDPMNAKN;
20333    input CFGPMTURNOFFOKN;
20334    input CFGPMWAKEN;
20335    input CFGRDENN;
20336    input CFGTRNPENDINGN;
20337    input CFGWRENN;
20338    input CFGWRREADONLYN;
20339    input CFGWRRW1CASRWN;
20340    input CMRSTN;
20341    input CMSTICKYRSTN;
20342    input DBGSUBMODE;
20343    input DLRSTN;
20344    input DRPCLK;
20345    input DRPDEN;
20346    input DRPDWE;
20347    input FUNCLVLRSTN;
20348    input LL2SENDASREQL1N;
20349    input LL2SENDENTERL1N;
20350    input LL2SENDENTERL23N;
20351    input LL2SUSPENDNOWN;
20352    input LL2TLPRCVN;
20353    input PIPECLK;
20354    input PIPERX0CHANISALIGNED;
20355    input PIPERX0ELECIDLE;
20356    input PIPERX0PHYSTATUS;
20357    input PIPERX0VALID;
20358    input PIPERX1CHANISALIGNED;
20359    input PIPERX1ELECIDLE;
20360    input PIPERX1PHYSTATUS;
20361    input PIPERX1VALID;
20362    input PIPERX2CHANISALIGNED;
20363    input PIPERX2ELECIDLE;
20364    input PIPERX2PHYSTATUS;
20365    input PIPERX2VALID;
20366    input PIPERX3CHANISALIGNED;
20367    input PIPERX3ELECIDLE;
20368    input PIPERX3PHYSTATUS;
20369    input PIPERX3VALID;
20370    input PIPERX4CHANISALIGNED;
20371    input PIPERX4ELECIDLE;
20372    input PIPERX4PHYSTATUS;
20373    input PIPERX4VALID;
20374    input PIPERX5CHANISALIGNED;
20375    input PIPERX5ELECIDLE;
20376    input PIPERX5PHYSTATUS;
20377    input PIPERX5VALID;
20378    input PIPERX6CHANISALIGNED;
20379    input PIPERX6ELECIDLE;
20380    input PIPERX6PHYSTATUS;
20381    input PIPERX6VALID;
20382    input PIPERX7CHANISALIGNED;
20383    input PIPERX7ELECIDLE;
20384    input PIPERX7PHYSTATUS;
20385    input PIPERX7VALID;
20386    input PLDIRECTEDLINKAUTON;
20387    input PLDIRECTEDLINKSPEED;
20388    input PLDOWNSTREAMDEEMPHSOURCE;
20389    input PLRSTN;
20390    input PLTRANSMITHOTRST;
20391    input PLUPSTREAMPREFERDEEMPH;
20392    input SYSRSTN;
20393    input TL2ASPMSUSPENDCREDITCHECKN;
20394    input TL2PPMSUSPENDREQN;
20395    input TLRSTN;
20396    input TRNRDSTRDYN;
20397    input TRNRNPOKN;
20398    input TRNTCFGGNTN;
20399    input TRNTDLLPSRCRDYN;
20400    input TRNTECRCGENN;
20401    input TRNTEOFN;
20402    input TRNTERRFWDN;
20403    input TRNTREMN;
20404    input TRNTSOFN;
20405    input TRNTSRCDSCN;
20406    input TRNTSRCRDYN;
20407    input TRNTSTRN;
20408    input USERCLK;
20409    input [127:0] CFGERRAERHEADERLOG;
20410    input [15:0] DRPDI;
20411    input [15:0] PIPERX0DATA;
20412    input [15:0] PIPERX1DATA;
20413    input [15:0] PIPERX2DATA;
20414    input [15:0] PIPERX3DATA;
20415    input [15:0] PIPERX4DATA;
20416    input [15:0] PIPERX5DATA;
20417    input [15:0] PIPERX6DATA;
20418    input [15:0] PIPERX7DATA;
20419    input [1:0] DBGMODE;
20420    input [1:0] PIPERX0CHARISK;
20421    input [1:0] PIPERX1CHARISK;
20422    input [1:0] PIPERX2CHARISK;
20423    input [1:0] PIPERX3CHARISK;
20424    input [1:0] PIPERX4CHARISK;
20425    input [1:0] PIPERX5CHARISK;
20426    input [1:0] PIPERX6CHARISK;
20427    input [1:0] PIPERX7CHARISK;
20428    input [1:0] PLDIRECTEDLINKCHANGE;
20429    input [1:0] PLDIRECTEDLINKWIDTH;
20430    input [2:0] CFGDSFUNCTIONNUMBER;
20431    input [2:0] PIPERX0STATUS;
20432    input [2:0] PIPERX1STATUS;
20433    input [2:0] PIPERX2STATUS;
20434    input [2:0] PIPERX3STATUS;
20435    input [2:0] PIPERX4STATUS;
20436    input [2:0] PIPERX5STATUS;
20437    input [2:0] PIPERX6STATUS;
20438    input [2:0] PIPERX7STATUS;
20439    input [2:0] PLDBGMODE;
20440    input [2:0] TRNFCSEL;
20441    input [31:0] CFGDI;
20442    input [31:0] TRNTDLLPDATA;
20443    input [3:0] CFGBYTEENN;
20444    input [47:0] CFGERRTLPCPLHEADER;
20445    input [4:0] CFGDSDEVICENUMBER;
20446    input [4:0] PL2DIRECTEDLSTATE;
20447    input [63:0] CFGDSN;
20448    input [63:0] TRNTD;
20449    input [67:0] MIMRXRDATA;
20450    input [68:0] MIMTXRDATA;
20451    input [7:0] CFGDSBUSNUMBER;
20452    input [7:0] CFGINTERRUPTDI;
20453    input [7:0] CFGPORTNUMBER;
20454    input [8:0] DRPDADDR;
20455    input [9:0] CFGDWADDR;
20456endmodule
20457
20458module PCIE_2_1 (...);
20459    parameter [11:0] AER_BASE_PTR = 12'h140;
20460    parameter AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
20461    parameter AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
20462    parameter [15:0] AER_CAP_ID = 16'h0001;
20463    parameter AER_CAP_MULTIHEADER = "FALSE";
20464    parameter [11:0] AER_CAP_NEXTPTR = 12'h178;
20465    parameter AER_CAP_ON = "FALSE";
20466    parameter [23:0] AER_CAP_OPTIONAL_ERR_SUPPORT = 24'h000000;
20467    parameter AER_CAP_PERMIT_ROOTERR_UPDATE = "TRUE";
20468    parameter [3:0] AER_CAP_VERSION = 4'h2;
20469    parameter ALLOW_X8_GEN2 = "FALSE";
20470    parameter [31:0] BAR0 = 32'hFFFFFF00;
20471    parameter [31:0] BAR1 = 32'hFFFF0000;
20472    parameter [31:0] BAR2 = 32'hFFFF000C;
20473    parameter [31:0] BAR3 = 32'hFFFFFFFF;
20474    parameter [31:0] BAR4 = 32'h00000000;
20475    parameter [31:0] BAR5 = 32'h00000000;
20476    parameter [7:0] CAPABILITIES_PTR = 8'h40;
20477    parameter [31:0] CARDBUS_CIS_POINTER = 32'h00000000;
20478    parameter integer CFG_ECRC_ERR_CPLSTAT = 0;
20479    parameter [23:0] CLASS_CODE = 24'h000000;
20480    parameter CMD_INTX_IMPLEMENTED = "TRUE";
20481    parameter CPL_TIMEOUT_DISABLE_SUPPORTED = "FALSE";
20482    parameter [3:0] CPL_TIMEOUT_RANGES_SUPPORTED = 4'h0;
20483    parameter [6:0] CRM_MODULE_RSTS = 7'h00;
20484    parameter DEV_CAP2_ARI_FORWARDING_SUPPORTED = "FALSE";
20485    parameter DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED = "FALSE";
20486    parameter DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED = "FALSE";
20487    parameter DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED = "FALSE";
20488    parameter DEV_CAP2_CAS128_COMPLETER_SUPPORTED = "FALSE";
20489    parameter DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED = "FALSE";
20490    parameter DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED = "FALSE";
20491    parameter DEV_CAP2_LTR_MECHANISM_SUPPORTED = "FALSE";
20492    parameter [1:0] DEV_CAP2_MAX_ENDEND_TLP_PREFIXES = 2'h0;
20493    parameter DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING = "FALSE";
20494    parameter [1:0] DEV_CAP2_TPH_COMPLETER_SUPPORTED = 2'h0;
20495    parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE = "TRUE";
20496    parameter DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE = "TRUE";
20497    parameter integer DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
20498    parameter integer DEV_CAP_ENDPOINT_L1_LATENCY = 0;
20499    parameter DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
20500    parameter DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "FALSE";
20501    parameter integer DEV_CAP_MAX_PAYLOAD_SUPPORTED = 2;
20502    parameter integer DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT = 0;
20503    parameter DEV_CAP_ROLE_BASED_ERROR = "TRUE";
20504    parameter integer DEV_CAP_RSVD_14_12 = 0;
20505    parameter integer DEV_CAP_RSVD_17_16 = 0;
20506    parameter integer DEV_CAP_RSVD_31_29 = 0;
20507    parameter DEV_CONTROL_AUX_POWER_SUPPORTED = "FALSE";
20508    parameter DEV_CONTROL_EXT_TAG_DEFAULT = "FALSE";
20509    parameter DISABLE_ASPM_L1_TIMER = "FALSE";
20510    parameter DISABLE_BAR_FILTERING = "FALSE";
20511    parameter DISABLE_ERR_MSG = "FALSE";
20512    parameter DISABLE_ID_CHECK = "FALSE";
20513    parameter DISABLE_LANE_REVERSAL = "FALSE";
20514    parameter DISABLE_LOCKED_FILTER = "FALSE";
20515    parameter DISABLE_PPM_FILTER = "FALSE";
20516    parameter DISABLE_RX_POISONED_RESP = "FALSE";
20517    parameter DISABLE_RX_TC_FILTER = "FALSE";
20518    parameter DISABLE_SCRAMBLING = "FALSE";
20519    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
20520    parameter [11:0] DSN_BASE_PTR = 12'h100;
20521    parameter [15:0] DSN_CAP_ID = 16'h0003;
20522    parameter [11:0] DSN_CAP_NEXTPTR = 12'h10C;
20523    parameter DSN_CAP_ON = "TRUE";
20524    parameter [3:0] DSN_CAP_VERSION = 4'h1;
20525    parameter [10:0] ENABLE_MSG_ROUTE = 11'h000;
20526    parameter ENABLE_RX_TD_ECRC_TRIM = "FALSE";
20527    parameter ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED = "FALSE";
20528    parameter ENTER_RVRY_EI_L0 = "TRUE";
20529    parameter EXIT_LOOPBACK_ON_EI = "TRUE";
20530    parameter [31:0] EXPANSION_ROM = 32'hFFFFF001;
20531    parameter [5:0] EXT_CFG_CAP_PTR = 6'h3F;
20532    parameter [9:0] EXT_CFG_XP_CAP_PTR = 10'h3FF;
20533    parameter [7:0] HEADER_TYPE = 8'h00;
20534    parameter [4:0] INFER_EI = 5'h00;
20535    parameter [7:0] INTERRUPT_PIN = 8'h01;
20536    parameter INTERRUPT_STAT_AUTO = "TRUE";
20537    parameter IS_SWITCH = "FALSE";
20538    parameter [9:0] LAST_CONFIG_DWORD = 10'h3FF;
20539    parameter LINK_CAP_ASPM_OPTIONALITY = "TRUE";
20540    parameter integer LINK_CAP_ASPM_SUPPORT = 1;
20541    parameter LINK_CAP_CLOCK_POWER_MANAGEMENT = "FALSE";
20542    parameter LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP = "FALSE";
20543    parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
20544    parameter integer LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
20545    parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
20546    parameter integer LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
20547    parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
20548    parameter integer LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
20549    parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
20550    parameter integer LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
20551    parameter LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP = "FALSE";
20552    parameter [3:0] LINK_CAP_MAX_LINK_SPEED = 4'h1;
20553    parameter [5:0] LINK_CAP_MAX_LINK_WIDTH = 6'h08;
20554    parameter integer LINK_CAP_RSVD_23 = 0;
20555    parameter LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE = "FALSE";
20556    parameter integer LINK_CONTROL_RCB = 0;
20557    parameter LINK_CTRL2_DEEMPHASIS = "FALSE";
20558    parameter LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE = "FALSE";
20559    parameter [3:0] LINK_CTRL2_TARGET_LINK_SPEED = 4'h2;
20560    parameter LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
20561    parameter [14:0] LL_ACK_TIMEOUT = 15'h0000;
20562    parameter LL_ACK_TIMEOUT_EN = "FALSE";
20563    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
20564    parameter [14:0] LL_REPLAY_TIMEOUT = 15'h0000;
20565    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
20566    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
20567    parameter [5:0] LTSSM_MAX_LINK_WIDTH = 6'h01;
20568    parameter MPS_FORCE = "FALSE";
20569    parameter [7:0] MSIX_BASE_PTR = 8'h9C;
20570    parameter [7:0] MSIX_CAP_ID = 8'h11;
20571    parameter [7:0] MSIX_CAP_NEXTPTR = 8'h00;
20572    parameter MSIX_CAP_ON = "FALSE";
20573    parameter integer MSIX_CAP_PBA_BIR = 0;
20574    parameter [28:0] MSIX_CAP_PBA_OFFSET = 29'h00000050;
20575    parameter integer MSIX_CAP_TABLE_BIR = 0;
20576    parameter [28:0] MSIX_CAP_TABLE_OFFSET = 29'h00000040;
20577    parameter [10:0] MSIX_CAP_TABLE_SIZE = 11'h000;
20578    parameter [7:0] MSI_BASE_PTR = 8'h48;
20579    parameter MSI_CAP_64_BIT_ADDR_CAPABLE = "TRUE";
20580    parameter [7:0] MSI_CAP_ID = 8'h05;
20581    parameter integer MSI_CAP_MULTIMSGCAP = 0;
20582    parameter integer MSI_CAP_MULTIMSG_EXTENSION = 0;
20583    parameter [7:0] MSI_CAP_NEXTPTR = 8'h60;
20584    parameter MSI_CAP_ON = "FALSE";
20585    parameter MSI_CAP_PER_VECTOR_MASKING_CAPABLE = "TRUE";
20586    parameter integer N_FTS_COMCLK_GEN1 = 255;
20587    parameter integer N_FTS_COMCLK_GEN2 = 255;
20588    parameter integer N_FTS_GEN1 = 255;
20589    parameter integer N_FTS_GEN2 = 255;
20590    parameter [7:0] PCIE_BASE_PTR = 8'h60;
20591    parameter [7:0] PCIE_CAP_CAPABILITY_ID = 8'h10;
20592    parameter [3:0] PCIE_CAP_CAPABILITY_VERSION = 4'h2;
20593    parameter [3:0] PCIE_CAP_DEVICE_PORT_TYPE = 4'h0;
20594    parameter [7:0] PCIE_CAP_NEXTPTR = 8'h9C;
20595    parameter PCIE_CAP_ON = "TRUE";
20596    parameter integer PCIE_CAP_RSVD_15_14 = 0;
20597    parameter PCIE_CAP_SLOT_IMPLEMENTED = "FALSE";
20598    parameter integer PCIE_REVISION = 2;
20599    parameter integer PL_AUTO_CONFIG = 0;
20600    parameter PL_FAST_TRAIN = "FALSE";
20601    parameter [14:0] PM_ASPML0S_TIMEOUT = 15'h0000;
20602    parameter PM_ASPML0S_TIMEOUT_EN = "FALSE";
20603    parameter integer PM_ASPML0S_TIMEOUT_FUNC = 0;
20604    parameter PM_ASPM_FASTEXIT = "FALSE";
20605    parameter [7:0] PM_BASE_PTR = 8'h40;
20606    parameter integer PM_CAP_AUXCURRENT = 0;
20607    parameter PM_CAP_D1SUPPORT = "TRUE";
20608    parameter PM_CAP_D2SUPPORT = "TRUE";
20609    parameter PM_CAP_DSI = "FALSE";
20610    parameter [7:0] PM_CAP_ID = 8'h01;
20611    parameter [7:0] PM_CAP_NEXTPTR = 8'h48;
20612    parameter PM_CAP_ON = "TRUE";
20613    parameter [4:0] PM_CAP_PMESUPPORT = 5'h0F;
20614    parameter PM_CAP_PME_CLOCK = "FALSE";
20615    parameter integer PM_CAP_RSVD_04 = 0;
20616    parameter integer PM_CAP_VERSION = 3;
20617    parameter PM_CSR_B2B3 = "FALSE";
20618    parameter PM_CSR_BPCCEN = "FALSE";
20619    parameter PM_CSR_NOSOFTRST = "TRUE";
20620    parameter [7:0] PM_DATA0 = 8'h01;
20621    parameter [7:0] PM_DATA1 = 8'h01;
20622    parameter [7:0] PM_DATA2 = 8'h01;
20623    parameter [7:0] PM_DATA3 = 8'h01;
20624    parameter [7:0] PM_DATA4 = 8'h01;
20625    parameter [7:0] PM_DATA5 = 8'h01;
20626    parameter [7:0] PM_DATA6 = 8'h01;
20627    parameter [7:0] PM_DATA7 = 8'h01;
20628    parameter [1:0] PM_DATA_SCALE0 = 2'h1;
20629    parameter [1:0] PM_DATA_SCALE1 = 2'h1;
20630    parameter [1:0] PM_DATA_SCALE2 = 2'h1;
20631    parameter [1:0] PM_DATA_SCALE3 = 2'h1;
20632    parameter [1:0] PM_DATA_SCALE4 = 2'h1;
20633    parameter [1:0] PM_DATA_SCALE5 = 2'h1;
20634    parameter [1:0] PM_DATA_SCALE6 = 2'h1;
20635    parameter [1:0] PM_DATA_SCALE7 = 2'h1;
20636    parameter PM_MF = "FALSE";
20637    parameter [11:0] RBAR_BASE_PTR = 12'h178;
20638    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR0 = 5'h00;
20639    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR1 = 5'h00;
20640    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR2 = 5'h00;
20641    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR3 = 5'h00;
20642    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR4 = 5'h00;
20643    parameter [4:0] RBAR_CAP_CONTROL_ENCODEDBAR5 = 5'h00;
20644    parameter [15:0] RBAR_CAP_ID = 16'h0015;
20645    parameter [2:0] RBAR_CAP_INDEX0 = 3'h0;
20646    parameter [2:0] RBAR_CAP_INDEX1 = 3'h0;
20647    parameter [2:0] RBAR_CAP_INDEX2 = 3'h0;
20648    parameter [2:0] RBAR_CAP_INDEX3 = 3'h0;
20649    parameter [2:0] RBAR_CAP_INDEX4 = 3'h0;
20650    parameter [2:0] RBAR_CAP_INDEX5 = 3'h0;
20651    parameter [11:0] RBAR_CAP_NEXTPTR = 12'h000;
20652    parameter RBAR_CAP_ON = "FALSE";
20653    parameter [31:0] RBAR_CAP_SUP0 = 32'h00000000;
20654    parameter [31:0] RBAR_CAP_SUP1 = 32'h00000000;
20655    parameter [31:0] RBAR_CAP_SUP2 = 32'h00000000;
20656    parameter [31:0] RBAR_CAP_SUP3 = 32'h00000000;
20657    parameter [31:0] RBAR_CAP_SUP4 = 32'h00000000;
20658    parameter [31:0] RBAR_CAP_SUP5 = 32'h00000000;
20659    parameter [3:0] RBAR_CAP_VERSION = 4'h1;
20660    parameter [2:0] RBAR_NUM = 3'h1;
20661    parameter integer RECRC_CHK = 0;
20662    parameter RECRC_CHK_TRIM = "FALSE";
20663    parameter ROOT_CAP_CRS_SW_VISIBILITY = "FALSE";
20664    parameter [1:0] RP_AUTO_SPD = 2'h1;
20665    parameter [4:0] RP_AUTO_SPD_LOOPCNT = 5'h1F;
20666    parameter SELECT_DLL_IF = "FALSE";
20667    parameter SIM_VERSION = "1.0";
20668    parameter SLOT_CAP_ATT_BUTTON_PRESENT = "FALSE";
20669    parameter SLOT_CAP_ATT_INDICATOR_PRESENT = "FALSE";
20670    parameter SLOT_CAP_ELEC_INTERLOCK_PRESENT = "FALSE";
20671    parameter SLOT_CAP_HOTPLUG_CAPABLE = "FALSE";
20672    parameter SLOT_CAP_HOTPLUG_SURPRISE = "FALSE";
20673    parameter SLOT_CAP_MRL_SENSOR_PRESENT = "FALSE";
20674    parameter SLOT_CAP_NO_CMD_COMPLETED_SUPPORT = "FALSE";
20675    parameter [12:0] SLOT_CAP_PHYSICAL_SLOT_NUM = 13'h0000;
20676    parameter SLOT_CAP_POWER_CONTROLLER_PRESENT = "FALSE";
20677    parameter SLOT_CAP_POWER_INDICATOR_PRESENT = "FALSE";
20678    parameter integer SLOT_CAP_SLOT_POWER_LIMIT_SCALE = 0;
20679    parameter [7:0] SLOT_CAP_SLOT_POWER_LIMIT_VALUE = 8'h00;
20680    parameter integer SPARE_BIT0 = 0;
20681    parameter integer SPARE_BIT1 = 0;
20682    parameter integer SPARE_BIT2 = 0;
20683    parameter integer SPARE_BIT3 = 0;
20684    parameter integer SPARE_BIT4 = 0;
20685    parameter integer SPARE_BIT5 = 0;
20686    parameter integer SPARE_BIT6 = 0;
20687    parameter integer SPARE_BIT7 = 0;
20688    parameter integer SPARE_BIT8 = 0;
20689    parameter [7:0] SPARE_BYTE0 = 8'h00;
20690    parameter [7:0] SPARE_BYTE1 = 8'h00;
20691    parameter [7:0] SPARE_BYTE2 = 8'h00;
20692    parameter [7:0] SPARE_BYTE3 = 8'h00;
20693    parameter [31:0] SPARE_WORD0 = 32'h00000000;
20694    parameter [31:0] SPARE_WORD1 = 32'h00000000;
20695    parameter [31:0] SPARE_WORD2 = 32'h00000000;
20696    parameter [31:0] SPARE_WORD3 = 32'h00000000;
20697    parameter SSL_MESSAGE_AUTO = "FALSE";
20698    parameter TECRC_EP_INV = "FALSE";
20699    parameter TL_RBYPASS = "FALSE";
20700    parameter integer TL_RX_RAM_RADDR_LATENCY = 0;
20701    parameter integer TL_RX_RAM_RDATA_LATENCY = 2;
20702    parameter integer TL_RX_RAM_WRITE_LATENCY = 0;
20703    parameter TL_TFC_DISABLE = "FALSE";
20704    parameter TL_TX_CHECKS_DISABLE = "FALSE";
20705    parameter integer TL_TX_RAM_RADDR_LATENCY = 0;
20706    parameter integer TL_TX_RAM_RDATA_LATENCY = 2;
20707    parameter integer TL_TX_RAM_WRITE_LATENCY = 0;
20708    parameter TRN_DW = "FALSE";
20709    parameter TRN_NP_FC = "FALSE";
20710    parameter UPCONFIG_CAPABLE = "TRUE";
20711    parameter UPSTREAM_FACING = "TRUE";
20712    parameter UR_ATOMIC = "TRUE";
20713    parameter UR_CFG1 = "TRUE";
20714    parameter UR_INV_REQ = "TRUE";
20715    parameter UR_PRS_RESPONSE = "TRUE";
20716    parameter USER_CLK2_DIV2 = "FALSE";
20717    parameter integer USER_CLK_FREQ = 3;
20718    parameter USE_RID_PINS = "FALSE";
20719    parameter VC0_CPL_INFINITE = "TRUE";
20720    parameter [12:0] VC0_RX_RAM_LIMIT = 13'h03FF;
20721    parameter integer VC0_TOTAL_CREDITS_CD = 127;
20722    parameter integer VC0_TOTAL_CREDITS_CH = 31;
20723    parameter integer VC0_TOTAL_CREDITS_NPD = 24;
20724    parameter integer VC0_TOTAL_CREDITS_NPH = 12;
20725    parameter integer VC0_TOTAL_CREDITS_PD = 288;
20726    parameter integer VC0_TOTAL_CREDITS_PH = 32;
20727    parameter integer VC0_TX_LASTPACKET = 31;
20728    parameter [11:0] VC_BASE_PTR = 12'h10C;
20729    parameter [15:0] VC_CAP_ID = 16'h0002;
20730    parameter [11:0] VC_CAP_NEXTPTR = 12'h000;
20731    parameter VC_CAP_ON = "FALSE";
20732    parameter VC_CAP_REJECT_SNOOP_TRANSACTIONS = "FALSE";
20733    parameter [3:0] VC_CAP_VERSION = 4'h1;
20734    parameter [11:0] VSEC_BASE_PTR = 12'h128;
20735    parameter [15:0] VSEC_CAP_HDR_ID = 16'h1234;
20736    parameter [11:0] VSEC_CAP_HDR_LENGTH = 12'h018;
20737    parameter [3:0] VSEC_CAP_HDR_REVISION = 4'h1;
20738    parameter [15:0] VSEC_CAP_ID = 16'h000B;
20739    parameter VSEC_CAP_IS_LINK_VISIBLE = "TRUE";
20740    parameter [11:0] VSEC_CAP_NEXTPTR = 12'h140;
20741    parameter VSEC_CAP_ON = "FALSE";
20742    parameter [3:0] VSEC_CAP_VERSION = 4'h1;
20743    output CFGAERECRCCHECKEN;
20744    output CFGAERECRCGENEN;
20745    output CFGAERROOTERRCORRERRRECEIVED;
20746    output CFGAERROOTERRCORRERRREPORTINGEN;
20747    output CFGAERROOTERRFATALERRRECEIVED;
20748    output CFGAERROOTERRFATALERRREPORTINGEN;
20749    output CFGAERROOTERRNONFATALERRRECEIVED;
20750    output CFGAERROOTERRNONFATALERRREPORTINGEN;
20751    output CFGBRIDGESERREN;
20752    output CFGCOMMANDBUSMASTERENABLE;
20753    output CFGCOMMANDINTERRUPTDISABLE;
20754    output CFGCOMMANDIOENABLE;
20755    output CFGCOMMANDMEMENABLE;
20756    output CFGCOMMANDSERREN;
20757    output CFGDEVCONTROL2ARIFORWARDEN;
20758    output CFGDEVCONTROL2ATOMICEGRESSBLOCK;
20759    output CFGDEVCONTROL2ATOMICREQUESTEREN;
20760    output CFGDEVCONTROL2CPLTIMEOUTDIS;
20761    output CFGDEVCONTROL2IDOCPLEN;
20762    output CFGDEVCONTROL2IDOREQEN;
20763    output CFGDEVCONTROL2LTREN;
20764    output CFGDEVCONTROL2TLPPREFIXBLOCK;
20765    output CFGDEVCONTROLAUXPOWEREN;
20766    output CFGDEVCONTROLCORRERRREPORTINGEN;
20767    output CFGDEVCONTROLENABLERO;
20768    output CFGDEVCONTROLEXTTAGEN;
20769    output CFGDEVCONTROLFATALERRREPORTINGEN;
20770    output CFGDEVCONTROLNONFATALREPORTINGEN;
20771    output CFGDEVCONTROLNOSNOOPEN;
20772    output CFGDEVCONTROLPHANTOMEN;
20773    output CFGDEVCONTROLURERRREPORTINGEN;
20774    output CFGDEVSTATUSCORRERRDETECTED;
20775    output CFGDEVSTATUSFATALERRDETECTED;
20776    output CFGDEVSTATUSNONFATALERRDETECTED;
20777    output CFGDEVSTATUSURDETECTED;
20778    output CFGERRAERHEADERLOGSETN;
20779    output CFGERRCPLRDYN;
20780    output CFGINTERRUPTMSIENABLE;
20781    output CFGINTERRUPTMSIXENABLE;
20782    output CFGINTERRUPTMSIXFM;
20783    output CFGINTERRUPTRDYN;
20784    output CFGLINKCONTROLAUTOBANDWIDTHINTEN;
20785    output CFGLINKCONTROLBANDWIDTHINTEN;
20786    output CFGLINKCONTROLCLOCKPMEN;
20787    output CFGLINKCONTROLCOMMONCLOCK;
20788    output CFGLINKCONTROLEXTENDEDSYNC;
20789    output CFGLINKCONTROLHWAUTOWIDTHDIS;
20790    output CFGLINKCONTROLLINKDISABLE;
20791    output CFGLINKCONTROLRCB;
20792    output CFGLINKCONTROLRETRAINLINK;
20793    output CFGLINKSTATUSAUTOBANDWIDTHSTATUS;
20794    output CFGLINKSTATUSBANDWIDTHSTATUS;
20795    output CFGLINKSTATUSDLLACTIVE;
20796    output CFGLINKSTATUSLINKTRAINING;
20797    output CFGMGMTRDWRDONEN;
20798    output CFGMSGRECEIVED;
20799    output CFGMSGRECEIVEDASSERTINTA;
20800    output CFGMSGRECEIVEDASSERTINTB;
20801    output CFGMSGRECEIVEDASSERTINTC;
20802    output CFGMSGRECEIVEDASSERTINTD;
20803    output CFGMSGRECEIVEDDEASSERTINTA;
20804    output CFGMSGRECEIVEDDEASSERTINTB;
20805    output CFGMSGRECEIVEDDEASSERTINTC;
20806    output CFGMSGRECEIVEDDEASSERTINTD;
20807    output CFGMSGRECEIVEDERRCOR;
20808    output CFGMSGRECEIVEDERRFATAL;
20809    output CFGMSGRECEIVEDERRNONFATAL;
20810    output CFGMSGRECEIVEDPMASNAK;
20811    output CFGMSGRECEIVEDPMETO;
20812    output CFGMSGRECEIVEDPMETOACK;
20813    output CFGMSGRECEIVEDPMPME;
20814    output CFGMSGRECEIVEDSETSLOTPOWERLIMIT;
20815    output CFGMSGRECEIVEDUNLOCK;
20816    output CFGPMCSRPMEEN;
20817    output CFGPMCSRPMESTATUS;
20818    output CFGPMRCVASREQL1N;
20819    output CFGPMRCVENTERL1N;
20820    output CFGPMRCVENTERL23N;
20821    output CFGPMRCVREQACKN;
20822    output CFGROOTCONTROLPMEINTEN;
20823    output CFGROOTCONTROLSYSERRCORRERREN;
20824    output CFGROOTCONTROLSYSERRFATALERREN;
20825    output CFGROOTCONTROLSYSERRNONFATALERREN;
20826    output CFGSLOTCONTROLELECTROMECHILCTLPULSE;
20827    output CFGTRANSACTION;
20828    output CFGTRANSACTIONTYPE;
20829    output DBGSCLRA;
20830    output DBGSCLRB;
20831    output DBGSCLRC;
20832    output DBGSCLRD;
20833    output DBGSCLRE;
20834    output DBGSCLRF;
20835    output DBGSCLRG;
20836    output DBGSCLRH;
20837    output DBGSCLRI;
20838    output DBGSCLRJ;
20839    output DBGSCLRK;
20840    output DRPRDY;
20841    output LL2BADDLLPERR;
20842    output LL2BADTLPERR;
20843    output LL2PROTOCOLERR;
20844    output LL2RECEIVERERR;
20845    output LL2REPLAYROERR;
20846    output LL2REPLAYTOERR;
20847    output LL2SUSPENDOK;
20848    output LL2TFCINIT1SEQ;
20849    output LL2TFCINIT2SEQ;
20850    output LL2TXIDLE;
20851    output LNKCLKEN;
20852    output MIMRXREN;
20853    output MIMRXWEN;
20854    output MIMTXREN;
20855    output MIMTXWEN;
20856    output PIPERX0POLARITY;
20857    output PIPERX1POLARITY;
20858    output PIPERX2POLARITY;
20859    output PIPERX3POLARITY;
20860    output PIPERX4POLARITY;
20861    output PIPERX5POLARITY;
20862    output PIPERX6POLARITY;
20863    output PIPERX7POLARITY;
20864    output PIPETX0COMPLIANCE;
20865    output PIPETX0ELECIDLE;
20866    output PIPETX1COMPLIANCE;
20867    output PIPETX1ELECIDLE;
20868    output PIPETX2COMPLIANCE;
20869    output PIPETX2ELECIDLE;
20870    output PIPETX3COMPLIANCE;
20871    output PIPETX3ELECIDLE;
20872    output PIPETX4COMPLIANCE;
20873    output PIPETX4ELECIDLE;
20874    output PIPETX5COMPLIANCE;
20875    output PIPETX5ELECIDLE;
20876    output PIPETX6COMPLIANCE;
20877    output PIPETX6ELECIDLE;
20878    output PIPETX7COMPLIANCE;
20879    output PIPETX7ELECIDLE;
20880    output PIPETXDEEMPH;
20881    output PIPETXRATE;
20882    output PIPETXRCVRDET;
20883    output PIPETXRESET;
20884    output PL2L0REQ;
20885    output PL2LINKUP;
20886    output PL2RECEIVERERR;
20887    output PL2RECOVERY;
20888    output PL2RXELECIDLE;
20889    output PL2SUSPENDOK;
20890    output PLDIRECTEDCHANGEDONE;
20891    output PLLINKGEN2CAP;
20892    output PLLINKPARTNERGEN2SUPPORTED;
20893    output PLLINKUPCFGCAP;
20894    output PLPHYLNKUPN;
20895    output PLRECEIVEDHOTRST;
20896    output PLSELLNKRATE;
20897    output RECEIVEDFUNCLVLRSTN;
20898    output TL2ASPMSUSPENDCREDITCHECKOK;
20899    output TL2ASPMSUSPENDREQ;
20900    output TL2ERRFCPE;
20901    output TL2ERRMALFORMED;
20902    output TL2ERRRXOVERFLOW;
20903    output TL2PPMSUSPENDOK;
20904    output TRNLNKUP;
20905    output TRNRECRCERR;
20906    output TRNREOF;
20907    output TRNRERRFWD;
20908    output TRNRSOF;
20909    output TRNRSRCDSC;
20910    output TRNRSRCRDY;
20911    output TRNTCFGREQ;
20912    output TRNTDLLPDSTRDY;
20913    output TRNTERRDROP;
20914    output USERRSTN;
20915    output [11:0] DBGVECC;
20916    output [11:0] PLDBGVEC;
20917    output [11:0] TRNFCCPLD;
20918    output [11:0] TRNFCNPD;
20919    output [11:0] TRNFCPD;
20920    output [127:0] TRNRD;
20921    output [12:0] MIMRXRADDR;
20922    output [12:0] MIMRXWADDR;
20923    output [12:0] MIMTXRADDR;
20924    output [12:0] MIMTXWADDR;
20925    output [15:0] CFGMSGDATA;
20926    output [15:0] DRPDO;
20927    output [15:0] PIPETX0DATA;
20928    output [15:0] PIPETX1DATA;
20929    output [15:0] PIPETX2DATA;
20930    output [15:0] PIPETX3DATA;
20931    output [15:0] PIPETX4DATA;
20932    output [15:0] PIPETX5DATA;
20933    output [15:0] PIPETX6DATA;
20934    output [15:0] PIPETX7DATA;
20935    output [1:0] CFGLINKCONTROLASPMCONTROL;
20936    output [1:0] CFGLINKSTATUSCURRENTSPEED;
20937    output [1:0] CFGPMCSRPOWERSTATE;
20938    output [1:0] PIPETX0CHARISK;
20939    output [1:0] PIPETX0POWERDOWN;
20940    output [1:0] PIPETX1CHARISK;
20941    output [1:0] PIPETX1POWERDOWN;
20942    output [1:0] PIPETX2CHARISK;
20943    output [1:0] PIPETX2POWERDOWN;
20944    output [1:0] PIPETX3CHARISK;
20945    output [1:0] PIPETX3POWERDOWN;
20946    output [1:0] PIPETX4CHARISK;
20947    output [1:0] PIPETX4POWERDOWN;
20948    output [1:0] PIPETX5CHARISK;
20949    output [1:0] PIPETX5POWERDOWN;
20950    output [1:0] PIPETX6CHARISK;
20951    output [1:0] PIPETX6POWERDOWN;
20952    output [1:0] PIPETX7CHARISK;
20953    output [1:0] PIPETX7POWERDOWN;
20954    output [1:0] PL2RXPMSTATE;
20955    output [1:0] PLLANEREVERSALMODE;
20956    output [1:0] PLRXPMSTATE;
20957    output [1:0] PLSELLNKWIDTH;
20958    output [1:0] TRNRDLLPSRCRDY;
20959    output [1:0] TRNRREM;
20960    output [2:0] CFGDEVCONTROLMAXPAYLOAD;
20961    output [2:0] CFGDEVCONTROLMAXREADREQ;
20962    output [2:0] CFGINTERRUPTMMENABLE;
20963    output [2:0] CFGPCIELINKSTATE;
20964    output [2:0] PIPETXMARGIN;
20965    output [2:0] PLINITIALLINKWIDTH;
20966    output [2:0] PLTXPMSTATE;
20967    output [31:0] CFGMGMTDO;
20968    output [3:0] CFGDEVCONTROL2CPLTIMEOUTVAL;
20969    output [3:0] CFGLINKSTATUSNEGOTIATEDWIDTH;
20970    output [3:0] TRNTDSTRDY;
20971    output [4:0] LL2LINKSTATUS;
20972    output [5:0] PLLTSSMSTATE;
20973    output [5:0] TRNTBUFAV;
20974    output [63:0] DBGVECA;
20975    output [63:0] DBGVECB;
20976    output [63:0] TL2ERRHDR;
20977    output [63:0] TRNRDLLPDATA;
20978    output [67:0] MIMRXWDATA;
20979    output [68:0] MIMTXWDATA;
20980    output [6:0] CFGTRANSACTIONADDR;
20981    output [6:0] CFGVCTCVCMAP;
20982    output [7:0] CFGINTERRUPTDO;
20983    output [7:0] TRNFCCPLH;
20984    output [7:0] TRNFCNPH;
20985    output [7:0] TRNFCPH;
20986    output [7:0] TRNRBARHIT;
20987    input CFGERRACSN;
20988    input CFGERRATOMICEGRESSBLOCKEDN;
20989    input CFGERRCORN;
20990    input CFGERRCPLABORTN;
20991    input CFGERRCPLTIMEOUTN;
20992    input CFGERRCPLUNEXPECTN;
20993    input CFGERRECRCN;
20994    input CFGERRINTERNALCORN;
20995    input CFGERRINTERNALUNCORN;
20996    input CFGERRLOCKEDN;
20997    input CFGERRMALFORMEDN;
20998    input CFGERRMCBLOCKEDN;
20999    input CFGERRNORECOVERYN;
21000    input CFGERRPOISONEDN;
21001    input CFGERRPOSTEDN;
21002    input CFGERRURN;
21003    input CFGFORCECOMMONCLOCKOFF;
21004    input CFGFORCEEXTENDEDSYNCON;
21005    input CFGINTERRUPTASSERTN;
21006    input CFGINTERRUPTN;
21007    input CFGINTERRUPTSTATN;
21008    input CFGMGMTRDENN;
21009    input CFGMGMTWRENN;
21010    input CFGMGMTWRREADONLYN;
21011    input CFGMGMTWRRW1CASRWN;
21012    input CFGPMFORCESTATEENN;
21013    input CFGPMHALTASPML0SN;
21014    input CFGPMHALTASPML1N;
21015    input CFGPMSENDPMETON;
21016    input CFGPMTURNOFFOKN;
21017    input CFGPMWAKEN;
21018    input CFGTRNPENDINGN;
21019    input CMRSTN;
21020    input CMSTICKYRSTN;
21021    input DBGSUBMODE;
21022    input DLRSTN;
21023    input DRPCLK;
21024    input DRPEN;
21025    input DRPWE;
21026    input FUNCLVLRSTN;
21027    input LL2SENDASREQL1;
21028    input LL2SENDENTERL1;
21029    input LL2SENDENTERL23;
21030    input LL2SENDPMACK;
21031    input LL2SUSPENDNOW;
21032    input LL2TLPRCV;
21033    input PIPECLK;
21034    input PIPERX0CHANISALIGNED;
21035    input PIPERX0ELECIDLE;
21036    input PIPERX0PHYSTATUS;
21037    input PIPERX0VALID;
21038    input PIPERX1CHANISALIGNED;
21039    input PIPERX1ELECIDLE;
21040    input PIPERX1PHYSTATUS;
21041    input PIPERX1VALID;
21042    input PIPERX2CHANISALIGNED;
21043    input PIPERX2ELECIDLE;
21044    input PIPERX2PHYSTATUS;
21045    input PIPERX2VALID;
21046    input PIPERX3CHANISALIGNED;
21047    input PIPERX3ELECIDLE;
21048    input PIPERX3PHYSTATUS;
21049    input PIPERX3VALID;
21050    input PIPERX4CHANISALIGNED;
21051    input PIPERX4ELECIDLE;
21052    input PIPERX4PHYSTATUS;
21053    input PIPERX4VALID;
21054    input PIPERX5CHANISALIGNED;
21055    input PIPERX5ELECIDLE;
21056    input PIPERX5PHYSTATUS;
21057    input PIPERX5VALID;
21058    input PIPERX6CHANISALIGNED;
21059    input PIPERX6ELECIDLE;
21060    input PIPERX6PHYSTATUS;
21061    input PIPERX6VALID;
21062    input PIPERX7CHANISALIGNED;
21063    input PIPERX7ELECIDLE;
21064    input PIPERX7PHYSTATUS;
21065    input PIPERX7VALID;
21066    input PLDIRECTEDLINKAUTON;
21067    input PLDIRECTEDLINKSPEED;
21068    input PLDIRECTEDLTSSMNEWVLD;
21069    input PLDIRECTEDLTSSMSTALL;
21070    input PLDOWNSTREAMDEEMPHSOURCE;
21071    input PLRSTN;
21072    input PLTRANSMITHOTRST;
21073    input PLUPSTREAMPREFERDEEMPH;
21074    input SYSRSTN;
21075    input TL2ASPMSUSPENDCREDITCHECK;
21076    input TL2PPMSUSPENDREQ;
21077    input TLRSTN;
21078    input TRNRDSTRDY;
21079    input TRNRFCPRET;
21080    input TRNRNPOK;
21081    input TRNRNPREQ;
21082    input TRNTCFGGNT;
21083    input TRNTDLLPSRCRDY;
21084    input TRNTECRCGEN;
21085    input TRNTEOF;
21086    input TRNTERRFWD;
21087    input TRNTSOF;
21088    input TRNTSRCDSC;
21089    input TRNTSRCRDY;
21090    input TRNTSTR;
21091    input USERCLK2;
21092    input USERCLK;
21093    input [127:0] CFGERRAERHEADERLOG;
21094    input [127:0] TRNTD;
21095    input [15:0] CFGDEVID;
21096    input [15:0] CFGSUBSYSID;
21097    input [15:0] CFGSUBSYSVENDID;
21098    input [15:0] CFGVENDID;
21099    input [15:0] DRPDI;
21100    input [15:0] PIPERX0DATA;
21101    input [15:0] PIPERX1DATA;
21102    input [15:0] PIPERX2DATA;
21103    input [15:0] PIPERX3DATA;
21104    input [15:0] PIPERX4DATA;
21105    input [15:0] PIPERX5DATA;
21106    input [15:0] PIPERX6DATA;
21107    input [15:0] PIPERX7DATA;
21108    input [1:0] CFGPMFORCESTATE;
21109    input [1:0] DBGMODE;
21110    input [1:0] PIPERX0CHARISK;
21111    input [1:0] PIPERX1CHARISK;
21112    input [1:0] PIPERX2CHARISK;
21113    input [1:0] PIPERX3CHARISK;
21114    input [1:0] PIPERX4CHARISK;
21115    input [1:0] PIPERX5CHARISK;
21116    input [1:0] PIPERX6CHARISK;
21117    input [1:0] PIPERX7CHARISK;
21118    input [1:0] PLDIRECTEDLINKCHANGE;
21119    input [1:0] PLDIRECTEDLINKWIDTH;
21120    input [1:0] TRNTREM;
21121    input [2:0] CFGDSFUNCTIONNUMBER;
21122    input [2:0] CFGFORCEMPS;
21123    input [2:0] PIPERX0STATUS;
21124    input [2:0] PIPERX1STATUS;
21125    input [2:0] PIPERX2STATUS;
21126    input [2:0] PIPERX3STATUS;
21127    input [2:0] PIPERX4STATUS;
21128    input [2:0] PIPERX5STATUS;
21129    input [2:0] PIPERX6STATUS;
21130    input [2:0] PIPERX7STATUS;
21131    input [2:0] PLDBGMODE;
21132    input [2:0] TRNFCSEL;
21133    input [31:0] CFGMGMTDI;
21134    input [31:0] TRNTDLLPDATA;
21135    input [3:0] CFGMGMTBYTEENN;
21136    input [47:0] CFGERRTLPCPLHEADER;
21137    input [4:0] CFGAERINTERRUPTMSGNUM;
21138    input [4:0] CFGDSDEVICENUMBER;
21139    input [4:0] CFGPCIECAPINTERRUPTMSGNUM;
21140    input [4:0] PL2DIRECTEDLSTATE;
21141    input [5:0] PLDIRECTEDLTSSMNEW;
21142    input [63:0] CFGDSN;
21143    input [67:0] MIMRXRDATA;
21144    input [68:0] MIMTXRDATA;
21145    input [7:0] CFGDSBUSNUMBER;
21146    input [7:0] CFGINTERRUPTDI;
21147    input [7:0] CFGPORTNUMBER;
21148    input [7:0] CFGREVID;
21149    input [8:0] DRPADDR;
21150    input [9:0] CFGMGMTDWADDR;
21151endmodule
21152
21153module PCIE_3_0 (...);
21154    parameter ARI_CAP_ENABLE = "FALSE";
21155    parameter AXISTEN_IF_CC_ALIGNMENT_MODE = "FALSE";
21156    parameter AXISTEN_IF_CC_PARITY_CHK = "TRUE";
21157    parameter AXISTEN_IF_CQ_ALIGNMENT_MODE = "FALSE";
21158    parameter AXISTEN_IF_ENABLE_CLIENT_TAG = "FALSE";
21159    parameter [17:0] AXISTEN_IF_ENABLE_MSG_ROUTE = 18'h00000;
21160    parameter AXISTEN_IF_ENABLE_RX_MSG_INTFC = "FALSE";
21161    parameter AXISTEN_IF_RC_ALIGNMENT_MODE = "FALSE";
21162    parameter AXISTEN_IF_RC_STRADDLE = "FALSE";
21163    parameter AXISTEN_IF_RQ_ALIGNMENT_MODE = "FALSE";
21164    parameter AXISTEN_IF_RQ_PARITY_CHK = "TRUE";
21165    parameter [1:0] AXISTEN_IF_WIDTH = 2'h2;
21166    parameter CRM_CORE_CLK_FREQ_500 = "TRUE";
21167    parameter [1:0] CRM_USER_CLK_FREQ = 2'h2;
21168    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
21169    parameter [1:0] GEN3_PCS_AUTO_REALIGN = 2'h1;
21170    parameter GEN3_PCS_RX_ELECIDLE_INTERNAL = "TRUE";
21171    parameter [8:0] LL_ACK_TIMEOUT = 9'h000;
21172    parameter LL_ACK_TIMEOUT_EN = "FALSE";
21173    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
21174    parameter [15:0] LL_CPL_FC_UPDATE_TIMER = 16'h0000;
21175    parameter LL_CPL_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
21176    parameter [15:0] LL_FC_UPDATE_TIMER = 16'h0000;
21177    parameter LL_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
21178    parameter [15:0] LL_NP_FC_UPDATE_TIMER = 16'h0000;
21179    parameter LL_NP_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
21180    parameter [15:0] LL_P_FC_UPDATE_TIMER = 16'h0000;
21181    parameter LL_P_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
21182    parameter [8:0] LL_REPLAY_TIMEOUT = 9'h000;
21183    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
21184    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
21185    parameter [9:0] LTR_TX_MESSAGE_MINIMUM_INTERVAL = 10'h0FA;
21186    parameter LTR_TX_MESSAGE_ON_FUNC_POWER_STATE_CHANGE = "FALSE";
21187    parameter LTR_TX_MESSAGE_ON_LTR_ENABLE = "FALSE";
21188    parameter PF0_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
21189    parameter PF0_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
21190    parameter [11:0] PF0_AER_CAP_NEXTPTR = 12'h000;
21191    parameter [11:0] PF0_ARI_CAP_NEXTPTR = 12'h000;
21192    parameter [7:0] PF0_ARI_CAP_NEXT_FUNC = 8'h00;
21193    parameter [3:0] PF0_ARI_CAP_VER = 4'h1;
21194    parameter [4:0] PF0_BAR0_APERTURE_SIZE = 5'h03;
21195    parameter [2:0] PF0_BAR0_CONTROL = 3'h4;
21196    parameter [4:0] PF0_BAR1_APERTURE_SIZE = 5'h00;
21197    parameter [2:0] PF0_BAR1_CONTROL = 3'h0;
21198    parameter [4:0] PF0_BAR2_APERTURE_SIZE = 5'h03;
21199    parameter [2:0] PF0_BAR2_CONTROL = 3'h4;
21200    parameter [4:0] PF0_BAR3_APERTURE_SIZE = 5'h03;
21201    parameter [2:0] PF0_BAR3_CONTROL = 3'h0;
21202    parameter [4:0] PF0_BAR4_APERTURE_SIZE = 5'h03;
21203    parameter [2:0] PF0_BAR4_CONTROL = 3'h4;
21204    parameter [4:0] PF0_BAR5_APERTURE_SIZE = 5'h03;
21205    parameter [2:0] PF0_BAR5_CONTROL = 3'h0;
21206    parameter [7:0] PF0_BIST_REGISTER = 8'h00;
21207    parameter [7:0] PF0_CAPABILITY_POINTER = 8'h50;
21208    parameter [23:0] PF0_CLASS_CODE = 24'h000000;
21209    parameter [15:0] PF0_DEVICE_ID = 16'h0000;
21210    parameter PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT = "TRUE";
21211    parameter PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
21212    parameter PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
21213    parameter PF0_DEV_CAP2_CPL_TIMEOUT_DISABLE = "TRUE";
21214    parameter PF0_DEV_CAP2_LTR_SUPPORT = "TRUE";
21215    parameter [1:0] PF0_DEV_CAP2_OBFF_SUPPORT = 2'h0;
21216    parameter PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT = "FALSE";
21217    parameter integer PF0_DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
21218    parameter integer PF0_DEV_CAP_ENDPOINT_L1_LATENCY = 0;
21219    parameter PF0_DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
21220    parameter PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "TRUE";
21221    parameter [2:0] PF0_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
21222    parameter [11:0] PF0_DPA_CAP_NEXTPTR = 12'h000;
21223    parameter [4:0] PF0_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
21224    parameter PF0_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
21225    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
21226    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
21227    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
21228    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
21229    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
21230    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
21231    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
21232    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
21233    parameter [3:0] PF0_DPA_CAP_VER = 4'h1;
21234    parameter [11:0] PF0_DSN_CAP_NEXTPTR = 12'h10C;
21235    parameter [4:0] PF0_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
21236    parameter PF0_EXPANSION_ROM_ENABLE = "FALSE";
21237    parameter [7:0] PF0_INTERRUPT_LINE = 8'h00;
21238    parameter [2:0] PF0_INTERRUPT_PIN = 3'h1;
21239    parameter integer PF0_LINK_CAP_ASPM_SUPPORT = 0;
21240    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
21241    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
21242    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN3 = 7;
21243    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
21244    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
21245    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN3 = 7;
21246    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
21247    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
21248    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN3 = 7;
21249    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
21250    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
21251    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN3 = 7;
21252    parameter PF0_LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
21253    parameter [9:0] PF0_LTR_CAP_MAX_NOSNOOP_LAT = 10'h000;
21254    parameter [9:0] PF0_LTR_CAP_MAX_SNOOP_LAT = 10'h000;
21255    parameter [11:0] PF0_LTR_CAP_NEXTPTR = 12'h000;
21256    parameter [3:0] PF0_LTR_CAP_VER = 4'h1;
21257    parameter [7:0] PF0_MSIX_CAP_NEXTPTR = 8'h00;
21258    parameter integer PF0_MSIX_CAP_PBA_BIR = 0;
21259    parameter [28:0] PF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21260    parameter integer PF0_MSIX_CAP_TABLE_BIR = 0;
21261    parameter [28:0] PF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21262    parameter [10:0] PF0_MSIX_CAP_TABLE_SIZE = 11'h000;
21263    parameter integer PF0_MSI_CAP_MULTIMSGCAP = 0;
21264    parameter [7:0] PF0_MSI_CAP_NEXTPTR = 8'h00;
21265    parameter [11:0] PF0_PB_CAP_NEXTPTR = 12'h000;
21266    parameter PF0_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
21267    parameter [3:0] PF0_PB_CAP_VER = 4'h1;
21268    parameter [7:0] PF0_PM_CAP_ID = 8'h01;
21269    parameter [7:0] PF0_PM_CAP_NEXTPTR = 8'h00;
21270    parameter PF0_PM_CAP_PMESUPPORT_D0 = "TRUE";
21271    parameter PF0_PM_CAP_PMESUPPORT_D1 = "TRUE";
21272    parameter PF0_PM_CAP_PMESUPPORT_D3HOT = "TRUE";
21273    parameter PF0_PM_CAP_SUPP_D1_STATE = "TRUE";
21274    parameter [2:0] PF0_PM_CAP_VER_ID = 3'h3;
21275    parameter PF0_PM_CSR_NOSOFTRESET = "TRUE";
21276    parameter PF0_RBAR_CAP_ENABLE = "FALSE";
21277    parameter [2:0] PF0_RBAR_CAP_INDEX0 = 3'h0;
21278    parameter [2:0] PF0_RBAR_CAP_INDEX1 = 3'h0;
21279    parameter [2:0] PF0_RBAR_CAP_INDEX2 = 3'h0;
21280    parameter [11:0] PF0_RBAR_CAP_NEXTPTR = 12'h000;
21281    parameter [19:0] PF0_RBAR_CAP_SIZE0 = 20'h00000;
21282    parameter [19:0] PF0_RBAR_CAP_SIZE1 = 20'h00000;
21283    parameter [19:0] PF0_RBAR_CAP_SIZE2 = 20'h00000;
21284    parameter [3:0] PF0_RBAR_CAP_VER = 4'h1;
21285    parameter [2:0] PF0_RBAR_NUM = 3'h1;
21286    parameter [7:0] PF0_REVISION_ID = 8'h00;
21287    parameter [4:0] PF0_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
21288    parameter [2:0] PF0_SRIOV_BAR0_CONTROL = 3'h4;
21289    parameter [4:0] PF0_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
21290    parameter [2:0] PF0_SRIOV_BAR1_CONTROL = 3'h0;
21291    parameter [4:0] PF0_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
21292    parameter [2:0] PF0_SRIOV_BAR2_CONTROL = 3'h4;
21293    parameter [4:0] PF0_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
21294    parameter [2:0] PF0_SRIOV_BAR3_CONTROL = 3'h0;
21295    parameter [4:0] PF0_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
21296    parameter [2:0] PF0_SRIOV_BAR4_CONTROL = 3'h4;
21297    parameter [4:0] PF0_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
21298    parameter [2:0] PF0_SRIOV_BAR5_CONTROL = 3'h0;
21299    parameter [15:0] PF0_SRIOV_CAP_INITIAL_VF = 16'h0000;
21300    parameter [11:0] PF0_SRIOV_CAP_NEXTPTR = 12'h000;
21301    parameter [15:0] PF0_SRIOV_CAP_TOTAL_VF = 16'h0000;
21302    parameter [3:0] PF0_SRIOV_CAP_VER = 4'h1;
21303    parameter [15:0] PF0_SRIOV_FIRST_VF_OFFSET = 16'h0000;
21304    parameter [15:0] PF0_SRIOV_FUNC_DEP_LINK = 16'h0000;
21305    parameter [31:0] PF0_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
21306    parameter [15:0] PF0_SRIOV_VF_DEVICE_ID = 16'h0000;
21307    parameter [15:0] PF0_SUBSYSTEM_ID = 16'h0000;
21308    parameter PF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21309    parameter PF0_TPHR_CAP_ENABLE = "FALSE";
21310    parameter PF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
21311    parameter [11:0] PF0_TPHR_CAP_NEXTPTR = 12'h000;
21312    parameter [2:0] PF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
21313    parameter [1:0] PF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21314    parameter [10:0] PF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21315    parameter [3:0] PF0_TPHR_CAP_VER = 4'h1;
21316    parameter [11:0] PF0_VC_CAP_NEXTPTR = 12'h000;
21317    parameter [3:0] PF0_VC_CAP_VER = 4'h1;
21318    parameter PF1_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
21319    parameter PF1_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
21320    parameter [11:0] PF1_AER_CAP_NEXTPTR = 12'h000;
21321    parameter [11:0] PF1_ARI_CAP_NEXTPTR = 12'h000;
21322    parameter [7:0] PF1_ARI_CAP_NEXT_FUNC = 8'h00;
21323    parameter [4:0] PF1_BAR0_APERTURE_SIZE = 5'h03;
21324    parameter [2:0] PF1_BAR0_CONTROL = 3'h4;
21325    parameter [4:0] PF1_BAR1_APERTURE_SIZE = 5'h00;
21326    parameter [2:0] PF1_BAR1_CONTROL = 3'h0;
21327    parameter [4:0] PF1_BAR2_APERTURE_SIZE = 5'h03;
21328    parameter [2:0] PF1_BAR2_CONTROL = 3'h4;
21329    parameter [4:0] PF1_BAR3_APERTURE_SIZE = 5'h03;
21330    parameter [2:0] PF1_BAR3_CONTROL = 3'h0;
21331    parameter [4:0] PF1_BAR4_APERTURE_SIZE = 5'h03;
21332    parameter [2:0] PF1_BAR4_CONTROL = 3'h4;
21333    parameter [4:0] PF1_BAR5_APERTURE_SIZE = 5'h03;
21334    parameter [2:0] PF1_BAR5_CONTROL = 3'h0;
21335    parameter [7:0] PF1_BIST_REGISTER = 8'h00;
21336    parameter [7:0] PF1_CAPABILITY_POINTER = 8'h50;
21337    parameter [23:0] PF1_CLASS_CODE = 24'h000000;
21338    parameter [15:0] PF1_DEVICE_ID = 16'h0000;
21339    parameter [2:0] PF1_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
21340    parameter [11:0] PF1_DPA_CAP_NEXTPTR = 12'h000;
21341    parameter [4:0] PF1_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
21342    parameter PF1_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
21343    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
21344    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
21345    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
21346    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
21347    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
21348    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
21349    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
21350    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
21351    parameter [3:0] PF1_DPA_CAP_VER = 4'h1;
21352    parameter [11:0] PF1_DSN_CAP_NEXTPTR = 12'h10C;
21353    parameter [4:0] PF1_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
21354    parameter PF1_EXPANSION_ROM_ENABLE = "FALSE";
21355    parameter [7:0] PF1_INTERRUPT_LINE = 8'h00;
21356    parameter [2:0] PF1_INTERRUPT_PIN = 3'h1;
21357    parameter [7:0] PF1_MSIX_CAP_NEXTPTR = 8'h00;
21358    parameter integer PF1_MSIX_CAP_PBA_BIR = 0;
21359    parameter [28:0] PF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21360    parameter integer PF1_MSIX_CAP_TABLE_BIR = 0;
21361    parameter [28:0] PF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21362    parameter [10:0] PF1_MSIX_CAP_TABLE_SIZE = 11'h000;
21363    parameter integer PF1_MSI_CAP_MULTIMSGCAP = 0;
21364    parameter [7:0] PF1_MSI_CAP_NEXTPTR = 8'h00;
21365    parameter [11:0] PF1_PB_CAP_NEXTPTR = 12'h000;
21366    parameter PF1_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
21367    parameter [3:0] PF1_PB_CAP_VER = 4'h1;
21368    parameter [7:0] PF1_PM_CAP_ID = 8'h01;
21369    parameter [7:0] PF1_PM_CAP_NEXTPTR = 8'h00;
21370    parameter [2:0] PF1_PM_CAP_VER_ID = 3'h3;
21371    parameter PF1_RBAR_CAP_ENABLE = "FALSE";
21372    parameter [2:0] PF1_RBAR_CAP_INDEX0 = 3'h0;
21373    parameter [2:0] PF1_RBAR_CAP_INDEX1 = 3'h0;
21374    parameter [2:0] PF1_RBAR_CAP_INDEX2 = 3'h0;
21375    parameter [11:0] PF1_RBAR_CAP_NEXTPTR = 12'h000;
21376    parameter [19:0] PF1_RBAR_CAP_SIZE0 = 20'h00000;
21377    parameter [19:0] PF1_RBAR_CAP_SIZE1 = 20'h00000;
21378    parameter [19:0] PF1_RBAR_CAP_SIZE2 = 20'h00000;
21379    parameter [3:0] PF1_RBAR_CAP_VER = 4'h1;
21380    parameter [2:0] PF1_RBAR_NUM = 3'h1;
21381    parameter [7:0] PF1_REVISION_ID = 8'h00;
21382    parameter [4:0] PF1_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
21383    parameter [2:0] PF1_SRIOV_BAR0_CONTROL = 3'h4;
21384    parameter [4:0] PF1_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
21385    parameter [2:0] PF1_SRIOV_BAR1_CONTROL = 3'h0;
21386    parameter [4:0] PF1_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
21387    parameter [2:0] PF1_SRIOV_BAR2_CONTROL = 3'h4;
21388    parameter [4:0] PF1_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
21389    parameter [2:0] PF1_SRIOV_BAR3_CONTROL = 3'h0;
21390    parameter [4:0] PF1_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
21391    parameter [2:0] PF1_SRIOV_BAR4_CONTROL = 3'h4;
21392    parameter [4:0] PF1_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
21393    parameter [2:0] PF1_SRIOV_BAR5_CONTROL = 3'h0;
21394    parameter [15:0] PF1_SRIOV_CAP_INITIAL_VF = 16'h0000;
21395    parameter [11:0] PF1_SRIOV_CAP_NEXTPTR = 12'h000;
21396    parameter [15:0] PF1_SRIOV_CAP_TOTAL_VF = 16'h0000;
21397    parameter [3:0] PF1_SRIOV_CAP_VER = 4'h1;
21398    parameter [15:0] PF1_SRIOV_FIRST_VF_OFFSET = 16'h0000;
21399    parameter [15:0] PF1_SRIOV_FUNC_DEP_LINK = 16'h0000;
21400    parameter [31:0] PF1_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
21401    parameter [15:0] PF1_SRIOV_VF_DEVICE_ID = 16'h0000;
21402    parameter [15:0] PF1_SUBSYSTEM_ID = 16'h0000;
21403    parameter PF1_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21404    parameter PF1_TPHR_CAP_ENABLE = "FALSE";
21405    parameter PF1_TPHR_CAP_INT_VEC_MODE = "TRUE";
21406    parameter [11:0] PF1_TPHR_CAP_NEXTPTR = 12'h000;
21407    parameter [2:0] PF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
21408    parameter [1:0] PF1_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21409    parameter [10:0] PF1_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21410    parameter [3:0] PF1_TPHR_CAP_VER = 4'h1;
21411    parameter PL_DISABLE_EI_INFER_IN_L0 = "FALSE";
21412    parameter PL_DISABLE_GEN3_DC_BALANCE = "FALSE";
21413    parameter PL_DISABLE_SCRAMBLING = "FALSE";
21414    parameter PL_DISABLE_UPCONFIG_CAPABLE = "FALSE";
21415    parameter PL_EQ_ADAPT_DISABLE_COEFF_CHECK = "FALSE";
21416    parameter PL_EQ_ADAPT_DISABLE_PRESET_CHECK = "FALSE";
21417    parameter [4:0] PL_EQ_ADAPT_ITER_COUNT = 5'h02;
21418    parameter [1:0] PL_EQ_ADAPT_REJECT_RETRY_COUNT = 2'h1;
21419    parameter PL_EQ_BYPASS_PHASE23 = "FALSE";
21420    parameter PL_EQ_SHORT_ADAPT_PHASE = "FALSE";
21421    parameter [15:0] PL_LANE0_EQ_CONTROL = 16'h3F00;
21422    parameter [15:0] PL_LANE1_EQ_CONTROL = 16'h3F00;
21423    parameter [15:0] PL_LANE2_EQ_CONTROL = 16'h3F00;
21424    parameter [15:0] PL_LANE3_EQ_CONTROL = 16'h3F00;
21425    parameter [15:0] PL_LANE4_EQ_CONTROL = 16'h3F00;
21426    parameter [15:0] PL_LANE5_EQ_CONTROL = 16'h3F00;
21427    parameter [15:0] PL_LANE6_EQ_CONTROL = 16'h3F00;
21428    parameter [15:0] PL_LANE7_EQ_CONTROL = 16'h3F00;
21429    parameter [2:0] PL_LINK_CAP_MAX_LINK_SPEED = 3'h4;
21430    parameter [3:0] PL_LINK_CAP_MAX_LINK_WIDTH = 4'h8;
21431    parameter integer PL_N_FTS_COMCLK_GEN1 = 255;
21432    parameter integer PL_N_FTS_COMCLK_GEN2 = 255;
21433    parameter integer PL_N_FTS_COMCLK_GEN3 = 255;
21434    parameter integer PL_N_FTS_GEN1 = 255;
21435    parameter integer PL_N_FTS_GEN2 = 255;
21436    parameter integer PL_N_FTS_GEN3 = 255;
21437    parameter PL_SIM_FAST_LINK_TRAINING = "FALSE";
21438    parameter PL_UPSTREAM_FACING = "TRUE";
21439    parameter [15:0] PM_ASPML0S_TIMEOUT = 16'h05DC;
21440    parameter [19:0] PM_ASPML1_ENTRY_DELAY = 20'h00000;
21441    parameter PM_ENABLE_SLOT_POWER_CAPTURE = "TRUE";
21442    parameter [31:0] PM_L1_REENTRY_DELAY = 32'h00000000;
21443    parameter [19:0] PM_PME_SERVICE_TIMEOUT_DELAY = 20'h186A0;
21444    parameter [15:0] PM_PME_TURNOFF_ACK_DELAY = 16'h0064;
21445    parameter SIM_VERSION = "1.0";
21446    parameter integer SPARE_BIT0 = 0;
21447    parameter integer SPARE_BIT1 = 0;
21448    parameter integer SPARE_BIT2 = 0;
21449    parameter integer SPARE_BIT3 = 0;
21450    parameter integer SPARE_BIT4 = 0;
21451    parameter integer SPARE_BIT5 = 0;
21452    parameter integer SPARE_BIT6 = 0;
21453    parameter integer SPARE_BIT7 = 0;
21454    parameter integer SPARE_BIT8 = 0;
21455    parameter [7:0] SPARE_BYTE0 = 8'h00;
21456    parameter [7:0] SPARE_BYTE1 = 8'h00;
21457    parameter [7:0] SPARE_BYTE2 = 8'h00;
21458    parameter [7:0] SPARE_BYTE3 = 8'h00;
21459    parameter [31:0] SPARE_WORD0 = 32'h00000000;
21460    parameter [31:0] SPARE_WORD1 = 32'h00000000;
21461    parameter [31:0] SPARE_WORD2 = 32'h00000000;
21462    parameter [31:0] SPARE_WORD3 = 32'h00000000;
21463    parameter SRIOV_CAP_ENABLE = "FALSE";
21464    parameter [23:0] TL_COMPL_TIMEOUT_REG0 = 24'hBEBC20;
21465    parameter [27:0] TL_COMPL_TIMEOUT_REG1 = 28'h0000000;
21466    parameter [11:0] TL_CREDITS_CD = 12'h3E0;
21467    parameter [7:0] TL_CREDITS_CH = 8'h20;
21468    parameter [11:0] TL_CREDITS_NPD = 12'h028;
21469    parameter [7:0] TL_CREDITS_NPH = 8'h20;
21470    parameter [11:0] TL_CREDITS_PD = 12'h198;
21471    parameter [7:0] TL_CREDITS_PH = 8'h20;
21472    parameter TL_ENABLE_MESSAGE_RID_CHECK_ENABLE = "TRUE";
21473    parameter TL_EXTENDED_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
21474    parameter TL_LEGACY_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
21475    parameter TL_LEGACY_MODE_ENABLE = "FALSE";
21476    parameter TL_PF_ENABLE_REG = "FALSE";
21477    parameter TL_TAG_MGMT_ENABLE = "TRUE";
21478    parameter [11:0] VF0_ARI_CAP_NEXTPTR = 12'h000;
21479    parameter [7:0] VF0_CAPABILITY_POINTER = 8'h50;
21480    parameter integer VF0_MSIX_CAP_PBA_BIR = 0;
21481    parameter [28:0] VF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21482    parameter integer VF0_MSIX_CAP_TABLE_BIR = 0;
21483    parameter [28:0] VF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21484    parameter [10:0] VF0_MSIX_CAP_TABLE_SIZE = 11'h000;
21485    parameter integer VF0_MSI_CAP_MULTIMSGCAP = 0;
21486    parameter [7:0] VF0_PM_CAP_ID = 8'h01;
21487    parameter [7:0] VF0_PM_CAP_NEXTPTR = 8'h00;
21488    parameter [2:0] VF0_PM_CAP_VER_ID = 3'h3;
21489    parameter VF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21490    parameter VF0_TPHR_CAP_ENABLE = "FALSE";
21491    parameter VF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
21492    parameter [11:0] VF0_TPHR_CAP_NEXTPTR = 12'h000;
21493    parameter [2:0] VF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
21494    parameter [1:0] VF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21495    parameter [10:0] VF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21496    parameter [3:0] VF0_TPHR_CAP_VER = 4'h1;
21497    parameter [11:0] VF1_ARI_CAP_NEXTPTR = 12'h000;
21498    parameter integer VF1_MSIX_CAP_PBA_BIR = 0;
21499    parameter [28:0] VF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21500    parameter integer VF1_MSIX_CAP_TABLE_BIR = 0;
21501    parameter [28:0] VF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21502    parameter [10:0] VF1_MSIX_CAP_TABLE_SIZE = 11'h000;
21503    parameter integer VF1_MSI_CAP_MULTIMSGCAP = 0;
21504    parameter [7:0] VF1_PM_CAP_ID = 8'h01;
21505    parameter [7:0] VF1_PM_CAP_NEXTPTR = 8'h00;
21506    parameter [2:0] VF1_PM_CAP_VER_ID = 3'h3;
21507    parameter VF1_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21508    parameter VF1_TPHR_CAP_ENABLE = "FALSE";
21509    parameter VF1_TPHR_CAP_INT_VEC_MODE = "TRUE";
21510    parameter [11:0] VF1_TPHR_CAP_NEXTPTR = 12'h000;
21511    parameter [2:0] VF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
21512    parameter [1:0] VF1_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21513    parameter [10:0] VF1_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21514    parameter [3:0] VF1_TPHR_CAP_VER = 4'h1;
21515    parameter [11:0] VF2_ARI_CAP_NEXTPTR = 12'h000;
21516    parameter integer VF2_MSIX_CAP_PBA_BIR = 0;
21517    parameter [28:0] VF2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21518    parameter integer VF2_MSIX_CAP_TABLE_BIR = 0;
21519    parameter [28:0] VF2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21520    parameter [10:0] VF2_MSIX_CAP_TABLE_SIZE = 11'h000;
21521    parameter integer VF2_MSI_CAP_MULTIMSGCAP = 0;
21522    parameter [7:0] VF2_PM_CAP_ID = 8'h01;
21523    parameter [7:0] VF2_PM_CAP_NEXTPTR = 8'h00;
21524    parameter [2:0] VF2_PM_CAP_VER_ID = 3'h3;
21525    parameter VF2_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21526    parameter VF2_TPHR_CAP_ENABLE = "FALSE";
21527    parameter VF2_TPHR_CAP_INT_VEC_MODE = "TRUE";
21528    parameter [11:0] VF2_TPHR_CAP_NEXTPTR = 12'h000;
21529    parameter [2:0] VF2_TPHR_CAP_ST_MODE_SEL = 3'h0;
21530    parameter [1:0] VF2_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21531    parameter [10:0] VF2_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21532    parameter [3:0] VF2_TPHR_CAP_VER = 4'h1;
21533    parameter [11:0] VF3_ARI_CAP_NEXTPTR = 12'h000;
21534    parameter integer VF3_MSIX_CAP_PBA_BIR = 0;
21535    parameter [28:0] VF3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21536    parameter integer VF3_MSIX_CAP_TABLE_BIR = 0;
21537    parameter [28:0] VF3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21538    parameter [10:0] VF3_MSIX_CAP_TABLE_SIZE = 11'h000;
21539    parameter integer VF3_MSI_CAP_MULTIMSGCAP = 0;
21540    parameter [7:0] VF3_PM_CAP_ID = 8'h01;
21541    parameter [7:0] VF3_PM_CAP_NEXTPTR = 8'h00;
21542    parameter [2:0] VF3_PM_CAP_VER_ID = 3'h3;
21543    parameter VF3_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21544    parameter VF3_TPHR_CAP_ENABLE = "FALSE";
21545    parameter VF3_TPHR_CAP_INT_VEC_MODE = "TRUE";
21546    parameter [11:0] VF3_TPHR_CAP_NEXTPTR = 12'h000;
21547    parameter [2:0] VF3_TPHR_CAP_ST_MODE_SEL = 3'h0;
21548    parameter [1:0] VF3_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21549    parameter [10:0] VF3_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21550    parameter [3:0] VF3_TPHR_CAP_VER = 4'h1;
21551    parameter [11:0] VF4_ARI_CAP_NEXTPTR = 12'h000;
21552    parameter integer VF4_MSIX_CAP_PBA_BIR = 0;
21553    parameter [28:0] VF4_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21554    parameter integer VF4_MSIX_CAP_TABLE_BIR = 0;
21555    parameter [28:0] VF4_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21556    parameter [10:0] VF4_MSIX_CAP_TABLE_SIZE = 11'h000;
21557    parameter integer VF4_MSI_CAP_MULTIMSGCAP = 0;
21558    parameter [7:0] VF4_PM_CAP_ID = 8'h01;
21559    parameter [7:0] VF4_PM_CAP_NEXTPTR = 8'h00;
21560    parameter [2:0] VF4_PM_CAP_VER_ID = 3'h3;
21561    parameter VF4_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21562    parameter VF4_TPHR_CAP_ENABLE = "FALSE";
21563    parameter VF4_TPHR_CAP_INT_VEC_MODE = "TRUE";
21564    parameter [11:0] VF4_TPHR_CAP_NEXTPTR = 12'h000;
21565    parameter [2:0] VF4_TPHR_CAP_ST_MODE_SEL = 3'h0;
21566    parameter [1:0] VF4_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21567    parameter [10:0] VF4_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21568    parameter [3:0] VF4_TPHR_CAP_VER = 4'h1;
21569    parameter [11:0] VF5_ARI_CAP_NEXTPTR = 12'h000;
21570    parameter integer VF5_MSIX_CAP_PBA_BIR = 0;
21571    parameter [28:0] VF5_MSIX_CAP_PBA_OFFSET = 29'h00000050;
21572    parameter integer VF5_MSIX_CAP_TABLE_BIR = 0;
21573    parameter [28:0] VF5_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
21574    parameter [10:0] VF5_MSIX_CAP_TABLE_SIZE = 11'h000;
21575    parameter integer VF5_MSI_CAP_MULTIMSGCAP = 0;
21576    parameter [7:0] VF5_PM_CAP_ID = 8'h01;
21577    parameter [7:0] VF5_PM_CAP_NEXTPTR = 8'h00;
21578    parameter [2:0] VF5_PM_CAP_VER_ID = 3'h3;
21579    parameter VF5_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
21580    parameter VF5_TPHR_CAP_ENABLE = "FALSE";
21581    parameter VF5_TPHR_CAP_INT_VEC_MODE = "TRUE";
21582    parameter [11:0] VF5_TPHR_CAP_NEXTPTR = 12'h000;
21583    parameter [2:0] VF5_TPHR_CAP_ST_MODE_SEL = 3'h0;
21584    parameter [1:0] VF5_TPHR_CAP_ST_TABLE_LOC = 2'h0;
21585    parameter [10:0] VF5_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
21586    parameter [3:0] VF5_TPHR_CAP_VER = 4'h1;
21587    output CFGERRCOROUT;
21588    output CFGERRFATALOUT;
21589    output CFGERRNONFATALOUT;
21590    output CFGEXTREADRECEIVED;
21591    output CFGEXTWRITERECEIVED;
21592    output CFGHOTRESETOUT;
21593    output CFGINPUTUPDATEDONE;
21594    output CFGINTERRUPTAOUTPUT;
21595    output CFGINTERRUPTBOUTPUT;
21596    output CFGINTERRUPTCOUTPUT;
21597    output CFGINTERRUPTDOUTPUT;
21598    output CFGINTERRUPTMSIFAIL;
21599    output CFGINTERRUPTMSIMASKUPDATE;
21600    output CFGINTERRUPTMSISENT;
21601    output CFGINTERRUPTMSIXFAIL;
21602    output CFGINTERRUPTMSIXSENT;
21603    output CFGINTERRUPTSENT;
21604    output CFGLOCALERROR;
21605    output CFGLTRENABLE;
21606    output CFGMCUPDATEDONE;
21607    output CFGMGMTREADWRITEDONE;
21608    output CFGMSGRECEIVED;
21609    output CFGMSGTRANSMITDONE;
21610    output CFGPERFUNCTIONUPDATEDONE;
21611    output CFGPHYLINKDOWN;
21612    output CFGPLSTATUSCHANGE;
21613    output CFGPOWERSTATECHANGEINTERRUPT;
21614    output CFGTPHSTTREADENABLE;
21615    output CFGTPHSTTWRITEENABLE;
21616    output DRPRDY;
21617    output MAXISCQTLAST;
21618    output MAXISCQTVALID;
21619    output MAXISRCTLAST;
21620    output MAXISRCTVALID;
21621    output PCIERQSEQNUMVLD;
21622    output PCIERQTAGVLD;
21623    output PIPERX0POLARITY;
21624    output PIPERX1POLARITY;
21625    output PIPERX2POLARITY;
21626    output PIPERX3POLARITY;
21627    output PIPERX4POLARITY;
21628    output PIPERX5POLARITY;
21629    output PIPERX6POLARITY;
21630    output PIPERX7POLARITY;
21631    output PIPETX0COMPLIANCE;
21632    output PIPETX0DATAVALID;
21633    output PIPETX0ELECIDLE;
21634    output PIPETX0STARTBLOCK;
21635    output PIPETX1COMPLIANCE;
21636    output PIPETX1DATAVALID;
21637    output PIPETX1ELECIDLE;
21638    output PIPETX1STARTBLOCK;
21639    output PIPETX2COMPLIANCE;
21640    output PIPETX2DATAVALID;
21641    output PIPETX2ELECIDLE;
21642    output PIPETX2STARTBLOCK;
21643    output PIPETX3COMPLIANCE;
21644    output PIPETX3DATAVALID;
21645    output PIPETX3ELECIDLE;
21646    output PIPETX3STARTBLOCK;
21647    output PIPETX4COMPLIANCE;
21648    output PIPETX4DATAVALID;
21649    output PIPETX4ELECIDLE;
21650    output PIPETX4STARTBLOCK;
21651    output PIPETX5COMPLIANCE;
21652    output PIPETX5DATAVALID;
21653    output PIPETX5ELECIDLE;
21654    output PIPETX5STARTBLOCK;
21655    output PIPETX6COMPLIANCE;
21656    output PIPETX6DATAVALID;
21657    output PIPETX6ELECIDLE;
21658    output PIPETX6STARTBLOCK;
21659    output PIPETX7COMPLIANCE;
21660    output PIPETX7DATAVALID;
21661    output PIPETX7ELECIDLE;
21662    output PIPETX7STARTBLOCK;
21663    output PIPETXDEEMPH;
21664    output PIPETXRCVRDET;
21665    output PIPETXRESET;
21666    output PIPETXSWING;
21667    output PLEQINPROGRESS;
21668    output [11:0] CFGFCCPLD;
21669    output [11:0] CFGFCNPD;
21670    output [11:0] CFGFCPD;
21671    output [11:0] CFGVFSTATUS;
21672    output [143:0] MIREPLAYRAMWRITEDATA;
21673    output [143:0] MIREQUESTRAMWRITEDATA;
21674    output [15:0] CFGPERFUNCSTATUSDATA;
21675    output [15:0] DBGDATAOUT;
21676    output [15:0] DRPDO;
21677    output [17:0] CFGVFPOWERSTATE;
21678    output [17:0] CFGVFTPHSTMODE;
21679    output [1:0] CFGDPASUBSTATECHANGE;
21680    output [1:0] CFGFLRINPROCESS;
21681    output [1:0] CFGINTERRUPTMSIENABLE;
21682    output [1:0] CFGINTERRUPTMSIXENABLE;
21683    output [1:0] CFGINTERRUPTMSIXMASK;
21684    output [1:0] CFGLINKPOWERSTATE;
21685    output [1:0] CFGOBFFENABLE;
21686    output [1:0] CFGPHYLINKSTATUS;
21687    output [1:0] CFGRCBSTATUS;
21688    output [1:0] CFGTPHREQUESTERENABLE;
21689    output [1:0] MIREPLAYRAMREADENABLE;
21690    output [1:0] MIREPLAYRAMWRITEENABLE;
21691    output [1:0] PCIERQTAGAV;
21692    output [1:0] PCIETFCNPDAV;
21693    output [1:0] PCIETFCNPHAV;
21694    output [1:0] PIPERX0EQCONTROL;
21695    output [1:0] PIPERX1EQCONTROL;
21696    output [1:0] PIPERX2EQCONTROL;
21697    output [1:0] PIPERX3EQCONTROL;
21698    output [1:0] PIPERX4EQCONTROL;
21699    output [1:0] PIPERX5EQCONTROL;
21700    output [1:0] PIPERX6EQCONTROL;
21701    output [1:0] PIPERX7EQCONTROL;
21702    output [1:0] PIPETX0CHARISK;
21703    output [1:0] PIPETX0EQCONTROL;
21704    output [1:0] PIPETX0POWERDOWN;
21705    output [1:0] PIPETX0SYNCHEADER;
21706    output [1:0] PIPETX1CHARISK;
21707    output [1:0] PIPETX1EQCONTROL;
21708    output [1:0] PIPETX1POWERDOWN;
21709    output [1:0] PIPETX1SYNCHEADER;
21710    output [1:0] PIPETX2CHARISK;
21711    output [1:0] PIPETX2EQCONTROL;
21712    output [1:0] PIPETX2POWERDOWN;
21713    output [1:0] PIPETX2SYNCHEADER;
21714    output [1:0] PIPETX3CHARISK;
21715    output [1:0] PIPETX3EQCONTROL;
21716    output [1:0] PIPETX3POWERDOWN;
21717    output [1:0] PIPETX3SYNCHEADER;
21718    output [1:0] PIPETX4CHARISK;
21719    output [1:0] PIPETX4EQCONTROL;
21720    output [1:0] PIPETX4POWERDOWN;
21721    output [1:0] PIPETX4SYNCHEADER;
21722    output [1:0] PIPETX5CHARISK;
21723    output [1:0] PIPETX5EQCONTROL;
21724    output [1:0] PIPETX5POWERDOWN;
21725    output [1:0] PIPETX5SYNCHEADER;
21726    output [1:0] PIPETX6CHARISK;
21727    output [1:0] PIPETX6EQCONTROL;
21728    output [1:0] PIPETX6POWERDOWN;
21729    output [1:0] PIPETX6SYNCHEADER;
21730    output [1:0] PIPETX7CHARISK;
21731    output [1:0] PIPETX7EQCONTROL;
21732    output [1:0] PIPETX7POWERDOWN;
21733    output [1:0] PIPETX7SYNCHEADER;
21734    output [1:0] PIPETXRATE;
21735    output [1:0] PLEQPHASE;
21736    output [255:0] MAXISCQTDATA;
21737    output [255:0] MAXISRCTDATA;
21738    output [2:0] CFGCURRENTSPEED;
21739    output [2:0] CFGMAXPAYLOAD;
21740    output [2:0] CFGMAXREADREQ;
21741    output [2:0] CFGTPHFUNCTIONNUM;
21742    output [2:0] PIPERX0EQPRESET;
21743    output [2:0] PIPERX1EQPRESET;
21744    output [2:0] PIPERX2EQPRESET;
21745    output [2:0] PIPERX3EQPRESET;
21746    output [2:0] PIPERX4EQPRESET;
21747    output [2:0] PIPERX5EQPRESET;
21748    output [2:0] PIPERX6EQPRESET;
21749    output [2:0] PIPERX7EQPRESET;
21750    output [2:0] PIPETXMARGIN;
21751    output [31:0] CFGEXTWRITEDATA;
21752    output [31:0] CFGINTERRUPTMSIDATA;
21753    output [31:0] CFGMGMTREADDATA;
21754    output [31:0] CFGTPHSTTWRITEDATA;
21755    output [31:0] PIPETX0DATA;
21756    output [31:0] PIPETX1DATA;
21757    output [31:0] PIPETX2DATA;
21758    output [31:0] PIPETX3DATA;
21759    output [31:0] PIPETX4DATA;
21760    output [31:0] PIPETX5DATA;
21761    output [31:0] PIPETX6DATA;
21762    output [31:0] PIPETX7DATA;
21763    output [3:0] CFGEXTWRITEBYTEENABLE;
21764    output [3:0] CFGNEGOTIATEDWIDTH;
21765    output [3:0] CFGTPHSTTWRITEBYTEVALID;
21766    output [3:0] MICOMPLETIONRAMREADENABLEL;
21767    output [3:0] MICOMPLETIONRAMREADENABLEU;
21768    output [3:0] MICOMPLETIONRAMWRITEENABLEL;
21769    output [3:0] MICOMPLETIONRAMWRITEENABLEU;
21770    output [3:0] MIREQUESTRAMREADENABLE;
21771    output [3:0] MIREQUESTRAMWRITEENABLE;
21772    output [3:0] PCIERQSEQNUM;
21773    output [3:0] PIPERX0EQLPTXPRESET;
21774    output [3:0] PIPERX1EQLPTXPRESET;
21775    output [3:0] PIPERX2EQLPTXPRESET;
21776    output [3:0] PIPERX3EQLPTXPRESET;
21777    output [3:0] PIPERX4EQLPTXPRESET;
21778    output [3:0] PIPERX5EQLPTXPRESET;
21779    output [3:0] PIPERX6EQLPTXPRESET;
21780    output [3:0] PIPERX7EQLPTXPRESET;
21781    output [3:0] PIPETX0EQPRESET;
21782    output [3:0] PIPETX1EQPRESET;
21783    output [3:0] PIPETX2EQPRESET;
21784    output [3:0] PIPETX3EQPRESET;
21785    output [3:0] PIPETX4EQPRESET;
21786    output [3:0] PIPETX5EQPRESET;
21787    output [3:0] PIPETX6EQPRESET;
21788    output [3:0] PIPETX7EQPRESET;
21789    output [3:0] SAXISCCTREADY;
21790    output [3:0] SAXISRQTREADY;
21791    output [4:0] CFGMSGRECEIVEDTYPE;
21792    output [4:0] CFGTPHSTTADDRESS;
21793    output [5:0] CFGFUNCTIONPOWERSTATE;
21794    output [5:0] CFGINTERRUPTMSIMMENABLE;
21795    output [5:0] CFGINTERRUPTMSIVFENABLE;
21796    output [5:0] CFGINTERRUPTMSIXVFENABLE;
21797    output [5:0] CFGINTERRUPTMSIXVFMASK;
21798    output [5:0] CFGLTSSMSTATE;
21799    output [5:0] CFGTPHSTMODE;
21800    output [5:0] CFGVFFLRINPROCESS;
21801    output [5:0] CFGVFTPHREQUESTERENABLE;
21802    output [5:0] PCIECQNPREQCOUNT;
21803    output [5:0] PCIERQTAG;
21804    output [5:0] PIPERX0EQLPLFFS;
21805    output [5:0] PIPERX1EQLPLFFS;
21806    output [5:0] PIPERX2EQLPLFFS;
21807    output [5:0] PIPERX3EQLPLFFS;
21808    output [5:0] PIPERX4EQLPLFFS;
21809    output [5:0] PIPERX5EQLPLFFS;
21810    output [5:0] PIPERX6EQLPLFFS;
21811    output [5:0] PIPERX7EQLPLFFS;
21812    output [5:0] PIPETX0EQDEEMPH;
21813    output [5:0] PIPETX1EQDEEMPH;
21814    output [5:0] PIPETX2EQDEEMPH;
21815    output [5:0] PIPETX3EQDEEMPH;
21816    output [5:0] PIPETX4EQDEEMPH;
21817    output [5:0] PIPETX5EQDEEMPH;
21818    output [5:0] PIPETX6EQDEEMPH;
21819    output [5:0] PIPETX7EQDEEMPH;
21820    output [71:0] MICOMPLETIONRAMWRITEDATAL;
21821    output [71:0] MICOMPLETIONRAMWRITEDATAU;
21822    output [74:0] MAXISRCTUSER;
21823    output [7:0] CFGEXTFUNCTIONNUMBER;
21824    output [7:0] CFGFCCPLH;
21825    output [7:0] CFGFCNPH;
21826    output [7:0] CFGFCPH;
21827    output [7:0] CFGFUNCTIONSTATUS;
21828    output [7:0] CFGMSGRECEIVEDDATA;
21829    output [7:0] MAXISCQTKEEP;
21830    output [7:0] MAXISRCTKEEP;
21831    output [7:0] PLGEN3PCSRXSLIDE;
21832    output [84:0] MAXISCQTUSER;
21833    output [8:0] MIREPLAYRAMADDRESS;
21834    output [8:0] MIREQUESTRAMREADADDRESSA;
21835    output [8:0] MIREQUESTRAMREADADDRESSB;
21836    output [8:0] MIREQUESTRAMWRITEADDRESSA;
21837    output [8:0] MIREQUESTRAMWRITEADDRESSB;
21838    output [9:0] CFGEXTREGISTERNUMBER;
21839    output [9:0] MICOMPLETIONRAMREADADDRESSAL;
21840    output [9:0] MICOMPLETIONRAMREADADDRESSAU;
21841    output [9:0] MICOMPLETIONRAMREADADDRESSBL;
21842    output [9:0] MICOMPLETIONRAMREADADDRESSBU;
21843    output [9:0] MICOMPLETIONRAMWRITEADDRESSAL;
21844    output [9:0] MICOMPLETIONRAMWRITEADDRESSAU;
21845    output [9:0] MICOMPLETIONRAMWRITEADDRESSBL;
21846    output [9:0] MICOMPLETIONRAMWRITEADDRESSBU;
21847    input CFGCONFIGSPACEENABLE;
21848    input CFGERRCORIN;
21849    input CFGERRUNCORIN;
21850    input CFGEXTREADDATAVALID;
21851    input CFGHOTRESETIN;
21852    input CFGINPUTUPDATEREQUEST;
21853    input CFGINTERRUPTMSITPHPRESENT;
21854    input CFGINTERRUPTMSIXINT;
21855    input CFGLINKTRAININGENABLE;
21856    input CFGMCUPDATEREQUEST;
21857    input CFGMGMTREAD;
21858    input CFGMGMTTYPE1CFGREGACCESS;
21859    input CFGMGMTWRITE;
21860    input CFGMSGTRANSMIT;
21861    input CFGPERFUNCTIONOUTPUTREQUEST;
21862    input CFGPOWERSTATECHANGEACK;
21863    input CFGREQPMTRANSITIONL23READY;
21864    input CFGTPHSTTREADDATAVALID;
21865    input CORECLK;
21866    input CORECLKMICOMPLETIONRAML;
21867    input CORECLKMICOMPLETIONRAMU;
21868    input CORECLKMIREPLAYRAM;
21869    input CORECLKMIREQUESTRAM;
21870    input DRPCLK;
21871    input DRPEN;
21872    input DRPWE;
21873    input MGMTRESETN;
21874    input MGMTSTICKYRESETN;
21875    input PCIECQNPREQ;
21876    input PIPECLK;
21877    input PIPERESETN;
21878    input PIPERX0DATAVALID;
21879    input PIPERX0ELECIDLE;
21880    input PIPERX0EQDONE;
21881    input PIPERX0EQLPADAPTDONE;
21882    input PIPERX0EQLPLFFSSEL;
21883    input PIPERX0PHYSTATUS;
21884    input PIPERX0STARTBLOCK;
21885    input PIPERX0VALID;
21886    input PIPERX1DATAVALID;
21887    input PIPERX1ELECIDLE;
21888    input PIPERX1EQDONE;
21889    input PIPERX1EQLPADAPTDONE;
21890    input PIPERX1EQLPLFFSSEL;
21891    input PIPERX1PHYSTATUS;
21892    input PIPERX1STARTBLOCK;
21893    input PIPERX1VALID;
21894    input PIPERX2DATAVALID;
21895    input PIPERX2ELECIDLE;
21896    input PIPERX2EQDONE;
21897    input PIPERX2EQLPADAPTDONE;
21898    input PIPERX2EQLPLFFSSEL;
21899    input PIPERX2PHYSTATUS;
21900    input PIPERX2STARTBLOCK;
21901    input PIPERX2VALID;
21902    input PIPERX3DATAVALID;
21903    input PIPERX3ELECIDLE;
21904    input PIPERX3EQDONE;
21905    input PIPERX3EQLPADAPTDONE;
21906    input PIPERX3EQLPLFFSSEL;
21907    input PIPERX3PHYSTATUS;
21908    input PIPERX3STARTBLOCK;
21909    input PIPERX3VALID;
21910    input PIPERX4DATAVALID;
21911    input PIPERX4ELECIDLE;
21912    input PIPERX4EQDONE;
21913    input PIPERX4EQLPADAPTDONE;
21914    input PIPERX4EQLPLFFSSEL;
21915    input PIPERX4PHYSTATUS;
21916    input PIPERX4STARTBLOCK;
21917    input PIPERX4VALID;
21918    input PIPERX5DATAVALID;
21919    input PIPERX5ELECIDLE;
21920    input PIPERX5EQDONE;
21921    input PIPERX5EQLPADAPTDONE;
21922    input PIPERX5EQLPLFFSSEL;
21923    input PIPERX5PHYSTATUS;
21924    input PIPERX5STARTBLOCK;
21925    input PIPERX5VALID;
21926    input PIPERX6DATAVALID;
21927    input PIPERX6ELECIDLE;
21928    input PIPERX6EQDONE;
21929    input PIPERX6EQLPADAPTDONE;
21930    input PIPERX6EQLPLFFSSEL;
21931    input PIPERX6PHYSTATUS;
21932    input PIPERX6STARTBLOCK;
21933    input PIPERX6VALID;
21934    input PIPERX7DATAVALID;
21935    input PIPERX7ELECIDLE;
21936    input PIPERX7EQDONE;
21937    input PIPERX7EQLPADAPTDONE;
21938    input PIPERX7EQLPLFFSSEL;
21939    input PIPERX7PHYSTATUS;
21940    input PIPERX7STARTBLOCK;
21941    input PIPERX7VALID;
21942    input PIPETX0EQDONE;
21943    input PIPETX1EQDONE;
21944    input PIPETX2EQDONE;
21945    input PIPETX3EQDONE;
21946    input PIPETX4EQDONE;
21947    input PIPETX5EQDONE;
21948    input PIPETX6EQDONE;
21949    input PIPETX7EQDONE;
21950    input PLDISABLESCRAMBLER;
21951    input PLEQRESETEIEOSCOUNT;
21952    input PLGEN3PCSDISABLE;
21953    input RECCLK;
21954    input RESETN;
21955    input SAXISCCTLAST;
21956    input SAXISCCTVALID;
21957    input SAXISRQTLAST;
21958    input SAXISRQTVALID;
21959    input USERCLK;
21960    input [10:0] DRPADDR;
21961    input [143:0] MICOMPLETIONRAMREADDATA;
21962    input [143:0] MIREPLAYRAMREADDATA;
21963    input [143:0] MIREQUESTRAMREADDATA;
21964    input [15:0] CFGDEVID;
21965    input [15:0] CFGSUBSYSID;
21966    input [15:0] CFGSUBSYSVENDID;
21967    input [15:0] CFGVENDID;
21968    input [15:0] DRPDI;
21969    input [17:0] PIPERX0EQLPNEWTXCOEFFORPRESET;
21970    input [17:0] PIPERX1EQLPNEWTXCOEFFORPRESET;
21971    input [17:0] PIPERX2EQLPNEWTXCOEFFORPRESET;
21972    input [17:0] PIPERX3EQLPNEWTXCOEFFORPRESET;
21973    input [17:0] PIPERX4EQLPNEWTXCOEFFORPRESET;
21974    input [17:0] PIPERX5EQLPNEWTXCOEFFORPRESET;
21975    input [17:0] PIPERX6EQLPNEWTXCOEFFORPRESET;
21976    input [17:0] PIPERX7EQLPNEWTXCOEFFORPRESET;
21977    input [17:0] PIPETX0EQCOEFF;
21978    input [17:0] PIPETX1EQCOEFF;
21979    input [17:0] PIPETX2EQCOEFF;
21980    input [17:0] PIPETX3EQCOEFF;
21981    input [17:0] PIPETX4EQCOEFF;
21982    input [17:0] PIPETX5EQCOEFF;
21983    input [17:0] PIPETX6EQCOEFF;
21984    input [17:0] PIPETX7EQCOEFF;
21985    input [18:0] CFGMGMTADDR;
21986    input [1:0] CFGFLRDONE;
21987    input [1:0] CFGINTERRUPTMSITPHTYPE;
21988    input [1:0] CFGINTERRUPTPENDING;
21989    input [1:0] PIPERX0CHARISK;
21990    input [1:0] PIPERX0SYNCHEADER;
21991    input [1:0] PIPERX1CHARISK;
21992    input [1:0] PIPERX1SYNCHEADER;
21993    input [1:0] PIPERX2CHARISK;
21994    input [1:0] PIPERX2SYNCHEADER;
21995    input [1:0] PIPERX3CHARISK;
21996    input [1:0] PIPERX3SYNCHEADER;
21997    input [1:0] PIPERX4CHARISK;
21998    input [1:0] PIPERX4SYNCHEADER;
21999    input [1:0] PIPERX5CHARISK;
22000    input [1:0] PIPERX5SYNCHEADER;
22001    input [1:0] PIPERX6CHARISK;
22002    input [1:0] PIPERX6SYNCHEADER;
22003    input [1:0] PIPERX7CHARISK;
22004    input [1:0] PIPERX7SYNCHEADER;
22005    input [21:0] MAXISCQTREADY;
22006    input [21:0] MAXISRCTREADY;
22007    input [255:0] SAXISCCTDATA;
22008    input [255:0] SAXISRQTDATA;
22009    input [2:0] CFGDSFUNCTIONNUMBER;
22010    input [2:0] CFGFCSEL;
22011    input [2:0] CFGINTERRUPTMSIATTR;
22012    input [2:0] CFGINTERRUPTMSIFUNCTIONNUMBER;
22013    input [2:0] CFGMSGTRANSMITTYPE;
22014    input [2:0] CFGPERFUNCSTATUSCONTROL;
22015    input [2:0] CFGPERFUNCTIONNUMBER;
22016    input [2:0] PIPERX0STATUS;
22017    input [2:0] PIPERX1STATUS;
22018    input [2:0] PIPERX2STATUS;
22019    input [2:0] PIPERX3STATUS;
22020    input [2:0] PIPERX4STATUS;
22021    input [2:0] PIPERX5STATUS;
22022    input [2:0] PIPERX6STATUS;
22023    input [2:0] PIPERX7STATUS;
22024    input [31:0] CFGEXTREADDATA;
22025    input [31:0] CFGINTERRUPTMSIINT;
22026    input [31:0] CFGINTERRUPTMSIXDATA;
22027    input [31:0] CFGMGMTWRITEDATA;
22028    input [31:0] CFGMSGTRANSMITDATA;
22029    input [31:0] CFGTPHSTTREADDATA;
22030    input [31:0] PIPERX0DATA;
22031    input [31:0] PIPERX1DATA;
22032    input [31:0] PIPERX2DATA;
22033    input [31:0] PIPERX3DATA;
22034    input [31:0] PIPERX4DATA;
22035    input [31:0] PIPERX5DATA;
22036    input [31:0] PIPERX6DATA;
22037    input [31:0] PIPERX7DATA;
22038    input [32:0] SAXISCCTUSER;
22039    input [3:0] CFGINTERRUPTINT;
22040    input [3:0] CFGINTERRUPTMSISELECT;
22041    input [3:0] CFGMGMTBYTEENABLE;
22042    input [4:0] CFGDSDEVICENUMBER;
22043    input [59:0] SAXISRQTUSER;
22044    input [5:0] CFGVFFLRDONE;
22045    input [5:0] PIPEEQFS;
22046    input [5:0] PIPEEQLF;
22047    input [63:0] CFGDSN;
22048    input [63:0] CFGINTERRUPTMSIPENDINGSTATUS;
22049    input [63:0] CFGINTERRUPTMSIXADDRESS;
22050    input [7:0] CFGDSBUSNUMBER;
22051    input [7:0] CFGDSPORTNUMBER;
22052    input [7:0] CFGREVID;
22053    input [7:0] PLGEN3PCSRXSYNCDONE;
22054    input [7:0] SAXISCCTKEEP;
22055    input [7:0] SAXISRQTKEEP;
22056    input [8:0] CFGINTERRUPTMSITPHSTTAG;
22057endmodule
22058
22059module PCIE_3_1 (...);
22060    parameter ARI_CAP_ENABLE = "FALSE";
22061    parameter AXISTEN_IF_CC_ALIGNMENT_MODE = "FALSE";
22062    parameter AXISTEN_IF_CC_PARITY_CHK = "TRUE";
22063    parameter AXISTEN_IF_CQ_ALIGNMENT_MODE = "FALSE";
22064    parameter AXISTEN_IF_ENABLE_CLIENT_TAG = "FALSE";
22065    parameter [17:0] AXISTEN_IF_ENABLE_MSG_ROUTE = 18'h00000;
22066    parameter AXISTEN_IF_ENABLE_RX_MSG_INTFC = "FALSE";
22067    parameter AXISTEN_IF_RC_ALIGNMENT_MODE = "FALSE";
22068    parameter AXISTEN_IF_RC_STRADDLE = "FALSE";
22069    parameter AXISTEN_IF_RQ_ALIGNMENT_MODE = "FALSE";
22070    parameter AXISTEN_IF_RQ_PARITY_CHK = "TRUE";
22071    parameter [1:0] AXISTEN_IF_WIDTH = 2'h2;
22072    parameter CRM_CORE_CLK_FREQ_500 = "TRUE";
22073    parameter [1:0] CRM_USER_CLK_FREQ = 2'h2;
22074    parameter DEBUG_CFG_LOCAL_MGMT_REG_ACCESS_OVERRIDE = "FALSE";
22075    parameter DEBUG_PL_DISABLE_EI_INFER_IN_L0 = "FALSE";
22076    parameter DEBUG_TL_DISABLE_RX_TLP_ORDER_CHECKS = "FALSE";
22077    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
22078    parameter [8:0] LL_ACK_TIMEOUT = 9'h000;
22079    parameter LL_ACK_TIMEOUT_EN = "FALSE";
22080    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
22081    parameter [15:0] LL_CPL_FC_UPDATE_TIMER = 16'h0000;
22082    parameter LL_CPL_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
22083    parameter [15:0] LL_FC_UPDATE_TIMER = 16'h0000;
22084    parameter LL_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
22085    parameter [15:0] LL_NP_FC_UPDATE_TIMER = 16'h0000;
22086    parameter LL_NP_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
22087    parameter [15:0] LL_P_FC_UPDATE_TIMER = 16'h0000;
22088    parameter LL_P_FC_UPDATE_TIMER_OVERRIDE = "FALSE";
22089    parameter [8:0] LL_REPLAY_TIMEOUT = 9'h000;
22090    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
22091    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
22092    parameter [9:0] LTR_TX_MESSAGE_MINIMUM_INTERVAL = 10'h0FA;
22093    parameter LTR_TX_MESSAGE_ON_FUNC_POWER_STATE_CHANGE = "FALSE";
22094    parameter LTR_TX_MESSAGE_ON_LTR_ENABLE = "FALSE";
22095    parameter [11:0] MCAP_CAP_NEXTPTR = 12'h000;
22096    parameter MCAP_CONFIGURE_OVERRIDE = "FALSE";
22097    parameter MCAP_ENABLE = "FALSE";
22098    parameter MCAP_EOS_DESIGN_SWITCH = "FALSE";
22099    parameter [31:0] MCAP_FPGA_BITSTREAM_VERSION = 32'h00000000;
22100    parameter MCAP_GATE_IO_ENABLE_DESIGN_SWITCH = "FALSE";
22101    parameter MCAP_GATE_MEM_ENABLE_DESIGN_SWITCH = "FALSE";
22102    parameter MCAP_INPUT_GATE_DESIGN_SWITCH = "FALSE";
22103    parameter MCAP_INTERRUPT_ON_MCAP_EOS = "FALSE";
22104    parameter MCAP_INTERRUPT_ON_MCAP_ERROR = "FALSE";
22105    parameter [15:0] MCAP_VSEC_ID = 16'h0000;
22106    parameter [11:0] MCAP_VSEC_LEN = 12'h02C;
22107    parameter [3:0] MCAP_VSEC_REV = 4'h0;
22108    parameter PF0_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
22109    parameter PF0_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
22110    parameter [11:0] PF0_AER_CAP_NEXTPTR = 12'h000;
22111    parameter [11:0] PF0_ARI_CAP_NEXTPTR = 12'h000;
22112    parameter [7:0] PF0_ARI_CAP_NEXT_FUNC = 8'h00;
22113    parameter [3:0] PF0_ARI_CAP_VER = 4'h1;
22114    parameter [5:0] PF0_BAR0_APERTURE_SIZE = 6'h03;
22115    parameter [2:0] PF0_BAR0_CONTROL = 3'h4;
22116    parameter [5:0] PF0_BAR1_APERTURE_SIZE = 6'h00;
22117    parameter [2:0] PF0_BAR1_CONTROL = 3'h0;
22118    parameter [4:0] PF0_BAR2_APERTURE_SIZE = 5'h03;
22119    parameter [2:0] PF0_BAR2_CONTROL = 3'h4;
22120    parameter [4:0] PF0_BAR3_APERTURE_SIZE = 5'h03;
22121    parameter [2:0] PF0_BAR3_CONTROL = 3'h0;
22122    parameter [4:0] PF0_BAR4_APERTURE_SIZE = 5'h03;
22123    parameter [2:0] PF0_BAR4_CONTROL = 3'h4;
22124    parameter [4:0] PF0_BAR5_APERTURE_SIZE = 5'h03;
22125    parameter [2:0] PF0_BAR5_CONTROL = 3'h0;
22126    parameter [7:0] PF0_BIST_REGISTER = 8'h00;
22127    parameter [7:0] PF0_CAPABILITY_POINTER = 8'h50;
22128    parameter [23:0] PF0_CLASS_CODE = 24'h000000;
22129    parameter [15:0] PF0_DEVICE_ID = 16'h0000;
22130    parameter PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT = "TRUE";
22131    parameter PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
22132    parameter PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
22133    parameter PF0_DEV_CAP2_ARI_FORWARD_ENABLE = "FALSE";
22134    parameter PF0_DEV_CAP2_CPL_TIMEOUT_DISABLE = "TRUE";
22135    parameter PF0_DEV_CAP2_LTR_SUPPORT = "TRUE";
22136    parameter [1:0] PF0_DEV_CAP2_OBFF_SUPPORT = 2'h0;
22137    parameter PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT = "FALSE";
22138    parameter integer PF0_DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
22139    parameter integer PF0_DEV_CAP_ENDPOINT_L1_LATENCY = 0;
22140    parameter PF0_DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
22141    parameter PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "TRUE";
22142    parameter [2:0] PF0_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
22143    parameter [11:0] PF0_DPA_CAP_NEXTPTR = 12'h000;
22144    parameter [4:0] PF0_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
22145    parameter PF0_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
22146    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
22147    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
22148    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
22149    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
22150    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
22151    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
22152    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
22153    parameter [7:0] PF0_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
22154    parameter [3:0] PF0_DPA_CAP_VER = 4'h1;
22155    parameter [11:0] PF0_DSN_CAP_NEXTPTR = 12'h10C;
22156    parameter [4:0] PF0_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
22157    parameter PF0_EXPANSION_ROM_ENABLE = "FALSE";
22158    parameter [7:0] PF0_INTERRUPT_LINE = 8'h00;
22159    parameter [2:0] PF0_INTERRUPT_PIN = 3'h1;
22160    parameter integer PF0_LINK_CAP_ASPM_SUPPORT = 0;
22161    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
22162    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
22163    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN3 = 7;
22164    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
22165    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
22166    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN3 = 7;
22167    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
22168    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
22169    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN3 = 7;
22170    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
22171    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
22172    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN3 = 7;
22173    parameter PF0_LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
22174    parameter [9:0] PF0_LTR_CAP_MAX_NOSNOOP_LAT = 10'h000;
22175    parameter [9:0] PF0_LTR_CAP_MAX_SNOOP_LAT = 10'h000;
22176    parameter [11:0] PF0_LTR_CAP_NEXTPTR = 12'h000;
22177    parameter [3:0] PF0_LTR_CAP_VER = 4'h1;
22178    parameter [7:0] PF0_MSIX_CAP_NEXTPTR = 8'h00;
22179    parameter integer PF0_MSIX_CAP_PBA_BIR = 0;
22180    parameter [28:0] PF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22181    parameter integer PF0_MSIX_CAP_TABLE_BIR = 0;
22182    parameter [28:0] PF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22183    parameter [10:0] PF0_MSIX_CAP_TABLE_SIZE = 11'h000;
22184    parameter integer PF0_MSI_CAP_MULTIMSGCAP = 0;
22185    parameter [7:0] PF0_MSI_CAP_NEXTPTR = 8'h00;
22186    parameter PF0_MSI_CAP_PERVECMASKCAP = "FALSE";
22187    parameter [31:0] PF0_PB_CAP_DATA_REG_D0 = 32'h00000000;
22188    parameter [31:0] PF0_PB_CAP_DATA_REG_D0_SUSTAINED = 32'h00000000;
22189    parameter [31:0] PF0_PB_CAP_DATA_REG_D1 = 32'h00000000;
22190    parameter [31:0] PF0_PB_CAP_DATA_REG_D3HOT = 32'h00000000;
22191    parameter [11:0] PF0_PB_CAP_NEXTPTR = 12'h000;
22192    parameter PF0_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
22193    parameter [3:0] PF0_PB_CAP_VER = 4'h1;
22194    parameter [7:0] PF0_PM_CAP_ID = 8'h01;
22195    parameter [7:0] PF0_PM_CAP_NEXTPTR = 8'h00;
22196    parameter PF0_PM_CAP_PMESUPPORT_D0 = "TRUE";
22197    parameter PF0_PM_CAP_PMESUPPORT_D1 = "TRUE";
22198    parameter PF0_PM_CAP_PMESUPPORT_D3HOT = "TRUE";
22199    parameter PF0_PM_CAP_SUPP_D1_STATE = "TRUE";
22200    parameter [2:0] PF0_PM_CAP_VER_ID = 3'h3;
22201    parameter PF0_PM_CSR_NOSOFTRESET = "TRUE";
22202    parameter PF0_RBAR_CAP_ENABLE = "FALSE";
22203    parameter [11:0] PF0_RBAR_CAP_NEXTPTR = 12'h000;
22204    parameter [19:0] PF0_RBAR_CAP_SIZE0 = 20'h00000;
22205    parameter [19:0] PF0_RBAR_CAP_SIZE1 = 20'h00000;
22206    parameter [19:0] PF0_RBAR_CAP_SIZE2 = 20'h00000;
22207    parameter [3:0] PF0_RBAR_CAP_VER = 4'h1;
22208    parameter [2:0] PF0_RBAR_CONTROL_INDEX0 = 3'h0;
22209    parameter [2:0] PF0_RBAR_CONTROL_INDEX1 = 3'h0;
22210    parameter [2:0] PF0_RBAR_CONTROL_INDEX2 = 3'h0;
22211    parameter [4:0] PF0_RBAR_CONTROL_SIZE0 = 5'h00;
22212    parameter [4:0] PF0_RBAR_CONTROL_SIZE1 = 5'h00;
22213    parameter [4:0] PF0_RBAR_CONTROL_SIZE2 = 5'h00;
22214    parameter [2:0] PF0_RBAR_NUM = 3'h1;
22215    parameter [7:0] PF0_REVISION_ID = 8'h00;
22216    parameter [11:0] PF0_SECONDARY_PCIE_CAP_NEXTPTR = 12'h000;
22217    parameter [4:0] PF0_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
22218    parameter [2:0] PF0_SRIOV_BAR0_CONTROL = 3'h4;
22219    parameter [4:0] PF0_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
22220    parameter [2:0] PF0_SRIOV_BAR1_CONTROL = 3'h0;
22221    parameter [4:0] PF0_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
22222    parameter [2:0] PF0_SRIOV_BAR2_CONTROL = 3'h4;
22223    parameter [4:0] PF0_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
22224    parameter [2:0] PF0_SRIOV_BAR3_CONTROL = 3'h0;
22225    parameter [4:0] PF0_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
22226    parameter [2:0] PF0_SRIOV_BAR4_CONTROL = 3'h4;
22227    parameter [4:0] PF0_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
22228    parameter [2:0] PF0_SRIOV_BAR5_CONTROL = 3'h0;
22229    parameter [15:0] PF0_SRIOV_CAP_INITIAL_VF = 16'h0000;
22230    parameter [11:0] PF0_SRIOV_CAP_NEXTPTR = 12'h000;
22231    parameter [15:0] PF0_SRIOV_CAP_TOTAL_VF = 16'h0000;
22232    parameter [3:0] PF0_SRIOV_CAP_VER = 4'h1;
22233    parameter [15:0] PF0_SRIOV_FIRST_VF_OFFSET = 16'h0000;
22234    parameter [15:0] PF0_SRIOV_FUNC_DEP_LINK = 16'h0000;
22235    parameter [31:0] PF0_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
22236    parameter [15:0] PF0_SRIOV_VF_DEVICE_ID = 16'h0000;
22237    parameter [15:0] PF0_SUBSYSTEM_ID = 16'h0000;
22238    parameter PF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22239    parameter PF0_TPHR_CAP_ENABLE = "FALSE";
22240    parameter PF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
22241    parameter [11:0] PF0_TPHR_CAP_NEXTPTR = 12'h000;
22242    parameter [2:0] PF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
22243    parameter [1:0] PF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22244    parameter [10:0] PF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22245    parameter [3:0] PF0_TPHR_CAP_VER = 4'h1;
22246    parameter PF0_VC_CAP_ENABLE = "FALSE";
22247    parameter [11:0] PF0_VC_CAP_NEXTPTR = 12'h000;
22248    parameter [3:0] PF0_VC_CAP_VER = 4'h1;
22249    parameter PF1_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
22250    parameter PF1_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
22251    parameter [11:0] PF1_AER_CAP_NEXTPTR = 12'h000;
22252    parameter [11:0] PF1_ARI_CAP_NEXTPTR = 12'h000;
22253    parameter [7:0] PF1_ARI_CAP_NEXT_FUNC = 8'h00;
22254    parameter [5:0] PF1_BAR0_APERTURE_SIZE = 6'h03;
22255    parameter [2:0] PF1_BAR0_CONTROL = 3'h4;
22256    parameter [5:0] PF1_BAR1_APERTURE_SIZE = 6'h00;
22257    parameter [2:0] PF1_BAR1_CONTROL = 3'h0;
22258    parameter [4:0] PF1_BAR2_APERTURE_SIZE = 5'h03;
22259    parameter [2:0] PF1_BAR2_CONTROL = 3'h4;
22260    parameter [4:0] PF1_BAR3_APERTURE_SIZE = 5'h03;
22261    parameter [2:0] PF1_BAR3_CONTROL = 3'h0;
22262    parameter [4:0] PF1_BAR4_APERTURE_SIZE = 5'h03;
22263    parameter [2:0] PF1_BAR4_CONTROL = 3'h4;
22264    parameter [4:0] PF1_BAR5_APERTURE_SIZE = 5'h03;
22265    parameter [2:0] PF1_BAR5_CONTROL = 3'h0;
22266    parameter [7:0] PF1_BIST_REGISTER = 8'h00;
22267    parameter [7:0] PF1_CAPABILITY_POINTER = 8'h50;
22268    parameter [23:0] PF1_CLASS_CODE = 24'h000000;
22269    parameter [15:0] PF1_DEVICE_ID = 16'h0000;
22270    parameter [2:0] PF1_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
22271    parameter [11:0] PF1_DPA_CAP_NEXTPTR = 12'h000;
22272    parameter [4:0] PF1_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
22273    parameter PF1_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
22274    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
22275    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
22276    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
22277    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
22278    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
22279    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
22280    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
22281    parameter [7:0] PF1_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
22282    parameter [3:0] PF1_DPA_CAP_VER = 4'h1;
22283    parameter [11:0] PF1_DSN_CAP_NEXTPTR = 12'h10C;
22284    parameter [4:0] PF1_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
22285    parameter PF1_EXPANSION_ROM_ENABLE = "FALSE";
22286    parameter [7:0] PF1_INTERRUPT_LINE = 8'h00;
22287    parameter [2:0] PF1_INTERRUPT_PIN = 3'h1;
22288    parameter [7:0] PF1_MSIX_CAP_NEXTPTR = 8'h00;
22289    parameter integer PF1_MSIX_CAP_PBA_BIR = 0;
22290    parameter [28:0] PF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22291    parameter integer PF1_MSIX_CAP_TABLE_BIR = 0;
22292    parameter [28:0] PF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22293    parameter [10:0] PF1_MSIX_CAP_TABLE_SIZE = 11'h000;
22294    parameter integer PF1_MSI_CAP_MULTIMSGCAP = 0;
22295    parameter [7:0] PF1_MSI_CAP_NEXTPTR = 8'h00;
22296    parameter PF1_MSI_CAP_PERVECMASKCAP = "FALSE";
22297    parameter [31:0] PF1_PB_CAP_DATA_REG_D0 = 32'h00000000;
22298    parameter [31:0] PF1_PB_CAP_DATA_REG_D0_SUSTAINED = 32'h00000000;
22299    parameter [31:0] PF1_PB_CAP_DATA_REG_D1 = 32'h00000000;
22300    parameter [31:0] PF1_PB_CAP_DATA_REG_D3HOT = 32'h00000000;
22301    parameter [11:0] PF1_PB_CAP_NEXTPTR = 12'h000;
22302    parameter PF1_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
22303    parameter [3:0] PF1_PB_CAP_VER = 4'h1;
22304    parameter [7:0] PF1_PM_CAP_ID = 8'h01;
22305    parameter [7:0] PF1_PM_CAP_NEXTPTR = 8'h00;
22306    parameter [2:0] PF1_PM_CAP_VER_ID = 3'h3;
22307    parameter PF1_RBAR_CAP_ENABLE = "FALSE";
22308    parameter [11:0] PF1_RBAR_CAP_NEXTPTR = 12'h000;
22309    parameter [19:0] PF1_RBAR_CAP_SIZE0 = 20'h00000;
22310    parameter [19:0] PF1_RBAR_CAP_SIZE1 = 20'h00000;
22311    parameter [19:0] PF1_RBAR_CAP_SIZE2 = 20'h00000;
22312    parameter [3:0] PF1_RBAR_CAP_VER = 4'h1;
22313    parameter [2:0] PF1_RBAR_CONTROL_INDEX0 = 3'h0;
22314    parameter [2:0] PF1_RBAR_CONTROL_INDEX1 = 3'h0;
22315    parameter [2:0] PF1_RBAR_CONTROL_INDEX2 = 3'h0;
22316    parameter [4:0] PF1_RBAR_CONTROL_SIZE0 = 5'h00;
22317    parameter [4:0] PF1_RBAR_CONTROL_SIZE1 = 5'h00;
22318    parameter [4:0] PF1_RBAR_CONTROL_SIZE2 = 5'h00;
22319    parameter [2:0] PF1_RBAR_NUM = 3'h1;
22320    parameter [7:0] PF1_REVISION_ID = 8'h00;
22321    parameter [4:0] PF1_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
22322    parameter [2:0] PF1_SRIOV_BAR0_CONTROL = 3'h4;
22323    parameter [4:0] PF1_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
22324    parameter [2:0] PF1_SRIOV_BAR1_CONTROL = 3'h0;
22325    parameter [4:0] PF1_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
22326    parameter [2:0] PF1_SRIOV_BAR2_CONTROL = 3'h4;
22327    parameter [4:0] PF1_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
22328    parameter [2:0] PF1_SRIOV_BAR3_CONTROL = 3'h0;
22329    parameter [4:0] PF1_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
22330    parameter [2:0] PF1_SRIOV_BAR4_CONTROL = 3'h4;
22331    parameter [4:0] PF1_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
22332    parameter [2:0] PF1_SRIOV_BAR5_CONTROL = 3'h0;
22333    parameter [15:0] PF1_SRIOV_CAP_INITIAL_VF = 16'h0000;
22334    parameter [11:0] PF1_SRIOV_CAP_NEXTPTR = 12'h000;
22335    parameter [15:0] PF1_SRIOV_CAP_TOTAL_VF = 16'h0000;
22336    parameter [3:0] PF1_SRIOV_CAP_VER = 4'h1;
22337    parameter [15:0] PF1_SRIOV_FIRST_VF_OFFSET = 16'h0000;
22338    parameter [15:0] PF1_SRIOV_FUNC_DEP_LINK = 16'h0000;
22339    parameter [31:0] PF1_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
22340    parameter [15:0] PF1_SRIOV_VF_DEVICE_ID = 16'h0000;
22341    parameter [15:0] PF1_SUBSYSTEM_ID = 16'h0000;
22342    parameter PF1_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22343    parameter PF1_TPHR_CAP_ENABLE = "FALSE";
22344    parameter PF1_TPHR_CAP_INT_VEC_MODE = "TRUE";
22345    parameter [11:0] PF1_TPHR_CAP_NEXTPTR = 12'h000;
22346    parameter [2:0] PF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
22347    parameter [1:0] PF1_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22348    parameter [10:0] PF1_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22349    parameter [3:0] PF1_TPHR_CAP_VER = 4'h1;
22350    parameter PF2_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
22351    parameter PF2_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
22352    parameter [11:0] PF2_AER_CAP_NEXTPTR = 12'h000;
22353    parameter [11:0] PF2_ARI_CAP_NEXTPTR = 12'h000;
22354    parameter [7:0] PF2_ARI_CAP_NEXT_FUNC = 8'h00;
22355    parameter [5:0] PF2_BAR0_APERTURE_SIZE = 6'h03;
22356    parameter [2:0] PF2_BAR0_CONTROL = 3'h4;
22357    parameter [5:0] PF2_BAR1_APERTURE_SIZE = 6'h00;
22358    parameter [2:0] PF2_BAR1_CONTROL = 3'h0;
22359    parameter [4:0] PF2_BAR2_APERTURE_SIZE = 5'h03;
22360    parameter [2:0] PF2_BAR2_CONTROL = 3'h4;
22361    parameter [4:0] PF2_BAR3_APERTURE_SIZE = 5'h03;
22362    parameter [2:0] PF2_BAR3_CONTROL = 3'h0;
22363    parameter [4:0] PF2_BAR4_APERTURE_SIZE = 5'h03;
22364    parameter [2:0] PF2_BAR4_CONTROL = 3'h4;
22365    parameter [4:0] PF2_BAR5_APERTURE_SIZE = 5'h03;
22366    parameter [2:0] PF2_BAR5_CONTROL = 3'h0;
22367    parameter [7:0] PF2_BIST_REGISTER = 8'h00;
22368    parameter [7:0] PF2_CAPABILITY_POINTER = 8'h50;
22369    parameter [23:0] PF2_CLASS_CODE = 24'h000000;
22370    parameter [15:0] PF2_DEVICE_ID = 16'h0000;
22371    parameter [2:0] PF2_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
22372    parameter [11:0] PF2_DPA_CAP_NEXTPTR = 12'h000;
22373    parameter [4:0] PF2_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
22374    parameter PF2_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
22375    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
22376    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
22377    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
22378    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
22379    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
22380    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
22381    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
22382    parameter [7:0] PF2_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
22383    parameter [3:0] PF2_DPA_CAP_VER = 4'h1;
22384    parameter [11:0] PF2_DSN_CAP_NEXTPTR = 12'h10C;
22385    parameter [4:0] PF2_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
22386    parameter PF2_EXPANSION_ROM_ENABLE = "FALSE";
22387    parameter [7:0] PF2_INTERRUPT_LINE = 8'h00;
22388    parameter [2:0] PF2_INTERRUPT_PIN = 3'h1;
22389    parameter [7:0] PF2_MSIX_CAP_NEXTPTR = 8'h00;
22390    parameter integer PF2_MSIX_CAP_PBA_BIR = 0;
22391    parameter [28:0] PF2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22392    parameter integer PF2_MSIX_CAP_TABLE_BIR = 0;
22393    parameter [28:0] PF2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22394    parameter [10:0] PF2_MSIX_CAP_TABLE_SIZE = 11'h000;
22395    parameter integer PF2_MSI_CAP_MULTIMSGCAP = 0;
22396    parameter [7:0] PF2_MSI_CAP_NEXTPTR = 8'h00;
22397    parameter PF2_MSI_CAP_PERVECMASKCAP = "FALSE";
22398    parameter [31:0] PF2_PB_CAP_DATA_REG_D0 = 32'h00000000;
22399    parameter [31:0] PF2_PB_CAP_DATA_REG_D0_SUSTAINED = 32'h00000000;
22400    parameter [31:0] PF2_PB_CAP_DATA_REG_D1 = 32'h00000000;
22401    parameter [31:0] PF2_PB_CAP_DATA_REG_D3HOT = 32'h00000000;
22402    parameter [11:0] PF2_PB_CAP_NEXTPTR = 12'h000;
22403    parameter PF2_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
22404    parameter [3:0] PF2_PB_CAP_VER = 4'h1;
22405    parameter [7:0] PF2_PM_CAP_ID = 8'h01;
22406    parameter [7:0] PF2_PM_CAP_NEXTPTR = 8'h00;
22407    parameter [2:0] PF2_PM_CAP_VER_ID = 3'h3;
22408    parameter PF2_RBAR_CAP_ENABLE = "FALSE";
22409    parameter [11:0] PF2_RBAR_CAP_NEXTPTR = 12'h000;
22410    parameter [19:0] PF2_RBAR_CAP_SIZE0 = 20'h00000;
22411    parameter [19:0] PF2_RBAR_CAP_SIZE1 = 20'h00000;
22412    parameter [19:0] PF2_RBAR_CAP_SIZE2 = 20'h00000;
22413    parameter [3:0] PF2_RBAR_CAP_VER = 4'h1;
22414    parameter [2:0] PF2_RBAR_CONTROL_INDEX0 = 3'h0;
22415    parameter [2:0] PF2_RBAR_CONTROL_INDEX1 = 3'h0;
22416    parameter [2:0] PF2_RBAR_CONTROL_INDEX2 = 3'h0;
22417    parameter [4:0] PF2_RBAR_CONTROL_SIZE0 = 5'h00;
22418    parameter [4:0] PF2_RBAR_CONTROL_SIZE1 = 5'h00;
22419    parameter [4:0] PF2_RBAR_CONTROL_SIZE2 = 5'h00;
22420    parameter [2:0] PF2_RBAR_NUM = 3'h1;
22421    parameter [7:0] PF2_REVISION_ID = 8'h00;
22422    parameter [4:0] PF2_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
22423    parameter [2:0] PF2_SRIOV_BAR0_CONTROL = 3'h4;
22424    parameter [4:0] PF2_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
22425    parameter [2:0] PF2_SRIOV_BAR1_CONTROL = 3'h0;
22426    parameter [4:0] PF2_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
22427    parameter [2:0] PF2_SRIOV_BAR2_CONTROL = 3'h4;
22428    parameter [4:0] PF2_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
22429    parameter [2:0] PF2_SRIOV_BAR3_CONTROL = 3'h0;
22430    parameter [4:0] PF2_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
22431    parameter [2:0] PF2_SRIOV_BAR4_CONTROL = 3'h4;
22432    parameter [4:0] PF2_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
22433    parameter [2:0] PF2_SRIOV_BAR5_CONTROL = 3'h0;
22434    parameter [15:0] PF2_SRIOV_CAP_INITIAL_VF = 16'h0000;
22435    parameter [11:0] PF2_SRIOV_CAP_NEXTPTR = 12'h000;
22436    parameter [15:0] PF2_SRIOV_CAP_TOTAL_VF = 16'h0000;
22437    parameter [3:0] PF2_SRIOV_CAP_VER = 4'h1;
22438    parameter [15:0] PF2_SRIOV_FIRST_VF_OFFSET = 16'h0000;
22439    parameter [15:0] PF2_SRIOV_FUNC_DEP_LINK = 16'h0000;
22440    parameter [31:0] PF2_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
22441    parameter [15:0] PF2_SRIOV_VF_DEVICE_ID = 16'h0000;
22442    parameter [15:0] PF2_SUBSYSTEM_ID = 16'h0000;
22443    parameter PF2_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22444    parameter PF2_TPHR_CAP_ENABLE = "FALSE";
22445    parameter PF2_TPHR_CAP_INT_VEC_MODE = "TRUE";
22446    parameter [11:0] PF2_TPHR_CAP_NEXTPTR = 12'h000;
22447    parameter [2:0] PF2_TPHR_CAP_ST_MODE_SEL = 3'h0;
22448    parameter [1:0] PF2_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22449    parameter [10:0] PF2_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22450    parameter [3:0] PF2_TPHR_CAP_VER = 4'h1;
22451    parameter PF3_AER_CAP_ECRC_CHECK_CAPABLE = "FALSE";
22452    parameter PF3_AER_CAP_ECRC_GEN_CAPABLE = "FALSE";
22453    parameter [11:0] PF3_AER_CAP_NEXTPTR = 12'h000;
22454    parameter [11:0] PF3_ARI_CAP_NEXTPTR = 12'h000;
22455    parameter [7:0] PF3_ARI_CAP_NEXT_FUNC = 8'h00;
22456    parameter [5:0] PF3_BAR0_APERTURE_SIZE = 6'h03;
22457    parameter [2:0] PF3_BAR0_CONTROL = 3'h4;
22458    parameter [5:0] PF3_BAR1_APERTURE_SIZE = 6'h00;
22459    parameter [2:0] PF3_BAR1_CONTROL = 3'h0;
22460    parameter [4:0] PF3_BAR2_APERTURE_SIZE = 5'h03;
22461    parameter [2:0] PF3_BAR2_CONTROL = 3'h4;
22462    parameter [4:0] PF3_BAR3_APERTURE_SIZE = 5'h03;
22463    parameter [2:0] PF3_BAR3_CONTROL = 3'h0;
22464    parameter [4:0] PF3_BAR4_APERTURE_SIZE = 5'h03;
22465    parameter [2:0] PF3_BAR4_CONTROL = 3'h4;
22466    parameter [4:0] PF3_BAR5_APERTURE_SIZE = 5'h03;
22467    parameter [2:0] PF3_BAR5_CONTROL = 3'h0;
22468    parameter [7:0] PF3_BIST_REGISTER = 8'h00;
22469    parameter [7:0] PF3_CAPABILITY_POINTER = 8'h50;
22470    parameter [23:0] PF3_CLASS_CODE = 24'h000000;
22471    parameter [15:0] PF3_DEVICE_ID = 16'h0000;
22472    parameter [2:0] PF3_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
22473    parameter [11:0] PF3_DPA_CAP_NEXTPTR = 12'h000;
22474    parameter [4:0] PF3_DPA_CAP_SUB_STATE_CONTROL = 5'h00;
22475    parameter PF3_DPA_CAP_SUB_STATE_CONTROL_EN = "TRUE";
22476    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION0 = 8'h00;
22477    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION1 = 8'h00;
22478    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION2 = 8'h00;
22479    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION3 = 8'h00;
22480    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION4 = 8'h00;
22481    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION5 = 8'h00;
22482    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION6 = 8'h00;
22483    parameter [7:0] PF3_DPA_CAP_SUB_STATE_POWER_ALLOCATION7 = 8'h00;
22484    parameter [3:0] PF3_DPA_CAP_VER = 4'h1;
22485    parameter [11:0] PF3_DSN_CAP_NEXTPTR = 12'h10C;
22486    parameter [4:0] PF3_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
22487    parameter PF3_EXPANSION_ROM_ENABLE = "FALSE";
22488    parameter [7:0] PF3_INTERRUPT_LINE = 8'h00;
22489    parameter [2:0] PF3_INTERRUPT_PIN = 3'h1;
22490    parameter [7:0] PF3_MSIX_CAP_NEXTPTR = 8'h00;
22491    parameter integer PF3_MSIX_CAP_PBA_BIR = 0;
22492    parameter [28:0] PF3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22493    parameter integer PF3_MSIX_CAP_TABLE_BIR = 0;
22494    parameter [28:0] PF3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22495    parameter [10:0] PF3_MSIX_CAP_TABLE_SIZE = 11'h000;
22496    parameter integer PF3_MSI_CAP_MULTIMSGCAP = 0;
22497    parameter [7:0] PF3_MSI_CAP_NEXTPTR = 8'h00;
22498    parameter PF3_MSI_CAP_PERVECMASKCAP = "FALSE";
22499    parameter [31:0] PF3_PB_CAP_DATA_REG_D0 = 32'h00000000;
22500    parameter [31:0] PF3_PB_CAP_DATA_REG_D0_SUSTAINED = 32'h00000000;
22501    parameter [31:0] PF3_PB_CAP_DATA_REG_D1 = 32'h00000000;
22502    parameter [31:0] PF3_PB_CAP_DATA_REG_D3HOT = 32'h00000000;
22503    parameter [11:0] PF3_PB_CAP_NEXTPTR = 12'h000;
22504    parameter PF3_PB_CAP_SYSTEM_ALLOCATED = "FALSE";
22505    parameter [3:0] PF3_PB_CAP_VER = 4'h1;
22506    parameter [7:0] PF3_PM_CAP_ID = 8'h01;
22507    parameter [7:0] PF3_PM_CAP_NEXTPTR = 8'h00;
22508    parameter [2:0] PF3_PM_CAP_VER_ID = 3'h3;
22509    parameter PF3_RBAR_CAP_ENABLE = "FALSE";
22510    parameter [11:0] PF3_RBAR_CAP_NEXTPTR = 12'h000;
22511    parameter [19:0] PF3_RBAR_CAP_SIZE0 = 20'h00000;
22512    parameter [19:0] PF3_RBAR_CAP_SIZE1 = 20'h00000;
22513    parameter [19:0] PF3_RBAR_CAP_SIZE2 = 20'h00000;
22514    parameter [3:0] PF3_RBAR_CAP_VER = 4'h1;
22515    parameter [2:0] PF3_RBAR_CONTROL_INDEX0 = 3'h0;
22516    parameter [2:0] PF3_RBAR_CONTROL_INDEX1 = 3'h0;
22517    parameter [2:0] PF3_RBAR_CONTROL_INDEX2 = 3'h0;
22518    parameter [4:0] PF3_RBAR_CONTROL_SIZE0 = 5'h00;
22519    parameter [4:0] PF3_RBAR_CONTROL_SIZE1 = 5'h00;
22520    parameter [4:0] PF3_RBAR_CONTROL_SIZE2 = 5'h00;
22521    parameter [2:0] PF3_RBAR_NUM = 3'h1;
22522    parameter [7:0] PF3_REVISION_ID = 8'h00;
22523    parameter [4:0] PF3_SRIOV_BAR0_APERTURE_SIZE = 5'h03;
22524    parameter [2:0] PF3_SRIOV_BAR0_CONTROL = 3'h4;
22525    parameter [4:0] PF3_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
22526    parameter [2:0] PF3_SRIOV_BAR1_CONTROL = 3'h0;
22527    parameter [4:0] PF3_SRIOV_BAR2_APERTURE_SIZE = 5'h03;
22528    parameter [2:0] PF3_SRIOV_BAR2_CONTROL = 3'h4;
22529    parameter [4:0] PF3_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
22530    parameter [2:0] PF3_SRIOV_BAR3_CONTROL = 3'h0;
22531    parameter [4:0] PF3_SRIOV_BAR4_APERTURE_SIZE = 5'h03;
22532    parameter [2:0] PF3_SRIOV_BAR4_CONTROL = 3'h4;
22533    parameter [4:0] PF3_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
22534    parameter [2:0] PF3_SRIOV_BAR5_CONTROL = 3'h0;
22535    parameter [15:0] PF3_SRIOV_CAP_INITIAL_VF = 16'h0000;
22536    parameter [11:0] PF3_SRIOV_CAP_NEXTPTR = 12'h000;
22537    parameter [15:0] PF3_SRIOV_CAP_TOTAL_VF = 16'h0000;
22538    parameter [3:0] PF3_SRIOV_CAP_VER = 4'h1;
22539    parameter [15:0] PF3_SRIOV_FIRST_VF_OFFSET = 16'h0000;
22540    parameter [15:0] PF3_SRIOV_FUNC_DEP_LINK = 16'h0000;
22541    parameter [31:0] PF3_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
22542    parameter [15:0] PF3_SRIOV_VF_DEVICE_ID = 16'h0000;
22543    parameter [15:0] PF3_SUBSYSTEM_ID = 16'h0000;
22544    parameter PF3_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22545    parameter PF3_TPHR_CAP_ENABLE = "FALSE";
22546    parameter PF3_TPHR_CAP_INT_VEC_MODE = "TRUE";
22547    parameter [11:0] PF3_TPHR_CAP_NEXTPTR = 12'h000;
22548    parameter [2:0] PF3_TPHR_CAP_ST_MODE_SEL = 3'h0;
22549    parameter [1:0] PF3_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22550    parameter [10:0] PF3_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22551    parameter [3:0] PF3_TPHR_CAP_VER = 4'h1;
22552    parameter PL_DISABLE_AUTO_EQ_SPEED_CHANGE_TO_GEN3 = "FALSE";
22553    parameter PL_DISABLE_AUTO_SPEED_CHANGE_TO_GEN2 = "FALSE";
22554    parameter PL_DISABLE_EI_INFER_IN_L0 = "FALSE";
22555    parameter PL_DISABLE_GEN3_DC_BALANCE = "FALSE";
22556    parameter PL_DISABLE_GEN3_LFSR_UPDATE_ON_SKP = "TRUE";
22557    parameter PL_DISABLE_RETRAIN_ON_FRAMING_ERROR = "FALSE";
22558    parameter PL_DISABLE_SCRAMBLING = "FALSE";
22559    parameter PL_DISABLE_SYNC_HEADER_FRAMING_ERROR = "FALSE";
22560    parameter PL_DISABLE_UPCONFIG_CAPABLE = "FALSE";
22561    parameter PL_EQ_ADAPT_DISABLE_COEFF_CHECK = "FALSE";
22562    parameter PL_EQ_ADAPT_DISABLE_PRESET_CHECK = "FALSE";
22563    parameter [4:0] PL_EQ_ADAPT_ITER_COUNT = 5'h02;
22564    parameter [1:0] PL_EQ_ADAPT_REJECT_RETRY_COUNT = 2'h1;
22565    parameter PL_EQ_BYPASS_PHASE23 = "FALSE";
22566    parameter [2:0] PL_EQ_DEFAULT_GEN3_RX_PRESET_HINT = 3'h3;
22567    parameter [3:0] PL_EQ_DEFAULT_GEN3_TX_PRESET = 4'h4;
22568    parameter PL_EQ_PHASE01_RX_ADAPT = "FALSE";
22569    parameter PL_EQ_SHORT_ADAPT_PHASE = "FALSE";
22570    parameter [15:0] PL_LANE0_EQ_CONTROL = 16'h3F00;
22571    parameter [15:0] PL_LANE1_EQ_CONTROL = 16'h3F00;
22572    parameter [15:0] PL_LANE2_EQ_CONTROL = 16'h3F00;
22573    parameter [15:0] PL_LANE3_EQ_CONTROL = 16'h3F00;
22574    parameter [15:0] PL_LANE4_EQ_CONTROL = 16'h3F00;
22575    parameter [15:0] PL_LANE5_EQ_CONTROL = 16'h3F00;
22576    parameter [15:0] PL_LANE6_EQ_CONTROL = 16'h3F00;
22577    parameter [15:0] PL_LANE7_EQ_CONTROL = 16'h3F00;
22578    parameter [2:0] PL_LINK_CAP_MAX_LINK_SPEED = 3'h4;
22579    parameter [3:0] PL_LINK_CAP_MAX_LINK_WIDTH = 4'h8;
22580    parameter integer PL_N_FTS_COMCLK_GEN1 = 255;
22581    parameter integer PL_N_FTS_COMCLK_GEN2 = 255;
22582    parameter integer PL_N_FTS_COMCLK_GEN3 = 255;
22583    parameter integer PL_N_FTS_GEN1 = 255;
22584    parameter integer PL_N_FTS_GEN2 = 255;
22585    parameter integer PL_N_FTS_GEN3 = 255;
22586    parameter PL_REPORT_ALL_PHY_ERRORS = "TRUE";
22587    parameter PL_SIM_FAST_LINK_TRAINING = "FALSE";
22588    parameter PL_UPSTREAM_FACING = "TRUE";
22589    parameter [15:0] PM_ASPML0S_TIMEOUT = 16'h05DC;
22590    parameter [19:0] PM_ASPML1_ENTRY_DELAY = 20'h00000;
22591    parameter PM_ENABLE_L23_ENTRY = "FALSE";
22592    parameter PM_ENABLE_SLOT_POWER_CAPTURE = "TRUE";
22593    parameter [31:0] PM_L1_REENTRY_DELAY = 32'h00000000;
22594    parameter [19:0] PM_PME_SERVICE_TIMEOUT_DELAY = 20'h186A0;
22595    parameter [15:0] PM_PME_TURNOFF_ACK_DELAY = 16'h0064;
22596    parameter [31:0] SIM_JTAG_IDCODE = 32'h00000000;
22597    parameter SIM_VERSION = "1.0";
22598    parameter integer SPARE_BIT0 = 0;
22599    parameter integer SPARE_BIT1 = 0;
22600    parameter integer SPARE_BIT2 = 0;
22601    parameter integer SPARE_BIT3 = 0;
22602    parameter integer SPARE_BIT4 = 0;
22603    parameter integer SPARE_BIT5 = 0;
22604    parameter integer SPARE_BIT6 = 0;
22605    parameter integer SPARE_BIT7 = 0;
22606    parameter integer SPARE_BIT8 = 0;
22607    parameter [7:0] SPARE_BYTE0 = 8'h00;
22608    parameter [7:0] SPARE_BYTE1 = 8'h00;
22609    parameter [7:0] SPARE_BYTE2 = 8'h00;
22610    parameter [7:0] SPARE_BYTE3 = 8'h00;
22611    parameter [31:0] SPARE_WORD0 = 32'h00000000;
22612    parameter [31:0] SPARE_WORD1 = 32'h00000000;
22613    parameter [31:0] SPARE_WORD2 = 32'h00000000;
22614    parameter [31:0] SPARE_WORD3 = 32'h00000000;
22615    parameter SRIOV_CAP_ENABLE = "FALSE";
22616    parameter TL_COMPLETION_RAM_SIZE_16K = "TRUE";
22617    parameter [23:0] TL_COMPL_TIMEOUT_REG0 = 24'hBEBC20;
22618    parameter [27:0] TL_COMPL_TIMEOUT_REG1 = 28'h2FAF080;
22619    parameter [11:0] TL_CREDITS_CD = 12'h3E0;
22620    parameter [7:0] TL_CREDITS_CH = 8'h20;
22621    parameter [11:0] TL_CREDITS_NPD = 12'h028;
22622    parameter [7:0] TL_CREDITS_NPH = 8'h20;
22623    parameter [11:0] TL_CREDITS_PD = 12'h198;
22624    parameter [7:0] TL_CREDITS_PH = 8'h20;
22625    parameter TL_ENABLE_MESSAGE_RID_CHECK_ENABLE = "TRUE";
22626    parameter TL_EXTENDED_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
22627    parameter TL_LEGACY_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
22628    parameter TL_LEGACY_MODE_ENABLE = "FALSE";
22629    parameter [1:0] TL_PF_ENABLE_REG = 2'h0;
22630    parameter TL_TX_MUX_STRICT_PRIORITY = "TRUE";
22631    parameter TWO_LAYER_MODE_DLCMSM_ENABLE = "TRUE";
22632    parameter TWO_LAYER_MODE_ENABLE = "FALSE";
22633    parameter TWO_LAYER_MODE_WIDTH_256 = "TRUE";
22634    parameter [11:0] VF0_ARI_CAP_NEXTPTR = 12'h000;
22635    parameter [7:0] VF0_CAPABILITY_POINTER = 8'h50;
22636    parameter integer VF0_MSIX_CAP_PBA_BIR = 0;
22637    parameter [28:0] VF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22638    parameter integer VF0_MSIX_CAP_TABLE_BIR = 0;
22639    parameter [28:0] VF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22640    parameter [10:0] VF0_MSIX_CAP_TABLE_SIZE = 11'h000;
22641    parameter integer VF0_MSI_CAP_MULTIMSGCAP = 0;
22642    parameter [7:0] VF0_PM_CAP_ID = 8'h01;
22643    parameter [7:0] VF0_PM_CAP_NEXTPTR = 8'h00;
22644    parameter [2:0] VF0_PM_CAP_VER_ID = 3'h3;
22645    parameter VF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22646    parameter VF0_TPHR_CAP_ENABLE = "FALSE";
22647    parameter VF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
22648    parameter [11:0] VF0_TPHR_CAP_NEXTPTR = 12'h000;
22649    parameter [2:0] VF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
22650    parameter [1:0] VF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22651    parameter [10:0] VF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22652    parameter [3:0] VF0_TPHR_CAP_VER = 4'h1;
22653    parameter [11:0] VF1_ARI_CAP_NEXTPTR = 12'h000;
22654    parameter integer VF1_MSIX_CAP_PBA_BIR = 0;
22655    parameter [28:0] VF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22656    parameter integer VF1_MSIX_CAP_TABLE_BIR = 0;
22657    parameter [28:0] VF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22658    parameter [10:0] VF1_MSIX_CAP_TABLE_SIZE = 11'h000;
22659    parameter integer VF1_MSI_CAP_MULTIMSGCAP = 0;
22660    parameter [7:0] VF1_PM_CAP_ID = 8'h01;
22661    parameter [7:0] VF1_PM_CAP_NEXTPTR = 8'h00;
22662    parameter [2:0] VF1_PM_CAP_VER_ID = 3'h3;
22663    parameter VF1_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22664    parameter VF1_TPHR_CAP_ENABLE = "FALSE";
22665    parameter VF1_TPHR_CAP_INT_VEC_MODE = "TRUE";
22666    parameter [11:0] VF1_TPHR_CAP_NEXTPTR = 12'h000;
22667    parameter [2:0] VF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
22668    parameter [1:0] VF1_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22669    parameter [10:0] VF1_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22670    parameter [3:0] VF1_TPHR_CAP_VER = 4'h1;
22671    parameter [11:0] VF2_ARI_CAP_NEXTPTR = 12'h000;
22672    parameter integer VF2_MSIX_CAP_PBA_BIR = 0;
22673    parameter [28:0] VF2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22674    parameter integer VF2_MSIX_CAP_TABLE_BIR = 0;
22675    parameter [28:0] VF2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22676    parameter [10:0] VF2_MSIX_CAP_TABLE_SIZE = 11'h000;
22677    parameter integer VF2_MSI_CAP_MULTIMSGCAP = 0;
22678    parameter [7:0] VF2_PM_CAP_ID = 8'h01;
22679    parameter [7:0] VF2_PM_CAP_NEXTPTR = 8'h00;
22680    parameter [2:0] VF2_PM_CAP_VER_ID = 3'h3;
22681    parameter VF2_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22682    parameter VF2_TPHR_CAP_ENABLE = "FALSE";
22683    parameter VF2_TPHR_CAP_INT_VEC_MODE = "TRUE";
22684    parameter [11:0] VF2_TPHR_CAP_NEXTPTR = 12'h000;
22685    parameter [2:0] VF2_TPHR_CAP_ST_MODE_SEL = 3'h0;
22686    parameter [1:0] VF2_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22687    parameter [10:0] VF2_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22688    parameter [3:0] VF2_TPHR_CAP_VER = 4'h1;
22689    parameter [11:0] VF3_ARI_CAP_NEXTPTR = 12'h000;
22690    parameter integer VF3_MSIX_CAP_PBA_BIR = 0;
22691    parameter [28:0] VF3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22692    parameter integer VF3_MSIX_CAP_TABLE_BIR = 0;
22693    parameter [28:0] VF3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22694    parameter [10:0] VF3_MSIX_CAP_TABLE_SIZE = 11'h000;
22695    parameter integer VF3_MSI_CAP_MULTIMSGCAP = 0;
22696    parameter [7:0] VF3_PM_CAP_ID = 8'h01;
22697    parameter [7:0] VF3_PM_CAP_NEXTPTR = 8'h00;
22698    parameter [2:0] VF3_PM_CAP_VER_ID = 3'h3;
22699    parameter VF3_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22700    parameter VF3_TPHR_CAP_ENABLE = "FALSE";
22701    parameter VF3_TPHR_CAP_INT_VEC_MODE = "TRUE";
22702    parameter [11:0] VF3_TPHR_CAP_NEXTPTR = 12'h000;
22703    parameter [2:0] VF3_TPHR_CAP_ST_MODE_SEL = 3'h0;
22704    parameter [1:0] VF3_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22705    parameter [10:0] VF3_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22706    parameter [3:0] VF3_TPHR_CAP_VER = 4'h1;
22707    parameter [11:0] VF4_ARI_CAP_NEXTPTR = 12'h000;
22708    parameter integer VF4_MSIX_CAP_PBA_BIR = 0;
22709    parameter [28:0] VF4_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22710    parameter integer VF4_MSIX_CAP_TABLE_BIR = 0;
22711    parameter [28:0] VF4_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22712    parameter [10:0] VF4_MSIX_CAP_TABLE_SIZE = 11'h000;
22713    parameter integer VF4_MSI_CAP_MULTIMSGCAP = 0;
22714    parameter [7:0] VF4_PM_CAP_ID = 8'h01;
22715    parameter [7:0] VF4_PM_CAP_NEXTPTR = 8'h00;
22716    parameter [2:0] VF4_PM_CAP_VER_ID = 3'h3;
22717    parameter VF4_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22718    parameter VF4_TPHR_CAP_ENABLE = "FALSE";
22719    parameter VF4_TPHR_CAP_INT_VEC_MODE = "TRUE";
22720    parameter [11:0] VF4_TPHR_CAP_NEXTPTR = 12'h000;
22721    parameter [2:0] VF4_TPHR_CAP_ST_MODE_SEL = 3'h0;
22722    parameter [1:0] VF4_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22723    parameter [10:0] VF4_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22724    parameter [3:0] VF4_TPHR_CAP_VER = 4'h1;
22725    parameter [11:0] VF5_ARI_CAP_NEXTPTR = 12'h000;
22726    parameter integer VF5_MSIX_CAP_PBA_BIR = 0;
22727    parameter [28:0] VF5_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22728    parameter integer VF5_MSIX_CAP_TABLE_BIR = 0;
22729    parameter [28:0] VF5_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22730    parameter [10:0] VF5_MSIX_CAP_TABLE_SIZE = 11'h000;
22731    parameter integer VF5_MSI_CAP_MULTIMSGCAP = 0;
22732    parameter [7:0] VF5_PM_CAP_ID = 8'h01;
22733    parameter [7:0] VF5_PM_CAP_NEXTPTR = 8'h00;
22734    parameter [2:0] VF5_PM_CAP_VER_ID = 3'h3;
22735    parameter VF5_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22736    parameter VF5_TPHR_CAP_ENABLE = "FALSE";
22737    parameter VF5_TPHR_CAP_INT_VEC_MODE = "TRUE";
22738    parameter [11:0] VF5_TPHR_CAP_NEXTPTR = 12'h000;
22739    parameter [2:0] VF5_TPHR_CAP_ST_MODE_SEL = 3'h0;
22740    parameter [1:0] VF5_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22741    parameter [10:0] VF5_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22742    parameter [3:0] VF5_TPHR_CAP_VER = 4'h1;
22743    parameter [11:0] VF6_ARI_CAP_NEXTPTR = 12'h000;
22744    parameter integer VF6_MSIX_CAP_PBA_BIR = 0;
22745    parameter [28:0] VF6_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22746    parameter integer VF6_MSIX_CAP_TABLE_BIR = 0;
22747    parameter [28:0] VF6_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22748    parameter [10:0] VF6_MSIX_CAP_TABLE_SIZE = 11'h000;
22749    parameter integer VF6_MSI_CAP_MULTIMSGCAP = 0;
22750    parameter [7:0] VF6_PM_CAP_ID = 8'h01;
22751    parameter [7:0] VF6_PM_CAP_NEXTPTR = 8'h00;
22752    parameter [2:0] VF6_PM_CAP_VER_ID = 3'h3;
22753    parameter VF6_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22754    parameter VF6_TPHR_CAP_ENABLE = "FALSE";
22755    parameter VF6_TPHR_CAP_INT_VEC_MODE = "TRUE";
22756    parameter [11:0] VF6_TPHR_CAP_NEXTPTR = 12'h000;
22757    parameter [2:0] VF6_TPHR_CAP_ST_MODE_SEL = 3'h0;
22758    parameter [1:0] VF6_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22759    parameter [10:0] VF6_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22760    parameter [3:0] VF6_TPHR_CAP_VER = 4'h1;
22761    parameter [11:0] VF7_ARI_CAP_NEXTPTR = 12'h000;
22762    parameter integer VF7_MSIX_CAP_PBA_BIR = 0;
22763    parameter [28:0] VF7_MSIX_CAP_PBA_OFFSET = 29'h00000050;
22764    parameter integer VF7_MSIX_CAP_TABLE_BIR = 0;
22765    parameter [28:0] VF7_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
22766    parameter [10:0] VF7_MSIX_CAP_TABLE_SIZE = 11'h000;
22767    parameter integer VF7_MSI_CAP_MULTIMSGCAP = 0;
22768    parameter [7:0] VF7_PM_CAP_ID = 8'h01;
22769    parameter [7:0] VF7_PM_CAP_NEXTPTR = 8'h00;
22770    parameter [2:0] VF7_PM_CAP_VER_ID = 3'h3;
22771    parameter VF7_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
22772    parameter VF7_TPHR_CAP_ENABLE = "FALSE";
22773    parameter VF7_TPHR_CAP_INT_VEC_MODE = "TRUE";
22774    parameter [11:0] VF7_TPHR_CAP_NEXTPTR = 12'h000;
22775    parameter [2:0] VF7_TPHR_CAP_ST_MODE_SEL = 3'h0;
22776    parameter [1:0] VF7_TPHR_CAP_ST_TABLE_LOC = 2'h0;
22777    parameter [10:0] VF7_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
22778    parameter [3:0] VF7_TPHR_CAP_VER = 4'h1;
22779    output [2:0] CFGCURRENTSPEED;
22780    output [3:0] CFGDPASUBSTATECHANGE;
22781    output CFGERRCOROUT;
22782    output CFGERRFATALOUT;
22783    output CFGERRNONFATALOUT;
22784    output [7:0] CFGEXTFUNCTIONNUMBER;
22785    output CFGEXTREADRECEIVED;
22786    output [9:0] CFGEXTREGISTERNUMBER;
22787    output [3:0] CFGEXTWRITEBYTEENABLE;
22788    output [31:0] CFGEXTWRITEDATA;
22789    output CFGEXTWRITERECEIVED;
22790    output [11:0] CFGFCCPLD;
22791    output [7:0] CFGFCCPLH;
22792    output [11:0] CFGFCNPD;
22793    output [7:0] CFGFCNPH;
22794    output [11:0] CFGFCPD;
22795    output [7:0] CFGFCPH;
22796    output [3:0] CFGFLRINPROCESS;
22797    output [11:0] CFGFUNCTIONPOWERSTATE;
22798    output [15:0] CFGFUNCTIONSTATUS;
22799    output CFGHOTRESETOUT;
22800    output [31:0] CFGINTERRUPTMSIDATA;
22801    output [3:0] CFGINTERRUPTMSIENABLE;
22802    output CFGINTERRUPTMSIFAIL;
22803    output CFGINTERRUPTMSIMASKUPDATE;
22804    output [11:0] CFGINTERRUPTMSIMMENABLE;
22805    output CFGINTERRUPTMSISENT;
22806    output [7:0] CFGINTERRUPTMSIVFENABLE;
22807    output [3:0] CFGINTERRUPTMSIXENABLE;
22808    output CFGINTERRUPTMSIXFAIL;
22809    output [3:0] CFGINTERRUPTMSIXMASK;
22810    output CFGINTERRUPTMSIXSENT;
22811    output [7:0] CFGINTERRUPTMSIXVFENABLE;
22812    output [7:0] CFGINTERRUPTMSIXVFMASK;
22813    output CFGINTERRUPTSENT;
22814    output [1:0] CFGLINKPOWERSTATE;
22815    output CFGLOCALERROR;
22816    output CFGLTRENABLE;
22817    output [5:0] CFGLTSSMSTATE;
22818    output [2:0] CFGMAXPAYLOAD;
22819    output [2:0] CFGMAXREADREQ;
22820    output [31:0] CFGMGMTREADDATA;
22821    output CFGMGMTREADWRITEDONE;
22822    output CFGMSGRECEIVED;
22823    output [7:0] CFGMSGRECEIVEDDATA;
22824    output [4:0] CFGMSGRECEIVEDTYPE;
22825    output CFGMSGTRANSMITDONE;
22826    output [3:0] CFGNEGOTIATEDWIDTH;
22827    output [1:0] CFGOBFFENABLE;
22828    output [15:0] CFGPERFUNCSTATUSDATA;
22829    output CFGPERFUNCTIONUPDATEDONE;
22830    output CFGPHYLINKDOWN;
22831    output [1:0] CFGPHYLINKSTATUS;
22832    output CFGPLSTATUSCHANGE;
22833    output CFGPOWERSTATECHANGEINTERRUPT;
22834    output [3:0] CFGRCBSTATUS;
22835    output [3:0] CFGTPHFUNCTIONNUM;
22836    output [3:0] CFGTPHREQUESTERENABLE;
22837    output [11:0] CFGTPHSTMODE;
22838    output [4:0] CFGTPHSTTADDRESS;
22839    output CFGTPHSTTREADENABLE;
22840    output [3:0] CFGTPHSTTWRITEBYTEVALID;
22841    output [31:0] CFGTPHSTTWRITEDATA;
22842    output CFGTPHSTTWRITEENABLE;
22843    output [7:0] CFGVFFLRINPROCESS;
22844    output [23:0] CFGVFPOWERSTATE;
22845    output [15:0] CFGVFSTATUS;
22846    output [7:0] CFGVFTPHREQUESTERENABLE;
22847    output [23:0] CFGVFTPHSTMODE;
22848    output CONFMCAPDESIGNSWITCH;
22849    output CONFMCAPEOS;
22850    output CONFMCAPINUSEBYPCIE;
22851    output CONFREQREADY;
22852    output [31:0] CONFRESPRDATA;
22853    output CONFRESPVALID;
22854    output [15:0] DBGDATAOUT;
22855    output DBGMCAPCSB;
22856    output [31:0] DBGMCAPDATA;
22857    output DBGMCAPEOS;
22858    output DBGMCAPERROR;
22859    output DBGMCAPMODE;
22860    output DBGMCAPRDATAVALID;
22861    output DBGMCAPRDWRB;
22862    output DBGMCAPRESET;
22863    output DBGPLDATABLOCKRECEIVEDAFTEREDS;
22864    output DBGPLGEN3FRAMINGERRORDETECTED;
22865    output DBGPLGEN3SYNCHEADERERRORDETECTED;
22866    output [7:0] DBGPLINFERREDRXELECTRICALIDLE;
22867    output [15:0] DRPDO;
22868    output DRPRDY;
22869    output LL2LMMASTERTLPSENT0;
22870    output LL2LMMASTERTLPSENT1;
22871    output [3:0] LL2LMMASTERTLPSENTTLPID0;
22872    output [3:0] LL2LMMASTERTLPSENTTLPID1;
22873    output [255:0] LL2LMMAXISRXTDATA;
22874    output [17:0] LL2LMMAXISRXTUSER;
22875    output [7:0] LL2LMMAXISRXTVALID;
22876    output [7:0] LL2LMSAXISTXTREADY;
22877    output [255:0] MAXISCQTDATA;
22878    output [7:0] MAXISCQTKEEP;
22879    output MAXISCQTLAST;
22880    output [84:0] MAXISCQTUSER;
22881    output MAXISCQTVALID;
22882    output [255:0] MAXISRCTDATA;
22883    output [7:0] MAXISRCTKEEP;
22884    output MAXISRCTLAST;
22885    output [74:0] MAXISRCTUSER;
22886    output MAXISRCTVALID;
22887    output [9:0] MICOMPLETIONRAMREADADDRESSAL;
22888    output [9:0] MICOMPLETIONRAMREADADDRESSAU;
22889    output [9:0] MICOMPLETIONRAMREADADDRESSBL;
22890    output [9:0] MICOMPLETIONRAMREADADDRESSBU;
22891    output [3:0] MICOMPLETIONRAMREADENABLEL;
22892    output [3:0] MICOMPLETIONRAMREADENABLEU;
22893    output [9:0] MICOMPLETIONRAMWRITEADDRESSAL;
22894    output [9:0] MICOMPLETIONRAMWRITEADDRESSAU;
22895    output [9:0] MICOMPLETIONRAMWRITEADDRESSBL;
22896    output [9:0] MICOMPLETIONRAMWRITEADDRESSBU;
22897    output [71:0] MICOMPLETIONRAMWRITEDATAL;
22898    output [71:0] MICOMPLETIONRAMWRITEDATAU;
22899    output [3:0] MICOMPLETIONRAMWRITEENABLEL;
22900    output [3:0] MICOMPLETIONRAMWRITEENABLEU;
22901    output [8:0] MIREPLAYRAMADDRESS;
22902    output [1:0] MIREPLAYRAMREADENABLE;
22903    output [143:0] MIREPLAYRAMWRITEDATA;
22904    output [1:0] MIREPLAYRAMWRITEENABLE;
22905    output [8:0] MIREQUESTRAMREADADDRESSA;
22906    output [8:0] MIREQUESTRAMREADADDRESSB;
22907    output [3:0] MIREQUESTRAMREADENABLE;
22908    output [8:0] MIREQUESTRAMWRITEADDRESSA;
22909    output [8:0] MIREQUESTRAMWRITEADDRESSB;
22910    output [143:0] MIREQUESTRAMWRITEDATA;
22911    output [3:0] MIREQUESTRAMWRITEENABLE;
22912    output [5:0] PCIECQNPREQCOUNT;
22913    output PCIEPERST0B;
22914    output PCIEPERST1B;
22915    output [3:0] PCIERQSEQNUM;
22916    output PCIERQSEQNUMVLD;
22917    output [5:0] PCIERQTAG;
22918    output [1:0] PCIERQTAGAV;
22919    output PCIERQTAGVLD;
22920    output [1:0] PCIETFCNPDAV;
22921    output [1:0] PCIETFCNPHAV;
22922    output [1:0] PIPERX0EQCONTROL;
22923    output [5:0] PIPERX0EQLPLFFS;
22924    output [3:0] PIPERX0EQLPTXPRESET;
22925    output [2:0] PIPERX0EQPRESET;
22926    output PIPERX0POLARITY;
22927    output [1:0] PIPERX1EQCONTROL;
22928    output [5:0] PIPERX1EQLPLFFS;
22929    output [3:0] PIPERX1EQLPTXPRESET;
22930    output [2:0] PIPERX1EQPRESET;
22931    output PIPERX1POLARITY;
22932    output [1:0] PIPERX2EQCONTROL;
22933    output [5:0] PIPERX2EQLPLFFS;
22934    output [3:0] PIPERX2EQLPTXPRESET;
22935    output [2:0] PIPERX2EQPRESET;
22936    output PIPERX2POLARITY;
22937    output [1:0] PIPERX3EQCONTROL;
22938    output [5:0] PIPERX3EQLPLFFS;
22939    output [3:0] PIPERX3EQLPTXPRESET;
22940    output [2:0] PIPERX3EQPRESET;
22941    output PIPERX3POLARITY;
22942    output [1:0] PIPERX4EQCONTROL;
22943    output [5:0] PIPERX4EQLPLFFS;
22944    output [3:0] PIPERX4EQLPTXPRESET;
22945    output [2:0] PIPERX4EQPRESET;
22946    output PIPERX4POLARITY;
22947    output [1:0] PIPERX5EQCONTROL;
22948    output [5:0] PIPERX5EQLPLFFS;
22949    output [3:0] PIPERX5EQLPTXPRESET;
22950    output [2:0] PIPERX5EQPRESET;
22951    output PIPERX5POLARITY;
22952    output [1:0] PIPERX6EQCONTROL;
22953    output [5:0] PIPERX6EQLPLFFS;
22954    output [3:0] PIPERX6EQLPTXPRESET;
22955    output [2:0] PIPERX6EQPRESET;
22956    output PIPERX6POLARITY;
22957    output [1:0] PIPERX7EQCONTROL;
22958    output [5:0] PIPERX7EQLPLFFS;
22959    output [3:0] PIPERX7EQLPTXPRESET;
22960    output [2:0] PIPERX7EQPRESET;
22961    output PIPERX7POLARITY;
22962    output [1:0] PIPETX0CHARISK;
22963    output PIPETX0COMPLIANCE;
22964    output [31:0] PIPETX0DATA;
22965    output PIPETX0DATAVALID;
22966    output PIPETX0DEEMPH;
22967    output PIPETX0ELECIDLE;
22968    output [1:0] PIPETX0EQCONTROL;
22969    output [5:0] PIPETX0EQDEEMPH;
22970    output [3:0] PIPETX0EQPRESET;
22971    output [2:0] PIPETX0MARGIN;
22972    output [1:0] PIPETX0POWERDOWN;
22973    output [1:0] PIPETX0RATE;
22974    output PIPETX0RCVRDET;
22975    output PIPETX0RESET;
22976    output PIPETX0STARTBLOCK;
22977    output PIPETX0SWING;
22978    output [1:0] PIPETX0SYNCHEADER;
22979    output [1:0] PIPETX1CHARISK;
22980    output PIPETX1COMPLIANCE;
22981    output [31:0] PIPETX1DATA;
22982    output PIPETX1DATAVALID;
22983    output PIPETX1DEEMPH;
22984    output PIPETX1ELECIDLE;
22985    output [1:0] PIPETX1EQCONTROL;
22986    output [5:0] PIPETX1EQDEEMPH;
22987    output [3:0] PIPETX1EQPRESET;
22988    output [2:0] PIPETX1MARGIN;
22989    output [1:0] PIPETX1POWERDOWN;
22990    output [1:0] PIPETX1RATE;
22991    output PIPETX1RCVRDET;
22992    output PIPETX1RESET;
22993    output PIPETX1STARTBLOCK;
22994    output PIPETX1SWING;
22995    output [1:0] PIPETX1SYNCHEADER;
22996    output [1:0] PIPETX2CHARISK;
22997    output PIPETX2COMPLIANCE;
22998    output [31:0] PIPETX2DATA;
22999    output PIPETX2DATAVALID;
23000    output PIPETX2DEEMPH;
23001    output PIPETX2ELECIDLE;
23002    output [1:0] PIPETX2EQCONTROL;
23003    output [5:0] PIPETX2EQDEEMPH;
23004    output [3:0] PIPETX2EQPRESET;
23005    output [2:0] PIPETX2MARGIN;
23006    output [1:0] PIPETX2POWERDOWN;
23007    output [1:0] PIPETX2RATE;
23008    output PIPETX2RCVRDET;
23009    output PIPETX2RESET;
23010    output PIPETX2STARTBLOCK;
23011    output PIPETX2SWING;
23012    output [1:0] PIPETX2SYNCHEADER;
23013    output [1:0] PIPETX3CHARISK;
23014    output PIPETX3COMPLIANCE;
23015    output [31:0] PIPETX3DATA;
23016    output PIPETX3DATAVALID;
23017    output PIPETX3DEEMPH;
23018    output PIPETX3ELECIDLE;
23019    output [1:0] PIPETX3EQCONTROL;
23020    output [5:0] PIPETX3EQDEEMPH;
23021    output [3:0] PIPETX3EQPRESET;
23022    output [2:0] PIPETX3MARGIN;
23023    output [1:0] PIPETX3POWERDOWN;
23024    output [1:0] PIPETX3RATE;
23025    output PIPETX3RCVRDET;
23026    output PIPETX3RESET;
23027    output PIPETX3STARTBLOCK;
23028    output PIPETX3SWING;
23029    output [1:0] PIPETX3SYNCHEADER;
23030    output [1:0] PIPETX4CHARISK;
23031    output PIPETX4COMPLIANCE;
23032    output [31:0] PIPETX4DATA;
23033    output PIPETX4DATAVALID;
23034    output PIPETX4DEEMPH;
23035    output PIPETX4ELECIDLE;
23036    output [1:0] PIPETX4EQCONTROL;
23037    output [5:0] PIPETX4EQDEEMPH;
23038    output [3:0] PIPETX4EQPRESET;
23039    output [2:0] PIPETX4MARGIN;
23040    output [1:0] PIPETX4POWERDOWN;
23041    output [1:0] PIPETX4RATE;
23042    output PIPETX4RCVRDET;
23043    output PIPETX4RESET;
23044    output PIPETX4STARTBLOCK;
23045    output PIPETX4SWING;
23046    output [1:0] PIPETX4SYNCHEADER;
23047    output [1:0] PIPETX5CHARISK;
23048    output PIPETX5COMPLIANCE;
23049    output [31:0] PIPETX5DATA;
23050    output PIPETX5DATAVALID;
23051    output PIPETX5DEEMPH;
23052    output PIPETX5ELECIDLE;
23053    output [1:0] PIPETX5EQCONTROL;
23054    output [5:0] PIPETX5EQDEEMPH;
23055    output [3:0] PIPETX5EQPRESET;
23056    output [2:0] PIPETX5MARGIN;
23057    output [1:0] PIPETX5POWERDOWN;
23058    output [1:0] PIPETX5RATE;
23059    output PIPETX5RCVRDET;
23060    output PIPETX5RESET;
23061    output PIPETX5STARTBLOCK;
23062    output PIPETX5SWING;
23063    output [1:0] PIPETX5SYNCHEADER;
23064    output [1:0] PIPETX6CHARISK;
23065    output PIPETX6COMPLIANCE;
23066    output [31:0] PIPETX6DATA;
23067    output PIPETX6DATAVALID;
23068    output PIPETX6DEEMPH;
23069    output PIPETX6ELECIDLE;
23070    output [1:0] PIPETX6EQCONTROL;
23071    output [5:0] PIPETX6EQDEEMPH;
23072    output [3:0] PIPETX6EQPRESET;
23073    output [2:0] PIPETX6MARGIN;
23074    output [1:0] PIPETX6POWERDOWN;
23075    output [1:0] PIPETX6RATE;
23076    output PIPETX6RCVRDET;
23077    output PIPETX6RESET;
23078    output PIPETX6STARTBLOCK;
23079    output PIPETX6SWING;
23080    output [1:0] PIPETX6SYNCHEADER;
23081    output [1:0] PIPETX7CHARISK;
23082    output PIPETX7COMPLIANCE;
23083    output [31:0] PIPETX7DATA;
23084    output PIPETX7DATAVALID;
23085    output PIPETX7DEEMPH;
23086    output PIPETX7ELECIDLE;
23087    output [1:0] PIPETX7EQCONTROL;
23088    output [5:0] PIPETX7EQDEEMPH;
23089    output [3:0] PIPETX7EQPRESET;
23090    output [2:0] PIPETX7MARGIN;
23091    output [1:0] PIPETX7POWERDOWN;
23092    output [1:0] PIPETX7RATE;
23093    output PIPETX7RCVRDET;
23094    output PIPETX7RESET;
23095    output PIPETX7STARTBLOCK;
23096    output PIPETX7SWING;
23097    output [1:0] PIPETX7SYNCHEADER;
23098    output PLEQINPROGRESS;
23099    output [1:0] PLEQPHASE;
23100    output [3:0] SAXISCCTREADY;
23101    output [3:0] SAXISRQTREADY;
23102    output [31:0] SPAREOUT;
23103    input CFGCONFIGSPACEENABLE;
23104    input [15:0] CFGDEVID;
23105    input [7:0] CFGDSBUSNUMBER;
23106    input [4:0] CFGDSDEVICENUMBER;
23107    input [2:0] CFGDSFUNCTIONNUMBER;
23108    input [63:0] CFGDSN;
23109    input [7:0] CFGDSPORTNUMBER;
23110    input CFGERRCORIN;
23111    input CFGERRUNCORIN;
23112    input [31:0] CFGEXTREADDATA;
23113    input CFGEXTREADDATAVALID;
23114    input [2:0] CFGFCSEL;
23115    input [3:0] CFGFLRDONE;
23116    input CFGHOTRESETIN;
23117    input [3:0] CFGINTERRUPTINT;
23118    input [2:0] CFGINTERRUPTMSIATTR;
23119    input [3:0] CFGINTERRUPTMSIFUNCTIONNUMBER;
23120    input [31:0] CFGINTERRUPTMSIINT;
23121    input [31:0] CFGINTERRUPTMSIPENDINGSTATUS;
23122    input CFGINTERRUPTMSIPENDINGSTATUSDATAENABLE;
23123    input [3:0] CFGINTERRUPTMSIPENDINGSTATUSFUNCTIONNUM;
23124    input [3:0] CFGINTERRUPTMSISELECT;
23125    input CFGINTERRUPTMSITPHPRESENT;
23126    input [8:0] CFGINTERRUPTMSITPHSTTAG;
23127    input [1:0] CFGINTERRUPTMSITPHTYPE;
23128    input [63:0] CFGINTERRUPTMSIXADDRESS;
23129    input [31:0] CFGINTERRUPTMSIXDATA;
23130    input CFGINTERRUPTMSIXINT;
23131    input [3:0] CFGINTERRUPTPENDING;
23132    input CFGLINKTRAININGENABLE;
23133    input [18:0] CFGMGMTADDR;
23134    input [3:0] CFGMGMTBYTEENABLE;
23135    input CFGMGMTREAD;
23136    input CFGMGMTTYPE1CFGREGACCESS;
23137    input CFGMGMTWRITE;
23138    input [31:0] CFGMGMTWRITEDATA;
23139    input CFGMSGTRANSMIT;
23140    input [31:0] CFGMSGTRANSMITDATA;
23141    input [2:0] CFGMSGTRANSMITTYPE;
23142    input [2:0] CFGPERFUNCSTATUSCONTROL;
23143    input [3:0] CFGPERFUNCTIONNUMBER;
23144    input CFGPERFUNCTIONOUTPUTREQUEST;
23145    input CFGPOWERSTATECHANGEACK;
23146    input CFGREQPMTRANSITIONL23READY;
23147    input [7:0] CFGREVID;
23148    input [15:0] CFGSUBSYSID;
23149    input [15:0] CFGSUBSYSVENDID;
23150    input [31:0] CFGTPHSTTREADDATA;
23151    input CFGTPHSTTREADDATAVALID;
23152    input [15:0] CFGVENDID;
23153    input [7:0] CFGVFFLRDONE;
23154    input CONFMCAPREQUESTBYCONF;
23155    input [31:0] CONFREQDATA;
23156    input [3:0] CONFREQREGNUM;
23157    input [1:0] CONFREQTYPE;
23158    input CONFREQVALID;
23159    input CORECLK;
23160    input CORECLKMICOMPLETIONRAML;
23161    input CORECLKMICOMPLETIONRAMU;
23162    input CORECLKMIREPLAYRAM;
23163    input CORECLKMIREQUESTRAM;
23164    input DBGCFGLOCALMGMTREGOVERRIDE;
23165    input [3:0] DBGDATASEL;
23166    input [9:0] DRPADDR;
23167    input DRPCLK;
23168    input [15:0] DRPDI;
23169    input DRPEN;
23170    input DRPWE;
23171    input [13:0] LL2LMSAXISTXTUSER;
23172    input LL2LMSAXISTXTVALID;
23173    input [3:0] LL2LMTXTLPID0;
23174    input [3:0] LL2LMTXTLPID1;
23175    input [21:0] MAXISCQTREADY;
23176    input [21:0] MAXISRCTREADY;
23177    input MCAPCLK;
23178    input MCAPPERST0B;
23179    input MCAPPERST1B;
23180    input MGMTRESETN;
23181    input MGMTSTICKYRESETN;
23182    input [143:0] MICOMPLETIONRAMREADDATA;
23183    input [143:0] MIREPLAYRAMREADDATA;
23184    input [143:0] MIREQUESTRAMREADDATA;
23185    input PCIECQNPREQ;
23186    input PIPECLK;
23187    input [5:0] PIPEEQFS;
23188    input [5:0] PIPEEQLF;
23189    input PIPERESETN;
23190    input [1:0] PIPERX0CHARISK;
23191    input [31:0] PIPERX0DATA;
23192    input PIPERX0DATAVALID;
23193    input PIPERX0ELECIDLE;
23194    input PIPERX0EQDONE;
23195    input PIPERX0EQLPADAPTDONE;
23196    input PIPERX0EQLPLFFSSEL;
23197    input [17:0] PIPERX0EQLPNEWTXCOEFFORPRESET;
23198    input PIPERX0PHYSTATUS;
23199    input PIPERX0STARTBLOCK;
23200    input [2:0] PIPERX0STATUS;
23201    input [1:0] PIPERX0SYNCHEADER;
23202    input PIPERX0VALID;
23203    input [1:0] PIPERX1CHARISK;
23204    input [31:0] PIPERX1DATA;
23205    input PIPERX1DATAVALID;
23206    input PIPERX1ELECIDLE;
23207    input PIPERX1EQDONE;
23208    input PIPERX1EQLPADAPTDONE;
23209    input PIPERX1EQLPLFFSSEL;
23210    input [17:0] PIPERX1EQLPNEWTXCOEFFORPRESET;
23211    input PIPERX1PHYSTATUS;
23212    input PIPERX1STARTBLOCK;
23213    input [2:0] PIPERX1STATUS;
23214    input [1:0] PIPERX1SYNCHEADER;
23215    input PIPERX1VALID;
23216    input [1:0] PIPERX2CHARISK;
23217    input [31:0] PIPERX2DATA;
23218    input PIPERX2DATAVALID;
23219    input PIPERX2ELECIDLE;
23220    input PIPERX2EQDONE;
23221    input PIPERX2EQLPADAPTDONE;
23222    input PIPERX2EQLPLFFSSEL;
23223    input [17:0] PIPERX2EQLPNEWTXCOEFFORPRESET;
23224    input PIPERX2PHYSTATUS;
23225    input PIPERX2STARTBLOCK;
23226    input [2:0] PIPERX2STATUS;
23227    input [1:0] PIPERX2SYNCHEADER;
23228    input PIPERX2VALID;
23229    input [1:0] PIPERX3CHARISK;
23230    input [31:0] PIPERX3DATA;
23231    input PIPERX3DATAVALID;
23232    input PIPERX3ELECIDLE;
23233    input PIPERX3EQDONE;
23234    input PIPERX3EQLPADAPTDONE;
23235    input PIPERX3EQLPLFFSSEL;
23236    input [17:0] PIPERX3EQLPNEWTXCOEFFORPRESET;
23237    input PIPERX3PHYSTATUS;
23238    input PIPERX3STARTBLOCK;
23239    input [2:0] PIPERX3STATUS;
23240    input [1:0] PIPERX3SYNCHEADER;
23241    input PIPERX3VALID;
23242    input [1:0] PIPERX4CHARISK;
23243    input [31:0] PIPERX4DATA;
23244    input PIPERX4DATAVALID;
23245    input PIPERX4ELECIDLE;
23246    input PIPERX4EQDONE;
23247    input PIPERX4EQLPADAPTDONE;
23248    input PIPERX4EQLPLFFSSEL;
23249    input [17:0] PIPERX4EQLPNEWTXCOEFFORPRESET;
23250    input PIPERX4PHYSTATUS;
23251    input PIPERX4STARTBLOCK;
23252    input [2:0] PIPERX4STATUS;
23253    input [1:0] PIPERX4SYNCHEADER;
23254    input PIPERX4VALID;
23255    input [1:0] PIPERX5CHARISK;
23256    input [31:0] PIPERX5DATA;
23257    input PIPERX5DATAVALID;
23258    input PIPERX5ELECIDLE;
23259    input PIPERX5EQDONE;
23260    input PIPERX5EQLPADAPTDONE;
23261    input PIPERX5EQLPLFFSSEL;
23262    input [17:0] PIPERX5EQLPNEWTXCOEFFORPRESET;
23263    input PIPERX5PHYSTATUS;
23264    input PIPERX5STARTBLOCK;
23265    input [2:0] PIPERX5STATUS;
23266    input [1:0] PIPERX5SYNCHEADER;
23267    input PIPERX5VALID;
23268    input [1:0] PIPERX6CHARISK;
23269    input [31:0] PIPERX6DATA;
23270    input PIPERX6DATAVALID;
23271    input PIPERX6ELECIDLE;
23272    input PIPERX6EQDONE;
23273    input PIPERX6EQLPADAPTDONE;
23274    input PIPERX6EQLPLFFSSEL;
23275    input [17:0] PIPERX6EQLPNEWTXCOEFFORPRESET;
23276    input PIPERX6PHYSTATUS;
23277    input PIPERX6STARTBLOCK;
23278    input [2:0] PIPERX6STATUS;
23279    input [1:0] PIPERX6SYNCHEADER;
23280    input PIPERX6VALID;
23281    input [1:0] PIPERX7CHARISK;
23282    input [31:0] PIPERX7DATA;
23283    input PIPERX7DATAVALID;
23284    input PIPERX7ELECIDLE;
23285    input PIPERX7EQDONE;
23286    input PIPERX7EQLPADAPTDONE;
23287    input PIPERX7EQLPLFFSSEL;
23288    input [17:0] PIPERX7EQLPNEWTXCOEFFORPRESET;
23289    input PIPERX7PHYSTATUS;
23290    input PIPERX7STARTBLOCK;
23291    input [2:0] PIPERX7STATUS;
23292    input [1:0] PIPERX7SYNCHEADER;
23293    input PIPERX7VALID;
23294    input [17:0] PIPETX0EQCOEFF;
23295    input PIPETX0EQDONE;
23296    input [17:0] PIPETX1EQCOEFF;
23297    input PIPETX1EQDONE;
23298    input [17:0] PIPETX2EQCOEFF;
23299    input PIPETX2EQDONE;
23300    input [17:0] PIPETX3EQCOEFF;
23301    input PIPETX3EQDONE;
23302    input [17:0] PIPETX4EQCOEFF;
23303    input PIPETX4EQDONE;
23304    input [17:0] PIPETX5EQCOEFF;
23305    input PIPETX5EQDONE;
23306    input [17:0] PIPETX6EQCOEFF;
23307    input PIPETX6EQDONE;
23308    input [17:0] PIPETX7EQCOEFF;
23309    input PIPETX7EQDONE;
23310    input PLEQRESETEIEOSCOUNT;
23311    input PLGEN2UPSTREAMPREFERDEEMPH;
23312    input RESETN;
23313    input [255:0] SAXISCCTDATA;
23314    input [7:0] SAXISCCTKEEP;
23315    input SAXISCCTLAST;
23316    input [32:0] SAXISCCTUSER;
23317    input SAXISCCTVALID;
23318    input [255:0] SAXISRQTDATA;
23319    input [7:0] SAXISRQTKEEP;
23320    input SAXISRQTLAST;
23321    input [59:0] SAXISRQTUSER;
23322    input SAXISRQTVALID;
23323    input [31:0] SPAREIN;
23324    input USERCLK;
23325endmodule
23326
23327module PCIE40E4 (...);
23328    parameter ARI_CAP_ENABLE = "FALSE";
23329    parameter AUTO_FLR_RESPONSE = "FALSE";
23330    parameter [1:0] AXISTEN_IF_CC_ALIGNMENT_MODE = 2'h0;
23331    parameter [23:0] AXISTEN_IF_COMPL_TIMEOUT_REG0 = 24'hBEBC20;
23332    parameter [27:0] AXISTEN_IF_COMPL_TIMEOUT_REG1 = 28'h2FAF080;
23333    parameter [1:0] AXISTEN_IF_CQ_ALIGNMENT_MODE = 2'h0;
23334    parameter AXISTEN_IF_CQ_EN_POISONED_MEM_WR = "FALSE";
23335    parameter AXISTEN_IF_ENABLE_256_TAGS = "FALSE";
23336    parameter AXISTEN_IF_ENABLE_CLIENT_TAG = "FALSE";
23337    parameter AXISTEN_IF_ENABLE_INTERNAL_MSIX_TABLE = "FALSE";
23338    parameter AXISTEN_IF_ENABLE_MESSAGE_RID_CHECK = "TRUE";
23339    parameter [17:0] AXISTEN_IF_ENABLE_MSG_ROUTE = 18'h00000;
23340    parameter AXISTEN_IF_ENABLE_RX_MSG_INTFC = "FALSE";
23341    parameter AXISTEN_IF_EXT_512 = "FALSE";
23342    parameter AXISTEN_IF_EXT_512_CC_STRADDLE = "FALSE";
23343    parameter AXISTEN_IF_EXT_512_CQ_STRADDLE = "FALSE";
23344    parameter AXISTEN_IF_EXT_512_RC_STRADDLE = "FALSE";
23345    parameter AXISTEN_IF_EXT_512_RQ_STRADDLE = "FALSE";
23346    parameter AXISTEN_IF_LEGACY_MODE_ENABLE = "FALSE";
23347    parameter AXISTEN_IF_MSIX_FROM_RAM_PIPELINE = "FALSE";
23348    parameter AXISTEN_IF_MSIX_RX_PARITY_EN = "TRUE";
23349    parameter AXISTEN_IF_MSIX_TO_RAM_PIPELINE = "FALSE";
23350    parameter [1:0] AXISTEN_IF_RC_ALIGNMENT_MODE = 2'h0;
23351    parameter AXISTEN_IF_RC_STRADDLE = "FALSE";
23352    parameter [1:0] AXISTEN_IF_RQ_ALIGNMENT_MODE = 2'h0;
23353    parameter AXISTEN_IF_RX_PARITY_EN = "TRUE";
23354    parameter AXISTEN_IF_SIM_SHORT_CPL_TIMEOUT = "FALSE";
23355    parameter AXISTEN_IF_TX_PARITY_EN = "TRUE";
23356    parameter [1:0] AXISTEN_IF_WIDTH = 2'h2;
23357    parameter CFG_BYPASS_MODE_ENABLE = "FALSE";
23358    parameter CRM_CORE_CLK_FREQ_500 = "TRUE";
23359    parameter [1:0] CRM_USER_CLK_FREQ = 2'h2;
23360    parameter [15:0] DEBUG_AXI4ST_SPARE = 16'h0000;
23361    parameter [7:0] DEBUG_AXIST_DISABLE_FEATURE_BIT = 8'h00;
23362    parameter [3:0] DEBUG_CAR_SPARE = 4'h0;
23363    parameter [15:0] DEBUG_CFG_SPARE = 16'h0000;
23364    parameter [15:0] DEBUG_LL_SPARE = 16'h0000;
23365    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_DEFRAMER_ERROR = "FALSE";
23366    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_SKP_ERROR = "FALSE";
23367    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_SKP_PARITY_ERROR = "FALSE";
23368    parameter DEBUG_PL_DISABLE_REC_ENTRY_ON_DYNAMIC_DSKEW_FAIL = "FALSE";
23369    parameter DEBUG_PL_DISABLE_REC_ENTRY_ON_RX_BUFFER_UNDER_OVER_FLOW = "FALSE";
23370    parameter DEBUG_PL_DISABLE_SCRAMBLING = "FALSE";
23371    parameter DEBUG_PL_SIM_RESET_LFSR = "FALSE";
23372    parameter [15:0] DEBUG_PL_SPARE = 16'h0000;
23373    parameter DEBUG_TL_DISABLE_FC_TIMEOUT = "FALSE";
23374    parameter DEBUG_TL_DISABLE_RX_TLP_ORDER_CHECKS = "FALSE";
23375    parameter [15:0] DEBUG_TL_SPARE = 16'h0000;
23376    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
23377    parameter DSN_CAP_ENABLE = "FALSE";
23378    parameter EXTENDED_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
23379    parameter HEADER_TYPE_OVERRIDE = "FALSE";
23380    parameter IS_SWITCH_PORT = "FALSE";
23381    parameter LEGACY_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
23382    parameter [8:0] LL_ACK_TIMEOUT = 9'h000;
23383    parameter LL_ACK_TIMEOUT_EN = "FALSE";
23384    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
23385    parameter LL_DISABLE_SCHED_TX_NAK = "FALSE";
23386    parameter LL_REPLAY_FROM_RAM_PIPELINE = "FALSE";
23387    parameter [8:0] LL_REPLAY_TIMEOUT = 9'h000;
23388    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
23389    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
23390    parameter LL_REPLAY_TO_RAM_PIPELINE = "FALSE";
23391    parameter LL_RX_TLP_PARITY_GEN = "TRUE";
23392    parameter LL_TX_TLP_PARITY_CHK = "TRUE";
23393    parameter [15:0] LL_USER_SPARE = 16'h0000;
23394    parameter [9:0] LTR_TX_MESSAGE_MINIMUM_INTERVAL = 10'h250;
23395    parameter LTR_TX_MESSAGE_ON_FUNC_POWER_STATE_CHANGE = "FALSE";
23396    parameter LTR_TX_MESSAGE_ON_LTR_ENABLE = "FALSE";
23397    parameter [11:0] MCAP_CAP_NEXTPTR = 12'h000;
23398    parameter MCAP_CONFIGURE_OVERRIDE = "FALSE";
23399    parameter MCAP_ENABLE = "FALSE";
23400    parameter MCAP_EOS_DESIGN_SWITCH = "FALSE";
23401    parameter [31:0] MCAP_FPGA_BITSTREAM_VERSION = 32'h00000000;
23402    parameter MCAP_GATE_IO_ENABLE_DESIGN_SWITCH = "FALSE";
23403    parameter MCAP_GATE_MEM_ENABLE_DESIGN_SWITCH = "FALSE";
23404    parameter MCAP_INPUT_GATE_DESIGN_SWITCH = "FALSE";
23405    parameter MCAP_INTERRUPT_ON_MCAP_EOS = "FALSE";
23406    parameter MCAP_INTERRUPT_ON_MCAP_ERROR = "FALSE";
23407    parameter [15:0] MCAP_VSEC_ID = 16'h0000;
23408    parameter [11:0] MCAP_VSEC_LEN = 12'h02C;
23409    parameter [3:0] MCAP_VSEC_REV = 4'h0;
23410    parameter PF0_AER_CAP_ECRC_GEN_AND_CHECK_CAPABLE = "FALSE";
23411    parameter [11:0] PF0_AER_CAP_NEXTPTR = 12'h000;
23412    parameter [11:0] PF0_ARI_CAP_NEXTPTR = 12'h000;
23413    parameter [7:0] PF0_ARI_CAP_NEXT_FUNC = 8'h00;
23414    parameter [3:0] PF0_ARI_CAP_VER = 4'h1;
23415    parameter [5:0] PF0_BAR0_APERTURE_SIZE = 6'h03;
23416    parameter [2:0] PF0_BAR0_CONTROL = 3'h4;
23417    parameter [4:0] PF0_BAR1_APERTURE_SIZE = 5'h00;
23418    parameter [2:0] PF0_BAR1_CONTROL = 3'h0;
23419    parameter [5:0] PF0_BAR2_APERTURE_SIZE = 6'h03;
23420    parameter [2:0] PF0_BAR2_CONTROL = 3'h4;
23421    parameter [4:0] PF0_BAR3_APERTURE_SIZE = 5'h03;
23422    parameter [2:0] PF0_BAR3_CONTROL = 3'h0;
23423    parameter [5:0] PF0_BAR4_APERTURE_SIZE = 6'h03;
23424    parameter [2:0] PF0_BAR4_CONTROL = 3'h4;
23425    parameter [4:0] PF0_BAR5_APERTURE_SIZE = 5'h03;
23426    parameter [2:0] PF0_BAR5_CONTROL = 3'h0;
23427    parameter [7:0] PF0_CAPABILITY_POINTER = 8'h80;
23428    parameter [23:0] PF0_CLASS_CODE = 24'h000000;
23429    parameter PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT = "TRUE";
23430    parameter PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
23431    parameter PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
23432    parameter PF0_DEV_CAP2_ARI_FORWARD_ENABLE = "FALSE";
23433    parameter PF0_DEV_CAP2_CPL_TIMEOUT_DISABLE = "TRUE";
23434    parameter PF0_DEV_CAP2_LTR_SUPPORT = "TRUE";
23435    parameter [1:0] PF0_DEV_CAP2_OBFF_SUPPORT = 2'h0;
23436    parameter PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT = "FALSE";
23437    parameter integer PF0_DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
23438    parameter integer PF0_DEV_CAP_ENDPOINT_L1_LATENCY = 0;
23439    parameter PF0_DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
23440    parameter PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "TRUE";
23441    parameter [2:0] PF0_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
23442    parameter [11:0] PF0_DSN_CAP_NEXTPTR = 12'h10C;
23443    parameter [4:0] PF0_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
23444    parameter PF0_EXPANSION_ROM_ENABLE = "FALSE";
23445    parameter [2:0] PF0_INTERRUPT_PIN = 3'h1;
23446    parameter integer PF0_LINK_CAP_ASPM_SUPPORT = 0;
23447    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
23448    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
23449    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN3 = 7;
23450    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN4 = 7;
23451    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
23452    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
23453    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN3 = 7;
23454    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN4 = 7;
23455    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
23456    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
23457    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN3 = 7;
23458    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN4 = 7;
23459    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
23460    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
23461    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN3 = 7;
23462    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN4 = 7;
23463    parameter [0:0] PF0_LINK_CONTROL_RCB = 1'h0;
23464    parameter PF0_LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
23465    parameter [9:0] PF0_LTR_CAP_MAX_NOSNOOP_LAT = 10'h000;
23466    parameter [9:0] PF0_LTR_CAP_MAX_SNOOP_LAT = 10'h000;
23467    parameter [11:0] PF0_LTR_CAP_NEXTPTR = 12'h000;
23468    parameter [3:0] PF0_LTR_CAP_VER = 4'h1;
23469    parameter [7:0] PF0_MSIX_CAP_NEXTPTR = 8'h00;
23470    parameter integer PF0_MSIX_CAP_PBA_BIR = 0;
23471    parameter [28:0] PF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23472    parameter integer PF0_MSIX_CAP_TABLE_BIR = 0;
23473    parameter [28:0] PF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23474    parameter [10:0] PF0_MSIX_CAP_TABLE_SIZE = 11'h000;
23475    parameter [5:0] PF0_MSIX_VECTOR_COUNT = 6'h04;
23476    parameter integer PF0_MSI_CAP_MULTIMSGCAP = 0;
23477    parameter [7:0] PF0_MSI_CAP_NEXTPTR = 8'h00;
23478    parameter PF0_MSI_CAP_PERVECMASKCAP = "FALSE";
23479    parameter [7:0] PF0_PCIE_CAP_NEXTPTR = 8'h00;
23480    parameter [7:0] PF0_PM_CAP_ID = 8'h01;
23481    parameter [7:0] PF0_PM_CAP_NEXTPTR = 8'h00;
23482    parameter PF0_PM_CAP_PMESUPPORT_D0 = "TRUE";
23483    parameter PF0_PM_CAP_PMESUPPORT_D1 = "TRUE";
23484    parameter PF0_PM_CAP_PMESUPPORT_D3HOT = "TRUE";
23485    parameter PF0_PM_CAP_SUPP_D1_STATE = "TRUE";
23486    parameter [2:0] PF0_PM_CAP_VER_ID = 3'h3;
23487    parameter PF0_PM_CSR_NOSOFTRESET = "TRUE";
23488    parameter [11:0] PF0_SECONDARY_PCIE_CAP_NEXTPTR = 12'h000;
23489    parameter PF0_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
23490    parameter [5:0] PF0_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
23491    parameter [2:0] PF0_SRIOV_BAR0_CONTROL = 3'h4;
23492    parameter [4:0] PF0_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
23493    parameter [2:0] PF0_SRIOV_BAR1_CONTROL = 3'h0;
23494    parameter [5:0] PF0_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
23495    parameter [2:0] PF0_SRIOV_BAR2_CONTROL = 3'h4;
23496    parameter [4:0] PF0_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
23497    parameter [2:0] PF0_SRIOV_BAR3_CONTROL = 3'h0;
23498    parameter [5:0] PF0_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
23499    parameter [2:0] PF0_SRIOV_BAR4_CONTROL = 3'h4;
23500    parameter [4:0] PF0_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
23501    parameter [2:0] PF0_SRIOV_BAR5_CONTROL = 3'h0;
23502    parameter [15:0] PF0_SRIOV_CAP_INITIAL_VF = 16'h0000;
23503    parameter [11:0] PF0_SRIOV_CAP_NEXTPTR = 12'h000;
23504    parameter [15:0] PF0_SRIOV_CAP_TOTAL_VF = 16'h0000;
23505    parameter [3:0] PF0_SRIOV_CAP_VER = 4'h1;
23506    parameter [15:0] PF0_SRIOV_FIRST_VF_OFFSET = 16'h0000;
23507    parameter [15:0] PF0_SRIOV_FUNC_DEP_LINK = 16'h0000;
23508    parameter [31:0] PF0_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
23509    parameter [15:0] PF0_SRIOV_VF_DEVICE_ID = 16'h0000;
23510    parameter PF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
23511    parameter PF0_TPHR_CAP_ENABLE = "FALSE";
23512    parameter PF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
23513    parameter [11:0] PF0_TPHR_CAP_NEXTPTR = 12'h000;
23514    parameter [2:0] PF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
23515    parameter [1:0] PF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
23516    parameter [10:0] PF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
23517    parameter [3:0] PF0_TPHR_CAP_VER = 4'h1;
23518    parameter PF0_VC_CAP_ENABLE = "FALSE";
23519    parameter [11:0] PF0_VC_CAP_NEXTPTR = 12'h000;
23520    parameter [3:0] PF0_VC_CAP_VER = 4'h1;
23521    parameter [11:0] PF1_AER_CAP_NEXTPTR = 12'h000;
23522    parameter [11:0] PF1_ARI_CAP_NEXTPTR = 12'h000;
23523    parameter [7:0] PF1_ARI_CAP_NEXT_FUNC = 8'h00;
23524    parameter [5:0] PF1_BAR0_APERTURE_SIZE = 6'h03;
23525    parameter [2:0] PF1_BAR0_CONTROL = 3'h4;
23526    parameter [4:0] PF1_BAR1_APERTURE_SIZE = 5'h00;
23527    parameter [2:0] PF1_BAR1_CONTROL = 3'h0;
23528    parameter [5:0] PF1_BAR2_APERTURE_SIZE = 6'h03;
23529    parameter [2:0] PF1_BAR2_CONTROL = 3'h4;
23530    parameter [4:0] PF1_BAR3_APERTURE_SIZE = 5'h03;
23531    parameter [2:0] PF1_BAR3_CONTROL = 3'h0;
23532    parameter [5:0] PF1_BAR4_APERTURE_SIZE = 6'h03;
23533    parameter [2:0] PF1_BAR4_CONTROL = 3'h4;
23534    parameter [4:0] PF1_BAR5_APERTURE_SIZE = 5'h03;
23535    parameter [2:0] PF1_BAR5_CONTROL = 3'h0;
23536    parameter [7:0] PF1_CAPABILITY_POINTER = 8'h80;
23537    parameter [23:0] PF1_CLASS_CODE = 24'h000000;
23538    parameter [2:0] PF1_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
23539    parameter [11:0] PF1_DSN_CAP_NEXTPTR = 12'h10C;
23540    parameter [4:0] PF1_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
23541    parameter PF1_EXPANSION_ROM_ENABLE = "FALSE";
23542    parameter [2:0] PF1_INTERRUPT_PIN = 3'h1;
23543    parameter [7:0] PF1_MSIX_CAP_NEXTPTR = 8'h00;
23544    parameter integer PF1_MSIX_CAP_PBA_BIR = 0;
23545    parameter [28:0] PF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23546    parameter integer PF1_MSIX_CAP_TABLE_BIR = 0;
23547    parameter [28:0] PF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23548    parameter [10:0] PF1_MSIX_CAP_TABLE_SIZE = 11'h000;
23549    parameter integer PF1_MSI_CAP_MULTIMSGCAP = 0;
23550    parameter [7:0] PF1_MSI_CAP_NEXTPTR = 8'h00;
23551    parameter PF1_MSI_CAP_PERVECMASKCAP = "FALSE";
23552    parameter [7:0] PF1_PCIE_CAP_NEXTPTR = 8'h00;
23553    parameter [7:0] PF1_PM_CAP_NEXTPTR = 8'h00;
23554    parameter PF1_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
23555    parameter [5:0] PF1_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
23556    parameter [2:0] PF1_SRIOV_BAR0_CONTROL = 3'h4;
23557    parameter [4:0] PF1_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
23558    parameter [2:0] PF1_SRIOV_BAR1_CONTROL = 3'h0;
23559    parameter [5:0] PF1_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
23560    parameter [2:0] PF1_SRIOV_BAR2_CONTROL = 3'h4;
23561    parameter [4:0] PF1_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
23562    parameter [2:0] PF1_SRIOV_BAR3_CONTROL = 3'h0;
23563    parameter [5:0] PF1_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
23564    parameter [2:0] PF1_SRIOV_BAR4_CONTROL = 3'h4;
23565    parameter [4:0] PF1_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
23566    parameter [2:0] PF1_SRIOV_BAR5_CONTROL = 3'h0;
23567    parameter [15:0] PF1_SRIOV_CAP_INITIAL_VF = 16'h0000;
23568    parameter [11:0] PF1_SRIOV_CAP_NEXTPTR = 12'h000;
23569    parameter [15:0] PF1_SRIOV_CAP_TOTAL_VF = 16'h0000;
23570    parameter [3:0] PF1_SRIOV_CAP_VER = 4'h1;
23571    parameter [15:0] PF1_SRIOV_FIRST_VF_OFFSET = 16'h0000;
23572    parameter [15:0] PF1_SRIOV_FUNC_DEP_LINK = 16'h0000;
23573    parameter [31:0] PF1_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
23574    parameter [15:0] PF1_SRIOV_VF_DEVICE_ID = 16'h0000;
23575    parameter [11:0] PF1_TPHR_CAP_NEXTPTR = 12'h000;
23576    parameter [2:0] PF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
23577    parameter [11:0] PF2_AER_CAP_NEXTPTR = 12'h000;
23578    parameter [11:0] PF2_ARI_CAP_NEXTPTR = 12'h000;
23579    parameter [7:0] PF2_ARI_CAP_NEXT_FUNC = 8'h00;
23580    parameter [5:0] PF2_BAR0_APERTURE_SIZE = 6'h03;
23581    parameter [2:0] PF2_BAR0_CONTROL = 3'h4;
23582    parameter [4:0] PF2_BAR1_APERTURE_SIZE = 5'h00;
23583    parameter [2:0] PF2_BAR1_CONTROL = 3'h0;
23584    parameter [5:0] PF2_BAR2_APERTURE_SIZE = 6'h03;
23585    parameter [2:0] PF2_BAR2_CONTROL = 3'h4;
23586    parameter [4:0] PF2_BAR3_APERTURE_SIZE = 5'h03;
23587    parameter [2:0] PF2_BAR3_CONTROL = 3'h0;
23588    parameter [5:0] PF2_BAR4_APERTURE_SIZE = 6'h03;
23589    parameter [2:0] PF2_BAR4_CONTROL = 3'h4;
23590    parameter [4:0] PF2_BAR5_APERTURE_SIZE = 5'h03;
23591    parameter [2:0] PF2_BAR5_CONTROL = 3'h0;
23592    parameter [7:0] PF2_CAPABILITY_POINTER = 8'h80;
23593    parameter [23:0] PF2_CLASS_CODE = 24'h000000;
23594    parameter [2:0] PF2_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
23595    parameter [11:0] PF2_DSN_CAP_NEXTPTR = 12'h10C;
23596    parameter [4:0] PF2_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
23597    parameter PF2_EXPANSION_ROM_ENABLE = "FALSE";
23598    parameter [2:0] PF2_INTERRUPT_PIN = 3'h1;
23599    parameter [7:0] PF2_MSIX_CAP_NEXTPTR = 8'h00;
23600    parameter integer PF2_MSIX_CAP_PBA_BIR = 0;
23601    parameter [28:0] PF2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23602    parameter integer PF2_MSIX_CAP_TABLE_BIR = 0;
23603    parameter [28:0] PF2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23604    parameter [10:0] PF2_MSIX_CAP_TABLE_SIZE = 11'h000;
23605    parameter integer PF2_MSI_CAP_MULTIMSGCAP = 0;
23606    parameter [7:0] PF2_MSI_CAP_NEXTPTR = 8'h00;
23607    parameter PF2_MSI_CAP_PERVECMASKCAP = "FALSE";
23608    parameter [7:0] PF2_PCIE_CAP_NEXTPTR = 8'h00;
23609    parameter [7:0] PF2_PM_CAP_NEXTPTR = 8'h00;
23610    parameter PF2_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
23611    parameter [5:0] PF2_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
23612    parameter [2:0] PF2_SRIOV_BAR0_CONTROL = 3'h4;
23613    parameter [4:0] PF2_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
23614    parameter [2:0] PF2_SRIOV_BAR1_CONTROL = 3'h0;
23615    parameter [5:0] PF2_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
23616    parameter [2:0] PF2_SRIOV_BAR2_CONTROL = 3'h4;
23617    parameter [4:0] PF2_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
23618    parameter [2:0] PF2_SRIOV_BAR3_CONTROL = 3'h0;
23619    parameter [5:0] PF2_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
23620    parameter [2:0] PF2_SRIOV_BAR4_CONTROL = 3'h4;
23621    parameter [4:0] PF2_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
23622    parameter [2:0] PF2_SRIOV_BAR5_CONTROL = 3'h0;
23623    parameter [15:0] PF2_SRIOV_CAP_INITIAL_VF = 16'h0000;
23624    parameter [11:0] PF2_SRIOV_CAP_NEXTPTR = 12'h000;
23625    parameter [15:0] PF2_SRIOV_CAP_TOTAL_VF = 16'h0000;
23626    parameter [3:0] PF2_SRIOV_CAP_VER = 4'h1;
23627    parameter [15:0] PF2_SRIOV_FIRST_VF_OFFSET = 16'h0000;
23628    parameter [15:0] PF2_SRIOV_FUNC_DEP_LINK = 16'h0000;
23629    parameter [31:0] PF2_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
23630    parameter [15:0] PF2_SRIOV_VF_DEVICE_ID = 16'h0000;
23631    parameter [11:0] PF2_TPHR_CAP_NEXTPTR = 12'h000;
23632    parameter [2:0] PF2_TPHR_CAP_ST_MODE_SEL = 3'h0;
23633    parameter [11:0] PF3_AER_CAP_NEXTPTR = 12'h000;
23634    parameter [11:0] PF3_ARI_CAP_NEXTPTR = 12'h000;
23635    parameter [7:0] PF3_ARI_CAP_NEXT_FUNC = 8'h00;
23636    parameter [5:0] PF3_BAR0_APERTURE_SIZE = 6'h03;
23637    parameter [2:0] PF3_BAR0_CONTROL = 3'h4;
23638    parameter [4:0] PF3_BAR1_APERTURE_SIZE = 5'h00;
23639    parameter [2:0] PF3_BAR1_CONTROL = 3'h0;
23640    parameter [5:0] PF3_BAR2_APERTURE_SIZE = 6'h03;
23641    parameter [2:0] PF3_BAR2_CONTROL = 3'h4;
23642    parameter [4:0] PF3_BAR3_APERTURE_SIZE = 5'h03;
23643    parameter [2:0] PF3_BAR3_CONTROL = 3'h0;
23644    parameter [5:0] PF3_BAR4_APERTURE_SIZE = 6'h03;
23645    parameter [2:0] PF3_BAR4_CONTROL = 3'h4;
23646    parameter [4:0] PF3_BAR5_APERTURE_SIZE = 5'h03;
23647    parameter [2:0] PF3_BAR5_CONTROL = 3'h0;
23648    parameter [7:0] PF3_CAPABILITY_POINTER = 8'h80;
23649    parameter [23:0] PF3_CLASS_CODE = 24'h000000;
23650    parameter [2:0] PF3_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
23651    parameter [11:0] PF3_DSN_CAP_NEXTPTR = 12'h10C;
23652    parameter [4:0] PF3_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
23653    parameter PF3_EXPANSION_ROM_ENABLE = "FALSE";
23654    parameter [2:0] PF3_INTERRUPT_PIN = 3'h1;
23655    parameter [7:0] PF3_MSIX_CAP_NEXTPTR = 8'h00;
23656    parameter integer PF3_MSIX_CAP_PBA_BIR = 0;
23657    parameter [28:0] PF3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23658    parameter integer PF3_MSIX_CAP_TABLE_BIR = 0;
23659    parameter [28:0] PF3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23660    parameter [10:0] PF3_MSIX_CAP_TABLE_SIZE = 11'h000;
23661    parameter integer PF3_MSI_CAP_MULTIMSGCAP = 0;
23662    parameter [7:0] PF3_MSI_CAP_NEXTPTR = 8'h00;
23663    parameter PF3_MSI_CAP_PERVECMASKCAP = "FALSE";
23664    parameter [7:0] PF3_PCIE_CAP_NEXTPTR = 8'h00;
23665    parameter [7:0] PF3_PM_CAP_NEXTPTR = 8'h00;
23666    parameter PF3_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
23667    parameter [5:0] PF3_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
23668    parameter [2:0] PF3_SRIOV_BAR0_CONTROL = 3'h4;
23669    parameter [4:0] PF3_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
23670    parameter [2:0] PF3_SRIOV_BAR1_CONTROL = 3'h0;
23671    parameter [5:0] PF3_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
23672    parameter [2:0] PF3_SRIOV_BAR2_CONTROL = 3'h4;
23673    parameter [4:0] PF3_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
23674    parameter [2:0] PF3_SRIOV_BAR3_CONTROL = 3'h0;
23675    parameter [5:0] PF3_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
23676    parameter [2:0] PF3_SRIOV_BAR4_CONTROL = 3'h4;
23677    parameter [4:0] PF3_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
23678    parameter [2:0] PF3_SRIOV_BAR5_CONTROL = 3'h0;
23679    parameter [15:0] PF3_SRIOV_CAP_INITIAL_VF = 16'h0000;
23680    parameter [11:0] PF3_SRIOV_CAP_NEXTPTR = 12'h000;
23681    parameter [15:0] PF3_SRIOV_CAP_TOTAL_VF = 16'h0000;
23682    parameter [3:0] PF3_SRIOV_CAP_VER = 4'h1;
23683    parameter [15:0] PF3_SRIOV_FIRST_VF_OFFSET = 16'h0000;
23684    parameter [15:0] PF3_SRIOV_FUNC_DEP_LINK = 16'h0000;
23685    parameter [31:0] PF3_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
23686    parameter [15:0] PF3_SRIOV_VF_DEVICE_ID = 16'h0000;
23687    parameter [11:0] PF3_TPHR_CAP_NEXTPTR = 12'h000;
23688    parameter [2:0] PF3_TPHR_CAP_ST_MODE_SEL = 3'h0;
23689    parameter PL_CFG_STATE_ROBUSTNESS_ENABLE = "TRUE";
23690    parameter PL_DEEMPH_SOURCE_SELECT = "TRUE";
23691    parameter PL_DESKEW_ON_SKIP_IN_GEN12 = "FALSE";
23692    parameter PL_DISABLE_AUTO_EQ_SPEED_CHANGE_TO_GEN3 = "FALSE";
23693    parameter PL_DISABLE_AUTO_EQ_SPEED_CHANGE_TO_GEN4 = "FALSE";
23694    parameter PL_DISABLE_AUTO_SPEED_CHANGE_TO_GEN2 = "FALSE";
23695    parameter PL_DISABLE_DC_BALANCE = "FALSE";
23696    parameter PL_DISABLE_EI_INFER_IN_L0 = "FALSE";
23697    parameter PL_DISABLE_LANE_REVERSAL = "FALSE";
23698    parameter [1:0] PL_DISABLE_LFSR_UPDATE_ON_SKP = 2'h0;
23699    parameter PL_DISABLE_RETRAIN_ON_EB_ERROR = "FALSE";
23700    parameter PL_DISABLE_RETRAIN_ON_FRAMING_ERROR = "FALSE";
23701    parameter [15:0] PL_DISABLE_RETRAIN_ON_SPECIFIC_FRAMING_ERROR = 16'h0000;
23702    parameter PL_DISABLE_UPCONFIG_CAPABLE = "FALSE";
23703    parameter [1:0] PL_EQ_ADAPT_DISABLE_COEFF_CHECK = 2'h0;
23704    parameter [1:0] PL_EQ_ADAPT_DISABLE_PRESET_CHECK = 2'h0;
23705    parameter [4:0] PL_EQ_ADAPT_ITER_COUNT = 5'h02;
23706    parameter [1:0] PL_EQ_ADAPT_REJECT_RETRY_COUNT = 2'h1;
23707    parameter [1:0] PL_EQ_BYPASS_PHASE23 = 2'h0;
23708    parameter [5:0] PL_EQ_DEFAULT_RX_PRESET_HINT = 6'h33;
23709    parameter [7:0] PL_EQ_DEFAULT_TX_PRESET = 8'h44;
23710    parameter PL_EQ_DISABLE_MISMATCH_CHECK = "TRUE";
23711    parameter [1:0] PL_EQ_RX_ADAPT_EQ_PHASE0 = 2'h0;
23712    parameter [1:0] PL_EQ_RX_ADAPT_EQ_PHASE1 = 2'h0;
23713    parameter PL_EQ_SHORT_ADAPT_PHASE = "FALSE";
23714    parameter PL_EQ_TX_8G_EQ_TS2_ENABLE = "FALSE";
23715    parameter PL_EXIT_LOOPBACK_ON_EI_ENTRY = "TRUE";
23716    parameter PL_INFER_EI_DISABLE_LPBK_ACTIVE = "TRUE";
23717    parameter PL_INFER_EI_DISABLE_REC_RC = "FALSE";
23718    parameter PL_INFER_EI_DISABLE_REC_SPD = "FALSE";
23719    parameter [31:0] PL_LANE0_EQ_CONTROL = 32'h00003F00;
23720    parameter [31:0] PL_LANE10_EQ_CONTROL = 32'h00003F00;
23721    parameter [31:0] PL_LANE11_EQ_CONTROL = 32'h00003F00;
23722    parameter [31:0] PL_LANE12_EQ_CONTROL = 32'h00003F00;
23723    parameter [31:0] PL_LANE13_EQ_CONTROL = 32'h00003F00;
23724    parameter [31:0] PL_LANE14_EQ_CONTROL = 32'h00003F00;
23725    parameter [31:0] PL_LANE15_EQ_CONTROL = 32'h00003F00;
23726    parameter [31:0] PL_LANE1_EQ_CONTROL = 32'h00003F00;
23727    parameter [31:0] PL_LANE2_EQ_CONTROL = 32'h00003F00;
23728    parameter [31:0] PL_LANE3_EQ_CONTROL = 32'h00003F00;
23729    parameter [31:0] PL_LANE4_EQ_CONTROL = 32'h00003F00;
23730    parameter [31:0] PL_LANE5_EQ_CONTROL = 32'h00003F00;
23731    parameter [31:0] PL_LANE6_EQ_CONTROL = 32'h00003F00;
23732    parameter [31:0] PL_LANE7_EQ_CONTROL = 32'h00003F00;
23733    parameter [31:0] PL_LANE8_EQ_CONTROL = 32'h00003F00;
23734    parameter [31:0] PL_LANE9_EQ_CONTROL = 32'h00003F00;
23735    parameter [3:0] PL_LINK_CAP_MAX_LINK_SPEED = 4'h4;
23736    parameter [4:0] PL_LINK_CAP_MAX_LINK_WIDTH = 5'h08;
23737    parameter integer PL_N_FTS = 255;
23738    parameter PL_QUIESCE_GUARANTEE_DISABLE = "FALSE";
23739    parameter PL_REDO_EQ_SOURCE_SELECT = "TRUE";
23740    parameter [7:0] PL_REPORT_ALL_PHY_ERRORS = 8'h00;
23741    parameter [1:0] PL_RX_ADAPT_TIMER_CLWS_CLOBBER_TX_TS = 2'h0;
23742    parameter [3:0] PL_RX_ADAPT_TIMER_CLWS_GEN3 = 4'h0;
23743    parameter [3:0] PL_RX_ADAPT_TIMER_CLWS_GEN4 = 4'h0;
23744    parameter [1:0] PL_RX_ADAPT_TIMER_RRL_CLOBBER_TX_TS = 2'h0;
23745    parameter [3:0] PL_RX_ADAPT_TIMER_RRL_GEN3 = 4'h0;
23746    parameter [3:0] PL_RX_ADAPT_TIMER_RRL_GEN4 = 4'h0;
23747    parameter [1:0] PL_RX_L0S_EXIT_TO_RECOVERY = 2'h0;
23748    parameter [1:0] PL_SIM_FAST_LINK_TRAINING = 2'h0;
23749    parameter PL_SRIS_ENABLE = "FALSE";
23750    parameter [6:0] PL_SRIS_SKPOS_GEN_SPD_VEC = 7'h00;
23751    parameter [6:0] PL_SRIS_SKPOS_REC_SPD_VEC = 7'h00;
23752    parameter PL_UPSTREAM_FACING = "TRUE";
23753    parameter [15:0] PL_USER_SPARE = 16'h0000;
23754    parameter [15:0] PM_ASPML0S_TIMEOUT = 16'h1500;
23755    parameter [19:0] PM_ASPML1_ENTRY_DELAY = 20'h003E8;
23756    parameter PM_ENABLE_L23_ENTRY = "FALSE";
23757    parameter PM_ENABLE_SLOT_POWER_CAPTURE = "TRUE";
23758    parameter [31:0] PM_L1_REENTRY_DELAY = 32'h00000100;
23759    parameter [19:0] PM_PME_SERVICE_TIMEOUT_DELAY = 20'h00000;
23760    parameter [15:0] PM_PME_TURNOFF_ACK_DELAY = 16'h0100;
23761    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
23762    parameter [31:0] SIM_JTAG_IDCODE = 32'h00000000;
23763    parameter SIM_VERSION = "1.0";
23764    parameter SPARE_BIT0 = "FALSE";
23765    parameter integer SPARE_BIT1 = 0;
23766    parameter integer SPARE_BIT2 = 0;
23767    parameter SPARE_BIT3 = "FALSE";
23768    parameter integer SPARE_BIT4 = 0;
23769    parameter integer SPARE_BIT5 = 0;
23770    parameter integer SPARE_BIT6 = 0;
23771    parameter integer SPARE_BIT7 = 0;
23772    parameter integer SPARE_BIT8 = 0;
23773    parameter [7:0] SPARE_BYTE0 = 8'h00;
23774    parameter [7:0] SPARE_BYTE1 = 8'h00;
23775    parameter [7:0] SPARE_BYTE2 = 8'h00;
23776    parameter [7:0] SPARE_BYTE3 = 8'h00;
23777    parameter [31:0] SPARE_WORD0 = 32'h00000000;
23778    parameter [31:0] SPARE_WORD1 = 32'h00000000;
23779    parameter [31:0] SPARE_WORD2 = 32'h00000000;
23780    parameter [31:0] SPARE_WORD3 = 32'h00000000;
23781    parameter [3:0] SRIOV_CAP_ENABLE = 4'h0;
23782    parameter TL2CFG_IF_PARITY_CHK = "TRUE";
23783    parameter [1:0] TL_COMPLETION_RAM_NUM_TLPS = 2'h0;
23784    parameter [1:0] TL_COMPLETION_RAM_SIZE = 2'h1;
23785    parameter [11:0] TL_CREDITS_CD = 12'h000;
23786    parameter [7:0] TL_CREDITS_CH = 8'h00;
23787    parameter [11:0] TL_CREDITS_NPD = 12'h004;
23788    parameter [7:0] TL_CREDITS_NPH = 8'h20;
23789    parameter [11:0] TL_CREDITS_PD = 12'h0E0;
23790    parameter [7:0] TL_CREDITS_PH = 8'h20;
23791    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TIME = 5'h02;
23792    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TLP_COUNT = 5'h08;
23793    parameter [1:0] TL_PF_ENABLE_REG = 2'h0;
23794    parameter [0:0] TL_POSTED_RAM_SIZE = 1'h0;
23795    parameter TL_RX_COMPLETION_FROM_RAM_READ_PIPELINE = "FALSE";
23796    parameter TL_RX_COMPLETION_TO_RAM_READ_PIPELINE = "FALSE";
23797    parameter TL_RX_COMPLETION_TO_RAM_WRITE_PIPELINE = "FALSE";
23798    parameter TL_RX_POSTED_FROM_RAM_READ_PIPELINE = "FALSE";
23799    parameter TL_RX_POSTED_TO_RAM_READ_PIPELINE = "FALSE";
23800    parameter TL_RX_POSTED_TO_RAM_WRITE_PIPELINE = "FALSE";
23801    parameter TL_TX_MUX_STRICT_PRIORITY = "TRUE";
23802    parameter TL_TX_TLP_STRADDLE_ENABLE = "FALSE";
23803    parameter TL_TX_TLP_TERMINATE_PARITY = "FALSE";
23804    parameter [15:0] TL_USER_SPARE = 16'h0000;
23805    parameter TPH_FROM_RAM_PIPELINE = "FALSE";
23806    parameter TPH_TO_RAM_PIPELINE = "FALSE";
23807    parameter [7:0] VF0_CAPABILITY_POINTER = 8'h80;
23808    parameter [11:0] VFG0_ARI_CAP_NEXTPTR = 12'h000;
23809    parameter [7:0] VFG0_MSIX_CAP_NEXTPTR = 8'h00;
23810    parameter integer VFG0_MSIX_CAP_PBA_BIR = 0;
23811    parameter [28:0] VFG0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23812    parameter integer VFG0_MSIX_CAP_TABLE_BIR = 0;
23813    parameter [28:0] VFG0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23814    parameter [10:0] VFG0_MSIX_CAP_TABLE_SIZE = 11'h000;
23815    parameter [7:0] VFG0_PCIE_CAP_NEXTPTR = 8'h00;
23816    parameter [11:0] VFG0_TPHR_CAP_NEXTPTR = 12'h000;
23817    parameter [2:0] VFG0_TPHR_CAP_ST_MODE_SEL = 3'h0;
23818    parameter [11:0] VFG1_ARI_CAP_NEXTPTR = 12'h000;
23819    parameter [7:0] VFG1_MSIX_CAP_NEXTPTR = 8'h00;
23820    parameter integer VFG1_MSIX_CAP_PBA_BIR = 0;
23821    parameter [28:0] VFG1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23822    parameter integer VFG1_MSIX_CAP_TABLE_BIR = 0;
23823    parameter [28:0] VFG1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23824    parameter [10:0] VFG1_MSIX_CAP_TABLE_SIZE = 11'h000;
23825    parameter [7:0] VFG1_PCIE_CAP_NEXTPTR = 8'h00;
23826    parameter [11:0] VFG1_TPHR_CAP_NEXTPTR = 12'h000;
23827    parameter [2:0] VFG1_TPHR_CAP_ST_MODE_SEL = 3'h0;
23828    parameter [11:0] VFG2_ARI_CAP_NEXTPTR = 12'h000;
23829    parameter [7:0] VFG2_MSIX_CAP_NEXTPTR = 8'h00;
23830    parameter integer VFG2_MSIX_CAP_PBA_BIR = 0;
23831    parameter [28:0] VFG2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23832    parameter integer VFG2_MSIX_CAP_TABLE_BIR = 0;
23833    parameter [28:0] VFG2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23834    parameter [10:0] VFG2_MSIX_CAP_TABLE_SIZE = 11'h000;
23835    parameter [7:0] VFG2_PCIE_CAP_NEXTPTR = 8'h00;
23836    parameter [11:0] VFG2_TPHR_CAP_NEXTPTR = 12'h000;
23837    parameter [2:0] VFG2_TPHR_CAP_ST_MODE_SEL = 3'h0;
23838    parameter [11:0] VFG3_ARI_CAP_NEXTPTR = 12'h000;
23839    parameter [7:0] VFG3_MSIX_CAP_NEXTPTR = 8'h00;
23840    parameter integer VFG3_MSIX_CAP_PBA_BIR = 0;
23841    parameter [28:0] VFG3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
23842    parameter integer VFG3_MSIX_CAP_TABLE_BIR = 0;
23843    parameter [28:0] VFG3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
23844    parameter [10:0] VFG3_MSIX_CAP_TABLE_SIZE = 11'h000;
23845    parameter [7:0] VFG3_PCIE_CAP_NEXTPTR = 8'h00;
23846    parameter [11:0] VFG3_TPHR_CAP_NEXTPTR = 12'h000;
23847    parameter [2:0] VFG3_TPHR_CAP_ST_MODE_SEL = 3'h0;
23848    output [7:0] AXIUSEROUT;
23849    output [7:0] CFGBUSNUMBER;
23850    output [1:0] CFGCURRENTSPEED;
23851    output CFGERRCOROUT;
23852    output CFGERRFATALOUT;
23853    output CFGERRNONFATALOUT;
23854    output [7:0] CFGEXTFUNCTIONNUMBER;
23855    output CFGEXTREADRECEIVED;
23856    output [9:0] CFGEXTREGISTERNUMBER;
23857    output [3:0] CFGEXTWRITEBYTEENABLE;
23858    output [31:0] CFGEXTWRITEDATA;
23859    output CFGEXTWRITERECEIVED;
23860    output [11:0] CFGFCCPLD;
23861    output [7:0] CFGFCCPLH;
23862    output [11:0] CFGFCNPD;
23863    output [7:0] CFGFCNPH;
23864    output [11:0] CFGFCPD;
23865    output [7:0] CFGFCPH;
23866    output [3:0] CFGFLRINPROCESS;
23867    output [11:0] CFGFUNCTIONPOWERSTATE;
23868    output [15:0] CFGFUNCTIONSTATUS;
23869    output CFGHOTRESETOUT;
23870    output [31:0] CFGINTERRUPTMSIDATA;
23871    output [3:0] CFGINTERRUPTMSIENABLE;
23872    output CFGINTERRUPTMSIFAIL;
23873    output CFGINTERRUPTMSIMASKUPDATE;
23874    output [11:0] CFGINTERRUPTMSIMMENABLE;
23875    output CFGINTERRUPTMSISENT;
23876    output [3:0] CFGINTERRUPTMSIXENABLE;
23877    output [3:0] CFGINTERRUPTMSIXMASK;
23878    output CFGINTERRUPTMSIXVECPENDINGSTATUS;
23879    output CFGINTERRUPTSENT;
23880    output [1:0] CFGLINKPOWERSTATE;
23881    output [4:0] CFGLOCALERROROUT;
23882    output CFGLOCALERRORVALID;
23883    output CFGLTRENABLE;
23884    output [5:0] CFGLTSSMSTATE;
23885    output [1:0] CFGMAXPAYLOAD;
23886    output [2:0] CFGMAXREADREQ;
23887    output [31:0] CFGMGMTREADDATA;
23888    output CFGMGMTREADWRITEDONE;
23889    output CFGMSGRECEIVED;
23890    output [7:0] CFGMSGRECEIVEDDATA;
23891    output [4:0] CFGMSGRECEIVEDTYPE;
23892    output CFGMSGTRANSMITDONE;
23893    output [12:0] CFGMSIXRAMADDRESS;
23894    output CFGMSIXRAMREADENABLE;
23895    output [3:0] CFGMSIXRAMWRITEBYTEENABLE;
23896    output [35:0] CFGMSIXRAMWRITEDATA;
23897    output [2:0] CFGNEGOTIATEDWIDTH;
23898    output [1:0] CFGOBFFENABLE;
23899    output CFGPHYLINKDOWN;
23900    output [1:0] CFGPHYLINKSTATUS;
23901    output CFGPLSTATUSCHANGE;
23902    output CFGPOWERSTATECHANGEINTERRUPT;
23903    output [3:0] CFGRCBSTATUS;
23904    output [1:0] CFGRXPMSTATE;
23905    output [11:0] CFGTPHRAMADDRESS;
23906    output CFGTPHRAMREADENABLE;
23907    output [3:0] CFGTPHRAMWRITEBYTEENABLE;
23908    output [35:0] CFGTPHRAMWRITEDATA;
23909    output [3:0] CFGTPHREQUESTERENABLE;
23910    output [11:0] CFGTPHSTMODE;
23911    output [1:0] CFGTXPMSTATE;
23912    output CONFMCAPDESIGNSWITCH;
23913    output CONFMCAPEOS;
23914    output CONFMCAPINUSEBYPCIE;
23915    output CONFREQREADY;
23916    output [31:0] CONFRESPRDATA;
23917    output CONFRESPVALID;
23918    output [31:0] DBGCTRL0OUT;
23919    output [31:0] DBGCTRL1OUT;
23920    output [255:0] DBGDATA0OUT;
23921    output [255:0] DBGDATA1OUT;
23922    output [15:0] DRPDO;
23923    output DRPRDY;
23924    output [255:0] MAXISCQTDATA;
23925    output [7:0] MAXISCQTKEEP;
23926    output MAXISCQTLAST;
23927    output [87:0] MAXISCQTUSER;
23928    output MAXISCQTVALID;
23929    output [255:0] MAXISRCTDATA;
23930    output [7:0] MAXISRCTKEEP;
23931    output MAXISRCTLAST;
23932    output [74:0] MAXISRCTUSER;
23933    output MAXISRCTVALID;
23934    output [8:0] MIREPLAYRAMADDRESS0;
23935    output [8:0] MIREPLAYRAMADDRESS1;
23936    output MIREPLAYRAMREADENABLE0;
23937    output MIREPLAYRAMREADENABLE1;
23938    output [127:0] MIREPLAYRAMWRITEDATA0;
23939    output [127:0] MIREPLAYRAMWRITEDATA1;
23940    output MIREPLAYRAMWRITEENABLE0;
23941    output MIREPLAYRAMWRITEENABLE1;
23942    output [8:0] MIRXCOMPLETIONRAMREADADDRESS0;
23943    output [8:0] MIRXCOMPLETIONRAMREADADDRESS1;
23944    output [1:0] MIRXCOMPLETIONRAMREADENABLE0;
23945    output [1:0] MIRXCOMPLETIONRAMREADENABLE1;
23946    output [8:0] MIRXCOMPLETIONRAMWRITEADDRESS0;
23947    output [8:0] MIRXCOMPLETIONRAMWRITEADDRESS1;
23948    output [143:0] MIRXCOMPLETIONRAMWRITEDATA0;
23949    output [143:0] MIRXCOMPLETIONRAMWRITEDATA1;
23950    output [1:0] MIRXCOMPLETIONRAMWRITEENABLE0;
23951    output [1:0] MIRXCOMPLETIONRAMWRITEENABLE1;
23952    output [8:0] MIRXPOSTEDREQUESTRAMREADADDRESS0;
23953    output [8:0] MIRXPOSTEDREQUESTRAMREADADDRESS1;
23954    output MIRXPOSTEDREQUESTRAMREADENABLE0;
23955    output MIRXPOSTEDREQUESTRAMREADENABLE1;
23956    output [8:0] MIRXPOSTEDREQUESTRAMWRITEADDRESS0;
23957    output [8:0] MIRXPOSTEDREQUESTRAMWRITEADDRESS1;
23958    output [143:0] MIRXPOSTEDREQUESTRAMWRITEDATA0;
23959    output [143:0] MIRXPOSTEDREQUESTRAMWRITEDATA1;
23960    output MIRXPOSTEDREQUESTRAMWRITEENABLE0;
23961    output MIRXPOSTEDREQUESTRAMWRITEENABLE1;
23962    output [5:0] PCIECQNPREQCOUNT;
23963    output PCIEPERST0B;
23964    output PCIEPERST1B;
23965    output [5:0] PCIERQSEQNUM0;
23966    output [5:0] PCIERQSEQNUM1;
23967    output PCIERQSEQNUMVLD0;
23968    output PCIERQSEQNUMVLD1;
23969    output [7:0] PCIERQTAG0;
23970    output [7:0] PCIERQTAG1;
23971    output [3:0] PCIERQTAGAV;
23972    output PCIERQTAGVLD0;
23973    output PCIERQTAGVLD1;
23974    output [3:0] PCIETFCNPDAV;
23975    output [3:0] PCIETFCNPHAV;
23976    output [1:0] PIPERX00EQCONTROL;
23977    output PIPERX00POLARITY;
23978    output [1:0] PIPERX01EQCONTROL;
23979    output PIPERX01POLARITY;
23980    output [1:0] PIPERX02EQCONTROL;
23981    output PIPERX02POLARITY;
23982    output [1:0] PIPERX03EQCONTROL;
23983    output PIPERX03POLARITY;
23984    output [1:0] PIPERX04EQCONTROL;
23985    output PIPERX04POLARITY;
23986    output [1:0] PIPERX05EQCONTROL;
23987    output PIPERX05POLARITY;
23988    output [1:0] PIPERX06EQCONTROL;
23989    output PIPERX06POLARITY;
23990    output [1:0] PIPERX07EQCONTROL;
23991    output PIPERX07POLARITY;
23992    output [1:0] PIPERX08EQCONTROL;
23993    output PIPERX08POLARITY;
23994    output [1:0] PIPERX09EQCONTROL;
23995    output PIPERX09POLARITY;
23996    output [1:0] PIPERX10EQCONTROL;
23997    output PIPERX10POLARITY;
23998    output [1:0] PIPERX11EQCONTROL;
23999    output PIPERX11POLARITY;
24000    output [1:0] PIPERX12EQCONTROL;
24001    output PIPERX12POLARITY;
24002    output [1:0] PIPERX13EQCONTROL;
24003    output PIPERX13POLARITY;
24004    output [1:0] PIPERX14EQCONTROL;
24005    output PIPERX14POLARITY;
24006    output [1:0] PIPERX15EQCONTROL;
24007    output PIPERX15POLARITY;
24008    output [5:0] PIPERXEQLPLFFS;
24009    output [3:0] PIPERXEQLPTXPRESET;
24010    output [1:0] PIPETX00CHARISK;
24011    output PIPETX00COMPLIANCE;
24012    output [31:0] PIPETX00DATA;
24013    output PIPETX00DATAVALID;
24014    output PIPETX00ELECIDLE;
24015    output [1:0] PIPETX00EQCONTROL;
24016    output [5:0] PIPETX00EQDEEMPH;
24017    output [1:0] PIPETX00POWERDOWN;
24018    output PIPETX00STARTBLOCK;
24019    output [1:0] PIPETX00SYNCHEADER;
24020    output [1:0] PIPETX01CHARISK;
24021    output PIPETX01COMPLIANCE;
24022    output [31:0] PIPETX01DATA;
24023    output PIPETX01DATAVALID;
24024    output PIPETX01ELECIDLE;
24025    output [1:0] PIPETX01EQCONTROL;
24026    output [5:0] PIPETX01EQDEEMPH;
24027    output [1:0] PIPETX01POWERDOWN;
24028    output PIPETX01STARTBLOCK;
24029    output [1:0] PIPETX01SYNCHEADER;
24030    output [1:0] PIPETX02CHARISK;
24031    output PIPETX02COMPLIANCE;
24032    output [31:0] PIPETX02DATA;
24033    output PIPETX02DATAVALID;
24034    output PIPETX02ELECIDLE;
24035    output [1:0] PIPETX02EQCONTROL;
24036    output [5:0] PIPETX02EQDEEMPH;
24037    output [1:0] PIPETX02POWERDOWN;
24038    output PIPETX02STARTBLOCK;
24039    output [1:0] PIPETX02SYNCHEADER;
24040    output [1:0] PIPETX03CHARISK;
24041    output PIPETX03COMPLIANCE;
24042    output [31:0] PIPETX03DATA;
24043    output PIPETX03DATAVALID;
24044    output PIPETX03ELECIDLE;
24045    output [1:0] PIPETX03EQCONTROL;
24046    output [5:0] PIPETX03EQDEEMPH;
24047    output [1:0] PIPETX03POWERDOWN;
24048    output PIPETX03STARTBLOCK;
24049    output [1:0] PIPETX03SYNCHEADER;
24050    output [1:0] PIPETX04CHARISK;
24051    output PIPETX04COMPLIANCE;
24052    output [31:0] PIPETX04DATA;
24053    output PIPETX04DATAVALID;
24054    output PIPETX04ELECIDLE;
24055    output [1:0] PIPETX04EQCONTROL;
24056    output [5:0] PIPETX04EQDEEMPH;
24057    output [1:0] PIPETX04POWERDOWN;
24058    output PIPETX04STARTBLOCK;
24059    output [1:0] PIPETX04SYNCHEADER;
24060    output [1:0] PIPETX05CHARISK;
24061    output PIPETX05COMPLIANCE;
24062    output [31:0] PIPETX05DATA;
24063    output PIPETX05DATAVALID;
24064    output PIPETX05ELECIDLE;
24065    output [1:0] PIPETX05EQCONTROL;
24066    output [5:0] PIPETX05EQDEEMPH;
24067    output [1:0] PIPETX05POWERDOWN;
24068    output PIPETX05STARTBLOCK;
24069    output [1:0] PIPETX05SYNCHEADER;
24070    output [1:0] PIPETX06CHARISK;
24071    output PIPETX06COMPLIANCE;
24072    output [31:0] PIPETX06DATA;
24073    output PIPETX06DATAVALID;
24074    output PIPETX06ELECIDLE;
24075    output [1:0] PIPETX06EQCONTROL;
24076    output [5:0] PIPETX06EQDEEMPH;
24077    output [1:0] PIPETX06POWERDOWN;
24078    output PIPETX06STARTBLOCK;
24079    output [1:0] PIPETX06SYNCHEADER;
24080    output [1:0] PIPETX07CHARISK;
24081    output PIPETX07COMPLIANCE;
24082    output [31:0] PIPETX07DATA;
24083    output PIPETX07DATAVALID;
24084    output PIPETX07ELECIDLE;
24085    output [1:0] PIPETX07EQCONTROL;
24086    output [5:0] PIPETX07EQDEEMPH;
24087    output [1:0] PIPETX07POWERDOWN;
24088    output PIPETX07STARTBLOCK;
24089    output [1:0] PIPETX07SYNCHEADER;
24090    output [1:0] PIPETX08CHARISK;
24091    output PIPETX08COMPLIANCE;
24092    output [31:0] PIPETX08DATA;
24093    output PIPETX08DATAVALID;
24094    output PIPETX08ELECIDLE;
24095    output [1:0] PIPETX08EQCONTROL;
24096    output [5:0] PIPETX08EQDEEMPH;
24097    output [1:0] PIPETX08POWERDOWN;
24098    output PIPETX08STARTBLOCK;
24099    output [1:0] PIPETX08SYNCHEADER;
24100    output [1:0] PIPETX09CHARISK;
24101    output PIPETX09COMPLIANCE;
24102    output [31:0] PIPETX09DATA;
24103    output PIPETX09DATAVALID;
24104    output PIPETX09ELECIDLE;
24105    output [1:0] PIPETX09EQCONTROL;
24106    output [5:0] PIPETX09EQDEEMPH;
24107    output [1:0] PIPETX09POWERDOWN;
24108    output PIPETX09STARTBLOCK;
24109    output [1:0] PIPETX09SYNCHEADER;
24110    output [1:0] PIPETX10CHARISK;
24111    output PIPETX10COMPLIANCE;
24112    output [31:0] PIPETX10DATA;
24113    output PIPETX10DATAVALID;
24114    output PIPETX10ELECIDLE;
24115    output [1:0] PIPETX10EQCONTROL;
24116    output [5:0] PIPETX10EQDEEMPH;
24117    output [1:0] PIPETX10POWERDOWN;
24118    output PIPETX10STARTBLOCK;
24119    output [1:0] PIPETX10SYNCHEADER;
24120    output [1:0] PIPETX11CHARISK;
24121    output PIPETX11COMPLIANCE;
24122    output [31:0] PIPETX11DATA;
24123    output PIPETX11DATAVALID;
24124    output PIPETX11ELECIDLE;
24125    output [1:0] PIPETX11EQCONTROL;
24126    output [5:0] PIPETX11EQDEEMPH;
24127    output [1:0] PIPETX11POWERDOWN;
24128    output PIPETX11STARTBLOCK;
24129    output [1:0] PIPETX11SYNCHEADER;
24130    output [1:0] PIPETX12CHARISK;
24131    output PIPETX12COMPLIANCE;
24132    output [31:0] PIPETX12DATA;
24133    output PIPETX12DATAVALID;
24134    output PIPETX12ELECIDLE;
24135    output [1:0] PIPETX12EQCONTROL;
24136    output [5:0] PIPETX12EQDEEMPH;
24137    output [1:0] PIPETX12POWERDOWN;
24138    output PIPETX12STARTBLOCK;
24139    output [1:0] PIPETX12SYNCHEADER;
24140    output [1:0] PIPETX13CHARISK;
24141    output PIPETX13COMPLIANCE;
24142    output [31:0] PIPETX13DATA;
24143    output PIPETX13DATAVALID;
24144    output PIPETX13ELECIDLE;
24145    output [1:0] PIPETX13EQCONTROL;
24146    output [5:0] PIPETX13EQDEEMPH;
24147    output [1:0] PIPETX13POWERDOWN;
24148    output PIPETX13STARTBLOCK;
24149    output [1:0] PIPETX13SYNCHEADER;
24150    output [1:0] PIPETX14CHARISK;
24151    output PIPETX14COMPLIANCE;
24152    output [31:0] PIPETX14DATA;
24153    output PIPETX14DATAVALID;
24154    output PIPETX14ELECIDLE;
24155    output [1:0] PIPETX14EQCONTROL;
24156    output [5:0] PIPETX14EQDEEMPH;
24157    output [1:0] PIPETX14POWERDOWN;
24158    output PIPETX14STARTBLOCK;
24159    output [1:0] PIPETX14SYNCHEADER;
24160    output [1:0] PIPETX15CHARISK;
24161    output PIPETX15COMPLIANCE;
24162    output [31:0] PIPETX15DATA;
24163    output PIPETX15DATAVALID;
24164    output PIPETX15ELECIDLE;
24165    output [1:0] PIPETX15EQCONTROL;
24166    output [5:0] PIPETX15EQDEEMPH;
24167    output [1:0] PIPETX15POWERDOWN;
24168    output PIPETX15STARTBLOCK;
24169    output [1:0] PIPETX15SYNCHEADER;
24170    output PIPETXDEEMPH;
24171    output [2:0] PIPETXMARGIN;
24172    output [1:0] PIPETXRATE;
24173    output PIPETXRCVRDET;
24174    output PIPETXRESET;
24175    output PIPETXSWING;
24176    output PLEQINPROGRESS;
24177    output [1:0] PLEQPHASE;
24178    output PLGEN34EQMISMATCH;
24179    output [3:0] SAXISCCTREADY;
24180    output [3:0] SAXISRQTREADY;
24181    output [31:0] USERSPAREOUT;
24182    input [7:0] AXIUSERIN;
24183    input CFGCONFIGSPACEENABLE;
24184    input [15:0] CFGDEVIDPF0;
24185    input [15:0] CFGDEVIDPF1;
24186    input [15:0] CFGDEVIDPF2;
24187    input [15:0] CFGDEVIDPF3;
24188    input [7:0] CFGDSBUSNUMBER;
24189    input [4:0] CFGDSDEVICENUMBER;
24190    input [2:0] CFGDSFUNCTIONNUMBER;
24191    input [63:0] CFGDSN;
24192    input [7:0] CFGDSPORTNUMBER;
24193    input CFGERRCORIN;
24194    input CFGERRUNCORIN;
24195    input [31:0] CFGEXTREADDATA;
24196    input CFGEXTREADDATAVALID;
24197    input [2:0] CFGFCSEL;
24198    input [3:0] CFGFLRDONE;
24199    input CFGHOTRESETIN;
24200    input [3:0] CFGINTERRUPTINT;
24201    input [2:0] CFGINTERRUPTMSIATTR;
24202    input [7:0] CFGINTERRUPTMSIFUNCTIONNUMBER;
24203    input [31:0] CFGINTERRUPTMSIINT;
24204    input [31:0] CFGINTERRUPTMSIPENDINGSTATUS;
24205    input CFGINTERRUPTMSIPENDINGSTATUSDATAENABLE;
24206    input [1:0] CFGINTERRUPTMSIPENDINGSTATUSFUNCTIONNUM;
24207    input [1:0] CFGINTERRUPTMSISELECT;
24208    input CFGINTERRUPTMSITPHPRESENT;
24209    input [7:0] CFGINTERRUPTMSITPHSTTAG;
24210    input [1:0] CFGINTERRUPTMSITPHTYPE;
24211    input [63:0] CFGINTERRUPTMSIXADDRESS;
24212    input [31:0] CFGINTERRUPTMSIXDATA;
24213    input CFGINTERRUPTMSIXINT;
24214    input [1:0] CFGINTERRUPTMSIXVECPENDING;
24215    input [3:0] CFGINTERRUPTPENDING;
24216    input CFGLINKTRAININGENABLE;
24217    input [9:0] CFGMGMTADDR;
24218    input [3:0] CFGMGMTBYTEENABLE;
24219    input CFGMGMTDEBUGACCESS;
24220    input [7:0] CFGMGMTFUNCTIONNUMBER;
24221    input CFGMGMTREAD;
24222    input CFGMGMTWRITE;
24223    input [31:0] CFGMGMTWRITEDATA;
24224    input CFGMSGTRANSMIT;
24225    input [31:0] CFGMSGTRANSMITDATA;
24226    input [2:0] CFGMSGTRANSMITTYPE;
24227    input [35:0] CFGMSIXRAMREADDATA;
24228    input CFGPMASPML1ENTRYREJECT;
24229    input CFGPMASPMTXL0SENTRYDISABLE;
24230    input CFGPOWERSTATECHANGEACK;
24231    input CFGREQPMTRANSITIONL23READY;
24232    input [7:0] CFGREVIDPF0;
24233    input [7:0] CFGREVIDPF1;
24234    input [7:0] CFGREVIDPF2;
24235    input [7:0] CFGREVIDPF3;
24236    input [15:0] CFGSUBSYSIDPF0;
24237    input [15:0] CFGSUBSYSIDPF1;
24238    input [15:0] CFGSUBSYSIDPF2;
24239    input [15:0] CFGSUBSYSIDPF3;
24240    input [15:0] CFGSUBSYSVENDID;
24241    input [35:0] CFGTPHRAMREADDATA;
24242    input [15:0] CFGVENDID;
24243    input CFGVFFLRDONE;
24244    input [7:0] CFGVFFLRFUNCNUM;
24245    input CONFMCAPREQUESTBYCONF;
24246    input [31:0] CONFREQDATA;
24247    input [3:0] CONFREQREGNUM;
24248    input [1:0] CONFREQTYPE;
24249    input CONFREQVALID;
24250    input CORECLK;
24251    input CORECLKMIREPLAYRAM0;
24252    input CORECLKMIREPLAYRAM1;
24253    input CORECLKMIRXCOMPLETIONRAM0;
24254    input CORECLKMIRXCOMPLETIONRAM1;
24255    input CORECLKMIRXPOSTEDREQUESTRAM0;
24256    input CORECLKMIRXPOSTEDREQUESTRAM1;
24257    input [5:0] DBGSEL0;
24258    input [5:0] DBGSEL1;
24259    input [9:0] DRPADDR;
24260    input DRPCLK;
24261    input [15:0] DRPDI;
24262    input DRPEN;
24263    input DRPWE;
24264    input [21:0] MAXISCQTREADY;
24265    input [21:0] MAXISRCTREADY;
24266    input MCAPCLK;
24267    input MCAPPERST0B;
24268    input MCAPPERST1B;
24269    input MGMTRESETN;
24270    input MGMTSTICKYRESETN;
24271    input [5:0] MIREPLAYRAMERRCOR;
24272    input [5:0] MIREPLAYRAMERRUNCOR;
24273    input [127:0] MIREPLAYRAMREADDATA0;
24274    input [127:0] MIREPLAYRAMREADDATA1;
24275    input [11:0] MIRXCOMPLETIONRAMERRCOR;
24276    input [11:0] MIRXCOMPLETIONRAMERRUNCOR;
24277    input [143:0] MIRXCOMPLETIONRAMREADDATA0;
24278    input [143:0] MIRXCOMPLETIONRAMREADDATA1;
24279    input [5:0] MIRXPOSTEDREQUESTRAMERRCOR;
24280    input [5:0] MIRXPOSTEDREQUESTRAMERRUNCOR;
24281    input [143:0] MIRXPOSTEDREQUESTRAMREADDATA0;
24282    input [143:0] MIRXPOSTEDREQUESTRAMREADDATA1;
24283    input [1:0] PCIECOMPLDELIVERED;
24284    input [7:0] PCIECOMPLDELIVEREDTAG0;
24285    input [7:0] PCIECOMPLDELIVEREDTAG1;
24286    input [1:0] PCIECQNPREQ;
24287    input PCIECQNPUSERCREDITRCVD;
24288    input PCIECQPIPELINEEMPTY;
24289    input PCIEPOSTEDREQDELIVERED;
24290    input PIPECLK;
24291    input PIPECLKEN;
24292    input [5:0] PIPEEQFS;
24293    input [5:0] PIPEEQLF;
24294    input PIPERESETN;
24295    input [1:0] PIPERX00CHARISK;
24296    input [31:0] PIPERX00DATA;
24297    input PIPERX00DATAVALID;
24298    input PIPERX00ELECIDLE;
24299    input PIPERX00EQDONE;
24300    input PIPERX00EQLPADAPTDONE;
24301    input PIPERX00EQLPLFFSSEL;
24302    input [17:0] PIPERX00EQLPNEWTXCOEFFORPRESET;
24303    input PIPERX00PHYSTATUS;
24304    input [1:0] PIPERX00STARTBLOCK;
24305    input [2:0] PIPERX00STATUS;
24306    input [1:0] PIPERX00SYNCHEADER;
24307    input PIPERX00VALID;
24308    input [1:0] PIPERX01CHARISK;
24309    input [31:0] PIPERX01DATA;
24310    input PIPERX01DATAVALID;
24311    input PIPERX01ELECIDLE;
24312    input PIPERX01EQDONE;
24313    input PIPERX01EQLPADAPTDONE;
24314    input PIPERX01EQLPLFFSSEL;
24315    input [17:0] PIPERX01EQLPNEWTXCOEFFORPRESET;
24316    input PIPERX01PHYSTATUS;
24317    input [1:0] PIPERX01STARTBLOCK;
24318    input [2:0] PIPERX01STATUS;
24319    input [1:0] PIPERX01SYNCHEADER;
24320    input PIPERX01VALID;
24321    input [1:0] PIPERX02CHARISK;
24322    input [31:0] PIPERX02DATA;
24323    input PIPERX02DATAVALID;
24324    input PIPERX02ELECIDLE;
24325    input PIPERX02EQDONE;
24326    input PIPERX02EQLPADAPTDONE;
24327    input PIPERX02EQLPLFFSSEL;
24328    input [17:0] PIPERX02EQLPNEWTXCOEFFORPRESET;
24329    input PIPERX02PHYSTATUS;
24330    input [1:0] PIPERX02STARTBLOCK;
24331    input [2:0] PIPERX02STATUS;
24332    input [1:0] PIPERX02SYNCHEADER;
24333    input PIPERX02VALID;
24334    input [1:0] PIPERX03CHARISK;
24335    input [31:0] PIPERX03DATA;
24336    input PIPERX03DATAVALID;
24337    input PIPERX03ELECIDLE;
24338    input PIPERX03EQDONE;
24339    input PIPERX03EQLPADAPTDONE;
24340    input PIPERX03EQLPLFFSSEL;
24341    input [17:0] PIPERX03EQLPNEWTXCOEFFORPRESET;
24342    input PIPERX03PHYSTATUS;
24343    input [1:0] PIPERX03STARTBLOCK;
24344    input [2:0] PIPERX03STATUS;
24345    input [1:0] PIPERX03SYNCHEADER;
24346    input PIPERX03VALID;
24347    input [1:0] PIPERX04CHARISK;
24348    input [31:0] PIPERX04DATA;
24349    input PIPERX04DATAVALID;
24350    input PIPERX04ELECIDLE;
24351    input PIPERX04EQDONE;
24352    input PIPERX04EQLPADAPTDONE;
24353    input PIPERX04EQLPLFFSSEL;
24354    input [17:0] PIPERX04EQLPNEWTXCOEFFORPRESET;
24355    input PIPERX04PHYSTATUS;
24356    input [1:0] PIPERX04STARTBLOCK;
24357    input [2:0] PIPERX04STATUS;
24358    input [1:0] PIPERX04SYNCHEADER;
24359    input PIPERX04VALID;
24360    input [1:0] PIPERX05CHARISK;
24361    input [31:0] PIPERX05DATA;
24362    input PIPERX05DATAVALID;
24363    input PIPERX05ELECIDLE;
24364    input PIPERX05EQDONE;
24365    input PIPERX05EQLPADAPTDONE;
24366    input PIPERX05EQLPLFFSSEL;
24367    input [17:0] PIPERX05EQLPNEWTXCOEFFORPRESET;
24368    input PIPERX05PHYSTATUS;
24369    input [1:0] PIPERX05STARTBLOCK;
24370    input [2:0] PIPERX05STATUS;
24371    input [1:0] PIPERX05SYNCHEADER;
24372    input PIPERX05VALID;
24373    input [1:0] PIPERX06CHARISK;
24374    input [31:0] PIPERX06DATA;
24375    input PIPERX06DATAVALID;
24376    input PIPERX06ELECIDLE;
24377    input PIPERX06EQDONE;
24378    input PIPERX06EQLPADAPTDONE;
24379    input PIPERX06EQLPLFFSSEL;
24380    input [17:0] PIPERX06EQLPNEWTXCOEFFORPRESET;
24381    input PIPERX06PHYSTATUS;
24382    input [1:0] PIPERX06STARTBLOCK;
24383    input [2:0] PIPERX06STATUS;
24384    input [1:0] PIPERX06SYNCHEADER;
24385    input PIPERX06VALID;
24386    input [1:0] PIPERX07CHARISK;
24387    input [31:0] PIPERX07DATA;
24388    input PIPERX07DATAVALID;
24389    input PIPERX07ELECIDLE;
24390    input PIPERX07EQDONE;
24391    input PIPERX07EQLPADAPTDONE;
24392    input PIPERX07EQLPLFFSSEL;
24393    input [17:0] PIPERX07EQLPNEWTXCOEFFORPRESET;
24394    input PIPERX07PHYSTATUS;
24395    input [1:0] PIPERX07STARTBLOCK;
24396    input [2:0] PIPERX07STATUS;
24397    input [1:0] PIPERX07SYNCHEADER;
24398    input PIPERX07VALID;
24399    input [1:0] PIPERX08CHARISK;
24400    input [31:0] PIPERX08DATA;
24401    input PIPERX08DATAVALID;
24402    input PIPERX08ELECIDLE;
24403    input PIPERX08EQDONE;
24404    input PIPERX08EQLPADAPTDONE;
24405    input PIPERX08EQLPLFFSSEL;
24406    input [17:0] PIPERX08EQLPNEWTXCOEFFORPRESET;
24407    input PIPERX08PHYSTATUS;
24408    input [1:0] PIPERX08STARTBLOCK;
24409    input [2:0] PIPERX08STATUS;
24410    input [1:0] PIPERX08SYNCHEADER;
24411    input PIPERX08VALID;
24412    input [1:0] PIPERX09CHARISK;
24413    input [31:0] PIPERX09DATA;
24414    input PIPERX09DATAVALID;
24415    input PIPERX09ELECIDLE;
24416    input PIPERX09EQDONE;
24417    input PIPERX09EQLPADAPTDONE;
24418    input PIPERX09EQLPLFFSSEL;
24419    input [17:0] PIPERX09EQLPNEWTXCOEFFORPRESET;
24420    input PIPERX09PHYSTATUS;
24421    input [1:0] PIPERX09STARTBLOCK;
24422    input [2:0] PIPERX09STATUS;
24423    input [1:0] PIPERX09SYNCHEADER;
24424    input PIPERX09VALID;
24425    input [1:0] PIPERX10CHARISK;
24426    input [31:0] PIPERX10DATA;
24427    input PIPERX10DATAVALID;
24428    input PIPERX10ELECIDLE;
24429    input PIPERX10EQDONE;
24430    input PIPERX10EQLPADAPTDONE;
24431    input PIPERX10EQLPLFFSSEL;
24432    input [17:0] PIPERX10EQLPNEWTXCOEFFORPRESET;
24433    input PIPERX10PHYSTATUS;
24434    input [1:0] PIPERX10STARTBLOCK;
24435    input [2:0] PIPERX10STATUS;
24436    input [1:0] PIPERX10SYNCHEADER;
24437    input PIPERX10VALID;
24438    input [1:0] PIPERX11CHARISK;
24439    input [31:0] PIPERX11DATA;
24440    input PIPERX11DATAVALID;
24441    input PIPERX11ELECIDLE;
24442    input PIPERX11EQDONE;
24443    input PIPERX11EQLPADAPTDONE;
24444    input PIPERX11EQLPLFFSSEL;
24445    input [17:0] PIPERX11EQLPNEWTXCOEFFORPRESET;
24446    input PIPERX11PHYSTATUS;
24447    input [1:0] PIPERX11STARTBLOCK;
24448    input [2:0] PIPERX11STATUS;
24449    input [1:0] PIPERX11SYNCHEADER;
24450    input PIPERX11VALID;
24451    input [1:0] PIPERX12CHARISK;
24452    input [31:0] PIPERX12DATA;
24453    input PIPERX12DATAVALID;
24454    input PIPERX12ELECIDLE;
24455    input PIPERX12EQDONE;
24456    input PIPERX12EQLPADAPTDONE;
24457    input PIPERX12EQLPLFFSSEL;
24458    input [17:0] PIPERX12EQLPNEWTXCOEFFORPRESET;
24459    input PIPERX12PHYSTATUS;
24460    input [1:0] PIPERX12STARTBLOCK;
24461    input [2:0] PIPERX12STATUS;
24462    input [1:0] PIPERX12SYNCHEADER;
24463    input PIPERX12VALID;
24464    input [1:0] PIPERX13CHARISK;
24465    input [31:0] PIPERX13DATA;
24466    input PIPERX13DATAVALID;
24467    input PIPERX13ELECIDLE;
24468    input PIPERX13EQDONE;
24469    input PIPERX13EQLPADAPTDONE;
24470    input PIPERX13EQLPLFFSSEL;
24471    input [17:0] PIPERX13EQLPNEWTXCOEFFORPRESET;
24472    input PIPERX13PHYSTATUS;
24473    input [1:0] PIPERX13STARTBLOCK;
24474    input [2:0] PIPERX13STATUS;
24475    input [1:0] PIPERX13SYNCHEADER;
24476    input PIPERX13VALID;
24477    input [1:0] PIPERX14CHARISK;
24478    input [31:0] PIPERX14DATA;
24479    input PIPERX14DATAVALID;
24480    input PIPERX14ELECIDLE;
24481    input PIPERX14EQDONE;
24482    input PIPERX14EQLPADAPTDONE;
24483    input PIPERX14EQLPLFFSSEL;
24484    input [17:0] PIPERX14EQLPNEWTXCOEFFORPRESET;
24485    input PIPERX14PHYSTATUS;
24486    input [1:0] PIPERX14STARTBLOCK;
24487    input [2:0] PIPERX14STATUS;
24488    input [1:0] PIPERX14SYNCHEADER;
24489    input PIPERX14VALID;
24490    input [1:0] PIPERX15CHARISK;
24491    input [31:0] PIPERX15DATA;
24492    input PIPERX15DATAVALID;
24493    input PIPERX15ELECIDLE;
24494    input PIPERX15EQDONE;
24495    input PIPERX15EQLPADAPTDONE;
24496    input PIPERX15EQLPLFFSSEL;
24497    input [17:0] PIPERX15EQLPNEWTXCOEFFORPRESET;
24498    input PIPERX15PHYSTATUS;
24499    input [1:0] PIPERX15STARTBLOCK;
24500    input [2:0] PIPERX15STATUS;
24501    input [1:0] PIPERX15SYNCHEADER;
24502    input PIPERX15VALID;
24503    input [17:0] PIPETX00EQCOEFF;
24504    input PIPETX00EQDONE;
24505    input [17:0] PIPETX01EQCOEFF;
24506    input PIPETX01EQDONE;
24507    input [17:0] PIPETX02EQCOEFF;
24508    input PIPETX02EQDONE;
24509    input [17:0] PIPETX03EQCOEFF;
24510    input PIPETX03EQDONE;
24511    input [17:0] PIPETX04EQCOEFF;
24512    input PIPETX04EQDONE;
24513    input [17:0] PIPETX05EQCOEFF;
24514    input PIPETX05EQDONE;
24515    input [17:0] PIPETX06EQCOEFF;
24516    input PIPETX06EQDONE;
24517    input [17:0] PIPETX07EQCOEFF;
24518    input PIPETX07EQDONE;
24519    input [17:0] PIPETX08EQCOEFF;
24520    input PIPETX08EQDONE;
24521    input [17:0] PIPETX09EQCOEFF;
24522    input PIPETX09EQDONE;
24523    input [17:0] PIPETX10EQCOEFF;
24524    input PIPETX10EQDONE;
24525    input [17:0] PIPETX11EQCOEFF;
24526    input PIPETX11EQDONE;
24527    input [17:0] PIPETX12EQCOEFF;
24528    input PIPETX12EQDONE;
24529    input [17:0] PIPETX13EQCOEFF;
24530    input PIPETX13EQDONE;
24531    input [17:0] PIPETX14EQCOEFF;
24532    input PIPETX14EQDONE;
24533    input [17:0] PIPETX15EQCOEFF;
24534    input PIPETX15EQDONE;
24535    input PLEQRESETEIEOSCOUNT;
24536    input PLGEN2UPSTREAMPREFERDEEMPH;
24537    input PLGEN34REDOEQSPEED;
24538    input PLGEN34REDOEQUALIZATION;
24539    input RESETN;
24540    input [255:0] SAXISCCTDATA;
24541    input [7:0] SAXISCCTKEEP;
24542    input SAXISCCTLAST;
24543    input [32:0] SAXISCCTUSER;
24544    input SAXISCCTVALID;
24545    input [255:0] SAXISRQTDATA;
24546    input [7:0] SAXISRQTKEEP;
24547    input SAXISRQTLAST;
24548    input [61:0] SAXISRQTUSER;
24549    input SAXISRQTVALID;
24550    input USERCLK;
24551    input USERCLK2;
24552    input USERCLKEN;
24553    input [31:0] USERSPAREIN;
24554endmodule
24555
24556module PCIE4CE4 (...);
24557    parameter ARI_CAP_ENABLE = "FALSE";
24558    parameter AUTO_FLR_RESPONSE = "FALSE";
24559    parameter [7:0] AXISTEN_IF_CCIX_RX_CREDIT_LIMIT = 8'h08;
24560    parameter [7:0] AXISTEN_IF_CCIX_TX_CREDIT_LIMIT = 8'h08;
24561    parameter AXISTEN_IF_CCIX_TX_REGISTERED_TREADY = "FALSE";
24562    parameter [1:0] AXISTEN_IF_CC_ALIGNMENT_MODE = 2'h0;
24563    parameter [23:0] AXISTEN_IF_COMPL_TIMEOUT_REG0 = 24'hBEBC20;
24564    parameter [27:0] AXISTEN_IF_COMPL_TIMEOUT_REG1 = 28'h2FAF080;
24565    parameter [1:0] AXISTEN_IF_CQ_ALIGNMENT_MODE = 2'h0;
24566    parameter AXISTEN_IF_CQ_EN_POISONED_MEM_WR = "FALSE";
24567    parameter AXISTEN_IF_ENABLE_256_TAGS = "FALSE";
24568    parameter AXISTEN_IF_ENABLE_CLIENT_TAG = "FALSE";
24569    parameter AXISTEN_IF_ENABLE_INTERNAL_MSIX_TABLE = "FALSE";
24570    parameter AXISTEN_IF_ENABLE_MESSAGE_RID_CHECK = "TRUE";
24571    parameter [17:0] AXISTEN_IF_ENABLE_MSG_ROUTE = 18'h00000;
24572    parameter AXISTEN_IF_ENABLE_RX_MSG_INTFC = "FALSE";
24573    parameter AXISTEN_IF_EXT_512 = "FALSE";
24574    parameter AXISTEN_IF_EXT_512_CC_STRADDLE = "FALSE";
24575    parameter AXISTEN_IF_EXT_512_CQ_STRADDLE = "FALSE";
24576    parameter AXISTEN_IF_EXT_512_RC_STRADDLE = "FALSE";
24577    parameter AXISTEN_IF_EXT_512_RQ_STRADDLE = "FALSE";
24578    parameter AXISTEN_IF_LEGACY_MODE_ENABLE = "FALSE";
24579    parameter AXISTEN_IF_MSIX_FROM_RAM_PIPELINE = "FALSE";
24580    parameter AXISTEN_IF_MSIX_RX_PARITY_EN = "TRUE";
24581    parameter AXISTEN_IF_MSIX_TO_RAM_PIPELINE = "FALSE";
24582    parameter [1:0] AXISTEN_IF_RC_ALIGNMENT_MODE = 2'h0;
24583    parameter AXISTEN_IF_RC_STRADDLE = "FALSE";
24584    parameter [1:0] AXISTEN_IF_RQ_ALIGNMENT_MODE = 2'h0;
24585    parameter AXISTEN_IF_RX_PARITY_EN = "TRUE";
24586    parameter AXISTEN_IF_SIM_SHORT_CPL_TIMEOUT = "FALSE";
24587    parameter AXISTEN_IF_TX_PARITY_EN = "TRUE";
24588    parameter [1:0] AXISTEN_IF_WIDTH = 2'h2;
24589    parameter CCIX_DIRECT_ATTACH_MODE = "FALSE";
24590    parameter CCIX_ENABLE = "FALSE";
24591    parameter [15:0] CCIX_VENDOR_ID = 16'h0000;
24592    parameter CFG_BYPASS_MODE_ENABLE = "FALSE";
24593    parameter CRM_CORE_CLK_FREQ_500 = "TRUE";
24594    parameter [1:0] CRM_USER_CLK_FREQ = 2'h2;
24595    parameter [15:0] DEBUG_AXI4ST_SPARE = 16'h0000;
24596    parameter [7:0] DEBUG_AXIST_DISABLE_FEATURE_BIT = 8'h00;
24597    parameter [3:0] DEBUG_CAR_SPARE = 4'h0;
24598    parameter [15:0] DEBUG_CFG_SPARE = 16'h0000;
24599    parameter [15:0] DEBUG_LL_SPARE = 16'h0000;
24600    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_DEFRAMER_ERROR = "FALSE";
24601    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_SKP_ERROR = "FALSE";
24602    parameter DEBUG_PL_DISABLE_LES_UPDATE_ON_SKP_PARITY_ERROR = "FALSE";
24603    parameter DEBUG_PL_DISABLE_REC_ENTRY_ON_DYNAMIC_DSKEW_FAIL = "FALSE";
24604    parameter DEBUG_PL_DISABLE_REC_ENTRY_ON_RX_BUFFER_UNDER_OVER_FLOW = "FALSE";
24605    parameter DEBUG_PL_DISABLE_SCRAMBLING = "FALSE";
24606    parameter DEBUG_PL_SIM_RESET_LFSR = "FALSE";
24607    parameter [15:0] DEBUG_PL_SPARE = 16'h0000;
24608    parameter DEBUG_TL_DISABLE_FC_TIMEOUT = "FALSE";
24609    parameter DEBUG_TL_DISABLE_RX_TLP_ORDER_CHECKS = "FALSE";
24610    parameter [15:0] DEBUG_TL_SPARE = 16'h0000;
24611    parameter [7:0] DNSTREAM_LINK_NUM = 8'h00;
24612    parameter DSN_CAP_ENABLE = "FALSE";
24613    parameter EXTENDED_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
24614    parameter HEADER_TYPE_OVERRIDE = "FALSE";
24615    parameter IS_SWITCH_PORT = "FALSE";
24616    parameter LEGACY_CFG_EXTEND_INTERFACE_ENABLE = "FALSE";
24617    parameter [8:0] LL_ACK_TIMEOUT = 9'h000;
24618    parameter LL_ACK_TIMEOUT_EN = "FALSE";
24619    parameter integer LL_ACK_TIMEOUT_FUNC = 0;
24620    parameter LL_DISABLE_SCHED_TX_NAK = "FALSE";
24621    parameter LL_REPLAY_FROM_RAM_PIPELINE = "FALSE";
24622    parameter [8:0] LL_REPLAY_TIMEOUT = 9'h000;
24623    parameter LL_REPLAY_TIMEOUT_EN = "FALSE";
24624    parameter integer LL_REPLAY_TIMEOUT_FUNC = 0;
24625    parameter LL_REPLAY_TO_RAM_PIPELINE = "FALSE";
24626    parameter LL_RX_TLP_PARITY_GEN = "TRUE";
24627    parameter LL_TX_TLP_PARITY_CHK = "TRUE";
24628    parameter [15:0] LL_USER_SPARE = 16'h0000;
24629    parameter [9:0] LTR_TX_MESSAGE_MINIMUM_INTERVAL = 10'h250;
24630    parameter LTR_TX_MESSAGE_ON_FUNC_POWER_STATE_CHANGE = "FALSE";
24631    parameter LTR_TX_MESSAGE_ON_LTR_ENABLE = "FALSE";
24632    parameter [11:0] MCAP_CAP_NEXTPTR = 12'h000;
24633    parameter MCAP_CONFIGURE_OVERRIDE = "FALSE";
24634    parameter MCAP_ENABLE = "FALSE";
24635    parameter MCAP_EOS_DESIGN_SWITCH = "FALSE";
24636    parameter [31:0] MCAP_FPGA_BITSTREAM_VERSION = 32'h00000000;
24637    parameter MCAP_GATE_IO_ENABLE_DESIGN_SWITCH = "FALSE";
24638    parameter MCAP_GATE_MEM_ENABLE_DESIGN_SWITCH = "FALSE";
24639    parameter MCAP_INPUT_GATE_DESIGN_SWITCH = "FALSE";
24640    parameter MCAP_INTERRUPT_ON_MCAP_EOS = "FALSE";
24641    parameter MCAP_INTERRUPT_ON_MCAP_ERROR = "FALSE";
24642    parameter [15:0] MCAP_VSEC_ID = 16'h0000;
24643    parameter [11:0] MCAP_VSEC_LEN = 12'h02C;
24644    parameter [3:0] MCAP_VSEC_REV = 4'h0;
24645    parameter PF0_AER_CAP_ECRC_GEN_AND_CHECK_CAPABLE = "FALSE";
24646    parameter [11:0] PF0_AER_CAP_NEXTPTR = 12'h000;
24647    parameter [11:0] PF0_ARI_CAP_NEXTPTR = 12'h000;
24648    parameter [7:0] PF0_ARI_CAP_NEXT_FUNC = 8'h00;
24649    parameter [3:0] PF0_ARI_CAP_VER = 4'h1;
24650    parameter [4:0] PF0_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
24651    parameter [11:0] PF0_ATS_CAP_NEXTPTR = 12'h000;
24652    parameter PF0_ATS_CAP_ON = "FALSE";
24653    parameter [5:0] PF0_BAR0_APERTURE_SIZE = 6'h03;
24654    parameter [2:0] PF0_BAR0_CONTROL = 3'h4;
24655    parameter [4:0] PF0_BAR1_APERTURE_SIZE = 5'h00;
24656    parameter [2:0] PF0_BAR1_CONTROL = 3'h0;
24657    parameter [5:0] PF0_BAR2_APERTURE_SIZE = 6'h03;
24658    parameter [2:0] PF0_BAR2_CONTROL = 3'h4;
24659    parameter [4:0] PF0_BAR3_APERTURE_SIZE = 5'h03;
24660    parameter [2:0] PF0_BAR3_CONTROL = 3'h0;
24661    parameter [5:0] PF0_BAR4_APERTURE_SIZE = 6'h03;
24662    parameter [2:0] PF0_BAR4_CONTROL = 3'h4;
24663    parameter [4:0] PF0_BAR5_APERTURE_SIZE = 5'h03;
24664    parameter [2:0] PF0_BAR5_CONTROL = 3'h0;
24665    parameter [7:0] PF0_CAPABILITY_POINTER = 8'h80;
24666    parameter [23:0] PF0_CLASS_CODE = 24'h000000;
24667    parameter PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT = "TRUE";
24668    parameter PF0_DEV_CAP2_32B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
24669    parameter PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT = "TRUE";
24670    parameter PF0_DEV_CAP2_ARI_FORWARD_ENABLE = "FALSE";
24671    parameter PF0_DEV_CAP2_CPL_TIMEOUT_DISABLE = "TRUE";
24672    parameter PF0_DEV_CAP2_LTR_SUPPORT = "TRUE";
24673    parameter [1:0] PF0_DEV_CAP2_OBFF_SUPPORT = 2'h0;
24674    parameter PF0_DEV_CAP2_TPH_COMPLETER_SUPPORT = "FALSE";
24675    parameter integer PF0_DEV_CAP_ENDPOINT_L0S_LATENCY = 0;
24676    parameter integer PF0_DEV_CAP_ENDPOINT_L1_LATENCY = 0;
24677    parameter PF0_DEV_CAP_EXT_TAG_SUPPORTED = "TRUE";
24678    parameter PF0_DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE = "TRUE";
24679    parameter [2:0] PF0_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
24680    parameter [11:0] PF0_DSN_CAP_NEXTPTR = 12'h10C;
24681    parameter [4:0] PF0_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
24682    parameter PF0_EXPANSION_ROM_ENABLE = "FALSE";
24683    parameter [2:0] PF0_INTERRUPT_PIN = 3'h1;
24684    parameter integer PF0_LINK_CAP_ASPM_SUPPORT = 0;
24685    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 = 7;
24686    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 = 7;
24687    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN3 = 7;
24688    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN4 = 7;
24689    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN1 = 7;
24690    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN2 = 7;
24691    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN3 = 7;
24692    parameter integer PF0_LINK_CAP_L0S_EXIT_LATENCY_GEN4 = 7;
24693    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 = 7;
24694    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 = 7;
24695    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN3 = 7;
24696    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN4 = 7;
24697    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN1 = 7;
24698    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN2 = 7;
24699    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN3 = 7;
24700    parameter integer PF0_LINK_CAP_L1_EXIT_LATENCY_GEN4 = 7;
24701    parameter [0:0] PF0_LINK_CONTROL_RCB = 1'h0;
24702    parameter PF0_LINK_STATUS_SLOT_CLOCK_CONFIG = "TRUE";
24703    parameter [9:0] PF0_LTR_CAP_MAX_NOSNOOP_LAT = 10'h000;
24704    parameter [9:0] PF0_LTR_CAP_MAX_SNOOP_LAT = 10'h000;
24705    parameter [11:0] PF0_LTR_CAP_NEXTPTR = 12'h000;
24706    parameter [3:0] PF0_LTR_CAP_VER = 4'h1;
24707    parameter [7:0] PF0_MSIX_CAP_NEXTPTR = 8'h00;
24708    parameter integer PF0_MSIX_CAP_PBA_BIR = 0;
24709    parameter [28:0] PF0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
24710    parameter integer PF0_MSIX_CAP_TABLE_BIR = 0;
24711    parameter [28:0] PF0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
24712    parameter [10:0] PF0_MSIX_CAP_TABLE_SIZE = 11'h000;
24713    parameter [5:0] PF0_MSIX_VECTOR_COUNT = 6'h04;
24714    parameter integer PF0_MSI_CAP_MULTIMSGCAP = 0;
24715    parameter [7:0] PF0_MSI_CAP_NEXTPTR = 8'h00;
24716    parameter PF0_MSI_CAP_PERVECMASKCAP = "FALSE";
24717    parameter [7:0] PF0_PCIE_CAP_NEXTPTR = 8'h00;
24718    parameter [7:0] PF0_PM_CAP_ID = 8'h01;
24719    parameter [7:0] PF0_PM_CAP_NEXTPTR = 8'h00;
24720    parameter PF0_PM_CAP_PMESUPPORT_D0 = "TRUE";
24721    parameter PF0_PM_CAP_PMESUPPORT_D1 = "TRUE";
24722    parameter PF0_PM_CAP_PMESUPPORT_D3HOT = "TRUE";
24723    parameter PF0_PM_CAP_SUPP_D1_STATE = "TRUE";
24724    parameter [2:0] PF0_PM_CAP_VER_ID = 3'h3;
24725    parameter PF0_PM_CSR_NOSOFTRESET = "TRUE";
24726    parameter [11:0] PF0_PRI_CAP_NEXTPTR = 12'h000;
24727    parameter PF0_PRI_CAP_ON = "FALSE";
24728    parameter [31:0] PF0_PRI_OST_PR_CAPACITY = 32'h00000000;
24729    parameter [11:0] PF0_SECONDARY_PCIE_CAP_NEXTPTR = 12'h000;
24730    parameter PF0_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
24731    parameter [5:0] PF0_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
24732    parameter [2:0] PF0_SRIOV_BAR0_CONTROL = 3'h4;
24733    parameter [4:0] PF0_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
24734    parameter [2:0] PF0_SRIOV_BAR1_CONTROL = 3'h0;
24735    parameter [5:0] PF0_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
24736    parameter [2:0] PF0_SRIOV_BAR2_CONTROL = 3'h4;
24737    parameter [4:0] PF0_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
24738    parameter [2:0] PF0_SRIOV_BAR3_CONTROL = 3'h0;
24739    parameter [5:0] PF0_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
24740    parameter [2:0] PF0_SRIOV_BAR4_CONTROL = 3'h4;
24741    parameter [4:0] PF0_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
24742    parameter [2:0] PF0_SRIOV_BAR5_CONTROL = 3'h0;
24743    parameter [15:0] PF0_SRIOV_CAP_INITIAL_VF = 16'h0000;
24744    parameter [11:0] PF0_SRIOV_CAP_NEXTPTR = 12'h000;
24745    parameter [15:0] PF0_SRIOV_CAP_TOTAL_VF = 16'h0000;
24746    parameter [3:0] PF0_SRIOV_CAP_VER = 4'h1;
24747    parameter [15:0] PF0_SRIOV_FIRST_VF_OFFSET = 16'h0000;
24748    parameter [15:0] PF0_SRIOV_FUNC_DEP_LINK = 16'h0000;
24749    parameter [31:0] PF0_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
24750    parameter [15:0] PF0_SRIOV_VF_DEVICE_ID = 16'h0000;
24751    parameter PF0_TPHR_CAP_DEV_SPECIFIC_MODE = "TRUE";
24752    parameter PF0_TPHR_CAP_ENABLE = "FALSE";
24753    parameter PF0_TPHR_CAP_INT_VEC_MODE = "TRUE";
24754    parameter [11:0] PF0_TPHR_CAP_NEXTPTR = 12'h000;
24755    parameter [2:0] PF0_TPHR_CAP_ST_MODE_SEL = 3'h0;
24756    parameter [1:0] PF0_TPHR_CAP_ST_TABLE_LOC = 2'h0;
24757    parameter [10:0] PF0_TPHR_CAP_ST_TABLE_SIZE = 11'h000;
24758    parameter [3:0] PF0_TPHR_CAP_VER = 4'h1;
24759    parameter [3:0] PF0_VC_ARB_CAPABILITY = 4'h0;
24760    parameter [7:0] PF0_VC_ARB_TBL_OFFSET = 8'h00;
24761    parameter PF0_VC_CAP_ENABLE = "FALSE";
24762    parameter [11:0] PF0_VC_CAP_NEXTPTR = 12'h000;
24763    parameter [3:0] PF0_VC_CAP_VER = 4'h1;
24764    parameter PF0_VC_EXTENDED_COUNT = "FALSE";
24765    parameter PF0_VC_LOW_PRIORITY_EXTENDED_COUNT = "FALSE";
24766    parameter [11:0] PF1_AER_CAP_NEXTPTR = 12'h000;
24767    parameter [11:0] PF1_ARI_CAP_NEXTPTR = 12'h000;
24768    parameter [7:0] PF1_ARI_CAP_NEXT_FUNC = 8'h00;
24769    parameter [4:0] PF1_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
24770    parameter [11:0] PF1_ATS_CAP_NEXTPTR = 12'h000;
24771    parameter PF1_ATS_CAP_ON = "FALSE";
24772    parameter [5:0] PF1_BAR0_APERTURE_SIZE = 6'h03;
24773    parameter [2:0] PF1_BAR0_CONTROL = 3'h4;
24774    parameter [4:0] PF1_BAR1_APERTURE_SIZE = 5'h00;
24775    parameter [2:0] PF1_BAR1_CONTROL = 3'h0;
24776    parameter [5:0] PF1_BAR2_APERTURE_SIZE = 6'h03;
24777    parameter [2:0] PF1_BAR2_CONTROL = 3'h4;
24778    parameter [4:0] PF1_BAR3_APERTURE_SIZE = 5'h03;
24779    parameter [2:0] PF1_BAR3_CONTROL = 3'h0;
24780    parameter [5:0] PF1_BAR4_APERTURE_SIZE = 6'h03;
24781    parameter [2:0] PF1_BAR4_CONTROL = 3'h4;
24782    parameter [4:0] PF1_BAR5_APERTURE_SIZE = 5'h03;
24783    parameter [2:0] PF1_BAR5_CONTROL = 3'h0;
24784    parameter [7:0] PF1_CAPABILITY_POINTER = 8'h80;
24785    parameter [23:0] PF1_CLASS_CODE = 24'h000000;
24786    parameter [2:0] PF1_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
24787    parameter [11:0] PF1_DSN_CAP_NEXTPTR = 12'h10C;
24788    parameter [4:0] PF1_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
24789    parameter PF1_EXPANSION_ROM_ENABLE = "FALSE";
24790    parameter [2:0] PF1_INTERRUPT_PIN = 3'h1;
24791    parameter [7:0] PF1_MSIX_CAP_NEXTPTR = 8'h00;
24792    parameter integer PF1_MSIX_CAP_PBA_BIR = 0;
24793    parameter [28:0] PF1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
24794    parameter integer PF1_MSIX_CAP_TABLE_BIR = 0;
24795    parameter [28:0] PF1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
24796    parameter [10:0] PF1_MSIX_CAP_TABLE_SIZE = 11'h000;
24797    parameter integer PF1_MSI_CAP_MULTIMSGCAP = 0;
24798    parameter [7:0] PF1_MSI_CAP_NEXTPTR = 8'h00;
24799    parameter PF1_MSI_CAP_PERVECMASKCAP = "FALSE";
24800    parameter [7:0] PF1_PCIE_CAP_NEXTPTR = 8'h00;
24801    parameter [7:0] PF1_PM_CAP_NEXTPTR = 8'h00;
24802    parameter [11:0] PF1_PRI_CAP_NEXTPTR = 12'h000;
24803    parameter PF1_PRI_CAP_ON = "FALSE";
24804    parameter [31:0] PF1_PRI_OST_PR_CAPACITY = 32'h00000000;
24805    parameter PF1_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
24806    parameter [5:0] PF1_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
24807    parameter [2:0] PF1_SRIOV_BAR0_CONTROL = 3'h4;
24808    parameter [4:0] PF1_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
24809    parameter [2:0] PF1_SRIOV_BAR1_CONTROL = 3'h0;
24810    parameter [5:0] PF1_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
24811    parameter [2:0] PF1_SRIOV_BAR2_CONTROL = 3'h4;
24812    parameter [4:0] PF1_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
24813    parameter [2:0] PF1_SRIOV_BAR3_CONTROL = 3'h0;
24814    parameter [5:0] PF1_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
24815    parameter [2:0] PF1_SRIOV_BAR4_CONTROL = 3'h4;
24816    parameter [4:0] PF1_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
24817    parameter [2:0] PF1_SRIOV_BAR5_CONTROL = 3'h0;
24818    parameter [15:0] PF1_SRIOV_CAP_INITIAL_VF = 16'h0000;
24819    parameter [11:0] PF1_SRIOV_CAP_NEXTPTR = 12'h000;
24820    parameter [15:0] PF1_SRIOV_CAP_TOTAL_VF = 16'h0000;
24821    parameter [3:0] PF1_SRIOV_CAP_VER = 4'h1;
24822    parameter [15:0] PF1_SRIOV_FIRST_VF_OFFSET = 16'h0000;
24823    parameter [15:0] PF1_SRIOV_FUNC_DEP_LINK = 16'h0000;
24824    parameter [31:0] PF1_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
24825    parameter [15:0] PF1_SRIOV_VF_DEVICE_ID = 16'h0000;
24826    parameter [11:0] PF1_TPHR_CAP_NEXTPTR = 12'h000;
24827    parameter [2:0] PF1_TPHR_CAP_ST_MODE_SEL = 3'h0;
24828    parameter [11:0] PF2_AER_CAP_NEXTPTR = 12'h000;
24829    parameter [11:0] PF2_ARI_CAP_NEXTPTR = 12'h000;
24830    parameter [7:0] PF2_ARI_CAP_NEXT_FUNC = 8'h00;
24831    parameter [4:0] PF2_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
24832    parameter [11:0] PF2_ATS_CAP_NEXTPTR = 12'h000;
24833    parameter PF2_ATS_CAP_ON = "FALSE";
24834    parameter [5:0] PF2_BAR0_APERTURE_SIZE = 6'h03;
24835    parameter [2:0] PF2_BAR0_CONTROL = 3'h4;
24836    parameter [4:0] PF2_BAR1_APERTURE_SIZE = 5'h00;
24837    parameter [2:0] PF2_BAR1_CONTROL = 3'h0;
24838    parameter [5:0] PF2_BAR2_APERTURE_SIZE = 6'h03;
24839    parameter [2:0] PF2_BAR2_CONTROL = 3'h4;
24840    parameter [4:0] PF2_BAR3_APERTURE_SIZE = 5'h03;
24841    parameter [2:0] PF2_BAR3_CONTROL = 3'h0;
24842    parameter [5:0] PF2_BAR4_APERTURE_SIZE = 6'h03;
24843    parameter [2:0] PF2_BAR4_CONTROL = 3'h4;
24844    parameter [4:0] PF2_BAR5_APERTURE_SIZE = 5'h03;
24845    parameter [2:0] PF2_BAR5_CONTROL = 3'h0;
24846    parameter [7:0] PF2_CAPABILITY_POINTER = 8'h80;
24847    parameter [23:0] PF2_CLASS_CODE = 24'h000000;
24848    parameter [2:0] PF2_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
24849    parameter [11:0] PF2_DSN_CAP_NEXTPTR = 12'h10C;
24850    parameter [4:0] PF2_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
24851    parameter PF2_EXPANSION_ROM_ENABLE = "FALSE";
24852    parameter [2:0] PF2_INTERRUPT_PIN = 3'h1;
24853    parameter [7:0] PF2_MSIX_CAP_NEXTPTR = 8'h00;
24854    parameter integer PF2_MSIX_CAP_PBA_BIR = 0;
24855    parameter [28:0] PF2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
24856    parameter integer PF2_MSIX_CAP_TABLE_BIR = 0;
24857    parameter [28:0] PF2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
24858    parameter [10:0] PF2_MSIX_CAP_TABLE_SIZE = 11'h000;
24859    parameter integer PF2_MSI_CAP_MULTIMSGCAP = 0;
24860    parameter [7:0] PF2_MSI_CAP_NEXTPTR = 8'h00;
24861    parameter PF2_MSI_CAP_PERVECMASKCAP = "FALSE";
24862    parameter [7:0] PF2_PCIE_CAP_NEXTPTR = 8'h00;
24863    parameter [7:0] PF2_PM_CAP_NEXTPTR = 8'h00;
24864    parameter [11:0] PF2_PRI_CAP_NEXTPTR = 12'h000;
24865    parameter PF2_PRI_CAP_ON = "FALSE";
24866    parameter [31:0] PF2_PRI_OST_PR_CAPACITY = 32'h00000000;
24867    parameter PF2_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
24868    parameter [5:0] PF2_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
24869    parameter [2:0] PF2_SRIOV_BAR0_CONTROL = 3'h4;
24870    parameter [4:0] PF2_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
24871    parameter [2:0] PF2_SRIOV_BAR1_CONTROL = 3'h0;
24872    parameter [5:0] PF2_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
24873    parameter [2:0] PF2_SRIOV_BAR2_CONTROL = 3'h4;
24874    parameter [4:0] PF2_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
24875    parameter [2:0] PF2_SRIOV_BAR3_CONTROL = 3'h0;
24876    parameter [5:0] PF2_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
24877    parameter [2:0] PF2_SRIOV_BAR4_CONTROL = 3'h4;
24878    parameter [4:0] PF2_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
24879    parameter [2:0] PF2_SRIOV_BAR5_CONTROL = 3'h0;
24880    parameter [15:0] PF2_SRIOV_CAP_INITIAL_VF = 16'h0000;
24881    parameter [11:0] PF2_SRIOV_CAP_NEXTPTR = 12'h000;
24882    parameter [15:0] PF2_SRIOV_CAP_TOTAL_VF = 16'h0000;
24883    parameter [3:0] PF2_SRIOV_CAP_VER = 4'h1;
24884    parameter [15:0] PF2_SRIOV_FIRST_VF_OFFSET = 16'h0000;
24885    parameter [15:0] PF2_SRIOV_FUNC_DEP_LINK = 16'h0000;
24886    parameter [31:0] PF2_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
24887    parameter [15:0] PF2_SRIOV_VF_DEVICE_ID = 16'h0000;
24888    parameter [11:0] PF2_TPHR_CAP_NEXTPTR = 12'h000;
24889    parameter [2:0] PF2_TPHR_CAP_ST_MODE_SEL = 3'h0;
24890    parameter [11:0] PF3_AER_CAP_NEXTPTR = 12'h000;
24891    parameter [11:0] PF3_ARI_CAP_NEXTPTR = 12'h000;
24892    parameter [7:0] PF3_ARI_CAP_NEXT_FUNC = 8'h00;
24893    parameter [4:0] PF3_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
24894    parameter [11:0] PF3_ATS_CAP_NEXTPTR = 12'h000;
24895    parameter PF3_ATS_CAP_ON = "FALSE";
24896    parameter [5:0] PF3_BAR0_APERTURE_SIZE = 6'h03;
24897    parameter [2:0] PF3_BAR0_CONTROL = 3'h4;
24898    parameter [4:0] PF3_BAR1_APERTURE_SIZE = 5'h00;
24899    parameter [2:0] PF3_BAR1_CONTROL = 3'h0;
24900    parameter [5:0] PF3_BAR2_APERTURE_SIZE = 6'h03;
24901    parameter [2:0] PF3_BAR2_CONTROL = 3'h4;
24902    parameter [4:0] PF3_BAR3_APERTURE_SIZE = 5'h03;
24903    parameter [2:0] PF3_BAR3_CONTROL = 3'h0;
24904    parameter [5:0] PF3_BAR4_APERTURE_SIZE = 6'h03;
24905    parameter [2:0] PF3_BAR4_CONTROL = 3'h4;
24906    parameter [4:0] PF3_BAR5_APERTURE_SIZE = 5'h03;
24907    parameter [2:0] PF3_BAR5_CONTROL = 3'h0;
24908    parameter [7:0] PF3_CAPABILITY_POINTER = 8'h80;
24909    parameter [23:0] PF3_CLASS_CODE = 24'h000000;
24910    parameter [2:0] PF3_DEV_CAP_MAX_PAYLOAD_SIZE = 3'h3;
24911    parameter [11:0] PF3_DSN_CAP_NEXTPTR = 12'h10C;
24912    parameter [4:0] PF3_EXPANSION_ROM_APERTURE_SIZE = 5'h03;
24913    parameter PF3_EXPANSION_ROM_ENABLE = "FALSE";
24914    parameter [2:0] PF3_INTERRUPT_PIN = 3'h1;
24915    parameter [7:0] PF3_MSIX_CAP_NEXTPTR = 8'h00;
24916    parameter integer PF3_MSIX_CAP_PBA_BIR = 0;
24917    parameter [28:0] PF3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
24918    parameter integer PF3_MSIX_CAP_TABLE_BIR = 0;
24919    parameter [28:0] PF3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
24920    parameter [10:0] PF3_MSIX_CAP_TABLE_SIZE = 11'h000;
24921    parameter integer PF3_MSI_CAP_MULTIMSGCAP = 0;
24922    parameter [7:0] PF3_MSI_CAP_NEXTPTR = 8'h00;
24923    parameter PF3_MSI_CAP_PERVECMASKCAP = "FALSE";
24924    parameter [7:0] PF3_PCIE_CAP_NEXTPTR = 8'h00;
24925    parameter [7:0] PF3_PM_CAP_NEXTPTR = 8'h00;
24926    parameter [11:0] PF3_PRI_CAP_NEXTPTR = 12'h000;
24927    parameter PF3_PRI_CAP_ON = "FALSE";
24928    parameter [31:0] PF3_PRI_OST_PR_CAPACITY = 32'h00000000;
24929    parameter PF3_SRIOV_ARI_CAPBL_HIER_PRESERVED = "FALSE";
24930    parameter [5:0] PF3_SRIOV_BAR0_APERTURE_SIZE = 6'h03;
24931    parameter [2:0] PF3_SRIOV_BAR0_CONTROL = 3'h4;
24932    parameter [4:0] PF3_SRIOV_BAR1_APERTURE_SIZE = 5'h00;
24933    parameter [2:0] PF3_SRIOV_BAR1_CONTROL = 3'h0;
24934    parameter [5:0] PF3_SRIOV_BAR2_APERTURE_SIZE = 6'h03;
24935    parameter [2:0] PF3_SRIOV_BAR2_CONTROL = 3'h4;
24936    parameter [4:0] PF3_SRIOV_BAR3_APERTURE_SIZE = 5'h03;
24937    parameter [2:0] PF3_SRIOV_BAR3_CONTROL = 3'h0;
24938    parameter [5:0] PF3_SRIOV_BAR4_APERTURE_SIZE = 6'h03;
24939    parameter [2:0] PF3_SRIOV_BAR4_CONTROL = 3'h4;
24940    parameter [4:0] PF3_SRIOV_BAR5_APERTURE_SIZE = 5'h03;
24941    parameter [2:0] PF3_SRIOV_BAR5_CONTROL = 3'h0;
24942    parameter [15:0] PF3_SRIOV_CAP_INITIAL_VF = 16'h0000;
24943    parameter [11:0] PF3_SRIOV_CAP_NEXTPTR = 12'h000;
24944    parameter [15:0] PF3_SRIOV_CAP_TOTAL_VF = 16'h0000;
24945    parameter [3:0] PF3_SRIOV_CAP_VER = 4'h1;
24946    parameter [15:0] PF3_SRIOV_FIRST_VF_OFFSET = 16'h0000;
24947    parameter [15:0] PF3_SRIOV_FUNC_DEP_LINK = 16'h0000;
24948    parameter [31:0] PF3_SRIOV_SUPPORTED_PAGE_SIZE = 32'h00000000;
24949    parameter [15:0] PF3_SRIOV_VF_DEVICE_ID = 16'h0000;
24950    parameter [11:0] PF3_TPHR_CAP_NEXTPTR = 12'h000;
24951    parameter [2:0] PF3_TPHR_CAP_ST_MODE_SEL = 3'h0;
24952    parameter PL_CFG_STATE_ROBUSTNESS_ENABLE = "TRUE";
24953    parameter PL_CTRL_SKP_GEN_ENABLE = "FALSE";
24954    parameter PL_CTRL_SKP_PARITY_AND_CRC_CHECK_DISABLE = "TRUE";
24955    parameter PL_DEEMPH_SOURCE_SELECT = "TRUE";
24956    parameter PL_DESKEW_ON_SKIP_IN_GEN12 = "FALSE";
24957    parameter PL_DISABLE_AUTO_EQ_SPEED_CHANGE_TO_GEN3 = "FALSE";
24958    parameter PL_DISABLE_AUTO_EQ_SPEED_CHANGE_TO_GEN4 = "FALSE";
24959    parameter PL_DISABLE_AUTO_SPEED_CHANGE_TO_GEN2 = "FALSE";
24960    parameter PL_DISABLE_DC_BALANCE = "FALSE";
24961    parameter PL_DISABLE_EI_INFER_IN_L0 = "FALSE";
24962    parameter PL_DISABLE_LANE_REVERSAL = "FALSE";
24963    parameter [1:0] PL_DISABLE_LFSR_UPDATE_ON_SKP = 2'h0;
24964    parameter PL_DISABLE_RETRAIN_ON_EB_ERROR = "FALSE";
24965    parameter PL_DISABLE_RETRAIN_ON_FRAMING_ERROR = "FALSE";
24966    parameter [15:0] PL_DISABLE_RETRAIN_ON_SPECIFIC_FRAMING_ERROR = 16'h0000;
24967    parameter PL_DISABLE_UPCONFIG_CAPABLE = "FALSE";
24968    parameter [1:0] PL_EQ_ADAPT_DISABLE_COEFF_CHECK = 2'h0;
24969    parameter [1:0] PL_EQ_ADAPT_DISABLE_PRESET_CHECK = 2'h0;
24970    parameter [4:0] PL_EQ_ADAPT_ITER_COUNT = 5'h02;
24971    parameter [1:0] PL_EQ_ADAPT_REJECT_RETRY_COUNT = 2'h1;
24972    parameter [1:0] PL_EQ_BYPASS_PHASE23 = 2'h0;
24973    parameter [5:0] PL_EQ_DEFAULT_RX_PRESET_HINT = 6'h33;
24974    parameter [7:0] PL_EQ_DEFAULT_TX_PRESET = 8'h44;
24975    parameter PL_EQ_DISABLE_MISMATCH_CHECK = "TRUE";
24976    parameter [1:0] PL_EQ_RX_ADAPT_EQ_PHASE0 = 2'h0;
24977    parameter [1:0] PL_EQ_RX_ADAPT_EQ_PHASE1 = 2'h0;
24978    parameter PL_EQ_SHORT_ADAPT_PHASE = "FALSE";
24979    parameter PL_EQ_TX_8G_EQ_TS2_ENABLE = "FALSE";
24980    parameter PL_EXIT_LOOPBACK_ON_EI_ENTRY = "TRUE";
24981    parameter PL_INFER_EI_DISABLE_LPBK_ACTIVE = "TRUE";
24982    parameter PL_INFER_EI_DISABLE_REC_RC = "FALSE";
24983    parameter PL_INFER_EI_DISABLE_REC_SPD = "FALSE";
24984    parameter [31:0] PL_LANE0_EQ_CONTROL = 32'h00003F00;
24985    parameter [31:0] PL_LANE10_EQ_CONTROL = 32'h00003F00;
24986    parameter [31:0] PL_LANE11_EQ_CONTROL = 32'h00003F00;
24987    parameter [31:0] PL_LANE12_EQ_CONTROL = 32'h00003F00;
24988    parameter [31:0] PL_LANE13_EQ_CONTROL = 32'h00003F00;
24989    parameter [31:0] PL_LANE14_EQ_CONTROL = 32'h00003F00;
24990    parameter [31:0] PL_LANE15_EQ_CONTROL = 32'h00003F00;
24991    parameter [31:0] PL_LANE1_EQ_CONTROL = 32'h00003F00;
24992    parameter [31:0] PL_LANE2_EQ_CONTROL = 32'h00003F00;
24993    parameter [31:0] PL_LANE3_EQ_CONTROL = 32'h00003F00;
24994    parameter [31:0] PL_LANE4_EQ_CONTROL = 32'h00003F00;
24995    parameter [31:0] PL_LANE5_EQ_CONTROL = 32'h00003F00;
24996    parameter [31:0] PL_LANE6_EQ_CONTROL = 32'h00003F00;
24997    parameter [31:0] PL_LANE7_EQ_CONTROL = 32'h00003F00;
24998    parameter [31:0] PL_LANE8_EQ_CONTROL = 32'h00003F00;
24999    parameter [31:0] PL_LANE9_EQ_CONTROL = 32'h00003F00;
25000    parameter [3:0] PL_LINK_CAP_MAX_LINK_SPEED = 4'h4;
25001    parameter [4:0] PL_LINK_CAP_MAX_LINK_WIDTH = 5'h08;
25002    parameter integer PL_N_FTS = 255;
25003    parameter PL_QUIESCE_GUARANTEE_DISABLE = "FALSE";
25004    parameter PL_REDO_EQ_SOURCE_SELECT = "TRUE";
25005    parameter [7:0] PL_REPORT_ALL_PHY_ERRORS = 8'h00;
25006    parameter [1:0] PL_RX_ADAPT_TIMER_CLWS_CLOBBER_TX_TS = 2'h0;
25007    parameter [3:0] PL_RX_ADAPT_TIMER_CLWS_GEN3 = 4'h0;
25008    parameter [3:0] PL_RX_ADAPT_TIMER_CLWS_GEN4 = 4'h0;
25009    parameter [1:0] PL_RX_ADAPT_TIMER_RRL_CLOBBER_TX_TS = 2'h0;
25010    parameter [3:0] PL_RX_ADAPT_TIMER_RRL_GEN3 = 4'h0;
25011    parameter [3:0] PL_RX_ADAPT_TIMER_RRL_GEN4 = 4'h0;
25012    parameter [1:0] PL_RX_L0S_EXIT_TO_RECOVERY = 2'h0;
25013    parameter [1:0] PL_SIM_FAST_LINK_TRAINING = 2'h0;
25014    parameter PL_SRIS_ENABLE = "FALSE";
25015    parameter [6:0] PL_SRIS_SKPOS_GEN_SPD_VEC = 7'h00;
25016    parameter [6:0] PL_SRIS_SKPOS_REC_SPD_VEC = 7'h00;
25017    parameter PL_UPSTREAM_FACING = "TRUE";
25018    parameter [15:0] PL_USER_SPARE = 16'h0000;
25019    parameter [15:0] PL_USER_SPARE2 = 16'h0000;
25020    parameter [15:0] PM_ASPML0S_TIMEOUT = 16'h1500;
25021    parameter [19:0] PM_ASPML1_ENTRY_DELAY = 20'h003E8;
25022    parameter PM_ENABLE_L23_ENTRY = "FALSE";
25023    parameter PM_ENABLE_SLOT_POWER_CAPTURE = "TRUE";
25024    parameter [31:0] PM_L1_REENTRY_DELAY = 32'h00000100;
25025    parameter [19:0] PM_PME_SERVICE_TIMEOUT_DELAY = 20'h00000;
25026    parameter [15:0] PM_PME_TURNOFF_ACK_DELAY = 16'h0100;
25027    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
25028    parameter [31:0] SIM_JTAG_IDCODE = 32'h00000000;
25029    parameter SIM_VERSION = "1.0";
25030    parameter SPARE_BIT0 = "FALSE";
25031    parameter integer SPARE_BIT1 = 0;
25032    parameter integer SPARE_BIT2 = 0;
25033    parameter SPARE_BIT3 = "FALSE";
25034    parameter integer SPARE_BIT4 = 0;
25035    parameter integer SPARE_BIT5 = 0;
25036    parameter integer SPARE_BIT6 = 0;
25037    parameter integer SPARE_BIT7 = 0;
25038    parameter integer SPARE_BIT8 = 0;
25039    parameter [7:0] SPARE_BYTE0 = 8'h00;
25040    parameter [7:0] SPARE_BYTE1 = 8'h00;
25041    parameter [7:0] SPARE_BYTE2 = 8'h00;
25042    parameter [7:0] SPARE_BYTE3 = 8'h00;
25043    parameter [31:0] SPARE_WORD0 = 32'h00000000;
25044    parameter [31:0] SPARE_WORD1 = 32'h00000000;
25045    parameter [31:0] SPARE_WORD2 = 32'h00000000;
25046    parameter [31:0] SPARE_WORD3 = 32'h00000000;
25047    parameter [3:0] SRIOV_CAP_ENABLE = 4'h0;
25048    parameter TL2CFG_IF_PARITY_CHK = "TRUE";
25049    parameter [1:0] TL_COMPLETION_RAM_NUM_TLPS = 2'h0;
25050    parameter [1:0] TL_COMPLETION_RAM_SIZE = 2'h1;
25051    parameter [11:0] TL_CREDITS_CD = 12'h000;
25052    parameter [11:0] TL_CREDITS_CD_VC1 = 12'h000;
25053    parameter [7:0] TL_CREDITS_CH = 8'h00;
25054    parameter [7:0] TL_CREDITS_CH_VC1 = 8'h00;
25055    parameter [11:0] TL_CREDITS_NPD = 12'h004;
25056    parameter [11:0] TL_CREDITS_NPD_VC1 = 12'h000;
25057    parameter [7:0] TL_CREDITS_NPH = 8'h20;
25058    parameter [7:0] TL_CREDITS_NPH_VC1 = 8'h01;
25059    parameter [11:0] TL_CREDITS_PD = 12'h0E0;
25060    parameter [11:0] TL_CREDITS_PD_VC1 = 12'h3E0;
25061    parameter [7:0] TL_CREDITS_PH = 8'h20;
25062    parameter [7:0] TL_CREDITS_PH_VC1 = 8'h20;
25063    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TIME = 5'h02;
25064    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TIME_VC1 = 5'h02;
25065    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TLP_COUNT = 5'h08;
25066    parameter [4:0] TL_FC_UPDATE_MIN_INTERVAL_TLP_COUNT_VC1 = 5'h08;
25067    parameter TL_FEATURE_ENABLE_FC_SCALING = "FALSE";
25068    parameter [1:0] TL_PF_ENABLE_REG = 2'h0;
25069    parameter [0:0] TL_POSTED_RAM_SIZE = 1'h0;
25070    parameter TL_RX_COMPLETION_FROM_RAM_READ_PIPELINE = "FALSE";
25071    parameter TL_RX_COMPLETION_TO_RAM_READ_PIPELINE = "FALSE";
25072    parameter TL_RX_COMPLETION_TO_RAM_WRITE_PIPELINE = "FALSE";
25073    parameter TL_RX_POSTED_FROM_RAM_READ_PIPELINE = "FALSE";
25074    parameter TL_RX_POSTED_TO_RAM_READ_PIPELINE = "FALSE";
25075    parameter TL_RX_POSTED_TO_RAM_WRITE_PIPELINE = "FALSE";
25076    parameter TL_TX_MUX_STRICT_PRIORITY = "TRUE";
25077    parameter TL_TX_TLP_STRADDLE_ENABLE = "FALSE";
25078    parameter TL_TX_TLP_TERMINATE_PARITY = "FALSE";
25079    parameter [15:0] TL_USER_SPARE = 16'h0000;
25080    parameter TPH_FROM_RAM_PIPELINE = "FALSE";
25081    parameter TPH_TO_RAM_PIPELINE = "FALSE";
25082    parameter [7:0] VF0_CAPABILITY_POINTER = 8'h80;
25083    parameter [11:0] VFG0_ARI_CAP_NEXTPTR = 12'h000;
25084    parameter [4:0] VFG0_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
25085    parameter [11:0] VFG0_ATS_CAP_NEXTPTR = 12'h000;
25086    parameter VFG0_ATS_CAP_ON = "FALSE";
25087    parameter [7:0] VFG0_MSIX_CAP_NEXTPTR = 8'h00;
25088    parameter integer VFG0_MSIX_CAP_PBA_BIR = 0;
25089    parameter [28:0] VFG0_MSIX_CAP_PBA_OFFSET = 29'h00000050;
25090    parameter integer VFG0_MSIX_CAP_TABLE_BIR = 0;
25091    parameter [28:0] VFG0_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
25092    parameter [10:0] VFG0_MSIX_CAP_TABLE_SIZE = 11'h000;
25093    parameter [7:0] VFG0_PCIE_CAP_NEXTPTR = 8'h00;
25094    parameter [11:0] VFG0_TPHR_CAP_NEXTPTR = 12'h000;
25095    parameter [2:0] VFG0_TPHR_CAP_ST_MODE_SEL = 3'h0;
25096    parameter [11:0] VFG1_ARI_CAP_NEXTPTR = 12'h000;
25097    parameter [4:0] VFG1_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
25098    parameter [11:0] VFG1_ATS_CAP_NEXTPTR = 12'h000;
25099    parameter VFG1_ATS_CAP_ON = "FALSE";
25100    parameter [7:0] VFG1_MSIX_CAP_NEXTPTR = 8'h00;
25101    parameter integer VFG1_MSIX_CAP_PBA_BIR = 0;
25102    parameter [28:0] VFG1_MSIX_CAP_PBA_OFFSET = 29'h00000050;
25103    parameter integer VFG1_MSIX_CAP_TABLE_BIR = 0;
25104    parameter [28:0] VFG1_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
25105    parameter [10:0] VFG1_MSIX_CAP_TABLE_SIZE = 11'h000;
25106    parameter [7:0] VFG1_PCIE_CAP_NEXTPTR = 8'h00;
25107    parameter [11:0] VFG1_TPHR_CAP_NEXTPTR = 12'h000;
25108    parameter [2:0] VFG1_TPHR_CAP_ST_MODE_SEL = 3'h0;
25109    parameter [11:0] VFG2_ARI_CAP_NEXTPTR = 12'h000;
25110    parameter [4:0] VFG2_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
25111    parameter [11:0] VFG2_ATS_CAP_NEXTPTR = 12'h000;
25112    parameter VFG2_ATS_CAP_ON = "FALSE";
25113    parameter [7:0] VFG2_MSIX_CAP_NEXTPTR = 8'h00;
25114    parameter integer VFG2_MSIX_CAP_PBA_BIR = 0;
25115    parameter [28:0] VFG2_MSIX_CAP_PBA_OFFSET = 29'h00000050;
25116    parameter integer VFG2_MSIX_CAP_TABLE_BIR = 0;
25117    parameter [28:0] VFG2_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
25118    parameter [10:0] VFG2_MSIX_CAP_TABLE_SIZE = 11'h000;
25119    parameter [7:0] VFG2_PCIE_CAP_NEXTPTR = 8'h00;
25120    parameter [11:0] VFG2_TPHR_CAP_NEXTPTR = 12'h000;
25121    parameter [2:0] VFG2_TPHR_CAP_ST_MODE_SEL = 3'h0;
25122    parameter [11:0] VFG3_ARI_CAP_NEXTPTR = 12'h000;
25123    parameter [4:0] VFG3_ATS_CAP_INV_QUEUE_DEPTH = 5'h00;
25124    parameter [11:0] VFG3_ATS_CAP_NEXTPTR = 12'h000;
25125    parameter VFG3_ATS_CAP_ON = "FALSE";
25126    parameter [7:0] VFG3_MSIX_CAP_NEXTPTR = 8'h00;
25127    parameter integer VFG3_MSIX_CAP_PBA_BIR = 0;
25128    parameter [28:0] VFG3_MSIX_CAP_PBA_OFFSET = 29'h00000050;
25129    parameter integer VFG3_MSIX_CAP_TABLE_BIR = 0;
25130    parameter [28:0] VFG3_MSIX_CAP_TABLE_OFFSET = 29'h00000040;
25131    parameter [10:0] VFG3_MSIX_CAP_TABLE_SIZE = 11'h000;
25132    parameter [7:0] VFG3_PCIE_CAP_NEXTPTR = 8'h00;
25133    parameter [11:0] VFG3_TPHR_CAP_NEXTPTR = 12'h000;
25134    parameter [2:0] VFG3_TPHR_CAP_ST_MODE_SEL = 3'h0;
25135    output [7:0] AXIUSEROUT;
25136    output CCIXTXCREDIT;
25137    output [7:0] CFGBUSNUMBER;
25138    output [1:0] CFGCURRENTSPEED;
25139    output CFGERRCOROUT;
25140    output CFGERRFATALOUT;
25141    output CFGERRNONFATALOUT;
25142    output [7:0] CFGEXTFUNCTIONNUMBER;
25143    output CFGEXTREADRECEIVED;
25144    output [9:0] CFGEXTREGISTERNUMBER;
25145    output [3:0] CFGEXTWRITEBYTEENABLE;
25146    output [31:0] CFGEXTWRITEDATA;
25147    output CFGEXTWRITERECEIVED;
25148    output [11:0] CFGFCCPLD;
25149    output [7:0] CFGFCCPLH;
25150    output [11:0] CFGFCNPD;
25151    output [7:0] CFGFCNPH;
25152    output [11:0] CFGFCPD;
25153    output [7:0] CFGFCPH;
25154    output [3:0] CFGFLRINPROCESS;
25155    output [11:0] CFGFUNCTIONPOWERSTATE;
25156    output [15:0] CFGFUNCTIONSTATUS;
25157    output CFGHOTRESETOUT;
25158    output [31:0] CFGINTERRUPTMSIDATA;
25159    output [3:0] CFGINTERRUPTMSIENABLE;
25160    output CFGINTERRUPTMSIFAIL;
25161    output CFGINTERRUPTMSIMASKUPDATE;
25162    output [11:0] CFGINTERRUPTMSIMMENABLE;
25163    output CFGINTERRUPTMSISENT;
25164    output [3:0] CFGINTERRUPTMSIXENABLE;
25165    output [3:0] CFGINTERRUPTMSIXMASK;
25166    output CFGINTERRUPTMSIXVECPENDINGSTATUS;
25167    output CFGINTERRUPTSENT;
25168    output [1:0] CFGLINKPOWERSTATE;
25169    output [4:0] CFGLOCALERROROUT;
25170    output CFGLOCALERRORVALID;
25171    output CFGLTRENABLE;
25172    output [5:0] CFGLTSSMSTATE;
25173    output [1:0] CFGMAXPAYLOAD;
25174    output [2:0] CFGMAXREADREQ;
25175    output [31:0] CFGMGMTREADDATA;
25176    output CFGMGMTREADWRITEDONE;
25177    output CFGMSGRECEIVED;
25178    output [7:0] CFGMSGRECEIVEDDATA;
25179    output [4:0] CFGMSGRECEIVEDTYPE;
25180    output CFGMSGTRANSMITDONE;
25181    output [12:0] CFGMSIXRAMADDRESS;
25182    output CFGMSIXRAMREADENABLE;
25183    output [3:0] CFGMSIXRAMWRITEBYTEENABLE;
25184    output [35:0] CFGMSIXRAMWRITEDATA;
25185    output [2:0] CFGNEGOTIATEDWIDTH;
25186    output [1:0] CFGOBFFENABLE;
25187    output CFGPHYLINKDOWN;
25188    output [1:0] CFGPHYLINKSTATUS;
25189    output CFGPLSTATUSCHANGE;
25190    output CFGPOWERSTATECHANGEINTERRUPT;
25191    output [3:0] CFGRCBSTATUS;
25192    output [1:0] CFGRXPMSTATE;
25193    output [11:0] CFGTPHRAMADDRESS;
25194    output CFGTPHRAMREADENABLE;
25195    output [3:0] CFGTPHRAMWRITEBYTEENABLE;
25196    output [35:0] CFGTPHRAMWRITEDATA;
25197    output [3:0] CFGTPHREQUESTERENABLE;
25198    output [11:0] CFGTPHSTMODE;
25199    output [1:0] CFGTXPMSTATE;
25200    output CFGVC1ENABLE;
25201    output CFGVC1NEGOTIATIONPENDING;
25202    output CONFMCAPDESIGNSWITCH;
25203    output CONFMCAPEOS;
25204    output CONFMCAPINUSEBYPCIE;
25205    output CONFREQREADY;
25206    output [31:0] CONFRESPRDATA;
25207    output CONFRESPVALID;
25208    output [129:0] DBGCCIXOUT;
25209    output [31:0] DBGCTRL0OUT;
25210    output [31:0] DBGCTRL1OUT;
25211    output [255:0] DBGDATA0OUT;
25212    output [255:0] DBGDATA1OUT;
25213    output [15:0] DRPDO;
25214    output DRPRDY;
25215    output [45:0] MAXISCCIXRXTUSER;
25216    output MAXISCCIXRXTVALID;
25217    output [255:0] MAXISCQTDATA;
25218    output [7:0] MAXISCQTKEEP;
25219    output MAXISCQTLAST;
25220    output [87:0] MAXISCQTUSER;
25221    output MAXISCQTVALID;
25222    output [255:0] MAXISRCTDATA;
25223    output [7:0] MAXISRCTKEEP;
25224    output MAXISRCTLAST;
25225    output [74:0] MAXISRCTUSER;
25226    output MAXISRCTVALID;
25227    output [8:0] MIREPLAYRAMADDRESS0;
25228    output [8:0] MIREPLAYRAMADDRESS1;
25229    output MIREPLAYRAMREADENABLE0;
25230    output MIREPLAYRAMREADENABLE1;
25231    output [127:0] MIREPLAYRAMWRITEDATA0;
25232    output [127:0] MIREPLAYRAMWRITEDATA1;
25233    output MIREPLAYRAMWRITEENABLE0;
25234    output MIREPLAYRAMWRITEENABLE1;
25235    output [8:0] MIRXCOMPLETIONRAMREADADDRESS0;
25236    output [8:0] MIRXCOMPLETIONRAMREADADDRESS1;
25237    output [1:0] MIRXCOMPLETIONRAMREADENABLE0;
25238    output [1:0] MIRXCOMPLETIONRAMREADENABLE1;
25239    output [8:0] MIRXCOMPLETIONRAMWRITEADDRESS0;
25240    output [8:0] MIRXCOMPLETIONRAMWRITEADDRESS1;
25241    output [143:0] MIRXCOMPLETIONRAMWRITEDATA0;
25242    output [143:0] MIRXCOMPLETIONRAMWRITEDATA1;
25243    output [1:0] MIRXCOMPLETIONRAMWRITEENABLE0;
25244    output [1:0] MIRXCOMPLETIONRAMWRITEENABLE1;
25245    output [8:0] MIRXPOSTEDREQUESTRAMREADADDRESS0;
25246    output [8:0] MIRXPOSTEDREQUESTRAMREADADDRESS1;
25247    output MIRXPOSTEDREQUESTRAMREADENABLE0;
25248    output MIRXPOSTEDREQUESTRAMREADENABLE1;
25249    output [8:0] MIRXPOSTEDREQUESTRAMWRITEADDRESS0;
25250    output [8:0] MIRXPOSTEDREQUESTRAMWRITEADDRESS1;
25251    output [143:0] MIRXPOSTEDREQUESTRAMWRITEDATA0;
25252    output [143:0] MIRXPOSTEDREQUESTRAMWRITEDATA1;
25253    output MIRXPOSTEDREQUESTRAMWRITEENABLE0;
25254    output MIRXPOSTEDREQUESTRAMWRITEENABLE1;
25255    output [5:0] PCIECQNPREQCOUNT;
25256    output PCIEPERST0B;
25257    output PCIEPERST1B;
25258    output [5:0] PCIERQSEQNUM0;
25259    output [5:0] PCIERQSEQNUM1;
25260    output PCIERQSEQNUMVLD0;
25261    output PCIERQSEQNUMVLD1;
25262    output [7:0] PCIERQTAG0;
25263    output [7:0] PCIERQTAG1;
25264    output [3:0] PCIERQTAGAV;
25265    output PCIERQTAGVLD0;
25266    output PCIERQTAGVLD1;
25267    output [3:0] PCIETFCNPDAV;
25268    output [3:0] PCIETFCNPHAV;
25269    output [1:0] PIPERX00EQCONTROL;
25270    output PIPERX00POLARITY;
25271    output [1:0] PIPERX01EQCONTROL;
25272    output PIPERX01POLARITY;
25273    output [1:0] PIPERX02EQCONTROL;
25274    output PIPERX02POLARITY;
25275    output [1:0] PIPERX03EQCONTROL;
25276    output PIPERX03POLARITY;
25277    output [1:0] PIPERX04EQCONTROL;
25278    output PIPERX04POLARITY;
25279    output [1:0] PIPERX05EQCONTROL;
25280    output PIPERX05POLARITY;
25281    output [1:0] PIPERX06EQCONTROL;
25282    output PIPERX06POLARITY;
25283    output [1:0] PIPERX07EQCONTROL;
25284    output PIPERX07POLARITY;
25285    output [1:0] PIPERX08EQCONTROL;
25286    output PIPERX08POLARITY;
25287    output [1:0] PIPERX09EQCONTROL;
25288    output PIPERX09POLARITY;
25289    output [1:0] PIPERX10EQCONTROL;
25290    output PIPERX10POLARITY;
25291    output [1:0] PIPERX11EQCONTROL;
25292    output PIPERX11POLARITY;
25293    output [1:0] PIPERX12EQCONTROL;
25294    output PIPERX12POLARITY;
25295    output [1:0] PIPERX13EQCONTROL;
25296    output PIPERX13POLARITY;
25297    output [1:0] PIPERX14EQCONTROL;
25298    output PIPERX14POLARITY;
25299    output [1:0] PIPERX15EQCONTROL;
25300    output PIPERX15POLARITY;
25301    output [5:0] PIPERXEQLPLFFS;
25302    output [3:0] PIPERXEQLPTXPRESET;
25303    output [1:0] PIPETX00CHARISK;
25304    output PIPETX00COMPLIANCE;
25305    output [31:0] PIPETX00DATA;
25306    output PIPETX00DATAVALID;
25307    output PIPETX00ELECIDLE;
25308    output [1:0] PIPETX00EQCONTROL;
25309    output [5:0] PIPETX00EQDEEMPH;
25310    output [1:0] PIPETX00POWERDOWN;
25311    output PIPETX00STARTBLOCK;
25312    output [1:0] PIPETX00SYNCHEADER;
25313    output [1:0] PIPETX01CHARISK;
25314    output PIPETX01COMPLIANCE;
25315    output [31:0] PIPETX01DATA;
25316    output PIPETX01DATAVALID;
25317    output PIPETX01ELECIDLE;
25318    output [1:0] PIPETX01EQCONTROL;
25319    output [5:0] PIPETX01EQDEEMPH;
25320    output [1:0] PIPETX01POWERDOWN;
25321    output PIPETX01STARTBLOCK;
25322    output [1:0] PIPETX01SYNCHEADER;
25323    output [1:0] PIPETX02CHARISK;
25324    output PIPETX02COMPLIANCE;
25325    output [31:0] PIPETX02DATA;
25326    output PIPETX02DATAVALID;
25327    output PIPETX02ELECIDLE;
25328    output [1:0] PIPETX02EQCONTROL;
25329    output [5:0] PIPETX02EQDEEMPH;
25330    output [1:0] PIPETX02POWERDOWN;
25331    output PIPETX02STARTBLOCK;
25332    output [1:0] PIPETX02SYNCHEADER;
25333    output [1:0] PIPETX03CHARISK;
25334    output PIPETX03COMPLIANCE;
25335    output [31:0] PIPETX03DATA;
25336    output PIPETX03DATAVALID;
25337    output PIPETX03ELECIDLE;
25338    output [1:0] PIPETX03EQCONTROL;
25339    output [5:0] PIPETX03EQDEEMPH;
25340    output [1:0] PIPETX03POWERDOWN;
25341    output PIPETX03STARTBLOCK;
25342    output [1:0] PIPETX03SYNCHEADER;
25343    output [1:0] PIPETX04CHARISK;
25344    output PIPETX04COMPLIANCE;
25345    output [31:0] PIPETX04DATA;
25346    output PIPETX04DATAVALID;
25347    output PIPETX04ELECIDLE;
25348    output [1:0] PIPETX04EQCONTROL;
25349    output [5:0] PIPETX04EQDEEMPH;
25350    output [1:0] PIPETX04POWERDOWN;
25351    output PIPETX04STARTBLOCK;
25352    output [1:0] PIPETX04SYNCHEADER;
25353    output [1:0] PIPETX05CHARISK;
25354    output PIPETX05COMPLIANCE;
25355    output [31:0] PIPETX05DATA;
25356    output PIPETX05DATAVALID;
25357    output PIPETX05ELECIDLE;
25358    output [1:0] PIPETX05EQCONTROL;
25359    output [5:0] PIPETX05EQDEEMPH;
25360    output [1:0] PIPETX05POWERDOWN;
25361    output PIPETX05STARTBLOCK;
25362    output [1:0] PIPETX05SYNCHEADER;
25363    output [1:0] PIPETX06CHARISK;
25364    output PIPETX06COMPLIANCE;
25365    output [31:0] PIPETX06DATA;
25366    output PIPETX06DATAVALID;
25367    output PIPETX06ELECIDLE;
25368    output [1:0] PIPETX06EQCONTROL;
25369    output [5:0] PIPETX06EQDEEMPH;
25370    output [1:0] PIPETX06POWERDOWN;
25371    output PIPETX06STARTBLOCK;
25372    output [1:0] PIPETX06SYNCHEADER;
25373    output [1:0] PIPETX07CHARISK;
25374    output PIPETX07COMPLIANCE;
25375    output [31:0] PIPETX07DATA;
25376    output PIPETX07DATAVALID;
25377    output PIPETX07ELECIDLE;
25378    output [1:0] PIPETX07EQCONTROL;
25379    output [5:0] PIPETX07EQDEEMPH;
25380    output [1:0] PIPETX07POWERDOWN;
25381    output PIPETX07STARTBLOCK;
25382    output [1:0] PIPETX07SYNCHEADER;
25383    output [1:0] PIPETX08CHARISK;
25384    output PIPETX08COMPLIANCE;
25385    output [31:0] PIPETX08DATA;
25386    output PIPETX08DATAVALID;
25387    output PIPETX08ELECIDLE;
25388    output [1:0] PIPETX08EQCONTROL;
25389    output [5:0] PIPETX08EQDEEMPH;
25390    output [1:0] PIPETX08POWERDOWN;
25391    output PIPETX08STARTBLOCK;
25392    output [1:0] PIPETX08SYNCHEADER;
25393    output [1:0] PIPETX09CHARISK;
25394    output PIPETX09COMPLIANCE;
25395    output [31:0] PIPETX09DATA;
25396    output PIPETX09DATAVALID;
25397    output PIPETX09ELECIDLE;
25398    output [1:0] PIPETX09EQCONTROL;
25399    output [5:0] PIPETX09EQDEEMPH;
25400    output [1:0] PIPETX09POWERDOWN;
25401    output PIPETX09STARTBLOCK;
25402    output [1:0] PIPETX09SYNCHEADER;
25403    output [1:0] PIPETX10CHARISK;
25404    output PIPETX10COMPLIANCE;
25405    output [31:0] PIPETX10DATA;
25406    output PIPETX10DATAVALID;
25407    output PIPETX10ELECIDLE;
25408    output [1:0] PIPETX10EQCONTROL;
25409    output [5:0] PIPETX10EQDEEMPH;
25410    output [1:0] PIPETX10POWERDOWN;
25411    output PIPETX10STARTBLOCK;
25412    output [1:0] PIPETX10SYNCHEADER;
25413    output [1:0] PIPETX11CHARISK;
25414    output PIPETX11COMPLIANCE;
25415    output [31:0] PIPETX11DATA;
25416    output PIPETX11DATAVALID;
25417    output PIPETX11ELECIDLE;
25418    output [1:0] PIPETX11EQCONTROL;
25419    output [5:0] PIPETX11EQDEEMPH;
25420    output [1:0] PIPETX11POWERDOWN;
25421    output PIPETX11STARTBLOCK;
25422    output [1:0] PIPETX11SYNCHEADER;
25423    output [1:0] PIPETX12CHARISK;
25424    output PIPETX12COMPLIANCE;
25425    output [31:0] PIPETX12DATA;
25426    output PIPETX12DATAVALID;
25427    output PIPETX12ELECIDLE;
25428    output [1:0] PIPETX12EQCONTROL;
25429    output [5:0] PIPETX12EQDEEMPH;
25430    output [1:0] PIPETX12POWERDOWN;
25431    output PIPETX12STARTBLOCK;
25432    output [1:0] PIPETX12SYNCHEADER;
25433    output [1:0] PIPETX13CHARISK;
25434    output PIPETX13COMPLIANCE;
25435    output [31:0] PIPETX13DATA;
25436    output PIPETX13DATAVALID;
25437    output PIPETX13ELECIDLE;
25438    output [1:0] PIPETX13EQCONTROL;
25439    output [5:0] PIPETX13EQDEEMPH;
25440    output [1:0] PIPETX13POWERDOWN;
25441    output PIPETX13STARTBLOCK;
25442    output [1:0] PIPETX13SYNCHEADER;
25443    output [1:0] PIPETX14CHARISK;
25444    output PIPETX14COMPLIANCE;
25445    output [31:0] PIPETX14DATA;
25446    output PIPETX14DATAVALID;
25447    output PIPETX14ELECIDLE;
25448    output [1:0] PIPETX14EQCONTROL;
25449    output [5:0] PIPETX14EQDEEMPH;
25450    output [1:0] PIPETX14POWERDOWN;
25451    output PIPETX14STARTBLOCK;
25452    output [1:0] PIPETX14SYNCHEADER;
25453    output [1:0] PIPETX15CHARISK;
25454    output PIPETX15COMPLIANCE;
25455    output [31:0] PIPETX15DATA;
25456    output PIPETX15DATAVALID;
25457    output PIPETX15ELECIDLE;
25458    output [1:0] PIPETX15EQCONTROL;
25459    output [5:0] PIPETX15EQDEEMPH;
25460    output [1:0] PIPETX15POWERDOWN;
25461    output PIPETX15STARTBLOCK;
25462    output [1:0] PIPETX15SYNCHEADER;
25463    output PIPETXDEEMPH;
25464    output [2:0] PIPETXMARGIN;
25465    output [1:0] PIPETXRATE;
25466    output PIPETXRCVRDET;
25467    output PIPETXRESET;
25468    output PIPETXSWING;
25469    output PLEQINPROGRESS;
25470    output [1:0] PLEQPHASE;
25471    output PLGEN34EQMISMATCH;
25472    output [3:0] SAXISCCTREADY;
25473    output [3:0] SAXISRQTREADY;
25474    output [23:0] USERSPAREOUT;
25475    input [7:0] AXIUSERIN;
25476    input CCIXOPTIMIZEDTLPTXANDRXENABLE;
25477    input CCIXRXCORRECTABLEERRORDETECTED;
25478    input CCIXRXFIFOOVERFLOW;
25479    input CCIXRXTLPFORWARDED0;
25480    input CCIXRXTLPFORWARDED1;
25481    input [5:0] CCIXRXTLPFORWARDEDLENGTH0;
25482    input [5:0] CCIXRXTLPFORWARDEDLENGTH1;
25483    input CCIXRXUNCORRECTABLEERRORDETECTED;
25484    input CFGCONFIGSPACEENABLE;
25485    input [15:0] CFGDEVIDPF0;
25486    input [15:0] CFGDEVIDPF1;
25487    input [15:0] CFGDEVIDPF2;
25488    input [15:0] CFGDEVIDPF3;
25489    input [7:0] CFGDSBUSNUMBER;
25490    input [4:0] CFGDSDEVICENUMBER;
25491    input [2:0] CFGDSFUNCTIONNUMBER;
25492    input [63:0] CFGDSN;
25493    input [7:0] CFGDSPORTNUMBER;
25494    input CFGERRCORIN;
25495    input CFGERRUNCORIN;
25496    input [31:0] CFGEXTREADDATA;
25497    input CFGEXTREADDATAVALID;
25498    input [2:0] CFGFCSEL;
25499    input CFGFCVCSEL;
25500    input [3:0] CFGFLRDONE;
25501    input CFGHOTRESETIN;
25502    input [3:0] CFGINTERRUPTINT;
25503    input [2:0] CFGINTERRUPTMSIATTR;
25504    input [7:0] CFGINTERRUPTMSIFUNCTIONNUMBER;
25505    input [31:0] CFGINTERRUPTMSIINT;
25506    input [31:0] CFGINTERRUPTMSIPENDINGSTATUS;
25507    input CFGINTERRUPTMSIPENDINGSTATUSDATAENABLE;
25508    input [1:0] CFGINTERRUPTMSIPENDINGSTATUSFUNCTIONNUM;
25509    input [1:0] CFGINTERRUPTMSISELECT;
25510    input CFGINTERRUPTMSITPHPRESENT;
25511    input [7:0] CFGINTERRUPTMSITPHSTTAG;
25512    input [1:0] CFGINTERRUPTMSITPHTYPE;
25513    input [63:0] CFGINTERRUPTMSIXADDRESS;
25514    input [31:0] CFGINTERRUPTMSIXDATA;
25515    input CFGINTERRUPTMSIXINT;
25516    input [1:0] CFGINTERRUPTMSIXVECPENDING;
25517    input [3:0] CFGINTERRUPTPENDING;
25518    input CFGLINKTRAININGENABLE;
25519    input [9:0] CFGMGMTADDR;
25520    input [3:0] CFGMGMTBYTEENABLE;
25521    input CFGMGMTDEBUGACCESS;
25522    input [7:0] CFGMGMTFUNCTIONNUMBER;
25523    input CFGMGMTREAD;
25524    input CFGMGMTWRITE;
25525    input [31:0] CFGMGMTWRITEDATA;
25526    input CFGMSGTRANSMIT;
25527    input [31:0] CFGMSGTRANSMITDATA;
25528    input [2:0] CFGMSGTRANSMITTYPE;
25529    input [35:0] CFGMSIXRAMREADDATA;
25530    input CFGPMASPML1ENTRYREJECT;
25531    input CFGPMASPMTXL0SENTRYDISABLE;
25532    input CFGPOWERSTATECHANGEACK;
25533    input CFGREQPMTRANSITIONL23READY;
25534    input [7:0] CFGREVIDPF0;
25535    input [7:0] CFGREVIDPF1;
25536    input [7:0] CFGREVIDPF2;
25537    input [7:0] CFGREVIDPF3;
25538    input [15:0] CFGSUBSYSIDPF0;
25539    input [15:0] CFGSUBSYSIDPF1;
25540    input [15:0] CFGSUBSYSIDPF2;
25541    input [15:0] CFGSUBSYSIDPF3;
25542    input [15:0] CFGSUBSYSVENDID;
25543    input [35:0] CFGTPHRAMREADDATA;
25544    input [15:0] CFGVENDID;
25545    input CFGVFFLRDONE;
25546    input [7:0] CFGVFFLRFUNCNUM;
25547    input CONFMCAPREQUESTBYCONF;
25548    input [31:0] CONFREQDATA;
25549    input [3:0] CONFREQREGNUM;
25550    input [1:0] CONFREQTYPE;
25551    input CONFREQVALID;
25552    input CORECLK;
25553    input CORECLKCCIX;
25554    input CORECLKMIREPLAYRAM0;
25555    input CORECLKMIREPLAYRAM1;
25556    input CORECLKMIRXCOMPLETIONRAM0;
25557    input CORECLKMIRXCOMPLETIONRAM1;
25558    input CORECLKMIRXPOSTEDREQUESTRAM0;
25559    input CORECLKMIRXPOSTEDREQUESTRAM1;
25560    input [5:0] DBGSEL0;
25561    input [5:0] DBGSEL1;
25562    input [9:0] DRPADDR;
25563    input DRPCLK;
25564    input [15:0] DRPDI;
25565    input DRPEN;
25566    input DRPWE;
25567    input [21:0] MAXISCQTREADY;
25568    input [21:0] MAXISRCTREADY;
25569    input MCAPCLK;
25570    input MCAPPERST0B;
25571    input MCAPPERST1B;
25572    input MGMTRESETN;
25573    input MGMTSTICKYRESETN;
25574    input [5:0] MIREPLAYRAMERRCOR;
25575    input [5:0] MIREPLAYRAMERRUNCOR;
25576    input [127:0] MIREPLAYRAMREADDATA0;
25577    input [127:0] MIREPLAYRAMREADDATA1;
25578    input [11:0] MIRXCOMPLETIONRAMERRCOR;
25579    input [11:0] MIRXCOMPLETIONRAMERRUNCOR;
25580    input [143:0] MIRXCOMPLETIONRAMREADDATA0;
25581    input [143:0] MIRXCOMPLETIONRAMREADDATA1;
25582    input [5:0] MIRXPOSTEDREQUESTRAMERRCOR;
25583    input [5:0] MIRXPOSTEDREQUESTRAMERRUNCOR;
25584    input [143:0] MIRXPOSTEDREQUESTRAMREADDATA0;
25585    input [143:0] MIRXPOSTEDREQUESTRAMREADDATA1;
25586    input [1:0] PCIECOMPLDELIVERED;
25587    input [7:0] PCIECOMPLDELIVEREDTAG0;
25588    input [7:0] PCIECOMPLDELIVEREDTAG1;
25589    input [1:0] PCIECQNPREQ;
25590    input PCIECQNPUSERCREDITRCVD;
25591    input PCIECQPIPELINEEMPTY;
25592    input PCIEPOSTEDREQDELIVERED;
25593    input PIPECLK;
25594    input PIPECLKEN;
25595    input [5:0] PIPEEQFS;
25596    input [5:0] PIPEEQLF;
25597    input PIPERESETN;
25598    input [1:0] PIPERX00CHARISK;
25599    input [31:0] PIPERX00DATA;
25600    input PIPERX00DATAVALID;
25601    input PIPERX00ELECIDLE;
25602    input PIPERX00EQDONE;
25603    input PIPERX00EQLPADAPTDONE;
25604    input PIPERX00EQLPLFFSSEL;
25605    input [17:0] PIPERX00EQLPNEWTXCOEFFORPRESET;
25606    input PIPERX00PHYSTATUS;
25607    input [1:0] PIPERX00STARTBLOCK;
25608    input [2:0] PIPERX00STATUS;
25609    input [1:0] PIPERX00SYNCHEADER;
25610    input PIPERX00VALID;
25611    input [1:0] PIPERX01CHARISK;
25612    input [31:0] PIPERX01DATA;
25613    input PIPERX01DATAVALID;
25614    input PIPERX01ELECIDLE;
25615    input PIPERX01EQDONE;
25616    input PIPERX01EQLPADAPTDONE;
25617    input PIPERX01EQLPLFFSSEL;
25618    input [17:0] PIPERX01EQLPNEWTXCOEFFORPRESET;
25619    input PIPERX01PHYSTATUS;
25620    input [1:0] PIPERX01STARTBLOCK;
25621    input [2:0] PIPERX01STATUS;
25622    input [1:0] PIPERX01SYNCHEADER;
25623    input PIPERX01VALID;
25624    input [1:0] PIPERX02CHARISK;
25625    input [31:0] PIPERX02DATA;
25626    input PIPERX02DATAVALID;
25627    input PIPERX02ELECIDLE;
25628    input PIPERX02EQDONE;
25629    input PIPERX02EQLPADAPTDONE;
25630    input PIPERX02EQLPLFFSSEL;
25631    input [17:0] PIPERX02EQLPNEWTXCOEFFORPRESET;
25632    input PIPERX02PHYSTATUS;
25633    input [1:0] PIPERX02STARTBLOCK;
25634    input [2:0] PIPERX02STATUS;
25635    input [1:0] PIPERX02SYNCHEADER;
25636    input PIPERX02VALID;
25637    input [1:0] PIPERX03CHARISK;
25638    input [31:0] PIPERX03DATA;
25639    input PIPERX03DATAVALID;
25640    input PIPERX03ELECIDLE;
25641    input PIPERX03EQDONE;
25642    input PIPERX03EQLPADAPTDONE;
25643    input PIPERX03EQLPLFFSSEL;
25644    input [17:0] PIPERX03EQLPNEWTXCOEFFORPRESET;
25645    input PIPERX03PHYSTATUS;
25646    input [1:0] PIPERX03STARTBLOCK;
25647    input [2:0] PIPERX03STATUS;
25648    input [1:0] PIPERX03SYNCHEADER;
25649    input PIPERX03VALID;
25650    input [1:0] PIPERX04CHARISK;
25651    input [31:0] PIPERX04DATA;
25652    input PIPERX04DATAVALID;
25653    input PIPERX04ELECIDLE;
25654    input PIPERX04EQDONE;
25655    input PIPERX04EQLPADAPTDONE;
25656    input PIPERX04EQLPLFFSSEL;
25657    input [17:0] PIPERX04EQLPNEWTXCOEFFORPRESET;
25658    input PIPERX04PHYSTATUS;
25659    input [1:0] PIPERX04STARTBLOCK;
25660    input [2:0] PIPERX04STATUS;
25661    input [1:0] PIPERX04SYNCHEADER;
25662    input PIPERX04VALID;
25663    input [1:0] PIPERX05CHARISK;
25664    input [31:0] PIPERX05DATA;
25665    input PIPERX05DATAVALID;
25666    input PIPERX05ELECIDLE;
25667    input PIPERX05EQDONE;
25668    input PIPERX05EQLPADAPTDONE;
25669    input PIPERX05EQLPLFFSSEL;
25670    input [17:0] PIPERX05EQLPNEWTXCOEFFORPRESET;
25671    input PIPERX05PHYSTATUS;
25672    input [1:0] PIPERX05STARTBLOCK;
25673    input [2:0] PIPERX05STATUS;
25674    input [1:0] PIPERX05SYNCHEADER;
25675    input PIPERX05VALID;
25676    input [1:0] PIPERX06CHARISK;
25677    input [31:0] PIPERX06DATA;
25678    input PIPERX06DATAVALID;
25679    input PIPERX06ELECIDLE;
25680    input PIPERX06EQDONE;
25681    input PIPERX06EQLPADAPTDONE;
25682    input PIPERX06EQLPLFFSSEL;
25683    input [17:0] PIPERX06EQLPNEWTXCOEFFORPRESET;
25684    input PIPERX06PHYSTATUS;
25685    input [1:0] PIPERX06STARTBLOCK;
25686    input [2:0] PIPERX06STATUS;
25687    input [1:0] PIPERX06SYNCHEADER;
25688    input PIPERX06VALID;
25689    input [1:0] PIPERX07CHARISK;
25690    input [31:0] PIPERX07DATA;
25691    input PIPERX07DATAVALID;
25692    input PIPERX07ELECIDLE;
25693    input PIPERX07EQDONE;
25694    input PIPERX07EQLPADAPTDONE;
25695    input PIPERX07EQLPLFFSSEL;
25696    input [17:0] PIPERX07EQLPNEWTXCOEFFORPRESET;
25697    input PIPERX07PHYSTATUS;
25698    input [1:0] PIPERX07STARTBLOCK;
25699    input [2:0] PIPERX07STATUS;
25700    input [1:0] PIPERX07SYNCHEADER;
25701    input PIPERX07VALID;
25702    input [1:0] PIPERX08CHARISK;
25703    input [31:0] PIPERX08DATA;
25704    input PIPERX08DATAVALID;
25705    input PIPERX08ELECIDLE;
25706    input PIPERX08EQDONE;
25707    input PIPERX08EQLPADAPTDONE;
25708    input PIPERX08EQLPLFFSSEL;
25709    input [17:0] PIPERX08EQLPNEWTXCOEFFORPRESET;
25710    input PIPERX08PHYSTATUS;
25711    input [1:0] PIPERX08STARTBLOCK;
25712    input [2:0] PIPERX08STATUS;
25713    input [1:0] PIPERX08SYNCHEADER;
25714    input PIPERX08VALID;
25715    input [1:0] PIPERX09CHARISK;
25716    input [31:0] PIPERX09DATA;
25717    input PIPERX09DATAVALID;
25718    input PIPERX09ELECIDLE;
25719    input PIPERX09EQDONE;
25720    input PIPERX09EQLPADAPTDONE;
25721    input PIPERX09EQLPLFFSSEL;
25722    input [17:0] PIPERX09EQLPNEWTXCOEFFORPRESET;
25723    input PIPERX09PHYSTATUS;
25724    input [1:0] PIPERX09STARTBLOCK;
25725    input [2:0] PIPERX09STATUS;
25726    input [1:0] PIPERX09SYNCHEADER;
25727    input PIPERX09VALID;
25728    input [1:0] PIPERX10CHARISK;
25729    input [31:0] PIPERX10DATA;
25730    input PIPERX10DATAVALID;
25731    input PIPERX10ELECIDLE;
25732    input PIPERX10EQDONE;
25733    input PIPERX10EQLPADAPTDONE;
25734    input PIPERX10EQLPLFFSSEL;
25735    input [17:0] PIPERX10EQLPNEWTXCOEFFORPRESET;
25736    input PIPERX10PHYSTATUS;
25737    input [1:0] PIPERX10STARTBLOCK;
25738    input [2:0] PIPERX10STATUS;
25739    input [1:0] PIPERX10SYNCHEADER;
25740    input PIPERX10VALID;
25741    input [1:0] PIPERX11CHARISK;
25742    input [31:0] PIPERX11DATA;
25743    input PIPERX11DATAVALID;
25744    input PIPERX11ELECIDLE;
25745    input PIPERX11EQDONE;
25746    input PIPERX11EQLPADAPTDONE;
25747    input PIPERX11EQLPLFFSSEL;
25748    input [17:0] PIPERX11EQLPNEWTXCOEFFORPRESET;
25749    input PIPERX11PHYSTATUS;
25750    input [1:0] PIPERX11STARTBLOCK;
25751    input [2:0] PIPERX11STATUS;
25752    input [1:0] PIPERX11SYNCHEADER;
25753    input PIPERX11VALID;
25754    input [1:0] PIPERX12CHARISK;
25755    input [31:0] PIPERX12DATA;
25756    input PIPERX12DATAVALID;
25757    input PIPERX12ELECIDLE;
25758    input PIPERX12EQDONE;
25759    input PIPERX12EQLPADAPTDONE;
25760    input PIPERX12EQLPLFFSSEL;
25761    input [17:0] PIPERX12EQLPNEWTXCOEFFORPRESET;
25762    input PIPERX12PHYSTATUS;
25763    input [1:0] PIPERX12STARTBLOCK;
25764    input [2:0] PIPERX12STATUS;
25765    input [1:0] PIPERX12SYNCHEADER;
25766    input PIPERX12VALID;
25767    input [1:0] PIPERX13CHARISK;
25768    input [31:0] PIPERX13DATA;
25769    input PIPERX13DATAVALID;
25770    input PIPERX13ELECIDLE;
25771    input PIPERX13EQDONE;
25772    input PIPERX13EQLPADAPTDONE;
25773    input PIPERX13EQLPLFFSSEL;
25774    input [17:0] PIPERX13EQLPNEWTXCOEFFORPRESET;
25775    input PIPERX13PHYSTATUS;
25776    input [1:0] PIPERX13STARTBLOCK;
25777    input [2:0] PIPERX13STATUS;
25778    input [1:0] PIPERX13SYNCHEADER;
25779    input PIPERX13VALID;
25780    input [1:0] PIPERX14CHARISK;
25781    input [31:0] PIPERX14DATA;
25782    input PIPERX14DATAVALID;
25783    input PIPERX14ELECIDLE;
25784    input PIPERX14EQDONE;
25785    input PIPERX14EQLPADAPTDONE;
25786    input PIPERX14EQLPLFFSSEL;
25787    input [17:0] PIPERX14EQLPNEWTXCOEFFORPRESET;
25788    input PIPERX14PHYSTATUS;
25789    input [1:0] PIPERX14STARTBLOCK;
25790    input [2:0] PIPERX14STATUS;
25791    input [1:0] PIPERX14SYNCHEADER;
25792    input PIPERX14VALID;
25793    input [1:0] PIPERX15CHARISK;
25794    input [31:0] PIPERX15DATA;
25795    input PIPERX15DATAVALID;
25796    input PIPERX15ELECIDLE;
25797    input PIPERX15EQDONE;
25798    input PIPERX15EQLPADAPTDONE;
25799    input PIPERX15EQLPLFFSSEL;
25800    input [17:0] PIPERX15EQLPNEWTXCOEFFORPRESET;
25801    input PIPERX15PHYSTATUS;
25802    input [1:0] PIPERX15STARTBLOCK;
25803    input [2:0] PIPERX15STATUS;
25804    input [1:0] PIPERX15SYNCHEADER;
25805    input PIPERX15VALID;
25806    input [17:0] PIPETX00EQCOEFF;
25807    input PIPETX00EQDONE;
25808    input [17:0] PIPETX01EQCOEFF;
25809    input PIPETX01EQDONE;
25810    input [17:0] PIPETX02EQCOEFF;
25811    input PIPETX02EQDONE;
25812    input [17:0] PIPETX03EQCOEFF;
25813    input PIPETX03EQDONE;
25814    input [17:0] PIPETX04EQCOEFF;
25815    input PIPETX04EQDONE;
25816    input [17:0] PIPETX05EQCOEFF;
25817    input PIPETX05EQDONE;
25818    input [17:0] PIPETX06EQCOEFF;
25819    input PIPETX06EQDONE;
25820    input [17:0] PIPETX07EQCOEFF;
25821    input PIPETX07EQDONE;
25822    input [17:0] PIPETX08EQCOEFF;
25823    input PIPETX08EQDONE;
25824    input [17:0] PIPETX09EQCOEFF;
25825    input PIPETX09EQDONE;
25826    input [17:0] PIPETX10EQCOEFF;
25827    input PIPETX10EQDONE;
25828    input [17:0] PIPETX11EQCOEFF;
25829    input PIPETX11EQDONE;
25830    input [17:0] PIPETX12EQCOEFF;
25831    input PIPETX12EQDONE;
25832    input [17:0] PIPETX13EQCOEFF;
25833    input PIPETX13EQDONE;
25834    input [17:0] PIPETX14EQCOEFF;
25835    input PIPETX14EQDONE;
25836    input [17:0] PIPETX15EQCOEFF;
25837    input PIPETX15EQDONE;
25838    input PLEQRESETEIEOSCOUNT;
25839    input PLGEN2UPSTREAMPREFERDEEMPH;
25840    input PLGEN34REDOEQSPEED;
25841    input PLGEN34REDOEQUALIZATION;
25842    input RESETN;
25843    input [255:0] SAXISCCIXTXTDATA;
25844    input [45:0] SAXISCCIXTXTUSER;
25845    input SAXISCCIXTXTVALID;
25846    input [255:0] SAXISCCTDATA;
25847    input [7:0] SAXISCCTKEEP;
25848    input SAXISCCTLAST;
25849    input [32:0] SAXISCCTUSER;
25850    input SAXISCCTVALID;
25851    input [255:0] SAXISRQTDATA;
25852    input [7:0] SAXISRQTKEEP;
25853    input SAXISRQTLAST;
25854    input [61:0] SAXISRQTUSER;
25855    input SAXISRQTVALID;
25856    input USERCLK;
25857    input USERCLK2;
25858    input USERCLKEN;
25859    input [31:0] USERSPAREIN;
25860endmodule
25861
25862module EMAC (...);
25863    parameter EMAC0_MODE = "RGMII";
25864    parameter EMAC1_MODE = "RGMII";
25865    output DCRHOSTDONEIR;
25866    output EMAC0CLIENTANINTERRUPT;
25867    output EMAC0CLIENTRXBADFRAME;
25868    output EMAC0CLIENTRXCLIENTCLKOUT;
25869    output EMAC0CLIENTRXDVLD;
25870    output EMAC0CLIENTRXDVLDMSW;
25871    output EMAC0CLIENTRXDVREG6;
25872    output EMAC0CLIENTRXFRAMEDROP;
25873    output EMAC0CLIENTRXGOODFRAME;
25874    output EMAC0CLIENTRXSTATSBYTEVLD;
25875    output EMAC0CLIENTRXSTATSVLD;
25876    output EMAC0CLIENTTXACK;
25877    output EMAC0CLIENTTXCLIENTCLKOUT;
25878    output EMAC0CLIENTTXCOLLISION;
25879    output EMAC0CLIENTTXGMIIMIICLKOUT;
25880    output EMAC0CLIENTTXRETRANSMIT;
25881    output EMAC0CLIENTTXSTATS;
25882    output EMAC0CLIENTTXSTATSBYTEVLD;
25883    output EMAC0CLIENTTXSTATSVLD;
25884    output EMAC0PHYENCOMMAALIGN;
25885    output EMAC0PHYLOOPBACKMSB;
25886    output EMAC0PHYMCLKOUT;
25887    output EMAC0PHYMDOUT;
25888    output EMAC0PHYMDTRI;
25889    output EMAC0PHYMGTRXRESET;
25890    output EMAC0PHYMGTTXRESET;
25891    output EMAC0PHYPOWERDOWN;
25892    output EMAC0PHYSYNCACQSTATUS;
25893    output EMAC0PHYTXCHARDISPMODE;
25894    output EMAC0PHYTXCHARDISPVAL;
25895    output EMAC0PHYTXCHARISK;
25896    output EMAC0PHYTXCLK;
25897    output EMAC0PHYTXEN;
25898    output EMAC0PHYTXER;
25899    output EMAC1CLIENTANINTERRUPT;
25900    output EMAC1CLIENTRXBADFRAME;
25901    output EMAC1CLIENTRXCLIENTCLKOUT;
25902    output EMAC1CLIENTRXDVLD;
25903    output EMAC1CLIENTRXDVLDMSW;
25904    output EMAC1CLIENTRXDVREG6;
25905    output EMAC1CLIENTRXFRAMEDROP;
25906    output EMAC1CLIENTRXGOODFRAME;
25907    output EMAC1CLIENTRXSTATSBYTEVLD;
25908    output EMAC1CLIENTRXSTATSVLD;
25909    output EMAC1CLIENTTXACK;
25910    output EMAC1CLIENTTXCLIENTCLKOUT;
25911    output EMAC1CLIENTTXCOLLISION;
25912    output EMAC1CLIENTTXGMIIMIICLKOUT;
25913    output EMAC1CLIENTTXRETRANSMIT;
25914    output EMAC1CLIENTTXSTATS;
25915    output EMAC1CLIENTTXSTATSBYTEVLD;
25916    output EMAC1CLIENTTXSTATSVLD;
25917    output EMAC1PHYENCOMMAALIGN;
25918    output EMAC1PHYLOOPBACKMSB;
25919    output EMAC1PHYMCLKOUT;
25920    output EMAC1PHYMDOUT;
25921    output EMAC1PHYMDTRI;
25922    output EMAC1PHYMGTRXRESET;
25923    output EMAC1PHYMGTTXRESET;
25924    output EMAC1PHYPOWERDOWN;
25925    output EMAC1PHYSYNCACQSTATUS;
25926    output EMAC1PHYTXCHARDISPMODE;
25927    output EMAC1PHYTXCHARDISPVAL;
25928    output EMAC1PHYTXCHARISK;
25929    output EMAC1PHYTXCLK;
25930    output EMAC1PHYTXEN;
25931    output EMAC1PHYTXER;
25932    output EMACDCRACK;
25933    output HOSTMIIMRDY;
25934    output [0:31] EMACDCRDBUS;
25935    output [15:0] EMAC0CLIENTRXD;
25936    output [15:0] EMAC1CLIENTRXD;
25937    output [31:0] HOSTRDDATA;
25938    output [6:0] EMAC0CLIENTRXSTATS;
25939    output [6:0] EMAC1CLIENTRXSTATS;
25940    output [7:0] EMAC0PHYTXD;
25941    output [7:0] EMAC1PHYTXD;
25942    input CLIENTEMAC0DCMLOCKED;
25943    input CLIENTEMAC0PAUSEREQ;
25944    input CLIENTEMAC0RXCLIENTCLKIN;
25945    input CLIENTEMAC0TXCLIENTCLKIN;
25946    input CLIENTEMAC0TXDVLD;
25947    input CLIENTEMAC0TXDVLDMSW;
25948    input CLIENTEMAC0TXFIRSTBYTE;
25949    input CLIENTEMAC0TXGMIIMIICLKIN;
25950    input CLIENTEMAC0TXUNDERRUN;
25951    input CLIENTEMAC1DCMLOCKED;
25952    input CLIENTEMAC1PAUSEREQ;
25953    input CLIENTEMAC1RXCLIENTCLKIN;
25954    input CLIENTEMAC1TXCLIENTCLKIN;
25955    input CLIENTEMAC1TXDVLD;
25956    input CLIENTEMAC1TXDVLDMSW;
25957    input CLIENTEMAC1TXFIRSTBYTE;
25958    input CLIENTEMAC1TXGMIIMIICLKIN;
25959    input CLIENTEMAC1TXUNDERRUN;
25960    input DCREMACCLK;
25961    input DCREMACENABLE;
25962    input DCREMACREAD;
25963    input DCREMACWRITE;
25964    input HOSTCLK;
25965    input HOSTEMAC1SEL;
25966    input HOSTMIIMSEL;
25967    input HOSTREQ;
25968    input PHYEMAC0COL;
25969    input PHYEMAC0CRS;
25970    input PHYEMAC0GTXCLK;
25971    input PHYEMAC0MCLKIN;
25972    input PHYEMAC0MDIN;
25973    input PHYEMAC0MIITXCLK;
25974    input PHYEMAC0RXBUFERR;
25975    input PHYEMAC0RXCHARISCOMMA;
25976    input PHYEMAC0RXCHARISK;
25977    input PHYEMAC0RXCHECKINGCRC;
25978    input PHYEMAC0RXCLK;
25979    input PHYEMAC0RXCOMMADET;
25980    input PHYEMAC0RXDISPERR;
25981    input PHYEMAC0RXDV;
25982    input PHYEMAC0RXER;
25983    input PHYEMAC0RXNOTINTABLE;
25984    input PHYEMAC0RXRUNDISP;
25985    input PHYEMAC0SIGNALDET;
25986    input PHYEMAC0TXBUFERR;
25987    input PHYEMAC1COL;
25988    input PHYEMAC1CRS;
25989    input PHYEMAC1GTXCLK;
25990    input PHYEMAC1MCLKIN;
25991    input PHYEMAC1MDIN;
25992    input PHYEMAC1MIITXCLK;
25993    input PHYEMAC1RXBUFERR;
25994    input PHYEMAC1RXCHARISCOMMA;
25995    input PHYEMAC1RXCHARISK;
25996    input PHYEMAC1RXCHECKINGCRC;
25997    input PHYEMAC1RXCLK;
25998    input PHYEMAC1RXCOMMADET;
25999    input PHYEMAC1RXDISPERR;
26000    input PHYEMAC1RXDV;
26001    input PHYEMAC1RXER;
26002    input PHYEMAC1RXNOTINTABLE;
26003    input PHYEMAC1RXRUNDISP;
26004    input PHYEMAC1SIGNALDET;
26005    input PHYEMAC1TXBUFERR;
26006    input RESET;
26007    input [0:31] DCREMACDBUS;
26008    input [15:0] CLIENTEMAC0PAUSEVAL;
26009    input [15:0] CLIENTEMAC0TXD;
26010    input [15:0] CLIENTEMAC1PAUSEVAL;
26011    input [15:0] CLIENTEMAC1TXD;
26012    input [1:0] HOSTOPCODE;
26013    input [1:0] PHYEMAC0RXBUFSTATUS;
26014    input [1:0] PHYEMAC0RXLOSSOFSYNC;
26015    input [1:0] PHYEMAC1RXBUFSTATUS;
26016    input [1:0] PHYEMAC1RXLOSSOFSYNC;
26017    input [2:0] PHYEMAC0RXCLKCORCNT;
26018    input [2:0] PHYEMAC1RXCLKCORCNT;
26019    input [31:0] HOSTWRDATA;
26020    input [47:0] TIEEMAC0UNICASTADDR;
26021    input [47:0] TIEEMAC1UNICASTADDR;
26022    input [4:0] PHYEMAC0PHYAD;
26023    input [4:0] PHYEMAC1PHYAD;
26024    input [79:0] TIEEMAC0CONFIGVEC;
26025    input [79:0] TIEEMAC1CONFIGVEC;
26026    input [7:0] CLIENTEMAC0TXIFGDELAY;
26027    input [7:0] CLIENTEMAC1TXIFGDELAY;
26028    input [7:0] PHYEMAC0RXD;
26029    input [7:0] PHYEMAC1RXD;
26030    input [8:9] DCREMACABUS;
26031    input [9:0] HOSTADDR;
26032endmodule
26033
26034module TEMAC (...);
26035    parameter EMAC0_1000BASEX_ENABLE = "FALSE";
26036    parameter EMAC0_ADDRFILTER_ENABLE = "FALSE";
26037    parameter EMAC0_BYTEPHY = "FALSE";
26038    parameter EMAC0_CONFIGVEC_79 = "FALSE";
26039    parameter EMAC0_GTLOOPBACK = "FALSE";
26040    parameter EMAC0_HOST_ENABLE = "FALSE";
26041    parameter EMAC0_LTCHECK_DISABLE = "FALSE";
26042    parameter EMAC0_MDIO_ENABLE = "FALSE";
26043    parameter EMAC0_PHYINITAUTONEG_ENABLE = "FALSE";
26044    parameter EMAC0_PHYISOLATE = "FALSE";
26045    parameter EMAC0_PHYLOOPBACKMSB = "FALSE";
26046    parameter EMAC0_PHYPOWERDOWN = "FALSE";
26047    parameter EMAC0_PHYRESET = "FALSE";
26048    parameter EMAC0_RGMII_ENABLE = "FALSE";
26049    parameter EMAC0_RX16BITCLIENT_ENABLE = "FALSE";
26050    parameter EMAC0_RXFLOWCTRL_ENABLE = "FALSE";
26051    parameter EMAC0_RXHALFDUPLEX = "FALSE";
26052    parameter EMAC0_RXINBANDFCS_ENABLE = "FALSE";
26053    parameter EMAC0_RXJUMBOFRAME_ENABLE = "FALSE";
26054    parameter EMAC0_RXRESET = "FALSE";
26055    parameter EMAC0_RXVLAN_ENABLE = "FALSE";
26056    parameter EMAC0_RX_ENABLE = "FALSE";
26057    parameter EMAC0_SGMII_ENABLE = "FALSE";
26058    parameter EMAC0_SPEED_LSB = "FALSE";
26059    parameter EMAC0_SPEED_MSB = "FALSE";
26060    parameter EMAC0_TX16BITCLIENT_ENABLE = "FALSE";
26061    parameter EMAC0_TXFLOWCTRL_ENABLE = "FALSE";
26062    parameter EMAC0_TXHALFDUPLEX = "FALSE";
26063    parameter EMAC0_TXIFGADJUST_ENABLE = "FALSE";
26064    parameter EMAC0_TXINBANDFCS_ENABLE = "FALSE";
26065    parameter EMAC0_TXJUMBOFRAME_ENABLE = "FALSE";
26066    parameter EMAC0_TXRESET = "FALSE";
26067    parameter EMAC0_TXVLAN_ENABLE = "FALSE";
26068    parameter EMAC0_TX_ENABLE = "FALSE";
26069    parameter EMAC0_UNIDIRECTION_ENABLE = "FALSE";
26070    parameter EMAC0_USECLKEN = "FALSE";
26071    parameter EMAC1_1000BASEX_ENABLE = "FALSE";
26072    parameter EMAC1_ADDRFILTER_ENABLE = "FALSE";
26073    parameter EMAC1_BYTEPHY = "FALSE";
26074    parameter EMAC1_CONFIGVEC_79 = "FALSE";
26075    parameter EMAC1_GTLOOPBACK = "FALSE";
26076    parameter EMAC1_HOST_ENABLE = "FALSE";
26077    parameter EMAC1_LTCHECK_DISABLE = "FALSE";
26078    parameter EMAC1_MDIO_ENABLE = "FALSE";
26079    parameter EMAC1_PHYINITAUTONEG_ENABLE = "FALSE";
26080    parameter EMAC1_PHYISOLATE = "FALSE";
26081    parameter EMAC1_PHYLOOPBACKMSB = "FALSE";
26082    parameter EMAC1_PHYPOWERDOWN = "FALSE";
26083    parameter EMAC1_PHYRESET = "FALSE";
26084    parameter EMAC1_RGMII_ENABLE = "FALSE";
26085    parameter EMAC1_RX16BITCLIENT_ENABLE = "FALSE";
26086    parameter EMAC1_RXFLOWCTRL_ENABLE = "FALSE";
26087    parameter EMAC1_RXHALFDUPLEX = "FALSE";
26088    parameter EMAC1_RXINBANDFCS_ENABLE = "FALSE";
26089    parameter EMAC1_RXJUMBOFRAME_ENABLE = "FALSE";
26090    parameter EMAC1_RXRESET = "FALSE";
26091    parameter EMAC1_RXVLAN_ENABLE = "FALSE";
26092    parameter EMAC1_RX_ENABLE = "FALSE";
26093    parameter EMAC1_SGMII_ENABLE = "FALSE";
26094    parameter EMAC1_SPEED_LSB = "FALSE";
26095    parameter EMAC1_SPEED_MSB = "FALSE";
26096    parameter EMAC1_TX16BITCLIENT_ENABLE = "FALSE";
26097    parameter EMAC1_TXFLOWCTRL_ENABLE = "FALSE";
26098    parameter EMAC1_TXHALFDUPLEX = "FALSE";
26099    parameter EMAC1_TXIFGADJUST_ENABLE = "FALSE";
26100    parameter EMAC1_TXINBANDFCS_ENABLE = "FALSE";
26101    parameter EMAC1_TXJUMBOFRAME_ENABLE = "FALSE";
26102    parameter EMAC1_TXRESET = "FALSE";
26103    parameter EMAC1_TXVLAN_ENABLE = "FALSE";
26104    parameter EMAC1_TX_ENABLE = "FALSE";
26105    parameter EMAC1_UNIDIRECTION_ENABLE = "FALSE";
26106    parameter EMAC1_USECLKEN = "FALSE";
26107    parameter [0:7] EMAC0_DCRBASEADDR = 8'h00;
26108    parameter [0:7] EMAC1_DCRBASEADDR = 8'h00;
26109    parameter [47:0] EMAC0_PAUSEADDR = 48'h000000000000;
26110    parameter [47:0] EMAC0_UNICASTADDR = 48'h000000000000;
26111    parameter [47:0] EMAC1_PAUSEADDR = 48'h000000000000;
26112    parameter [47:0] EMAC1_UNICASTADDR = 48'h000000000000;
26113    parameter [8:0] EMAC0_LINKTIMERVAL = 9'h000;
26114    parameter [8:0] EMAC1_LINKTIMERVAL = 9'h000;
26115    output DCRHOSTDONEIR;
26116    output EMAC0CLIENTANINTERRUPT;
26117    output EMAC0CLIENTRXBADFRAME;
26118    output EMAC0CLIENTRXCLIENTCLKOUT;
26119    output EMAC0CLIENTRXDVLD;
26120    output EMAC0CLIENTRXDVLDMSW;
26121    output EMAC0CLIENTRXFRAMEDROP;
26122    output EMAC0CLIENTRXGOODFRAME;
26123    output EMAC0CLIENTRXSTATSBYTEVLD;
26124    output EMAC0CLIENTRXSTATSVLD;
26125    output EMAC0CLIENTTXACK;
26126    output EMAC0CLIENTTXCLIENTCLKOUT;
26127    output EMAC0CLIENTTXCOLLISION;
26128    output EMAC0CLIENTTXRETRANSMIT;
26129    output EMAC0CLIENTTXSTATS;
26130    output EMAC0CLIENTTXSTATSBYTEVLD;
26131    output EMAC0CLIENTTXSTATSVLD;
26132    output EMAC0PHYENCOMMAALIGN;
26133    output EMAC0PHYLOOPBACKMSB;
26134    output EMAC0PHYMCLKOUT;
26135    output EMAC0PHYMDOUT;
26136    output EMAC0PHYMDTRI;
26137    output EMAC0PHYMGTRXRESET;
26138    output EMAC0PHYMGTTXRESET;
26139    output EMAC0PHYPOWERDOWN;
26140    output EMAC0PHYSYNCACQSTATUS;
26141    output EMAC0PHYTXCHARDISPMODE;
26142    output EMAC0PHYTXCHARDISPVAL;
26143    output EMAC0PHYTXCHARISK;
26144    output EMAC0PHYTXCLK;
26145    output EMAC0PHYTXEN;
26146    output EMAC0PHYTXER;
26147    output EMAC0PHYTXGMIIMIICLKOUT;
26148    output EMAC0SPEEDIS10100;
26149    output EMAC1CLIENTANINTERRUPT;
26150    output EMAC1CLIENTRXBADFRAME;
26151    output EMAC1CLIENTRXCLIENTCLKOUT;
26152    output EMAC1CLIENTRXDVLD;
26153    output EMAC1CLIENTRXDVLDMSW;
26154    output EMAC1CLIENTRXFRAMEDROP;
26155    output EMAC1CLIENTRXGOODFRAME;
26156    output EMAC1CLIENTRXSTATSBYTEVLD;
26157    output EMAC1CLIENTRXSTATSVLD;
26158    output EMAC1CLIENTTXACK;
26159    output EMAC1CLIENTTXCLIENTCLKOUT;
26160    output EMAC1CLIENTTXCOLLISION;
26161    output EMAC1CLIENTTXRETRANSMIT;
26162    output EMAC1CLIENTTXSTATS;
26163    output EMAC1CLIENTTXSTATSBYTEVLD;
26164    output EMAC1CLIENTTXSTATSVLD;
26165    output EMAC1PHYENCOMMAALIGN;
26166    output EMAC1PHYLOOPBACKMSB;
26167    output EMAC1PHYMCLKOUT;
26168    output EMAC1PHYMDOUT;
26169    output EMAC1PHYMDTRI;
26170    output EMAC1PHYMGTRXRESET;
26171    output EMAC1PHYMGTTXRESET;
26172    output EMAC1PHYPOWERDOWN;
26173    output EMAC1PHYSYNCACQSTATUS;
26174    output EMAC1PHYTXCHARDISPMODE;
26175    output EMAC1PHYTXCHARDISPVAL;
26176    output EMAC1PHYTXCHARISK;
26177    output EMAC1PHYTXCLK;
26178    output EMAC1PHYTXEN;
26179    output EMAC1PHYTXER;
26180    output EMAC1PHYTXGMIIMIICLKOUT;
26181    output EMAC1SPEEDIS10100;
26182    output EMACDCRACK;
26183    output HOSTMIIMRDY;
26184    output [0:31] EMACDCRDBUS;
26185    output [15:0] EMAC0CLIENTRXD;
26186    output [15:0] EMAC1CLIENTRXD;
26187    output [31:0] HOSTRDDATA;
26188    output [6:0] EMAC0CLIENTRXSTATS;
26189    output [6:0] EMAC1CLIENTRXSTATS;
26190    output [7:0] EMAC0PHYTXD;
26191    output [7:0] EMAC1PHYTXD;
26192    input CLIENTEMAC0DCMLOCKED;
26193    input CLIENTEMAC0PAUSEREQ;
26194    input CLIENTEMAC0RXCLIENTCLKIN;
26195    input CLIENTEMAC0TXCLIENTCLKIN;
26196    input CLIENTEMAC0TXDVLD;
26197    input CLIENTEMAC0TXDVLDMSW;
26198    input CLIENTEMAC0TXFIRSTBYTE;
26199    input CLIENTEMAC0TXUNDERRUN;
26200    input CLIENTEMAC1DCMLOCKED;
26201    input CLIENTEMAC1PAUSEREQ;
26202    input CLIENTEMAC1RXCLIENTCLKIN;
26203    input CLIENTEMAC1TXCLIENTCLKIN;
26204    input CLIENTEMAC1TXDVLD;
26205    input CLIENTEMAC1TXDVLDMSW;
26206    input CLIENTEMAC1TXFIRSTBYTE;
26207    input CLIENTEMAC1TXUNDERRUN;
26208    input DCREMACCLK;
26209    input DCREMACENABLE;
26210    input DCREMACREAD;
26211    input DCREMACWRITE;
26212    input HOSTCLK;
26213    input HOSTEMAC1SEL;
26214    input HOSTMIIMSEL;
26215    input HOSTREQ;
26216    input PHYEMAC0COL;
26217    input PHYEMAC0CRS;
26218    input PHYEMAC0GTXCLK;
26219    input PHYEMAC0MCLKIN;
26220    input PHYEMAC0MDIN;
26221    input PHYEMAC0MIITXCLK;
26222    input PHYEMAC0RXBUFERR;
26223    input PHYEMAC0RXCHARISCOMMA;
26224    input PHYEMAC0RXCHARISK;
26225    input PHYEMAC0RXCHECKINGCRC;
26226    input PHYEMAC0RXCLK;
26227    input PHYEMAC0RXCOMMADET;
26228    input PHYEMAC0RXDISPERR;
26229    input PHYEMAC0RXDV;
26230    input PHYEMAC0RXER;
26231    input PHYEMAC0RXNOTINTABLE;
26232    input PHYEMAC0RXRUNDISP;
26233    input PHYEMAC0SIGNALDET;
26234    input PHYEMAC0TXBUFERR;
26235    input PHYEMAC0TXGMIIMIICLKIN;
26236    input PHYEMAC1COL;
26237    input PHYEMAC1CRS;
26238    input PHYEMAC1GTXCLK;
26239    input PHYEMAC1MCLKIN;
26240    input PHYEMAC1MDIN;
26241    input PHYEMAC1MIITXCLK;
26242    input PHYEMAC1RXBUFERR;
26243    input PHYEMAC1RXCHARISCOMMA;
26244    input PHYEMAC1RXCHARISK;
26245    input PHYEMAC1RXCHECKINGCRC;
26246    input PHYEMAC1RXCLK;
26247    input PHYEMAC1RXCOMMADET;
26248    input PHYEMAC1RXDISPERR;
26249    input PHYEMAC1RXDV;
26250    input PHYEMAC1RXER;
26251    input PHYEMAC1RXNOTINTABLE;
26252    input PHYEMAC1RXRUNDISP;
26253    input PHYEMAC1SIGNALDET;
26254    input PHYEMAC1TXBUFERR;
26255    input PHYEMAC1TXGMIIMIICLKIN;
26256    input RESET;
26257    input [0:31] DCREMACDBUS;
26258    input [0:9] DCREMACABUS;
26259    input [15:0] CLIENTEMAC0PAUSEVAL;
26260    input [15:0] CLIENTEMAC0TXD;
26261    input [15:0] CLIENTEMAC1PAUSEVAL;
26262    input [15:0] CLIENTEMAC1TXD;
26263    input [1:0] HOSTOPCODE;
26264    input [1:0] PHYEMAC0RXBUFSTATUS;
26265    input [1:0] PHYEMAC0RXLOSSOFSYNC;
26266    input [1:0] PHYEMAC1RXBUFSTATUS;
26267    input [1:0] PHYEMAC1RXLOSSOFSYNC;
26268    input [2:0] PHYEMAC0RXCLKCORCNT;
26269    input [2:0] PHYEMAC1RXCLKCORCNT;
26270    input [31:0] HOSTWRDATA;
26271    input [4:0] PHYEMAC0PHYAD;
26272    input [4:0] PHYEMAC1PHYAD;
26273    input [7:0] CLIENTEMAC0TXIFGDELAY;
26274    input [7:0] CLIENTEMAC1TXIFGDELAY;
26275    input [7:0] PHYEMAC0RXD;
26276    input [7:0] PHYEMAC1RXD;
26277    input [9:0] HOSTADDR;
26278endmodule
26279
26280module TEMAC_SINGLE (...);
26281    parameter EMAC_1000BASEX_ENABLE = "FALSE";
26282    parameter EMAC_ADDRFILTER_ENABLE = "FALSE";
26283    parameter EMAC_BYTEPHY = "FALSE";
26284    parameter EMAC_CTRLLENCHECK_DISABLE = "FALSE";
26285    parameter [0:7] EMAC_DCRBASEADDR = 8'h00;
26286    parameter EMAC_GTLOOPBACK = "FALSE";
26287    parameter EMAC_HOST_ENABLE = "FALSE";
26288    parameter [8:0] EMAC_LINKTIMERVAL = 9'h000;
26289    parameter EMAC_LTCHECK_DISABLE = "FALSE";
26290    parameter EMAC_MDIO_ENABLE = "FALSE";
26291    parameter EMAC_MDIO_IGNORE_PHYADZERO = "FALSE";
26292    parameter [47:0] EMAC_PAUSEADDR = 48'h000000000000;
26293    parameter EMAC_PHYINITAUTONEG_ENABLE = "FALSE";
26294    parameter EMAC_PHYISOLATE = "FALSE";
26295    parameter EMAC_PHYLOOPBACKMSB = "FALSE";
26296    parameter EMAC_PHYPOWERDOWN = "FALSE";
26297    parameter EMAC_PHYRESET = "FALSE";
26298    parameter EMAC_RGMII_ENABLE = "FALSE";
26299    parameter EMAC_RX16BITCLIENT_ENABLE = "FALSE";
26300    parameter EMAC_RXFLOWCTRL_ENABLE = "FALSE";
26301    parameter EMAC_RXHALFDUPLEX = "FALSE";
26302    parameter EMAC_RXINBANDFCS_ENABLE = "FALSE";
26303    parameter EMAC_RXJUMBOFRAME_ENABLE = "FALSE";
26304    parameter EMAC_RXRESET = "FALSE";
26305    parameter EMAC_RXVLAN_ENABLE = "FALSE";
26306    parameter EMAC_RX_ENABLE = "TRUE";
26307    parameter EMAC_SGMII_ENABLE = "FALSE";
26308    parameter EMAC_SPEED_LSB = "FALSE";
26309    parameter EMAC_SPEED_MSB = "FALSE";
26310    parameter EMAC_TX16BITCLIENT_ENABLE = "FALSE";
26311    parameter EMAC_TXFLOWCTRL_ENABLE = "FALSE";
26312    parameter EMAC_TXHALFDUPLEX = "FALSE";
26313    parameter EMAC_TXIFGADJUST_ENABLE = "FALSE";
26314    parameter EMAC_TXINBANDFCS_ENABLE = "FALSE";
26315    parameter EMAC_TXJUMBOFRAME_ENABLE = "FALSE";
26316    parameter EMAC_TXRESET = "FALSE";
26317    parameter EMAC_TXVLAN_ENABLE = "FALSE";
26318    parameter EMAC_TX_ENABLE = "TRUE";
26319    parameter [47:0] EMAC_UNICASTADDR = 48'h000000000000;
26320    parameter EMAC_UNIDIRECTION_ENABLE = "FALSE";
26321    parameter EMAC_USECLKEN = "FALSE";
26322    parameter SIM_VERSION = "1.0";
26323    output DCRHOSTDONEIR;
26324    output EMACCLIENTANINTERRUPT;
26325    output EMACCLIENTRXBADFRAME;
26326    output EMACCLIENTRXCLIENTCLKOUT;
26327    output EMACCLIENTRXDVLD;
26328    output EMACCLIENTRXDVLDMSW;
26329    output EMACCLIENTRXFRAMEDROP;
26330    output EMACCLIENTRXGOODFRAME;
26331    output EMACCLIENTRXSTATSBYTEVLD;
26332    output EMACCLIENTRXSTATSVLD;
26333    output EMACCLIENTTXACK;
26334    output EMACCLIENTTXCLIENTCLKOUT;
26335    output EMACCLIENTTXCOLLISION;
26336    output EMACCLIENTTXRETRANSMIT;
26337    output EMACCLIENTTXSTATS;
26338    output EMACCLIENTTXSTATSBYTEVLD;
26339    output EMACCLIENTTXSTATSVLD;
26340    output EMACDCRACK;
26341    output EMACPHYENCOMMAALIGN;
26342    output EMACPHYLOOPBACKMSB;
26343    output EMACPHYMCLKOUT;
26344    output EMACPHYMDOUT;
26345    output EMACPHYMDTRI;
26346    output EMACPHYMGTRXRESET;
26347    output EMACPHYMGTTXRESET;
26348    output EMACPHYPOWERDOWN;
26349    output EMACPHYSYNCACQSTATUS;
26350    output EMACPHYTXCHARDISPMODE;
26351    output EMACPHYTXCHARDISPVAL;
26352    output EMACPHYTXCHARISK;
26353    output EMACPHYTXCLK;
26354    output EMACPHYTXEN;
26355    output EMACPHYTXER;
26356    output EMACPHYTXGMIIMIICLKOUT;
26357    output EMACSPEEDIS10100;
26358    output HOSTMIIMRDY;
26359    output [0:31] EMACDCRDBUS;
26360    output [15:0] EMACCLIENTRXD;
26361    output [31:0] HOSTRDDATA;
26362    output [6:0] EMACCLIENTRXSTATS;
26363    output [7:0] EMACPHYTXD;
26364    input CLIENTEMACDCMLOCKED;
26365    input CLIENTEMACPAUSEREQ;
26366    input CLIENTEMACRXCLIENTCLKIN;
26367    input CLIENTEMACTXCLIENTCLKIN;
26368    input CLIENTEMACTXDVLD;
26369    input CLIENTEMACTXDVLDMSW;
26370    input CLIENTEMACTXFIRSTBYTE;
26371    input CLIENTEMACTXUNDERRUN;
26372    input DCREMACCLK;
26373    input DCREMACENABLE;
26374    input DCREMACREAD;
26375    input DCREMACWRITE;
26376    input HOSTCLK;
26377    input HOSTMIIMSEL;
26378    input HOSTREQ;
26379    input PHYEMACCOL;
26380    input PHYEMACCRS;
26381    input PHYEMACGTXCLK;
26382    input PHYEMACMCLKIN;
26383    input PHYEMACMDIN;
26384    input PHYEMACMIITXCLK;
26385    input PHYEMACRXCHARISCOMMA;
26386    input PHYEMACRXCHARISK;
26387    input PHYEMACRXCLK;
26388    input PHYEMACRXDISPERR;
26389    input PHYEMACRXDV;
26390    input PHYEMACRXER;
26391    input PHYEMACRXNOTINTABLE;
26392    input PHYEMACRXRUNDISP;
26393    input PHYEMACSIGNALDET;
26394    input PHYEMACTXBUFERR;
26395    input PHYEMACTXGMIIMIICLKIN;
26396    input RESET;
26397    input [0:31] DCREMACDBUS;
26398    input [0:9] DCREMACABUS;
26399    input [15:0] CLIENTEMACPAUSEVAL;
26400    input [15:0] CLIENTEMACTXD;
26401    input [1:0] HOSTOPCODE;
26402    input [1:0] PHYEMACRXBUFSTATUS;
26403    input [2:0] PHYEMACRXCLKCORCNT;
26404    input [31:0] HOSTWRDATA;
26405    input [4:0] PHYEMACPHYAD;
26406    input [7:0] CLIENTEMACTXIFGDELAY;
26407    input [7:0] PHYEMACRXD;
26408    input [9:0] HOSTADDR;
26409endmodule
26410
26411module CMAC (...);
26412    parameter CTL_PTP_TRANSPCLK_MODE = "FALSE";
26413    parameter CTL_RX_CHECK_ACK = "TRUE";
26414    parameter CTL_RX_CHECK_PREAMBLE = "FALSE";
26415    parameter CTL_RX_CHECK_SFD = "FALSE";
26416    parameter CTL_RX_DELETE_FCS = "TRUE";
26417    parameter [15:0] CTL_RX_ETYPE_GCP = 16'h8808;
26418    parameter [15:0] CTL_RX_ETYPE_GPP = 16'h8808;
26419    parameter [15:0] CTL_RX_ETYPE_PCP = 16'h8808;
26420    parameter [15:0] CTL_RX_ETYPE_PPP = 16'h8808;
26421    parameter CTL_RX_FORWARD_CONTROL = "FALSE";
26422    parameter CTL_RX_IGNORE_FCS = "FALSE";
26423    parameter [14:0] CTL_RX_MAX_PACKET_LEN = 15'h2580;
26424    parameter [7:0] CTL_RX_MIN_PACKET_LEN = 8'h40;
26425    parameter [15:0] CTL_RX_OPCODE_GPP = 16'h0001;
26426    parameter [15:0] CTL_RX_OPCODE_MAX_GCP = 16'hFFFF;
26427    parameter [15:0] CTL_RX_OPCODE_MAX_PCP = 16'hFFFF;
26428    parameter [15:0] CTL_RX_OPCODE_MIN_GCP = 16'h0000;
26429    parameter [15:0] CTL_RX_OPCODE_MIN_PCP = 16'h0000;
26430    parameter [15:0] CTL_RX_OPCODE_PPP = 16'h0001;
26431    parameter [47:0] CTL_RX_PAUSE_DA_MCAST = 48'h0180C2000001;
26432    parameter [47:0] CTL_RX_PAUSE_DA_UCAST = 48'h000000000000;
26433    parameter [47:0] CTL_RX_PAUSE_SA = 48'h000000000000;
26434    parameter CTL_RX_PROCESS_LFI = "FALSE";
26435    parameter [15:0] CTL_RX_VL_LENGTH_MINUS1 = 16'h3FFF;
26436    parameter [63:0] CTL_RX_VL_MARKER_ID0 = 64'hC16821003E97DE00;
26437    parameter [63:0] CTL_RX_VL_MARKER_ID1 = 64'h9D718E00628E7100;
26438    parameter [63:0] CTL_RX_VL_MARKER_ID10 = 64'hFD6C990002936600;
26439    parameter [63:0] CTL_RX_VL_MARKER_ID11 = 64'hB9915500466EAA00;
26440    parameter [63:0] CTL_RX_VL_MARKER_ID12 = 64'h5CB9B200A3464D00;
26441    parameter [63:0] CTL_RX_VL_MARKER_ID13 = 64'h1AF8BD00E5074200;
26442    parameter [63:0] CTL_RX_VL_MARKER_ID14 = 64'h83C7CA007C383500;
26443    parameter [63:0] CTL_RX_VL_MARKER_ID15 = 64'h3536CD00CAC93200;
26444    parameter [63:0] CTL_RX_VL_MARKER_ID16 = 64'hC4314C003BCEB300;
26445    parameter [63:0] CTL_RX_VL_MARKER_ID17 = 64'hADD6B70052294800;
26446    parameter [63:0] CTL_RX_VL_MARKER_ID18 = 64'h5F662A00A099D500;
26447    parameter [63:0] CTL_RX_VL_MARKER_ID19 = 64'hC0F0E5003F0F1A00;
26448    parameter [63:0] CTL_RX_VL_MARKER_ID2 = 64'h594BE800A6B41700;
26449    parameter [63:0] CTL_RX_VL_MARKER_ID3 = 64'h4D957B00B26A8400;
26450    parameter [63:0] CTL_RX_VL_MARKER_ID4 = 64'hF50709000AF8F600;
26451    parameter [63:0] CTL_RX_VL_MARKER_ID5 = 64'hDD14C20022EB3D00;
26452    parameter [63:0] CTL_RX_VL_MARKER_ID6 = 64'h9A4A260065B5D900;
26453    parameter [63:0] CTL_RX_VL_MARKER_ID7 = 64'h7B45660084BA9900;
26454    parameter [63:0] CTL_RX_VL_MARKER_ID8 = 64'hA02476005FDB8900;
26455    parameter [63:0] CTL_RX_VL_MARKER_ID9 = 64'h68C9FB0097360400;
26456    parameter CTL_TEST_MODE_PIN_CHAR = "FALSE";
26457    parameter [47:0] CTL_TX_DA_GPP = 48'h0180C2000001;
26458    parameter [47:0] CTL_TX_DA_PPP = 48'h0180C2000001;
26459    parameter [15:0] CTL_TX_ETHERTYPE_GPP = 16'h8808;
26460    parameter [15:0] CTL_TX_ETHERTYPE_PPP = 16'h8808;
26461    parameter CTL_TX_FCS_INS_ENABLE = "TRUE";
26462    parameter CTL_TX_IGNORE_FCS = "FALSE";
26463    parameter [15:0] CTL_TX_OPCODE_GPP = 16'h0001;
26464    parameter [15:0] CTL_TX_OPCODE_PPP = 16'h0001;
26465    parameter CTL_TX_PTP_1STEP_ENABLE = "FALSE";
26466    parameter [10:0] CTL_TX_PTP_LATENCY_ADJUST = 11'h2C1;
26467    parameter [47:0] CTL_TX_SA_GPP = 48'h000000000000;
26468    parameter [47:0] CTL_TX_SA_PPP = 48'h000000000000;
26469    parameter [15:0] CTL_TX_VL_LENGTH_MINUS1 = 16'h3FFF;
26470    parameter [63:0] CTL_TX_VL_MARKER_ID0 = 64'hC16821003E97DE00;
26471    parameter [63:0] CTL_TX_VL_MARKER_ID1 = 64'h9D718E00628E7100;
26472    parameter [63:0] CTL_TX_VL_MARKER_ID10 = 64'hFD6C990002936600;
26473    parameter [63:0] CTL_TX_VL_MARKER_ID11 = 64'hB9915500466EAA00;
26474    parameter [63:0] CTL_TX_VL_MARKER_ID12 = 64'h5CB9B200A3464D00;
26475    parameter [63:0] CTL_TX_VL_MARKER_ID13 = 64'h1AF8BD00E5074200;
26476    parameter [63:0] CTL_TX_VL_MARKER_ID14 = 64'h83C7CA007C383500;
26477    parameter [63:0] CTL_TX_VL_MARKER_ID15 = 64'h3536CD00CAC93200;
26478    parameter [63:0] CTL_TX_VL_MARKER_ID16 = 64'hC4314C003BCEB300;
26479    parameter [63:0] CTL_TX_VL_MARKER_ID17 = 64'hADD6B70052294800;
26480    parameter [63:0] CTL_TX_VL_MARKER_ID18 = 64'h5F662A00A099D500;
26481    parameter [63:0] CTL_TX_VL_MARKER_ID19 = 64'hC0F0E5003F0F1A00;
26482    parameter [63:0] CTL_TX_VL_MARKER_ID2 = 64'h594BE800A6B41700;
26483    parameter [63:0] CTL_TX_VL_MARKER_ID3 = 64'h4D957B00B26A8400;
26484    parameter [63:0] CTL_TX_VL_MARKER_ID4 = 64'hF50709000AF8F600;
26485    parameter [63:0] CTL_TX_VL_MARKER_ID5 = 64'hDD14C20022EB3D00;
26486    parameter [63:0] CTL_TX_VL_MARKER_ID6 = 64'h9A4A260065B5D900;
26487    parameter [63:0] CTL_TX_VL_MARKER_ID7 = 64'h7B45660084BA9900;
26488    parameter [63:0] CTL_TX_VL_MARKER_ID8 = 64'hA02476005FDB8900;
26489    parameter [63:0] CTL_TX_VL_MARKER_ID9 = 64'h68C9FB0097360400;
26490    parameter SIM_VERSION = "2.0";
26491    parameter TEST_MODE_PIN_CHAR = "FALSE";
26492    output [15:0] DRP_DO;
26493    output DRP_RDY;
26494    output [127:0] RX_DATAOUT0;
26495    output [127:0] RX_DATAOUT1;
26496    output [127:0] RX_DATAOUT2;
26497    output [127:0] RX_DATAOUT3;
26498    output RX_ENAOUT0;
26499    output RX_ENAOUT1;
26500    output RX_ENAOUT2;
26501    output RX_ENAOUT3;
26502    output RX_EOPOUT0;
26503    output RX_EOPOUT1;
26504    output RX_EOPOUT2;
26505    output RX_EOPOUT3;
26506    output RX_ERROUT0;
26507    output RX_ERROUT1;
26508    output RX_ERROUT2;
26509    output RX_ERROUT3;
26510    output [6:0] RX_LANE_ALIGNER_FILL_0;
26511    output [6:0] RX_LANE_ALIGNER_FILL_1;
26512    output [6:0] RX_LANE_ALIGNER_FILL_10;
26513    output [6:0] RX_LANE_ALIGNER_FILL_11;
26514    output [6:0] RX_LANE_ALIGNER_FILL_12;
26515    output [6:0] RX_LANE_ALIGNER_FILL_13;
26516    output [6:0] RX_LANE_ALIGNER_FILL_14;
26517    output [6:0] RX_LANE_ALIGNER_FILL_15;
26518    output [6:0] RX_LANE_ALIGNER_FILL_16;
26519    output [6:0] RX_LANE_ALIGNER_FILL_17;
26520    output [6:0] RX_LANE_ALIGNER_FILL_18;
26521    output [6:0] RX_LANE_ALIGNER_FILL_19;
26522    output [6:0] RX_LANE_ALIGNER_FILL_2;
26523    output [6:0] RX_LANE_ALIGNER_FILL_3;
26524    output [6:0] RX_LANE_ALIGNER_FILL_4;
26525    output [6:0] RX_LANE_ALIGNER_FILL_5;
26526    output [6:0] RX_LANE_ALIGNER_FILL_6;
26527    output [6:0] RX_LANE_ALIGNER_FILL_7;
26528    output [6:0] RX_LANE_ALIGNER_FILL_8;
26529    output [6:0] RX_LANE_ALIGNER_FILL_9;
26530    output [3:0] RX_MTYOUT0;
26531    output [3:0] RX_MTYOUT1;
26532    output [3:0] RX_MTYOUT2;
26533    output [3:0] RX_MTYOUT3;
26534    output [4:0] RX_PTP_PCSLANE_OUT;
26535    output [79:0] RX_PTP_TSTAMP_OUT;
26536    output RX_SOPOUT0;
26537    output RX_SOPOUT1;
26538    output RX_SOPOUT2;
26539    output RX_SOPOUT3;
26540    output STAT_RX_ALIGNED;
26541    output STAT_RX_ALIGNED_ERR;
26542    output [6:0] STAT_RX_BAD_CODE;
26543    output [3:0] STAT_RX_BAD_FCS;
26544    output STAT_RX_BAD_PREAMBLE;
26545    output STAT_RX_BAD_SFD;
26546    output STAT_RX_BIP_ERR_0;
26547    output STAT_RX_BIP_ERR_1;
26548    output STAT_RX_BIP_ERR_10;
26549    output STAT_RX_BIP_ERR_11;
26550    output STAT_RX_BIP_ERR_12;
26551    output STAT_RX_BIP_ERR_13;
26552    output STAT_RX_BIP_ERR_14;
26553    output STAT_RX_BIP_ERR_15;
26554    output STAT_RX_BIP_ERR_16;
26555    output STAT_RX_BIP_ERR_17;
26556    output STAT_RX_BIP_ERR_18;
26557    output STAT_RX_BIP_ERR_19;
26558    output STAT_RX_BIP_ERR_2;
26559    output STAT_RX_BIP_ERR_3;
26560    output STAT_RX_BIP_ERR_4;
26561    output STAT_RX_BIP_ERR_5;
26562    output STAT_RX_BIP_ERR_6;
26563    output STAT_RX_BIP_ERR_7;
26564    output STAT_RX_BIP_ERR_8;
26565    output STAT_RX_BIP_ERR_9;
26566    output [19:0] STAT_RX_BLOCK_LOCK;
26567    output STAT_RX_BROADCAST;
26568    output [3:0] STAT_RX_FRAGMENT;
26569    output [3:0] STAT_RX_FRAMING_ERR_0;
26570    output [3:0] STAT_RX_FRAMING_ERR_1;
26571    output [3:0] STAT_RX_FRAMING_ERR_10;
26572    output [3:0] STAT_RX_FRAMING_ERR_11;
26573    output [3:0] STAT_RX_FRAMING_ERR_12;
26574    output [3:0] STAT_RX_FRAMING_ERR_13;
26575    output [3:0] STAT_RX_FRAMING_ERR_14;
26576    output [3:0] STAT_RX_FRAMING_ERR_15;
26577    output [3:0] STAT_RX_FRAMING_ERR_16;
26578    output [3:0] STAT_RX_FRAMING_ERR_17;
26579    output [3:0] STAT_RX_FRAMING_ERR_18;
26580    output [3:0] STAT_RX_FRAMING_ERR_19;
26581    output [3:0] STAT_RX_FRAMING_ERR_2;
26582    output [3:0] STAT_RX_FRAMING_ERR_3;
26583    output [3:0] STAT_RX_FRAMING_ERR_4;
26584    output [3:0] STAT_RX_FRAMING_ERR_5;
26585    output [3:0] STAT_RX_FRAMING_ERR_6;
26586    output [3:0] STAT_RX_FRAMING_ERR_7;
26587    output [3:0] STAT_RX_FRAMING_ERR_8;
26588    output [3:0] STAT_RX_FRAMING_ERR_9;
26589    output STAT_RX_FRAMING_ERR_VALID_0;
26590    output STAT_RX_FRAMING_ERR_VALID_1;
26591    output STAT_RX_FRAMING_ERR_VALID_10;
26592    output STAT_RX_FRAMING_ERR_VALID_11;
26593    output STAT_RX_FRAMING_ERR_VALID_12;
26594    output STAT_RX_FRAMING_ERR_VALID_13;
26595    output STAT_RX_FRAMING_ERR_VALID_14;
26596    output STAT_RX_FRAMING_ERR_VALID_15;
26597    output STAT_RX_FRAMING_ERR_VALID_16;
26598    output STAT_RX_FRAMING_ERR_VALID_17;
26599    output STAT_RX_FRAMING_ERR_VALID_18;
26600    output STAT_RX_FRAMING_ERR_VALID_19;
26601    output STAT_RX_FRAMING_ERR_VALID_2;
26602    output STAT_RX_FRAMING_ERR_VALID_3;
26603    output STAT_RX_FRAMING_ERR_VALID_4;
26604    output STAT_RX_FRAMING_ERR_VALID_5;
26605    output STAT_RX_FRAMING_ERR_VALID_6;
26606    output STAT_RX_FRAMING_ERR_VALID_7;
26607    output STAT_RX_FRAMING_ERR_VALID_8;
26608    output STAT_RX_FRAMING_ERR_VALID_9;
26609    output STAT_RX_GOT_SIGNAL_OS;
26610    output STAT_RX_HI_BER;
26611    output STAT_RX_INRANGEERR;
26612    output STAT_RX_INTERNAL_LOCAL_FAULT;
26613    output STAT_RX_JABBER;
26614    output [7:0] STAT_RX_LANE0_VLM_BIP7;
26615    output STAT_RX_LANE0_VLM_BIP7_VALID;
26616    output STAT_RX_LOCAL_FAULT;
26617    output [19:0] STAT_RX_MF_ERR;
26618    output [19:0] STAT_RX_MF_LEN_ERR;
26619    output [19:0] STAT_RX_MF_REPEAT_ERR;
26620    output STAT_RX_MISALIGNED;
26621    output STAT_RX_MULTICAST;
26622    output STAT_RX_OVERSIZE;
26623    output STAT_RX_PACKET_1024_1518_BYTES;
26624    output STAT_RX_PACKET_128_255_BYTES;
26625    output STAT_RX_PACKET_1519_1522_BYTES;
26626    output STAT_RX_PACKET_1523_1548_BYTES;
26627    output STAT_RX_PACKET_1549_2047_BYTES;
26628    output STAT_RX_PACKET_2048_4095_BYTES;
26629    output STAT_RX_PACKET_256_511_BYTES;
26630    output STAT_RX_PACKET_4096_8191_BYTES;
26631    output STAT_RX_PACKET_512_1023_BYTES;
26632    output STAT_RX_PACKET_64_BYTES;
26633    output STAT_RX_PACKET_65_127_BYTES;
26634    output STAT_RX_PACKET_8192_9215_BYTES;
26635    output STAT_RX_PACKET_BAD_FCS;
26636    output STAT_RX_PACKET_LARGE;
26637    output [3:0] STAT_RX_PACKET_SMALL;
26638    output STAT_RX_PAUSE;
26639    output [15:0] STAT_RX_PAUSE_QUANTA0;
26640    output [15:0] STAT_RX_PAUSE_QUANTA1;
26641    output [15:0] STAT_RX_PAUSE_QUANTA2;
26642    output [15:0] STAT_RX_PAUSE_QUANTA3;
26643    output [15:0] STAT_RX_PAUSE_QUANTA4;
26644    output [15:0] STAT_RX_PAUSE_QUANTA5;
26645    output [15:0] STAT_RX_PAUSE_QUANTA6;
26646    output [15:0] STAT_RX_PAUSE_QUANTA7;
26647    output [15:0] STAT_RX_PAUSE_QUANTA8;
26648    output [8:0] STAT_RX_PAUSE_REQ;
26649    output [8:0] STAT_RX_PAUSE_VALID;
26650    output STAT_RX_RECEIVED_LOCAL_FAULT;
26651    output STAT_RX_REMOTE_FAULT;
26652    output STAT_RX_STATUS;
26653    output [3:0] STAT_RX_STOMPED_FCS;
26654    output [19:0] STAT_RX_SYNCED;
26655    output [19:0] STAT_RX_SYNCED_ERR;
26656    output [2:0] STAT_RX_TEST_PATTERN_MISMATCH;
26657    output STAT_RX_TOOLONG;
26658    output [7:0] STAT_RX_TOTAL_BYTES;
26659    output [13:0] STAT_RX_TOTAL_GOOD_BYTES;
26660    output STAT_RX_TOTAL_GOOD_PACKETS;
26661    output [3:0] STAT_RX_TOTAL_PACKETS;
26662    output STAT_RX_TRUNCATED;
26663    output [3:0] STAT_RX_UNDERSIZE;
26664    output STAT_RX_UNICAST;
26665    output STAT_RX_USER_PAUSE;
26666    output STAT_RX_VLAN;
26667    output [19:0] STAT_RX_VL_DEMUXED;
26668    output [4:0] STAT_RX_VL_NUMBER_0;
26669    output [4:0] STAT_RX_VL_NUMBER_1;
26670    output [4:0] STAT_RX_VL_NUMBER_10;
26671    output [4:0] STAT_RX_VL_NUMBER_11;
26672    output [4:0] STAT_RX_VL_NUMBER_12;
26673    output [4:0] STAT_RX_VL_NUMBER_13;
26674    output [4:0] STAT_RX_VL_NUMBER_14;
26675    output [4:0] STAT_RX_VL_NUMBER_15;
26676    output [4:0] STAT_RX_VL_NUMBER_16;
26677    output [4:0] STAT_RX_VL_NUMBER_17;
26678    output [4:0] STAT_RX_VL_NUMBER_18;
26679    output [4:0] STAT_RX_VL_NUMBER_19;
26680    output [4:0] STAT_RX_VL_NUMBER_2;
26681    output [4:0] STAT_RX_VL_NUMBER_3;
26682    output [4:0] STAT_RX_VL_NUMBER_4;
26683    output [4:0] STAT_RX_VL_NUMBER_5;
26684    output [4:0] STAT_RX_VL_NUMBER_6;
26685    output [4:0] STAT_RX_VL_NUMBER_7;
26686    output [4:0] STAT_RX_VL_NUMBER_8;
26687    output [4:0] STAT_RX_VL_NUMBER_9;
26688    output STAT_TX_BAD_FCS;
26689    output STAT_TX_BROADCAST;
26690    output STAT_TX_FRAME_ERROR;
26691    output STAT_TX_LOCAL_FAULT;
26692    output STAT_TX_MULTICAST;
26693    output STAT_TX_PACKET_1024_1518_BYTES;
26694    output STAT_TX_PACKET_128_255_BYTES;
26695    output STAT_TX_PACKET_1519_1522_BYTES;
26696    output STAT_TX_PACKET_1523_1548_BYTES;
26697    output STAT_TX_PACKET_1549_2047_BYTES;
26698    output STAT_TX_PACKET_2048_4095_BYTES;
26699    output STAT_TX_PACKET_256_511_BYTES;
26700    output STAT_TX_PACKET_4096_8191_BYTES;
26701    output STAT_TX_PACKET_512_1023_BYTES;
26702    output STAT_TX_PACKET_64_BYTES;
26703    output STAT_TX_PACKET_65_127_BYTES;
26704    output STAT_TX_PACKET_8192_9215_BYTES;
26705    output STAT_TX_PACKET_LARGE;
26706    output STAT_TX_PACKET_SMALL;
26707    output STAT_TX_PAUSE;
26708    output [8:0] STAT_TX_PAUSE_VALID;
26709    output STAT_TX_PTP_FIFO_READ_ERROR;
26710    output STAT_TX_PTP_FIFO_WRITE_ERROR;
26711    output [6:0] STAT_TX_TOTAL_BYTES;
26712    output [13:0] STAT_TX_TOTAL_GOOD_BYTES;
26713    output STAT_TX_TOTAL_GOOD_PACKETS;
26714    output STAT_TX_TOTAL_PACKETS;
26715    output STAT_TX_UNICAST;
26716    output STAT_TX_USER_PAUSE;
26717    output STAT_TX_VLAN;
26718    output TX_OVFOUT;
26719    output [4:0] TX_PTP_PCSLANE_OUT;
26720    output [79:0] TX_PTP_TSTAMP_OUT;
26721    output [15:0] TX_PTP_TSTAMP_TAG_OUT;
26722    output TX_PTP_TSTAMP_VALID_OUT;
26723    output TX_RDYOUT;
26724    output [15:0] TX_SERDES_ALT_DATA0;
26725    output [15:0] TX_SERDES_ALT_DATA1;
26726    output [15:0] TX_SERDES_ALT_DATA2;
26727    output [15:0] TX_SERDES_ALT_DATA3;
26728    output [63:0] TX_SERDES_DATA0;
26729    output [63:0] TX_SERDES_DATA1;
26730    output [63:0] TX_SERDES_DATA2;
26731    output [63:0] TX_SERDES_DATA3;
26732    output [31:0] TX_SERDES_DATA4;
26733    output [31:0] TX_SERDES_DATA5;
26734    output [31:0] TX_SERDES_DATA6;
26735    output [31:0] TX_SERDES_DATA7;
26736    output [31:0] TX_SERDES_DATA8;
26737    output [31:0] TX_SERDES_DATA9;
26738    output TX_UNFOUT;
26739    input CTL_CAUI4_MODE;
26740    input CTL_RX_CHECK_ETYPE_GCP;
26741    input CTL_RX_CHECK_ETYPE_GPP;
26742    input CTL_RX_CHECK_ETYPE_PCP;
26743    input CTL_RX_CHECK_ETYPE_PPP;
26744    input CTL_RX_CHECK_MCAST_GCP;
26745    input CTL_RX_CHECK_MCAST_GPP;
26746    input CTL_RX_CHECK_MCAST_PCP;
26747    input CTL_RX_CHECK_MCAST_PPP;
26748    input CTL_RX_CHECK_OPCODE_GCP;
26749    input CTL_RX_CHECK_OPCODE_GPP;
26750    input CTL_RX_CHECK_OPCODE_PCP;
26751    input CTL_RX_CHECK_OPCODE_PPP;
26752    input CTL_RX_CHECK_SA_GCP;
26753    input CTL_RX_CHECK_SA_GPP;
26754    input CTL_RX_CHECK_SA_PCP;
26755    input CTL_RX_CHECK_SA_PPP;
26756    input CTL_RX_CHECK_UCAST_GCP;
26757    input CTL_RX_CHECK_UCAST_GPP;
26758    input CTL_RX_CHECK_UCAST_PCP;
26759    input CTL_RX_CHECK_UCAST_PPP;
26760    input CTL_RX_ENABLE;
26761    input CTL_RX_ENABLE_GCP;
26762    input CTL_RX_ENABLE_GPP;
26763    input CTL_RX_ENABLE_PCP;
26764    input CTL_RX_ENABLE_PPP;
26765    input CTL_RX_FORCE_RESYNC;
26766    input [8:0] CTL_RX_PAUSE_ACK;
26767    input [8:0] CTL_RX_PAUSE_ENABLE;
26768    input [79:0] CTL_RX_SYSTEMTIMERIN;
26769    input CTL_RX_TEST_PATTERN;
26770    input CTL_TX_ENABLE;
26771    input CTL_TX_LANE0_VLM_BIP7_OVERRIDE;
26772    input [7:0] CTL_TX_LANE0_VLM_BIP7_OVERRIDE_VALUE;
26773    input [8:0] CTL_TX_PAUSE_ENABLE;
26774    input [15:0] CTL_TX_PAUSE_QUANTA0;
26775    input [15:0] CTL_TX_PAUSE_QUANTA1;
26776    input [15:0] CTL_TX_PAUSE_QUANTA2;
26777    input [15:0] CTL_TX_PAUSE_QUANTA3;
26778    input [15:0] CTL_TX_PAUSE_QUANTA4;
26779    input [15:0] CTL_TX_PAUSE_QUANTA5;
26780    input [15:0] CTL_TX_PAUSE_QUANTA6;
26781    input [15:0] CTL_TX_PAUSE_QUANTA7;
26782    input [15:0] CTL_TX_PAUSE_QUANTA8;
26783    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER0;
26784    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER1;
26785    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER2;
26786    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER3;
26787    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER4;
26788    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER5;
26789    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER6;
26790    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER7;
26791    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER8;
26792    input [8:0] CTL_TX_PAUSE_REQ;
26793    input CTL_TX_PTP_VLANE_ADJUST_MODE;
26794    input CTL_TX_RESEND_PAUSE;
26795    input CTL_TX_SEND_IDLE;
26796    input CTL_TX_SEND_RFI;
26797    input [79:0] CTL_TX_SYSTEMTIMERIN;
26798    input CTL_TX_TEST_PATTERN;
26799    input [9:0] DRP_ADDR;
26800    input DRP_CLK;
26801    input [15:0] DRP_DI;
26802    input DRP_EN;
26803    input DRP_WE;
26804    input RX_CLK;
26805    input RX_RESET;
26806    input [15:0] RX_SERDES_ALT_DATA0;
26807    input [15:0] RX_SERDES_ALT_DATA1;
26808    input [15:0] RX_SERDES_ALT_DATA2;
26809    input [15:0] RX_SERDES_ALT_DATA3;
26810    input [9:0] RX_SERDES_CLK;
26811    input [63:0] RX_SERDES_DATA0;
26812    input [63:0] RX_SERDES_DATA1;
26813    input [63:0] RX_SERDES_DATA2;
26814    input [63:0] RX_SERDES_DATA3;
26815    input [31:0] RX_SERDES_DATA4;
26816    input [31:0] RX_SERDES_DATA5;
26817    input [31:0] RX_SERDES_DATA6;
26818    input [31:0] RX_SERDES_DATA7;
26819    input [31:0] RX_SERDES_DATA8;
26820    input [31:0] RX_SERDES_DATA9;
26821    input [9:0] RX_SERDES_RESET;
26822    input TX_CLK;
26823    input [127:0] TX_DATAIN0;
26824    input [127:0] TX_DATAIN1;
26825    input [127:0] TX_DATAIN2;
26826    input [127:0] TX_DATAIN3;
26827    input TX_ENAIN0;
26828    input TX_ENAIN1;
26829    input TX_ENAIN2;
26830    input TX_ENAIN3;
26831    input TX_EOPIN0;
26832    input TX_EOPIN1;
26833    input TX_EOPIN2;
26834    input TX_EOPIN3;
26835    input TX_ERRIN0;
26836    input TX_ERRIN1;
26837    input TX_ERRIN2;
26838    input TX_ERRIN3;
26839    input [3:0] TX_MTYIN0;
26840    input [3:0] TX_MTYIN1;
26841    input [3:0] TX_MTYIN2;
26842    input [3:0] TX_MTYIN3;
26843    input [1:0] TX_PTP_1588OP_IN;
26844    input [15:0] TX_PTP_CHKSUM_OFFSET_IN;
26845    input [63:0] TX_PTP_RXTSTAMP_IN;
26846    input [15:0] TX_PTP_TAG_FIELD_IN;
26847    input [15:0] TX_PTP_TSTAMP_OFFSET_IN;
26848    input TX_PTP_UPD_CHKSUM_IN;
26849    input TX_RESET;
26850    input TX_SOPIN0;
26851    input TX_SOPIN1;
26852    input TX_SOPIN2;
26853    input TX_SOPIN3;
26854endmodule
26855
26856module CMACE4 (...);
26857    parameter CTL_PTP_TRANSPCLK_MODE = "FALSE";
26858    parameter CTL_RX_CHECK_ACK = "TRUE";
26859    parameter CTL_RX_CHECK_PREAMBLE = "FALSE";
26860    parameter CTL_RX_CHECK_SFD = "FALSE";
26861    parameter CTL_RX_DELETE_FCS = "TRUE";
26862    parameter [15:0] CTL_RX_ETYPE_GCP = 16'h8808;
26863    parameter [15:0] CTL_RX_ETYPE_GPP = 16'h8808;
26864    parameter [15:0] CTL_RX_ETYPE_PCP = 16'h8808;
26865    parameter [15:0] CTL_RX_ETYPE_PPP = 16'h8808;
26866    parameter CTL_RX_FORWARD_CONTROL = "FALSE";
26867    parameter CTL_RX_IGNORE_FCS = "FALSE";
26868    parameter [14:0] CTL_RX_MAX_PACKET_LEN = 15'h2580;
26869    parameter [7:0] CTL_RX_MIN_PACKET_LEN = 8'h40;
26870    parameter [15:0] CTL_RX_OPCODE_GPP = 16'h0001;
26871    parameter [15:0] CTL_RX_OPCODE_MAX_GCP = 16'hFFFF;
26872    parameter [15:0] CTL_RX_OPCODE_MAX_PCP = 16'hFFFF;
26873    parameter [15:0] CTL_RX_OPCODE_MIN_GCP = 16'h0000;
26874    parameter [15:0] CTL_RX_OPCODE_MIN_PCP = 16'h0000;
26875    parameter [15:0] CTL_RX_OPCODE_PPP = 16'h0001;
26876    parameter [47:0] CTL_RX_PAUSE_DA_MCAST = 48'h0180C2000001;
26877    parameter [47:0] CTL_RX_PAUSE_DA_UCAST = 48'h000000000000;
26878    parameter [47:0] CTL_RX_PAUSE_SA = 48'h000000000000;
26879    parameter CTL_RX_PROCESS_LFI = "FALSE";
26880    parameter [8:0] CTL_RX_RSFEC_AM_THRESHOLD = 9'h046;
26881    parameter [1:0] CTL_RX_RSFEC_FILL_ADJUST = 2'h0;
26882    parameter [15:0] CTL_RX_VL_LENGTH_MINUS1 = 16'h3FFF;
26883    parameter [63:0] CTL_RX_VL_MARKER_ID0 = 64'hC16821003E97DE00;
26884    parameter [63:0] CTL_RX_VL_MARKER_ID1 = 64'h9D718E00628E7100;
26885    parameter [63:0] CTL_RX_VL_MARKER_ID10 = 64'hFD6C990002936600;
26886    parameter [63:0] CTL_RX_VL_MARKER_ID11 = 64'hB9915500466EAA00;
26887    parameter [63:0] CTL_RX_VL_MARKER_ID12 = 64'h5CB9B200A3464D00;
26888    parameter [63:0] CTL_RX_VL_MARKER_ID13 = 64'h1AF8BD00E5074200;
26889    parameter [63:0] CTL_RX_VL_MARKER_ID14 = 64'h83C7CA007C383500;
26890    parameter [63:0] CTL_RX_VL_MARKER_ID15 = 64'h3536CD00CAC93200;
26891    parameter [63:0] CTL_RX_VL_MARKER_ID16 = 64'hC4314C003BCEB300;
26892    parameter [63:0] CTL_RX_VL_MARKER_ID17 = 64'hADD6B70052294800;
26893    parameter [63:0] CTL_RX_VL_MARKER_ID18 = 64'h5F662A00A099D500;
26894    parameter [63:0] CTL_RX_VL_MARKER_ID19 = 64'hC0F0E5003F0F1A00;
26895    parameter [63:0] CTL_RX_VL_MARKER_ID2 = 64'h594BE800A6B41700;
26896    parameter [63:0] CTL_RX_VL_MARKER_ID3 = 64'h4D957B00B26A8400;
26897    parameter [63:0] CTL_RX_VL_MARKER_ID4 = 64'hF50709000AF8F600;
26898    parameter [63:0] CTL_RX_VL_MARKER_ID5 = 64'hDD14C20022EB3D00;
26899    parameter [63:0] CTL_RX_VL_MARKER_ID6 = 64'h9A4A260065B5D900;
26900    parameter [63:0] CTL_RX_VL_MARKER_ID7 = 64'h7B45660084BA9900;
26901    parameter [63:0] CTL_RX_VL_MARKER_ID8 = 64'hA02476005FDB8900;
26902    parameter [63:0] CTL_RX_VL_MARKER_ID9 = 64'h68C9FB0097360400;
26903    parameter CTL_TEST_MODE_PIN_CHAR = "FALSE";
26904    parameter CTL_TX_CUSTOM_PREAMBLE_ENABLE = "FALSE";
26905    parameter [47:0] CTL_TX_DA_GPP = 48'h0180C2000001;
26906    parameter [47:0] CTL_TX_DA_PPP = 48'h0180C2000001;
26907    parameter [15:0] CTL_TX_ETHERTYPE_GPP = 16'h8808;
26908    parameter [15:0] CTL_TX_ETHERTYPE_PPP = 16'h8808;
26909    parameter CTL_TX_FCS_INS_ENABLE = "TRUE";
26910    parameter CTL_TX_IGNORE_FCS = "FALSE";
26911    parameter [3:0] CTL_TX_IPG_VALUE = 4'hC;
26912    parameter [15:0] CTL_TX_OPCODE_GPP = 16'h0001;
26913    parameter [15:0] CTL_TX_OPCODE_PPP = 16'h0001;
26914    parameter CTL_TX_PTP_1STEP_ENABLE = "FALSE";
26915    parameter [10:0] CTL_TX_PTP_LATENCY_ADJUST = 11'h2C1;
26916    parameter [47:0] CTL_TX_SA_GPP = 48'h000000000000;
26917    parameter [47:0] CTL_TX_SA_PPP = 48'h000000000000;
26918    parameter [15:0] CTL_TX_VL_LENGTH_MINUS1 = 16'h3FFF;
26919    parameter [63:0] CTL_TX_VL_MARKER_ID0 = 64'hC16821003E97DE00;
26920    parameter [63:0] CTL_TX_VL_MARKER_ID1 = 64'h9D718E00628E7100;
26921    parameter [63:0] CTL_TX_VL_MARKER_ID10 = 64'hFD6C990002936600;
26922    parameter [63:0] CTL_TX_VL_MARKER_ID11 = 64'hB9915500466EAA00;
26923    parameter [63:0] CTL_TX_VL_MARKER_ID12 = 64'h5CB9B200A3464D00;
26924    parameter [63:0] CTL_TX_VL_MARKER_ID13 = 64'h1AF8BD00E5074200;
26925    parameter [63:0] CTL_TX_VL_MARKER_ID14 = 64'h83C7CA007C383500;
26926    parameter [63:0] CTL_TX_VL_MARKER_ID15 = 64'h3536CD00CAC93200;
26927    parameter [63:0] CTL_TX_VL_MARKER_ID16 = 64'hC4314C003BCEB300;
26928    parameter [63:0] CTL_TX_VL_MARKER_ID17 = 64'hADD6B70052294800;
26929    parameter [63:0] CTL_TX_VL_MARKER_ID18 = 64'h5F662A00A099D500;
26930    parameter [63:0] CTL_TX_VL_MARKER_ID19 = 64'hC0F0E5003F0F1A00;
26931    parameter [63:0] CTL_TX_VL_MARKER_ID2 = 64'h594BE800A6B41700;
26932    parameter [63:0] CTL_TX_VL_MARKER_ID3 = 64'h4D957B00B26A8400;
26933    parameter [63:0] CTL_TX_VL_MARKER_ID4 = 64'hF50709000AF8F600;
26934    parameter [63:0] CTL_TX_VL_MARKER_ID5 = 64'hDD14C20022EB3D00;
26935    parameter [63:0] CTL_TX_VL_MARKER_ID6 = 64'h9A4A260065B5D900;
26936    parameter [63:0] CTL_TX_VL_MARKER_ID7 = 64'h7B45660084BA9900;
26937    parameter [63:0] CTL_TX_VL_MARKER_ID8 = 64'hA02476005FDB8900;
26938    parameter [63:0] CTL_TX_VL_MARKER_ID9 = 64'h68C9FB0097360400;
26939    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
26940    parameter TEST_MODE_PIN_CHAR = "FALSE";
26941    output [15:0] DRP_DO;
26942    output DRP_RDY;
26943    output [329:0] RSFEC_BYPASS_RX_DOUT;
26944    output RSFEC_BYPASS_RX_DOUT_CW_START;
26945    output RSFEC_BYPASS_RX_DOUT_VALID;
26946    output [329:0] RSFEC_BYPASS_TX_DOUT;
26947    output RSFEC_BYPASS_TX_DOUT_CW_START;
26948    output RSFEC_BYPASS_TX_DOUT_VALID;
26949    output [127:0] RX_DATAOUT0;
26950    output [127:0] RX_DATAOUT1;
26951    output [127:0] RX_DATAOUT2;
26952    output [127:0] RX_DATAOUT3;
26953    output RX_ENAOUT0;
26954    output RX_ENAOUT1;
26955    output RX_ENAOUT2;
26956    output RX_ENAOUT3;
26957    output RX_EOPOUT0;
26958    output RX_EOPOUT1;
26959    output RX_EOPOUT2;
26960    output RX_EOPOUT3;
26961    output RX_ERROUT0;
26962    output RX_ERROUT1;
26963    output RX_ERROUT2;
26964    output RX_ERROUT3;
26965    output [6:0] RX_LANE_ALIGNER_FILL_0;
26966    output [6:0] RX_LANE_ALIGNER_FILL_1;
26967    output [6:0] RX_LANE_ALIGNER_FILL_10;
26968    output [6:0] RX_LANE_ALIGNER_FILL_11;
26969    output [6:0] RX_LANE_ALIGNER_FILL_12;
26970    output [6:0] RX_LANE_ALIGNER_FILL_13;
26971    output [6:0] RX_LANE_ALIGNER_FILL_14;
26972    output [6:0] RX_LANE_ALIGNER_FILL_15;
26973    output [6:0] RX_LANE_ALIGNER_FILL_16;
26974    output [6:0] RX_LANE_ALIGNER_FILL_17;
26975    output [6:0] RX_LANE_ALIGNER_FILL_18;
26976    output [6:0] RX_LANE_ALIGNER_FILL_19;
26977    output [6:0] RX_LANE_ALIGNER_FILL_2;
26978    output [6:0] RX_LANE_ALIGNER_FILL_3;
26979    output [6:0] RX_LANE_ALIGNER_FILL_4;
26980    output [6:0] RX_LANE_ALIGNER_FILL_5;
26981    output [6:0] RX_LANE_ALIGNER_FILL_6;
26982    output [6:0] RX_LANE_ALIGNER_FILL_7;
26983    output [6:0] RX_LANE_ALIGNER_FILL_8;
26984    output [6:0] RX_LANE_ALIGNER_FILL_9;
26985    output [3:0] RX_MTYOUT0;
26986    output [3:0] RX_MTYOUT1;
26987    output [3:0] RX_MTYOUT2;
26988    output [3:0] RX_MTYOUT3;
26989    output [7:0] RX_OTN_BIP8_0;
26990    output [7:0] RX_OTN_BIP8_1;
26991    output [7:0] RX_OTN_BIP8_2;
26992    output [7:0] RX_OTN_BIP8_3;
26993    output [7:0] RX_OTN_BIP8_4;
26994    output [65:0] RX_OTN_DATA_0;
26995    output [65:0] RX_OTN_DATA_1;
26996    output [65:0] RX_OTN_DATA_2;
26997    output [65:0] RX_OTN_DATA_3;
26998    output [65:0] RX_OTN_DATA_4;
26999    output RX_OTN_ENA;
27000    output RX_OTN_LANE0;
27001    output RX_OTN_VLMARKER;
27002    output [55:0] RX_PREOUT;
27003    output [4:0] RX_PTP_PCSLANE_OUT;
27004    output [79:0] RX_PTP_TSTAMP_OUT;
27005    output RX_SOPOUT0;
27006    output RX_SOPOUT1;
27007    output RX_SOPOUT2;
27008    output RX_SOPOUT3;
27009    output STAT_RX_ALIGNED;
27010    output STAT_RX_ALIGNED_ERR;
27011    output [2:0] STAT_RX_BAD_CODE;
27012    output [2:0] STAT_RX_BAD_FCS;
27013    output STAT_RX_BAD_PREAMBLE;
27014    output STAT_RX_BAD_SFD;
27015    output STAT_RX_BIP_ERR_0;
27016    output STAT_RX_BIP_ERR_1;
27017    output STAT_RX_BIP_ERR_10;
27018    output STAT_RX_BIP_ERR_11;
27019    output STAT_RX_BIP_ERR_12;
27020    output STAT_RX_BIP_ERR_13;
27021    output STAT_RX_BIP_ERR_14;
27022    output STAT_RX_BIP_ERR_15;
27023    output STAT_RX_BIP_ERR_16;
27024    output STAT_RX_BIP_ERR_17;
27025    output STAT_RX_BIP_ERR_18;
27026    output STAT_RX_BIP_ERR_19;
27027    output STAT_RX_BIP_ERR_2;
27028    output STAT_RX_BIP_ERR_3;
27029    output STAT_RX_BIP_ERR_4;
27030    output STAT_RX_BIP_ERR_5;
27031    output STAT_RX_BIP_ERR_6;
27032    output STAT_RX_BIP_ERR_7;
27033    output STAT_RX_BIP_ERR_8;
27034    output STAT_RX_BIP_ERR_9;
27035    output [19:0] STAT_RX_BLOCK_LOCK;
27036    output STAT_RX_BROADCAST;
27037    output [2:0] STAT_RX_FRAGMENT;
27038    output [1:0] STAT_RX_FRAMING_ERR_0;
27039    output [1:0] STAT_RX_FRAMING_ERR_1;
27040    output [1:0] STAT_RX_FRAMING_ERR_10;
27041    output [1:0] STAT_RX_FRAMING_ERR_11;
27042    output [1:0] STAT_RX_FRAMING_ERR_12;
27043    output [1:0] STAT_RX_FRAMING_ERR_13;
27044    output [1:0] STAT_RX_FRAMING_ERR_14;
27045    output [1:0] STAT_RX_FRAMING_ERR_15;
27046    output [1:0] STAT_RX_FRAMING_ERR_16;
27047    output [1:0] STAT_RX_FRAMING_ERR_17;
27048    output [1:0] STAT_RX_FRAMING_ERR_18;
27049    output [1:0] STAT_RX_FRAMING_ERR_19;
27050    output [1:0] STAT_RX_FRAMING_ERR_2;
27051    output [1:0] STAT_RX_FRAMING_ERR_3;
27052    output [1:0] STAT_RX_FRAMING_ERR_4;
27053    output [1:0] STAT_RX_FRAMING_ERR_5;
27054    output [1:0] STAT_RX_FRAMING_ERR_6;
27055    output [1:0] STAT_RX_FRAMING_ERR_7;
27056    output [1:0] STAT_RX_FRAMING_ERR_8;
27057    output [1:0] STAT_RX_FRAMING_ERR_9;
27058    output STAT_RX_FRAMING_ERR_VALID_0;
27059    output STAT_RX_FRAMING_ERR_VALID_1;
27060    output STAT_RX_FRAMING_ERR_VALID_10;
27061    output STAT_RX_FRAMING_ERR_VALID_11;
27062    output STAT_RX_FRAMING_ERR_VALID_12;
27063    output STAT_RX_FRAMING_ERR_VALID_13;
27064    output STAT_RX_FRAMING_ERR_VALID_14;
27065    output STAT_RX_FRAMING_ERR_VALID_15;
27066    output STAT_RX_FRAMING_ERR_VALID_16;
27067    output STAT_RX_FRAMING_ERR_VALID_17;
27068    output STAT_RX_FRAMING_ERR_VALID_18;
27069    output STAT_RX_FRAMING_ERR_VALID_19;
27070    output STAT_RX_FRAMING_ERR_VALID_2;
27071    output STAT_RX_FRAMING_ERR_VALID_3;
27072    output STAT_RX_FRAMING_ERR_VALID_4;
27073    output STAT_RX_FRAMING_ERR_VALID_5;
27074    output STAT_RX_FRAMING_ERR_VALID_6;
27075    output STAT_RX_FRAMING_ERR_VALID_7;
27076    output STAT_RX_FRAMING_ERR_VALID_8;
27077    output STAT_RX_FRAMING_ERR_VALID_9;
27078    output STAT_RX_GOT_SIGNAL_OS;
27079    output STAT_RX_HI_BER;
27080    output STAT_RX_INRANGEERR;
27081    output STAT_RX_INTERNAL_LOCAL_FAULT;
27082    output STAT_RX_JABBER;
27083    output [7:0] STAT_RX_LANE0_VLM_BIP7;
27084    output STAT_RX_LANE0_VLM_BIP7_VALID;
27085    output STAT_RX_LOCAL_FAULT;
27086    output [19:0] STAT_RX_MF_ERR;
27087    output [19:0] STAT_RX_MF_LEN_ERR;
27088    output [19:0] STAT_RX_MF_REPEAT_ERR;
27089    output STAT_RX_MISALIGNED;
27090    output STAT_RX_MULTICAST;
27091    output STAT_RX_OVERSIZE;
27092    output STAT_RX_PACKET_1024_1518_BYTES;
27093    output STAT_RX_PACKET_128_255_BYTES;
27094    output STAT_RX_PACKET_1519_1522_BYTES;
27095    output STAT_RX_PACKET_1523_1548_BYTES;
27096    output STAT_RX_PACKET_1549_2047_BYTES;
27097    output STAT_RX_PACKET_2048_4095_BYTES;
27098    output STAT_RX_PACKET_256_511_BYTES;
27099    output STAT_RX_PACKET_4096_8191_BYTES;
27100    output STAT_RX_PACKET_512_1023_BYTES;
27101    output STAT_RX_PACKET_64_BYTES;
27102    output STAT_RX_PACKET_65_127_BYTES;
27103    output STAT_RX_PACKET_8192_9215_BYTES;
27104    output STAT_RX_PACKET_BAD_FCS;
27105    output STAT_RX_PACKET_LARGE;
27106    output [2:0] STAT_RX_PACKET_SMALL;
27107    output STAT_RX_PAUSE;
27108    output [15:0] STAT_RX_PAUSE_QUANTA0;
27109    output [15:0] STAT_RX_PAUSE_QUANTA1;
27110    output [15:0] STAT_RX_PAUSE_QUANTA2;
27111    output [15:0] STAT_RX_PAUSE_QUANTA3;
27112    output [15:0] STAT_RX_PAUSE_QUANTA4;
27113    output [15:0] STAT_RX_PAUSE_QUANTA5;
27114    output [15:0] STAT_RX_PAUSE_QUANTA6;
27115    output [15:0] STAT_RX_PAUSE_QUANTA7;
27116    output [15:0] STAT_RX_PAUSE_QUANTA8;
27117    output [8:0] STAT_RX_PAUSE_REQ;
27118    output [8:0] STAT_RX_PAUSE_VALID;
27119    output STAT_RX_RECEIVED_LOCAL_FAULT;
27120    output STAT_RX_REMOTE_FAULT;
27121    output STAT_RX_RSFEC_AM_LOCK0;
27122    output STAT_RX_RSFEC_AM_LOCK1;
27123    output STAT_RX_RSFEC_AM_LOCK2;
27124    output STAT_RX_RSFEC_AM_LOCK3;
27125    output STAT_RX_RSFEC_CORRECTED_CW_INC;
27126    output STAT_RX_RSFEC_CW_INC;
27127    output [2:0] STAT_RX_RSFEC_ERR_COUNT0_INC;
27128    output [2:0] STAT_RX_RSFEC_ERR_COUNT1_INC;
27129    output [2:0] STAT_RX_RSFEC_ERR_COUNT2_INC;
27130    output [2:0] STAT_RX_RSFEC_ERR_COUNT3_INC;
27131    output STAT_RX_RSFEC_HI_SER;
27132    output STAT_RX_RSFEC_LANE_ALIGNMENT_STATUS;
27133    output [13:0] STAT_RX_RSFEC_LANE_FILL_0;
27134    output [13:0] STAT_RX_RSFEC_LANE_FILL_1;
27135    output [13:0] STAT_RX_RSFEC_LANE_FILL_2;
27136    output [13:0] STAT_RX_RSFEC_LANE_FILL_3;
27137    output [7:0] STAT_RX_RSFEC_LANE_MAPPING;
27138    output [31:0] STAT_RX_RSFEC_RSVD;
27139    output STAT_RX_RSFEC_UNCORRECTED_CW_INC;
27140    output STAT_RX_STATUS;
27141    output [2:0] STAT_RX_STOMPED_FCS;
27142    output [19:0] STAT_RX_SYNCED;
27143    output [19:0] STAT_RX_SYNCED_ERR;
27144    output [2:0] STAT_RX_TEST_PATTERN_MISMATCH;
27145    output STAT_RX_TOOLONG;
27146    output [6:0] STAT_RX_TOTAL_BYTES;
27147    output [13:0] STAT_RX_TOTAL_GOOD_BYTES;
27148    output STAT_RX_TOTAL_GOOD_PACKETS;
27149    output [2:0] STAT_RX_TOTAL_PACKETS;
27150    output STAT_RX_TRUNCATED;
27151    output [2:0] STAT_RX_UNDERSIZE;
27152    output STAT_RX_UNICAST;
27153    output STAT_RX_USER_PAUSE;
27154    output STAT_RX_VLAN;
27155    output [19:0] STAT_RX_VL_DEMUXED;
27156    output [4:0] STAT_RX_VL_NUMBER_0;
27157    output [4:0] STAT_RX_VL_NUMBER_1;
27158    output [4:0] STAT_RX_VL_NUMBER_10;
27159    output [4:0] STAT_RX_VL_NUMBER_11;
27160    output [4:0] STAT_RX_VL_NUMBER_12;
27161    output [4:0] STAT_RX_VL_NUMBER_13;
27162    output [4:0] STAT_RX_VL_NUMBER_14;
27163    output [4:0] STAT_RX_VL_NUMBER_15;
27164    output [4:0] STAT_RX_VL_NUMBER_16;
27165    output [4:0] STAT_RX_VL_NUMBER_17;
27166    output [4:0] STAT_RX_VL_NUMBER_18;
27167    output [4:0] STAT_RX_VL_NUMBER_19;
27168    output [4:0] STAT_RX_VL_NUMBER_2;
27169    output [4:0] STAT_RX_VL_NUMBER_3;
27170    output [4:0] STAT_RX_VL_NUMBER_4;
27171    output [4:0] STAT_RX_VL_NUMBER_5;
27172    output [4:0] STAT_RX_VL_NUMBER_6;
27173    output [4:0] STAT_RX_VL_NUMBER_7;
27174    output [4:0] STAT_RX_VL_NUMBER_8;
27175    output [4:0] STAT_RX_VL_NUMBER_9;
27176    output STAT_TX_BAD_FCS;
27177    output STAT_TX_BROADCAST;
27178    output STAT_TX_FRAME_ERROR;
27179    output STAT_TX_LOCAL_FAULT;
27180    output STAT_TX_MULTICAST;
27181    output STAT_TX_PACKET_1024_1518_BYTES;
27182    output STAT_TX_PACKET_128_255_BYTES;
27183    output STAT_TX_PACKET_1519_1522_BYTES;
27184    output STAT_TX_PACKET_1523_1548_BYTES;
27185    output STAT_TX_PACKET_1549_2047_BYTES;
27186    output STAT_TX_PACKET_2048_4095_BYTES;
27187    output STAT_TX_PACKET_256_511_BYTES;
27188    output STAT_TX_PACKET_4096_8191_BYTES;
27189    output STAT_TX_PACKET_512_1023_BYTES;
27190    output STAT_TX_PACKET_64_BYTES;
27191    output STAT_TX_PACKET_65_127_BYTES;
27192    output STAT_TX_PACKET_8192_9215_BYTES;
27193    output STAT_TX_PACKET_LARGE;
27194    output STAT_TX_PACKET_SMALL;
27195    output STAT_TX_PAUSE;
27196    output [8:0] STAT_TX_PAUSE_VALID;
27197    output STAT_TX_PTP_FIFO_READ_ERROR;
27198    output STAT_TX_PTP_FIFO_WRITE_ERROR;
27199    output [5:0] STAT_TX_TOTAL_BYTES;
27200    output [13:0] STAT_TX_TOTAL_GOOD_BYTES;
27201    output STAT_TX_TOTAL_GOOD_PACKETS;
27202    output STAT_TX_TOTAL_PACKETS;
27203    output STAT_TX_UNICAST;
27204    output STAT_TX_USER_PAUSE;
27205    output STAT_TX_VLAN;
27206    output TX_OVFOUT;
27207    output [4:0] TX_PTP_PCSLANE_OUT;
27208    output [79:0] TX_PTP_TSTAMP_OUT;
27209    output [15:0] TX_PTP_TSTAMP_TAG_OUT;
27210    output TX_PTP_TSTAMP_VALID_OUT;
27211    output TX_RDYOUT;
27212    output [15:0] TX_SERDES_ALT_DATA0;
27213    output [15:0] TX_SERDES_ALT_DATA1;
27214    output [15:0] TX_SERDES_ALT_DATA2;
27215    output [15:0] TX_SERDES_ALT_DATA3;
27216    output [63:0] TX_SERDES_DATA0;
27217    output [63:0] TX_SERDES_DATA1;
27218    output [63:0] TX_SERDES_DATA2;
27219    output [63:0] TX_SERDES_DATA3;
27220    output [31:0] TX_SERDES_DATA4;
27221    output [31:0] TX_SERDES_DATA5;
27222    output [31:0] TX_SERDES_DATA6;
27223    output [31:0] TX_SERDES_DATA7;
27224    output [31:0] TX_SERDES_DATA8;
27225    output [31:0] TX_SERDES_DATA9;
27226    output TX_UNFOUT;
27227    input CTL_CAUI4_MODE;
27228    input CTL_RSFEC_ENABLE_TRANSCODER_BYPASS_MODE;
27229    input CTL_RSFEC_IEEE_ERROR_INDICATION_MODE;
27230    input CTL_RX_CHECK_ETYPE_GCP;
27231    input CTL_RX_CHECK_ETYPE_GPP;
27232    input CTL_RX_CHECK_ETYPE_PCP;
27233    input CTL_RX_CHECK_ETYPE_PPP;
27234    input CTL_RX_CHECK_MCAST_GCP;
27235    input CTL_RX_CHECK_MCAST_GPP;
27236    input CTL_RX_CHECK_MCAST_PCP;
27237    input CTL_RX_CHECK_MCAST_PPP;
27238    input CTL_RX_CHECK_OPCODE_GCP;
27239    input CTL_RX_CHECK_OPCODE_GPP;
27240    input CTL_RX_CHECK_OPCODE_PCP;
27241    input CTL_RX_CHECK_OPCODE_PPP;
27242    input CTL_RX_CHECK_SA_GCP;
27243    input CTL_RX_CHECK_SA_GPP;
27244    input CTL_RX_CHECK_SA_PCP;
27245    input CTL_RX_CHECK_SA_PPP;
27246    input CTL_RX_CHECK_UCAST_GCP;
27247    input CTL_RX_CHECK_UCAST_GPP;
27248    input CTL_RX_CHECK_UCAST_PCP;
27249    input CTL_RX_CHECK_UCAST_PPP;
27250    input CTL_RX_ENABLE;
27251    input CTL_RX_ENABLE_GCP;
27252    input CTL_RX_ENABLE_GPP;
27253    input CTL_RX_ENABLE_PCP;
27254    input CTL_RX_ENABLE_PPP;
27255    input CTL_RX_FORCE_RESYNC;
27256    input [8:0] CTL_RX_PAUSE_ACK;
27257    input [8:0] CTL_RX_PAUSE_ENABLE;
27258    input CTL_RX_RSFEC_ENABLE;
27259    input CTL_RX_RSFEC_ENABLE_CORRECTION;
27260    input CTL_RX_RSFEC_ENABLE_INDICATION;
27261    input [79:0] CTL_RX_SYSTEMTIMERIN;
27262    input CTL_RX_TEST_PATTERN;
27263    input CTL_TX_ENABLE;
27264    input CTL_TX_LANE0_VLM_BIP7_OVERRIDE;
27265    input [7:0] CTL_TX_LANE0_VLM_BIP7_OVERRIDE_VALUE;
27266    input [8:0] CTL_TX_PAUSE_ENABLE;
27267    input [15:0] CTL_TX_PAUSE_QUANTA0;
27268    input [15:0] CTL_TX_PAUSE_QUANTA1;
27269    input [15:0] CTL_TX_PAUSE_QUANTA2;
27270    input [15:0] CTL_TX_PAUSE_QUANTA3;
27271    input [15:0] CTL_TX_PAUSE_QUANTA4;
27272    input [15:0] CTL_TX_PAUSE_QUANTA5;
27273    input [15:0] CTL_TX_PAUSE_QUANTA6;
27274    input [15:0] CTL_TX_PAUSE_QUANTA7;
27275    input [15:0] CTL_TX_PAUSE_QUANTA8;
27276    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER0;
27277    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER1;
27278    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER2;
27279    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER3;
27280    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER4;
27281    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER5;
27282    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER6;
27283    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER7;
27284    input [15:0] CTL_TX_PAUSE_REFRESH_TIMER8;
27285    input [8:0] CTL_TX_PAUSE_REQ;
27286    input CTL_TX_PTP_VLANE_ADJUST_MODE;
27287    input CTL_TX_RESEND_PAUSE;
27288    input CTL_TX_RSFEC_ENABLE;
27289    input CTL_TX_SEND_IDLE;
27290    input CTL_TX_SEND_LFI;
27291    input CTL_TX_SEND_RFI;
27292    input [79:0] CTL_TX_SYSTEMTIMERIN;
27293    input CTL_TX_TEST_PATTERN;
27294    input [9:0] DRP_ADDR;
27295    input DRP_CLK;
27296    input [15:0] DRP_DI;
27297    input DRP_EN;
27298    input DRP_WE;
27299    input [329:0] RSFEC_BYPASS_RX_DIN;
27300    input RSFEC_BYPASS_RX_DIN_CW_START;
27301    input [329:0] RSFEC_BYPASS_TX_DIN;
27302    input RSFEC_BYPASS_TX_DIN_CW_START;
27303    input RX_CLK;
27304    input RX_RESET;
27305    input [15:0] RX_SERDES_ALT_DATA0;
27306    input [15:0] RX_SERDES_ALT_DATA1;
27307    input [15:0] RX_SERDES_ALT_DATA2;
27308    input [15:0] RX_SERDES_ALT_DATA3;
27309    input [9:0] RX_SERDES_CLK;
27310    input [63:0] RX_SERDES_DATA0;
27311    input [63:0] RX_SERDES_DATA1;
27312    input [63:0] RX_SERDES_DATA2;
27313    input [63:0] RX_SERDES_DATA3;
27314    input [31:0] RX_SERDES_DATA4;
27315    input [31:0] RX_SERDES_DATA5;
27316    input [31:0] RX_SERDES_DATA6;
27317    input [31:0] RX_SERDES_DATA7;
27318    input [31:0] RX_SERDES_DATA8;
27319    input [31:0] RX_SERDES_DATA9;
27320    input [9:0] RX_SERDES_RESET;
27321    input TX_CLK;
27322    input [127:0] TX_DATAIN0;
27323    input [127:0] TX_DATAIN1;
27324    input [127:0] TX_DATAIN2;
27325    input [127:0] TX_DATAIN3;
27326    input TX_ENAIN0;
27327    input TX_ENAIN1;
27328    input TX_ENAIN2;
27329    input TX_ENAIN3;
27330    input TX_EOPIN0;
27331    input TX_EOPIN1;
27332    input TX_EOPIN2;
27333    input TX_EOPIN3;
27334    input TX_ERRIN0;
27335    input TX_ERRIN1;
27336    input TX_ERRIN2;
27337    input TX_ERRIN3;
27338    input [3:0] TX_MTYIN0;
27339    input [3:0] TX_MTYIN1;
27340    input [3:0] TX_MTYIN2;
27341    input [3:0] TX_MTYIN3;
27342    input [55:0] TX_PREIN;
27343    input [1:0] TX_PTP_1588OP_IN;
27344    input [15:0] TX_PTP_CHKSUM_OFFSET_IN;
27345    input [63:0] TX_PTP_RXTSTAMP_IN;
27346    input [15:0] TX_PTP_TAG_FIELD_IN;
27347    input [15:0] TX_PTP_TSTAMP_OFFSET_IN;
27348    input TX_PTP_UPD_CHKSUM_IN;
27349    input TX_RESET;
27350    input TX_SOPIN0;
27351    input TX_SOPIN1;
27352    input TX_SOPIN2;
27353    input TX_SOPIN3;
27354endmodule
27355
27356module MCB (...);
27357    parameter integer ARB_NUM_TIME_SLOTS = 12;
27358    parameter [17:0] ARB_TIME_SLOT_0 = 18'b111111111111111111;
27359    parameter [17:0] ARB_TIME_SLOT_1 = 18'b111111111111111111;
27360    parameter [17:0] ARB_TIME_SLOT_10 = 18'b111111111111111111;
27361    parameter [17:0] ARB_TIME_SLOT_11 = 18'b111111111111111111;
27362    parameter [17:0] ARB_TIME_SLOT_2 = 18'b111111111111111111;
27363    parameter [17:0] ARB_TIME_SLOT_3 = 18'b111111111111111111;
27364    parameter [17:0] ARB_TIME_SLOT_4 = 18'b111111111111111111;
27365    parameter [17:0] ARB_TIME_SLOT_5 = 18'b111111111111111111;
27366    parameter [17:0] ARB_TIME_SLOT_6 = 18'b111111111111111111;
27367    parameter [17:0] ARB_TIME_SLOT_7 = 18'b111111111111111111;
27368    parameter [17:0] ARB_TIME_SLOT_8 = 18'b111111111111111111;
27369    parameter [17:0] ARB_TIME_SLOT_9 = 18'b111111111111111111;
27370    parameter [2:0] CAL_BA = 3'h0;
27371    parameter CAL_BYPASS = "YES";
27372    parameter [11:0] CAL_CA = 12'h000;
27373    parameter CAL_CALIBRATION_MODE = "NOCALIBRATION";
27374    parameter integer CAL_CLK_DIV = 1;
27375    parameter CAL_DELAY = "QUARTER";
27376    parameter [14:0] CAL_RA = 15'h0000;
27377    parameter MEM_ADDR_ORDER = "BANK_ROW_COLUMN";
27378    parameter integer MEM_BA_SIZE = 3;
27379    parameter integer MEM_BURST_LEN = 8;
27380    parameter integer MEM_CAS_LATENCY = 4;
27381    parameter integer MEM_CA_SIZE = 11;
27382    parameter MEM_DDR1_2_ODS = "FULL";
27383    parameter MEM_DDR2_3_HIGH_TEMP_SR = "NORMAL";
27384    parameter MEM_DDR2_3_PA_SR = "FULL";
27385    parameter integer MEM_DDR2_ADD_LATENCY = 0;
27386    parameter MEM_DDR2_DIFF_DQS_EN = "YES";
27387    parameter MEM_DDR2_RTT = "50OHMS";
27388    parameter integer MEM_DDR2_WRT_RECOVERY = 4;
27389    parameter MEM_DDR3_ADD_LATENCY = "OFF";
27390    parameter MEM_DDR3_AUTO_SR = "ENABLED";
27391    parameter integer MEM_DDR3_CAS_LATENCY = 7;
27392    parameter integer MEM_DDR3_CAS_WR_LATENCY = 5;
27393    parameter MEM_DDR3_DYN_WRT_ODT = "OFF";
27394    parameter MEM_DDR3_ODS = "DIV7";
27395    parameter MEM_DDR3_RTT = "DIV2";
27396    parameter integer MEM_DDR3_WRT_RECOVERY = 7;
27397    parameter MEM_MDDR_ODS = "FULL";
27398    parameter MEM_MOBILE_PA_SR = "FULL";
27399    parameter integer MEM_MOBILE_TC_SR = 0;
27400    parameter integer MEM_RAS_VAL = 0;
27401    parameter integer MEM_RA_SIZE = 13;
27402    parameter integer MEM_RCD_VAL = 1;
27403    parameter integer MEM_REFI_VAL = 0;
27404    parameter integer MEM_RFC_VAL = 0;
27405    parameter integer MEM_RP_VAL = 0;
27406    parameter integer MEM_RTP_VAL = 0;
27407    parameter MEM_TYPE = "DDR3";
27408    parameter integer MEM_WIDTH = 4;
27409    parameter integer MEM_WR_VAL = 0;
27410    parameter integer MEM_WTR_VAL = 3;
27411    parameter PORT_CONFIG = "B32_B32_B32_B32";
27412    output CAS;
27413    output CKE;
27414    output DQIOWEN0;
27415    output DQSIOWEN90N;
27416    output DQSIOWEN90P;
27417    output IOIDRPADD;
27418    output IOIDRPBROADCAST;
27419    output IOIDRPCLK;
27420    output IOIDRPCS;
27421    output IOIDRPSDO;
27422    output IOIDRPTRAIN;
27423    output IOIDRPUPDATE;
27424    output LDMN;
27425    output LDMP;
27426    output ODT;
27427    output P0CMDEMPTY;
27428    output P0CMDFULL;
27429    output P0RDEMPTY;
27430    output P0RDERROR;
27431    output P0RDFULL;
27432    output P0RDOVERFLOW;
27433    output P0WREMPTY;
27434    output P0WRERROR;
27435    output P0WRFULL;
27436    output P0WRUNDERRUN;
27437    output P1CMDEMPTY;
27438    output P1CMDFULL;
27439    output P1RDEMPTY;
27440    output P1RDERROR;
27441    output P1RDFULL;
27442    output P1RDOVERFLOW;
27443    output P1WREMPTY;
27444    output P1WRERROR;
27445    output P1WRFULL;
27446    output P1WRUNDERRUN;
27447    output P2CMDEMPTY;
27448    output P2CMDFULL;
27449    output P2EMPTY;
27450    output P2ERROR;
27451    output P2FULL;
27452    output P2RDOVERFLOW;
27453    output P2WRUNDERRUN;
27454    output P3CMDEMPTY;
27455    output P3CMDFULL;
27456    output P3EMPTY;
27457    output P3ERROR;
27458    output P3FULL;
27459    output P3RDOVERFLOW;
27460    output P3WRUNDERRUN;
27461    output P4CMDEMPTY;
27462    output P4CMDFULL;
27463    output P4EMPTY;
27464    output P4ERROR;
27465    output P4FULL;
27466    output P4RDOVERFLOW;
27467    output P4WRUNDERRUN;
27468    output P5CMDEMPTY;
27469    output P5CMDFULL;
27470    output P5EMPTY;
27471    output P5ERROR;
27472    output P5FULL;
27473    output P5RDOVERFLOW;
27474    output P5WRUNDERRUN;
27475    output RAS;
27476    output RST;
27477    output SELFREFRESHMODE;
27478    output UDMN;
27479    output UDMP;
27480    output UOCALSTART;
27481    output UOCMDREADYIN;
27482    output UODATAVALID;
27483    output UODONECAL;
27484    output UOREFRSHFLAG;
27485    output UOSDO;
27486    output WE;
27487    output [14:0] ADDR;
27488    output [15:0] DQON;
27489    output [15:0] DQOP;
27490    output [2:0] BA;
27491    output [31:0] P0RDDATA;
27492    output [31:0] P1RDDATA;
27493    output [31:0] P2RDDATA;
27494    output [31:0] P3RDDATA;
27495    output [31:0] P4RDDATA;
27496    output [31:0] P5RDDATA;
27497    output [31:0] STATUS;
27498    output [4:0] IOIDRPADDR;
27499    output [6:0] P0RDCOUNT;
27500    output [6:0] P0WRCOUNT;
27501    output [6:0] P1RDCOUNT;
27502    output [6:0] P1WRCOUNT;
27503    output [6:0] P2COUNT;
27504    output [6:0] P3COUNT;
27505    output [6:0] P4COUNT;
27506    output [6:0] P5COUNT;
27507    output [7:0] UODATA;
27508    input DQSIOIN;
27509    input DQSIOIP;
27510    input IOIDRPSDI;
27511    input P0ARBEN;
27512    input P0CMDCLK;
27513    input P0CMDEN;
27514    input P0RDCLK;
27515    input P0RDEN;
27516    input P0WRCLK;
27517    input P0WREN;
27518    input P1ARBEN;
27519    input P1CMDCLK;
27520    input P1CMDEN;
27521    input P1RDCLK;
27522    input P1RDEN;
27523    input P1WRCLK;
27524    input P1WREN;
27525    input P2ARBEN;
27526    input P2CLK;
27527    input P2CMDCLK;
27528    input P2CMDEN;
27529    input P2EN;
27530    input P3ARBEN;
27531    input P3CLK;
27532    input P3CMDCLK;
27533    input P3CMDEN;
27534    input P3EN;
27535    input P4ARBEN;
27536    input P4CLK;
27537    input P4CMDCLK;
27538    input P4CMDEN;
27539    input P4EN;
27540    input P5ARBEN;
27541    input P5CLK;
27542    input P5CMDCLK;
27543    input P5CMDEN;
27544    input P5EN;
27545    input PLLLOCK;
27546    input RECAL;
27547    input SELFREFRESHENTER;
27548    input SYSRST;
27549    input UDQSIOIN;
27550    input UDQSIOIP;
27551    input UIADD;
27552    input UIBROADCAST;
27553    input UICLK;
27554    input UICMD;
27555    input UICMDEN;
27556    input UICMDIN;
27557    input UICS;
27558    input UIDONECAL;
27559    input UIDQLOWERDEC;
27560    input UIDQLOWERINC;
27561    input UIDQUPPERDEC;
27562    input UIDQUPPERINC;
27563    input UIDRPUPDATE;
27564    input UILDQSDEC;
27565    input UILDQSINC;
27566    input UIREAD;
27567    input UISDI;
27568    input UIUDQSDEC;
27569    input UIUDQSINC;
27570    input [11:0] P0CMDCA;
27571    input [11:0] P1CMDCA;
27572    input [11:0] P2CMDCA;
27573    input [11:0] P3CMDCA;
27574    input [11:0] P4CMDCA;
27575    input [11:0] P5CMDCA;
27576    input [14:0] P0CMDRA;
27577    input [14:0] P1CMDRA;
27578    input [14:0] P2CMDRA;
27579    input [14:0] P3CMDRA;
27580    input [14:0] P4CMDRA;
27581    input [14:0] P5CMDRA;
27582    input [15:0] DQI;
27583    input [1:0] PLLCE;
27584    input [1:0] PLLCLK;
27585    input [2:0] P0CMDBA;
27586    input [2:0] P0CMDINSTR;
27587    input [2:0] P1CMDBA;
27588    input [2:0] P1CMDINSTR;
27589    input [2:0] P2CMDBA;
27590    input [2:0] P2CMDINSTR;
27591    input [2:0] P3CMDBA;
27592    input [2:0] P3CMDINSTR;
27593    input [2:0] P4CMDBA;
27594    input [2:0] P4CMDINSTR;
27595    input [2:0] P5CMDBA;
27596    input [2:0] P5CMDINSTR;
27597    input [31:0] P0WRDATA;
27598    input [31:0] P1WRDATA;
27599    input [31:0] P2WRDATA;
27600    input [31:0] P3WRDATA;
27601    input [31:0] P4WRDATA;
27602    input [31:0] P5WRDATA;
27603    input [3:0] P0RWRMASK;
27604    input [3:0] P1RWRMASK;
27605    input [3:0] P2WRMASK;
27606    input [3:0] P3WRMASK;
27607    input [3:0] P4WRMASK;
27608    input [3:0] P5WRMASK;
27609    input [3:0] UIDQCOUNT;
27610    input [4:0] UIADDR;
27611    input [5:0] P0CMDBL;
27612    input [5:0] P1CMDBL;
27613    input [5:0] P2CMDBL;
27614    input [5:0] P3CMDBL;
27615    input [5:0] P4CMDBL;
27616    input [5:0] P5CMDBL;
27617endmodule
27618
27619(* keep *)
27620module HBM_REF_CLK (...);
27621    input REF_CLK;
27622endmodule
27623
27624(* keep *)
27625module HBM_SNGLBLI_INTF_APB (...);
27626    parameter CLK_SEL = "FALSE";
27627    parameter [0:0] IS_PCLK_INVERTED = 1'b0;
27628    parameter [0:0] IS_PRESET_N_INVERTED = 1'b0;
27629    parameter MC_ENABLE = "FALSE";
27630    parameter PHY_ENABLE = "FALSE";
27631    parameter PHY_PCLK_INVERT = "FALSE";
27632    parameter SWITCH_ENABLE = "FALSE";
27633    output CATTRIP_PIPE;
27634    output [31:0] PRDATA_PIPE;
27635    output PREADY_PIPE;
27636    output PSLVERR_PIPE;
27637    output [2:0] TEMP_PIPE;
27638    input [21:0] PADDR;
27639    (* invertible_pin = "IS_PCLK_INVERTED" *)
27640    input PCLK;
27641    input PENABLE;
27642    (* invertible_pin = "IS_PRESET_N_INVERTED" *)
27643    input PRESET_N;
27644    input PSEL;
27645    input [31:0] PWDATA;
27646    input PWRITE;
27647endmodule
27648
27649(* keep *)
27650module HBM_SNGLBLI_INTF_AXI (...);
27651    parameter CLK_SEL = "FALSE";
27652    parameter integer DATARATE = 1800;
27653    parameter [0:0] IS_ACLK_INVERTED = 1'b0;
27654    parameter [0:0] IS_ARESET_N_INVERTED = 1'b0;
27655    parameter MC_ENABLE = "FALSE";
27656    parameter integer PAGEHIT_PERCENT = 75;
27657    parameter PHY_ENABLE = "FALSE";
27658    parameter integer READ_PERCENT = 50;
27659    parameter SWITCH_ENABLE = "FALSE";
27660    parameter integer WRITE_PERCENT = 50;
27661    output ARREADY_PIPE;
27662    output AWREADY_PIPE;
27663    output [5:0] BID_PIPE;
27664    output [1:0] BRESP_PIPE;
27665    output BVALID_PIPE;
27666    output [1:0] DFI_AW_AERR_N_PIPE;
27667    output DFI_CLK_BUF;
27668    output DFI_CTRLUPD_ACK_PIPE;
27669    output [7:0] DFI_DBI_BYTE_DISABLE_PIPE;
27670    output [20:0] DFI_DW_RDDATA_DBI_PIPE;
27671    output [7:0] DFI_DW_RDDATA_DERR_PIPE;
27672    output [1:0] DFI_DW_RDDATA_PAR_VALID_PIPE;
27673    output [1:0] DFI_DW_RDDATA_VALID_PIPE;
27674    output DFI_INIT_COMPLETE_PIPE;
27675    output DFI_PHYUPD_REQ_PIPE;
27676    output DFI_PHYUPD_TYPE_PIPE;
27677    output DFI_PHY_LP_STATE_PIPE;
27678    output DFI_RST_N_BUF;
27679    output [5:0] MC_STATUS;
27680    output [7:0] PHY_STATUS;
27681    output [31:0] RDATA_PARITY_PIPE;
27682    output [255:0] RDATA_PIPE;
27683    output [5:0] RID_PIPE;
27684    output RLAST_PIPE;
27685    output [1:0] RRESP_PIPE;
27686    output RVALID_PIPE;
27687    output [5:0] STATUS;
27688    output WREADY_PIPE;
27689    (* invertible_pin = "IS_ACLK_INVERTED" *)
27690    input ACLK;
27691    input [36:0] ARADDR;
27692    input [1:0] ARBURST;
27693    (* invertible_pin = "IS_ARESET_N_INVERTED" *)
27694    input ARESET_N;
27695    input [5:0] ARID;
27696    input [3:0] ARLEN;
27697    input [2:0] ARSIZE;
27698    input ARVALID;
27699    input [36:0] AWADDR;
27700    input [1:0] AWBURST;
27701    input [5:0] AWID;
27702    input [3:0] AWLEN;
27703    input [2:0] AWSIZE;
27704    input AWVALID;
27705    input BREADY;
27706    input BSCAN_CK;
27707    input DFI_LP_PWR_X_REQ;
27708    input MBIST_EN;
27709    input RREADY;
27710    input [255:0] WDATA;
27711    input [31:0] WDATA_PARITY;
27712    input WLAST;
27713    input [31:0] WSTRB;
27714    input WVALID;
27715endmodule
27716
27717(* keep *)
27718module HBM_ONE_STACK_INTF (...);
27719    parameter CLK_SEL_00 = "FALSE";
27720    parameter CLK_SEL_01 = "FALSE";
27721    parameter CLK_SEL_02 = "FALSE";
27722    parameter CLK_SEL_03 = "FALSE";
27723    parameter CLK_SEL_04 = "FALSE";
27724    parameter CLK_SEL_05 = "FALSE";
27725    parameter CLK_SEL_06 = "FALSE";
27726    parameter CLK_SEL_07 = "FALSE";
27727    parameter CLK_SEL_08 = "FALSE";
27728    parameter CLK_SEL_09 = "FALSE";
27729    parameter CLK_SEL_10 = "FALSE";
27730    parameter CLK_SEL_11 = "FALSE";
27731    parameter CLK_SEL_12 = "FALSE";
27732    parameter CLK_SEL_13 = "FALSE";
27733    parameter CLK_SEL_14 = "FALSE";
27734    parameter CLK_SEL_15 = "FALSE";
27735    parameter integer DATARATE_00 = 1800;
27736    parameter integer DATARATE_01 = 1800;
27737    parameter integer DATARATE_02 = 1800;
27738    parameter integer DATARATE_03 = 1800;
27739    parameter integer DATARATE_04 = 1800;
27740    parameter integer DATARATE_05 = 1800;
27741    parameter integer DATARATE_06 = 1800;
27742    parameter integer DATARATE_07 = 1800;
27743    parameter DA_LOCKOUT = "FALSE";
27744    parameter [0:0] IS_APB_0_PCLK_INVERTED = 1'b0;
27745    parameter [0:0] IS_APB_0_PRESET_N_INVERTED = 1'b0;
27746    parameter [0:0] IS_AXI_00_ACLK_INVERTED = 1'b0;
27747    parameter [0:0] IS_AXI_00_ARESET_N_INVERTED = 1'b0;
27748    parameter [0:0] IS_AXI_01_ACLK_INVERTED = 1'b0;
27749    parameter [0:0] IS_AXI_01_ARESET_N_INVERTED = 1'b0;
27750    parameter [0:0] IS_AXI_02_ACLK_INVERTED = 1'b0;
27751    parameter [0:0] IS_AXI_02_ARESET_N_INVERTED = 1'b0;
27752    parameter [0:0] IS_AXI_03_ACLK_INVERTED = 1'b0;
27753    parameter [0:0] IS_AXI_03_ARESET_N_INVERTED = 1'b0;
27754    parameter [0:0] IS_AXI_04_ACLK_INVERTED = 1'b0;
27755    parameter [0:0] IS_AXI_04_ARESET_N_INVERTED = 1'b0;
27756    parameter [0:0] IS_AXI_05_ACLK_INVERTED = 1'b0;
27757    parameter [0:0] IS_AXI_05_ARESET_N_INVERTED = 1'b0;
27758    parameter [0:0] IS_AXI_06_ACLK_INVERTED = 1'b0;
27759    parameter [0:0] IS_AXI_06_ARESET_N_INVERTED = 1'b0;
27760    parameter [0:0] IS_AXI_07_ACLK_INVERTED = 1'b0;
27761    parameter [0:0] IS_AXI_07_ARESET_N_INVERTED = 1'b0;
27762    parameter [0:0] IS_AXI_08_ACLK_INVERTED = 1'b0;
27763    parameter [0:0] IS_AXI_08_ARESET_N_INVERTED = 1'b0;
27764    parameter [0:0] IS_AXI_09_ACLK_INVERTED = 1'b0;
27765    parameter [0:0] IS_AXI_09_ARESET_N_INVERTED = 1'b0;
27766    parameter [0:0] IS_AXI_10_ACLK_INVERTED = 1'b0;
27767    parameter [0:0] IS_AXI_10_ARESET_N_INVERTED = 1'b0;
27768    parameter [0:0] IS_AXI_11_ACLK_INVERTED = 1'b0;
27769    parameter [0:0] IS_AXI_11_ARESET_N_INVERTED = 1'b0;
27770    parameter [0:0] IS_AXI_12_ACLK_INVERTED = 1'b0;
27771    parameter [0:0] IS_AXI_12_ARESET_N_INVERTED = 1'b0;
27772    parameter [0:0] IS_AXI_13_ACLK_INVERTED = 1'b0;
27773    parameter [0:0] IS_AXI_13_ARESET_N_INVERTED = 1'b0;
27774    parameter [0:0] IS_AXI_14_ACLK_INVERTED = 1'b0;
27775    parameter [0:0] IS_AXI_14_ARESET_N_INVERTED = 1'b0;
27776    parameter [0:0] IS_AXI_15_ACLK_INVERTED = 1'b0;
27777    parameter [0:0] IS_AXI_15_ARESET_N_INVERTED = 1'b0;
27778    parameter MC_ENABLE_0 = "FALSE";
27779    parameter MC_ENABLE_1 = "FALSE";
27780    parameter MC_ENABLE_2 = "FALSE";
27781    parameter MC_ENABLE_3 = "FALSE";
27782    parameter MC_ENABLE_4 = "FALSE";
27783    parameter MC_ENABLE_5 = "FALSE";
27784    parameter MC_ENABLE_6 = "FALSE";
27785    parameter MC_ENABLE_7 = "FALSE";
27786    parameter MC_ENABLE_APB = "FALSE";
27787    parameter integer PAGEHIT_PERCENT_00 = 75;
27788    parameter PHY_ENABLE_00 = "FALSE";
27789    parameter PHY_ENABLE_01 = "FALSE";
27790    parameter PHY_ENABLE_02 = "FALSE";
27791    parameter PHY_ENABLE_03 = "FALSE";
27792    parameter PHY_ENABLE_04 = "FALSE";
27793    parameter PHY_ENABLE_05 = "FALSE";
27794    parameter PHY_ENABLE_06 = "FALSE";
27795    parameter PHY_ENABLE_07 = "FALSE";
27796    parameter PHY_ENABLE_08 = "FALSE";
27797    parameter PHY_ENABLE_09 = "FALSE";
27798    parameter PHY_ENABLE_10 = "FALSE";
27799    parameter PHY_ENABLE_11 = "FALSE";
27800    parameter PHY_ENABLE_12 = "FALSE";
27801    parameter PHY_ENABLE_13 = "FALSE";
27802    parameter PHY_ENABLE_14 = "FALSE";
27803    parameter PHY_ENABLE_15 = "FALSE";
27804    parameter PHY_ENABLE_APB = "FALSE";
27805    parameter PHY_PCLK_INVERT_01 = "FALSE";
27806    parameter integer READ_PERCENT_00 = 50;
27807    parameter integer READ_PERCENT_01 = 50;
27808    parameter integer READ_PERCENT_02 = 50;
27809    parameter integer READ_PERCENT_03 = 50;
27810    parameter integer READ_PERCENT_04 = 50;
27811    parameter integer READ_PERCENT_05 = 50;
27812    parameter integer READ_PERCENT_06 = 50;
27813    parameter integer READ_PERCENT_07 = 50;
27814    parameter integer READ_PERCENT_08 = 50;
27815    parameter integer READ_PERCENT_09 = 50;
27816    parameter integer READ_PERCENT_10 = 50;
27817    parameter integer READ_PERCENT_11 = 50;
27818    parameter integer READ_PERCENT_12 = 50;
27819    parameter integer READ_PERCENT_13 = 50;
27820    parameter integer READ_PERCENT_14 = 50;
27821    parameter integer READ_PERCENT_15 = 50;
27822    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
27823    parameter integer STACK_LOCATION = 0;
27824    parameter SWITCH_ENABLE = "FALSE";
27825    parameter integer WRITE_PERCENT_00 = 50;
27826    parameter integer WRITE_PERCENT_01 = 50;
27827    parameter integer WRITE_PERCENT_02 = 50;
27828    parameter integer WRITE_PERCENT_03 = 50;
27829    parameter integer WRITE_PERCENT_04 = 50;
27830    parameter integer WRITE_PERCENT_05 = 50;
27831    parameter integer WRITE_PERCENT_06 = 50;
27832    parameter integer WRITE_PERCENT_07 = 50;
27833    parameter integer WRITE_PERCENT_08 = 50;
27834    parameter integer WRITE_PERCENT_09 = 50;
27835    parameter integer WRITE_PERCENT_10 = 50;
27836    parameter integer WRITE_PERCENT_11 = 50;
27837    parameter integer WRITE_PERCENT_12 = 50;
27838    parameter integer WRITE_PERCENT_13 = 50;
27839    parameter integer WRITE_PERCENT_14 = 50;
27840    parameter integer WRITE_PERCENT_15 = 50;
27841    output [31:0] APB_0_PRDATA;
27842    output APB_0_PREADY;
27843    output APB_0_PSLVERR;
27844    output AXI_00_ARREADY;
27845    output AXI_00_AWREADY;
27846    output [5:0] AXI_00_BID;
27847    output [1:0] AXI_00_BRESP;
27848    output AXI_00_BVALID;
27849    output [1:0] AXI_00_DFI_AW_AERR_N;
27850    output AXI_00_DFI_CLK_BUF;
27851    output [7:0] AXI_00_DFI_DBI_BYTE_DISABLE;
27852    output [20:0] AXI_00_DFI_DW_RDDATA_DBI;
27853    output [7:0] AXI_00_DFI_DW_RDDATA_DERR;
27854    output [1:0] AXI_00_DFI_DW_RDDATA_VALID;
27855    output AXI_00_DFI_INIT_COMPLETE;
27856    output AXI_00_DFI_PHYUPD_REQ;
27857    output AXI_00_DFI_PHY_LP_STATE;
27858    output AXI_00_DFI_RST_N_BUF;
27859    output [5:0] AXI_00_MC_STATUS;
27860    output [7:0] AXI_00_PHY_STATUS;
27861    output [255:0] AXI_00_RDATA;
27862    output [31:0] AXI_00_RDATA_PARITY;
27863    output [5:0] AXI_00_RID;
27864    output AXI_00_RLAST;
27865    output [1:0] AXI_00_RRESP;
27866    output AXI_00_RVALID;
27867    output AXI_00_WREADY;
27868    output AXI_01_ARREADY;
27869    output AXI_01_AWREADY;
27870    output [5:0] AXI_01_BID;
27871    output [1:0] AXI_01_BRESP;
27872    output AXI_01_BVALID;
27873    output [1:0] AXI_01_DFI_AW_AERR_N;
27874    output AXI_01_DFI_CLK_BUF;
27875    output [7:0] AXI_01_DFI_DBI_BYTE_DISABLE;
27876    output [20:0] AXI_01_DFI_DW_RDDATA_DBI;
27877    output [7:0] AXI_01_DFI_DW_RDDATA_DERR;
27878    output [1:0] AXI_01_DFI_DW_RDDATA_VALID;
27879    output AXI_01_DFI_INIT_COMPLETE;
27880    output AXI_01_DFI_PHYUPD_REQ;
27881    output AXI_01_DFI_PHY_LP_STATE;
27882    output AXI_01_DFI_RST_N_BUF;
27883    output [255:0] AXI_01_RDATA;
27884    output [31:0] AXI_01_RDATA_PARITY;
27885    output [5:0] AXI_01_RID;
27886    output AXI_01_RLAST;
27887    output [1:0] AXI_01_RRESP;
27888    output AXI_01_RVALID;
27889    output AXI_01_WREADY;
27890    output AXI_02_ARREADY;
27891    output AXI_02_AWREADY;
27892    output [5:0] AXI_02_BID;
27893    output [1:0] AXI_02_BRESP;
27894    output AXI_02_BVALID;
27895    output [1:0] AXI_02_DFI_AW_AERR_N;
27896    output AXI_02_DFI_CLK_BUF;
27897    output [7:0] AXI_02_DFI_DBI_BYTE_DISABLE;
27898    output [20:0] AXI_02_DFI_DW_RDDATA_DBI;
27899    output [7:0] AXI_02_DFI_DW_RDDATA_DERR;
27900    output [1:0] AXI_02_DFI_DW_RDDATA_VALID;
27901    output AXI_02_DFI_INIT_COMPLETE;
27902    output AXI_02_DFI_PHYUPD_REQ;
27903    output AXI_02_DFI_PHY_LP_STATE;
27904    output AXI_02_DFI_RST_N_BUF;
27905    output [5:0] AXI_02_MC_STATUS;
27906    output [7:0] AXI_02_PHY_STATUS;
27907    output [255:0] AXI_02_RDATA;
27908    output [31:0] AXI_02_RDATA_PARITY;
27909    output [5:0] AXI_02_RID;
27910    output AXI_02_RLAST;
27911    output [1:0] AXI_02_RRESP;
27912    output AXI_02_RVALID;
27913    output AXI_02_WREADY;
27914    output AXI_03_ARREADY;
27915    output AXI_03_AWREADY;
27916    output [5:0] AXI_03_BID;
27917    output [1:0] AXI_03_BRESP;
27918    output AXI_03_BVALID;
27919    output [1:0] AXI_03_DFI_AW_AERR_N;
27920    output AXI_03_DFI_CLK_BUF;
27921    output [7:0] AXI_03_DFI_DBI_BYTE_DISABLE;
27922    output [20:0] AXI_03_DFI_DW_RDDATA_DBI;
27923    output [7:0] AXI_03_DFI_DW_RDDATA_DERR;
27924    output [1:0] AXI_03_DFI_DW_RDDATA_VALID;
27925    output AXI_03_DFI_INIT_COMPLETE;
27926    output AXI_03_DFI_PHYUPD_REQ;
27927    output AXI_03_DFI_PHY_LP_STATE;
27928    output AXI_03_DFI_RST_N_BUF;
27929    output [255:0] AXI_03_RDATA;
27930    output [31:0] AXI_03_RDATA_PARITY;
27931    output [5:0] AXI_03_RID;
27932    output AXI_03_RLAST;
27933    output [1:0] AXI_03_RRESP;
27934    output AXI_03_RVALID;
27935    output AXI_03_WREADY;
27936    output AXI_04_ARREADY;
27937    output AXI_04_AWREADY;
27938    output [5:0] AXI_04_BID;
27939    output [1:0] AXI_04_BRESP;
27940    output AXI_04_BVALID;
27941    output [1:0] AXI_04_DFI_AW_AERR_N;
27942    output AXI_04_DFI_CLK_BUF;
27943    output [7:0] AXI_04_DFI_DBI_BYTE_DISABLE;
27944    output [20:0] AXI_04_DFI_DW_RDDATA_DBI;
27945    output [7:0] AXI_04_DFI_DW_RDDATA_DERR;
27946    output [1:0] AXI_04_DFI_DW_RDDATA_VALID;
27947    output AXI_04_DFI_INIT_COMPLETE;
27948    output AXI_04_DFI_PHYUPD_REQ;
27949    output AXI_04_DFI_PHY_LP_STATE;
27950    output AXI_04_DFI_RST_N_BUF;
27951    output [5:0] AXI_04_MC_STATUS;
27952    output [7:0] AXI_04_PHY_STATUS;
27953    output [255:0] AXI_04_RDATA;
27954    output [31:0] AXI_04_RDATA_PARITY;
27955    output [5:0] AXI_04_RID;
27956    output AXI_04_RLAST;
27957    output [1:0] AXI_04_RRESP;
27958    output AXI_04_RVALID;
27959    output AXI_04_WREADY;
27960    output AXI_05_ARREADY;
27961    output AXI_05_AWREADY;
27962    output [5:0] AXI_05_BID;
27963    output [1:0] AXI_05_BRESP;
27964    output AXI_05_BVALID;
27965    output [1:0] AXI_05_DFI_AW_AERR_N;
27966    output AXI_05_DFI_CLK_BUF;
27967    output [7:0] AXI_05_DFI_DBI_BYTE_DISABLE;
27968    output [20:0] AXI_05_DFI_DW_RDDATA_DBI;
27969    output [7:0] AXI_05_DFI_DW_RDDATA_DERR;
27970    output [1:0] AXI_05_DFI_DW_RDDATA_VALID;
27971    output AXI_05_DFI_INIT_COMPLETE;
27972    output AXI_05_DFI_PHYUPD_REQ;
27973    output AXI_05_DFI_PHY_LP_STATE;
27974    output AXI_05_DFI_RST_N_BUF;
27975    output [255:0] AXI_05_RDATA;
27976    output [31:0] AXI_05_RDATA_PARITY;
27977    output [5:0] AXI_05_RID;
27978    output AXI_05_RLAST;
27979    output [1:0] AXI_05_RRESP;
27980    output AXI_05_RVALID;
27981    output AXI_05_WREADY;
27982    output AXI_06_ARREADY;
27983    output AXI_06_AWREADY;
27984    output [5:0] AXI_06_BID;
27985    output [1:0] AXI_06_BRESP;
27986    output AXI_06_BVALID;
27987    output [1:0] AXI_06_DFI_AW_AERR_N;
27988    output AXI_06_DFI_CLK_BUF;
27989    output [7:0] AXI_06_DFI_DBI_BYTE_DISABLE;
27990    output [20:0] AXI_06_DFI_DW_RDDATA_DBI;
27991    output [7:0] AXI_06_DFI_DW_RDDATA_DERR;
27992    output [1:0] AXI_06_DFI_DW_RDDATA_VALID;
27993    output AXI_06_DFI_INIT_COMPLETE;
27994    output AXI_06_DFI_PHYUPD_REQ;
27995    output AXI_06_DFI_PHY_LP_STATE;
27996    output AXI_06_DFI_RST_N_BUF;
27997    output [5:0] AXI_06_MC_STATUS;
27998    output [7:0] AXI_06_PHY_STATUS;
27999    output [255:0] AXI_06_RDATA;
28000    output [31:0] AXI_06_RDATA_PARITY;
28001    output [5:0] AXI_06_RID;
28002    output AXI_06_RLAST;
28003    output [1:0] AXI_06_RRESP;
28004    output AXI_06_RVALID;
28005    output AXI_06_WREADY;
28006    output AXI_07_ARREADY;
28007    output AXI_07_AWREADY;
28008    output [5:0] AXI_07_BID;
28009    output [1:0] AXI_07_BRESP;
28010    output AXI_07_BVALID;
28011    output [1:0] AXI_07_DFI_AW_AERR_N;
28012    output AXI_07_DFI_CLK_BUF;
28013    output [7:0] AXI_07_DFI_DBI_BYTE_DISABLE;
28014    output [20:0] AXI_07_DFI_DW_RDDATA_DBI;
28015    output [7:0] AXI_07_DFI_DW_RDDATA_DERR;
28016    output [1:0] AXI_07_DFI_DW_RDDATA_VALID;
28017    output AXI_07_DFI_INIT_COMPLETE;
28018    output AXI_07_DFI_PHYUPD_REQ;
28019    output AXI_07_DFI_PHY_LP_STATE;
28020    output AXI_07_DFI_RST_N_BUF;
28021    output [255:0] AXI_07_RDATA;
28022    output [31:0] AXI_07_RDATA_PARITY;
28023    output [5:0] AXI_07_RID;
28024    output AXI_07_RLAST;
28025    output [1:0] AXI_07_RRESP;
28026    output AXI_07_RVALID;
28027    output AXI_07_WREADY;
28028    output AXI_08_ARREADY;
28029    output AXI_08_AWREADY;
28030    output [5:0] AXI_08_BID;
28031    output [1:0] AXI_08_BRESP;
28032    output AXI_08_BVALID;
28033    output [1:0] AXI_08_DFI_AW_AERR_N;
28034    output AXI_08_DFI_CLK_BUF;
28035    output [7:0] AXI_08_DFI_DBI_BYTE_DISABLE;
28036    output [20:0] AXI_08_DFI_DW_RDDATA_DBI;
28037    output [7:0] AXI_08_DFI_DW_RDDATA_DERR;
28038    output [1:0] AXI_08_DFI_DW_RDDATA_VALID;
28039    output AXI_08_DFI_INIT_COMPLETE;
28040    output AXI_08_DFI_PHYUPD_REQ;
28041    output AXI_08_DFI_PHY_LP_STATE;
28042    output AXI_08_DFI_RST_N_BUF;
28043    output [5:0] AXI_08_MC_STATUS;
28044    output [7:0] AXI_08_PHY_STATUS;
28045    output [255:0] AXI_08_RDATA;
28046    output [31:0] AXI_08_RDATA_PARITY;
28047    output [5:0] AXI_08_RID;
28048    output AXI_08_RLAST;
28049    output [1:0] AXI_08_RRESP;
28050    output AXI_08_RVALID;
28051    output AXI_08_WREADY;
28052    output AXI_09_ARREADY;
28053    output AXI_09_AWREADY;
28054    output [5:0] AXI_09_BID;
28055    output [1:0] AXI_09_BRESP;
28056    output AXI_09_BVALID;
28057    output [1:0] AXI_09_DFI_AW_AERR_N;
28058    output AXI_09_DFI_CLK_BUF;
28059    output [7:0] AXI_09_DFI_DBI_BYTE_DISABLE;
28060    output [20:0] AXI_09_DFI_DW_RDDATA_DBI;
28061    output [7:0] AXI_09_DFI_DW_RDDATA_DERR;
28062    output [1:0] AXI_09_DFI_DW_RDDATA_VALID;
28063    output AXI_09_DFI_INIT_COMPLETE;
28064    output AXI_09_DFI_PHYUPD_REQ;
28065    output AXI_09_DFI_PHY_LP_STATE;
28066    output AXI_09_DFI_RST_N_BUF;
28067    output [255:0] AXI_09_RDATA;
28068    output [31:0] AXI_09_RDATA_PARITY;
28069    output [5:0] AXI_09_RID;
28070    output AXI_09_RLAST;
28071    output [1:0] AXI_09_RRESP;
28072    output AXI_09_RVALID;
28073    output AXI_09_WREADY;
28074    output AXI_10_ARREADY;
28075    output AXI_10_AWREADY;
28076    output [5:0] AXI_10_BID;
28077    output [1:0] AXI_10_BRESP;
28078    output AXI_10_BVALID;
28079    output [1:0] AXI_10_DFI_AW_AERR_N;
28080    output AXI_10_DFI_CLK_BUF;
28081    output [7:0] AXI_10_DFI_DBI_BYTE_DISABLE;
28082    output [20:0] AXI_10_DFI_DW_RDDATA_DBI;
28083    output [7:0] AXI_10_DFI_DW_RDDATA_DERR;
28084    output [1:0] AXI_10_DFI_DW_RDDATA_VALID;
28085    output AXI_10_DFI_INIT_COMPLETE;
28086    output AXI_10_DFI_PHYUPD_REQ;
28087    output AXI_10_DFI_PHY_LP_STATE;
28088    output AXI_10_DFI_RST_N_BUF;
28089    output [5:0] AXI_10_MC_STATUS;
28090    output [7:0] AXI_10_PHY_STATUS;
28091    output [255:0] AXI_10_RDATA;
28092    output [31:0] AXI_10_RDATA_PARITY;
28093    output [5:0] AXI_10_RID;
28094    output AXI_10_RLAST;
28095    output [1:0] AXI_10_RRESP;
28096    output AXI_10_RVALID;
28097    output AXI_10_WREADY;
28098    output AXI_11_ARREADY;
28099    output AXI_11_AWREADY;
28100    output [5:0] AXI_11_BID;
28101    output [1:0] AXI_11_BRESP;
28102    output AXI_11_BVALID;
28103    output [1:0] AXI_11_DFI_AW_AERR_N;
28104    output AXI_11_DFI_CLK_BUF;
28105    output [7:0] AXI_11_DFI_DBI_BYTE_DISABLE;
28106    output [20:0] AXI_11_DFI_DW_RDDATA_DBI;
28107    output [7:0] AXI_11_DFI_DW_RDDATA_DERR;
28108    output [1:0] AXI_11_DFI_DW_RDDATA_VALID;
28109    output AXI_11_DFI_INIT_COMPLETE;
28110    output AXI_11_DFI_PHYUPD_REQ;
28111    output AXI_11_DFI_PHY_LP_STATE;
28112    output AXI_11_DFI_RST_N_BUF;
28113    output [255:0] AXI_11_RDATA;
28114    output [31:0] AXI_11_RDATA_PARITY;
28115    output [5:0] AXI_11_RID;
28116    output AXI_11_RLAST;
28117    output [1:0] AXI_11_RRESP;
28118    output AXI_11_RVALID;
28119    output AXI_11_WREADY;
28120    output AXI_12_ARREADY;
28121    output AXI_12_AWREADY;
28122    output [5:0] AXI_12_BID;
28123    output [1:0] AXI_12_BRESP;
28124    output AXI_12_BVALID;
28125    output [1:0] AXI_12_DFI_AW_AERR_N;
28126    output AXI_12_DFI_CLK_BUF;
28127    output [7:0] AXI_12_DFI_DBI_BYTE_DISABLE;
28128    output [20:0] AXI_12_DFI_DW_RDDATA_DBI;
28129    output [7:0] AXI_12_DFI_DW_RDDATA_DERR;
28130    output [1:0] AXI_12_DFI_DW_RDDATA_VALID;
28131    output AXI_12_DFI_INIT_COMPLETE;
28132    output AXI_12_DFI_PHYUPD_REQ;
28133    output AXI_12_DFI_PHY_LP_STATE;
28134    output AXI_12_DFI_RST_N_BUF;
28135    output [5:0] AXI_12_MC_STATUS;
28136    output [7:0] AXI_12_PHY_STATUS;
28137    output [255:0] AXI_12_RDATA;
28138    output [31:0] AXI_12_RDATA_PARITY;
28139    output [5:0] AXI_12_RID;
28140    output AXI_12_RLAST;
28141    output [1:0] AXI_12_RRESP;
28142    output AXI_12_RVALID;
28143    output AXI_12_WREADY;
28144    output AXI_13_ARREADY;
28145    output AXI_13_AWREADY;
28146    output [5:0] AXI_13_BID;
28147    output [1:0] AXI_13_BRESP;
28148    output AXI_13_BVALID;
28149    output [1:0] AXI_13_DFI_AW_AERR_N;
28150    output AXI_13_DFI_CLK_BUF;
28151    output [7:0] AXI_13_DFI_DBI_BYTE_DISABLE;
28152    output [20:0] AXI_13_DFI_DW_RDDATA_DBI;
28153    output [7:0] AXI_13_DFI_DW_RDDATA_DERR;
28154    output [1:0] AXI_13_DFI_DW_RDDATA_VALID;
28155    output AXI_13_DFI_INIT_COMPLETE;
28156    output AXI_13_DFI_PHYUPD_REQ;
28157    output AXI_13_DFI_PHY_LP_STATE;
28158    output AXI_13_DFI_RST_N_BUF;
28159    output [255:0] AXI_13_RDATA;
28160    output [31:0] AXI_13_RDATA_PARITY;
28161    output [5:0] AXI_13_RID;
28162    output AXI_13_RLAST;
28163    output [1:0] AXI_13_RRESP;
28164    output AXI_13_RVALID;
28165    output AXI_13_WREADY;
28166    output AXI_14_ARREADY;
28167    output AXI_14_AWREADY;
28168    output [5:0] AXI_14_BID;
28169    output [1:0] AXI_14_BRESP;
28170    output AXI_14_BVALID;
28171    output [1:0] AXI_14_DFI_AW_AERR_N;
28172    output AXI_14_DFI_CLK_BUF;
28173    output [7:0] AXI_14_DFI_DBI_BYTE_DISABLE;
28174    output [20:0] AXI_14_DFI_DW_RDDATA_DBI;
28175    output [7:0] AXI_14_DFI_DW_RDDATA_DERR;
28176    output [1:0] AXI_14_DFI_DW_RDDATA_VALID;
28177    output AXI_14_DFI_INIT_COMPLETE;
28178    output AXI_14_DFI_PHYUPD_REQ;
28179    output AXI_14_DFI_PHY_LP_STATE;
28180    output AXI_14_DFI_RST_N_BUF;
28181    output [5:0] AXI_14_MC_STATUS;
28182    output [7:0] AXI_14_PHY_STATUS;
28183    output [255:0] AXI_14_RDATA;
28184    output [31:0] AXI_14_RDATA_PARITY;
28185    output [5:0] AXI_14_RID;
28186    output AXI_14_RLAST;
28187    output [1:0] AXI_14_RRESP;
28188    output AXI_14_RVALID;
28189    output AXI_14_WREADY;
28190    output AXI_15_ARREADY;
28191    output AXI_15_AWREADY;
28192    output [5:0] AXI_15_BID;
28193    output [1:0] AXI_15_BRESP;
28194    output AXI_15_BVALID;
28195    output [1:0] AXI_15_DFI_AW_AERR_N;
28196    output AXI_15_DFI_CLK_BUF;
28197    output [7:0] AXI_15_DFI_DBI_BYTE_DISABLE;
28198    output [20:0] AXI_15_DFI_DW_RDDATA_DBI;
28199    output [7:0] AXI_15_DFI_DW_RDDATA_DERR;
28200    output [1:0] AXI_15_DFI_DW_RDDATA_VALID;
28201    output AXI_15_DFI_INIT_COMPLETE;
28202    output AXI_15_DFI_PHYUPD_REQ;
28203    output AXI_15_DFI_PHY_LP_STATE;
28204    output AXI_15_DFI_RST_N_BUF;
28205    output [255:0] AXI_15_RDATA;
28206    output [31:0] AXI_15_RDATA_PARITY;
28207    output [5:0] AXI_15_RID;
28208    output AXI_15_RLAST;
28209    output [1:0] AXI_15_RRESP;
28210    output AXI_15_RVALID;
28211    output AXI_15_WREADY;
28212    output DRAM_0_STAT_CATTRIP;
28213    output [2:0] DRAM_0_STAT_TEMP;
28214    input [21:0] APB_0_PADDR;
28215    (* invertible_pin = "IS_APB_0_PCLK_INVERTED" *)
28216    input APB_0_PCLK;
28217    input APB_0_PENABLE;
28218    (* invertible_pin = "IS_APB_0_PRESET_N_INVERTED" *)
28219    input APB_0_PRESET_N;
28220    input APB_0_PSEL;
28221    input [31:0] APB_0_PWDATA;
28222    input APB_0_PWRITE;
28223    (* invertible_pin = "IS_AXI_00_ACLK_INVERTED" *)
28224    input AXI_00_ACLK;
28225    input [36:0] AXI_00_ARADDR;
28226    input [1:0] AXI_00_ARBURST;
28227    (* invertible_pin = "IS_AXI_00_ARESET_N_INVERTED" *)
28228    input AXI_00_ARESET_N;
28229    input [5:0] AXI_00_ARID;
28230    input [3:0] AXI_00_ARLEN;
28231    input [2:0] AXI_00_ARSIZE;
28232    input AXI_00_ARVALID;
28233    input [36:0] AXI_00_AWADDR;
28234    input [1:0] AXI_00_AWBURST;
28235    input [5:0] AXI_00_AWID;
28236    input [3:0] AXI_00_AWLEN;
28237    input [2:0] AXI_00_AWSIZE;
28238    input AXI_00_AWVALID;
28239    input AXI_00_BREADY;
28240    input AXI_00_DFI_LP_PWR_X_REQ;
28241    input AXI_00_RREADY;
28242    input [255:0] AXI_00_WDATA;
28243    input [31:0] AXI_00_WDATA_PARITY;
28244    input AXI_00_WLAST;
28245    input [31:0] AXI_00_WSTRB;
28246    input AXI_00_WVALID;
28247    (* invertible_pin = "IS_AXI_01_ACLK_INVERTED" *)
28248    input AXI_01_ACLK;
28249    input [36:0] AXI_01_ARADDR;
28250    input [1:0] AXI_01_ARBURST;
28251    (* invertible_pin = "IS_AXI_01_ARESET_N_INVERTED" *)
28252    input AXI_01_ARESET_N;
28253    input [5:0] AXI_01_ARID;
28254    input [3:0] AXI_01_ARLEN;
28255    input [2:0] AXI_01_ARSIZE;
28256    input AXI_01_ARVALID;
28257    input [36:0] AXI_01_AWADDR;
28258    input [1:0] AXI_01_AWBURST;
28259    input [5:0] AXI_01_AWID;
28260    input [3:0] AXI_01_AWLEN;
28261    input [2:0] AXI_01_AWSIZE;
28262    input AXI_01_AWVALID;
28263    input AXI_01_BREADY;
28264    input AXI_01_DFI_LP_PWR_X_REQ;
28265    input AXI_01_RREADY;
28266    input [255:0] AXI_01_WDATA;
28267    input [31:0] AXI_01_WDATA_PARITY;
28268    input AXI_01_WLAST;
28269    input [31:0] AXI_01_WSTRB;
28270    input AXI_01_WVALID;
28271    (* invertible_pin = "IS_AXI_02_ACLK_INVERTED" *)
28272    input AXI_02_ACLK;
28273    input [36:0] AXI_02_ARADDR;
28274    input [1:0] AXI_02_ARBURST;
28275    (* invertible_pin = "IS_AXI_02_ARESET_N_INVERTED" *)
28276    input AXI_02_ARESET_N;
28277    input [5:0] AXI_02_ARID;
28278    input [3:0] AXI_02_ARLEN;
28279    input [2:0] AXI_02_ARSIZE;
28280    input AXI_02_ARVALID;
28281    input [36:0] AXI_02_AWADDR;
28282    input [1:0] AXI_02_AWBURST;
28283    input [5:0] AXI_02_AWID;
28284    input [3:0] AXI_02_AWLEN;
28285    input [2:0] AXI_02_AWSIZE;
28286    input AXI_02_AWVALID;
28287    input AXI_02_BREADY;
28288    input AXI_02_DFI_LP_PWR_X_REQ;
28289    input AXI_02_RREADY;
28290    input [255:0] AXI_02_WDATA;
28291    input [31:0] AXI_02_WDATA_PARITY;
28292    input AXI_02_WLAST;
28293    input [31:0] AXI_02_WSTRB;
28294    input AXI_02_WVALID;
28295    (* invertible_pin = "IS_AXI_03_ACLK_INVERTED" *)
28296    input AXI_03_ACLK;
28297    input [36:0] AXI_03_ARADDR;
28298    input [1:0] AXI_03_ARBURST;
28299    (* invertible_pin = "IS_AXI_03_ARESET_N_INVERTED" *)
28300    input AXI_03_ARESET_N;
28301    input [5:0] AXI_03_ARID;
28302    input [3:0] AXI_03_ARLEN;
28303    input [2:0] AXI_03_ARSIZE;
28304    input AXI_03_ARVALID;
28305    input [36:0] AXI_03_AWADDR;
28306    input [1:0] AXI_03_AWBURST;
28307    input [5:0] AXI_03_AWID;
28308    input [3:0] AXI_03_AWLEN;
28309    input [2:0] AXI_03_AWSIZE;
28310    input AXI_03_AWVALID;
28311    input AXI_03_BREADY;
28312    input AXI_03_DFI_LP_PWR_X_REQ;
28313    input AXI_03_RREADY;
28314    input [255:0] AXI_03_WDATA;
28315    input [31:0] AXI_03_WDATA_PARITY;
28316    input AXI_03_WLAST;
28317    input [31:0] AXI_03_WSTRB;
28318    input AXI_03_WVALID;
28319    (* invertible_pin = "IS_AXI_04_ACLK_INVERTED" *)
28320    input AXI_04_ACLK;
28321    input [36:0] AXI_04_ARADDR;
28322    input [1:0] AXI_04_ARBURST;
28323    (* invertible_pin = "IS_AXI_04_ARESET_N_INVERTED" *)
28324    input AXI_04_ARESET_N;
28325    input [5:0] AXI_04_ARID;
28326    input [3:0] AXI_04_ARLEN;
28327    input [2:0] AXI_04_ARSIZE;
28328    input AXI_04_ARVALID;
28329    input [36:0] AXI_04_AWADDR;
28330    input [1:0] AXI_04_AWBURST;
28331    input [5:0] AXI_04_AWID;
28332    input [3:0] AXI_04_AWLEN;
28333    input [2:0] AXI_04_AWSIZE;
28334    input AXI_04_AWVALID;
28335    input AXI_04_BREADY;
28336    input AXI_04_DFI_LP_PWR_X_REQ;
28337    input AXI_04_RREADY;
28338    input [255:0] AXI_04_WDATA;
28339    input [31:0] AXI_04_WDATA_PARITY;
28340    input AXI_04_WLAST;
28341    input [31:0] AXI_04_WSTRB;
28342    input AXI_04_WVALID;
28343    (* invertible_pin = "IS_AXI_05_ACLK_INVERTED" *)
28344    input AXI_05_ACLK;
28345    input [36:0] AXI_05_ARADDR;
28346    input [1:0] AXI_05_ARBURST;
28347    (* invertible_pin = "IS_AXI_05_ARESET_N_INVERTED" *)
28348    input AXI_05_ARESET_N;
28349    input [5:0] AXI_05_ARID;
28350    input [3:0] AXI_05_ARLEN;
28351    input [2:0] AXI_05_ARSIZE;
28352    input AXI_05_ARVALID;
28353    input [36:0] AXI_05_AWADDR;
28354    input [1:0] AXI_05_AWBURST;
28355    input [5:0] AXI_05_AWID;
28356    input [3:0] AXI_05_AWLEN;
28357    input [2:0] AXI_05_AWSIZE;
28358    input AXI_05_AWVALID;
28359    input AXI_05_BREADY;
28360    input AXI_05_DFI_LP_PWR_X_REQ;
28361    input AXI_05_RREADY;
28362    input [255:0] AXI_05_WDATA;
28363    input [31:0] AXI_05_WDATA_PARITY;
28364    input AXI_05_WLAST;
28365    input [31:0] AXI_05_WSTRB;
28366    input AXI_05_WVALID;
28367    (* invertible_pin = "IS_AXI_06_ACLK_INVERTED" *)
28368    input AXI_06_ACLK;
28369    input [36:0] AXI_06_ARADDR;
28370    input [1:0] AXI_06_ARBURST;
28371    (* invertible_pin = "IS_AXI_06_ARESET_N_INVERTED" *)
28372    input AXI_06_ARESET_N;
28373    input [5:0] AXI_06_ARID;
28374    input [3:0] AXI_06_ARLEN;
28375    input [2:0] AXI_06_ARSIZE;
28376    input AXI_06_ARVALID;
28377    input [36:0] AXI_06_AWADDR;
28378    input [1:0] AXI_06_AWBURST;
28379    input [5:0] AXI_06_AWID;
28380    input [3:0] AXI_06_AWLEN;
28381    input [2:0] AXI_06_AWSIZE;
28382    input AXI_06_AWVALID;
28383    input AXI_06_BREADY;
28384    input AXI_06_DFI_LP_PWR_X_REQ;
28385    input AXI_06_RREADY;
28386    input [255:0] AXI_06_WDATA;
28387    input [31:0] AXI_06_WDATA_PARITY;
28388    input AXI_06_WLAST;
28389    input [31:0] AXI_06_WSTRB;
28390    input AXI_06_WVALID;
28391    (* invertible_pin = "IS_AXI_07_ACLK_INVERTED" *)
28392    input AXI_07_ACLK;
28393    input [36:0] AXI_07_ARADDR;
28394    input [1:0] AXI_07_ARBURST;
28395    (* invertible_pin = "IS_AXI_07_ARESET_N_INVERTED" *)
28396    input AXI_07_ARESET_N;
28397    input [5:0] AXI_07_ARID;
28398    input [3:0] AXI_07_ARLEN;
28399    input [2:0] AXI_07_ARSIZE;
28400    input AXI_07_ARVALID;
28401    input [36:0] AXI_07_AWADDR;
28402    input [1:0] AXI_07_AWBURST;
28403    input [5:0] AXI_07_AWID;
28404    input [3:0] AXI_07_AWLEN;
28405    input [2:0] AXI_07_AWSIZE;
28406    input AXI_07_AWVALID;
28407    input AXI_07_BREADY;
28408    input AXI_07_DFI_LP_PWR_X_REQ;
28409    input AXI_07_RREADY;
28410    input [255:0] AXI_07_WDATA;
28411    input [31:0] AXI_07_WDATA_PARITY;
28412    input AXI_07_WLAST;
28413    input [31:0] AXI_07_WSTRB;
28414    input AXI_07_WVALID;
28415    (* invertible_pin = "IS_AXI_08_ACLK_INVERTED" *)
28416    input AXI_08_ACLK;
28417    input [36:0] AXI_08_ARADDR;
28418    input [1:0] AXI_08_ARBURST;
28419    (* invertible_pin = "IS_AXI_08_ARESET_N_INVERTED" *)
28420    input AXI_08_ARESET_N;
28421    input [5:0] AXI_08_ARID;
28422    input [3:0] AXI_08_ARLEN;
28423    input [2:0] AXI_08_ARSIZE;
28424    input AXI_08_ARVALID;
28425    input [36:0] AXI_08_AWADDR;
28426    input [1:0] AXI_08_AWBURST;
28427    input [5:0] AXI_08_AWID;
28428    input [3:0] AXI_08_AWLEN;
28429    input [2:0] AXI_08_AWSIZE;
28430    input AXI_08_AWVALID;
28431    input AXI_08_BREADY;
28432    input AXI_08_DFI_LP_PWR_X_REQ;
28433    input AXI_08_RREADY;
28434    input [255:0] AXI_08_WDATA;
28435    input [31:0] AXI_08_WDATA_PARITY;
28436    input AXI_08_WLAST;
28437    input [31:0] AXI_08_WSTRB;
28438    input AXI_08_WVALID;
28439    (* invertible_pin = "IS_AXI_09_ACLK_INVERTED" *)
28440    input AXI_09_ACLK;
28441    input [36:0] AXI_09_ARADDR;
28442    input [1:0] AXI_09_ARBURST;
28443    (* invertible_pin = "IS_AXI_09_ARESET_N_INVERTED" *)
28444    input AXI_09_ARESET_N;
28445    input [5:0] AXI_09_ARID;
28446    input [3:0] AXI_09_ARLEN;
28447    input [2:0] AXI_09_ARSIZE;
28448    input AXI_09_ARVALID;
28449    input [36:0] AXI_09_AWADDR;
28450    input [1:0] AXI_09_AWBURST;
28451    input [5:0] AXI_09_AWID;
28452    input [3:0] AXI_09_AWLEN;
28453    input [2:0] AXI_09_AWSIZE;
28454    input AXI_09_AWVALID;
28455    input AXI_09_BREADY;
28456    input AXI_09_DFI_LP_PWR_X_REQ;
28457    input AXI_09_RREADY;
28458    input [255:0] AXI_09_WDATA;
28459    input [31:0] AXI_09_WDATA_PARITY;
28460    input AXI_09_WLAST;
28461    input [31:0] AXI_09_WSTRB;
28462    input AXI_09_WVALID;
28463    (* invertible_pin = "IS_AXI_10_ACLK_INVERTED" *)
28464    input AXI_10_ACLK;
28465    input [36:0] AXI_10_ARADDR;
28466    input [1:0] AXI_10_ARBURST;
28467    (* invertible_pin = "IS_AXI_10_ARESET_N_INVERTED" *)
28468    input AXI_10_ARESET_N;
28469    input [5:0] AXI_10_ARID;
28470    input [3:0] AXI_10_ARLEN;
28471    input [2:0] AXI_10_ARSIZE;
28472    input AXI_10_ARVALID;
28473    input [36:0] AXI_10_AWADDR;
28474    input [1:0] AXI_10_AWBURST;
28475    input [5:0] AXI_10_AWID;
28476    input [3:0] AXI_10_AWLEN;
28477    input [2:0] AXI_10_AWSIZE;
28478    input AXI_10_AWVALID;
28479    input AXI_10_BREADY;
28480    input AXI_10_DFI_LP_PWR_X_REQ;
28481    input AXI_10_RREADY;
28482    input [255:0] AXI_10_WDATA;
28483    input [31:0] AXI_10_WDATA_PARITY;
28484    input AXI_10_WLAST;
28485    input [31:0] AXI_10_WSTRB;
28486    input AXI_10_WVALID;
28487    (* invertible_pin = "IS_AXI_11_ACLK_INVERTED" *)
28488    input AXI_11_ACLK;
28489    input [36:0] AXI_11_ARADDR;
28490    input [1:0] AXI_11_ARBURST;
28491    (* invertible_pin = "IS_AXI_11_ARESET_N_INVERTED" *)
28492    input AXI_11_ARESET_N;
28493    input [5:0] AXI_11_ARID;
28494    input [3:0] AXI_11_ARLEN;
28495    input [2:0] AXI_11_ARSIZE;
28496    input AXI_11_ARVALID;
28497    input [36:0] AXI_11_AWADDR;
28498    input [1:0] AXI_11_AWBURST;
28499    input [5:0] AXI_11_AWID;
28500    input [3:0] AXI_11_AWLEN;
28501    input [2:0] AXI_11_AWSIZE;
28502    input AXI_11_AWVALID;
28503    input AXI_11_BREADY;
28504    input AXI_11_DFI_LP_PWR_X_REQ;
28505    input AXI_11_RREADY;
28506    input [255:0] AXI_11_WDATA;
28507    input [31:0] AXI_11_WDATA_PARITY;
28508    input AXI_11_WLAST;
28509    input [31:0] AXI_11_WSTRB;
28510    input AXI_11_WVALID;
28511    (* invertible_pin = "IS_AXI_12_ACLK_INVERTED" *)
28512    input AXI_12_ACLK;
28513    input [36:0] AXI_12_ARADDR;
28514    input [1:0] AXI_12_ARBURST;
28515    (* invertible_pin = "IS_AXI_12_ARESET_N_INVERTED" *)
28516    input AXI_12_ARESET_N;
28517    input [5:0] AXI_12_ARID;
28518    input [3:0] AXI_12_ARLEN;
28519    input [2:0] AXI_12_ARSIZE;
28520    input AXI_12_ARVALID;
28521    input [36:0] AXI_12_AWADDR;
28522    input [1:0] AXI_12_AWBURST;
28523    input [5:0] AXI_12_AWID;
28524    input [3:0] AXI_12_AWLEN;
28525    input [2:0] AXI_12_AWSIZE;
28526    input AXI_12_AWVALID;
28527    input AXI_12_BREADY;
28528    input AXI_12_DFI_LP_PWR_X_REQ;
28529    input AXI_12_RREADY;
28530    input [255:0] AXI_12_WDATA;
28531    input [31:0] AXI_12_WDATA_PARITY;
28532    input AXI_12_WLAST;
28533    input [31:0] AXI_12_WSTRB;
28534    input AXI_12_WVALID;
28535    (* invertible_pin = "IS_AXI_13_ACLK_INVERTED" *)
28536    input AXI_13_ACLK;
28537    input [36:0] AXI_13_ARADDR;
28538    input [1:0] AXI_13_ARBURST;
28539    (* invertible_pin = "IS_AXI_13_ARESET_N_INVERTED" *)
28540    input AXI_13_ARESET_N;
28541    input [5:0] AXI_13_ARID;
28542    input [3:0] AXI_13_ARLEN;
28543    input [2:0] AXI_13_ARSIZE;
28544    input AXI_13_ARVALID;
28545    input [36:0] AXI_13_AWADDR;
28546    input [1:0] AXI_13_AWBURST;
28547    input [5:0] AXI_13_AWID;
28548    input [3:0] AXI_13_AWLEN;
28549    input [2:0] AXI_13_AWSIZE;
28550    input AXI_13_AWVALID;
28551    input AXI_13_BREADY;
28552    input AXI_13_DFI_LP_PWR_X_REQ;
28553    input AXI_13_RREADY;
28554    input [255:0] AXI_13_WDATA;
28555    input [31:0] AXI_13_WDATA_PARITY;
28556    input AXI_13_WLAST;
28557    input [31:0] AXI_13_WSTRB;
28558    input AXI_13_WVALID;
28559    (* invertible_pin = "IS_AXI_14_ACLK_INVERTED" *)
28560    input AXI_14_ACLK;
28561    input [36:0] AXI_14_ARADDR;
28562    input [1:0] AXI_14_ARBURST;
28563    (* invertible_pin = "IS_AXI_14_ARESET_N_INVERTED" *)
28564    input AXI_14_ARESET_N;
28565    input [5:0] AXI_14_ARID;
28566    input [3:0] AXI_14_ARLEN;
28567    input [2:0] AXI_14_ARSIZE;
28568    input AXI_14_ARVALID;
28569    input [36:0] AXI_14_AWADDR;
28570    input [1:0] AXI_14_AWBURST;
28571    input [5:0] AXI_14_AWID;
28572    input [3:0] AXI_14_AWLEN;
28573    input [2:0] AXI_14_AWSIZE;
28574    input AXI_14_AWVALID;
28575    input AXI_14_BREADY;
28576    input AXI_14_DFI_LP_PWR_X_REQ;
28577    input AXI_14_RREADY;
28578    input [255:0] AXI_14_WDATA;
28579    input [31:0] AXI_14_WDATA_PARITY;
28580    input AXI_14_WLAST;
28581    input [31:0] AXI_14_WSTRB;
28582    input AXI_14_WVALID;
28583    (* invertible_pin = "IS_AXI_15_ACLK_INVERTED" *)
28584    input AXI_15_ACLK;
28585    input [36:0] AXI_15_ARADDR;
28586    input [1:0] AXI_15_ARBURST;
28587    (* invertible_pin = "IS_AXI_15_ARESET_N_INVERTED" *)
28588    input AXI_15_ARESET_N;
28589    input [5:0] AXI_15_ARID;
28590    input [3:0] AXI_15_ARLEN;
28591    input [2:0] AXI_15_ARSIZE;
28592    input AXI_15_ARVALID;
28593    input [36:0] AXI_15_AWADDR;
28594    input [1:0] AXI_15_AWBURST;
28595    input [5:0] AXI_15_AWID;
28596    input [3:0] AXI_15_AWLEN;
28597    input [2:0] AXI_15_AWSIZE;
28598    input AXI_15_AWVALID;
28599    input AXI_15_BREADY;
28600    input AXI_15_DFI_LP_PWR_X_REQ;
28601    input AXI_15_RREADY;
28602    input [255:0] AXI_15_WDATA;
28603    input [31:0] AXI_15_WDATA_PARITY;
28604    input AXI_15_WLAST;
28605    input [31:0] AXI_15_WSTRB;
28606    input AXI_15_WVALID;
28607    input BSCAN_DRCK;
28608    input BSCAN_TCK;
28609    input HBM_REF_CLK;
28610    input MBIST_EN_00;
28611    input MBIST_EN_01;
28612    input MBIST_EN_02;
28613    input MBIST_EN_03;
28614    input MBIST_EN_04;
28615    input MBIST_EN_05;
28616    input MBIST_EN_06;
28617    input MBIST_EN_07;
28618endmodule
28619
28620(* keep *)
28621module HBM_TWO_STACK_INTF (...);
28622    parameter CLK_SEL_00 = "FALSE";
28623    parameter CLK_SEL_01 = "FALSE";
28624    parameter CLK_SEL_02 = "FALSE";
28625    parameter CLK_SEL_03 = "FALSE";
28626    parameter CLK_SEL_04 = "FALSE";
28627    parameter CLK_SEL_05 = "FALSE";
28628    parameter CLK_SEL_06 = "FALSE";
28629    parameter CLK_SEL_07 = "FALSE";
28630    parameter CLK_SEL_08 = "FALSE";
28631    parameter CLK_SEL_09 = "FALSE";
28632    parameter CLK_SEL_10 = "FALSE";
28633    parameter CLK_SEL_11 = "FALSE";
28634    parameter CLK_SEL_12 = "FALSE";
28635    parameter CLK_SEL_13 = "FALSE";
28636    parameter CLK_SEL_14 = "FALSE";
28637    parameter CLK_SEL_15 = "FALSE";
28638    parameter CLK_SEL_16 = "FALSE";
28639    parameter CLK_SEL_17 = "FALSE";
28640    parameter CLK_SEL_18 = "FALSE";
28641    parameter CLK_SEL_19 = "FALSE";
28642    parameter CLK_SEL_20 = "FALSE";
28643    parameter CLK_SEL_21 = "FALSE";
28644    parameter CLK_SEL_22 = "FALSE";
28645    parameter CLK_SEL_23 = "FALSE";
28646    parameter CLK_SEL_24 = "FALSE";
28647    parameter CLK_SEL_25 = "FALSE";
28648    parameter CLK_SEL_26 = "FALSE";
28649    parameter CLK_SEL_27 = "FALSE";
28650    parameter CLK_SEL_28 = "FALSE";
28651    parameter CLK_SEL_29 = "FALSE";
28652    parameter CLK_SEL_30 = "FALSE";
28653    parameter CLK_SEL_31 = "FALSE";
28654    parameter integer DATARATE_00 = 1800;
28655    parameter integer DATARATE_01 = 1800;
28656    parameter integer DATARATE_02 = 1800;
28657    parameter integer DATARATE_03 = 1800;
28658    parameter integer DATARATE_04 = 1800;
28659    parameter integer DATARATE_05 = 1800;
28660    parameter integer DATARATE_06 = 1800;
28661    parameter integer DATARATE_07 = 1800;
28662    parameter integer DATARATE_08 = 1800;
28663    parameter integer DATARATE_09 = 1800;
28664    parameter integer DATARATE_10 = 1800;
28665    parameter integer DATARATE_11 = 1800;
28666    parameter integer DATARATE_12 = 1800;
28667    parameter integer DATARATE_13 = 1800;
28668    parameter integer DATARATE_14 = 1800;
28669    parameter integer DATARATE_15 = 1800;
28670    parameter DA_LOCKOUT_0 = "FALSE";
28671    parameter DA_LOCKOUT_1 = "FALSE";
28672    parameter [0:0] IS_APB_0_PCLK_INVERTED = 1'b0;
28673    parameter [0:0] IS_APB_0_PRESET_N_INVERTED = 1'b0;
28674    parameter [0:0] IS_APB_1_PCLK_INVERTED = 1'b0;
28675    parameter [0:0] IS_APB_1_PRESET_N_INVERTED = 1'b0;
28676    parameter [0:0] IS_AXI_00_ACLK_INVERTED = 1'b0;
28677    parameter [0:0] IS_AXI_00_ARESET_N_INVERTED = 1'b0;
28678    parameter [0:0] IS_AXI_01_ACLK_INVERTED = 1'b0;
28679    parameter [0:0] IS_AXI_01_ARESET_N_INVERTED = 1'b0;
28680    parameter [0:0] IS_AXI_02_ACLK_INVERTED = 1'b0;
28681    parameter [0:0] IS_AXI_02_ARESET_N_INVERTED = 1'b0;
28682    parameter [0:0] IS_AXI_03_ACLK_INVERTED = 1'b0;
28683    parameter [0:0] IS_AXI_03_ARESET_N_INVERTED = 1'b0;
28684    parameter [0:0] IS_AXI_04_ACLK_INVERTED = 1'b0;
28685    parameter [0:0] IS_AXI_04_ARESET_N_INVERTED = 1'b0;
28686    parameter [0:0] IS_AXI_05_ACLK_INVERTED = 1'b0;
28687    parameter [0:0] IS_AXI_05_ARESET_N_INVERTED = 1'b0;
28688    parameter [0:0] IS_AXI_06_ACLK_INVERTED = 1'b0;
28689    parameter [0:0] IS_AXI_06_ARESET_N_INVERTED = 1'b0;
28690    parameter [0:0] IS_AXI_07_ACLK_INVERTED = 1'b0;
28691    parameter [0:0] IS_AXI_07_ARESET_N_INVERTED = 1'b0;
28692    parameter [0:0] IS_AXI_08_ACLK_INVERTED = 1'b0;
28693    parameter [0:0] IS_AXI_08_ARESET_N_INVERTED = 1'b0;
28694    parameter [0:0] IS_AXI_09_ACLK_INVERTED = 1'b0;
28695    parameter [0:0] IS_AXI_09_ARESET_N_INVERTED = 1'b0;
28696    parameter [0:0] IS_AXI_10_ACLK_INVERTED = 1'b0;
28697    parameter [0:0] IS_AXI_10_ARESET_N_INVERTED = 1'b0;
28698    parameter [0:0] IS_AXI_11_ACLK_INVERTED = 1'b0;
28699    parameter [0:0] IS_AXI_11_ARESET_N_INVERTED = 1'b0;
28700    parameter [0:0] IS_AXI_12_ACLK_INVERTED = 1'b0;
28701    parameter [0:0] IS_AXI_12_ARESET_N_INVERTED = 1'b0;
28702    parameter [0:0] IS_AXI_13_ACLK_INVERTED = 1'b0;
28703    parameter [0:0] IS_AXI_13_ARESET_N_INVERTED = 1'b0;
28704    parameter [0:0] IS_AXI_14_ACLK_INVERTED = 1'b0;
28705    parameter [0:0] IS_AXI_14_ARESET_N_INVERTED = 1'b0;
28706    parameter [0:0] IS_AXI_15_ACLK_INVERTED = 1'b0;
28707    parameter [0:0] IS_AXI_15_ARESET_N_INVERTED = 1'b0;
28708    parameter [0:0] IS_AXI_16_ACLK_INVERTED = 1'b0;
28709    parameter [0:0] IS_AXI_16_ARESET_N_INVERTED = 1'b0;
28710    parameter [0:0] IS_AXI_17_ACLK_INVERTED = 1'b0;
28711    parameter [0:0] IS_AXI_17_ARESET_N_INVERTED = 1'b0;
28712    parameter [0:0] IS_AXI_18_ACLK_INVERTED = 1'b0;
28713    parameter [0:0] IS_AXI_18_ARESET_N_INVERTED = 1'b0;
28714    parameter [0:0] IS_AXI_19_ACLK_INVERTED = 1'b0;
28715    parameter [0:0] IS_AXI_19_ARESET_N_INVERTED = 1'b0;
28716    parameter [0:0] IS_AXI_20_ACLK_INVERTED = 1'b0;
28717    parameter [0:0] IS_AXI_20_ARESET_N_INVERTED = 1'b0;
28718    parameter [0:0] IS_AXI_21_ACLK_INVERTED = 1'b0;
28719    parameter [0:0] IS_AXI_21_ARESET_N_INVERTED = 1'b0;
28720    parameter [0:0] IS_AXI_22_ACLK_INVERTED = 1'b0;
28721    parameter [0:0] IS_AXI_22_ARESET_N_INVERTED = 1'b0;
28722    parameter [0:0] IS_AXI_23_ACLK_INVERTED = 1'b0;
28723    parameter [0:0] IS_AXI_23_ARESET_N_INVERTED = 1'b0;
28724    parameter [0:0] IS_AXI_24_ACLK_INVERTED = 1'b0;
28725    parameter [0:0] IS_AXI_24_ARESET_N_INVERTED = 1'b0;
28726    parameter [0:0] IS_AXI_25_ACLK_INVERTED = 1'b0;
28727    parameter [0:0] IS_AXI_25_ARESET_N_INVERTED = 1'b0;
28728    parameter [0:0] IS_AXI_26_ACLK_INVERTED = 1'b0;
28729    parameter [0:0] IS_AXI_26_ARESET_N_INVERTED = 1'b0;
28730    parameter [0:0] IS_AXI_27_ACLK_INVERTED = 1'b0;
28731    parameter [0:0] IS_AXI_27_ARESET_N_INVERTED = 1'b0;
28732    parameter [0:0] IS_AXI_28_ACLK_INVERTED = 1'b0;
28733    parameter [0:0] IS_AXI_28_ARESET_N_INVERTED = 1'b0;
28734    parameter [0:0] IS_AXI_29_ACLK_INVERTED = 1'b0;
28735    parameter [0:0] IS_AXI_29_ARESET_N_INVERTED = 1'b0;
28736    parameter [0:0] IS_AXI_30_ACLK_INVERTED = 1'b0;
28737    parameter [0:0] IS_AXI_30_ARESET_N_INVERTED = 1'b0;
28738    parameter [0:0] IS_AXI_31_ACLK_INVERTED = 1'b0;
28739    parameter [0:0] IS_AXI_31_ARESET_N_INVERTED = 1'b0;
28740    parameter MC_ENABLE_00 = "FALSE";
28741    parameter MC_ENABLE_01 = "FALSE";
28742    parameter MC_ENABLE_02 = "FALSE";
28743    parameter MC_ENABLE_03 = "FALSE";
28744    parameter MC_ENABLE_04 = "FALSE";
28745    parameter MC_ENABLE_05 = "FALSE";
28746    parameter MC_ENABLE_06 = "FALSE";
28747    parameter MC_ENABLE_07 = "FALSE";
28748    parameter MC_ENABLE_08 = "FALSE";
28749    parameter MC_ENABLE_09 = "FALSE";
28750    parameter MC_ENABLE_10 = "FALSE";
28751    parameter MC_ENABLE_11 = "FALSE";
28752    parameter MC_ENABLE_12 = "FALSE";
28753    parameter MC_ENABLE_13 = "FALSE";
28754    parameter MC_ENABLE_14 = "FALSE";
28755    parameter MC_ENABLE_15 = "FALSE";
28756    parameter MC_ENABLE_APB_00 = "FALSE";
28757    parameter MC_ENABLE_APB_01 = "FALSE";
28758    parameter integer PAGEHIT_PERCENT_00 = 75;
28759    parameter integer PAGEHIT_PERCENT_01 = 75;
28760    parameter PHY_ENABLE_00 = "FALSE";
28761    parameter PHY_ENABLE_01 = "FALSE";
28762    parameter PHY_ENABLE_02 = "FALSE";
28763    parameter PHY_ENABLE_03 = "FALSE";
28764    parameter PHY_ENABLE_04 = "FALSE";
28765    parameter PHY_ENABLE_05 = "FALSE";
28766    parameter PHY_ENABLE_06 = "FALSE";
28767    parameter PHY_ENABLE_07 = "FALSE";
28768    parameter PHY_ENABLE_08 = "FALSE";
28769    parameter PHY_ENABLE_09 = "FALSE";
28770    parameter PHY_ENABLE_10 = "FALSE";
28771    parameter PHY_ENABLE_11 = "FALSE";
28772    parameter PHY_ENABLE_12 = "FALSE";
28773    parameter PHY_ENABLE_13 = "FALSE";
28774    parameter PHY_ENABLE_14 = "FALSE";
28775    parameter PHY_ENABLE_15 = "FALSE";
28776    parameter PHY_ENABLE_16 = "FALSE";
28777    parameter PHY_ENABLE_17 = "FALSE";
28778    parameter PHY_ENABLE_18 = "FALSE";
28779    parameter PHY_ENABLE_19 = "FALSE";
28780    parameter PHY_ENABLE_20 = "FALSE";
28781    parameter PHY_ENABLE_21 = "FALSE";
28782    parameter PHY_ENABLE_22 = "FALSE";
28783    parameter PHY_ENABLE_23 = "FALSE";
28784    parameter PHY_ENABLE_24 = "FALSE";
28785    parameter PHY_ENABLE_25 = "FALSE";
28786    parameter PHY_ENABLE_26 = "FALSE";
28787    parameter PHY_ENABLE_27 = "FALSE";
28788    parameter PHY_ENABLE_28 = "FALSE";
28789    parameter PHY_ENABLE_29 = "FALSE";
28790    parameter PHY_ENABLE_30 = "FALSE";
28791    parameter PHY_ENABLE_31 = "FALSE";
28792    parameter PHY_ENABLE_APB_00 = "FALSE";
28793    parameter PHY_ENABLE_APB_01 = "FALSE";
28794    parameter PHY_PCLK_INVERT_01 = "FALSE";
28795    parameter PHY_PCLK_INVERT_02 = "FALSE";
28796    parameter integer READ_PERCENT_00 = 50;
28797    parameter integer READ_PERCENT_01 = 50;
28798    parameter integer READ_PERCENT_02 = 50;
28799    parameter integer READ_PERCENT_03 = 50;
28800    parameter integer READ_PERCENT_04 = 50;
28801    parameter integer READ_PERCENT_05 = 50;
28802    parameter integer READ_PERCENT_06 = 50;
28803    parameter integer READ_PERCENT_07 = 50;
28804    parameter integer READ_PERCENT_08 = 50;
28805    parameter integer READ_PERCENT_09 = 50;
28806    parameter integer READ_PERCENT_10 = 50;
28807    parameter integer READ_PERCENT_11 = 50;
28808    parameter integer READ_PERCENT_12 = 50;
28809    parameter integer READ_PERCENT_13 = 50;
28810    parameter integer READ_PERCENT_14 = 50;
28811    parameter integer READ_PERCENT_15 = 50;
28812    parameter integer READ_PERCENT_16 = 50;
28813    parameter integer READ_PERCENT_17 = 50;
28814    parameter integer READ_PERCENT_18 = 50;
28815    parameter integer READ_PERCENT_19 = 50;
28816    parameter integer READ_PERCENT_20 = 50;
28817    parameter integer READ_PERCENT_21 = 50;
28818    parameter integer READ_PERCENT_22 = 50;
28819    parameter integer READ_PERCENT_23 = 50;
28820    parameter integer READ_PERCENT_24 = 50;
28821    parameter integer READ_PERCENT_25 = 50;
28822    parameter integer READ_PERCENT_26 = 50;
28823    parameter integer READ_PERCENT_27 = 50;
28824    parameter integer READ_PERCENT_28 = 50;
28825    parameter integer READ_PERCENT_29 = 50;
28826    parameter integer READ_PERCENT_30 = 50;
28827    parameter integer READ_PERCENT_31 = 50;
28828    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
28829    parameter SWITCH_ENABLE_00 = "FALSE";
28830    parameter SWITCH_ENABLE_01 = "FALSE";
28831    parameter integer WRITE_PERCENT_00 = 50;
28832    parameter integer WRITE_PERCENT_01 = 50;
28833    parameter integer WRITE_PERCENT_02 = 50;
28834    parameter integer WRITE_PERCENT_03 = 50;
28835    parameter integer WRITE_PERCENT_04 = 50;
28836    parameter integer WRITE_PERCENT_05 = 50;
28837    parameter integer WRITE_PERCENT_06 = 50;
28838    parameter integer WRITE_PERCENT_07 = 50;
28839    parameter integer WRITE_PERCENT_08 = 50;
28840    parameter integer WRITE_PERCENT_09 = 50;
28841    parameter integer WRITE_PERCENT_10 = 50;
28842    parameter integer WRITE_PERCENT_11 = 50;
28843    parameter integer WRITE_PERCENT_12 = 50;
28844    parameter integer WRITE_PERCENT_13 = 50;
28845    parameter integer WRITE_PERCENT_14 = 50;
28846    parameter integer WRITE_PERCENT_15 = 50;
28847    parameter integer WRITE_PERCENT_16 = 50;
28848    parameter integer WRITE_PERCENT_17 = 50;
28849    parameter integer WRITE_PERCENT_18 = 50;
28850    parameter integer WRITE_PERCENT_19 = 50;
28851    parameter integer WRITE_PERCENT_20 = 50;
28852    parameter integer WRITE_PERCENT_21 = 50;
28853    parameter integer WRITE_PERCENT_22 = 50;
28854    parameter integer WRITE_PERCENT_23 = 50;
28855    parameter integer WRITE_PERCENT_24 = 50;
28856    parameter integer WRITE_PERCENT_25 = 50;
28857    parameter integer WRITE_PERCENT_26 = 50;
28858    parameter integer WRITE_PERCENT_27 = 50;
28859    parameter integer WRITE_PERCENT_28 = 50;
28860    parameter integer WRITE_PERCENT_29 = 50;
28861    parameter integer WRITE_PERCENT_30 = 50;
28862    parameter integer WRITE_PERCENT_31 = 50;
28863    output [31:0] APB_0_PRDATA;
28864    output APB_0_PREADY;
28865    output APB_0_PSLVERR;
28866    output [31:0] APB_1_PRDATA;
28867    output APB_1_PREADY;
28868    output APB_1_PSLVERR;
28869    output AXI_00_ARREADY;
28870    output AXI_00_AWREADY;
28871    output [5:0] AXI_00_BID;
28872    output [1:0] AXI_00_BRESP;
28873    output AXI_00_BVALID;
28874    output [1:0] AXI_00_DFI_AW_AERR_N;
28875    output AXI_00_DFI_CLK_BUF;
28876    output [7:0] AXI_00_DFI_DBI_BYTE_DISABLE;
28877    output [20:0] AXI_00_DFI_DW_RDDATA_DBI;
28878    output [7:0] AXI_00_DFI_DW_RDDATA_DERR;
28879    output [1:0] AXI_00_DFI_DW_RDDATA_VALID;
28880    output AXI_00_DFI_INIT_COMPLETE;
28881    output AXI_00_DFI_PHYUPD_REQ;
28882    output AXI_00_DFI_PHY_LP_STATE;
28883    output AXI_00_DFI_RST_N_BUF;
28884    output [5:0] AXI_00_MC_STATUS;
28885    output [7:0] AXI_00_PHY_STATUS;
28886    output [255:0] AXI_00_RDATA;
28887    output [31:0] AXI_00_RDATA_PARITY;
28888    output [5:0] AXI_00_RID;
28889    output AXI_00_RLAST;
28890    output [1:0] AXI_00_RRESP;
28891    output AXI_00_RVALID;
28892    output AXI_00_WREADY;
28893    output AXI_01_ARREADY;
28894    output AXI_01_AWREADY;
28895    output [5:0] AXI_01_BID;
28896    output [1:0] AXI_01_BRESP;
28897    output AXI_01_BVALID;
28898    output [1:0] AXI_01_DFI_AW_AERR_N;
28899    output AXI_01_DFI_CLK_BUF;
28900    output [7:0] AXI_01_DFI_DBI_BYTE_DISABLE;
28901    output [20:0] AXI_01_DFI_DW_RDDATA_DBI;
28902    output [7:0] AXI_01_DFI_DW_RDDATA_DERR;
28903    output [1:0] AXI_01_DFI_DW_RDDATA_VALID;
28904    output AXI_01_DFI_INIT_COMPLETE;
28905    output AXI_01_DFI_PHYUPD_REQ;
28906    output AXI_01_DFI_PHY_LP_STATE;
28907    output AXI_01_DFI_RST_N_BUF;
28908    output [255:0] AXI_01_RDATA;
28909    output [31:0] AXI_01_RDATA_PARITY;
28910    output [5:0] AXI_01_RID;
28911    output AXI_01_RLAST;
28912    output [1:0] AXI_01_RRESP;
28913    output AXI_01_RVALID;
28914    output AXI_01_WREADY;
28915    output AXI_02_ARREADY;
28916    output AXI_02_AWREADY;
28917    output [5:0] AXI_02_BID;
28918    output [1:0] AXI_02_BRESP;
28919    output AXI_02_BVALID;
28920    output [1:0] AXI_02_DFI_AW_AERR_N;
28921    output AXI_02_DFI_CLK_BUF;
28922    output [7:0] AXI_02_DFI_DBI_BYTE_DISABLE;
28923    output [20:0] AXI_02_DFI_DW_RDDATA_DBI;
28924    output [7:0] AXI_02_DFI_DW_RDDATA_DERR;
28925    output [1:0] AXI_02_DFI_DW_RDDATA_VALID;
28926    output AXI_02_DFI_INIT_COMPLETE;
28927    output AXI_02_DFI_PHYUPD_REQ;
28928    output AXI_02_DFI_PHY_LP_STATE;
28929    output AXI_02_DFI_RST_N_BUF;
28930    output [5:0] AXI_02_MC_STATUS;
28931    output [7:0] AXI_02_PHY_STATUS;
28932    output [255:0] AXI_02_RDATA;
28933    output [31:0] AXI_02_RDATA_PARITY;
28934    output [5:0] AXI_02_RID;
28935    output AXI_02_RLAST;
28936    output [1:0] AXI_02_RRESP;
28937    output AXI_02_RVALID;
28938    output AXI_02_WREADY;
28939    output AXI_03_ARREADY;
28940    output AXI_03_AWREADY;
28941    output [5:0] AXI_03_BID;
28942    output [1:0] AXI_03_BRESP;
28943    output AXI_03_BVALID;
28944    output [1:0] AXI_03_DFI_AW_AERR_N;
28945    output AXI_03_DFI_CLK_BUF;
28946    output [7:0] AXI_03_DFI_DBI_BYTE_DISABLE;
28947    output [20:0] AXI_03_DFI_DW_RDDATA_DBI;
28948    output [7:0] AXI_03_DFI_DW_RDDATA_DERR;
28949    output [1:0] AXI_03_DFI_DW_RDDATA_VALID;
28950    output AXI_03_DFI_INIT_COMPLETE;
28951    output AXI_03_DFI_PHYUPD_REQ;
28952    output AXI_03_DFI_PHY_LP_STATE;
28953    output AXI_03_DFI_RST_N_BUF;
28954    output [255:0] AXI_03_RDATA;
28955    output [31:0] AXI_03_RDATA_PARITY;
28956    output [5:0] AXI_03_RID;
28957    output AXI_03_RLAST;
28958    output [1:0] AXI_03_RRESP;
28959    output AXI_03_RVALID;
28960    output AXI_03_WREADY;
28961    output AXI_04_ARREADY;
28962    output AXI_04_AWREADY;
28963    output [5:0] AXI_04_BID;
28964    output [1:0] AXI_04_BRESP;
28965    output AXI_04_BVALID;
28966    output [1:0] AXI_04_DFI_AW_AERR_N;
28967    output AXI_04_DFI_CLK_BUF;
28968    output [7:0] AXI_04_DFI_DBI_BYTE_DISABLE;
28969    output [20:0] AXI_04_DFI_DW_RDDATA_DBI;
28970    output [7:0] AXI_04_DFI_DW_RDDATA_DERR;
28971    output [1:0] AXI_04_DFI_DW_RDDATA_VALID;
28972    output AXI_04_DFI_INIT_COMPLETE;
28973    output AXI_04_DFI_PHYUPD_REQ;
28974    output AXI_04_DFI_PHY_LP_STATE;
28975    output AXI_04_DFI_RST_N_BUF;
28976    output [5:0] AXI_04_MC_STATUS;
28977    output [7:0] AXI_04_PHY_STATUS;
28978    output [255:0] AXI_04_RDATA;
28979    output [31:0] AXI_04_RDATA_PARITY;
28980    output [5:0] AXI_04_RID;
28981    output AXI_04_RLAST;
28982    output [1:0] AXI_04_RRESP;
28983    output AXI_04_RVALID;
28984    output AXI_04_WREADY;
28985    output AXI_05_ARREADY;
28986    output AXI_05_AWREADY;
28987    output [5:0] AXI_05_BID;
28988    output [1:0] AXI_05_BRESP;
28989    output AXI_05_BVALID;
28990    output [1:0] AXI_05_DFI_AW_AERR_N;
28991    output AXI_05_DFI_CLK_BUF;
28992    output [7:0] AXI_05_DFI_DBI_BYTE_DISABLE;
28993    output [20:0] AXI_05_DFI_DW_RDDATA_DBI;
28994    output [7:0] AXI_05_DFI_DW_RDDATA_DERR;
28995    output [1:0] AXI_05_DFI_DW_RDDATA_VALID;
28996    output AXI_05_DFI_INIT_COMPLETE;
28997    output AXI_05_DFI_PHYUPD_REQ;
28998    output AXI_05_DFI_PHY_LP_STATE;
28999    output AXI_05_DFI_RST_N_BUF;
29000    output [255:0] AXI_05_RDATA;
29001    output [31:0] AXI_05_RDATA_PARITY;
29002    output [5:0] AXI_05_RID;
29003    output AXI_05_RLAST;
29004    output [1:0] AXI_05_RRESP;
29005    output AXI_05_RVALID;
29006    output AXI_05_WREADY;
29007    output AXI_06_ARREADY;
29008    output AXI_06_AWREADY;
29009    output [5:0] AXI_06_BID;
29010    output [1:0] AXI_06_BRESP;
29011    output AXI_06_BVALID;
29012    output [1:0] AXI_06_DFI_AW_AERR_N;
29013    output AXI_06_DFI_CLK_BUF;
29014    output [7:0] AXI_06_DFI_DBI_BYTE_DISABLE;
29015    output [20:0] AXI_06_DFI_DW_RDDATA_DBI;
29016    output [7:0] AXI_06_DFI_DW_RDDATA_DERR;
29017    output [1:0] AXI_06_DFI_DW_RDDATA_VALID;
29018    output AXI_06_DFI_INIT_COMPLETE;
29019    output AXI_06_DFI_PHYUPD_REQ;
29020    output AXI_06_DFI_PHY_LP_STATE;
29021    output AXI_06_DFI_RST_N_BUF;
29022    output [5:0] AXI_06_MC_STATUS;
29023    output [7:0] AXI_06_PHY_STATUS;
29024    output [255:0] AXI_06_RDATA;
29025    output [31:0] AXI_06_RDATA_PARITY;
29026    output [5:0] AXI_06_RID;
29027    output AXI_06_RLAST;
29028    output [1:0] AXI_06_RRESP;
29029    output AXI_06_RVALID;
29030    output AXI_06_WREADY;
29031    output AXI_07_ARREADY;
29032    output AXI_07_AWREADY;
29033    output [5:0] AXI_07_BID;
29034    output [1:0] AXI_07_BRESP;
29035    output AXI_07_BVALID;
29036    output [1:0] AXI_07_DFI_AW_AERR_N;
29037    output AXI_07_DFI_CLK_BUF;
29038    output [7:0] AXI_07_DFI_DBI_BYTE_DISABLE;
29039    output [20:0] AXI_07_DFI_DW_RDDATA_DBI;
29040    output [7:0] AXI_07_DFI_DW_RDDATA_DERR;
29041    output [1:0] AXI_07_DFI_DW_RDDATA_VALID;
29042    output AXI_07_DFI_INIT_COMPLETE;
29043    output AXI_07_DFI_PHYUPD_REQ;
29044    output AXI_07_DFI_PHY_LP_STATE;
29045    output AXI_07_DFI_RST_N_BUF;
29046    output [255:0] AXI_07_RDATA;
29047    output [31:0] AXI_07_RDATA_PARITY;
29048    output [5:0] AXI_07_RID;
29049    output AXI_07_RLAST;
29050    output [1:0] AXI_07_RRESP;
29051    output AXI_07_RVALID;
29052    output AXI_07_WREADY;
29053    output AXI_08_ARREADY;
29054    output AXI_08_AWREADY;
29055    output [5:0] AXI_08_BID;
29056    output [1:0] AXI_08_BRESP;
29057    output AXI_08_BVALID;
29058    output [1:0] AXI_08_DFI_AW_AERR_N;
29059    output AXI_08_DFI_CLK_BUF;
29060    output [7:0] AXI_08_DFI_DBI_BYTE_DISABLE;
29061    output [20:0] AXI_08_DFI_DW_RDDATA_DBI;
29062    output [7:0] AXI_08_DFI_DW_RDDATA_DERR;
29063    output [1:0] AXI_08_DFI_DW_RDDATA_VALID;
29064    output AXI_08_DFI_INIT_COMPLETE;
29065    output AXI_08_DFI_PHYUPD_REQ;
29066    output AXI_08_DFI_PHY_LP_STATE;
29067    output AXI_08_DFI_RST_N_BUF;
29068    output [5:0] AXI_08_MC_STATUS;
29069    output [7:0] AXI_08_PHY_STATUS;
29070    output [255:0] AXI_08_RDATA;
29071    output [31:0] AXI_08_RDATA_PARITY;
29072    output [5:0] AXI_08_RID;
29073    output AXI_08_RLAST;
29074    output [1:0] AXI_08_RRESP;
29075    output AXI_08_RVALID;
29076    output AXI_08_WREADY;
29077    output AXI_09_ARREADY;
29078    output AXI_09_AWREADY;
29079    output [5:0] AXI_09_BID;
29080    output [1:0] AXI_09_BRESP;
29081    output AXI_09_BVALID;
29082    output [1:0] AXI_09_DFI_AW_AERR_N;
29083    output AXI_09_DFI_CLK_BUF;
29084    output [7:0] AXI_09_DFI_DBI_BYTE_DISABLE;
29085    output [20:0] AXI_09_DFI_DW_RDDATA_DBI;
29086    output [7:0] AXI_09_DFI_DW_RDDATA_DERR;
29087    output [1:0] AXI_09_DFI_DW_RDDATA_VALID;
29088    output AXI_09_DFI_INIT_COMPLETE;
29089    output AXI_09_DFI_PHYUPD_REQ;
29090    output AXI_09_DFI_PHY_LP_STATE;
29091    output AXI_09_DFI_RST_N_BUF;
29092    output [255:0] AXI_09_RDATA;
29093    output [31:0] AXI_09_RDATA_PARITY;
29094    output [5:0] AXI_09_RID;
29095    output AXI_09_RLAST;
29096    output [1:0] AXI_09_RRESP;
29097    output AXI_09_RVALID;
29098    output AXI_09_WREADY;
29099    output AXI_10_ARREADY;
29100    output AXI_10_AWREADY;
29101    output [5:0] AXI_10_BID;
29102    output [1:0] AXI_10_BRESP;
29103    output AXI_10_BVALID;
29104    output [1:0] AXI_10_DFI_AW_AERR_N;
29105    output AXI_10_DFI_CLK_BUF;
29106    output [7:0] AXI_10_DFI_DBI_BYTE_DISABLE;
29107    output [20:0] AXI_10_DFI_DW_RDDATA_DBI;
29108    output [7:0] AXI_10_DFI_DW_RDDATA_DERR;
29109    output [1:0] AXI_10_DFI_DW_RDDATA_VALID;
29110    output AXI_10_DFI_INIT_COMPLETE;
29111    output AXI_10_DFI_PHYUPD_REQ;
29112    output AXI_10_DFI_PHY_LP_STATE;
29113    output AXI_10_DFI_RST_N_BUF;
29114    output [5:0] AXI_10_MC_STATUS;
29115    output [7:0] AXI_10_PHY_STATUS;
29116    output [255:0] AXI_10_RDATA;
29117    output [31:0] AXI_10_RDATA_PARITY;
29118    output [5:0] AXI_10_RID;
29119    output AXI_10_RLAST;
29120    output [1:0] AXI_10_RRESP;
29121    output AXI_10_RVALID;
29122    output AXI_10_WREADY;
29123    output AXI_11_ARREADY;
29124    output AXI_11_AWREADY;
29125    output [5:0] AXI_11_BID;
29126    output [1:0] AXI_11_BRESP;
29127    output AXI_11_BVALID;
29128    output [1:0] AXI_11_DFI_AW_AERR_N;
29129    output AXI_11_DFI_CLK_BUF;
29130    output [7:0] AXI_11_DFI_DBI_BYTE_DISABLE;
29131    output [20:0] AXI_11_DFI_DW_RDDATA_DBI;
29132    output [7:0] AXI_11_DFI_DW_RDDATA_DERR;
29133    output [1:0] AXI_11_DFI_DW_RDDATA_VALID;
29134    output AXI_11_DFI_INIT_COMPLETE;
29135    output AXI_11_DFI_PHYUPD_REQ;
29136    output AXI_11_DFI_PHY_LP_STATE;
29137    output AXI_11_DFI_RST_N_BUF;
29138    output [255:0] AXI_11_RDATA;
29139    output [31:0] AXI_11_RDATA_PARITY;
29140    output [5:0] AXI_11_RID;
29141    output AXI_11_RLAST;
29142    output [1:0] AXI_11_RRESP;
29143    output AXI_11_RVALID;
29144    output AXI_11_WREADY;
29145    output AXI_12_ARREADY;
29146    output AXI_12_AWREADY;
29147    output [5:0] AXI_12_BID;
29148    output [1:0] AXI_12_BRESP;
29149    output AXI_12_BVALID;
29150    output [1:0] AXI_12_DFI_AW_AERR_N;
29151    output AXI_12_DFI_CLK_BUF;
29152    output [7:0] AXI_12_DFI_DBI_BYTE_DISABLE;
29153    output [20:0] AXI_12_DFI_DW_RDDATA_DBI;
29154    output [7:0] AXI_12_DFI_DW_RDDATA_DERR;
29155    output [1:0] AXI_12_DFI_DW_RDDATA_VALID;
29156    output AXI_12_DFI_INIT_COMPLETE;
29157    output AXI_12_DFI_PHYUPD_REQ;
29158    output AXI_12_DFI_PHY_LP_STATE;
29159    output AXI_12_DFI_RST_N_BUF;
29160    output [5:0] AXI_12_MC_STATUS;
29161    output [7:0] AXI_12_PHY_STATUS;
29162    output [255:0] AXI_12_RDATA;
29163    output [31:0] AXI_12_RDATA_PARITY;
29164    output [5:0] AXI_12_RID;
29165    output AXI_12_RLAST;
29166    output [1:0] AXI_12_RRESP;
29167    output AXI_12_RVALID;
29168    output AXI_12_WREADY;
29169    output AXI_13_ARREADY;
29170    output AXI_13_AWREADY;
29171    output [5:0] AXI_13_BID;
29172    output [1:0] AXI_13_BRESP;
29173    output AXI_13_BVALID;
29174    output [1:0] AXI_13_DFI_AW_AERR_N;
29175    output AXI_13_DFI_CLK_BUF;
29176    output [7:0] AXI_13_DFI_DBI_BYTE_DISABLE;
29177    output [20:0] AXI_13_DFI_DW_RDDATA_DBI;
29178    output [7:0] AXI_13_DFI_DW_RDDATA_DERR;
29179    output [1:0] AXI_13_DFI_DW_RDDATA_VALID;
29180    output AXI_13_DFI_INIT_COMPLETE;
29181    output AXI_13_DFI_PHYUPD_REQ;
29182    output AXI_13_DFI_PHY_LP_STATE;
29183    output AXI_13_DFI_RST_N_BUF;
29184    output [255:0] AXI_13_RDATA;
29185    output [31:0] AXI_13_RDATA_PARITY;
29186    output [5:0] AXI_13_RID;
29187    output AXI_13_RLAST;
29188    output [1:0] AXI_13_RRESP;
29189    output AXI_13_RVALID;
29190    output AXI_13_WREADY;
29191    output AXI_14_ARREADY;
29192    output AXI_14_AWREADY;
29193    output [5:0] AXI_14_BID;
29194    output [1:0] AXI_14_BRESP;
29195    output AXI_14_BVALID;
29196    output [1:0] AXI_14_DFI_AW_AERR_N;
29197    output AXI_14_DFI_CLK_BUF;
29198    output [7:0] AXI_14_DFI_DBI_BYTE_DISABLE;
29199    output [20:0] AXI_14_DFI_DW_RDDATA_DBI;
29200    output [7:0] AXI_14_DFI_DW_RDDATA_DERR;
29201    output [1:0] AXI_14_DFI_DW_RDDATA_VALID;
29202    output AXI_14_DFI_INIT_COMPLETE;
29203    output AXI_14_DFI_PHYUPD_REQ;
29204    output AXI_14_DFI_PHY_LP_STATE;
29205    output AXI_14_DFI_RST_N_BUF;
29206    output [5:0] AXI_14_MC_STATUS;
29207    output [7:0] AXI_14_PHY_STATUS;
29208    output [255:0] AXI_14_RDATA;
29209    output [31:0] AXI_14_RDATA_PARITY;
29210    output [5:0] AXI_14_RID;
29211    output AXI_14_RLAST;
29212    output [1:0] AXI_14_RRESP;
29213    output AXI_14_RVALID;
29214    output AXI_14_WREADY;
29215    output AXI_15_ARREADY;
29216    output AXI_15_AWREADY;
29217    output [5:0] AXI_15_BID;
29218    output [1:0] AXI_15_BRESP;
29219    output AXI_15_BVALID;
29220    output [1:0] AXI_15_DFI_AW_AERR_N;
29221    output AXI_15_DFI_CLK_BUF;
29222    output [7:0] AXI_15_DFI_DBI_BYTE_DISABLE;
29223    output [20:0] AXI_15_DFI_DW_RDDATA_DBI;
29224    output [7:0] AXI_15_DFI_DW_RDDATA_DERR;
29225    output [1:0] AXI_15_DFI_DW_RDDATA_VALID;
29226    output AXI_15_DFI_INIT_COMPLETE;
29227    output AXI_15_DFI_PHYUPD_REQ;
29228    output AXI_15_DFI_PHY_LP_STATE;
29229    output AXI_15_DFI_RST_N_BUF;
29230    output [255:0] AXI_15_RDATA;
29231    output [31:0] AXI_15_RDATA_PARITY;
29232    output [5:0] AXI_15_RID;
29233    output AXI_15_RLAST;
29234    output [1:0] AXI_15_RRESP;
29235    output AXI_15_RVALID;
29236    output AXI_15_WREADY;
29237    output AXI_16_ARREADY;
29238    output AXI_16_AWREADY;
29239    output [5:0] AXI_16_BID;
29240    output [1:0] AXI_16_BRESP;
29241    output AXI_16_BVALID;
29242    output [1:0] AXI_16_DFI_AW_AERR_N;
29243    output AXI_16_DFI_CLK_BUF;
29244    output [7:0] AXI_16_DFI_DBI_BYTE_DISABLE;
29245    output [20:0] AXI_16_DFI_DW_RDDATA_DBI;
29246    output [7:0] AXI_16_DFI_DW_RDDATA_DERR;
29247    output [1:0] AXI_16_DFI_DW_RDDATA_VALID;
29248    output AXI_16_DFI_INIT_COMPLETE;
29249    output AXI_16_DFI_PHYUPD_REQ;
29250    output AXI_16_DFI_PHY_LP_STATE;
29251    output AXI_16_DFI_RST_N_BUF;
29252    output [5:0] AXI_16_MC_STATUS;
29253    output [7:0] AXI_16_PHY_STATUS;
29254    output [255:0] AXI_16_RDATA;
29255    output [31:0] AXI_16_RDATA_PARITY;
29256    output [5:0] AXI_16_RID;
29257    output AXI_16_RLAST;
29258    output [1:0] AXI_16_RRESP;
29259    output AXI_16_RVALID;
29260    output AXI_16_WREADY;
29261    output AXI_17_ARREADY;
29262    output AXI_17_AWREADY;
29263    output [5:0] AXI_17_BID;
29264    output [1:0] AXI_17_BRESP;
29265    output AXI_17_BVALID;
29266    output [1:0] AXI_17_DFI_AW_AERR_N;
29267    output AXI_17_DFI_CLK_BUF;
29268    output [7:0] AXI_17_DFI_DBI_BYTE_DISABLE;
29269    output [20:0] AXI_17_DFI_DW_RDDATA_DBI;
29270    output [7:0] AXI_17_DFI_DW_RDDATA_DERR;
29271    output [1:0] AXI_17_DFI_DW_RDDATA_VALID;
29272    output AXI_17_DFI_INIT_COMPLETE;
29273    output AXI_17_DFI_PHYUPD_REQ;
29274    output AXI_17_DFI_PHY_LP_STATE;
29275    output AXI_17_DFI_RST_N_BUF;
29276    output [255:0] AXI_17_RDATA;
29277    output [31:0] AXI_17_RDATA_PARITY;
29278    output [5:0] AXI_17_RID;
29279    output AXI_17_RLAST;
29280    output [1:0] AXI_17_RRESP;
29281    output AXI_17_RVALID;
29282    output AXI_17_WREADY;
29283    output AXI_18_ARREADY;
29284    output AXI_18_AWREADY;
29285    output [5:0] AXI_18_BID;
29286    output [1:0] AXI_18_BRESP;
29287    output AXI_18_BVALID;
29288    output [1:0] AXI_18_DFI_AW_AERR_N;
29289    output AXI_18_DFI_CLK_BUF;
29290    output [7:0] AXI_18_DFI_DBI_BYTE_DISABLE;
29291    output [20:0] AXI_18_DFI_DW_RDDATA_DBI;
29292    output [7:0] AXI_18_DFI_DW_RDDATA_DERR;
29293    output [1:0] AXI_18_DFI_DW_RDDATA_VALID;
29294    output AXI_18_DFI_INIT_COMPLETE;
29295    output AXI_18_DFI_PHYUPD_REQ;
29296    output AXI_18_DFI_PHY_LP_STATE;
29297    output AXI_18_DFI_RST_N_BUF;
29298    output [5:0] AXI_18_MC_STATUS;
29299    output [7:0] AXI_18_PHY_STATUS;
29300    output [255:0] AXI_18_RDATA;
29301    output [31:0] AXI_18_RDATA_PARITY;
29302    output [5:0] AXI_18_RID;
29303    output AXI_18_RLAST;
29304    output [1:0] AXI_18_RRESP;
29305    output AXI_18_RVALID;
29306    output AXI_18_WREADY;
29307    output AXI_19_ARREADY;
29308    output AXI_19_AWREADY;
29309    output [5:0] AXI_19_BID;
29310    output [1:0] AXI_19_BRESP;
29311    output AXI_19_BVALID;
29312    output [1:0] AXI_19_DFI_AW_AERR_N;
29313    output AXI_19_DFI_CLK_BUF;
29314    output [7:0] AXI_19_DFI_DBI_BYTE_DISABLE;
29315    output [20:0] AXI_19_DFI_DW_RDDATA_DBI;
29316    output [7:0] AXI_19_DFI_DW_RDDATA_DERR;
29317    output [1:0] AXI_19_DFI_DW_RDDATA_VALID;
29318    output AXI_19_DFI_INIT_COMPLETE;
29319    output AXI_19_DFI_PHYUPD_REQ;
29320    output AXI_19_DFI_PHY_LP_STATE;
29321    output AXI_19_DFI_RST_N_BUF;
29322    output [255:0] AXI_19_RDATA;
29323    output [31:0] AXI_19_RDATA_PARITY;
29324    output [5:0] AXI_19_RID;
29325    output AXI_19_RLAST;
29326    output [1:0] AXI_19_RRESP;
29327    output AXI_19_RVALID;
29328    output AXI_19_WREADY;
29329    output AXI_20_ARREADY;
29330    output AXI_20_AWREADY;
29331    output [5:0] AXI_20_BID;
29332    output [1:0] AXI_20_BRESP;
29333    output AXI_20_BVALID;
29334    output [1:0] AXI_20_DFI_AW_AERR_N;
29335    output AXI_20_DFI_CLK_BUF;
29336    output [7:0] AXI_20_DFI_DBI_BYTE_DISABLE;
29337    output [20:0] AXI_20_DFI_DW_RDDATA_DBI;
29338    output [7:0] AXI_20_DFI_DW_RDDATA_DERR;
29339    output [1:0] AXI_20_DFI_DW_RDDATA_VALID;
29340    output AXI_20_DFI_INIT_COMPLETE;
29341    output AXI_20_DFI_PHYUPD_REQ;
29342    output AXI_20_DFI_PHY_LP_STATE;
29343    output AXI_20_DFI_RST_N_BUF;
29344    output [5:0] AXI_20_MC_STATUS;
29345    output [7:0] AXI_20_PHY_STATUS;
29346    output [255:0] AXI_20_RDATA;
29347    output [31:0] AXI_20_RDATA_PARITY;
29348    output [5:0] AXI_20_RID;
29349    output AXI_20_RLAST;
29350    output [1:0] AXI_20_RRESP;
29351    output AXI_20_RVALID;
29352    output AXI_20_WREADY;
29353    output AXI_21_ARREADY;
29354    output AXI_21_AWREADY;
29355    output [5:0] AXI_21_BID;
29356    output [1:0] AXI_21_BRESP;
29357    output AXI_21_BVALID;
29358    output [1:0] AXI_21_DFI_AW_AERR_N;
29359    output AXI_21_DFI_CLK_BUF;
29360    output [7:0] AXI_21_DFI_DBI_BYTE_DISABLE;
29361    output [20:0] AXI_21_DFI_DW_RDDATA_DBI;
29362    output [7:0] AXI_21_DFI_DW_RDDATA_DERR;
29363    output [1:0] AXI_21_DFI_DW_RDDATA_VALID;
29364    output AXI_21_DFI_INIT_COMPLETE;
29365    output AXI_21_DFI_PHYUPD_REQ;
29366    output AXI_21_DFI_PHY_LP_STATE;
29367    output AXI_21_DFI_RST_N_BUF;
29368    output [255:0] AXI_21_RDATA;
29369    output [31:0] AXI_21_RDATA_PARITY;
29370    output [5:0] AXI_21_RID;
29371    output AXI_21_RLAST;
29372    output [1:0] AXI_21_RRESP;
29373    output AXI_21_RVALID;
29374    output AXI_21_WREADY;
29375    output AXI_22_ARREADY;
29376    output AXI_22_AWREADY;
29377    output [5:0] AXI_22_BID;
29378    output [1:0] AXI_22_BRESP;
29379    output AXI_22_BVALID;
29380    output [1:0] AXI_22_DFI_AW_AERR_N;
29381    output AXI_22_DFI_CLK_BUF;
29382    output [7:0] AXI_22_DFI_DBI_BYTE_DISABLE;
29383    output [20:0] AXI_22_DFI_DW_RDDATA_DBI;
29384    output [7:0] AXI_22_DFI_DW_RDDATA_DERR;
29385    output [1:0] AXI_22_DFI_DW_RDDATA_VALID;
29386    output AXI_22_DFI_INIT_COMPLETE;
29387    output AXI_22_DFI_PHYUPD_REQ;
29388    output AXI_22_DFI_PHY_LP_STATE;
29389    output AXI_22_DFI_RST_N_BUF;
29390    output [5:0] AXI_22_MC_STATUS;
29391    output [7:0] AXI_22_PHY_STATUS;
29392    output [255:0] AXI_22_RDATA;
29393    output [31:0] AXI_22_RDATA_PARITY;
29394    output [5:0] AXI_22_RID;
29395    output AXI_22_RLAST;
29396    output [1:0] AXI_22_RRESP;
29397    output AXI_22_RVALID;
29398    output AXI_22_WREADY;
29399    output AXI_23_ARREADY;
29400    output AXI_23_AWREADY;
29401    output [5:0] AXI_23_BID;
29402    output [1:0] AXI_23_BRESP;
29403    output AXI_23_BVALID;
29404    output [1:0] AXI_23_DFI_AW_AERR_N;
29405    output AXI_23_DFI_CLK_BUF;
29406    output [7:0] AXI_23_DFI_DBI_BYTE_DISABLE;
29407    output [20:0] AXI_23_DFI_DW_RDDATA_DBI;
29408    output [7:0] AXI_23_DFI_DW_RDDATA_DERR;
29409    output [1:0] AXI_23_DFI_DW_RDDATA_VALID;
29410    output AXI_23_DFI_INIT_COMPLETE;
29411    output AXI_23_DFI_PHYUPD_REQ;
29412    output AXI_23_DFI_PHY_LP_STATE;
29413    output AXI_23_DFI_RST_N_BUF;
29414    output [255:0] AXI_23_RDATA;
29415    output [31:0] AXI_23_RDATA_PARITY;
29416    output [5:0] AXI_23_RID;
29417    output AXI_23_RLAST;
29418    output [1:0] AXI_23_RRESP;
29419    output AXI_23_RVALID;
29420    output AXI_23_WREADY;
29421    output AXI_24_ARREADY;
29422    output AXI_24_AWREADY;
29423    output [5:0] AXI_24_BID;
29424    output [1:0] AXI_24_BRESP;
29425    output AXI_24_BVALID;
29426    output [1:0] AXI_24_DFI_AW_AERR_N;
29427    output AXI_24_DFI_CLK_BUF;
29428    output [7:0] AXI_24_DFI_DBI_BYTE_DISABLE;
29429    output [20:0] AXI_24_DFI_DW_RDDATA_DBI;
29430    output [7:0] AXI_24_DFI_DW_RDDATA_DERR;
29431    output [1:0] AXI_24_DFI_DW_RDDATA_VALID;
29432    output AXI_24_DFI_INIT_COMPLETE;
29433    output AXI_24_DFI_PHYUPD_REQ;
29434    output AXI_24_DFI_PHY_LP_STATE;
29435    output AXI_24_DFI_RST_N_BUF;
29436    output [5:0] AXI_24_MC_STATUS;
29437    output [7:0] AXI_24_PHY_STATUS;
29438    output [255:0] AXI_24_RDATA;
29439    output [31:0] AXI_24_RDATA_PARITY;
29440    output [5:0] AXI_24_RID;
29441    output AXI_24_RLAST;
29442    output [1:0] AXI_24_RRESP;
29443    output AXI_24_RVALID;
29444    output AXI_24_WREADY;
29445    output AXI_25_ARREADY;
29446    output AXI_25_AWREADY;
29447    output [5:0] AXI_25_BID;
29448    output [1:0] AXI_25_BRESP;
29449    output AXI_25_BVALID;
29450    output [1:0] AXI_25_DFI_AW_AERR_N;
29451    output AXI_25_DFI_CLK_BUF;
29452    output [7:0] AXI_25_DFI_DBI_BYTE_DISABLE;
29453    output [20:0] AXI_25_DFI_DW_RDDATA_DBI;
29454    output [7:0] AXI_25_DFI_DW_RDDATA_DERR;
29455    output [1:0] AXI_25_DFI_DW_RDDATA_VALID;
29456    output AXI_25_DFI_INIT_COMPLETE;
29457    output AXI_25_DFI_PHYUPD_REQ;
29458    output AXI_25_DFI_PHY_LP_STATE;
29459    output AXI_25_DFI_RST_N_BUF;
29460    output [255:0] AXI_25_RDATA;
29461    output [31:0] AXI_25_RDATA_PARITY;
29462    output [5:0] AXI_25_RID;
29463    output AXI_25_RLAST;
29464    output [1:0] AXI_25_RRESP;
29465    output AXI_25_RVALID;
29466    output AXI_25_WREADY;
29467    output AXI_26_ARREADY;
29468    output AXI_26_AWREADY;
29469    output [5:0] AXI_26_BID;
29470    output [1:0] AXI_26_BRESP;
29471    output AXI_26_BVALID;
29472    output [1:0] AXI_26_DFI_AW_AERR_N;
29473    output AXI_26_DFI_CLK_BUF;
29474    output [7:0] AXI_26_DFI_DBI_BYTE_DISABLE;
29475    output [20:0] AXI_26_DFI_DW_RDDATA_DBI;
29476    output [7:0] AXI_26_DFI_DW_RDDATA_DERR;
29477    output [1:0] AXI_26_DFI_DW_RDDATA_VALID;
29478    output AXI_26_DFI_INIT_COMPLETE;
29479    output AXI_26_DFI_PHYUPD_REQ;
29480    output AXI_26_DFI_PHY_LP_STATE;
29481    output AXI_26_DFI_RST_N_BUF;
29482    output [5:0] AXI_26_MC_STATUS;
29483    output [7:0] AXI_26_PHY_STATUS;
29484    output [255:0] AXI_26_RDATA;
29485    output [31:0] AXI_26_RDATA_PARITY;
29486    output [5:0] AXI_26_RID;
29487    output AXI_26_RLAST;
29488    output [1:0] AXI_26_RRESP;
29489    output AXI_26_RVALID;
29490    output AXI_26_WREADY;
29491    output AXI_27_ARREADY;
29492    output AXI_27_AWREADY;
29493    output [5:0] AXI_27_BID;
29494    output [1:0] AXI_27_BRESP;
29495    output AXI_27_BVALID;
29496    output [1:0] AXI_27_DFI_AW_AERR_N;
29497    output AXI_27_DFI_CLK_BUF;
29498    output [7:0] AXI_27_DFI_DBI_BYTE_DISABLE;
29499    output [20:0] AXI_27_DFI_DW_RDDATA_DBI;
29500    output [7:0] AXI_27_DFI_DW_RDDATA_DERR;
29501    output [1:0] AXI_27_DFI_DW_RDDATA_VALID;
29502    output AXI_27_DFI_INIT_COMPLETE;
29503    output AXI_27_DFI_PHYUPD_REQ;
29504    output AXI_27_DFI_PHY_LP_STATE;
29505    output AXI_27_DFI_RST_N_BUF;
29506    output [255:0] AXI_27_RDATA;
29507    output [31:0] AXI_27_RDATA_PARITY;
29508    output [5:0] AXI_27_RID;
29509    output AXI_27_RLAST;
29510    output [1:0] AXI_27_RRESP;
29511    output AXI_27_RVALID;
29512    output AXI_27_WREADY;
29513    output AXI_28_ARREADY;
29514    output AXI_28_AWREADY;
29515    output [5:0] AXI_28_BID;
29516    output [1:0] AXI_28_BRESP;
29517    output AXI_28_BVALID;
29518    output [1:0] AXI_28_DFI_AW_AERR_N;
29519    output AXI_28_DFI_CLK_BUF;
29520    output [7:0] AXI_28_DFI_DBI_BYTE_DISABLE;
29521    output [20:0] AXI_28_DFI_DW_RDDATA_DBI;
29522    output [7:0] AXI_28_DFI_DW_RDDATA_DERR;
29523    output [1:0] AXI_28_DFI_DW_RDDATA_VALID;
29524    output AXI_28_DFI_INIT_COMPLETE;
29525    output AXI_28_DFI_PHYUPD_REQ;
29526    output AXI_28_DFI_PHY_LP_STATE;
29527    output AXI_28_DFI_RST_N_BUF;
29528    output [5:0] AXI_28_MC_STATUS;
29529    output [7:0] AXI_28_PHY_STATUS;
29530    output [255:0] AXI_28_RDATA;
29531    output [31:0] AXI_28_RDATA_PARITY;
29532    output [5:0] AXI_28_RID;
29533    output AXI_28_RLAST;
29534    output [1:0] AXI_28_RRESP;
29535    output AXI_28_RVALID;
29536    output AXI_28_WREADY;
29537    output AXI_29_ARREADY;
29538    output AXI_29_AWREADY;
29539    output [5:0] AXI_29_BID;
29540    output [1:0] AXI_29_BRESP;
29541    output AXI_29_BVALID;
29542    output [1:0] AXI_29_DFI_AW_AERR_N;
29543    output AXI_29_DFI_CLK_BUF;
29544    output [7:0] AXI_29_DFI_DBI_BYTE_DISABLE;
29545    output [20:0] AXI_29_DFI_DW_RDDATA_DBI;
29546    output [7:0] AXI_29_DFI_DW_RDDATA_DERR;
29547    output [1:0] AXI_29_DFI_DW_RDDATA_VALID;
29548    output AXI_29_DFI_INIT_COMPLETE;
29549    output AXI_29_DFI_PHYUPD_REQ;
29550    output AXI_29_DFI_PHY_LP_STATE;
29551    output AXI_29_DFI_RST_N_BUF;
29552    output [255:0] AXI_29_RDATA;
29553    output [31:0] AXI_29_RDATA_PARITY;
29554    output [5:0] AXI_29_RID;
29555    output AXI_29_RLAST;
29556    output [1:0] AXI_29_RRESP;
29557    output AXI_29_RVALID;
29558    output AXI_29_WREADY;
29559    output AXI_30_ARREADY;
29560    output AXI_30_AWREADY;
29561    output [5:0] AXI_30_BID;
29562    output [1:0] AXI_30_BRESP;
29563    output AXI_30_BVALID;
29564    output [1:0] AXI_30_DFI_AW_AERR_N;
29565    output AXI_30_DFI_CLK_BUF;
29566    output [7:0] AXI_30_DFI_DBI_BYTE_DISABLE;
29567    output [20:0] AXI_30_DFI_DW_RDDATA_DBI;
29568    output [7:0] AXI_30_DFI_DW_RDDATA_DERR;
29569    output [1:0] AXI_30_DFI_DW_RDDATA_VALID;
29570    output AXI_30_DFI_INIT_COMPLETE;
29571    output AXI_30_DFI_PHYUPD_REQ;
29572    output AXI_30_DFI_PHY_LP_STATE;
29573    output AXI_30_DFI_RST_N_BUF;
29574    output [5:0] AXI_30_MC_STATUS;
29575    output [7:0] AXI_30_PHY_STATUS;
29576    output [255:0] AXI_30_RDATA;
29577    output [31:0] AXI_30_RDATA_PARITY;
29578    output [5:0] AXI_30_RID;
29579    output AXI_30_RLAST;
29580    output [1:0] AXI_30_RRESP;
29581    output AXI_30_RVALID;
29582    output AXI_30_WREADY;
29583    output AXI_31_ARREADY;
29584    output AXI_31_AWREADY;
29585    output [5:0] AXI_31_BID;
29586    output [1:0] AXI_31_BRESP;
29587    output AXI_31_BVALID;
29588    output [1:0] AXI_31_DFI_AW_AERR_N;
29589    output AXI_31_DFI_CLK_BUF;
29590    output [7:0] AXI_31_DFI_DBI_BYTE_DISABLE;
29591    output [20:0] AXI_31_DFI_DW_RDDATA_DBI;
29592    output [7:0] AXI_31_DFI_DW_RDDATA_DERR;
29593    output [1:0] AXI_31_DFI_DW_RDDATA_VALID;
29594    output AXI_31_DFI_INIT_COMPLETE;
29595    output AXI_31_DFI_PHYUPD_REQ;
29596    output AXI_31_DFI_PHY_LP_STATE;
29597    output AXI_31_DFI_RST_N_BUF;
29598    output [255:0] AXI_31_RDATA;
29599    output [31:0] AXI_31_RDATA_PARITY;
29600    output [5:0] AXI_31_RID;
29601    output AXI_31_RLAST;
29602    output [1:0] AXI_31_RRESP;
29603    output AXI_31_RVALID;
29604    output AXI_31_WREADY;
29605    output DRAM_0_STAT_CATTRIP;
29606    output [2:0] DRAM_0_STAT_TEMP;
29607    output DRAM_1_STAT_CATTRIP;
29608    output [2:0] DRAM_1_STAT_TEMP;
29609    input [21:0] APB_0_PADDR;
29610    (* invertible_pin = "IS_APB_0_PCLK_INVERTED" *)
29611    input APB_0_PCLK;
29612    input APB_0_PENABLE;
29613    (* invertible_pin = "IS_APB_0_PRESET_N_INVERTED" *)
29614    input APB_0_PRESET_N;
29615    input APB_0_PSEL;
29616    input [31:0] APB_0_PWDATA;
29617    input APB_0_PWRITE;
29618    input [21:0] APB_1_PADDR;
29619    (* invertible_pin = "IS_APB_1_PCLK_INVERTED" *)
29620    input APB_1_PCLK;
29621    input APB_1_PENABLE;
29622    (* invertible_pin = "IS_APB_1_PRESET_N_INVERTED" *)
29623    input APB_1_PRESET_N;
29624    input APB_1_PSEL;
29625    input [31:0] APB_1_PWDATA;
29626    input APB_1_PWRITE;
29627    (* invertible_pin = "IS_AXI_00_ACLK_INVERTED" *)
29628    input AXI_00_ACLK;
29629    input [36:0] AXI_00_ARADDR;
29630    input [1:0] AXI_00_ARBURST;
29631    (* invertible_pin = "IS_AXI_00_ARESET_N_INVERTED" *)
29632    input AXI_00_ARESET_N;
29633    input [5:0] AXI_00_ARID;
29634    input [3:0] AXI_00_ARLEN;
29635    input [2:0] AXI_00_ARSIZE;
29636    input AXI_00_ARVALID;
29637    input [36:0] AXI_00_AWADDR;
29638    input [1:0] AXI_00_AWBURST;
29639    input [5:0] AXI_00_AWID;
29640    input [3:0] AXI_00_AWLEN;
29641    input [2:0] AXI_00_AWSIZE;
29642    input AXI_00_AWVALID;
29643    input AXI_00_BREADY;
29644    input AXI_00_DFI_LP_PWR_X_REQ;
29645    input AXI_00_RREADY;
29646    input [255:0] AXI_00_WDATA;
29647    input [31:0] AXI_00_WDATA_PARITY;
29648    input AXI_00_WLAST;
29649    input [31:0] AXI_00_WSTRB;
29650    input AXI_00_WVALID;
29651    (* invertible_pin = "IS_AXI_01_ACLK_INVERTED" *)
29652    input AXI_01_ACLK;
29653    input [36:0] AXI_01_ARADDR;
29654    input [1:0] AXI_01_ARBURST;
29655    (* invertible_pin = "IS_AXI_01_ARESET_N_INVERTED" *)
29656    input AXI_01_ARESET_N;
29657    input [5:0] AXI_01_ARID;
29658    input [3:0] AXI_01_ARLEN;
29659    input [2:0] AXI_01_ARSIZE;
29660    input AXI_01_ARVALID;
29661    input [36:0] AXI_01_AWADDR;
29662    input [1:0] AXI_01_AWBURST;
29663    input [5:0] AXI_01_AWID;
29664    input [3:0] AXI_01_AWLEN;
29665    input [2:0] AXI_01_AWSIZE;
29666    input AXI_01_AWVALID;
29667    input AXI_01_BREADY;
29668    input AXI_01_DFI_LP_PWR_X_REQ;
29669    input AXI_01_RREADY;
29670    input [255:0] AXI_01_WDATA;
29671    input [31:0] AXI_01_WDATA_PARITY;
29672    input AXI_01_WLAST;
29673    input [31:0] AXI_01_WSTRB;
29674    input AXI_01_WVALID;
29675    (* invertible_pin = "IS_AXI_02_ACLK_INVERTED" *)
29676    input AXI_02_ACLK;
29677    input [36:0] AXI_02_ARADDR;
29678    input [1:0] AXI_02_ARBURST;
29679    (* invertible_pin = "IS_AXI_02_ARESET_N_INVERTED" *)
29680    input AXI_02_ARESET_N;
29681    input [5:0] AXI_02_ARID;
29682    input [3:0] AXI_02_ARLEN;
29683    input [2:0] AXI_02_ARSIZE;
29684    input AXI_02_ARVALID;
29685    input [36:0] AXI_02_AWADDR;
29686    input [1:0] AXI_02_AWBURST;
29687    input [5:0] AXI_02_AWID;
29688    input [3:0] AXI_02_AWLEN;
29689    input [2:0] AXI_02_AWSIZE;
29690    input AXI_02_AWVALID;
29691    input AXI_02_BREADY;
29692    input AXI_02_DFI_LP_PWR_X_REQ;
29693    input AXI_02_RREADY;
29694    input [255:0] AXI_02_WDATA;
29695    input [31:0] AXI_02_WDATA_PARITY;
29696    input AXI_02_WLAST;
29697    input [31:0] AXI_02_WSTRB;
29698    input AXI_02_WVALID;
29699    (* invertible_pin = "IS_AXI_03_ACLK_INVERTED" *)
29700    input AXI_03_ACLK;
29701    input [36:0] AXI_03_ARADDR;
29702    input [1:0] AXI_03_ARBURST;
29703    (* invertible_pin = "IS_AXI_03_ARESET_N_INVERTED" *)
29704    input AXI_03_ARESET_N;
29705    input [5:0] AXI_03_ARID;
29706    input [3:0] AXI_03_ARLEN;
29707    input [2:0] AXI_03_ARSIZE;
29708    input AXI_03_ARVALID;
29709    input [36:0] AXI_03_AWADDR;
29710    input [1:0] AXI_03_AWBURST;
29711    input [5:0] AXI_03_AWID;
29712    input [3:0] AXI_03_AWLEN;
29713    input [2:0] AXI_03_AWSIZE;
29714    input AXI_03_AWVALID;
29715    input AXI_03_BREADY;
29716    input AXI_03_DFI_LP_PWR_X_REQ;
29717    input AXI_03_RREADY;
29718    input [255:0] AXI_03_WDATA;
29719    input [31:0] AXI_03_WDATA_PARITY;
29720    input AXI_03_WLAST;
29721    input [31:0] AXI_03_WSTRB;
29722    input AXI_03_WVALID;
29723    (* invertible_pin = "IS_AXI_04_ACLK_INVERTED" *)
29724    input AXI_04_ACLK;
29725    input [36:0] AXI_04_ARADDR;
29726    input [1:0] AXI_04_ARBURST;
29727    (* invertible_pin = "IS_AXI_04_ARESET_N_INVERTED" *)
29728    input AXI_04_ARESET_N;
29729    input [5:0] AXI_04_ARID;
29730    input [3:0] AXI_04_ARLEN;
29731    input [2:0] AXI_04_ARSIZE;
29732    input AXI_04_ARVALID;
29733    input [36:0] AXI_04_AWADDR;
29734    input [1:0] AXI_04_AWBURST;
29735    input [5:0] AXI_04_AWID;
29736    input [3:0] AXI_04_AWLEN;
29737    input [2:0] AXI_04_AWSIZE;
29738    input AXI_04_AWVALID;
29739    input AXI_04_BREADY;
29740    input AXI_04_DFI_LP_PWR_X_REQ;
29741    input AXI_04_RREADY;
29742    input [255:0] AXI_04_WDATA;
29743    input [31:0] AXI_04_WDATA_PARITY;
29744    input AXI_04_WLAST;
29745    input [31:0] AXI_04_WSTRB;
29746    input AXI_04_WVALID;
29747    (* invertible_pin = "IS_AXI_05_ACLK_INVERTED" *)
29748    input AXI_05_ACLK;
29749    input [36:0] AXI_05_ARADDR;
29750    input [1:0] AXI_05_ARBURST;
29751    (* invertible_pin = "IS_AXI_05_ARESET_N_INVERTED" *)
29752    input AXI_05_ARESET_N;
29753    input [5:0] AXI_05_ARID;
29754    input [3:0] AXI_05_ARLEN;
29755    input [2:0] AXI_05_ARSIZE;
29756    input AXI_05_ARVALID;
29757    input [36:0] AXI_05_AWADDR;
29758    input [1:0] AXI_05_AWBURST;
29759    input [5:0] AXI_05_AWID;
29760    input [3:0] AXI_05_AWLEN;
29761    input [2:0] AXI_05_AWSIZE;
29762    input AXI_05_AWVALID;
29763    input AXI_05_BREADY;
29764    input AXI_05_DFI_LP_PWR_X_REQ;
29765    input AXI_05_RREADY;
29766    input [255:0] AXI_05_WDATA;
29767    input [31:0] AXI_05_WDATA_PARITY;
29768    input AXI_05_WLAST;
29769    input [31:0] AXI_05_WSTRB;
29770    input AXI_05_WVALID;
29771    (* invertible_pin = "IS_AXI_06_ACLK_INVERTED" *)
29772    input AXI_06_ACLK;
29773    input [36:0] AXI_06_ARADDR;
29774    input [1:0] AXI_06_ARBURST;
29775    (* invertible_pin = "IS_AXI_06_ARESET_N_INVERTED" *)
29776    input AXI_06_ARESET_N;
29777    input [5:0] AXI_06_ARID;
29778    input [3:0] AXI_06_ARLEN;
29779    input [2:0] AXI_06_ARSIZE;
29780    input AXI_06_ARVALID;
29781    input [36:0] AXI_06_AWADDR;
29782    input [1:0] AXI_06_AWBURST;
29783    input [5:0] AXI_06_AWID;
29784    input [3:0] AXI_06_AWLEN;
29785    input [2:0] AXI_06_AWSIZE;
29786    input AXI_06_AWVALID;
29787    input AXI_06_BREADY;
29788    input AXI_06_DFI_LP_PWR_X_REQ;
29789    input AXI_06_RREADY;
29790    input [255:0] AXI_06_WDATA;
29791    input [31:0] AXI_06_WDATA_PARITY;
29792    input AXI_06_WLAST;
29793    input [31:0] AXI_06_WSTRB;
29794    input AXI_06_WVALID;
29795    (* invertible_pin = "IS_AXI_07_ACLK_INVERTED" *)
29796    input AXI_07_ACLK;
29797    input [36:0] AXI_07_ARADDR;
29798    input [1:0] AXI_07_ARBURST;
29799    (* invertible_pin = "IS_AXI_07_ARESET_N_INVERTED" *)
29800    input AXI_07_ARESET_N;
29801    input [5:0] AXI_07_ARID;
29802    input [3:0] AXI_07_ARLEN;
29803    input [2:0] AXI_07_ARSIZE;
29804    input AXI_07_ARVALID;
29805    input [36:0] AXI_07_AWADDR;
29806    input [1:0] AXI_07_AWBURST;
29807    input [5:0] AXI_07_AWID;
29808    input [3:0] AXI_07_AWLEN;
29809    input [2:0] AXI_07_AWSIZE;
29810    input AXI_07_AWVALID;
29811    input AXI_07_BREADY;
29812    input AXI_07_DFI_LP_PWR_X_REQ;
29813    input AXI_07_RREADY;
29814    input [255:0] AXI_07_WDATA;
29815    input [31:0] AXI_07_WDATA_PARITY;
29816    input AXI_07_WLAST;
29817    input [31:0] AXI_07_WSTRB;
29818    input AXI_07_WVALID;
29819    (* invertible_pin = "IS_AXI_08_ACLK_INVERTED" *)
29820    input AXI_08_ACLK;
29821    input [36:0] AXI_08_ARADDR;
29822    input [1:0] AXI_08_ARBURST;
29823    (* invertible_pin = "IS_AXI_08_ARESET_N_INVERTED" *)
29824    input AXI_08_ARESET_N;
29825    input [5:0] AXI_08_ARID;
29826    input [3:0] AXI_08_ARLEN;
29827    input [2:0] AXI_08_ARSIZE;
29828    input AXI_08_ARVALID;
29829    input [36:0] AXI_08_AWADDR;
29830    input [1:0] AXI_08_AWBURST;
29831    input [5:0] AXI_08_AWID;
29832    input [3:0] AXI_08_AWLEN;
29833    input [2:0] AXI_08_AWSIZE;
29834    input AXI_08_AWVALID;
29835    input AXI_08_BREADY;
29836    input AXI_08_DFI_LP_PWR_X_REQ;
29837    input AXI_08_RREADY;
29838    input [255:0] AXI_08_WDATA;
29839    input [31:0] AXI_08_WDATA_PARITY;
29840    input AXI_08_WLAST;
29841    input [31:0] AXI_08_WSTRB;
29842    input AXI_08_WVALID;
29843    (* invertible_pin = "IS_AXI_09_ACLK_INVERTED" *)
29844    input AXI_09_ACLK;
29845    input [36:0] AXI_09_ARADDR;
29846    input [1:0] AXI_09_ARBURST;
29847    (* invertible_pin = "IS_AXI_09_ARESET_N_INVERTED" *)
29848    input AXI_09_ARESET_N;
29849    input [5:0] AXI_09_ARID;
29850    input [3:0] AXI_09_ARLEN;
29851    input [2:0] AXI_09_ARSIZE;
29852    input AXI_09_ARVALID;
29853    input [36:0] AXI_09_AWADDR;
29854    input [1:0] AXI_09_AWBURST;
29855    input [5:0] AXI_09_AWID;
29856    input [3:0] AXI_09_AWLEN;
29857    input [2:0] AXI_09_AWSIZE;
29858    input AXI_09_AWVALID;
29859    input AXI_09_BREADY;
29860    input AXI_09_DFI_LP_PWR_X_REQ;
29861    input AXI_09_RREADY;
29862    input [255:0] AXI_09_WDATA;
29863    input [31:0] AXI_09_WDATA_PARITY;
29864    input AXI_09_WLAST;
29865    input [31:0] AXI_09_WSTRB;
29866    input AXI_09_WVALID;
29867    (* invertible_pin = "IS_AXI_10_ACLK_INVERTED" *)
29868    input AXI_10_ACLK;
29869    input [36:0] AXI_10_ARADDR;
29870    input [1:0] AXI_10_ARBURST;
29871    (* invertible_pin = "IS_AXI_10_ARESET_N_INVERTED" *)
29872    input AXI_10_ARESET_N;
29873    input [5:0] AXI_10_ARID;
29874    input [3:0] AXI_10_ARLEN;
29875    input [2:0] AXI_10_ARSIZE;
29876    input AXI_10_ARVALID;
29877    input [36:0] AXI_10_AWADDR;
29878    input [1:0] AXI_10_AWBURST;
29879    input [5:0] AXI_10_AWID;
29880    input [3:0] AXI_10_AWLEN;
29881    input [2:0] AXI_10_AWSIZE;
29882    input AXI_10_AWVALID;
29883    input AXI_10_BREADY;
29884    input AXI_10_DFI_LP_PWR_X_REQ;
29885    input AXI_10_RREADY;
29886    input [255:0] AXI_10_WDATA;
29887    input [31:0] AXI_10_WDATA_PARITY;
29888    input AXI_10_WLAST;
29889    input [31:0] AXI_10_WSTRB;
29890    input AXI_10_WVALID;
29891    (* invertible_pin = "IS_AXI_11_ACLK_INVERTED" *)
29892    input AXI_11_ACLK;
29893    input [36:0] AXI_11_ARADDR;
29894    input [1:0] AXI_11_ARBURST;
29895    (* invertible_pin = "IS_AXI_11_ARESET_N_INVERTED" *)
29896    input AXI_11_ARESET_N;
29897    input [5:0] AXI_11_ARID;
29898    input [3:0] AXI_11_ARLEN;
29899    input [2:0] AXI_11_ARSIZE;
29900    input AXI_11_ARVALID;
29901    input [36:0] AXI_11_AWADDR;
29902    input [1:0] AXI_11_AWBURST;
29903    input [5:0] AXI_11_AWID;
29904    input [3:0] AXI_11_AWLEN;
29905    input [2:0] AXI_11_AWSIZE;
29906    input AXI_11_AWVALID;
29907    input AXI_11_BREADY;
29908    input AXI_11_DFI_LP_PWR_X_REQ;
29909    input AXI_11_RREADY;
29910    input [255:0] AXI_11_WDATA;
29911    input [31:0] AXI_11_WDATA_PARITY;
29912    input AXI_11_WLAST;
29913    input [31:0] AXI_11_WSTRB;
29914    input AXI_11_WVALID;
29915    (* invertible_pin = "IS_AXI_12_ACLK_INVERTED" *)
29916    input AXI_12_ACLK;
29917    input [36:0] AXI_12_ARADDR;
29918    input [1:0] AXI_12_ARBURST;
29919    (* invertible_pin = "IS_AXI_12_ARESET_N_INVERTED" *)
29920    input AXI_12_ARESET_N;
29921    input [5:0] AXI_12_ARID;
29922    input [3:0] AXI_12_ARLEN;
29923    input [2:0] AXI_12_ARSIZE;
29924    input AXI_12_ARVALID;
29925    input [36:0] AXI_12_AWADDR;
29926    input [1:0] AXI_12_AWBURST;
29927    input [5:0] AXI_12_AWID;
29928    input [3:0] AXI_12_AWLEN;
29929    input [2:0] AXI_12_AWSIZE;
29930    input AXI_12_AWVALID;
29931    input AXI_12_BREADY;
29932    input AXI_12_DFI_LP_PWR_X_REQ;
29933    input AXI_12_RREADY;
29934    input [255:0] AXI_12_WDATA;
29935    input [31:0] AXI_12_WDATA_PARITY;
29936    input AXI_12_WLAST;
29937    input [31:0] AXI_12_WSTRB;
29938    input AXI_12_WVALID;
29939    (* invertible_pin = "IS_AXI_13_ACLK_INVERTED" *)
29940    input AXI_13_ACLK;
29941    input [36:0] AXI_13_ARADDR;
29942    input [1:0] AXI_13_ARBURST;
29943    (* invertible_pin = "IS_AXI_13_ARESET_N_INVERTED" *)
29944    input AXI_13_ARESET_N;
29945    input [5:0] AXI_13_ARID;
29946    input [3:0] AXI_13_ARLEN;
29947    input [2:0] AXI_13_ARSIZE;
29948    input AXI_13_ARVALID;
29949    input [36:0] AXI_13_AWADDR;
29950    input [1:0] AXI_13_AWBURST;
29951    input [5:0] AXI_13_AWID;
29952    input [3:0] AXI_13_AWLEN;
29953    input [2:0] AXI_13_AWSIZE;
29954    input AXI_13_AWVALID;
29955    input AXI_13_BREADY;
29956    input AXI_13_DFI_LP_PWR_X_REQ;
29957    input AXI_13_RREADY;
29958    input [255:0] AXI_13_WDATA;
29959    input [31:0] AXI_13_WDATA_PARITY;
29960    input AXI_13_WLAST;
29961    input [31:0] AXI_13_WSTRB;
29962    input AXI_13_WVALID;
29963    (* invertible_pin = "IS_AXI_14_ACLK_INVERTED" *)
29964    input AXI_14_ACLK;
29965    input [36:0] AXI_14_ARADDR;
29966    input [1:0] AXI_14_ARBURST;
29967    (* invertible_pin = "IS_AXI_14_ARESET_N_INVERTED" *)
29968    input AXI_14_ARESET_N;
29969    input [5:0] AXI_14_ARID;
29970    input [3:0] AXI_14_ARLEN;
29971    input [2:0] AXI_14_ARSIZE;
29972    input AXI_14_ARVALID;
29973    input [36:0] AXI_14_AWADDR;
29974    input [1:0] AXI_14_AWBURST;
29975    input [5:0] AXI_14_AWID;
29976    input [3:0] AXI_14_AWLEN;
29977    input [2:0] AXI_14_AWSIZE;
29978    input AXI_14_AWVALID;
29979    input AXI_14_BREADY;
29980    input AXI_14_DFI_LP_PWR_X_REQ;
29981    input AXI_14_RREADY;
29982    input [255:0] AXI_14_WDATA;
29983    input [31:0] AXI_14_WDATA_PARITY;
29984    input AXI_14_WLAST;
29985    input [31:0] AXI_14_WSTRB;
29986    input AXI_14_WVALID;
29987    (* invertible_pin = "IS_AXI_15_ACLK_INVERTED" *)
29988    input AXI_15_ACLK;
29989    input [36:0] AXI_15_ARADDR;
29990    input [1:0] AXI_15_ARBURST;
29991    (* invertible_pin = "IS_AXI_15_ARESET_N_INVERTED" *)
29992    input AXI_15_ARESET_N;
29993    input [5:0] AXI_15_ARID;
29994    input [3:0] AXI_15_ARLEN;
29995    input [2:0] AXI_15_ARSIZE;
29996    input AXI_15_ARVALID;
29997    input [36:0] AXI_15_AWADDR;
29998    input [1:0] AXI_15_AWBURST;
29999    input [5:0] AXI_15_AWID;
30000    input [3:0] AXI_15_AWLEN;
30001    input [2:0] AXI_15_AWSIZE;
30002    input AXI_15_AWVALID;
30003    input AXI_15_BREADY;
30004    input AXI_15_DFI_LP_PWR_X_REQ;
30005    input AXI_15_RREADY;
30006    input [255:0] AXI_15_WDATA;
30007    input [31:0] AXI_15_WDATA_PARITY;
30008    input AXI_15_WLAST;
30009    input [31:0] AXI_15_WSTRB;
30010    input AXI_15_WVALID;
30011    (* invertible_pin = "IS_AXI_16_ACLK_INVERTED" *)
30012    input AXI_16_ACLK;
30013    input [36:0] AXI_16_ARADDR;
30014    input [1:0] AXI_16_ARBURST;
30015    (* invertible_pin = "IS_AXI_16_ARESET_N_INVERTED" *)
30016    input AXI_16_ARESET_N;
30017    input [5:0] AXI_16_ARID;
30018    input [3:0] AXI_16_ARLEN;
30019    input [2:0] AXI_16_ARSIZE;
30020    input AXI_16_ARVALID;
30021    input [36:0] AXI_16_AWADDR;
30022    input [1:0] AXI_16_AWBURST;
30023    input [5:0] AXI_16_AWID;
30024    input [3:0] AXI_16_AWLEN;
30025    input [2:0] AXI_16_AWSIZE;
30026    input AXI_16_AWVALID;
30027    input AXI_16_BREADY;
30028    input AXI_16_DFI_LP_PWR_X_REQ;
30029    input AXI_16_RREADY;
30030    input [255:0] AXI_16_WDATA;
30031    input [31:0] AXI_16_WDATA_PARITY;
30032    input AXI_16_WLAST;
30033    input [31:0] AXI_16_WSTRB;
30034    input AXI_16_WVALID;
30035    (* invertible_pin = "IS_AXI_17_ACLK_INVERTED" *)
30036    input AXI_17_ACLK;
30037    input [36:0] AXI_17_ARADDR;
30038    input [1:0] AXI_17_ARBURST;
30039    (* invertible_pin = "IS_AXI_17_ARESET_N_INVERTED" *)
30040    input AXI_17_ARESET_N;
30041    input [5:0] AXI_17_ARID;
30042    input [3:0] AXI_17_ARLEN;
30043    input [2:0] AXI_17_ARSIZE;
30044    input AXI_17_ARVALID;
30045    input [36:0] AXI_17_AWADDR;
30046    input [1:0] AXI_17_AWBURST;
30047    input [5:0] AXI_17_AWID;
30048    input [3:0] AXI_17_AWLEN;
30049    input [2:0] AXI_17_AWSIZE;
30050    input AXI_17_AWVALID;
30051    input AXI_17_BREADY;
30052    input AXI_17_DFI_LP_PWR_X_REQ;
30053    input AXI_17_RREADY;
30054    input [255:0] AXI_17_WDATA;
30055    input [31:0] AXI_17_WDATA_PARITY;
30056    input AXI_17_WLAST;
30057    input [31:0] AXI_17_WSTRB;
30058    input AXI_17_WVALID;
30059    (* invertible_pin = "IS_AXI_18_ACLK_INVERTED" *)
30060    input AXI_18_ACLK;
30061    input [36:0] AXI_18_ARADDR;
30062    input [1:0] AXI_18_ARBURST;
30063    (* invertible_pin = "IS_AXI_18_ARESET_N_INVERTED" *)
30064    input AXI_18_ARESET_N;
30065    input [5:0] AXI_18_ARID;
30066    input [3:0] AXI_18_ARLEN;
30067    input [2:0] AXI_18_ARSIZE;
30068    input AXI_18_ARVALID;
30069    input [36:0] AXI_18_AWADDR;
30070    input [1:0] AXI_18_AWBURST;
30071    input [5:0] AXI_18_AWID;
30072    input [3:0] AXI_18_AWLEN;
30073    input [2:0] AXI_18_AWSIZE;
30074    input AXI_18_AWVALID;
30075    input AXI_18_BREADY;
30076    input AXI_18_DFI_LP_PWR_X_REQ;
30077    input AXI_18_RREADY;
30078    input [255:0] AXI_18_WDATA;
30079    input [31:0] AXI_18_WDATA_PARITY;
30080    input AXI_18_WLAST;
30081    input [31:0] AXI_18_WSTRB;
30082    input AXI_18_WVALID;
30083    (* invertible_pin = "IS_AXI_19_ACLK_INVERTED" *)
30084    input AXI_19_ACLK;
30085    input [36:0] AXI_19_ARADDR;
30086    input [1:0] AXI_19_ARBURST;
30087    (* invertible_pin = "IS_AXI_19_ARESET_N_INVERTED" *)
30088    input AXI_19_ARESET_N;
30089    input [5:0] AXI_19_ARID;
30090    input [3:0] AXI_19_ARLEN;
30091    input [2:0] AXI_19_ARSIZE;
30092    input AXI_19_ARVALID;
30093    input [36:0] AXI_19_AWADDR;
30094    input [1:0] AXI_19_AWBURST;
30095    input [5:0] AXI_19_AWID;
30096    input [3:0] AXI_19_AWLEN;
30097    input [2:0] AXI_19_AWSIZE;
30098    input AXI_19_AWVALID;
30099    input AXI_19_BREADY;
30100    input AXI_19_DFI_LP_PWR_X_REQ;
30101    input AXI_19_RREADY;
30102    input [255:0] AXI_19_WDATA;
30103    input [31:0] AXI_19_WDATA_PARITY;
30104    input AXI_19_WLAST;
30105    input [31:0] AXI_19_WSTRB;
30106    input AXI_19_WVALID;
30107    (* invertible_pin = "IS_AXI_20_ACLK_INVERTED" *)
30108    input AXI_20_ACLK;
30109    input [36:0] AXI_20_ARADDR;
30110    input [1:0] AXI_20_ARBURST;
30111    (* invertible_pin = "IS_AXI_20_ARESET_N_INVERTED" *)
30112    input AXI_20_ARESET_N;
30113    input [5:0] AXI_20_ARID;
30114    input [3:0] AXI_20_ARLEN;
30115    input [2:0] AXI_20_ARSIZE;
30116    input AXI_20_ARVALID;
30117    input [36:0] AXI_20_AWADDR;
30118    input [1:0] AXI_20_AWBURST;
30119    input [5:0] AXI_20_AWID;
30120    input [3:0] AXI_20_AWLEN;
30121    input [2:0] AXI_20_AWSIZE;
30122    input AXI_20_AWVALID;
30123    input AXI_20_BREADY;
30124    input AXI_20_DFI_LP_PWR_X_REQ;
30125    input AXI_20_RREADY;
30126    input [255:0] AXI_20_WDATA;
30127    input [31:0] AXI_20_WDATA_PARITY;
30128    input AXI_20_WLAST;
30129    input [31:0] AXI_20_WSTRB;
30130    input AXI_20_WVALID;
30131    (* invertible_pin = "IS_AXI_21_ACLK_INVERTED" *)
30132    input AXI_21_ACLK;
30133    input [36:0] AXI_21_ARADDR;
30134    input [1:0] AXI_21_ARBURST;
30135    (* invertible_pin = "IS_AXI_21_ARESET_N_INVERTED" *)
30136    input AXI_21_ARESET_N;
30137    input [5:0] AXI_21_ARID;
30138    input [3:0] AXI_21_ARLEN;
30139    input [2:0] AXI_21_ARSIZE;
30140    input AXI_21_ARVALID;
30141    input [36:0] AXI_21_AWADDR;
30142    input [1:0] AXI_21_AWBURST;
30143    input [5:0] AXI_21_AWID;
30144    input [3:0] AXI_21_AWLEN;
30145    input [2:0] AXI_21_AWSIZE;
30146    input AXI_21_AWVALID;
30147    input AXI_21_BREADY;
30148    input AXI_21_DFI_LP_PWR_X_REQ;
30149    input AXI_21_RREADY;
30150    input [255:0] AXI_21_WDATA;
30151    input [31:0] AXI_21_WDATA_PARITY;
30152    input AXI_21_WLAST;
30153    input [31:0] AXI_21_WSTRB;
30154    input AXI_21_WVALID;
30155    (* invertible_pin = "IS_AXI_22_ACLK_INVERTED" *)
30156    input AXI_22_ACLK;
30157    input [36:0] AXI_22_ARADDR;
30158    input [1:0] AXI_22_ARBURST;
30159    (* invertible_pin = "IS_AXI_22_ARESET_N_INVERTED" *)
30160    input AXI_22_ARESET_N;
30161    input [5:0] AXI_22_ARID;
30162    input [3:0] AXI_22_ARLEN;
30163    input [2:0] AXI_22_ARSIZE;
30164    input AXI_22_ARVALID;
30165    input [36:0] AXI_22_AWADDR;
30166    input [1:0] AXI_22_AWBURST;
30167    input [5:0] AXI_22_AWID;
30168    input [3:0] AXI_22_AWLEN;
30169    input [2:0] AXI_22_AWSIZE;
30170    input AXI_22_AWVALID;
30171    input AXI_22_BREADY;
30172    input AXI_22_DFI_LP_PWR_X_REQ;
30173    input AXI_22_RREADY;
30174    input [255:0] AXI_22_WDATA;
30175    input [31:0] AXI_22_WDATA_PARITY;
30176    input AXI_22_WLAST;
30177    input [31:0] AXI_22_WSTRB;
30178    input AXI_22_WVALID;
30179    (* invertible_pin = "IS_AXI_23_ACLK_INVERTED" *)
30180    input AXI_23_ACLK;
30181    input [36:0] AXI_23_ARADDR;
30182    input [1:0] AXI_23_ARBURST;
30183    (* invertible_pin = "IS_AXI_23_ARESET_N_INVERTED" *)
30184    input AXI_23_ARESET_N;
30185    input [5:0] AXI_23_ARID;
30186    input [3:0] AXI_23_ARLEN;
30187    input [2:0] AXI_23_ARSIZE;
30188    input AXI_23_ARVALID;
30189    input [36:0] AXI_23_AWADDR;
30190    input [1:0] AXI_23_AWBURST;
30191    input [5:0] AXI_23_AWID;
30192    input [3:0] AXI_23_AWLEN;
30193    input [2:0] AXI_23_AWSIZE;
30194    input AXI_23_AWVALID;
30195    input AXI_23_BREADY;
30196    input AXI_23_DFI_LP_PWR_X_REQ;
30197    input AXI_23_RREADY;
30198    input [255:0] AXI_23_WDATA;
30199    input [31:0] AXI_23_WDATA_PARITY;
30200    input AXI_23_WLAST;
30201    input [31:0] AXI_23_WSTRB;
30202    input AXI_23_WVALID;
30203    (* invertible_pin = "IS_AXI_24_ACLK_INVERTED" *)
30204    input AXI_24_ACLK;
30205    input [36:0] AXI_24_ARADDR;
30206    input [1:0] AXI_24_ARBURST;
30207    (* invertible_pin = "IS_AXI_24_ARESET_N_INVERTED" *)
30208    input AXI_24_ARESET_N;
30209    input [5:0] AXI_24_ARID;
30210    input [3:0] AXI_24_ARLEN;
30211    input [2:0] AXI_24_ARSIZE;
30212    input AXI_24_ARVALID;
30213    input [36:0] AXI_24_AWADDR;
30214    input [1:0] AXI_24_AWBURST;
30215    input [5:0] AXI_24_AWID;
30216    input [3:0] AXI_24_AWLEN;
30217    input [2:0] AXI_24_AWSIZE;
30218    input AXI_24_AWVALID;
30219    input AXI_24_BREADY;
30220    input AXI_24_DFI_LP_PWR_X_REQ;
30221    input AXI_24_RREADY;
30222    input [255:0] AXI_24_WDATA;
30223    input [31:0] AXI_24_WDATA_PARITY;
30224    input AXI_24_WLAST;
30225    input [31:0] AXI_24_WSTRB;
30226    input AXI_24_WVALID;
30227    (* invertible_pin = "IS_AXI_25_ACLK_INVERTED" *)
30228    input AXI_25_ACLK;
30229    input [36:0] AXI_25_ARADDR;
30230    input [1:0] AXI_25_ARBURST;
30231    (* invertible_pin = "IS_AXI_25_ARESET_N_INVERTED" *)
30232    input AXI_25_ARESET_N;
30233    input [5:0] AXI_25_ARID;
30234    input [3:0] AXI_25_ARLEN;
30235    input [2:0] AXI_25_ARSIZE;
30236    input AXI_25_ARVALID;
30237    input [36:0] AXI_25_AWADDR;
30238    input [1:0] AXI_25_AWBURST;
30239    input [5:0] AXI_25_AWID;
30240    input [3:0] AXI_25_AWLEN;
30241    input [2:0] AXI_25_AWSIZE;
30242    input AXI_25_AWVALID;
30243    input AXI_25_BREADY;
30244    input AXI_25_DFI_LP_PWR_X_REQ;
30245    input AXI_25_RREADY;
30246    input [255:0] AXI_25_WDATA;
30247    input [31:0] AXI_25_WDATA_PARITY;
30248    input AXI_25_WLAST;
30249    input [31:0] AXI_25_WSTRB;
30250    input AXI_25_WVALID;
30251    (* invertible_pin = "IS_AXI_26_ACLK_INVERTED" *)
30252    input AXI_26_ACLK;
30253    input [36:0] AXI_26_ARADDR;
30254    input [1:0] AXI_26_ARBURST;
30255    (* invertible_pin = "IS_AXI_26_ARESET_N_INVERTED" *)
30256    input AXI_26_ARESET_N;
30257    input [5:0] AXI_26_ARID;
30258    input [3:0] AXI_26_ARLEN;
30259    input [2:0] AXI_26_ARSIZE;
30260    input AXI_26_ARVALID;
30261    input [36:0] AXI_26_AWADDR;
30262    input [1:0] AXI_26_AWBURST;
30263    input [5:0] AXI_26_AWID;
30264    input [3:0] AXI_26_AWLEN;
30265    input [2:0] AXI_26_AWSIZE;
30266    input AXI_26_AWVALID;
30267    input AXI_26_BREADY;
30268    input AXI_26_DFI_LP_PWR_X_REQ;
30269    input AXI_26_RREADY;
30270    input [255:0] AXI_26_WDATA;
30271    input [31:0] AXI_26_WDATA_PARITY;
30272    input AXI_26_WLAST;
30273    input [31:0] AXI_26_WSTRB;
30274    input AXI_26_WVALID;
30275    (* invertible_pin = "IS_AXI_27_ACLK_INVERTED" *)
30276    input AXI_27_ACLK;
30277    input [36:0] AXI_27_ARADDR;
30278    input [1:0] AXI_27_ARBURST;
30279    (* invertible_pin = "IS_AXI_27_ARESET_N_INVERTED" *)
30280    input AXI_27_ARESET_N;
30281    input [5:0] AXI_27_ARID;
30282    input [3:0] AXI_27_ARLEN;
30283    input [2:0] AXI_27_ARSIZE;
30284    input AXI_27_ARVALID;
30285    input [36:0] AXI_27_AWADDR;
30286    input [1:0] AXI_27_AWBURST;
30287    input [5:0] AXI_27_AWID;
30288    input [3:0] AXI_27_AWLEN;
30289    input [2:0] AXI_27_AWSIZE;
30290    input AXI_27_AWVALID;
30291    input AXI_27_BREADY;
30292    input AXI_27_DFI_LP_PWR_X_REQ;
30293    input AXI_27_RREADY;
30294    input [255:0] AXI_27_WDATA;
30295    input [31:0] AXI_27_WDATA_PARITY;
30296    input AXI_27_WLAST;
30297    input [31:0] AXI_27_WSTRB;
30298    input AXI_27_WVALID;
30299    (* invertible_pin = "IS_AXI_28_ACLK_INVERTED" *)
30300    input AXI_28_ACLK;
30301    input [36:0] AXI_28_ARADDR;
30302    input [1:0] AXI_28_ARBURST;
30303    (* invertible_pin = "IS_AXI_28_ARESET_N_INVERTED" *)
30304    input AXI_28_ARESET_N;
30305    input [5:0] AXI_28_ARID;
30306    input [3:0] AXI_28_ARLEN;
30307    input [2:0] AXI_28_ARSIZE;
30308    input AXI_28_ARVALID;
30309    input [36:0] AXI_28_AWADDR;
30310    input [1:0] AXI_28_AWBURST;
30311    input [5:0] AXI_28_AWID;
30312    input [3:0] AXI_28_AWLEN;
30313    input [2:0] AXI_28_AWSIZE;
30314    input AXI_28_AWVALID;
30315    input AXI_28_BREADY;
30316    input AXI_28_DFI_LP_PWR_X_REQ;
30317    input AXI_28_RREADY;
30318    input [255:0] AXI_28_WDATA;
30319    input [31:0] AXI_28_WDATA_PARITY;
30320    input AXI_28_WLAST;
30321    input [31:0] AXI_28_WSTRB;
30322    input AXI_28_WVALID;
30323    (* invertible_pin = "IS_AXI_29_ACLK_INVERTED" *)
30324    input AXI_29_ACLK;
30325    input [36:0] AXI_29_ARADDR;
30326    input [1:0] AXI_29_ARBURST;
30327    (* invertible_pin = "IS_AXI_29_ARESET_N_INVERTED" *)
30328    input AXI_29_ARESET_N;
30329    input [5:0] AXI_29_ARID;
30330    input [3:0] AXI_29_ARLEN;
30331    input [2:0] AXI_29_ARSIZE;
30332    input AXI_29_ARVALID;
30333    input [36:0] AXI_29_AWADDR;
30334    input [1:0] AXI_29_AWBURST;
30335    input [5:0] AXI_29_AWID;
30336    input [3:0] AXI_29_AWLEN;
30337    input [2:0] AXI_29_AWSIZE;
30338    input AXI_29_AWVALID;
30339    input AXI_29_BREADY;
30340    input AXI_29_DFI_LP_PWR_X_REQ;
30341    input AXI_29_RREADY;
30342    input [255:0] AXI_29_WDATA;
30343    input [31:0] AXI_29_WDATA_PARITY;
30344    input AXI_29_WLAST;
30345    input [31:0] AXI_29_WSTRB;
30346    input AXI_29_WVALID;
30347    (* invertible_pin = "IS_AXI_30_ACLK_INVERTED" *)
30348    input AXI_30_ACLK;
30349    input [36:0] AXI_30_ARADDR;
30350    input [1:0] AXI_30_ARBURST;
30351    (* invertible_pin = "IS_AXI_30_ARESET_N_INVERTED" *)
30352    input AXI_30_ARESET_N;
30353    input [5:0] AXI_30_ARID;
30354    input [3:0] AXI_30_ARLEN;
30355    input [2:0] AXI_30_ARSIZE;
30356    input AXI_30_ARVALID;
30357    input [36:0] AXI_30_AWADDR;
30358    input [1:0] AXI_30_AWBURST;
30359    input [5:0] AXI_30_AWID;
30360    input [3:0] AXI_30_AWLEN;
30361    input [2:0] AXI_30_AWSIZE;
30362    input AXI_30_AWVALID;
30363    input AXI_30_BREADY;
30364    input AXI_30_DFI_LP_PWR_X_REQ;
30365    input AXI_30_RREADY;
30366    input [255:0] AXI_30_WDATA;
30367    input [31:0] AXI_30_WDATA_PARITY;
30368    input AXI_30_WLAST;
30369    input [31:0] AXI_30_WSTRB;
30370    input AXI_30_WVALID;
30371    (* invertible_pin = "IS_AXI_31_ACLK_INVERTED" *)
30372    input AXI_31_ACLK;
30373    input [36:0] AXI_31_ARADDR;
30374    input [1:0] AXI_31_ARBURST;
30375    (* invertible_pin = "IS_AXI_31_ARESET_N_INVERTED" *)
30376    input AXI_31_ARESET_N;
30377    input [5:0] AXI_31_ARID;
30378    input [3:0] AXI_31_ARLEN;
30379    input [2:0] AXI_31_ARSIZE;
30380    input AXI_31_ARVALID;
30381    input [36:0] AXI_31_AWADDR;
30382    input [1:0] AXI_31_AWBURST;
30383    input [5:0] AXI_31_AWID;
30384    input [3:0] AXI_31_AWLEN;
30385    input [2:0] AXI_31_AWSIZE;
30386    input AXI_31_AWVALID;
30387    input AXI_31_BREADY;
30388    input AXI_31_DFI_LP_PWR_X_REQ;
30389    input AXI_31_RREADY;
30390    input [255:0] AXI_31_WDATA;
30391    input [31:0] AXI_31_WDATA_PARITY;
30392    input AXI_31_WLAST;
30393    input [31:0] AXI_31_WSTRB;
30394    input AXI_31_WVALID;
30395    input BSCAN_DRCK_0;
30396    input BSCAN_DRCK_1;
30397    input BSCAN_TCK_0;
30398    input BSCAN_TCK_1;
30399    input HBM_REF_CLK_0;
30400    input HBM_REF_CLK_1;
30401    input MBIST_EN_00;
30402    input MBIST_EN_01;
30403    input MBIST_EN_02;
30404    input MBIST_EN_03;
30405    input MBIST_EN_04;
30406    input MBIST_EN_05;
30407    input MBIST_EN_06;
30408    input MBIST_EN_07;
30409    input MBIST_EN_08;
30410    input MBIST_EN_09;
30411    input MBIST_EN_10;
30412    input MBIST_EN_11;
30413    input MBIST_EN_12;
30414    input MBIST_EN_13;
30415    input MBIST_EN_14;
30416    input MBIST_EN_15;
30417endmodule
30418
30419module PPC405_ADV (...);
30420    parameter in_delay=100;
30421    parameter out_delay=100;
30422    output APUFCMDECODED;
30423    output APUFCMDECUDIVALID;
30424    output APUFCMENDIAN;
30425    output APUFCMFLUSH;
30426    output APUFCMINSTRVALID;
30427    output APUFCMLOADDVALID;
30428    output APUFCMOPERANDVALID;
30429    output APUFCMWRITEBACKOK;
30430    output APUFCMXERCA;
30431    output C405CPMCORESLEEPREQ;
30432    output C405CPMMSRCE;
30433    output C405CPMMSREE;
30434    output C405CPMTIMERIRQ;
30435    output C405CPMTIMERRESETREQ;
30436    output C405DBGLOADDATAONAPUDBUS;
30437    output C405DBGMSRWE;
30438    output C405DBGSTOPACK;
30439    output C405DBGWBCOMPLETE;
30440    output C405DBGWBFULL;
30441    output C405JTGCAPTUREDR;
30442    output C405JTGEXTEST;
30443    output C405JTGPGMOUT;
30444    output C405JTGSHIFTDR;
30445    output C405JTGTDO;
30446    output C405JTGTDOEN;
30447    output C405JTGUPDATEDR;
30448    output C405PLBDCUABORT;
30449    output C405PLBDCUCACHEABLE;
30450    output C405PLBDCUGUARDED;
30451    output C405PLBDCUREQUEST;
30452    output C405PLBDCURNW;
30453    output C405PLBDCUSIZE2;
30454    output C405PLBDCUU0ATTR;
30455    output C405PLBDCUWRITETHRU;
30456    output C405PLBICUABORT;
30457    output C405PLBICUCACHEABLE;
30458    output C405PLBICUREQUEST;
30459    output C405PLBICUU0ATTR;
30460    output C405RSTCHIPRESETREQ;
30461    output C405RSTCORERESETREQ;
30462    output C405RSTSYSRESETREQ;
30463    output C405TRCCYCLE;
30464    output C405TRCTRIGGEREVENTOUT;
30465    output C405XXXMACHINECHECK;
30466    output DCREMACCLK;
30467    output DCREMACENABLER;
30468    output DCREMACREAD;
30469    output DCREMACWRITE;
30470    output DSOCMBRAMEN;
30471    output DSOCMBUSY;
30472    output DSOCMRDADDRVALID;
30473    output DSOCMWRADDRVALID;
30474    output EXTDCRREAD;
30475    output EXTDCRWRITE;
30476    output ISOCMBRAMEN;
30477    output ISOCMBRAMEVENWRITEEN;
30478    output ISOCMBRAMODDWRITEEN;
30479    output ISOCMDCRBRAMEVENEN;
30480    output ISOCMDCRBRAMODDEN;
30481    output ISOCMDCRBRAMRDSELECT;
30482    output [0:10] C405TRCTRIGGEREVENTTYPE;
30483    output [0:1] C405PLBDCUPRIORITY;
30484    output [0:1] C405PLBICUPRIORITY;
30485    output [0:1] C405TRCEVENEXECUTIONSTATUS;
30486    output [0:1] C405TRCODDEXECUTIONSTATUS;
30487    output [0:29] C405DBGWBIAR;
30488    output [0:29] C405PLBICUABUS;
30489    output [0:2] APUFCMDECUDI;
30490    output [0:31] APUFCMINSTRUCTION;
30491    output [0:31] APUFCMLOADDATA;
30492    output [0:31] APUFCMRADATA;
30493    output [0:31] APUFCMRBDATA;
30494    output [0:31] C405PLBDCUABUS;
30495    output [0:31] DCREMACDBUS;
30496    output [0:31] DSOCMBRAMWRDBUS;
30497    output [0:31] EXTDCRDBUSOUT;
30498    output [0:31] ISOCMBRAMWRDBUS;
30499    output [0:3] APUFCMLOADBYTEEN;
30500    output [0:3] C405TRCTRACESTATUS;
30501    output [0:3] DSOCMBRAMBYTEWRITE;
30502    output [0:63] C405PLBDCUWRDBUS;
30503    output [0:7] C405PLBDCUBE;
30504    output [0:9] EXTDCRABUS;
30505    output [2:3] C405PLBICUSIZE;
30506    output [8:28] ISOCMBRAMRDABUS;
30507    output [8:28] ISOCMBRAMWRABUS;
30508    output [8:29] DSOCMBRAMABUS;
30509    output [8:9] DCREMACABUS;
30510    input BRAMDSOCMCLK;
30511    input BRAMISOCMCLK;
30512    input CPMC405CLOCK;
30513    input CPMC405CORECLKINACTIVE;
30514    input CPMC405CPUCLKEN;
30515    input CPMC405JTAGCLKEN;
30516    input CPMC405SYNCBYPASS;
30517    input CPMC405TIMERCLKEN;
30518    input CPMC405TIMERTICK;
30519    input CPMDCRCLK;
30520    input CPMFCMCLK;
30521    input DBGC405DEBUGHALT;
30522    input DBGC405EXTBUSHOLDACK;
30523    input DBGC405UNCONDDEBUGEVENT;
30524    input DSOCMRWCOMPLETE;
30525    input EICC405CRITINPUTIRQ;
30526    input EICC405EXTINPUTIRQ;
30527    input EMACDCRACK;
30528    input EXTDCRACK;
30529    input FCMAPUDCDCREN;
30530    input FCMAPUDCDFORCEALIGN;
30531    input FCMAPUDCDFORCEBESTEERING;
30532    input FCMAPUDCDFPUOP;
30533    input FCMAPUDCDGPRWRITE;
30534    input FCMAPUDCDLDSTBYTE;
30535    input FCMAPUDCDLDSTDW;
30536    input FCMAPUDCDLDSTHW;
30537    input FCMAPUDCDLDSTQW;
30538    input FCMAPUDCDLDSTWD;
30539    input FCMAPUDCDLOAD;
30540    input FCMAPUDCDPRIVOP;
30541    input FCMAPUDCDRAEN;
30542    input FCMAPUDCDRBEN;
30543    input FCMAPUDCDSTORE;
30544    input FCMAPUDCDTRAPBE;
30545    input FCMAPUDCDTRAPLE;
30546    input FCMAPUDCDUPDATE;
30547    input FCMAPUDCDXERCAEN;
30548    input FCMAPUDCDXEROVEN;
30549    input FCMAPUDECODEBUSY;
30550    input FCMAPUDONE;
30551    input FCMAPUEXCEPTION;
30552    input FCMAPUEXEBLOCKINGMCO;
30553    input FCMAPUEXENONBLOCKINGMCO;
30554    input FCMAPUINSTRACK;
30555    input FCMAPULOADWAIT;
30556    input FCMAPURESULTVALID;
30557    input FCMAPUSLEEPNOTREADY;
30558    input FCMAPUXERCA;
30559    input FCMAPUXEROV;
30560    input JTGC405BNDSCANTDO;
30561    input JTGC405TCK;
30562    input JTGC405TDI;
30563    input JTGC405TMS;
30564    input JTGC405TRSTNEG;
30565    input MCBCPUCLKEN;
30566    input MCBJTAGEN;
30567    input MCBTIMEREN;
30568    input MCPPCRST;
30569    input PLBC405DCUADDRACK;
30570    input PLBC405DCUBUSY;
30571    input PLBC405DCUERR;
30572    input PLBC405DCURDDACK;
30573    input PLBC405DCUSSIZE1;
30574    input PLBC405DCUWRDACK;
30575    input PLBC405ICUADDRACK;
30576    input PLBC405ICUBUSY;
30577    input PLBC405ICUERR;
30578    input PLBC405ICURDDACK;
30579    input PLBC405ICUSSIZE1;
30580    input PLBCLK;
30581    input RSTC405RESETCHIP;
30582    input RSTC405RESETCORE;
30583    input RSTC405RESETSYS;
30584    input TIEC405DETERMINISTICMULT;
30585    input TIEC405DISOPERANDFWD;
30586    input TIEC405MMUEN;
30587    input TIEPVRBIT10;
30588    input TIEPVRBIT11;
30589    input TIEPVRBIT28;
30590    input TIEPVRBIT29;
30591    input TIEPVRBIT30;
30592    input TIEPVRBIT31;
30593    input TIEPVRBIT8;
30594    input TIEPVRBIT9;
30595    input TRCC405TRACEDISABLE;
30596    input TRCC405TRIGGEREVENTIN;
30597    input [0:15] TIEAPUCONTROL;
30598    input [0:23] TIEAPUUDI1;
30599    input [0:23] TIEAPUUDI2;
30600    input [0:23] TIEAPUUDI3;
30601    input [0:23] TIEAPUUDI4;
30602    input [0:23] TIEAPUUDI5;
30603    input [0:23] TIEAPUUDI6;
30604    input [0:23] TIEAPUUDI7;
30605    input [0:23] TIEAPUUDI8;
30606    input [0:2] FCMAPUEXECRFIELD;
30607    input [0:31] BRAMDSOCMRDDBUS;
30608    input [0:31] BRAMISOCMDCRRDDBUS;
30609    input [0:31] EMACDCRDBUS;
30610    input [0:31] EXTDCRDBUSIN;
30611    input [0:31] FCMAPURESULT;
30612    input [0:3] FCMAPUCR;
30613    input [0:5] TIEDCRADDR;
30614    input [0:63] BRAMISOCMRDDBUS;
30615    input [0:63] PLBC405DCURDDBUS;
30616    input [0:63] PLBC405ICURDDBUS;
30617    input [0:7] DSARCVALUE;
30618    input [0:7] DSCNTLVALUE;
30619    input [0:7] ISARCVALUE;
30620    input [0:7] ISCNTLVALUE;
30621    input [1:3] PLBC405DCURDWDADDR;
30622    input [1:3] PLBC405ICURDWDADDR;
30623endmodule
30624
30625module PPC440 (...);
30626    parameter CLOCK_DELAY = "FALSE";
30627    parameter DCR_AUTOLOCK_ENABLE = "TRUE";
30628    parameter PPCDM_ASYNCMODE = "FALSE";
30629    parameter PPCDS_ASYNCMODE = "FALSE";
30630    parameter PPCS0_WIDTH_128N64 = "TRUE";
30631    parameter PPCS1_WIDTH_128N64 = "TRUE";
30632    parameter [0:16] APU_CONTROL = 17'h02000;
30633    parameter [0:23] APU_UDI0 = 24'h000000;
30634    parameter [0:23] APU_UDI1 = 24'h000000;
30635    parameter [0:23] APU_UDI10 = 24'h000000;
30636    parameter [0:23] APU_UDI11 = 24'h000000;
30637    parameter [0:23] APU_UDI12 = 24'h000000;
30638    parameter [0:23] APU_UDI13 = 24'h000000;
30639    parameter [0:23] APU_UDI14 = 24'h000000;
30640    parameter [0:23] APU_UDI15 = 24'h000000;
30641    parameter [0:23] APU_UDI2 = 24'h000000;
30642    parameter [0:23] APU_UDI3 = 24'h000000;
30643    parameter [0:23] APU_UDI4 = 24'h000000;
30644    parameter [0:23] APU_UDI5 = 24'h000000;
30645    parameter [0:23] APU_UDI6 = 24'h000000;
30646    parameter [0:23] APU_UDI7 = 24'h000000;
30647    parameter [0:23] APU_UDI8 = 24'h000000;
30648    parameter [0:23] APU_UDI9 = 24'h000000;
30649    parameter [0:31] DMA0_RXCHANNELCTRL = 32'h01010000;
30650    parameter [0:31] DMA0_TXCHANNELCTRL = 32'h01010000;
30651    parameter [0:31] DMA1_RXCHANNELCTRL = 32'h01010000;
30652    parameter [0:31] DMA1_TXCHANNELCTRL = 32'h01010000;
30653    parameter [0:31] DMA2_RXCHANNELCTRL = 32'h01010000;
30654    parameter [0:31] DMA2_TXCHANNELCTRL = 32'h01010000;
30655    parameter [0:31] DMA3_RXCHANNELCTRL = 32'h01010000;
30656    parameter [0:31] DMA3_TXCHANNELCTRL = 32'h01010000;
30657    parameter [0:31] INTERCONNECT_IMASK = 32'hFFFFFFFF;
30658    parameter [0:31] INTERCONNECT_TMPL_SEL = 32'h3FFFFFFF;
30659    parameter [0:31] MI_ARBCONFIG = 32'h00432010;
30660    parameter [0:31] MI_BANKCONFLICT_MASK = 32'h00000000;
30661    parameter [0:31] MI_CONTROL = 32'h0000008F;
30662    parameter [0:31] MI_ROWCONFLICT_MASK = 32'h00000000;
30663    parameter [0:31] PPCM_ARBCONFIG = 32'h00432010;
30664    parameter [0:31] PPCM_CONTROL = 32'h8000019F;
30665    parameter [0:31] PPCM_COUNTER = 32'h00000500;
30666    parameter [0:31] PPCS0_ADDRMAP_TMPL0 = 32'hFFFFFFFF;
30667    parameter [0:31] PPCS0_ADDRMAP_TMPL1 = 32'hFFFFFFFF;
30668    parameter [0:31] PPCS0_ADDRMAP_TMPL2 = 32'hFFFFFFFF;
30669    parameter [0:31] PPCS0_ADDRMAP_TMPL3 = 32'hFFFFFFFF;
30670    parameter [0:31] PPCS0_CONTROL = 32'h8033336C;
30671    parameter [0:31] PPCS1_ADDRMAP_TMPL0 = 32'hFFFFFFFF;
30672    parameter [0:31] PPCS1_ADDRMAP_TMPL1 = 32'hFFFFFFFF;
30673    parameter [0:31] PPCS1_ADDRMAP_TMPL2 = 32'hFFFFFFFF;
30674    parameter [0:31] PPCS1_ADDRMAP_TMPL3 = 32'hFFFFFFFF;
30675    parameter [0:31] PPCS1_CONTROL = 32'h8033336C;
30676    parameter [0:31] XBAR_ADDRMAP_TMPL0 = 32'hFFFF0000;
30677    parameter [0:31] XBAR_ADDRMAP_TMPL1 = 32'h00000000;
30678    parameter [0:31] XBAR_ADDRMAP_TMPL2 = 32'h00000000;
30679    parameter [0:31] XBAR_ADDRMAP_TMPL3 = 32'h00000000;
30680    parameter [0:7] DMA0_CONTROL = 8'h00;
30681    parameter [0:7] DMA1_CONTROL = 8'h00;
30682    parameter [0:7] DMA2_CONTROL = 8'h00;
30683    parameter [0:7] DMA3_CONTROL = 8'h00;
30684    parameter [0:9] DMA0_RXIRQTIMER = 10'h3FF;
30685    parameter [0:9] DMA0_TXIRQTIMER = 10'h3FF;
30686    parameter [0:9] DMA1_RXIRQTIMER = 10'h3FF;
30687    parameter [0:9] DMA1_TXIRQTIMER = 10'h3FF;
30688    parameter [0:9] DMA2_RXIRQTIMER = 10'h3FF;
30689    parameter [0:9] DMA2_TXIRQTIMER = 10'h3FF;
30690    parameter [0:9] DMA3_RXIRQTIMER = 10'h3FF;
30691    parameter [0:9] DMA3_TXIRQTIMER = 10'h3FF;
30692    output APUFCMDECFPUOP;
30693    output APUFCMDECLOAD;
30694    output APUFCMDECNONAUTON;
30695    output APUFCMDECSTORE;
30696    output APUFCMDECUDIVALID;
30697    output APUFCMENDIAN;
30698    output APUFCMFLUSH;
30699    output APUFCMINSTRVALID;
30700    output APUFCMLOADDVALID;
30701    output APUFCMMSRFE0;
30702    output APUFCMMSRFE1;
30703    output APUFCMNEXTINSTRREADY;
30704    output APUFCMOPERANDVALID;
30705    output APUFCMWRITEBACKOK;
30706    output C440CPMCORESLEEPREQ;
30707    output C440CPMDECIRPTREQ;
30708    output C440CPMFITIRPTREQ;
30709    output C440CPMMSRCE;
30710    output C440CPMMSREE;
30711    output C440CPMTIMERRESETREQ;
30712    output C440CPMWDIRPTREQ;
30713    output C440JTGTDO;
30714    output C440JTGTDOEN;
30715    output C440MACHINECHECK;
30716    output C440RSTCHIPRESETREQ;
30717    output C440RSTCORERESETREQ;
30718    output C440RSTSYSTEMRESETREQ;
30719    output C440TRCCYCLE;
30720    output C440TRCTRIGGEREVENTOUT;
30721    output DMA0LLRSTENGINEACK;
30722    output DMA0LLRXDSTRDYN;
30723    output DMA0LLTXEOFN;
30724    output DMA0LLTXEOPN;
30725    output DMA0LLTXSOFN;
30726    output DMA0LLTXSOPN;
30727    output DMA0LLTXSRCRDYN;
30728    output DMA0RXIRQ;
30729    output DMA0TXIRQ;
30730    output DMA1LLRSTENGINEACK;
30731    output DMA1LLRXDSTRDYN;
30732    output DMA1LLTXEOFN;
30733    output DMA1LLTXEOPN;
30734    output DMA1LLTXSOFN;
30735    output DMA1LLTXSOPN;
30736    output DMA1LLTXSRCRDYN;
30737    output DMA1RXIRQ;
30738    output DMA1TXIRQ;
30739    output DMA2LLRSTENGINEACK;
30740    output DMA2LLRXDSTRDYN;
30741    output DMA2LLTXEOFN;
30742    output DMA2LLTXEOPN;
30743    output DMA2LLTXSOFN;
30744    output DMA2LLTXSOPN;
30745    output DMA2LLTXSRCRDYN;
30746    output DMA2RXIRQ;
30747    output DMA2TXIRQ;
30748    output DMA3LLRSTENGINEACK;
30749    output DMA3LLRXDSTRDYN;
30750    output DMA3LLTXEOFN;
30751    output DMA3LLTXEOPN;
30752    output DMA3LLTXSOFN;
30753    output DMA3LLTXSOPN;
30754    output DMA3LLTXSRCRDYN;
30755    output DMA3RXIRQ;
30756    output DMA3TXIRQ;
30757    output MIMCADDRESSVALID;
30758    output MIMCBANKCONFLICT;
30759    output MIMCREADNOTWRITE;
30760    output MIMCROWCONFLICT;
30761    output MIMCWRITEDATAVALID;
30762    output PPCCPMINTERCONNECTBUSY;
30763    output PPCDMDCRREAD;
30764    output PPCDMDCRWRITE;
30765    output PPCDSDCRACK;
30766    output PPCDSDCRTIMEOUTWAIT;
30767    output PPCEICINTERCONNECTIRQ;
30768    output PPCMPLBABORT;
30769    output PPCMPLBBUSLOCK;
30770    output PPCMPLBLOCKERR;
30771    output PPCMPLBRDBURST;
30772    output PPCMPLBREQUEST;
30773    output PPCMPLBRNW;
30774    output PPCMPLBWRBURST;
30775    output PPCS0PLBADDRACK;
30776    output PPCS0PLBRDBTERM;
30777    output PPCS0PLBRDCOMP;
30778    output PPCS0PLBRDDACK;
30779    output PPCS0PLBREARBITRATE;
30780    output PPCS0PLBWAIT;
30781    output PPCS0PLBWRBTERM;
30782    output PPCS0PLBWRCOMP;
30783    output PPCS0PLBWRDACK;
30784    output PPCS1PLBADDRACK;
30785    output PPCS1PLBRDBTERM;
30786    output PPCS1PLBRDCOMP;
30787    output PPCS1PLBRDDACK;
30788    output PPCS1PLBREARBITRATE;
30789    output PPCS1PLBWAIT;
30790    output PPCS1PLBWRBTERM;
30791    output PPCS1PLBWRCOMP;
30792    output PPCS1PLBWRDACK;
30793    output [0:127] APUFCMLOADDATA;
30794    output [0:127] MIMCWRITEDATA;
30795    output [0:127] PPCMPLBWRDBUS;
30796    output [0:127] PPCS0PLBRDDBUS;
30797    output [0:127] PPCS1PLBRDDBUS;
30798    output [0:13] C440TRCTRIGGEREVENTTYPE;
30799    output [0:15] MIMCBYTEENABLE;
30800    output [0:15] PPCMPLBBE;
30801    output [0:15] PPCMPLBTATTRIBUTE;
30802    output [0:1] PPCMPLBPRIORITY;
30803    output [0:1] PPCS0PLBSSIZE;
30804    output [0:1] PPCS1PLBSSIZE;
30805    output [0:2] APUFCMDECLDSTXFERSIZE;
30806    output [0:2] C440TRCBRANCHSTATUS;
30807    output [0:2] PPCMPLBTYPE;
30808    output [0:31] APUFCMINSTRUCTION;
30809    output [0:31] APUFCMRADATA;
30810    output [0:31] APUFCMRBDATA;
30811    output [0:31] DMA0LLTXD;
30812    output [0:31] DMA1LLTXD;
30813    output [0:31] DMA2LLTXD;
30814    output [0:31] DMA3LLTXD;
30815    output [0:31] PPCDMDCRDBUSOUT;
30816    output [0:31] PPCDSDCRDBUSIN;
30817    output [0:31] PPCMPLBABUS;
30818    output [0:35] MIMCADDRESS;
30819    output [0:3] APUFCMDECUDI;
30820    output [0:3] APUFCMLOADBYTEADDR;
30821    output [0:3] DMA0LLTXREM;
30822    output [0:3] DMA1LLTXREM;
30823    output [0:3] DMA2LLTXREM;
30824    output [0:3] DMA3LLTXREM;
30825    output [0:3] PPCMPLBSIZE;
30826    output [0:3] PPCS0PLBMBUSY;
30827    output [0:3] PPCS0PLBMIRQ;
30828    output [0:3] PPCS0PLBMRDERR;
30829    output [0:3] PPCS0PLBMWRERR;
30830    output [0:3] PPCS0PLBRDWDADDR;
30831    output [0:3] PPCS1PLBMBUSY;
30832    output [0:3] PPCS1PLBMIRQ;
30833    output [0:3] PPCS1PLBMRDERR;
30834    output [0:3] PPCS1PLBMWRERR;
30835    output [0:3] PPCS1PLBRDWDADDR;
30836    output [0:4] C440TRCEXECUTIONSTATUS;
30837    output [0:6] C440TRCTRACESTATUS;
30838    output [0:7] C440DBGSYSTEMCONTROL;
30839    output [0:9] PPCDMDCRABUS;
30840    output [20:21] PPCDMDCRUABUS;
30841    output [28:31] PPCMPLBUABUS;
30842    input CPMC440CLK;
30843    input CPMC440CLKEN;
30844    input CPMC440CORECLOCKINACTIVE;
30845    input CPMC440TIMERCLOCK;
30846    input CPMDCRCLK;
30847    input CPMDMA0LLCLK;
30848    input CPMDMA1LLCLK;
30849    input CPMDMA2LLCLK;
30850    input CPMDMA3LLCLK;
30851    input CPMFCMCLK;
30852    input CPMINTERCONNECTCLK;
30853    input CPMINTERCONNECTCLKEN;
30854    input CPMINTERCONNECTCLKNTO1;
30855    input CPMMCCLK;
30856    input CPMPPCMPLBCLK;
30857    input CPMPPCS0PLBCLK;
30858    input CPMPPCS1PLBCLK;
30859    input DBGC440DEBUGHALT;
30860    input DBGC440UNCONDDEBUGEVENT;
30861    input DCRPPCDMACK;
30862    input DCRPPCDMTIMEOUTWAIT;
30863    input DCRPPCDSREAD;
30864    input DCRPPCDSWRITE;
30865    input EICC440CRITIRQ;
30866    input EICC440EXTIRQ;
30867    input FCMAPUCONFIRMINSTR;
30868    input FCMAPUDONE;
30869    input FCMAPUEXCEPTION;
30870    input FCMAPUFPSCRFEX;
30871    input FCMAPURESULTVALID;
30872    input FCMAPUSLEEPNOTREADY;
30873    input JTGC440TCK;
30874    input JTGC440TDI;
30875    input JTGC440TMS;
30876    input JTGC440TRSTNEG;
30877    input LLDMA0RSTENGINEREQ;
30878    input LLDMA0RXEOFN;
30879    input LLDMA0RXEOPN;
30880    input LLDMA0RXSOFN;
30881    input LLDMA0RXSOPN;
30882    input LLDMA0RXSRCRDYN;
30883    input LLDMA0TXDSTRDYN;
30884    input LLDMA1RSTENGINEREQ;
30885    input LLDMA1RXEOFN;
30886    input LLDMA1RXEOPN;
30887    input LLDMA1RXSOFN;
30888    input LLDMA1RXSOPN;
30889    input LLDMA1RXSRCRDYN;
30890    input LLDMA1TXDSTRDYN;
30891    input LLDMA2RSTENGINEREQ;
30892    input LLDMA2RXEOFN;
30893    input LLDMA2RXEOPN;
30894    input LLDMA2RXSOFN;
30895    input LLDMA2RXSOPN;
30896    input LLDMA2RXSRCRDYN;
30897    input LLDMA2TXDSTRDYN;
30898    input LLDMA3RSTENGINEREQ;
30899    input LLDMA3RXEOFN;
30900    input LLDMA3RXEOPN;
30901    input LLDMA3RXSOFN;
30902    input LLDMA3RXSOPN;
30903    input LLDMA3RXSRCRDYN;
30904    input LLDMA3TXDSTRDYN;
30905    input MCMIADDRREADYTOACCEPT;
30906    input MCMIREADDATAERR;
30907    input MCMIREADDATAVALID;
30908    input PLBPPCMADDRACK;
30909    input PLBPPCMMBUSY;
30910    input PLBPPCMMIRQ;
30911    input PLBPPCMMRDERR;
30912    input PLBPPCMMWRERR;
30913    input PLBPPCMRDBTERM;
30914    input PLBPPCMRDDACK;
30915    input PLBPPCMRDPENDREQ;
30916    input PLBPPCMREARBITRATE;
30917    input PLBPPCMTIMEOUT;
30918    input PLBPPCMWRBTERM;
30919    input PLBPPCMWRDACK;
30920    input PLBPPCMWRPENDREQ;
30921    input PLBPPCS0ABORT;
30922    input PLBPPCS0BUSLOCK;
30923    input PLBPPCS0LOCKERR;
30924    input PLBPPCS0PAVALID;
30925    input PLBPPCS0RDBURST;
30926    input PLBPPCS0RDPENDREQ;
30927    input PLBPPCS0RDPRIM;
30928    input PLBPPCS0RNW;
30929    input PLBPPCS0SAVALID;
30930    input PLBPPCS0WRBURST;
30931    input PLBPPCS0WRPENDREQ;
30932    input PLBPPCS0WRPRIM;
30933    input PLBPPCS1ABORT;
30934    input PLBPPCS1BUSLOCK;
30935    input PLBPPCS1LOCKERR;
30936    input PLBPPCS1PAVALID;
30937    input PLBPPCS1RDBURST;
30938    input PLBPPCS1RDPENDREQ;
30939    input PLBPPCS1RDPRIM;
30940    input PLBPPCS1RNW;
30941    input PLBPPCS1SAVALID;
30942    input PLBPPCS1WRBURST;
30943    input PLBPPCS1WRPENDREQ;
30944    input PLBPPCS1WRPRIM;
30945    input RSTC440RESETCHIP;
30946    input RSTC440RESETCORE;
30947    input RSTC440RESETSYSTEM;
30948    input TIEC440ENDIANRESET;
30949    input TRCC440TRACEDISABLE;
30950    input TRCC440TRIGGEREVENTIN;
30951    input [0:127] FCMAPUSTOREDATA;
30952    input [0:127] MCMIREADDATA;
30953    input [0:127] PLBPPCMRDDBUS;
30954    input [0:127] PLBPPCS0WRDBUS;
30955    input [0:127] PLBPPCS1WRDBUS;
30956    input [0:15] PLBPPCS0BE;
30957    input [0:15] PLBPPCS0TATTRIBUTE;
30958    input [0:15] PLBPPCS1BE;
30959    input [0:15] PLBPPCS1TATTRIBUTE;
30960    input [0:1] PLBPPCMRDPENDPRI;
30961    input [0:1] PLBPPCMREQPRI;
30962    input [0:1] PLBPPCMSSIZE;
30963    input [0:1] PLBPPCMWRPENDPRI;
30964    input [0:1] PLBPPCS0MASTERID;
30965    input [0:1] PLBPPCS0MSIZE;
30966    input [0:1] PLBPPCS0RDPENDPRI;
30967    input [0:1] PLBPPCS0REQPRI;
30968    input [0:1] PLBPPCS0WRPENDPRI;
30969    input [0:1] PLBPPCS1MASTERID;
30970    input [0:1] PLBPPCS1MSIZE;
30971    input [0:1] PLBPPCS1RDPENDPRI;
30972    input [0:1] PLBPPCS1REQPRI;
30973    input [0:1] PLBPPCS1WRPENDPRI;
30974    input [0:1] TIEC440DCURDLDCACHEPLBPRIO;
30975    input [0:1] TIEC440DCURDNONCACHEPLBPRIO;
30976    input [0:1] TIEC440DCURDTOUCHPLBPRIO;
30977    input [0:1] TIEC440DCURDURGENTPLBPRIO;
30978    input [0:1] TIEC440DCUWRFLUSHPLBPRIO;
30979    input [0:1] TIEC440DCUWRSTOREPLBPRIO;
30980    input [0:1] TIEC440DCUWRURGENTPLBPRIO;
30981    input [0:1] TIEC440ICURDFETCHPLBPRIO;
30982    input [0:1] TIEC440ICURDSPECPLBPRIO;
30983    input [0:1] TIEC440ICURDTOUCHPLBPRIO;
30984    input [0:1] TIEDCRBASEADDR;
30985    input [0:2] PLBPPCS0TYPE;
30986    input [0:2] PLBPPCS1TYPE;
30987    input [0:31] DCRPPCDMDBUSIN;
30988    input [0:31] DCRPPCDSDBUSOUT;
30989    input [0:31] FCMAPURESULT;
30990    input [0:31] LLDMA0RXD;
30991    input [0:31] LLDMA1RXD;
30992    input [0:31] LLDMA2RXD;
30993    input [0:31] LLDMA3RXD;
30994    input [0:31] PLBPPCS0ABUS;
30995    input [0:31] PLBPPCS1ABUS;
30996    input [0:3] FCMAPUCR;
30997    input [0:3] LLDMA0RXREM;
30998    input [0:3] LLDMA1RXREM;
30999    input [0:3] LLDMA2RXREM;
31000    input [0:3] LLDMA3RXREM;
31001    input [0:3] PLBPPCMRDWDADDR;
31002    input [0:3] PLBPPCS0SIZE;
31003    input [0:3] PLBPPCS1SIZE;
31004    input [0:3] TIEC440ERPNRESET;
31005    input [0:3] TIEC440USERRESET;
31006    input [0:4] DBGC440SYSTEMSTATUS;
31007    input [0:9] DCRPPCDSABUS;
31008    input [28:31] PLBPPCS0UABUS;
31009    input [28:31] PLBPPCS1UABUS;
31010    input [28:31] TIEC440PIR;
31011    input [28:31] TIEC440PVR;
31012endmodule
31013
31014(* keep *)
31015module PS7 (...);
31016    output DMA0DAVALID;
31017    output DMA0DRREADY;
31018    output DMA0RSTN;
31019    output DMA1DAVALID;
31020    output DMA1DRREADY;
31021    output DMA1RSTN;
31022    output DMA2DAVALID;
31023    output DMA2DRREADY;
31024    output DMA2RSTN;
31025    output DMA3DAVALID;
31026    output DMA3DRREADY;
31027    output DMA3RSTN;
31028    output EMIOCAN0PHYTX;
31029    output EMIOCAN1PHYTX;
31030    output EMIOENET0GMIITXEN;
31031    output EMIOENET0GMIITXER;
31032    output EMIOENET0MDIOMDC;
31033    output EMIOENET0MDIOO;
31034    output EMIOENET0MDIOTN;
31035    output EMIOENET0PTPDELAYREQRX;
31036    output EMIOENET0PTPDELAYREQTX;
31037    output EMIOENET0PTPPDELAYREQRX;
31038    output EMIOENET0PTPPDELAYREQTX;
31039    output EMIOENET0PTPPDELAYRESPRX;
31040    output EMIOENET0PTPPDELAYRESPTX;
31041    output EMIOENET0PTPSYNCFRAMERX;
31042    output EMIOENET0PTPSYNCFRAMETX;
31043    output EMIOENET0SOFRX;
31044    output EMIOENET0SOFTX;
31045    output EMIOENET1GMIITXEN;
31046    output EMIOENET1GMIITXER;
31047    output EMIOENET1MDIOMDC;
31048    output EMIOENET1MDIOO;
31049    output EMIOENET1MDIOTN;
31050    output EMIOENET1PTPDELAYREQRX;
31051    output EMIOENET1PTPDELAYREQTX;
31052    output EMIOENET1PTPPDELAYREQRX;
31053    output EMIOENET1PTPPDELAYREQTX;
31054    output EMIOENET1PTPPDELAYRESPRX;
31055    output EMIOENET1PTPPDELAYRESPTX;
31056    output EMIOENET1PTPSYNCFRAMERX;
31057    output EMIOENET1PTPSYNCFRAMETX;
31058    output EMIOENET1SOFRX;
31059    output EMIOENET1SOFTX;
31060    output EMIOI2C0SCLO;
31061    output EMIOI2C0SCLTN;
31062    output EMIOI2C0SDAO;
31063    output EMIOI2C0SDATN;
31064    output EMIOI2C1SCLO;
31065    output EMIOI2C1SCLTN;
31066    output EMIOI2C1SDAO;
31067    output EMIOI2C1SDATN;
31068    output EMIOPJTAGTDO;
31069    output EMIOPJTAGTDTN;
31070    output EMIOSDIO0BUSPOW;
31071    output EMIOSDIO0CLK;
31072    output EMIOSDIO0CMDO;
31073    output EMIOSDIO0CMDTN;
31074    output EMIOSDIO0LED;
31075    output EMIOSDIO1BUSPOW;
31076    output EMIOSDIO1CLK;
31077    output EMIOSDIO1CMDO;
31078    output EMIOSDIO1CMDTN;
31079    output EMIOSDIO1LED;
31080    output EMIOSPI0MO;
31081    output EMIOSPI0MOTN;
31082    output EMIOSPI0SCLKO;
31083    output EMIOSPI0SCLKTN;
31084    output EMIOSPI0SO;
31085    output EMIOSPI0SSNTN;
31086    output EMIOSPI0STN;
31087    output EMIOSPI1MO;
31088    output EMIOSPI1MOTN;
31089    output EMIOSPI1SCLKO;
31090    output EMIOSPI1SCLKTN;
31091    output EMIOSPI1SO;
31092    output EMIOSPI1SSNTN;
31093    output EMIOSPI1STN;
31094    output EMIOTRACECTL;
31095    output EMIOUART0DTRN;
31096    output EMIOUART0RTSN;
31097    output EMIOUART0TX;
31098    output EMIOUART1DTRN;
31099    output EMIOUART1RTSN;
31100    output EMIOUART1TX;
31101    output EMIOUSB0VBUSPWRSELECT;
31102    output EMIOUSB1VBUSPWRSELECT;
31103    output EMIOWDTRSTO;
31104    output EVENTEVENTO;
31105    output MAXIGP0ARESETN;
31106    output MAXIGP0ARVALID;
31107    output MAXIGP0AWVALID;
31108    output MAXIGP0BREADY;
31109    output MAXIGP0RREADY;
31110    output MAXIGP0WLAST;
31111    output MAXIGP0WVALID;
31112    output MAXIGP1ARESETN;
31113    output MAXIGP1ARVALID;
31114    output MAXIGP1AWVALID;
31115    output MAXIGP1BREADY;
31116    output MAXIGP1RREADY;
31117    output MAXIGP1WLAST;
31118    output MAXIGP1WVALID;
31119    output SAXIACPARESETN;
31120    output SAXIACPARREADY;
31121    output SAXIACPAWREADY;
31122    output SAXIACPBVALID;
31123    output SAXIACPRLAST;
31124    output SAXIACPRVALID;
31125    output SAXIACPWREADY;
31126    output SAXIGP0ARESETN;
31127    output SAXIGP0ARREADY;
31128    output SAXIGP0AWREADY;
31129    output SAXIGP0BVALID;
31130    output SAXIGP0RLAST;
31131    output SAXIGP0RVALID;
31132    output SAXIGP0WREADY;
31133    output SAXIGP1ARESETN;
31134    output SAXIGP1ARREADY;
31135    output SAXIGP1AWREADY;
31136    output SAXIGP1BVALID;
31137    output SAXIGP1RLAST;
31138    output SAXIGP1RVALID;
31139    output SAXIGP1WREADY;
31140    output SAXIHP0ARESETN;
31141    output SAXIHP0ARREADY;
31142    output SAXIHP0AWREADY;
31143    output SAXIHP0BVALID;
31144    output SAXIHP0RLAST;
31145    output SAXIHP0RVALID;
31146    output SAXIHP0WREADY;
31147    output SAXIHP1ARESETN;
31148    output SAXIHP1ARREADY;
31149    output SAXIHP1AWREADY;
31150    output SAXIHP1BVALID;
31151    output SAXIHP1RLAST;
31152    output SAXIHP1RVALID;
31153    output SAXIHP1WREADY;
31154    output SAXIHP2ARESETN;
31155    output SAXIHP2ARREADY;
31156    output SAXIHP2AWREADY;
31157    output SAXIHP2BVALID;
31158    output SAXIHP2RLAST;
31159    output SAXIHP2RVALID;
31160    output SAXIHP2WREADY;
31161    output SAXIHP3ARESETN;
31162    output SAXIHP3ARREADY;
31163    output SAXIHP3AWREADY;
31164    output SAXIHP3BVALID;
31165    output SAXIHP3RLAST;
31166    output SAXIHP3RVALID;
31167    output SAXIHP3WREADY;
31168    output [11:0] MAXIGP0ARID;
31169    output [11:0] MAXIGP0AWID;
31170    output [11:0] MAXIGP0WID;
31171    output [11:0] MAXIGP1ARID;
31172    output [11:0] MAXIGP1AWID;
31173    output [11:0] MAXIGP1WID;
31174    output [1:0] DMA0DATYPE;
31175    output [1:0] DMA1DATYPE;
31176    output [1:0] DMA2DATYPE;
31177    output [1:0] DMA3DATYPE;
31178    output [1:0] EMIOUSB0PORTINDCTL;
31179    output [1:0] EMIOUSB1PORTINDCTL;
31180    output [1:0] EVENTSTANDBYWFE;
31181    output [1:0] EVENTSTANDBYWFI;
31182    output [1:0] MAXIGP0ARBURST;
31183    output [1:0] MAXIGP0ARLOCK;
31184    output [1:0] MAXIGP0ARSIZE;
31185    output [1:0] MAXIGP0AWBURST;
31186    output [1:0] MAXIGP0AWLOCK;
31187    output [1:0] MAXIGP0AWSIZE;
31188    output [1:0] MAXIGP1ARBURST;
31189    output [1:0] MAXIGP1ARLOCK;
31190    output [1:0] MAXIGP1ARSIZE;
31191    output [1:0] MAXIGP1AWBURST;
31192    output [1:0] MAXIGP1AWLOCK;
31193    output [1:0] MAXIGP1AWSIZE;
31194    output [1:0] SAXIACPBRESP;
31195    output [1:0] SAXIACPRRESP;
31196    output [1:0] SAXIGP0BRESP;
31197    output [1:0] SAXIGP0RRESP;
31198    output [1:0] SAXIGP1BRESP;
31199    output [1:0] SAXIGP1RRESP;
31200    output [1:0] SAXIHP0BRESP;
31201    output [1:0] SAXIHP0RRESP;
31202    output [1:0] SAXIHP1BRESP;
31203    output [1:0] SAXIHP1RRESP;
31204    output [1:0] SAXIHP2BRESP;
31205    output [1:0] SAXIHP2RRESP;
31206    output [1:0] SAXIHP3BRESP;
31207    output [1:0] SAXIHP3RRESP;
31208    output [28:0] IRQP2F;
31209    output [2:0] EMIOSDIO0BUSVOLT;
31210    output [2:0] EMIOSDIO1BUSVOLT;
31211    output [2:0] EMIOSPI0SSON;
31212    output [2:0] EMIOSPI1SSON;
31213    output [2:0] EMIOTTC0WAVEO;
31214    output [2:0] EMIOTTC1WAVEO;
31215    output [2:0] MAXIGP0ARPROT;
31216    output [2:0] MAXIGP0AWPROT;
31217    output [2:0] MAXIGP1ARPROT;
31218    output [2:0] MAXIGP1AWPROT;
31219    output [2:0] SAXIACPBID;
31220    output [2:0] SAXIACPRID;
31221    output [2:0] SAXIHP0RACOUNT;
31222    output [2:0] SAXIHP1RACOUNT;
31223    output [2:0] SAXIHP2RACOUNT;
31224    output [2:0] SAXIHP3RACOUNT;
31225    output [31:0] EMIOTRACEDATA;
31226    output [31:0] FTMTP2FDEBUG;
31227    output [31:0] MAXIGP0ARADDR;
31228    output [31:0] MAXIGP0AWADDR;
31229    output [31:0] MAXIGP0WDATA;
31230    output [31:0] MAXIGP1ARADDR;
31231    output [31:0] MAXIGP1AWADDR;
31232    output [31:0] MAXIGP1WDATA;
31233    output [31:0] SAXIGP0RDATA;
31234    output [31:0] SAXIGP1RDATA;
31235    output [3:0] EMIOSDIO0DATAO;
31236    output [3:0] EMIOSDIO0DATATN;
31237    output [3:0] EMIOSDIO1DATAO;
31238    output [3:0] EMIOSDIO1DATATN;
31239    output [3:0] FCLKCLK;
31240    output [3:0] FCLKRESETN;
31241    output [3:0] FTMTF2PTRIGACK;
31242    output [3:0] FTMTP2FTRIG;
31243    output [3:0] MAXIGP0ARCACHE;
31244    output [3:0] MAXIGP0ARLEN;
31245    output [3:0] MAXIGP0ARQOS;
31246    output [3:0] MAXIGP0AWCACHE;
31247    output [3:0] MAXIGP0AWLEN;
31248    output [3:0] MAXIGP0AWQOS;
31249    output [3:0] MAXIGP0WSTRB;
31250    output [3:0] MAXIGP1ARCACHE;
31251    output [3:0] MAXIGP1ARLEN;
31252    output [3:0] MAXIGP1ARQOS;
31253    output [3:0] MAXIGP1AWCACHE;
31254    output [3:0] MAXIGP1AWLEN;
31255    output [3:0] MAXIGP1AWQOS;
31256    output [3:0] MAXIGP1WSTRB;
31257    output [5:0] SAXIGP0BID;
31258    output [5:0] SAXIGP0RID;
31259    output [5:0] SAXIGP1BID;
31260    output [5:0] SAXIGP1RID;
31261    output [5:0] SAXIHP0BID;
31262    output [5:0] SAXIHP0RID;
31263    output [5:0] SAXIHP0WACOUNT;
31264    output [5:0] SAXIHP1BID;
31265    output [5:0] SAXIHP1RID;
31266    output [5:0] SAXIHP1WACOUNT;
31267    output [5:0] SAXIHP2BID;
31268    output [5:0] SAXIHP2RID;
31269    output [5:0] SAXIHP2WACOUNT;
31270    output [5:0] SAXIHP3BID;
31271    output [5:0] SAXIHP3RID;
31272    output [5:0] SAXIHP3WACOUNT;
31273    output [63:0] EMIOGPIOO;
31274    output [63:0] EMIOGPIOTN;
31275    output [63:0] SAXIACPRDATA;
31276    output [63:0] SAXIHP0RDATA;
31277    output [63:0] SAXIHP1RDATA;
31278    output [63:0] SAXIHP2RDATA;
31279    output [63:0] SAXIHP3RDATA;
31280    output [7:0] EMIOENET0GMIITXD;
31281    output [7:0] EMIOENET1GMIITXD;
31282    output [7:0] SAXIHP0RCOUNT;
31283    output [7:0] SAXIHP0WCOUNT;
31284    output [7:0] SAXIHP1RCOUNT;
31285    output [7:0] SAXIHP1WCOUNT;
31286    output [7:0] SAXIHP2RCOUNT;
31287    output [7:0] SAXIHP2WCOUNT;
31288    output [7:0] SAXIHP3RCOUNT;
31289    output [7:0] SAXIHP3WCOUNT;
31290    inout DDRCASB;
31291    inout DDRCKE;
31292    inout DDRCKN;
31293    inout DDRCKP;
31294    inout DDRCSB;
31295    inout DDRDRSTB;
31296    inout DDRODT;
31297    inout DDRRASB;
31298    inout DDRVRN;
31299    inout DDRVRP;
31300    inout DDRWEB;
31301    inout PSCLK;
31302    inout PSPORB;
31303    inout PSSRSTB;
31304    inout [14:0] DDRA;
31305    inout [2:0] DDRBA;
31306    inout [31:0] DDRDQ;
31307    inout [3:0] DDRDM;
31308    inout [3:0] DDRDQSN;
31309    inout [3:0] DDRDQSP;
31310    inout [53:0] MIO;
31311    input DMA0ACLK;
31312    input DMA0DAREADY;
31313    input DMA0DRLAST;
31314    input DMA0DRVALID;
31315    input DMA1ACLK;
31316    input DMA1DAREADY;
31317    input DMA1DRLAST;
31318    input DMA1DRVALID;
31319    input DMA2ACLK;
31320    input DMA2DAREADY;
31321    input DMA2DRLAST;
31322    input DMA2DRVALID;
31323    input DMA3ACLK;
31324    input DMA3DAREADY;
31325    input DMA3DRLAST;
31326    input DMA3DRVALID;
31327    input EMIOCAN0PHYRX;
31328    input EMIOCAN1PHYRX;
31329    input EMIOENET0EXTINTIN;
31330    input EMIOENET0GMIICOL;
31331    input EMIOENET0GMIICRS;
31332    input EMIOENET0GMIIRXCLK;
31333    input EMIOENET0GMIIRXDV;
31334    input EMIOENET0GMIIRXER;
31335    input EMIOENET0GMIITXCLK;
31336    input EMIOENET0MDIOI;
31337    input EMIOENET1EXTINTIN;
31338    input EMIOENET1GMIICOL;
31339    input EMIOENET1GMIICRS;
31340    input EMIOENET1GMIIRXCLK;
31341    input EMIOENET1GMIIRXDV;
31342    input EMIOENET1GMIIRXER;
31343    input EMIOENET1GMIITXCLK;
31344    input EMIOENET1MDIOI;
31345    input EMIOI2C0SCLI;
31346    input EMIOI2C0SDAI;
31347    input EMIOI2C1SCLI;
31348    input EMIOI2C1SDAI;
31349    input EMIOPJTAGTCK;
31350    input EMIOPJTAGTDI;
31351    input EMIOPJTAGTMS;
31352    input EMIOSDIO0CDN;
31353    input EMIOSDIO0CLKFB;
31354    input EMIOSDIO0CMDI;
31355    input EMIOSDIO0WP;
31356    input EMIOSDIO1CDN;
31357    input EMIOSDIO1CLKFB;
31358    input EMIOSDIO1CMDI;
31359    input EMIOSDIO1WP;
31360    input EMIOSPI0MI;
31361    input EMIOSPI0SCLKI;
31362    input EMIOSPI0SI;
31363    input EMIOSPI0SSIN;
31364    input EMIOSPI1MI;
31365    input EMIOSPI1SCLKI;
31366    input EMIOSPI1SI;
31367    input EMIOSPI1SSIN;
31368    input EMIOSRAMINTIN;
31369    input EMIOTRACECLK;
31370    input EMIOUART0CTSN;
31371    input EMIOUART0DCDN;
31372    input EMIOUART0DSRN;
31373    input EMIOUART0RIN;
31374    input EMIOUART0RX;
31375    input EMIOUART1CTSN;
31376    input EMIOUART1DCDN;
31377    input EMIOUART1DSRN;
31378    input EMIOUART1RIN;
31379    input EMIOUART1RX;
31380    input EMIOUSB0VBUSPWRFAULT;
31381    input EMIOUSB1VBUSPWRFAULT;
31382    input EMIOWDTCLKI;
31383    input EVENTEVENTI;
31384    input FPGAIDLEN;
31385    input FTMDTRACEINCLOCK;
31386    input FTMDTRACEINVALID;
31387    input MAXIGP0ACLK;
31388    input MAXIGP0ARREADY;
31389    input MAXIGP0AWREADY;
31390    input MAXIGP0BVALID;
31391    input MAXIGP0RLAST;
31392    input MAXIGP0RVALID;
31393    input MAXIGP0WREADY;
31394    input MAXIGP1ACLK;
31395    input MAXIGP1ARREADY;
31396    input MAXIGP1AWREADY;
31397    input MAXIGP1BVALID;
31398    input MAXIGP1RLAST;
31399    input MAXIGP1RVALID;
31400    input MAXIGP1WREADY;
31401    input SAXIACPACLK;
31402    input SAXIACPARVALID;
31403    input SAXIACPAWVALID;
31404    input SAXIACPBREADY;
31405    input SAXIACPRREADY;
31406    input SAXIACPWLAST;
31407    input SAXIACPWVALID;
31408    input SAXIGP0ACLK;
31409    input SAXIGP0ARVALID;
31410    input SAXIGP0AWVALID;
31411    input SAXIGP0BREADY;
31412    input SAXIGP0RREADY;
31413    input SAXIGP0WLAST;
31414    input SAXIGP0WVALID;
31415    input SAXIGP1ACLK;
31416    input SAXIGP1ARVALID;
31417    input SAXIGP1AWVALID;
31418    input SAXIGP1BREADY;
31419    input SAXIGP1RREADY;
31420    input SAXIGP1WLAST;
31421    input SAXIGP1WVALID;
31422    input SAXIHP0ACLK;
31423    input SAXIHP0ARVALID;
31424    input SAXIHP0AWVALID;
31425    input SAXIHP0BREADY;
31426    input SAXIHP0RDISSUECAP1EN;
31427    input SAXIHP0RREADY;
31428    input SAXIHP0WLAST;
31429    input SAXIHP0WRISSUECAP1EN;
31430    input SAXIHP0WVALID;
31431    input SAXIHP1ACLK;
31432    input SAXIHP1ARVALID;
31433    input SAXIHP1AWVALID;
31434    input SAXIHP1BREADY;
31435    input SAXIHP1RDISSUECAP1EN;
31436    input SAXIHP1RREADY;
31437    input SAXIHP1WLAST;
31438    input SAXIHP1WRISSUECAP1EN;
31439    input SAXIHP1WVALID;
31440    input SAXIHP2ACLK;
31441    input SAXIHP2ARVALID;
31442    input SAXIHP2AWVALID;
31443    input SAXIHP2BREADY;
31444    input SAXIHP2RDISSUECAP1EN;
31445    input SAXIHP2RREADY;
31446    input SAXIHP2WLAST;
31447    input SAXIHP2WRISSUECAP1EN;
31448    input SAXIHP2WVALID;
31449    input SAXIHP3ACLK;
31450    input SAXIHP3ARVALID;
31451    input SAXIHP3AWVALID;
31452    input SAXIHP3BREADY;
31453    input SAXIHP3RDISSUECAP1EN;
31454    input SAXIHP3RREADY;
31455    input SAXIHP3WLAST;
31456    input SAXIHP3WRISSUECAP1EN;
31457    input SAXIHP3WVALID;
31458    input [11:0] MAXIGP0BID;
31459    input [11:0] MAXIGP0RID;
31460    input [11:0] MAXIGP1BID;
31461    input [11:0] MAXIGP1RID;
31462    input [19:0] IRQF2P;
31463    input [1:0] DMA0DRTYPE;
31464    input [1:0] DMA1DRTYPE;
31465    input [1:0] DMA2DRTYPE;
31466    input [1:0] DMA3DRTYPE;
31467    input [1:0] MAXIGP0BRESP;
31468    input [1:0] MAXIGP0RRESP;
31469    input [1:0] MAXIGP1BRESP;
31470    input [1:0] MAXIGP1RRESP;
31471    input [1:0] SAXIACPARBURST;
31472    input [1:0] SAXIACPARLOCK;
31473    input [1:0] SAXIACPARSIZE;
31474    input [1:0] SAXIACPAWBURST;
31475    input [1:0] SAXIACPAWLOCK;
31476    input [1:0] SAXIACPAWSIZE;
31477    input [1:0] SAXIGP0ARBURST;
31478    input [1:0] SAXIGP0ARLOCK;
31479    input [1:0] SAXIGP0ARSIZE;
31480    input [1:0] SAXIGP0AWBURST;
31481    input [1:0] SAXIGP0AWLOCK;
31482    input [1:0] SAXIGP0AWSIZE;
31483    input [1:0] SAXIGP1ARBURST;
31484    input [1:0] SAXIGP1ARLOCK;
31485    input [1:0] SAXIGP1ARSIZE;
31486    input [1:0] SAXIGP1AWBURST;
31487    input [1:0] SAXIGP1AWLOCK;
31488    input [1:0] SAXIGP1AWSIZE;
31489    input [1:0] SAXIHP0ARBURST;
31490    input [1:0] SAXIHP0ARLOCK;
31491    input [1:0] SAXIHP0ARSIZE;
31492    input [1:0] SAXIHP0AWBURST;
31493    input [1:0] SAXIHP0AWLOCK;
31494    input [1:0] SAXIHP0AWSIZE;
31495    input [1:0] SAXIHP1ARBURST;
31496    input [1:0] SAXIHP1ARLOCK;
31497    input [1:0] SAXIHP1ARSIZE;
31498    input [1:0] SAXIHP1AWBURST;
31499    input [1:0] SAXIHP1AWLOCK;
31500    input [1:0] SAXIHP1AWSIZE;
31501    input [1:0] SAXIHP2ARBURST;
31502    input [1:0] SAXIHP2ARLOCK;
31503    input [1:0] SAXIHP2ARSIZE;
31504    input [1:0] SAXIHP2AWBURST;
31505    input [1:0] SAXIHP2AWLOCK;
31506    input [1:0] SAXIHP2AWSIZE;
31507    input [1:0] SAXIHP3ARBURST;
31508    input [1:0] SAXIHP3ARLOCK;
31509    input [1:0] SAXIHP3ARSIZE;
31510    input [1:0] SAXIHP3AWBURST;
31511    input [1:0] SAXIHP3AWLOCK;
31512    input [1:0] SAXIHP3AWSIZE;
31513    input [2:0] EMIOTTC0CLKI;
31514    input [2:0] EMIOTTC1CLKI;
31515    input [2:0] SAXIACPARID;
31516    input [2:0] SAXIACPARPROT;
31517    input [2:0] SAXIACPAWID;
31518    input [2:0] SAXIACPAWPROT;
31519    input [2:0] SAXIACPWID;
31520    input [2:0] SAXIGP0ARPROT;
31521    input [2:0] SAXIGP0AWPROT;
31522    input [2:0] SAXIGP1ARPROT;
31523    input [2:0] SAXIGP1AWPROT;
31524    input [2:0] SAXIHP0ARPROT;
31525    input [2:0] SAXIHP0AWPROT;
31526    input [2:0] SAXIHP1ARPROT;
31527    input [2:0] SAXIHP1AWPROT;
31528    input [2:0] SAXIHP2ARPROT;
31529    input [2:0] SAXIHP2AWPROT;
31530    input [2:0] SAXIHP3ARPROT;
31531    input [2:0] SAXIHP3AWPROT;
31532    input [31:0] FTMDTRACEINDATA;
31533    input [31:0] FTMTF2PDEBUG;
31534    input [31:0] MAXIGP0RDATA;
31535    input [31:0] MAXIGP1RDATA;
31536    input [31:0] SAXIACPARADDR;
31537    input [31:0] SAXIACPAWADDR;
31538    input [31:0] SAXIGP0ARADDR;
31539    input [31:0] SAXIGP0AWADDR;
31540    input [31:0] SAXIGP0WDATA;
31541    input [31:0] SAXIGP1ARADDR;
31542    input [31:0] SAXIGP1AWADDR;
31543    input [31:0] SAXIGP1WDATA;
31544    input [31:0] SAXIHP0ARADDR;
31545    input [31:0] SAXIHP0AWADDR;
31546    input [31:0] SAXIHP1ARADDR;
31547    input [31:0] SAXIHP1AWADDR;
31548    input [31:0] SAXIHP2ARADDR;
31549    input [31:0] SAXIHP2AWADDR;
31550    input [31:0] SAXIHP3ARADDR;
31551    input [31:0] SAXIHP3AWADDR;
31552    input [3:0] DDRARB;
31553    input [3:0] EMIOSDIO0DATAI;
31554    input [3:0] EMIOSDIO1DATAI;
31555    input [3:0] FCLKCLKTRIGN;
31556    input [3:0] FTMDTRACEINATID;
31557    input [3:0] FTMTF2PTRIG;
31558    input [3:0] FTMTP2FTRIGACK;
31559    input [3:0] SAXIACPARCACHE;
31560    input [3:0] SAXIACPARLEN;
31561    input [3:0] SAXIACPARQOS;
31562    input [3:0] SAXIACPAWCACHE;
31563    input [3:0] SAXIACPAWLEN;
31564    input [3:0] SAXIACPAWQOS;
31565    input [3:0] SAXIGP0ARCACHE;
31566    input [3:0] SAXIGP0ARLEN;
31567    input [3:0] SAXIGP0ARQOS;
31568    input [3:0] SAXIGP0AWCACHE;
31569    input [3:0] SAXIGP0AWLEN;
31570    input [3:0] SAXIGP0AWQOS;
31571    input [3:0] SAXIGP0WSTRB;
31572    input [3:0] SAXIGP1ARCACHE;
31573    input [3:0] SAXIGP1ARLEN;
31574    input [3:0] SAXIGP1ARQOS;
31575    input [3:0] SAXIGP1AWCACHE;
31576    input [3:0] SAXIGP1AWLEN;
31577    input [3:0] SAXIGP1AWQOS;
31578    input [3:0] SAXIGP1WSTRB;
31579    input [3:0] SAXIHP0ARCACHE;
31580    input [3:0] SAXIHP0ARLEN;
31581    input [3:0] SAXIHP0ARQOS;
31582    input [3:0] SAXIHP0AWCACHE;
31583    input [3:0] SAXIHP0AWLEN;
31584    input [3:0] SAXIHP0AWQOS;
31585    input [3:0] SAXIHP1ARCACHE;
31586    input [3:0] SAXIHP1ARLEN;
31587    input [3:0] SAXIHP1ARQOS;
31588    input [3:0] SAXIHP1AWCACHE;
31589    input [3:0] SAXIHP1AWLEN;
31590    input [3:0] SAXIHP1AWQOS;
31591    input [3:0] SAXIHP2ARCACHE;
31592    input [3:0] SAXIHP2ARLEN;
31593    input [3:0] SAXIHP2ARQOS;
31594    input [3:0] SAXIHP2AWCACHE;
31595    input [3:0] SAXIHP2AWLEN;
31596    input [3:0] SAXIHP2AWQOS;
31597    input [3:0] SAXIHP3ARCACHE;
31598    input [3:0] SAXIHP3ARLEN;
31599    input [3:0] SAXIHP3ARQOS;
31600    input [3:0] SAXIHP3AWCACHE;
31601    input [3:0] SAXIHP3AWLEN;
31602    input [3:0] SAXIHP3AWQOS;
31603    input [4:0] SAXIACPARUSER;
31604    input [4:0] SAXIACPAWUSER;
31605    input [5:0] SAXIGP0ARID;
31606    input [5:0] SAXIGP0AWID;
31607    input [5:0] SAXIGP0WID;
31608    input [5:0] SAXIGP1ARID;
31609    input [5:0] SAXIGP1AWID;
31610    input [5:0] SAXIGP1WID;
31611    input [5:0] SAXIHP0ARID;
31612    input [5:0] SAXIHP0AWID;
31613    input [5:0] SAXIHP0WID;
31614    input [5:0] SAXIHP1ARID;
31615    input [5:0] SAXIHP1AWID;
31616    input [5:0] SAXIHP1WID;
31617    input [5:0] SAXIHP2ARID;
31618    input [5:0] SAXIHP2AWID;
31619    input [5:0] SAXIHP2WID;
31620    input [5:0] SAXIHP3ARID;
31621    input [5:0] SAXIHP3AWID;
31622    input [5:0] SAXIHP3WID;
31623    input [63:0] EMIOGPIOI;
31624    input [63:0] SAXIACPWDATA;
31625    input [63:0] SAXIHP0WDATA;
31626    input [63:0] SAXIHP1WDATA;
31627    input [63:0] SAXIHP2WDATA;
31628    input [63:0] SAXIHP3WDATA;
31629    input [7:0] EMIOENET0GMIIRXD;
31630    input [7:0] EMIOENET1GMIIRXD;
31631    input [7:0] SAXIACPWSTRB;
31632    input [7:0] SAXIHP0WSTRB;
31633    input [7:0] SAXIHP1WSTRB;
31634    input [7:0] SAXIHP2WSTRB;
31635    input [7:0] SAXIHP3WSTRB;
31636endmodule
31637
31638(* keep *)
31639module PS8 (...);
31640    output [7:0] ADMA2PLCACK;
31641    output [7:0] ADMA2PLTVLD;
31642    output DPAUDIOREFCLK;
31643    output DPAUXDATAOEN;
31644    output DPAUXDATAOUT;
31645    output DPLIVEVIDEODEOUT;
31646    output [31:0] DPMAXISMIXEDAUDIOTDATA;
31647    output DPMAXISMIXEDAUDIOTID;
31648    output DPMAXISMIXEDAUDIOTVALID;
31649    output DPSAXISAUDIOTREADY;
31650    output DPVIDEOOUTHSYNC;
31651    output [35:0] DPVIDEOOUTPIXEL1;
31652    output DPVIDEOOUTVSYNC;
31653    output DPVIDEOREFCLK;
31654    output EMIOCAN0PHYTX;
31655    output EMIOCAN1PHYTX;
31656    output [1:0] EMIOENET0DMABUSWIDTH;
31657    output EMIOENET0DMATXENDTOG;
31658    output [93:0] EMIOENET0GEMTSUTIMERCNT;
31659    output [7:0] EMIOENET0GMIITXD;
31660    output EMIOENET0GMIITXEN;
31661    output EMIOENET0GMIITXER;
31662    output EMIOENET0MDIOMDC;
31663    output EMIOENET0MDIOO;
31664    output EMIOENET0MDIOTN;
31665    output [7:0] EMIOENET0RXWDATA;
31666    output EMIOENET0RXWEOP;
31667    output EMIOENET0RXWERR;
31668    output EMIOENET0RXWFLUSH;
31669    output EMIOENET0RXWSOP;
31670    output [44:0] EMIOENET0RXWSTATUS;
31671    output EMIOENET0RXWWR;
31672    output [2:0] EMIOENET0SPEEDMODE;
31673    output EMIOENET0TXRRD;
31674    output [3:0] EMIOENET0TXRSTATUS;
31675    output [1:0] EMIOENET1DMABUSWIDTH;
31676    output EMIOENET1DMATXENDTOG;
31677    output [7:0] EMIOENET1GMIITXD;
31678    output EMIOENET1GMIITXEN;
31679    output EMIOENET1GMIITXER;
31680    output EMIOENET1MDIOMDC;
31681    output EMIOENET1MDIOO;
31682    output EMIOENET1MDIOTN;
31683    output [7:0] EMIOENET1RXWDATA;
31684    output EMIOENET1RXWEOP;
31685    output EMIOENET1RXWERR;
31686    output EMIOENET1RXWFLUSH;
31687    output EMIOENET1RXWSOP;
31688    output [44:0] EMIOENET1RXWSTATUS;
31689    output EMIOENET1RXWWR;
31690    output [2:0] EMIOENET1SPEEDMODE;
31691    output EMIOENET1TXRRD;
31692    output [3:0] EMIOENET1TXRSTATUS;
31693    output [1:0] EMIOENET2DMABUSWIDTH;
31694    output EMIOENET2DMATXENDTOG;
31695    output [7:0] EMIOENET2GMIITXD;
31696    output EMIOENET2GMIITXEN;
31697    output EMIOENET2GMIITXER;
31698    output EMIOENET2MDIOMDC;
31699    output EMIOENET2MDIOO;
31700    output EMIOENET2MDIOTN;
31701    output [7:0] EMIOENET2RXWDATA;
31702    output EMIOENET2RXWEOP;
31703    output EMIOENET2RXWERR;
31704    output EMIOENET2RXWFLUSH;
31705    output EMIOENET2RXWSOP;
31706    output [44:0] EMIOENET2RXWSTATUS;
31707    output EMIOENET2RXWWR;
31708    output [2:0] EMIOENET2SPEEDMODE;
31709    output EMIOENET2TXRRD;
31710    output [3:0] EMIOENET2TXRSTATUS;
31711    output [1:0] EMIOENET3DMABUSWIDTH;
31712    output EMIOENET3DMATXENDTOG;
31713    output [7:0] EMIOENET3GMIITXD;
31714    output EMIOENET3GMIITXEN;
31715    output EMIOENET3GMIITXER;
31716    output EMIOENET3MDIOMDC;
31717    output EMIOENET3MDIOO;
31718    output EMIOENET3MDIOTN;
31719    output [7:0] EMIOENET3RXWDATA;
31720    output EMIOENET3RXWEOP;
31721    output EMIOENET3RXWERR;
31722    output EMIOENET3RXWFLUSH;
31723    output EMIOENET3RXWSOP;
31724    output [44:0] EMIOENET3RXWSTATUS;
31725    output EMIOENET3RXWWR;
31726    output [2:0] EMIOENET3SPEEDMODE;
31727    output EMIOENET3TXRRD;
31728    output [3:0] EMIOENET3TXRSTATUS;
31729    output EMIOGEM0DELAYREQRX;
31730    output EMIOGEM0DELAYREQTX;
31731    output EMIOGEM0PDELAYREQRX;
31732    output EMIOGEM0PDELAYREQTX;
31733    output EMIOGEM0PDELAYRESPRX;
31734    output EMIOGEM0PDELAYRESPTX;
31735    output EMIOGEM0RXSOF;
31736    output EMIOGEM0SYNCFRAMERX;
31737    output EMIOGEM0SYNCFRAMETX;
31738    output EMIOGEM0TSUTIMERCMPVAL;
31739    output EMIOGEM0TXRFIXEDLAT;
31740    output EMIOGEM0TXSOF;
31741    output EMIOGEM1DELAYREQRX;
31742    output EMIOGEM1DELAYREQTX;
31743    output EMIOGEM1PDELAYREQRX;
31744    output EMIOGEM1PDELAYREQTX;
31745    output EMIOGEM1PDELAYRESPRX;
31746    output EMIOGEM1PDELAYRESPTX;
31747    output EMIOGEM1RXSOF;
31748    output EMIOGEM1SYNCFRAMERX;
31749    output EMIOGEM1SYNCFRAMETX;
31750    output EMIOGEM1TSUTIMERCMPVAL;
31751    output EMIOGEM1TXRFIXEDLAT;
31752    output EMIOGEM1TXSOF;
31753    output EMIOGEM2DELAYREQRX;
31754    output EMIOGEM2DELAYREQTX;
31755    output EMIOGEM2PDELAYREQRX;
31756    output EMIOGEM2PDELAYREQTX;
31757    output EMIOGEM2PDELAYRESPRX;
31758    output EMIOGEM2PDELAYRESPTX;
31759    output EMIOGEM2RXSOF;
31760    output EMIOGEM2SYNCFRAMERX;
31761    output EMIOGEM2SYNCFRAMETX;
31762    output EMIOGEM2TSUTIMERCMPVAL;
31763    output EMIOGEM2TXRFIXEDLAT;
31764    output EMIOGEM2TXSOF;
31765    output EMIOGEM3DELAYREQRX;
31766    output EMIOGEM3DELAYREQTX;
31767    output EMIOGEM3PDELAYREQRX;
31768    output EMIOGEM3PDELAYREQTX;
31769    output EMIOGEM3PDELAYRESPRX;
31770    output EMIOGEM3PDELAYRESPTX;
31771    output EMIOGEM3RXSOF;
31772    output EMIOGEM3SYNCFRAMERX;
31773    output EMIOGEM3SYNCFRAMETX;
31774    output EMIOGEM3TSUTIMERCMPVAL;
31775    output EMIOGEM3TXRFIXEDLAT;
31776    output EMIOGEM3TXSOF;
31777    output [95:0] EMIOGPIOO;
31778    output [95:0] EMIOGPIOTN;
31779    output EMIOI2C0SCLO;
31780    output EMIOI2C0SCLTN;
31781    output EMIOI2C0SDAO;
31782    output EMIOI2C0SDATN;
31783    output EMIOI2C1SCLO;
31784    output EMIOI2C1SCLTN;
31785    output EMIOI2C1SDAO;
31786    output EMIOI2C1SDATN;
31787    output EMIOSDIO0BUSPOWER;
31788    output [2:0] EMIOSDIO0BUSVOLT;
31789    output EMIOSDIO0CLKOUT;
31790    output EMIOSDIO0CMDENA;
31791    output EMIOSDIO0CMDOUT;
31792    output [7:0] EMIOSDIO0DATAENA;
31793    output [7:0] EMIOSDIO0DATAOUT;
31794    output EMIOSDIO0LEDCONTROL;
31795    output EMIOSDIO1BUSPOWER;
31796    output [2:0] EMIOSDIO1BUSVOLT;
31797    output EMIOSDIO1CLKOUT;
31798    output EMIOSDIO1CMDENA;
31799    output EMIOSDIO1CMDOUT;
31800    output [7:0] EMIOSDIO1DATAENA;
31801    output [7:0] EMIOSDIO1DATAOUT;
31802    output EMIOSDIO1LEDCONTROL;
31803    output EMIOSPI0MO;
31804    output EMIOSPI0MOTN;
31805    output EMIOSPI0SCLKO;
31806    output EMIOSPI0SCLKTN;
31807    output EMIOSPI0SO;
31808    output EMIOSPI0SSNTN;
31809    output [2:0] EMIOSPI0SSON;
31810    output EMIOSPI0STN;
31811    output EMIOSPI1MO;
31812    output EMIOSPI1MOTN;
31813    output EMIOSPI1SCLKO;
31814    output EMIOSPI1SCLKTN;
31815    output EMIOSPI1SO;
31816    output EMIOSPI1SSNTN;
31817    output [2:0] EMIOSPI1SSON;
31818    output EMIOSPI1STN;
31819    output [2:0] EMIOTTC0WAVEO;
31820    output [2:0] EMIOTTC1WAVEO;
31821    output [2:0] EMIOTTC2WAVEO;
31822    output [2:0] EMIOTTC3WAVEO;
31823    output EMIOU2DSPORTVBUSCTRLUSB30;
31824    output EMIOU2DSPORTVBUSCTRLUSB31;
31825    output EMIOU3DSPORTVBUSCTRLUSB30;
31826    output EMIOU3DSPORTVBUSCTRLUSB31;
31827    output EMIOUART0DTRN;
31828    output EMIOUART0RTSN;
31829    output EMIOUART0TX;
31830    output EMIOUART1DTRN;
31831    output EMIOUART1RTSN;
31832    output EMIOUART1TX;
31833    output EMIOWDT0RSTO;
31834    output EMIOWDT1RSTO;
31835    output FMIOGEM0FIFORXCLKTOPLBUFG;
31836    output FMIOGEM0FIFOTXCLKTOPLBUFG;
31837    output FMIOGEM1FIFORXCLKTOPLBUFG;
31838    output FMIOGEM1FIFOTXCLKTOPLBUFG;
31839    output FMIOGEM2FIFORXCLKTOPLBUFG;
31840    output FMIOGEM2FIFOTXCLKTOPLBUFG;
31841    output FMIOGEM3FIFORXCLKTOPLBUFG;
31842    output FMIOGEM3FIFOTXCLKTOPLBUFG;
31843    output FMIOGEMTSUCLKTOPLBUFG;
31844    output [31:0] FTMGPO;
31845    output [7:0] GDMA2PLCACK;
31846    output [7:0] GDMA2PLTVLD;
31847    output [39:0] MAXIGP0ARADDR;
31848    output [1:0] MAXIGP0ARBURST;
31849    output [3:0] MAXIGP0ARCACHE;
31850    output [15:0] MAXIGP0ARID;
31851    output [7:0] MAXIGP0ARLEN;
31852    output MAXIGP0ARLOCK;
31853    output [2:0] MAXIGP0ARPROT;
31854    output [3:0] MAXIGP0ARQOS;
31855    output [2:0] MAXIGP0ARSIZE;
31856    output [15:0] MAXIGP0ARUSER;
31857    output MAXIGP0ARVALID;
31858    output [39:0] MAXIGP0AWADDR;
31859    output [1:0] MAXIGP0AWBURST;
31860    output [3:0] MAXIGP0AWCACHE;
31861    output [15:0] MAXIGP0AWID;
31862    output [7:0] MAXIGP0AWLEN;
31863    output MAXIGP0AWLOCK;
31864    output [2:0] MAXIGP0AWPROT;
31865    output [3:0] MAXIGP0AWQOS;
31866    output [2:0] MAXIGP0AWSIZE;
31867    output [15:0] MAXIGP0AWUSER;
31868    output MAXIGP0AWVALID;
31869    output MAXIGP0BREADY;
31870    output MAXIGP0RREADY;
31871    output [127:0] MAXIGP0WDATA;
31872    output MAXIGP0WLAST;
31873    output [15:0] MAXIGP0WSTRB;
31874    output MAXIGP0WVALID;
31875    output [39:0] MAXIGP1ARADDR;
31876    output [1:0] MAXIGP1ARBURST;
31877    output [3:0] MAXIGP1ARCACHE;
31878    output [15:0] MAXIGP1ARID;
31879    output [7:0] MAXIGP1ARLEN;
31880    output MAXIGP1ARLOCK;
31881    output [2:0] MAXIGP1ARPROT;
31882    output [3:0] MAXIGP1ARQOS;
31883    output [2:0] MAXIGP1ARSIZE;
31884    output [15:0] MAXIGP1ARUSER;
31885    output MAXIGP1ARVALID;
31886    output [39:0] MAXIGP1AWADDR;
31887    output [1:0] MAXIGP1AWBURST;
31888    output [3:0] MAXIGP1AWCACHE;
31889    output [15:0] MAXIGP1AWID;
31890    output [7:0] MAXIGP1AWLEN;
31891    output MAXIGP1AWLOCK;
31892    output [2:0] MAXIGP1AWPROT;
31893    output [3:0] MAXIGP1AWQOS;
31894    output [2:0] MAXIGP1AWSIZE;
31895    output [15:0] MAXIGP1AWUSER;
31896    output MAXIGP1AWVALID;
31897    output MAXIGP1BREADY;
31898    output MAXIGP1RREADY;
31899    output [127:0] MAXIGP1WDATA;
31900    output MAXIGP1WLAST;
31901    output [15:0] MAXIGP1WSTRB;
31902    output MAXIGP1WVALID;
31903    output [39:0] MAXIGP2ARADDR;
31904    output [1:0] MAXIGP2ARBURST;
31905    output [3:0] MAXIGP2ARCACHE;
31906    output [15:0] MAXIGP2ARID;
31907    output [7:0] MAXIGP2ARLEN;
31908    output MAXIGP2ARLOCK;
31909    output [2:0] MAXIGP2ARPROT;
31910    output [3:0] MAXIGP2ARQOS;
31911    output [2:0] MAXIGP2ARSIZE;
31912    output [15:0] MAXIGP2ARUSER;
31913    output MAXIGP2ARVALID;
31914    output [39:0] MAXIGP2AWADDR;
31915    output [1:0] MAXIGP2AWBURST;
31916    output [3:0] MAXIGP2AWCACHE;
31917    output [15:0] MAXIGP2AWID;
31918    output [7:0] MAXIGP2AWLEN;
31919    output MAXIGP2AWLOCK;
31920    output [2:0] MAXIGP2AWPROT;
31921    output [3:0] MAXIGP2AWQOS;
31922    output [2:0] MAXIGP2AWSIZE;
31923    output [15:0] MAXIGP2AWUSER;
31924    output MAXIGP2AWVALID;
31925    output MAXIGP2BREADY;
31926    output MAXIGP2RREADY;
31927    output [127:0] MAXIGP2WDATA;
31928    output MAXIGP2WLAST;
31929    output [15:0] MAXIGP2WSTRB;
31930    output MAXIGP2WVALID;
31931    output OSCRTCCLK;
31932    output [3:0] PLCLK;
31933    output PMUAIBAFIFMFPDREQ;
31934    output PMUAIBAFIFMLPDREQ;
31935    output [46:0] PMUERRORTOPL;
31936    output [31:0] PMUPLGPO;
31937    output PSPLEVENTO;
31938    output [63:0] PSPLIRQFPD;
31939    output [99:0] PSPLIRQLPD;
31940    output [3:0] PSPLSTANDBYWFE;
31941    output [3:0] PSPLSTANDBYWFI;
31942    output PSPLTRACECTL;
31943    output [31:0] PSPLTRACEDATA;
31944    output [3:0] PSPLTRIGACK;
31945    output [3:0] PSPLTRIGGER;
31946    output PSS_ALTO_CORE_PAD_MGTTXN0OUT;
31947    output PSS_ALTO_CORE_PAD_MGTTXN1OUT;
31948    output PSS_ALTO_CORE_PAD_MGTTXN2OUT;
31949    output PSS_ALTO_CORE_PAD_MGTTXN3OUT;
31950    output PSS_ALTO_CORE_PAD_MGTTXP0OUT;
31951    output PSS_ALTO_CORE_PAD_MGTTXP1OUT;
31952    output PSS_ALTO_CORE_PAD_MGTTXP2OUT;
31953    output PSS_ALTO_CORE_PAD_MGTTXP3OUT;
31954    output PSS_ALTO_CORE_PAD_PADO;
31955    output RPUEVENTO0;
31956    output RPUEVENTO1;
31957    output [43:0] SACEFPDACADDR;
31958    output [2:0] SACEFPDACPROT;
31959    output [3:0] SACEFPDACSNOOP;
31960    output SACEFPDACVALID;
31961    output SACEFPDARREADY;
31962    output SACEFPDAWREADY;
31963    output [5:0] SACEFPDBID;
31964    output [1:0] SACEFPDBRESP;
31965    output SACEFPDBUSER;
31966    output SACEFPDBVALID;
31967    output SACEFPDCDREADY;
31968    output SACEFPDCRREADY;
31969    output [127:0] SACEFPDRDATA;
31970    output [5:0] SACEFPDRID;
31971    output SACEFPDRLAST;
31972    output [3:0] SACEFPDRRESP;
31973    output SACEFPDRUSER;
31974    output SACEFPDRVALID;
31975    output SACEFPDWREADY;
31976    output SAXIACPARREADY;
31977    output SAXIACPAWREADY;
31978    output [4:0] SAXIACPBID;
31979    output [1:0] SAXIACPBRESP;
31980    output SAXIACPBVALID;
31981    output [127:0] SAXIACPRDATA;
31982    output [4:0] SAXIACPRID;
31983    output SAXIACPRLAST;
31984    output [1:0] SAXIACPRRESP;
31985    output SAXIACPRVALID;
31986    output SAXIACPWREADY;
31987    output SAXIGP0ARREADY;
31988    output SAXIGP0AWREADY;
31989    output [5:0] SAXIGP0BID;
31990    output [1:0] SAXIGP0BRESP;
31991    output SAXIGP0BVALID;
31992    output [3:0] SAXIGP0RACOUNT;
31993    output [7:0] SAXIGP0RCOUNT;
31994    output [127:0] SAXIGP0RDATA;
31995    output [5:0] SAXIGP0RID;
31996    output SAXIGP0RLAST;
31997    output [1:0] SAXIGP0RRESP;
31998    output SAXIGP0RVALID;
31999    output [3:0] SAXIGP0WACOUNT;
32000    output [7:0] SAXIGP0WCOUNT;
32001    output SAXIGP0WREADY;
32002    output SAXIGP1ARREADY;
32003    output SAXIGP1AWREADY;
32004    output [5:0] SAXIGP1BID;
32005    output [1:0] SAXIGP1BRESP;
32006    output SAXIGP1BVALID;
32007    output [3:0] SAXIGP1RACOUNT;
32008    output [7:0] SAXIGP1RCOUNT;
32009    output [127:0] SAXIGP1RDATA;
32010    output [5:0] SAXIGP1RID;
32011    output SAXIGP1RLAST;
32012    output [1:0] SAXIGP1RRESP;
32013    output SAXIGP1RVALID;
32014    output [3:0] SAXIGP1WACOUNT;
32015    output [7:0] SAXIGP1WCOUNT;
32016    output SAXIGP1WREADY;
32017    output SAXIGP2ARREADY;
32018    output SAXIGP2AWREADY;
32019    output [5:0] SAXIGP2BID;
32020    output [1:0] SAXIGP2BRESP;
32021    output SAXIGP2BVALID;
32022    output [3:0] SAXIGP2RACOUNT;
32023    output [7:0] SAXIGP2RCOUNT;
32024    output [127:0] SAXIGP2RDATA;
32025    output [5:0] SAXIGP2RID;
32026    output SAXIGP2RLAST;
32027    output [1:0] SAXIGP2RRESP;
32028    output SAXIGP2RVALID;
32029    output [3:0] SAXIGP2WACOUNT;
32030    output [7:0] SAXIGP2WCOUNT;
32031    output SAXIGP2WREADY;
32032    output SAXIGP3ARREADY;
32033    output SAXIGP3AWREADY;
32034    output [5:0] SAXIGP3BID;
32035    output [1:0] SAXIGP3BRESP;
32036    output SAXIGP3BVALID;
32037    output [3:0] SAXIGP3RACOUNT;
32038    output [7:0] SAXIGP3RCOUNT;
32039    output [127:0] SAXIGP3RDATA;
32040    output [5:0] SAXIGP3RID;
32041    output SAXIGP3RLAST;
32042    output [1:0] SAXIGP3RRESP;
32043    output SAXIGP3RVALID;
32044    output [3:0] SAXIGP3WACOUNT;
32045    output [7:0] SAXIGP3WCOUNT;
32046    output SAXIGP3WREADY;
32047    output SAXIGP4ARREADY;
32048    output SAXIGP4AWREADY;
32049    output [5:0] SAXIGP4BID;
32050    output [1:0] SAXIGP4BRESP;
32051    output SAXIGP4BVALID;
32052    output [3:0] SAXIGP4RACOUNT;
32053    output [7:0] SAXIGP4RCOUNT;
32054    output [127:0] SAXIGP4RDATA;
32055    output [5:0] SAXIGP4RID;
32056    output SAXIGP4RLAST;
32057    output [1:0] SAXIGP4RRESP;
32058    output SAXIGP4RVALID;
32059    output [3:0] SAXIGP4WACOUNT;
32060    output [7:0] SAXIGP4WCOUNT;
32061    output SAXIGP4WREADY;
32062    output SAXIGP5ARREADY;
32063    output SAXIGP5AWREADY;
32064    output [5:0] SAXIGP5BID;
32065    output [1:0] SAXIGP5BRESP;
32066    output SAXIGP5BVALID;
32067    output [3:0] SAXIGP5RACOUNT;
32068    output [7:0] SAXIGP5RCOUNT;
32069    output [127:0] SAXIGP5RDATA;
32070    output [5:0] SAXIGP5RID;
32071    output SAXIGP5RLAST;
32072    output [1:0] SAXIGP5RRESP;
32073    output SAXIGP5RVALID;
32074    output [3:0] SAXIGP5WACOUNT;
32075    output [7:0] SAXIGP5WCOUNT;
32076    output SAXIGP5WREADY;
32077    output SAXIGP6ARREADY;
32078    output SAXIGP6AWREADY;
32079    output [5:0] SAXIGP6BID;
32080    output [1:0] SAXIGP6BRESP;
32081    output SAXIGP6BVALID;
32082    output [3:0] SAXIGP6RACOUNT;
32083    output [7:0] SAXIGP6RCOUNT;
32084    output [127:0] SAXIGP6RDATA;
32085    output [5:0] SAXIGP6RID;
32086    output SAXIGP6RLAST;
32087    output [1:0] SAXIGP6RRESP;
32088    output SAXIGP6RVALID;
32089    output [3:0] SAXIGP6WACOUNT;
32090    output [7:0] SAXIGP6WCOUNT;
32091    output SAXIGP6WREADY;
32092    inout [3:0] PSS_ALTO_CORE_PAD_BOOTMODE;
32093    inout PSS_ALTO_CORE_PAD_CLK;
32094    inout PSS_ALTO_CORE_PAD_DONEB;
32095    inout [17:0] PSS_ALTO_CORE_PAD_DRAMA;
32096    inout PSS_ALTO_CORE_PAD_DRAMACTN;
32097    inout PSS_ALTO_CORE_PAD_DRAMALERTN;
32098    inout [1:0] PSS_ALTO_CORE_PAD_DRAMBA;
32099    inout [1:0] PSS_ALTO_CORE_PAD_DRAMBG;
32100    inout [1:0] PSS_ALTO_CORE_PAD_DRAMCK;
32101    inout [1:0] PSS_ALTO_CORE_PAD_DRAMCKE;
32102    inout [1:0] PSS_ALTO_CORE_PAD_DRAMCKN;
32103    inout [1:0] PSS_ALTO_CORE_PAD_DRAMCSN;
32104    inout [8:0] PSS_ALTO_CORE_PAD_DRAMDM;
32105    inout [71:0] PSS_ALTO_CORE_PAD_DRAMDQ;
32106    inout [8:0] PSS_ALTO_CORE_PAD_DRAMDQS;
32107    inout [8:0] PSS_ALTO_CORE_PAD_DRAMDQSN;
32108    inout [1:0] PSS_ALTO_CORE_PAD_DRAMODT;
32109    inout PSS_ALTO_CORE_PAD_DRAMPARITY;
32110    inout PSS_ALTO_CORE_PAD_DRAMRAMRSTN;
32111    inout PSS_ALTO_CORE_PAD_ERROROUT;
32112    inout PSS_ALTO_CORE_PAD_ERRORSTATUS;
32113    inout PSS_ALTO_CORE_PAD_INITB;
32114    inout PSS_ALTO_CORE_PAD_JTAGTCK;
32115    inout PSS_ALTO_CORE_PAD_JTAGTDI;
32116    inout PSS_ALTO_CORE_PAD_JTAGTDO;
32117    inout PSS_ALTO_CORE_PAD_JTAGTMS;
32118    inout [77:0] PSS_ALTO_CORE_PAD_MIO;
32119    inout PSS_ALTO_CORE_PAD_PORB;
32120    inout PSS_ALTO_CORE_PAD_PROGB;
32121    inout PSS_ALTO_CORE_PAD_RCALIBINOUT;
32122    inout PSS_ALTO_CORE_PAD_SRSTB;
32123    inout PSS_ALTO_CORE_PAD_ZQ;
32124    input [7:0] ADMAFCICLK;
32125    input AIBPMUAFIFMFPDACK;
32126    input AIBPMUAFIFMLPDACK;
32127    input DDRCEXTREFRESHRANK0REQ;
32128    input DDRCEXTREFRESHRANK1REQ;
32129    input DDRCREFRESHPLCLK;
32130    input DPAUXDATAIN;
32131    input DPEXTERNALCUSTOMEVENT1;
32132    input DPEXTERNALCUSTOMEVENT2;
32133    input DPEXTERNALVSYNCEVENT;
32134    input DPHOTPLUGDETECT;
32135    input [7:0] DPLIVEGFXALPHAIN;
32136    input [35:0] DPLIVEGFXPIXEL1IN;
32137    input DPLIVEVIDEOINDE;
32138    input DPLIVEVIDEOINHSYNC;
32139    input [35:0] DPLIVEVIDEOINPIXEL1;
32140    input DPLIVEVIDEOINVSYNC;
32141    input DPMAXISMIXEDAUDIOTREADY;
32142    input DPSAXISAUDIOCLK;
32143    input [31:0] DPSAXISAUDIOTDATA;
32144    input DPSAXISAUDIOTID;
32145    input DPSAXISAUDIOTVALID;
32146    input DPVIDEOINCLK;
32147    input EMIOCAN0PHYRX;
32148    input EMIOCAN1PHYRX;
32149    input EMIOENET0DMATXSTATUSTOG;
32150    input EMIOENET0EXTINTIN;
32151    input EMIOENET0GMIICOL;
32152    input EMIOENET0GMIICRS;
32153    input EMIOENET0GMIIRXCLK;
32154    input [7:0] EMIOENET0GMIIRXD;
32155    input EMIOENET0GMIIRXDV;
32156    input EMIOENET0GMIIRXER;
32157    input EMIOENET0GMIITXCLK;
32158    input EMIOENET0MDIOI;
32159    input EMIOENET0RXWOVERFLOW;
32160    input EMIOENET0TXRCONTROL;
32161    input [7:0] EMIOENET0TXRDATA;
32162    input EMIOENET0TXRDATARDY;
32163    input EMIOENET0TXREOP;
32164    input EMIOENET0TXRERR;
32165    input EMIOENET0TXRFLUSHED;
32166    input EMIOENET0TXRSOP;
32167    input EMIOENET0TXRUNDERFLOW;
32168    input EMIOENET0TXRVALID;
32169    input EMIOENET1DMATXSTATUSTOG;
32170    input EMIOENET1EXTINTIN;
32171    input EMIOENET1GMIICOL;
32172    input EMIOENET1GMIICRS;
32173    input EMIOENET1GMIIRXCLK;
32174    input [7:0] EMIOENET1GMIIRXD;
32175    input EMIOENET1GMIIRXDV;
32176    input EMIOENET1GMIIRXER;
32177    input EMIOENET1GMIITXCLK;
32178    input EMIOENET1MDIOI;
32179    input EMIOENET1RXWOVERFLOW;
32180    input EMIOENET1TXRCONTROL;
32181    input [7:0] EMIOENET1TXRDATA;
32182    input EMIOENET1TXRDATARDY;
32183    input EMIOENET1TXREOP;
32184    input EMIOENET1TXRERR;
32185    input EMIOENET1TXRFLUSHED;
32186    input EMIOENET1TXRSOP;
32187    input EMIOENET1TXRUNDERFLOW;
32188    input EMIOENET1TXRVALID;
32189    input EMIOENET2DMATXSTATUSTOG;
32190    input EMIOENET2EXTINTIN;
32191    input EMIOENET2GMIICOL;
32192    input EMIOENET2GMIICRS;
32193    input EMIOENET2GMIIRXCLK;
32194    input [7:0] EMIOENET2GMIIRXD;
32195    input EMIOENET2GMIIRXDV;
32196    input EMIOENET2GMIIRXER;
32197    input EMIOENET2GMIITXCLK;
32198    input EMIOENET2MDIOI;
32199    input EMIOENET2RXWOVERFLOW;
32200    input EMIOENET2TXRCONTROL;
32201    input [7:0] EMIOENET2TXRDATA;
32202    input EMIOENET2TXRDATARDY;
32203    input EMIOENET2TXREOP;
32204    input EMIOENET2TXRERR;
32205    input EMIOENET2TXRFLUSHED;
32206    input EMIOENET2TXRSOP;
32207    input EMIOENET2TXRUNDERFLOW;
32208    input EMIOENET2TXRVALID;
32209    input EMIOENET3DMATXSTATUSTOG;
32210    input EMIOENET3EXTINTIN;
32211    input EMIOENET3GMIICOL;
32212    input EMIOENET3GMIICRS;
32213    input EMIOENET3GMIIRXCLK;
32214    input [7:0] EMIOENET3GMIIRXD;
32215    input EMIOENET3GMIIRXDV;
32216    input EMIOENET3GMIIRXER;
32217    input EMIOENET3GMIITXCLK;
32218    input EMIOENET3MDIOI;
32219    input EMIOENET3RXWOVERFLOW;
32220    input EMIOENET3TXRCONTROL;
32221    input [7:0] EMIOENET3TXRDATA;
32222    input EMIOENET3TXRDATARDY;
32223    input EMIOENET3TXREOP;
32224    input EMIOENET3TXRERR;
32225    input EMIOENET3TXRFLUSHED;
32226    input EMIOENET3TXRSOP;
32227    input EMIOENET3TXRUNDERFLOW;
32228    input EMIOENET3TXRVALID;
32229    input EMIOENETTSUCLK;
32230    input [1:0] EMIOGEM0TSUINCCTRL;
32231    input [1:0] EMIOGEM1TSUINCCTRL;
32232    input [1:0] EMIOGEM2TSUINCCTRL;
32233    input [1:0] EMIOGEM3TSUINCCTRL;
32234    input [95:0] EMIOGPIOI;
32235    input EMIOHUBPORTOVERCRNTUSB20;
32236    input EMIOHUBPORTOVERCRNTUSB21;
32237    input EMIOHUBPORTOVERCRNTUSB30;
32238    input EMIOHUBPORTOVERCRNTUSB31;
32239    input EMIOI2C0SCLI;
32240    input EMIOI2C0SDAI;
32241    input EMIOI2C1SCLI;
32242    input EMIOI2C1SDAI;
32243    input EMIOSDIO0CDN;
32244    input EMIOSDIO0CMDIN;
32245    input [7:0] EMIOSDIO0DATAIN;
32246    input EMIOSDIO0FBCLKIN;
32247    input EMIOSDIO0WP;
32248    input EMIOSDIO1CDN;
32249    input EMIOSDIO1CMDIN;
32250    input [7:0] EMIOSDIO1DATAIN;
32251    input EMIOSDIO1FBCLKIN;
32252    input EMIOSDIO1WP;
32253    input EMIOSPI0MI;
32254    input EMIOSPI0SCLKI;
32255    input EMIOSPI0SI;
32256    input EMIOSPI0SSIN;
32257    input EMIOSPI1MI;
32258    input EMIOSPI1SCLKI;
32259    input EMIOSPI1SI;
32260    input EMIOSPI1SSIN;
32261    input [2:0] EMIOTTC0CLKI;
32262    input [2:0] EMIOTTC1CLKI;
32263    input [2:0] EMIOTTC2CLKI;
32264    input [2:0] EMIOTTC3CLKI;
32265    input EMIOUART0CTSN;
32266    input EMIOUART0DCDN;
32267    input EMIOUART0DSRN;
32268    input EMIOUART0RIN;
32269    input EMIOUART0RX;
32270    input EMIOUART1CTSN;
32271    input EMIOUART1DCDN;
32272    input EMIOUART1DSRN;
32273    input EMIOUART1RIN;
32274    input EMIOUART1RX;
32275    input EMIOWDT0CLKI;
32276    input EMIOWDT1CLKI;
32277    input FMIOGEM0FIFORXCLKFROMPL;
32278    input FMIOGEM0FIFOTXCLKFROMPL;
32279    input FMIOGEM0SIGNALDETECT;
32280    input FMIOGEM1FIFORXCLKFROMPL;
32281    input FMIOGEM1FIFOTXCLKFROMPL;
32282    input FMIOGEM1SIGNALDETECT;
32283    input FMIOGEM2FIFORXCLKFROMPL;
32284    input FMIOGEM2FIFOTXCLKFROMPL;
32285    input FMIOGEM2SIGNALDETECT;
32286    input FMIOGEM3FIFORXCLKFROMPL;
32287    input FMIOGEM3FIFOTXCLKFROMPL;
32288    input FMIOGEM3SIGNALDETECT;
32289    input FMIOGEMTSUCLKFROMPL;
32290    input [31:0] FTMGPI;
32291    input [7:0] GDMAFCICLK;
32292    input MAXIGP0ACLK;
32293    input MAXIGP0ARREADY;
32294    input MAXIGP0AWREADY;
32295    input [15:0] MAXIGP0BID;
32296    input [1:0] MAXIGP0BRESP;
32297    input MAXIGP0BVALID;
32298    input [127:0] MAXIGP0RDATA;
32299    input [15:0] MAXIGP0RID;
32300    input MAXIGP0RLAST;
32301    input [1:0] MAXIGP0RRESP;
32302    input MAXIGP0RVALID;
32303    input MAXIGP0WREADY;
32304    input MAXIGP1ACLK;
32305    input MAXIGP1ARREADY;
32306    input MAXIGP1AWREADY;
32307    input [15:0] MAXIGP1BID;
32308    input [1:0] MAXIGP1BRESP;
32309    input MAXIGP1BVALID;
32310    input [127:0] MAXIGP1RDATA;
32311    input [15:0] MAXIGP1RID;
32312    input MAXIGP1RLAST;
32313    input [1:0] MAXIGP1RRESP;
32314    input MAXIGP1RVALID;
32315    input MAXIGP1WREADY;
32316    input MAXIGP2ACLK;
32317    input MAXIGP2ARREADY;
32318    input MAXIGP2AWREADY;
32319    input [15:0] MAXIGP2BID;
32320    input [1:0] MAXIGP2BRESP;
32321    input MAXIGP2BVALID;
32322    input [127:0] MAXIGP2RDATA;
32323    input [15:0] MAXIGP2RID;
32324    input MAXIGP2RLAST;
32325    input [1:0] MAXIGP2RRESP;
32326    input MAXIGP2RVALID;
32327    input MAXIGP2WREADY;
32328    input NFIQ0LPDRPU;
32329    input NFIQ1LPDRPU;
32330    input NIRQ0LPDRPU;
32331    input NIRQ1LPDRPU;
32332    input [7:0] PL2ADMACVLD;
32333    input [7:0] PL2ADMATACK;
32334    input [7:0] PL2GDMACVLD;
32335    input [7:0] PL2GDMATACK;
32336    input PLACECLK;
32337    input PLACPINACT;
32338    input [3:0] PLFPGASTOP;
32339    input [2:0] PLLAUXREFCLKFPD;
32340    input [1:0] PLLAUXREFCLKLPD;
32341    input [31:0] PLPMUGPI;
32342    input [3:0] PLPSAPUGICFIQ;
32343    input [3:0] PLPSAPUGICIRQ;
32344    input PLPSEVENTI;
32345    input [7:0] PLPSIRQ0;
32346    input [7:0] PLPSIRQ1;
32347    input PLPSTRACECLK;
32348    input [3:0] PLPSTRIGACK;
32349    input [3:0] PLPSTRIGGER;
32350    input [3:0] PMUERRORFROMPL;
32351    input PSS_ALTO_CORE_PAD_MGTRXN0IN;
32352    input PSS_ALTO_CORE_PAD_MGTRXN1IN;
32353    input PSS_ALTO_CORE_PAD_MGTRXN2IN;
32354    input PSS_ALTO_CORE_PAD_MGTRXN3IN;
32355    input PSS_ALTO_CORE_PAD_MGTRXP0IN;
32356    input PSS_ALTO_CORE_PAD_MGTRXP1IN;
32357    input PSS_ALTO_CORE_PAD_MGTRXP2IN;
32358    input PSS_ALTO_CORE_PAD_MGTRXP3IN;
32359    input PSS_ALTO_CORE_PAD_PADI;
32360    input PSS_ALTO_CORE_PAD_REFN0IN;
32361    input PSS_ALTO_CORE_PAD_REFN1IN;
32362    input PSS_ALTO_CORE_PAD_REFN2IN;
32363    input PSS_ALTO_CORE_PAD_REFN3IN;
32364    input PSS_ALTO_CORE_PAD_REFP0IN;
32365    input PSS_ALTO_CORE_PAD_REFP1IN;
32366    input PSS_ALTO_CORE_PAD_REFP2IN;
32367    input PSS_ALTO_CORE_PAD_REFP3IN;
32368    input RPUEVENTI0;
32369    input RPUEVENTI1;
32370    input SACEFPDACREADY;
32371    input [43:0] SACEFPDARADDR;
32372    input [1:0] SACEFPDARBAR;
32373    input [1:0] SACEFPDARBURST;
32374    input [3:0] SACEFPDARCACHE;
32375    input [1:0] SACEFPDARDOMAIN;
32376    input [5:0] SACEFPDARID;
32377    input [7:0] SACEFPDARLEN;
32378    input SACEFPDARLOCK;
32379    input [2:0] SACEFPDARPROT;
32380    input [3:0] SACEFPDARQOS;
32381    input [3:0] SACEFPDARREGION;
32382    input [2:0] SACEFPDARSIZE;
32383    input [3:0] SACEFPDARSNOOP;
32384    input [15:0] SACEFPDARUSER;
32385    input SACEFPDARVALID;
32386    input [43:0] SACEFPDAWADDR;
32387    input [1:0] SACEFPDAWBAR;
32388    input [1:0] SACEFPDAWBURST;
32389    input [3:0] SACEFPDAWCACHE;
32390    input [1:0] SACEFPDAWDOMAIN;
32391    input [5:0] SACEFPDAWID;
32392    input [7:0] SACEFPDAWLEN;
32393    input SACEFPDAWLOCK;
32394    input [2:0] SACEFPDAWPROT;
32395    input [3:0] SACEFPDAWQOS;
32396    input [3:0] SACEFPDAWREGION;
32397    input [2:0] SACEFPDAWSIZE;
32398    input [2:0] SACEFPDAWSNOOP;
32399    input [15:0] SACEFPDAWUSER;
32400    input SACEFPDAWVALID;
32401    input SACEFPDBREADY;
32402    input [127:0] SACEFPDCDDATA;
32403    input SACEFPDCDLAST;
32404    input SACEFPDCDVALID;
32405    input [4:0] SACEFPDCRRESP;
32406    input SACEFPDCRVALID;
32407    input SACEFPDRACK;
32408    input SACEFPDRREADY;
32409    input SACEFPDWACK;
32410    input [127:0] SACEFPDWDATA;
32411    input SACEFPDWLAST;
32412    input [15:0] SACEFPDWSTRB;
32413    input SACEFPDWUSER;
32414    input SACEFPDWVALID;
32415    input SAXIACPACLK;
32416    input [39:0] SAXIACPARADDR;
32417    input [1:0] SAXIACPARBURST;
32418    input [3:0] SAXIACPARCACHE;
32419    input [4:0] SAXIACPARID;
32420    input [7:0] SAXIACPARLEN;
32421    input SAXIACPARLOCK;
32422    input [2:0] SAXIACPARPROT;
32423    input [3:0] SAXIACPARQOS;
32424    input [2:0] SAXIACPARSIZE;
32425    input [1:0] SAXIACPARUSER;
32426    input SAXIACPARVALID;
32427    input [39:0] SAXIACPAWADDR;
32428    input [1:0] SAXIACPAWBURST;
32429    input [3:0] SAXIACPAWCACHE;
32430    input [4:0] SAXIACPAWID;
32431    input [7:0] SAXIACPAWLEN;
32432    input SAXIACPAWLOCK;
32433    input [2:0] SAXIACPAWPROT;
32434    input [3:0] SAXIACPAWQOS;
32435    input [2:0] SAXIACPAWSIZE;
32436    input [1:0] SAXIACPAWUSER;
32437    input SAXIACPAWVALID;
32438    input SAXIACPBREADY;
32439    input SAXIACPRREADY;
32440    input [127:0] SAXIACPWDATA;
32441    input SAXIACPWLAST;
32442    input [15:0] SAXIACPWSTRB;
32443    input SAXIACPWVALID;
32444    input [48:0] SAXIGP0ARADDR;
32445    input [1:0] SAXIGP0ARBURST;
32446    input [3:0] SAXIGP0ARCACHE;
32447    input [5:0] SAXIGP0ARID;
32448    input [7:0] SAXIGP0ARLEN;
32449    input SAXIGP0ARLOCK;
32450    input [2:0] SAXIGP0ARPROT;
32451    input [3:0] SAXIGP0ARQOS;
32452    input [2:0] SAXIGP0ARSIZE;
32453    input SAXIGP0ARUSER;
32454    input SAXIGP0ARVALID;
32455    input [48:0] SAXIGP0AWADDR;
32456    input [1:0] SAXIGP0AWBURST;
32457    input [3:0] SAXIGP0AWCACHE;
32458    input [5:0] SAXIGP0AWID;
32459    input [7:0] SAXIGP0AWLEN;
32460    input SAXIGP0AWLOCK;
32461    input [2:0] SAXIGP0AWPROT;
32462    input [3:0] SAXIGP0AWQOS;
32463    input [2:0] SAXIGP0AWSIZE;
32464    input SAXIGP0AWUSER;
32465    input SAXIGP0AWVALID;
32466    input SAXIGP0BREADY;
32467    input SAXIGP0RCLK;
32468    input SAXIGP0RREADY;
32469    input SAXIGP0WCLK;
32470    input [127:0] SAXIGP0WDATA;
32471    input SAXIGP0WLAST;
32472    input [15:0] SAXIGP0WSTRB;
32473    input SAXIGP0WVALID;
32474    input [48:0] SAXIGP1ARADDR;
32475    input [1:0] SAXIGP1ARBURST;
32476    input [3:0] SAXIGP1ARCACHE;
32477    input [5:0] SAXIGP1ARID;
32478    input [7:0] SAXIGP1ARLEN;
32479    input SAXIGP1ARLOCK;
32480    input [2:0] SAXIGP1ARPROT;
32481    input [3:0] SAXIGP1ARQOS;
32482    input [2:0] SAXIGP1ARSIZE;
32483    input SAXIGP1ARUSER;
32484    input SAXIGP1ARVALID;
32485    input [48:0] SAXIGP1AWADDR;
32486    input [1:0] SAXIGP1AWBURST;
32487    input [3:0] SAXIGP1AWCACHE;
32488    input [5:0] SAXIGP1AWID;
32489    input [7:0] SAXIGP1AWLEN;
32490    input SAXIGP1AWLOCK;
32491    input [2:0] SAXIGP1AWPROT;
32492    input [3:0] SAXIGP1AWQOS;
32493    input [2:0] SAXIGP1AWSIZE;
32494    input SAXIGP1AWUSER;
32495    input SAXIGP1AWVALID;
32496    input SAXIGP1BREADY;
32497    input SAXIGP1RCLK;
32498    input SAXIGP1RREADY;
32499    input SAXIGP1WCLK;
32500    input [127:0] SAXIGP1WDATA;
32501    input SAXIGP1WLAST;
32502    input [15:0] SAXIGP1WSTRB;
32503    input SAXIGP1WVALID;
32504    input [48:0] SAXIGP2ARADDR;
32505    input [1:0] SAXIGP2ARBURST;
32506    input [3:0] SAXIGP2ARCACHE;
32507    input [5:0] SAXIGP2ARID;
32508    input [7:0] SAXIGP2ARLEN;
32509    input SAXIGP2ARLOCK;
32510    input [2:0] SAXIGP2ARPROT;
32511    input [3:0] SAXIGP2ARQOS;
32512    input [2:0] SAXIGP2ARSIZE;
32513    input SAXIGP2ARUSER;
32514    input SAXIGP2ARVALID;
32515    input [48:0] SAXIGP2AWADDR;
32516    input [1:0] SAXIGP2AWBURST;
32517    input [3:0] SAXIGP2AWCACHE;
32518    input [5:0] SAXIGP2AWID;
32519    input [7:0] SAXIGP2AWLEN;
32520    input SAXIGP2AWLOCK;
32521    input [2:0] SAXIGP2AWPROT;
32522    input [3:0] SAXIGP2AWQOS;
32523    input [2:0] SAXIGP2AWSIZE;
32524    input SAXIGP2AWUSER;
32525    input SAXIGP2AWVALID;
32526    input SAXIGP2BREADY;
32527    input SAXIGP2RCLK;
32528    input SAXIGP2RREADY;
32529    input SAXIGP2WCLK;
32530    input [127:0] SAXIGP2WDATA;
32531    input SAXIGP2WLAST;
32532    input [15:0] SAXIGP2WSTRB;
32533    input SAXIGP2WVALID;
32534    input [48:0] SAXIGP3ARADDR;
32535    input [1:0] SAXIGP3ARBURST;
32536    input [3:0] SAXIGP3ARCACHE;
32537    input [5:0] SAXIGP3ARID;
32538    input [7:0] SAXIGP3ARLEN;
32539    input SAXIGP3ARLOCK;
32540    input [2:0] SAXIGP3ARPROT;
32541    input [3:0] SAXIGP3ARQOS;
32542    input [2:0] SAXIGP3ARSIZE;
32543    input SAXIGP3ARUSER;
32544    input SAXIGP3ARVALID;
32545    input [48:0] SAXIGP3AWADDR;
32546    input [1:0] SAXIGP3AWBURST;
32547    input [3:0] SAXIGP3AWCACHE;
32548    input [5:0] SAXIGP3AWID;
32549    input [7:0] SAXIGP3AWLEN;
32550    input SAXIGP3AWLOCK;
32551    input [2:0] SAXIGP3AWPROT;
32552    input [3:0] SAXIGP3AWQOS;
32553    input [2:0] SAXIGP3AWSIZE;
32554    input SAXIGP3AWUSER;
32555    input SAXIGP3AWVALID;
32556    input SAXIGP3BREADY;
32557    input SAXIGP3RCLK;
32558    input SAXIGP3RREADY;
32559    input SAXIGP3WCLK;
32560    input [127:0] SAXIGP3WDATA;
32561    input SAXIGP3WLAST;
32562    input [15:0] SAXIGP3WSTRB;
32563    input SAXIGP3WVALID;
32564    input [48:0] SAXIGP4ARADDR;
32565    input [1:0] SAXIGP4ARBURST;
32566    input [3:0] SAXIGP4ARCACHE;
32567    input [5:0] SAXIGP4ARID;
32568    input [7:0] SAXIGP4ARLEN;
32569    input SAXIGP4ARLOCK;
32570    input [2:0] SAXIGP4ARPROT;
32571    input [3:0] SAXIGP4ARQOS;
32572    input [2:0] SAXIGP4ARSIZE;
32573    input SAXIGP4ARUSER;
32574    input SAXIGP4ARVALID;
32575    input [48:0] SAXIGP4AWADDR;
32576    input [1:0] SAXIGP4AWBURST;
32577    input [3:0] SAXIGP4AWCACHE;
32578    input [5:0] SAXIGP4AWID;
32579    input [7:0] SAXIGP4AWLEN;
32580    input SAXIGP4AWLOCK;
32581    input [2:0] SAXIGP4AWPROT;
32582    input [3:0] SAXIGP4AWQOS;
32583    input [2:0] SAXIGP4AWSIZE;
32584    input SAXIGP4AWUSER;
32585    input SAXIGP4AWVALID;
32586    input SAXIGP4BREADY;
32587    input SAXIGP4RCLK;
32588    input SAXIGP4RREADY;
32589    input SAXIGP4WCLK;
32590    input [127:0] SAXIGP4WDATA;
32591    input SAXIGP4WLAST;
32592    input [15:0] SAXIGP4WSTRB;
32593    input SAXIGP4WVALID;
32594    input [48:0] SAXIGP5ARADDR;
32595    input [1:0] SAXIGP5ARBURST;
32596    input [3:0] SAXIGP5ARCACHE;
32597    input [5:0] SAXIGP5ARID;
32598    input [7:0] SAXIGP5ARLEN;
32599    input SAXIGP5ARLOCK;
32600    input [2:0] SAXIGP5ARPROT;
32601    input [3:0] SAXIGP5ARQOS;
32602    input [2:0] SAXIGP5ARSIZE;
32603    input SAXIGP5ARUSER;
32604    input SAXIGP5ARVALID;
32605    input [48:0] SAXIGP5AWADDR;
32606    input [1:0] SAXIGP5AWBURST;
32607    input [3:0] SAXIGP5AWCACHE;
32608    input [5:0] SAXIGP5AWID;
32609    input [7:0] SAXIGP5AWLEN;
32610    input SAXIGP5AWLOCK;
32611    input [2:0] SAXIGP5AWPROT;
32612    input [3:0] SAXIGP5AWQOS;
32613    input [2:0] SAXIGP5AWSIZE;
32614    input SAXIGP5AWUSER;
32615    input SAXIGP5AWVALID;
32616    input SAXIGP5BREADY;
32617    input SAXIGP5RCLK;
32618    input SAXIGP5RREADY;
32619    input SAXIGP5WCLK;
32620    input [127:0] SAXIGP5WDATA;
32621    input SAXIGP5WLAST;
32622    input [15:0] SAXIGP5WSTRB;
32623    input SAXIGP5WVALID;
32624    input [48:0] SAXIGP6ARADDR;
32625    input [1:0] SAXIGP6ARBURST;
32626    input [3:0] SAXIGP6ARCACHE;
32627    input [5:0] SAXIGP6ARID;
32628    input [7:0] SAXIGP6ARLEN;
32629    input SAXIGP6ARLOCK;
32630    input [2:0] SAXIGP6ARPROT;
32631    input [3:0] SAXIGP6ARQOS;
32632    input [2:0] SAXIGP6ARSIZE;
32633    input SAXIGP6ARUSER;
32634    input SAXIGP6ARVALID;
32635    input [48:0] SAXIGP6AWADDR;
32636    input [1:0] SAXIGP6AWBURST;
32637    input [3:0] SAXIGP6AWCACHE;
32638    input [5:0] SAXIGP6AWID;
32639    input [7:0] SAXIGP6AWLEN;
32640    input SAXIGP6AWLOCK;
32641    input [2:0] SAXIGP6AWPROT;
32642    input [3:0] SAXIGP6AWQOS;
32643    input [2:0] SAXIGP6AWSIZE;
32644    input SAXIGP6AWUSER;
32645    input SAXIGP6AWVALID;
32646    input SAXIGP6BREADY;
32647    input SAXIGP6RCLK;
32648    input SAXIGP6RREADY;
32649    input SAXIGP6WCLK;
32650    input [127:0] SAXIGP6WDATA;
32651    input SAXIGP6WLAST;
32652    input [15:0] SAXIGP6WSTRB;
32653    input SAXIGP6WVALID;
32654    input [59:0] STMEVENT;
32655endmodule
32656
32657module ILKN (...);
32658    parameter BYPASS = "FALSE";
32659    parameter [1:0] CTL_RX_BURSTMAX = 2'h3;
32660    parameter [1:0] CTL_RX_CHAN_EXT = 2'h0;
32661    parameter [3:0] CTL_RX_LAST_LANE = 4'hB;
32662    parameter [15:0] CTL_RX_MFRAMELEN_MINUS1 = 16'h07FF;
32663    parameter CTL_RX_PACKET_MODE = "TRUE";
32664    parameter [2:0] CTL_RX_RETRANS_MULT = 3'h0;
32665    parameter [3:0] CTL_RX_RETRANS_RETRY = 4'h2;
32666    parameter [15:0] CTL_RX_RETRANS_TIMER1 = 16'h0000;
32667    parameter [15:0] CTL_RX_RETRANS_TIMER2 = 16'h0008;
32668    parameter [11:0] CTL_RX_RETRANS_WDOG = 12'h000;
32669    parameter [7:0] CTL_RX_RETRANS_WRAP_TIMER = 8'h00;
32670    parameter CTL_TEST_MODE_PIN_CHAR = "FALSE";
32671    parameter [1:0] CTL_TX_BURSTMAX = 2'h3;
32672    parameter [2:0] CTL_TX_BURSTSHORT = 3'h1;
32673    parameter [1:0] CTL_TX_CHAN_EXT = 2'h0;
32674    parameter CTL_TX_DISABLE_SKIPWORD = "TRUE";
32675    parameter [6:0] CTL_TX_FC_CALLEN = 7'h00;
32676    parameter [3:0] CTL_TX_LAST_LANE = 4'hB;
32677    parameter [15:0] CTL_TX_MFRAMELEN_MINUS1 = 16'h07FF;
32678    parameter [13:0] CTL_TX_RETRANS_DEPTH = 14'h0800;
32679    parameter [2:0] CTL_TX_RETRANS_MULT = 3'h0;
32680    parameter [1:0] CTL_TX_RETRANS_RAM_BANKS = 2'h3;
32681    parameter MODE = "TRUE";
32682    parameter SIM_VERSION = "2.0";
32683    parameter TEST_MODE_PIN_CHAR = "FALSE";
32684    output [15:0] DRP_DO;
32685    output DRP_RDY;
32686    output [65:0] RX_BYPASS_DATAOUT00;
32687    output [65:0] RX_BYPASS_DATAOUT01;
32688    output [65:0] RX_BYPASS_DATAOUT02;
32689    output [65:0] RX_BYPASS_DATAOUT03;
32690    output [65:0] RX_BYPASS_DATAOUT04;
32691    output [65:0] RX_BYPASS_DATAOUT05;
32692    output [65:0] RX_BYPASS_DATAOUT06;
32693    output [65:0] RX_BYPASS_DATAOUT07;
32694    output [65:0] RX_BYPASS_DATAOUT08;
32695    output [65:0] RX_BYPASS_DATAOUT09;
32696    output [65:0] RX_BYPASS_DATAOUT10;
32697    output [65:0] RX_BYPASS_DATAOUT11;
32698    output [11:0] RX_BYPASS_ENAOUT;
32699    output [11:0] RX_BYPASS_IS_AVAILOUT;
32700    output [11:0] RX_BYPASS_IS_BADLYFRAMEDOUT;
32701    output [11:0] RX_BYPASS_IS_OVERFLOWOUT;
32702    output [11:0] RX_BYPASS_IS_SYNCEDOUT;
32703    output [11:0] RX_BYPASS_IS_SYNCWORDOUT;
32704    output [10:0] RX_CHANOUT0;
32705    output [10:0] RX_CHANOUT1;
32706    output [10:0] RX_CHANOUT2;
32707    output [10:0] RX_CHANOUT3;
32708    output [127:0] RX_DATAOUT0;
32709    output [127:0] RX_DATAOUT1;
32710    output [127:0] RX_DATAOUT2;
32711    output [127:0] RX_DATAOUT3;
32712    output RX_ENAOUT0;
32713    output RX_ENAOUT1;
32714    output RX_ENAOUT2;
32715    output RX_ENAOUT3;
32716    output RX_EOPOUT0;
32717    output RX_EOPOUT1;
32718    output RX_EOPOUT2;
32719    output RX_EOPOUT3;
32720    output RX_ERROUT0;
32721    output RX_ERROUT1;
32722    output RX_ERROUT2;
32723    output RX_ERROUT3;
32724    output [3:0] RX_MTYOUT0;
32725    output [3:0] RX_MTYOUT1;
32726    output [3:0] RX_MTYOUT2;
32727    output [3:0] RX_MTYOUT3;
32728    output RX_OVFOUT;
32729    output RX_SOPOUT0;
32730    output RX_SOPOUT1;
32731    output RX_SOPOUT2;
32732    output RX_SOPOUT3;
32733    output STAT_RX_ALIGNED;
32734    output STAT_RX_ALIGNED_ERR;
32735    output [11:0] STAT_RX_BAD_TYPE_ERR;
32736    output STAT_RX_BURSTMAX_ERR;
32737    output STAT_RX_BURST_ERR;
32738    output STAT_RX_CRC24_ERR;
32739    output [11:0] STAT_RX_CRC32_ERR;
32740    output [11:0] STAT_RX_CRC32_VALID;
32741    output [11:0] STAT_RX_DESCRAM_ERR;
32742    output [11:0] STAT_RX_DIAGWORD_INTFSTAT;
32743    output [11:0] STAT_RX_DIAGWORD_LANESTAT;
32744    output [255:0] STAT_RX_FC_STAT;
32745    output [11:0] STAT_RX_FRAMING_ERR;
32746    output STAT_RX_MEOP_ERR;
32747    output [11:0] STAT_RX_MF_ERR;
32748    output [11:0] STAT_RX_MF_LEN_ERR;
32749    output [11:0] STAT_RX_MF_REPEAT_ERR;
32750    output STAT_RX_MISALIGNED;
32751    output STAT_RX_MSOP_ERR;
32752    output [7:0] STAT_RX_MUBITS;
32753    output STAT_RX_MUBITS_UPDATED;
32754    output STAT_RX_OVERFLOW_ERR;
32755    output STAT_RX_RETRANS_CRC24_ERR;
32756    output STAT_RX_RETRANS_DISC;
32757    output [15:0] STAT_RX_RETRANS_LATENCY;
32758    output STAT_RX_RETRANS_REQ;
32759    output STAT_RX_RETRANS_RETRY_ERR;
32760    output [7:0] STAT_RX_RETRANS_SEQ;
32761    output STAT_RX_RETRANS_SEQ_UPDATED;
32762    output [2:0] STAT_RX_RETRANS_STATE;
32763    output [4:0] STAT_RX_RETRANS_SUBSEQ;
32764    output STAT_RX_RETRANS_WDOG_ERR;
32765    output STAT_RX_RETRANS_WRAP_ERR;
32766    output [11:0] STAT_RX_SYNCED;
32767    output [11:0] STAT_RX_SYNCED_ERR;
32768    output [11:0] STAT_RX_WORD_SYNC;
32769    output STAT_TX_BURST_ERR;
32770    output STAT_TX_ERRINJ_BITERR_DONE;
32771    output STAT_TX_OVERFLOW_ERR;
32772    output STAT_TX_RETRANS_BURST_ERR;
32773    output STAT_TX_RETRANS_BUSY;
32774    output STAT_TX_RETRANS_RAM_PERROUT;
32775    output [8:0] STAT_TX_RETRANS_RAM_RADDR;
32776    output STAT_TX_RETRANS_RAM_RD_B0;
32777    output STAT_TX_RETRANS_RAM_RD_B1;
32778    output STAT_TX_RETRANS_RAM_RD_B2;
32779    output STAT_TX_RETRANS_RAM_RD_B3;
32780    output [1:0] STAT_TX_RETRANS_RAM_RSEL;
32781    output [8:0] STAT_TX_RETRANS_RAM_WADDR;
32782    output [643:0] STAT_TX_RETRANS_RAM_WDATA;
32783    output STAT_TX_RETRANS_RAM_WE_B0;
32784    output STAT_TX_RETRANS_RAM_WE_B1;
32785    output STAT_TX_RETRANS_RAM_WE_B2;
32786    output STAT_TX_RETRANS_RAM_WE_B3;
32787    output STAT_TX_UNDERFLOW_ERR;
32788    output TX_OVFOUT;
32789    output TX_RDYOUT;
32790    output [63:0] TX_SERDES_DATA00;
32791    output [63:0] TX_SERDES_DATA01;
32792    output [63:0] TX_SERDES_DATA02;
32793    output [63:0] TX_SERDES_DATA03;
32794    output [63:0] TX_SERDES_DATA04;
32795    output [63:0] TX_SERDES_DATA05;
32796    output [63:0] TX_SERDES_DATA06;
32797    output [63:0] TX_SERDES_DATA07;
32798    output [63:0] TX_SERDES_DATA08;
32799    output [63:0] TX_SERDES_DATA09;
32800    output [63:0] TX_SERDES_DATA10;
32801    output [63:0] TX_SERDES_DATA11;
32802    input CORE_CLK;
32803    input CTL_RX_FORCE_RESYNC;
32804    input CTL_RX_RETRANS_ACK;
32805    input CTL_RX_RETRANS_ENABLE;
32806    input CTL_RX_RETRANS_ERRIN;
32807    input CTL_RX_RETRANS_FORCE_REQ;
32808    input CTL_RX_RETRANS_RESET;
32809    input CTL_RX_RETRANS_RESET_MODE;
32810    input CTL_TX_DIAGWORD_INTFSTAT;
32811    input [11:0] CTL_TX_DIAGWORD_LANESTAT;
32812    input CTL_TX_ENABLE;
32813    input CTL_TX_ERRINJ_BITERR_GO;
32814    input [3:0] CTL_TX_ERRINJ_BITERR_LANE;
32815    input [255:0] CTL_TX_FC_STAT;
32816    input [7:0] CTL_TX_MUBITS;
32817    input CTL_TX_RETRANS_ENABLE;
32818    input CTL_TX_RETRANS_RAM_PERRIN;
32819    input [643:0] CTL_TX_RETRANS_RAM_RDATA;
32820    input CTL_TX_RETRANS_REQ;
32821    input CTL_TX_RETRANS_REQ_VALID;
32822    input [11:0] CTL_TX_RLIM_DELTA;
32823    input CTL_TX_RLIM_ENABLE;
32824    input [7:0] CTL_TX_RLIM_INTV;
32825    input [11:0] CTL_TX_RLIM_MAX;
32826    input [9:0] DRP_ADDR;
32827    input DRP_CLK;
32828    input [15:0] DRP_DI;
32829    input DRP_EN;
32830    input DRP_WE;
32831    input LBUS_CLK;
32832    input RX_BYPASS_FORCE_REALIGNIN;
32833    input RX_BYPASS_RDIN;
32834    input RX_RESET;
32835    input [11:0] RX_SERDES_CLK;
32836    input [63:0] RX_SERDES_DATA00;
32837    input [63:0] RX_SERDES_DATA01;
32838    input [63:0] RX_SERDES_DATA02;
32839    input [63:0] RX_SERDES_DATA03;
32840    input [63:0] RX_SERDES_DATA04;
32841    input [63:0] RX_SERDES_DATA05;
32842    input [63:0] RX_SERDES_DATA06;
32843    input [63:0] RX_SERDES_DATA07;
32844    input [63:0] RX_SERDES_DATA08;
32845    input [63:0] RX_SERDES_DATA09;
32846    input [63:0] RX_SERDES_DATA10;
32847    input [63:0] RX_SERDES_DATA11;
32848    input [11:0] RX_SERDES_RESET;
32849    input TX_BCTLIN0;
32850    input TX_BCTLIN1;
32851    input TX_BCTLIN2;
32852    input TX_BCTLIN3;
32853    input [11:0] TX_BYPASS_CTRLIN;
32854    input [63:0] TX_BYPASS_DATAIN00;
32855    input [63:0] TX_BYPASS_DATAIN01;
32856    input [63:0] TX_BYPASS_DATAIN02;
32857    input [63:0] TX_BYPASS_DATAIN03;
32858    input [63:0] TX_BYPASS_DATAIN04;
32859    input [63:0] TX_BYPASS_DATAIN05;
32860    input [63:0] TX_BYPASS_DATAIN06;
32861    input [63:0] TX_BYPASS_DATAIN07;
32862    input [63:0] TX_BYPASS_DATAIN08;
32863    input [63:0] TX_BYPASS_DATAIN09;
32864    input [63:0] TX_BYPASS_DATAIN10;
32865    input [63:0] TX_BYPASS_DATAIN11;
32866    input TX_BYPASS_ENAIN;
32867    input [7:0] TX_BYPASS_GEARBOX_SEQIN;
32868    input [3:0] TX_BYPASS_MFRAMER_STATEIN;
32869    input [10:0] TX_CHANIN0;
32870    input [10:0] TX_CHANIN1;
32871    input [10:0] TX_CHANIN2;
32872    input [10:0] TX_CHANIN3;
32873    input [127:0] TX_DATAIN0;
32874    input [127:0] TX_DATAIN1;
32875    input [127:0] TX_DATAIN2;
32876    input [127:0] TX_DATAIN3;
32877    input TX_ENAIN0;
32878    input TX_ENAIN1;
32879    input TX_ENAIN2;
32880    input TX_ENAIN3;
32881    input TX_EOPIN0;
32882    input TX_EOPIN1;
32883    input TX_EOPIN2;
32884    input TX_EOPIN3;
32885    input TX_ERRIN0;
32886    input TX_ERRIN1;
32887    input TX_ERRIN2;
32888    input TX_ERRIN3;
32889    input [3:0] TX_MTYIN0;
32890    input [3:0] TX_MTYIN1;
32891    input [3:0] TX_MTYIN2;
32892    input [3:0] TX_MTYIN3;
32893    input TX_RESET;
32894    input TX_SERDES_REFCLK;
32895    input TX_SERDES_REFCLK_RESET;
32896    input TX_SOPIN0;
32897    input TX_SOPIN1;
32898    input TX_SOPIN2;
32899    input TX_SOPIN3;
32900endmodule
32901
32902module ILKNE4 (...);
32903    parameter BYPASS = "FALSE";
32904    parameter [1:0] CTL_RX_BURSTMAX = 2'h3;
32905    parameter [1:0] CTL_RX_CHAN_EXT = 2'h0;
32906    parameter [3:0] CTL_RX_LAST_LANE = 4'hB;
32907    parameter [15:0] CTL_RX_MFRAMELEN_MINUS1 = 16'h07FF;
32908    parameter CTL_RX_PACKET_MODE = "FALSE";
32909    parameter [2:0] CTL_RX_RETRANS_MULT = 3'h0;
32910    parameter [3:0] CTL_RX_RETRANS_RETRY = 4'h2;
32911    parameter [15:0] CTL_RX_RETRANS_TIMER1 = 16'h0009;
32912    parameter [15:0] CTL_RX_RETRANS_TIMER2 = 16'h0000;
32913    parameter [11:0] CTL_RX_RETRANS_WDOG = 12'h000;
32914    parameter [7:0] CTL_RX_RETRANS_WRAP_TIMER = 8'h00;
32915    parameter CTL_TEST_MODE_PIN_CHAR = "FALSE";
32916    parameter [1:0] CTL_TX_BURSTMAX = 2'h3;
32917    parameter [2:0] CTL_TX_BURSTSHORT = 3'h1;
32918    parameter [1:0] CTL_TX_CHAN_EXT = 2'h0;
32919    parameter CTL_TX_DISABLE_SKIPWORD = "FALSE";
32920    parameter [3:0] CTL_TX_FC_CALLEN = 4'hF;
32921    parameter [3:0] CTL_TX_LAST_LANE = 4'hB;
32922    parameter [15:0] CTL_TX_MFRAMELEN_MINUS1 = 16'h07FF;
32923    parameter [13:0] CTL_TX_RETRANS_DEPTH = 14'h0800;
32924    parameter [2:0] CTL_TX_RETRANS_MULT = 3'h0;
32925    parameter [1:0] CTL_TX_RETRANS_RAM_BANKS = 2'h3;
32926    parameter MODE = "TRUE";
32927    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
32928    parameter TEST_MODE_PIN_CHAR = "FALSE";
32929    output [15:0] DRP_DO;
32930    output DRP_RDY;
32931    output [65:0] RX_BYPASS_DATAOUT00;
32932    output [65:0] RX_BYPASS_DATAOUT01;
32933    output [65:0] RX_BYPASS_DATAOUT02;
32934    output [65:0] RX_BYPASS_DATAOUT03;
32935    output [65:0] RX_BYPASS_DATAOUT04;
32936    output [65:0] RX_BYPASS_DATAOUT05;
32937    output [65:0] RX_BYPASS_DATAOUT06;
32938    output [65:0] RX_BYPASS_DATAOUT07;
32939    output [65:0] RX_BYPASS_DATAOUT08;
32940    output [65:0] RX_BYPASS_DATAOUT09;
32941    output [65:0] RX_BYPASS_DATAOUT10;
32942    output [65:0] RX_BYPASS_DATAOUT11;
32943    output [11:0] RX_BYPASS_ENAOUT;
32944    output [11:0] RX_BYPASS_IS_AVAILOUT;
32945    output [11:0] RX_BYPASS_IS_BADLYFRAMEDOUT;
32946    output [11:0] RX_BYPASS_IS_OVERFLOWOUT;
32947    output [11:0] RX_BYPASS_IS_SYNCEDOUT;
32948    output [11:0] RX_BYPASS_IS_SYNCWORDOUT;
32949    output [10:0] RX_CHANOUT0;
32950    output [10:0] RX_CHANOUT1;
32951    output [10:0] RX_CHANOUT2;
32952    output [10:0] RX_CHANOUT3;
32953    output [127:0] RX_DATAOUT0;
32954    output [127:0] RX_DATAOUT1;
32955    output [127:0] RX_DATAOUT2;
32956    output [127:0] RX_DATAOUT3;
32957    output RX_ENAOUT0;
32958    output RX_ENAOUT1;
32959    output RX_ENAOUT2;
32960    output RX_ENAOUT3;
32961    output RX_EOPOUT0;
32962    output RX_EOPOUT1;
32963    output RX_EOPOUT2;
32964    output RX_EOPOUT3;
32965    output RX_ERROUT0;
32966    output RX_ERROUT1;
32967    output RX_ERROUT2;
32968    output RX_ERROUT3;
32969    output [3:0] RX_MTYOUT0;
32970    output [3:0] RX_MTYOUT1;
32971    output [3:0] RX_MTYOUT2;
32972    output [3:0] RX_MTYOUT3;
32973    output RX_OVFOUT;
32974    output RX_SOPOUT0;
32975    output RX_SOPOUT1;
32976    output RX_SOPOUT2;
32977    output RX_SOPOUT3;
32978    output STAT_RX_ALIGNED;
32979    output STAT_RX_ALIGNED_ERR;
32980    output [11:0] STAT_RX_BAD_TYPE_ERR;
32981    output STAT_RX_BURSTMAX_ERR;
32982    output STAT_RX_BURST_ERR;
32983    output STAT_RX_CRC24_ERR;
32984    output [11:0] STAT_RX_CRC32_ERR;
32985    output [11:0] STAT_RX_CRC32_VALID;
32986    output [11:0] STAT_RX_DESCRAM_ERR;
32987    output [11:0] STAT_RX_DIAGWORD_INTFSTAT;
32988    output [11:0] STAT_RX_DIAGWORD_LANESTAT;
32989    output [255:0] STAT_RX_FC_STAT;
32990    output [11:0] STAT_RX_FRAMING_ERR;
32991    output STAT_RX_MEOP_ERR;
32992    output [11:0] STAT_RX_MF_ERR;
32993    output [11:0] STAT_RX_MF_LEN_ERR;
32994    output [11:0] STAT_RX_MF_REPEAT_ERR;
32995    output STAT_RX_MISALIGNED;
32996    output STAT_RX_MSOP_ERR;
32997    output [7:0] STAT_RX_MUBITS;
32998    output STAT_RX_MUBITS_UPDATED;
32999    output STAT_RX_OVERFLOW_ERR;
33000    output STAT_RX_RETRANS_CRC24_ERR;
33001    output STAT_RX_RETRANS_DISC;
33002    output [15:0] STAT_RX_RETRANS_LATENCY;
33003    output STAT_RX_RETRANS_REQ;
33004    output STAT_RX_RETRANS_RETRY_ERR;
33005    output [7:0] STAT_RX_RETRANS_SEQ;
33006    output STAT_RX_RETRANS_SEQ_UPDATED;
33007    output [2:0] STAT_RX_RETRANS_STATE;
33008    output [4:0] STAT_RX_RETRANS_SUBSEQ;
33009    output STAT_RX_RETRANS_WDOG_ERR;
33010    output STAT_RX_RETRANS_WRAP_ERR;
33011    output [11:0] STAT_RX_SYNCED;
33012    output [11:0] STAT_RX_SYNCED_ERR;
33013    output [11:0] STAT_RX_WORD_SYNC;
33014    output STAT_TX_BURST_ERR;
33015    output STAT_TX_ERRINJ_BITERR_DONE;
33016    output STAT_TX_OVERFLOW_ERR;
33017    output STAT_TX_RETRANS_BURST_ERR;
33018    output STAT_TX_RETRANS_BUSY;
33019    output STAT_TX_RETRANS_RAM_PERROUT;
33020    output [8:0] STAT_TX_RETRANS_RAM_RADDR;
33021    output STAT_TX_RETRANS_RAM_RD_B0;
33022    output STAT_TX_RETRANS_RAM_RD_B1;
33023    output STAT_TX_RETRANS_RAM_RD_B2;
33024    output STAT_TX_RETRANS_RAM_RD_B3;
33025    output [1:0] STAT_TX_RETRANS_RAM_RSEL;
33026    output [8:0] STAT_TX_RETRANS_RAM_WADDR;
33027    output [643:0] STAT_TX_RETRANS_RAM_WDATA;
33028    output STAT_TX_RETRANS_RAM_WE_B0;
33029    output STAT_TX_RETRANS_RAM_WE_B1;
33030    output STAT_TX_RETRANS_RAM_WE_B2;
33031    output STAT_TX_RETRANS_RAM_WE_B3;
33032    output STAT_TX_UNDERFLOW_ERR;
33033    output TX_OVFOUT;
33034    output TX_RDYOUT;
33035    output [63:0] TX_SERDES_DATA00;
33036    output [63:0] TX_SERDES_DATA01;
33037    output [63:0] TX_SERDES_DATA02;
33038    output [63:0] TX_SERDES_DATA03;
33039    output [63:0] TX_SERDES_DATA04;
33040    output [63:0] TX_SERDES_DATA05;
33041    output [63:0] TX_SERDES_DATA06;
33042    output [63:0] TX_SERDES_DATA07;
33043    output [63:0] TX_SERDES_DATA08;
33044    output [63:0] TX_SERDES_DATA09;
33045    output [63:0] TX_SERDES_DATA10;
33046    output [63:0] TX_SERDES_DATA11;
33047    input CORE_CLK;
33048    input CTL_RX_FORCE_RESYNC;
33049    input CTL_RX_RETRANS_ACK;
33050    input CTL_RX_RETRANS_ENABLE;
33051    input CTL_RX_RETRANS_ERRIN;
33052    input CTL_RX_RETRANS_FORCE_REQ;
33053    input CTL_RX_RETRANS_RESET;
33054    input CTL_RX_RETRANS_RESET_MODE;
33055    input CTL_TX_DIAGWORD_INTFSTAT;
33056    input [11:0] CTL_TX_DIAGWORD_LANESTAT;
33057    input CTL_TX_ENABLE;
33058    input CTL_TX_ERRINJ_BITERR_GO;
33059    input [3:0] CTL_TX_ERRINJ_BITERR_LANE;
33060    input [255:0] CTL_TX_FC_STAT;
33061    input [7:0] CTL_TX_MUBITS;
33062    input CTL_TX_RETRANS_ENABLE;
33063    input CTL_TX_RETRANS_RAM_PERRIN;
33064    input [643:0] CTL_TX_RETRANS_RAM_RDATA;
33065    input CTL_TX_RETRANS_REQ;
33066    input CTL_TX_RETRANS_REQ_VALID;
33067    input [11:0] CTL_TX_RLIM_DELTA;
33068    input CTL_TX_RLIM_ENABLE;
33069    input [7:0] CTL_TX_RLIM_INTV;
33070    input [11:0] CTL_TX_RLIM_MAX;
33071    input [9:0] DRP_ADDR;
33072    input DRP_CLK;
33073    input [15:0] DRP_DI;
33074    input DRP_EN;
33075    input DRP_WE;
33076    input LBUS_CLK;
33077    input RX_BYPASS_FORCE_REALIGNIN;
33078    input RX_BYPASS_RDIN;
33079    input RX_RESET;
33080    input [11:0] RX_SERDES_CLK;
33081    input [63:0] RX_SERDES_DATA00;
33082    input [63:0] RX_SERDES_DATA01;
33083    input [63:0] RX_SERDES_DATA02;
33084    input [63:0] RX_SERDES_DATA03;
33085    input [63:0] RX_SERDES_DATA04;
33086    input [63:0] RX_SERDES_DATA05;
33087    input [63:0] RX_SERDES_DATA06;
33088    input [63:0] RX_SERDES_DATA07;
33089    input [63:0] RX_SERDES_DATA08;
33090    input [63:0] RX_SERDES_DATA09;
33091    input [63:0] RX_SERDES_DATA10;
33092    input [63:0] RX_SERDES_DATA11;
33093    input [11:0] RX_SERDES_RESET;
33094    input TX_BCTLIN0;
33095    input TX_BCTLIN1;
33096    input TX_BCTLIN2;
33097    input TX_BCTLIN3;
33098    input [11:0] TX_BYPASS_CTRLIN;
33099    input [63:0] TX_BYPASS_DATAIN00;
33100    input [63:0] TX_BYPASS_DATAIN01;
33101    input [63:0] TX_BYPASS_DATAIN02;
33102    input [63:0] TX_BYPASS_DATAIN03;
33103    input [63:0] TX_BYPASS_DATAIN04;
33104    input [63:0] TX_BYPASS_DATAIN05;
33105    input [63:0] TX_BYPASS_DATAIN06;
33106    input [63:0] TX_BYPASS_DATAIN07;
33107    input [63:0] TX_BYPASS_DATAIN08;
33108    input [63:0] TX_BYPASS_DATAIN09;
33109    input [63:0] TX_BYPASS_DATAIN10;
33110    input [63:0] TX_BYPASS_DATAIN11;
33111    input TX_BYPASS_ENAIN;
33112    input [7:0] TX_BYPASS_GEARBOX_SEQIN;
33113    input [3:0] TX_BYPASS_MFRAMER_STATEIN;
33114    input [10:0] TX_CHANIN0;
33115    input [10:0] TX_CHANIN1;
33116    input [10:0] TX_CHANIN2;
33117    input [10:0] TX_CHANIN3;
33118    input [127:0] TX_DATAIN0;
33119    input [127:0] TX_DATAIN1;
33120    input [127:0] TX_DATAIN2;
33121    input [127:0] TX_DATAIN3;
33122    input TX_ENAIN0;
33123    input TX_ENAIN1;
33124    input TX_ENAIN2;
33125    input TX_ENAIN3;
33126    input TX_EOPIN0;
33127    input TX_EOPIN1;
33128    input TX_EOPIN2;
33129    input TX_EOPIN3;
33130    input TX_ERRIN0;
33131    input TX_ERRIN1;
33132    input TX_ERRIN2;
33133    input TX_ERRIN3;
33134    input [3:0] TX_MTYIN0;
33135    input [3:0] TX_MTYIN1;
33136    input [3:0] TX_MTYIN2;
33137    input [3:0] TX_MTYIN3;
33138    input TX_RESET;
33139    input TX_SERDES_REFCLK;
33140    input TX_SERDES_REFCLK_RESET;
33141    input TX_SOPIN0;
33142    input TX_SOPIN1;
33143    input TX_SOPIN2;
33144    input TX_SOPIN3;
33145endmodule
33146
33147(* keep *)
33148module VCU (...);
33149    parameter integer CORECLKREQ = 667;
33150    parameter integer DECHORRESOLUTION = 3840;
33151    parameter DECODERCHROMAFORMAT = "4_2_2";
33152    parameter DECODERCODING = "H.265";
33153    parameter integer DECODERCOLORDEPTH = 10;
33154    parameter integer DECODERNUMCORES = 2;
33155    parameter integer DECVERTRESOLUTION = 2160;
33156    parameter ENABLEDECODER = "TRUE";
33157    parameter ENABLEENCODER = "TRUE";
33158    parameter integer ENCHORRESOLUTION = 3840;
33159    parameter ENCODERCHROMAFORMAT = "4_2_2";
33160    parameter ENCODERCODING = "H.265";
33161    parameter integer ENCODERCOLORDEPTH = 10;
33162    parameter integer ENCODERNUMCORES = 4;
33163    parameter integer ENCVERTRESOLUTION = 2160;
33164    output VCUPLARREADYAXILITEAPB;
33165    output VCUPLAWREADYAXILITEAPB;
33166    output [1:0] VCUPLBRESPAXILITEAPB;
33167    output VCUPLBVALIDAXILITEAPB;
33168    output VCUPLCORESTATUSCLKPLL;
33169    output [43:0] VCUPLDECARADDR0;
33170    output [43:0] VCUPLDECARADDR1;
33171    output [1:0] VCUPLDECARBURST0;
33172    output [1:0] VCUPLDECARBURST1;
33173    output [3:0] VCUPLDECARCACHE0;
33174    output [3:0] VCUPLDECARCACHE1;
33175    output [3:0] VCUPLDECARID0;
33176    output [3:0] VCUPLDECARID1;
33177    output [7:0] VCUPLDECARLEN0;
33178    output [7:0] VCUPLDECARLEN1;
33179    output VCUPLDECARPROT0;
33180    output VCUPLDECARPROT1;
33181    output [3:0] VCUPLDECARQOS0;
33182    output [3:0] VCUPLDECARQOS1;
33183    output [2:0] VCUPLDECARSIZE0;
33184    output [2:0] VCUPLDECARSIZE1;
33185    output VCUPLDECARVALID0;
33186    output VCUPLDECARVALID1;
33187    output [43:0] VCUPLDECAWADDR0;
33188    output [43:0] VCUPLDECAWADDR1;
33189    output [1:0] VCUPLDECAWBURST0;
33190    output [1:0] VCUPLDECAWBURST1;
33191    output [3:0] VCUPLDECAWCACHE0;
33192    output [3:0] VCUPLDECAWCACHE1;
33193    output [3:0] VCUPLDECAWID0;
33194    output [3:0] VCUPLDECAWID1;
33195    output [7:0] VCUPLDECAWLEN0;
33196    output [7:0] VCUPLDECAWLEN1;
33197    output VCUPLDECAWPROT0;
33198    output VCUPLDECAWPROT1;
33199    output [3:0] VCUPLDECAWQOS0;
33200    output [3:0] VCUPLDECAWQOS1;
33201    output [2:0] VCUPLDECAWSIZE0;
33202    output [2:0] VCUPLDECAWSIZE1;
33203    output VCUPLDECAWVALID0;
33204    output VCUPLDECAWVALID1;
33205    output VCUPLDECBREADY0;
33206    output VCUPLDECBREADY1;
33207    output VCUPLDECRREADY0;
33208    output VCUPLDECRREADY1;
33209    output [127:0] VCUPLDECWDATA0;
33210    output [127:0] VCUPLDECWDATA1;
33211    output VCUPLDECWLAST0;
33212    output VCUPLDECWLAST1;
33213    output VCUPLDECWVALID0;
33214    output VCUPLDECWVALID1;
33215    output [16:0] VCUPLENCALL2CADDR;
33216    output VCUPLENCALL2CRVALID;
33217    output [319:0] VCUPLENCALL2CWDATA;
33218    output VCUPLENCALL2CWVALID;
33219    output [43:0] VCUPLENCARADDR0;
33220    output [43:0] VCUPLENCARADDR1;
33221    output [1:0] VCUPLENCARBURST0;
33222    output [1:0] VCUPLENCARBURST1;
33223    output [3:0] VCUPLENCARCACHE0;
33224    output [3:0] VCUPLENCARCACHE1;
33225    output [3:0] VCUPLENCARID0;
33226    output [3:0] VCUPLENCARID1;
33227    output [7:0] VCUPLENCARLEN0;
33228    output [7:0] VCUPLENCARLEN1;
33229    output VCUPLENCARPROT0;
33230    output VCUPLENCARPROT1;
33231    output [3:0] VCUPLENCARQOS0;
33232    output [3:0] VCUPLENCARQOS1;
33233    output [2:0] VCUPLENCARSIZE0;
33234    output [2:0] VCUPLENCARSIZE1;
33235    output VCUPLENCARVALID0;
33236    output VCUPLENCARVALID1;
33237    output [43:0] VCUPLENCAWADDR0;
33238    output [43:0] VCUPLENCAWADDR1;
33239    output [1:0] VCUPLENCAWBURST0;
33240    output [1:0] VCUPLENCAWBURST1;
33241    output [3:0] VCUPLENCAWCACHE0;
33242    output [3:0] VCUPLENCAWCACHE1;
33243    output [3:0] VCUPLENCAWID0;
33244    output [3:0] VCUPLENCAWID1;
33245    output [7:0] VCUPLENCAWLEN0;
33246    output [7:0] VCUPLENCAWLEN1;
33247    output VCUPLENCAWPROT0;
33248    output VCUPLENCAWPROT1;
33249    output [3:0] VCUPLENCAWQOS0;
33250    output [3:0] VCUPLENCAWQOS1;
33251    output [2:0] VCUPLENCAWSIZE0;
33252    output [2:0] VCUPLENCAWSIZE1;
33253    output VCUPLENCAWVALID0;
33254    output VCUPLENCAWVALID1;
33255    output VCUPLENCBREADY0;
33256    output VCUPLENCBREADY1;
33257    output VCUPLENCRREADY0;
33258    output VCUPLENCRREADY1;
33259    output [127:0] VCUPLENCWDATA0;
33260    output [127:0] VCUPLENCWDATA1;
33261    output VCUPLENCWLAST0;
33262    output VCUPLENCWLAST1;
33263    output VCUPLENCWVALID0;
33264    output VCUPLENCWVALID1;
33265    output [43:0] VCUPLMCUMAXIICDCARADDR;
33266    output [1:0] VCUPLMCUMAXIICDCARBURST;
33267    output [3:0] VCUPLMCUMAXIICDCARCACHE;
33268    output [2:0] VCUPLMCUMAXIICDCARID;
33269    output [7:0] VCUPLMCUMAXIICDCARLEN;
33270    output VCUPLMCUMAXIICDCARLOCK;
33271    output [2:0] VCUPLMCUMAXIICDCARPROT;
33272    output [3:0] VCUPLMCUMAXIICDCARQOS;
33273    output [2:0] VCUPLMCUMAXIICDCARSIZE;
33274    output VCUPLMCUMAXIICDCARVALID;
33275    output [43:0] VCUPLMCUMAXIICDCAWADDR;
33276    output [1:0] VCUPLMCUMAXIICDCAWBURST;
33277    output [3:0] VCUPLMCUMAXIICDCAWCACHE;
33278    output [2:0] VCUPLMCUMAXIICDCAWID;
33279    output [7:0] VCUPLMCUMAXIICDCAWLEN;
33280    output VCUPLMCUMAXIICDCAWLOCK;
33281    output [2:0] VCUPLMCUMAXIICDCAWPROT;
33282    output [3:0] VCUPLMCUMAXIICDCAWQOS;
33283    output [2:0] VCUPLMCUMAXIICDCAWSIZE;
33284    output VCUPLMCUMAXIICDCAWVALID;
33285    output VCUPLMCUMAXIICDCBREADY;
33286    output VCUPLMCUMAXIICDCRREADY;
33287    output [31:0] VCUPLMCUMAXIICDCWDATA;
33288    output VCUPLMCUMAXIICDCWLAST;
33289    output [3:0] VCUPLMCUMAXIICDCWSTRB;
33290    output VCUPLMCUMAXIICDCWVALID;
33291    output VCUPLMCUSTATUSCLKPLL;
33292    output VCUPLPINTREQ;
33293    output VCUPLPLLSTATUSPLLLOCK;
33294    output VCUPLPWRSUPPLYSTATUSVCCAUX;
33295    output VCUPLPWRSUPPLYSTATUSVCUINT;
33296    output [31:0] VCUPLRDATAAXILITEAPB;
33297    output [1:0] VCUPLRRESPAXILITEAPB;
33298    output VCUPLRVALIDAXILITEAPB;
33299    output VCUPLWREADYAXILITEAPB;
33300    input INITPLVCUGASKETCLAMPCONTROLLVLSHVCCINTD;
33301    input [19:0] PLVCUARADDRAXILITEAPB;
33302    input [2:0] PLVCUARPROTAXILITEAPB;
33303    input PLVCUARVALIDAXILITEAPB;
33304    input [19:0] PLVCUAWADDRAXILITEAPB;
33305    input [2:0] PLVCUAWPROTAXILITEAPB;
33306    input PLVCUAWVALIDAXILITEAPB;
33307    input PLVCUAXIDECCLK;
33308    input PLVCUAXIENCCLK;
33309    input PLVCUAXILITECLK;
33310    input PLVCUAXIMCUCLK;
33311    input PLVCUBREADYAXILITEAPB;
33312    input PLVCUCORECLK;
33313    input PLVCUDECARREADY0;
33314    input PLVCUDECARREADY1;
33315    input PLVCUDECAWREADY0;
33316    input PLVCUDECAWREADY1;
33317    input [3:0] PLVCUDECBID0;
33318    input [3:0] PLVCUDECBID1;
33319    input [1:0] PLVCUDECBRESP0;
33320    input [1:0] PLVCUDECBRESP1;
33321    input PLVCUDECBVALID0;
33322    input PLVCUDECBVALID1;
33323    input [127:0] PLVCUDECRDATA0;
33324    input [127:0] PLVCUDECRDATA1;
33325    input [3:0] PLVCUDECRID0;
33326    input [3:0] PLVCUDECRID1;
33327    input PLVCUDECRLAST0;
33328    input PLVCUDECRLAST1;
33329    input [1:0] PLVCUDECRRESP0;
33330    input [1:0] PLVCUDECRRESP1;
33331    input PLVCUDECRVALID0;
33332    input PLVCUDECRVALID1;
33333    input PLVCUDECWREADY0;
33334    input PLVCUDECWREADY1;
33335    input [319:0] PLVCUENCALL2CRDATA;
33336    input PLVCUENCALL2CRREADY;
33337    input PLVCUENCARREADY0;
33338    input PLVCUENCARREADY1;
33339    input PLVCUENCAWREADY0;
33340    input PLVCUENCAWREADY1;
33341    input [3:0] PLVCUENCBID0;
33342    input [3:0] PLVCUENCBID1;
33343    input [1:0] PLVCUENCBRESP0;
33344    input [1:0] PLVCUENCBRESP1;
33345    input PLVCUENCBVALID0;
33346    input PLVCUENCBVALID1;
33347    input PLVCUENCL2CCLK;
33348    input [127:0] PLVCUENCRDATA0;
33349    input [127:0] PLVCUENCRDATA1;
33350    input [3:0] PLVCUENCRID0;
33351    input [3:0] PLVCUENCRID1;
33352    input PLVCUENCRLAST0;
33353    input PLVCUENCRLAST1;
33354    input [1:0] PLVCUENCRRESP0;
33355    input [1:0] PLVCUENCRRESP1;
33356    input PLVCUENCRVALID0;
33357    input PLVCUENCRVALID1;
33358    input PLVCUENCWREADY0;
33359    input PLVCUENCWREADY1;
33360    input PLVCUMCUCLK;
33361    input PLVCUMCUMAXIICDCARREADY;
33362    input PLVCUMCUMAXIICDCAWREADY;
33363    input [2:0] PLVCUMCUMAXIICDCBID;
33364    input [1:0] PLVCUMCUMAXIICDCBRESP;
33365    input PLVCUMCUMAXIICDCBVALID;
33366    input [31:0] PLVCUMCUMAXIICDCRDATA;
33367    input [2:0] PLVCUMCUMAXIICDCRID;
33368    input PLVCUMCUMAXIICDCRLAST;
33369    input [1:0] PLVCUMCUMAXIICDCRRESP;
33370    input PLVCUMCUMAXIICDCRVALID;
33371    input PLVCUMCUMAXIICDCWREADY;
33372    input PLVCUPLLREFCLKPL;
33373    input PLVCURAWRSTN;
33374    input PLVCURREADYAXILITEAPB;
33375    input [31:0] PLVCUWDATAAXILITEAPB;
33376    input [3:0] PLVCUWSTRBAXILITEAPB;
33377    input PLVCUWVALIDAXILITEAPB;
33378endmodule
33379
33380module FE (...);
33381    parameter MODE = "TURBO_DECODE";
33382    parameter real PHYSICAL_UTILIZATION = 100.00;
33383    parameter SIM_DEVICE = "ULTRASCALE_PLUS";
33384    parameter STANDARD = "LTE";
33385    parameter real THROUGHPUT_UTILIZATION = 100.00;
33386    output [399:0] DEBUG_DOUT;
33387    output DEBUG_PHASE;
33388    output INTERRUPT;
33389    output [511:0] M_AXIS_DOUT_TDATA;
33390    output M_AXIS_DOUT_TLAST;
33391    output M_AXIS_DOUT_TVALID;
33392    output [31:0] M_AXIS_STATUS_TDATA;
33393    output M_AXIS_STATUS_TVALID;
33394    output [15:0] SPARE_OUT;
33395    output S_AXIS_CTRL_TREADY;
33396    output S_AXIS_DIN_TREADY;
33397    output S_AXIS_DIN_WORDS_TREADY;
33398    output S_AXIS_DOUT_WORDS_TREADY;
33399    output S_AXI_ARREADY;
33400    output S_AXI_AWREADY;
33401    output S_AXI_BVALID;
33402    output [31:0] S_AXI_RDATA;
33403    output S_AXI_RVALID;
33404    output S_AXI_WREADY;
33405    input CORE_CLK;
33406    input DEBUG_CLK_EN;
33407    input DEBUG_EN;
33408    input [3:0] DEBUG_SEL_IN;
33409    input M_AXIS_DOUT_ACLK;
33410    input M_AXIS_DOUT_TREADY;
33411    input M_AXIS_STATUS_ACLK;
33412    input M_AXIS_STATUS_TREADY;
33413    input RESET_N;
33414    input [15:0] SPARE_IN;
33415    input S_AXIS_CTRL_ACLK;
33416    input [31:0] S_AXIS_CTRL_TDATA;
33417    input S_AXIS_CTRL_TVALID;
33418    input S_AXIS_DIN_ACLK;
33419    input [511:0] S_AXIS_DIN_TDATA;
33420    input S_AXIS_DIN_TLAST;
33421    input S_AXIS_DIN_TVALID;
33422    input S_AXIS_DIN_WORDS_ACLK;
33423    input [31:0] S_AXIS_DIN_WORDS_TDATA;
33424    input S_AXIS_DIN_WORDS_TLAST;
33425    input S_AXIS_DIN_WORDS_TVALID;
33426    input S_AXIS_DOUT_WORDS_ACLK;
33427    input [31:0] S_AXIS_DOUT_WORDS_TDATA;
33428    input S_AXIS_DOUT_WORDS_TLAST;
33429    input S_AXIS_DOUT_WORDS_TVALID;
33430    input S_AXI_ACLK;
33431    input [17:0] S_AXI_ARADDR;
33432    input S_AXI_ARVALID;
33433    input [17:0] S_AXI_AWADDR;
33434    input S_AXI_AWVALID;
33435    input S_AXI_BREADY;
33436    input S_AXI_RREADY;
33437    input [31:0] S_AXI_WDATA;
33438    input S_AXI_WVALID;
33439endmodule
33440
33441