1 //
2 // Copyright 2018 Ettus Research, a National Instruments Company
3 //
4 // SPDX-License-Identifier: GPL-3.0-or-later
5 //
6 
7 #ifndef INCLUDED_E31X_DEFAULTS_HPP
8 #define INCLUDED_E31X_DEFAULTS_HPP
9 
10 #include "ad9361_ctrl.hpp"
11 
12 namespace mpm { namespace types { namespace e31x {
13 
14 using namespace uhd::usrp;
15 
16 class e31x_ad9361_client_t : public uhd::usrp::ad9361_params
17 {
18 public:
~e31x_ad9361_client_t()19     ~e31x_ad9361_client_t() {}
get_band_edge(frequency_band_t band)20     double get_band_edge(frequency_band_t band)
21     {
22         switch (band) {
23             case AD9361_RX_BAND0:
24                 return 1.2e9;
25             case AD9361_RX_BAND1:
26                 return 2.6e9;
27             case AD9361_TX_BAND0:
28                 return 2940.0e6;
29             default:
30                 return 0;
31         }
32     }
get_clocking_mode()33     clocking_mode_t get_clocking_mode()
34     {
35         return clocking_mode_t::AD9361_XTAL_N_CLK_PATH;
36     }
get_digital_interface_mode()37     digital_interface_mode_t get_digital_interface_mode()
38     {
39         return AD9361_DDR_FDD_LVCMOS;
40     }
get_digital_interface_timing()41     digital_interface_delays_t get_digital_interface_timing()
42     {
43         digital_interface_delays_t delays;
44         delays.rx_clk_delay  = 0;
45         delays.rx_data_delay = 0xF;
46         delays.tx_clk_delay  = 0;
47         delays.tx_data_delay = 0xF;
48         return delays;
49     }
50 };
51 
52 }}} // namespace mpm::types::e31x
53 
54 #endif // INCLUDED_E31X_DEFAULTS_HPP
55