1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */ 2 /* { dg-options "-O -msve-vector-bits=256 --save-temps" } */ 3 4 #include <stdint.h> 5 6 typedef uint32_t vnx4si __attribute__((vector_size (32))); 7 typedef float vnx4sf __attribute__((vector_size (32))); 8 9 #define MASK_2(X, Y) (X) ^ (Y), (X + 1) ^ (Y) 10 #define MASK_4(X, Y) MASK_2 (X, Y), MASK_2 (X + 2, Y) 11 #define MASK_8(X, Y) MASK_4 (X, Y), MASK_4 (X + 4, Y) 12 13 #define INDEX_8 vnx4si 14 15 #define PERMUTE(TYPE, NUNITS, REV_NUNITS) \ 16 TYPE permute_##TYPE##_##REV_NUNITS (TYPE values1, TYPE values2) \ 17 { \ 18 return __builtin_shuffle \ 19 (values1, values2, \ 20 ((INDEX_##NUNITS) { MASK_##NUNITS (0, REV_NUNITS - 1) })); \ 21 } 22 23 #define TEST_ALL(T) \ 24 T (vnx4si, 8, 2) \ 25 T (vnx4sf, 8, 2) 26 27 TEST_ALL (PERMUTE) 28 29 /* { dg-final { scan-assembler-not {\ttbl\t} } } */ 30 31 /* { dg-final { scan-assembler-times {\trevw\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d} 2 } } */ 32