1 /* { dg-do compile { target ia32 } } */
2 /* { dg-options "-O2 -msse2 -mtune=core2" } */
3 /* { dg-additional-options "-mno-vect8-ret-in-mem" { target *-*-vxworks* } } */
4 
5 #include <mmintrin.h>
6 
7 typedef __SIZE_TYPE__ size_t;
8 
9 __m64
unsigned_add3(const __m64 * a,const __m64 * b,size_t count)10 unsigned_add3 (const __m64 * a, const __m64 * b, size_t count)
11 {
12   __m64 sum = { 0, 0 };
13 
14   if (count > 0)
15     sum = _mm_add_si64 (a[count-1], b[count-1]);
16 
17   return sum;
18 }
19 
20 /* { dg-final { scan-assembler-times "movq\[ \\t\]+\[^\n\]*%mm" 1 } } */
21