1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2020 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "target.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "gimple.h"
28 #include "predict.h"
29 #include "memmodel.h"
30 #include "tm_p.h"
31 #include "ssa.h"
32 #include "expmed.h"
33 #include "optabs.h"
34 #include "regs.h"
35 #include "emit-rtl.h"
36 #include "recog.h"
37 #include "cgraph.h"
38 #include "diagnostic.h"
39 #include "alias.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
42 #include "attribs.h"
43 #include "varasm.h"
44 #include "except.h"
45 #include "insn-attr.h"
46 #include "dojump.h"
47 #include "explow.h"
48 #include "calls.h"
49 #include "stmt.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
51 #include "expr.h"
52 #include "optabs-tree.h"
53 #include "libfuncs.h"
54 #include "reload.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-dfa.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
61 #include "builtins.h"
62 #include "ccmp.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
65
66
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
73 int cse_not_expected;
74
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_pattern (rtx, rtx, rtx, unsigned, unsigned,
77 HOST_WIDE_INT, unsigned HOST_WIDE_INT,
78 unsigned HOST_WIDE_INT,
79 unsigned HOST_WIDE_INT, bool);
80 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
81 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
82 static rtx_insn *compress_float_constant (rtx, rtx);
83 static rtx get_subtarget (rtx);
84 static void store_constructor (tree, rtx, int, poly_int64, bool);
85 static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64,
86 machine_mode, tree, alias_set_type, bool, bool);
87
88 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
89
90 static int is_aligning_offset (const_tree, const_tree);
91 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
92 static rtx do_store_flag (sepops, rtx, machine_mode);
93 #ifdef PUSH_ROUNDING
94 static void emit_single_push_insn (machine_mode, rtx, tree);
95 #endif
96 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
97 profile_probability);
98 static rtx const_vector_from_tree (tree);
99 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree);
100 static tree tree_expr_size (const_tree);
101 static HOST_WIDE_INT int_expr_size (tree);
102 static void convert_mode_scalar (rtx, rtx, int);
103
104
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
108
109 void
init_expr_target(void)110 init_expr_target (void)
111 {
112 rtx pat;
113 int num_clobbers;
114 rtx mem, mem1;
115 rtx reg;
116
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
121 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
122
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
126
127 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
128 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
129 PATTERN (insn) = pat;
130
131 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
132 mode = (machine_mode) ((int) mode + 1))
133 {
134 int regno;
135
136 direct_load[(int) mode] = direct_store[(int) mode] = 0;
137 PUT_MODE (mem, mode);
138 PUT_MODE (mem1, mode);
139
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
142
143 if (mode != VOIDmode && mode != BLKmode)
144 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
145 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
146 regno++)
147 {
148 if (!targetm.hard_regno_mode_ok (regno, mode))
149 continue;
150
151 set_mode_and_regno (reg, mode, regno);
152
153 SET_SRC (pat) = mem;
154 SET_DEST (pat) = reg;
155 if (recog (pat, insn, &num_clobbers) >= 0)
156 direct_load[(int) mode] = 1;
157
158 SET_SRC (pat) = mem1;
159 SET_DEST (pat) = reg;
160 if (recog (pat, insn, &num_clobbers) >= 0)
161 direct_load[(int) mode] = 1;
162
163 SET_SRC (pat) = reg;
164 SET_DEST (pat) = mem;
165 if (recog (pat, insn, &num_clobbers) >= 0)
166 direct_store[(int) mode] = 1;
167
168 SET_SRC (pat) = reg;
169 SET_DEST (pat) = mem1;
170 if (recog (pat, insn, &num_clobbers) >= 0)
171 direct_store[(int) mode] = 1;
172 }
173 }
174
175 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
176
177 opt_scalar_float_mode mode_iter;
178 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
179 {
180 scalar_float_mode mode = mode_iter.require ();
181 scalar_float_mode srcmode;
182 FOR_EACH_MODE_UNTIL (srcmode, mode)
183 {
184 enum insn_code ic;
185
186 ic = can_extend_p (mode, srcmode, 0);
187 if (ic == CODE_FOR_nothing)
188 continue;
189
190 PUT_MODE (mem, srcmode);
191
192 if (insn_operand_matches (ic, 1, mem))
193 float_extend_from_mem[mode][srcmode] = true;
194 }
195 }
196 }
197
198 /* This is run at the start of compiling a function. */
199
200 void
init_expr(void)201 init_expr (void)
202 {
203 memset (&crtl->expr, 0, sizeof (crtl->expr));
204 }
205
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
208 fixed-point.
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
211
212 void
convert_move(rtx to,rtx from,int unsignedp)213 convert_move (rtx to, rtx from, int unsignedp)
214 {
215 machine_mode to_mode = GET_MODE (to);
216 machine_mode from_mode = GET_MODE (from);
217
218 gcc_assert (to_mode != BLKmode);
219 gcc_assert (from_mode != BLKmode);
220
221 /* If the source and destination are already the same, then there's
222 nothing to do. */
223 if (to == from)
224 return;
225
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
228 TO here. */
229
230 scalar_int_mode to_int_mode;
231 if (GET_CODE (from) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from)
233 && is_a <scalar_int_mode> (to_mode, &to_int_mode)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from))
235 >= GET_MODE_PRECISION (to_int_mode))
236 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
237 {
238 from = gen_lowpart (to_int_mode, SUBREG_REG (from));
239 from_mode = to_int_mode;
240 }
241
242 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
243
244 if (to_mode == from_mode
245 || (from_mode == VOIDmode && CONSTANT_P (from)))
246 {
247 emit_move_insn (to, from);
248 return;
249 }
250
251 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
252 {
253 if (GET_MODE_UNIT_PRECISION (to_mode)
254 > GET_MODE_UNIT_PRECISION (from_mode))
255 {
256 optab op = unsignedp ? zext_optab : sext_optab;
257 insn_code icode = convert_optab_handler (op, to_mode, from_mode);
258 if (icode != CODE_FOR_nothing)
259 {
260 emit_unop_insn (icode, to, from,
261 unsignedp ? ZERO_EXTEND : SIGN_EXTEND);
262 return;
263 }
264 }
265
266 if (GET_MODE_UNIT_PRECISION (to_mode)
267 < GET_MODE_UNIT_PRECISION (from_mode))
268 {
269 insn_code icode = convert_optab_handler (trunc_optab,
270 to_mode, from_mode);
271 if (icode != CODE_FOR_nothing)
272 {
273 emit_unop_insn (icode, to, from, TRUNCATE);
274 return;
275 }
276 }
277
278 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode),
279 GET_MODE_BITSIZE (to_mode)));
280
281 if (VECTOR_MODE_P (to_mode))
282 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
283 else
284 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
285
286 emit_move_insn (to, from);
287 return;
288 }
289
290 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
291 {
292 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
293 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
294 return;
295 }
296
297 convert_mode_scalar (to, from, unsignedp);
298 }
299
300 /* Like convert_move, but deals only with scalar modes. */
301
302 static void
convert_mode_scalar(rtx to,rtx from,int unsignedp)303 convert_mode_scalar (rtx to, rtx from, int unsignedp)
304 {
305 /* Both modes should be scalar types. */
306 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from));
307 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to));
308 bool to_real = SCALAR_FLOAT_MODE_P (to_mode);
309 bool from_real = SCALAR_FLOAT_MODE_P (from_mode);
310 enum insn_code code;
311 rtx libcall;
312
313 gcc_assert (to_real == from_real);
314
315 /* rtx code for making an equivalent value. */
316 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
317 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
318
319 if (to_real)
320 {
321 rtx value;
322 rtx_insn *insns;
323 convert_optab tab;
324
325 gcc_assert ((GET_MODE_PRECISION (from_mode)
326 != GET_MODE_PRECISION (to_mode))
327 || (DECIMAL_FLOAT_MODE_P (from_mode)
328 != DECIMAL_FLOAT_MODE_P (to_mode)));
329
330 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
331 /* Conversion between decimal float and binary float, same size. */
332 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
333 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
334 tab = sext_optab;
335 else
336 tab = trunc_optab;
337
338 /* Try converting directly if the insn is supported. */
339
340 code = convert_optab_handler (tab, to_mode, from_mode);
341 if (code != CODE_FOR_nothing)
342 {
343 emit_unop_insn (code, to, from,
344 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
345 return;
346 }
347
348 /* Otherwise use a libcall. */
349 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
350
351 /* Is this conversion implemented yet? */
352 gcc_assert (libcall);
353
354 start_sequence ();
355 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
356 from, from_mode);
357 insns = get_insns ();
358 end_sequence ();
359 emit_libcall_block (insns, to, value,
360 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
361 from)
362 : gen_rtx_FLOAT_EXTEND (to_mode, from));
363 return;
364 }
365
366 /* Handle pointer conversion. */ /* SPEE 900220. */
367 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
368 {
369 convert_optab ctab;
370
371 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
372 ctab = trunc_optab;
373 else if (unsignedp)
374 ctab = zext_optab;
375 else
376 ctab = sext_optab;
377
378 if (convert_optab_handler (ctab, to_mode, from_mode)
379 != CODE_FOR_nothing)
380 {
381 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
382 to, from, UNKNOWN);
383 return;
384 }
385 }
386
387 /* Targets are expected to provide conversion insns between PxImode and
388 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
389 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
390 {
391 scalar_int_mode full_mode
392 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
393
394 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
395 != CODE_FOR_nothing);
396
397 if (full_mode != from_mode)
398 from = convert_to_mode (full_mode, from, unsignedp);
399 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
400 to, from, UNKNOWN);
401 return;
402 }
403 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
404 {
405 rtx new_from;
406 scalar_int_mode full_mode
407 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
408 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
409 enum insn_code icode;
410
411 icode = convert_optab_handler (ctab, full_mode, from_mode);
412 gcc_assert (icode != CODE_FOR_nothing);
413
414 if (to_mode == full_mode)
415 {
416 emit_unop_insn (icode, to, from, UNKNOWN);
417 return;
418 }
419
420 new_from = gen_reg_rtx (full_mode);
421 emit_unop_insn (icode, new_from, from, UNKNOWN);
422
423 /* else proceed to integer conversions below. */
424 from_mode = full_mode;
425 from = new_from;
426 }
427
428 /* Make sure both are fixed-point modes or both are not. */
429 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
430 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
431 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
432 {
433 /* If we widen from_mode to to_mode and they are in the same class,
434 we won't saturate the result.
435 Otherwise, always saturate the result to play safe. */
436 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
437 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
438 expand_fixed_convert (to, from, 0, 0);
439 else
440 expand_fixed_convert (to, from, 0, 1);
441 return;
442 }
443
444 /* Now both modes are integers. */
445
446 /* Handle expanding beyond a word. */
447 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
448 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
449 {
450 rtx_insn *insns;
451 rtx lowpart;
452 rtx fill_value;
453 rtx lowfrom;
454 int i;
455 scalar_mode lowpart_mode;
456 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
457
458 /* Try converting directly if the insn is supported. */
459 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
460 != CODE_FOR_nothing)
461 {
462 /* If FROM is a SUBREG, put it into a register. Do this
463 so that we always generate the same set of insns for
464 better cse'ing; if an intermediate assignment occurred,
465 we won't be doing the operation directly on the SUBREG. */
466 if (optimize > 0 && GET_CODE (from) == SUBREG)
467 from = force_reg (from_mode, from);
468 emit_unop_insn (code, to, from, equiv_code);
469 return;
470 }
471 /* Next, try converting via full word. */
472 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
473 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
474 != CODE_FOR_nothing))
475 {
476 rtx word_to = gen_reg_rtx (word_mode);
477 if (REG_P (to))
478 {
479 if (reg_overlap_mentioned_p (to, from))
480 from = force_reg (from_mode, from);
481 emit_clobber (to);
482 }
483 convert_move (word_to, from, unsignedp);
484 emit_unop_insn (code, to, word_to, equiv_code);
485 return;
486 }
487
488 /* No special multiword conversion insn; do it by hand. */
489 start_sequence ();
490
491 /* Since we will turn this into a no conflict block, we must ensure
492 the source does not overlap the target so force it into an isolated
493 register when maybe so. Likewise for any MEM input, since the
494 conversion sequence might require several references to it and we
495 must ensure we're getting the same value every time. */
496
497 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
498 from = force_reg (from_mode, from);
499
500 /* Get a copy of FROM widened to a word, if necessary. */
501 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
502 lowpart_mode = word_mode;
503 else
504 lowpart_mode = from_mode;
505
506 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
507
508 lowpart = gen_lowpart (lowpart_mode, to);
509 emit_move_insn (lowpart, lowfrom);
510
511 /* Compute the value to put in each remaining word. */
512 if (unsignedp)
513 fill_value = const0_rtx;
514 else
515 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
516 LT, lowfrom, const0_rtx,
517 lowpart_mode, 0, -1);
518
519 /* Fill the remaining words. */
520 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
521 {
522 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
523 rtx subword = operand_subword (to, index, 1, to_mode);
524
525 gcc_assert (subword);
526
527 if (fill_value != subword)
528 emit_move_insn (subword, fill_value);
529 }
530
531 insns = get_insns ();
532 end_sequence ();
533
534 emit_insn (insns);
535 return;
536 }
537
538 /* Truncating multi-word to a word or less. */
539 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
540 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
541 {
542 if (!((MEM_P (from)
543 && ! MEM_VOLATILE_P (from)
544 && direct_load[(int) to_mode]
545 && ! mode_dependent_address_p (XEXP (from, 0),
546 MEM_ADDR_SPACE (from)))
547 || REG_P (from)
548 || GET_CODE (from) == SUBREG))
549 from = force_reg (from_mode, from);
550 convert_move (to, gen_lowpart (word_mode, from), 0);
551 return;
552 }
553
554 /* Now follow all the conversions between integers
555 no more than a word long. */
556
557 /* For truncation, usually we can just refer to FROM in a narrower mode. */
558 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
559 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
560 {
561 if (!((MEM_P (from)
562 && ! MEM_VOLATILE_P (from)
563 && direct_load[(int) to_mode]
564 && ! mode_dependent_address_p (XEXP (from, 0),
565 MEM_ADDR_SPACE (from)))
566 || REG_P (from)
567 || GET_CODE (from) == SUBREG))
568 from = force_reg (from_mode, from);
569 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
570 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode))
571 from = copy_to_reg (from);
572 emit_move_insn (to, gen_lowpart (to_mode, from));
573 return;
574 }
575
576 /* Handle extension. */
577 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
578 {
579 /* Convert directly if that works. */
580 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
581 != CODE_FOR_nothing)
582 {
583 emit_unop_insn (code, to, from, equiv_code);
584 return;
585 }
586 else
587 {
588 rtx tmp;
589 int shift_amount;
590
591 /* Search for a mode to convert via. */
592 opt_scalar_mode intermediate_iter;
593 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)
594 {
595 scalar_mode intermediate = intermediate_iter.require ();
596 if (((can_extend_p (to_mode, intermediate, unsignedp)
597 != CODE_FOR_nothing)
598 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
599 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,
600 intermediate)))
601 && (can_extend_p (intermediate, from_mode, unsignedp)
602 != CODE_FOR_nothing))
603 {
604 convert_move (to, convert_to_mode (intermediate, from,
605 unsignedp), unsignedp);
606 return;
607 }
608 }
609
610 /* No suitable intermediate mode.
611 Generate what we need with shifts. */
612 shift_amount = (GET_MODE_PRECISION (to_mode)
613 - GET_MODE_PRECISION (from_mode));
614 from = gen_lowpart (to_mode, force_reg (from_mode, from));
615 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
616 to, unsignedp);
617 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
618 to, unsignedp);
619 if (tmp != to)
620 emit_move_insn (to, tmp);
621 return;
622 }
623 }
624
625 /* Support special truncate insns for certain modes. */
626 if (convert_optab_handler (trunc_optab, to_mode,
627 from_mode) != CODE_FOR_nothing)
628 {
629 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
630 to, from, UNKNOWN);
631 return;
632 }
633
634 /* Handle truncation of volatile memrefs, and so on;
635 the things that couldn't be truncated directly,
636 and for which there was no special instruction.
637
638 ??? Code above formerly short-circuited this, for most integer
639 mode pairs, with a force_reg in from_mode followed by a recursive
640 call to this routine. Appears always to have been wrong. */
641 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
642 {
643 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
644 emit_move_insn (to, temp);
645 return;
646 }
647
648 /* Mode combination is not recognized. */
649 gcc_unreachable ();
650 }
651
652 /* Return an rtx for a value that would result
653 from converting X to mode MODE.
654 Both X and MODE may be floating, or both integer.
655 UNSIGNEDP is nonzero if X is an unsigned value.
656 This can be done by referring to a part of X in place
657 or by copying to a new temporary with conversion. */
658
659 rtx
convert_to_mode(machine_mode mode,rtx x,int unsignedp)660 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
661 {
662 return convert_modes (mode, VOIDmode, x, unsignedp);
663 }
664
665 /* Return an rtx for a value that would result
666 from converting X from mode OLDMODE to mode MODE.
667 Both modes may be floating, or both integer.
668 UNSIGNEDP is nonzero if X is an unsigned value.
669
670 This can be done by referring to a part of X in place
671 or by copying to a new temporary with conversion.
672
673 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
674
675 rtx
convert_modes(machine_mode mode,machine_mode oldmode,rtx x,int unsignedp)676 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
677 {
678 rtx temp;
679 scalar_int_mode int_mode;
680
681 /* If FROM is a SUBREG that indicates that we have already done at least
682 the required extension, strip it. */
683
684 if (GET_CODE (x) == SUBREG
685 && SUBREG_PROMOTED_VAR_P (x)
686 && is_a <scalar_int_mode> (mode, &int_mode)
687 && (GET_MODE_PRECISION (subreg_promoted_mode (x))
688 >= GET_MODE_PRECISION (int_mode))
689 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
690 x = gen_lowpart (int_mode, SUBREG_REG (x));
691
692 if (GET_MODE (x) != VOIDmode)
693 oldmode = GET_MODE (x);
694
695 if (mode == oldmode)
696 return x;
697
698 if (CONST_SCALAR_INT_P (x)
699 && is_int_mode (mode, &int_mode))
700 {
701 /* If the caller did not tell us the old mode, then there is not
702 much to do with respect to canonicalization. We have to
703 assume that all the bits are significant. */
704 if (GET_MODE_CLASS (oldmode) != MODE_INT)
705 oldmode = MAX_MODE_INT;
706 wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
707 GET_MODE_PRECISION (int_mode),
708 unsignedp ? UNSIGNED : SIGNED);
709 return immed_wide_int_const (w, int_mode);
710 }
711
712 /* We can do this with a gen_lowpart if both desired and current modes
713 are integer, and this is either a constant integer, a register, or a
714 non-volatile MEM. */
715 scalar_int_mode int_oldmode;
716 if (is_int_mode (mode, &int_mode)
717 && is_int_mode (oldmode, &int_oldmode)
718 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
719 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode])
720 || CONST_POLY_INT_P (x)
721 || (REG_P (x)
722 && (!HARD_REGISTER_P (x)
723 || targetm.hard_regno_mode_ok (REGNO (x), int_mode))
724 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x)))))
725 return gen_lowpart (int_mode, x);
726
727 /* Converting from integer constant into mode is always equivalent to an
728 subreg operation. */
729 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
730 {
731 gcc_assert (known_eq (GET_MODE_BITSIZE (mode),
732 GET_MODE_BITSIZE (oldmode)));
733 return simplify_gen_subreg (mode, x, oldmode, 0);
734 }
735
736 temp = gen_reg_rtx (mode);
737 convert_move (temp, x, unsignedp);
738 return temp;
739 }
740
741 /* Return the largest alignment we can use for doing a move (or store)
742 of MAX_PIECES. ALIGN is the largest alignment we could use. */
743
744 static unsigned int
alignment_for_piecewise_move(unsigned int max_pieces,unsigned int align)745 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
746 {
747 scalar_int_mode tmode
748 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require ();
749
750 if (align >= GET_MODE_ALIGNMENT (tmode))
751 align = GET_MODE_ALIGNMENT (tmode);
752 else
753 {
754 scalar_int_mode xmode = NARROWEST_INT_MODE;
755 opt_scalar_int_mode mode_iter;
756 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
757 {
758 tmode = mode_iter.require ();
759 if (GET_MODE_SIZE (tmode) > max_pieces
760 || targetm.slow_unaligned_access (tmode, align))
761 break;
762 xmode = tmode;
763 }
764
765 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
766 }
767
768 return align;
769 }
770
771 /* Return the widest integer mode that is narrower than SIZE bytes. */
772
773 static scalar_int_mode
widest_int_mode_for_size(unsigned int size)774 widest_int_mode_for_size (unsigned int size)
775 {
776 scalar_int_mode result = NARROWEST_INT_MODE;
777
778 gcc_checking_assert (size > 1);
779
780 opt_scalar_int_mode tmode;
781 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)
782 if (GET_MODE_SIZE (tmode.require ()) < size)
783 result = tmode.require ();
784
785 return result;
786 }
787
788 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
789 and should be performed piecewise. */
790
791 static bool
can_do_by_pieces(unsigned HOST_WIDE_INT len,unsigned int align,enum by_pieces_operation op)792 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align,
793 enum by_pieces_operation op)
794 {
795 return targetm.use_by_pieces_infrastructure_p (len, align, op,
796 optimize_insn_for_speed_p ());
797 }
798
799 /* Determine whether the LEN bytes can be moved by using several move
800 instructions. Return nonzero if a call to move_by_pieces should
801 succeed. */
802
803 bool
can_move_by_pieces(unsigned HOST_WIDE_INT len,unsigned int align)804 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align)
805 {
806 return can_do_by_pieces (len, align, MOVE_BY_PIECES);
807 }
808
809 /* Return number of insns required to perform operation OP by pieces
810 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
811
812 unsigned HOST_WIDE_INT
by_pieces_ninsns(unsigned HOST_WIDE_INT l,unsigned int align,unsigned int max_size,by_pieces_operation op)813 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
814 unsigned int max_size, by_pieces_operation op)
815 {
816 unsigned HOST_WIDE_INT n_insns = 0;
817
818 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
819
820 while (max_size > 1 && l > 0)
821 {
822 scalar_int_mode mode = widest_int_mode_for_size (max_size);
823 enum insn_code icode;
824
825 unsigned int modesize = GET_MODE_SIZE (mode);
826
827 icode = optab_handler (mov_optab, mode);
828 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
829 {
830 unsigned HOST_WIDE_INT n_pieces = l / modesize;
831 l %= modesize;
832 switch (op)
833 {
834 default:
835 n_insns += n_pieces;
836 break;
837
838 case COMPARE_BY_PIECES:
839 int batch = targetm.compare_by_pieces_branch_ratio (mode);
840 int batch_ops = 4 * batch - 1;
841 unsigned HOST_WIDE_INT full = n_pieces / batch;
842 n_insns += full * batch_ops;
843 if (n_pieces % batch != 0)
844 n_insns++;
845 break;
846
847 }
848 }
849 max_size = modesize;
850 }
851
852 gcc_assert (!l);
853 return n_insns;
854 }
855
856 /* Used when performing piecewise block operations, holds information
857 about one of the memory objects involved. The member functions
858 can be used to generate code for loading from the object and
859 updating the address when iterating. */
860
861 class pieces_addr
862 {
863 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
864 stack pushes. */
865 rtx m_obj;
866 /* The address of the object. Can differ from that seen in the
867 MEM rtx if we copied the address to a register. */
868 rtx m_addr;
869 /* Nonzero if the address on the object has an autoincrement already,
870 signifies whether that was an increment or decrement. */
871 signed char m_addr_inc;
872 /* Nonzero if we intend to use autoinc without the address already
873 having autoinc form. We will insert add insns around each memory
874 reference, expecting later passes to form autoinc addressing modes.
875 The only supported options are predecrement and postincrement. */
876 signed char m_explicit_inc;
877 /* True if we have either of the two possible cases of using
878 autoincrement. */
879 bool m_auto;
880 /* True if this is an address to be used for load operations rather
881 than stores. */
882 bool m_is_load;
883
884 /* Optionally, a function to obtain constants for any given offset into
885 the objects, and data associated with it. */
886 by_pieces_constfn m_constfn;
887 void *m_cfndata;
888 public:
889 pieces_addr (rtx, bool, by_pieces_constfn, void *);
890 rtx adjust (scalar_int_mode, HOST_WIDE_INT);
891 void increment_address (HOST_WIDE_INT);
892 void maybe_predec (HOST_WIDE_INT);
893 void maybe_postinc (HOST_WIDE_INT);
894 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT);
get_addr_inc()895 int get_addr_inc ()
896 {
897 return m_addr_inc;
898 }
899 };
900
901 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
902 true if the operation to be performed on this object is a load
903 rather than a store. For stores, OBJ can be NULL, in which case we
904 assume the operation is a stack push. For loads, the optional
905 CONSTFN and its associated CFNDATA can be used in place of the
906 memory load. */
907
pieces_addr(rtx obj,bool is_load,by_pieces_constfn constfn,void * cfndata)908 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
909 void *cfndata)
910 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
911 {
912 m_addr_inc = 0;
913 m_auto = false;
914 if (obj)
915 {
916 rtx addr = XEXP (obj, 0);
917 rtx_code code = GET_CODE (addr);
918 m_addr = addr;
919 bool dec = code == PRE_DEC || code == POST_DEC;
920 bool inc = code == PRE_INC || code == POST_INC;
921 m_auto = inc || dec;
922 if (m_auto)
923 m_addr_inc = dec ? -1 : 1;
924
925 /* While we have always looked for these codes here, the code
926 implementing the memory operation has never handled them.
927 Support could be added later if necessary or beneficial. */
928 gcc_assert (code != PRE_INC && code != POST_DEC);
929 }
930 else
931 {
932 m_addr = NULL_RTX;
933 if (!is_load)
934 {
935 m_auto = true;
936 if (STACK_GROWS_DOWNWARD)
937 m_addr_inc = -1;
938 else
939 m_addr_inc = 1;
940 }
941 else
942 gcc_assert (constfn != NULL);
943 }
944 m_explicit_inc = 0;
945 if (constfn)
946 gcc_assert (is_load);
947 }
948
949 /* Decide whether to use autoinc for an address involved in a memory op.
950 MODE is the mode of the accesses, REVERSE is true if we've decided to
951 perform the operation starting from the end, and LEN is the length of
952 the operation. Don't override an earlier decision to set m_auto. */
953
954 void
decide_autoinc(machine_mode ARG_UNUSED (mode),bool reverse,HOST_WIDE_INT len)955 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse,
956 HOST_WIDE_INT len)
957 {
958 if (m_auto || m_obj == NULL_RTX)
959 return;
960
961 bool use_predec = (m_is_load
962 ? USE_LOAD_PRE_DECREMENT (mode)
963 : USE_STORE_PRE_DECREMENT (mode));
964 bool use_postinc = (m_is_load
965 ? USE_LOAD_POST_INCREMENT (mode)
966 : USE_STORE_POST_INCREMENT (mode));
967 machine_mode addr_mode = get_address_mode (m_obj);
968
969 if (use_predec && reverse)
970 {
971 m_addr = copy_to_mode_reg (addr_mode,
972 plus_constant (addr_mode,
973 m_addr, len));
974 m_auto = true;
975 m_explicit_inc = -1;
976 }
977 else if (use_postinc && !reverse)
978 {
979 m_addr = copy_to_mode_reg (addr_mode, m_addr);
980 m_auto = true;
981 m_explicit_inc = 1;
982 }
983 else if (CONSTANT_P (m_addr))
984 m_addr = copy_to_mode_reg (addr_mode, m_addr);
985 }
986
987 /* Adjust the address to refer to the data at OFFSET in MODE. If we
988 are using autoincrement for this address, we don't add the offset,
989 but we still modify the MEM's properties. */
990
991 rtx
adjust(scalar_int_mode mode,HOST_WIDE_INT offset)992 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset)
993 {
994 if (m_constfn)
995 return m_constfn (m_cfndata, offset, mode);
996 if (m_obj == NULL_RTX)
997 return NULL_RTX;
998 if (m_auto)
999 return adjust_automodify_address (m_obj, mode, m_addr, offset);
1000 else
1001 return adjust_address (m_obj, mode, offset);
1002 }
1003
1004 /* Emit an add instruction to increment the address by SIZE. */
1005
1006 void
increment_address(HOST_WIDE_INT size)1007 pieces_addr::increment_address (HOST_WIDE_INT size)
1008 {
1009 rtx amount = gen_int_mode (size, GET_MODE (m_addr));
1010 emit_insn (gen_add2_insn (m_addr, amount));
1011 }
1012
1013 /* If we are supposed to decrement the address after each access, emit code
1014 to do so now. Increment by SIZE (which has should have the correct sign
1015 already). */
1016
1017 void
maybe_predec(HOST_WIDE_INT size)1018 pieces_addr::maybe_predec (HOST_WIDE_INT size)
1019 {
1020 if (m_explicit_inc >= 0)
1021 return;
1022 gcc_assert (HAVE_PRE_DECREMENT);
1023 increment_address (size);
1024 }
1025
1026 /* If we are supposed to decrement the address after each access, emit code
1027 to do so now. Increment by SIZE. */
1028
1029 void
maybe_postinc(HOST_WIDE_INT size)1030 pieces_addr::maybe_postinc (HOST_WIDE_INT size)
1031 {
1032 if (m_explicit_inc <= 0)
1033 return;
1034 gcc_assert (HAVE_POST_INCREMENT);
1035 increment_address (size);
1036 }
1037
1038 /* This structure is used by do_op_by_pieces to describe the operation
1039 to be performed. */
1040
1041 class op_by_pieces_d
1042 {
1043 protected:
1044 pieces_addr m_to, m_from;
1045 unsigned HOST_WIDE_INT m_len;
1046 HOST_WIDE_INT m_offset;
1047 unsigned int m_align;
1048 unsigned int m_max_size;
1049 bool m_reverse;
1050
1051 /* Virtual functions, overriden by derived classes for the specific
1052 operation. */
1053 virtual void generate (rtx, rtx, machine_mode) = 0;
1054 virtual bool prepare_mode (machine_mode, unsigned int) = 0;
finish_mode(machine_mode)1055 virtual void finish_mode (machine_mode)
1056 {
1057 }
1058
1059 public:
1060 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *,
1061 unsigned HOST_WIDE_INT, unsigned int);
1062 void run ();
1063 };
1064
1065 /* The constructor for an op_by_pieces_d structure. We require two
1066 objects named TO and FROM, which are identified as loads or stores
1067 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1068 and its associated FROM_CFN_DATA can be used to replace loads with
1069 constant values. LEN describes the length of the operation. */
1070
op_by_pieces_d(rtx to,bool to_load,rtx from,bool from_load,by_pieces_constfn from_cfn,void * from_cfn_data,unsigned HOST_WIDE_INT len,unsigned int align)1071 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
1072 rtx from, bool from_load,
1073 by_pieces_constfn from_cfn,
1074 void *from_cfn_data,
1075 unsigned HOST_WIDE_INT len,
1076 unsigned int align)
1077 : m_to (to, to_load, NULL, NULL),
1078 m_from (from, from_load, from_cfn, from_cfn_data),
1079 m_len (len), m_max_size (MOVE_MAX_PIECES + 1)
1080 {
1081 int toi = m_to.get_addr_inc ();
1082 int fromi = m_from.get_addr_inc ();
1083 if (toi >= 0 && fromi >= 0)
1084 m_reverse = false;
1085 else if (toi <= 0 && fromi <= 0)
1086 m_reverse = true;
1087 else
1088 gcc_unreachable ();
1089
1090 m_offset = m_reverse ? len : 0;
1091 align = MIN (to ? MEM_ALIGN (to) : align,
1092 from ? MEM_ALIGN (from) : align);
1093
1094 /* If copying requires more than two move insns,
1095 copy addresses to registers (to make displacements shorter)
1096 and use post-increment if available. */
1097 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
1098 {
1099 /* Find the mode of the largest comparison. */
1100 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1101
1102 m_from.decide_autoinc (mode, m_reverse, len);
1103 m_to.decide_autoinc (mode, m_reverse, len);
1104 }
1105
1106 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1107 m_align = align;
1108 }
1109
1110 /* This function contains the main loop used for expanding a block
1111 operation. First move what we can in the largest integer mode,
1112 then go to successively smaller modes. For every access, call
1113 GENFUN with the two operands and the EXTRA_DATA. */
1114
1115 void
run()1116 op_by_pieces_d::run ()
1117 {
1118 while (m_max_size > 1 && m_len > 0)
1119 {
1120 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1121
1122 if (prepare_mode (mode, m_align))
1123 {
1124 unsigned int size = GET_MODE_SIZE (mode);
1125 rtx to1 = NULL_RTX, from1;
1126
1127 while (m_len >= size)
1128 {
1129 if (m_reverse)
1130 m_offset -= size;
1131
1132 to1 = m_to.adjust (mode, m_offset);
1133 from1 = m_from.adjust (mode, m_offset);
1134
1135 m_to.maybe_predec (-(HOST_WIDE_INT)size);
1136 m_from.maybe_predec (-(HOST_WIDE_INT)size);
1137
1138 generate (to1, from1, mode);
1139
1140 m_to.maybe_postinc (size);
1141 m_from.maybe_postinc (size);
1142
1143 if (!m_reverse)
1144 m_offset += size;
1145
1146 m_len -= size;
1147 }
1148
1149 finish_mode (mode);
1150 }
1151
1152 m_max_size = GET_MODE_SIZE (mode);
1153 }
1154
1155 /* The code above should have handled everything. */
1156 gcc_assert (!m_len);
1157 }
1158
1159 /* Derived class from op_by_pieces_d, providing support for block move
1160 operations. */
1161
1162 class move_by_pieces_d : public op_by_pieces_d
1163 {
1164 insn_gen_fn m_gen_fun;
1165 void generate (rtx, rtx, machine_mode);
1166 bool prepare_mode (machine_mode, unsigned int);
1167
1168 public:
move_by_pieces_d(rtx to,rtx from,unsigned HOST_WIDE_INT len,unsigned int align)1169 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1170 unsigned int align)
1171 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align)
1172 {
1173 }
1174 rtx finish_retmode (memop_ret);
1175 };
1176
1177 /* Return true if MODE can be used for a set of copies, given an
1178 alignment ALIGN. Prepare whatever data is necessary for later
1179 calls to generate. */
1180
1181 bool
prepare_mode(machine_mode mode,unsigned int align)1182 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1183 {
1184 insn_code icode = optab_handler (mov_optab, mode);
1185 m_gen_fun = GEN_FCN (icode);
1186 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1187 }
1188
1189 /* A callback used when iterating for a compare_by_pieces_operation.
1190 OP0 and OP1 are the values that have been loaded and should be
1191 compared in MODE. If OP0 is NULL, this means we should generate a
1192 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1193 gen function that should be used to generate the mode. */
1194
1195 void
generate(rtx op0,rtx op1,machine_mode mode ATTRIBUTE_UNUSED)1196 move_by_pieces_d::generate (rtx op0, rtx op1,
1197 machine_mode mode ATTRIBUTE_UNUSED)
1198 {
1199 #ifdef PUSH_ROUNDING
1200 if (op0 == NULL_RTX)
1201 {
1202 emit_single_push_insn (mode, op1, NULL);
1203 return;
1204 }
1205 #endif
1206 emit_insn (m_gen_fun (op0, op1));
1207 }
1208
1209 /* Perform the final adjustment at the end of a string to obtain the
1210 correct return value for the block operation.
1211 Return value is based on RETMODE argument. */
1212
1213 rtx
finish_retmode(memop_ret retmode)1214 move_by_pieces_d::finish_retmode (memop_ret retmode)
1215 {
1216 gcc_assert (!m_reverse);
1217 if (retmode == RETURN_END_MINUS_ONE)
1218 {
1219 m_to.maybe_postinc (-1);
1220 --m_offset;
1221 }
1222 return m_to.adjust (QImode, m_offset);
1223 }
1224
1225 /* Generate several move instructions to copy LEN bytes from block FROM to
1226 block TO. (These are MEM rtx's with BLKmode).
1227
1228 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1229 used to push FROM to the stack.
1230
1231 ALIGN is maximum stack alignment we can assume.
1232
1233 Return value is based on RETMODE argument. */
1234
1235 rtx
move_by_pieces(rtx to,rtx from,unsigned HOST_WIDE_INT len,unsigned int align,memop_ret retmode)1236 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1237 unsigned int align, memop_ret retmode)
1238 {
1239 #ifndef PUSH_ROUNDING
1240 if (to == NULL)
1241 gcc_unreachable ();
1242 #endif
1243
1244 move_by_pieces_d data (to, from, len, align);
1245
1246 data.run ();
1247
1248 if (retmode != RETURN_BEGIN)
1249 return data.finish_retmode (retmode);
1250 else
1251 return to;
1252 }
1253
1254 /* Derived class from op_by_pieces_d, providing support for block move
1255 operations. */
1256
1257 class store_by_pieces_d : public op_by_pieces_d
1258 {
1259 insn_gen_fn m_gen_fun;
1260 void generate (rtx, rtx, machine_mode);
1261 bool prepare_mode (machine_mode, unsigned int);
1262
1263 public:
store_by_pieces_d(rtx to,by_pieces_constfn cfn,void * cfn_data,unsigned HOST_WIDE_INT len,unsigned int align)1264 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
1265 unsigned HOST_WIDE_INT len, unsigned int align)
1266 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align)
1267 {
1268 }
1269 rtx finish_retmode (memop_ret);
1270 };
1271
1272 /* Return true if MODE can be used for a set of stores, given an
1273 alignment ALIGN. Prepare whatever data is necessary for later
1274 calls to generate. */
1275
1276 bool
prepare_mode(machine_mode mode,unsigned int align)1277 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1278 {
1279 insn_code icode = optab_handler (mov_optab, mode);
1280 m_gen_fun = GEN_FCN (icode);
1281 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1282 }
1283
1284 /* A callback used when iterating for a store_by_pieces_operation.
1285 OP0 and OP1 are the values that have been loaded and should be
1286 compared in MODE. If OP0 is NULL, this means we should generate a
1287 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1288 gen function that should be used to generate the mode. */
1289
1290 void
generate(rtx op0,rtx op1,machine_mode)1291 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1292 {
1293 emit_insn (m_gen_fun (op0, op1));
1294 }
1295
1296 /* Perform the final adjustment at the end of a string to obtain the
1297 correct return value for the block operation.
1298 Return value is based on RETMODE argument. */
1299
1300 rtx
finish_retmode(memop_ret retmode)1301 store_by_pieces_d::finish_retmode (memop_ret retmode)
1302 {
1303 gcc_assert (!m_reverse);
1304 if (retmode == RETURN_END_MINUS_ONE)
1305 {
1306 m_to.maybe_postinc (-1);
1307 --m_offset;
1308 }
1309 return m_to.adjust (QImode, m_offset);
1310 }
1311
1312 /* Determine whether the LEN bytes generated by CONSTFUN can be
1313 stored to memory using several move instructions. CONSTFUNDATA is
1314 a pointer which will be passed as argument in every CONSTFUN call.
1315 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1316 a memset operation and false if it's a copy of a constant string.
1317 Return nonzero if a call to store_by_pieces should succeed. */
1318
1319 int
can_store_by_pieces(unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,scalar_int_mode),void * constfundata,unsigned int align,bool memsetp)1320 can_store_by_pieces (unsigned HOST_WIDE_INT len,
1321 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1322 void *constfundata, unsigned int align, bool memsetp)
1323 {
1324 unsigned HOST_WIDE_INT l;
1325 unsigned int max_size;
1326 HOST_WIDE_INT offset = 0;
1327 enum insn_code icode;
1328 int reverse;
1329 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1330 rtx cst ATTRIBUTE_UNUSED;
1331
1332 if (len == 0)
1333 return 1;
1334
1335 if (!targetm.use_by_pieces_infrastructure_p (len, align,
1336 memsetp
1337 ? SET_BY_PIECES
1338 : STORE_BY_PIECES,
1339 optimize_insn_for_speed_p ()))
1340 return 0;
1341
1342 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
1343
1344 /* We would first store what we can in the largest integer mode, then go to
1345 successively smaller modes. */
1346
1347 for (reverse = 0;
1348 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
1349 reverse++)
1350 {
1351 l = len;
1352 max_size = STORE_MAX_PIECES + 1;
1353 while (max_size > 1 && l > 0)
1354 {
1355 scalar_int_mode mode = widest_int_mode_for_size (max_size);
1356
1357 icode = optab_handler (mov_optab, mode);
1358 if (icode != CODE_FOR_nothing
1359 && align >= GET_MODE_ALIGNMENT (mode))
1360 {
1361 unsigned int size = GET_MODE_SIZE (mode);
1362
1363 while (l >= size)
1364 {
1365 if (reverse)
1366 offset -= size;
1367
1368 cst = (*constfun) (constfundata, offset, mode);
1369 if (!targetm.legitimate_constant_p (mode, cst))
1370 return 0;
1371
1372 if (!reverse)
1373 offset += size;
1374
1375 l -= size;
1376 }
1377 }
1378
1379 max_size = GET_MODE_SIZE (mode);
1380 }
1381
1382 /* The code above should have handled everything. */
1383 gcc_assert (!l);
1384 }
1385
1386 return 1;
1387 }
1388
1389 /* Generate several move instructions to store LEN bytes generated by
1390 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1391 pointer which will be passed as argument in every CONSTFUN call.
1392 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1393 a memset operation and false if it's a copy of a constant string.
1394 Return value is based on RETMODE argument. */
1395
1396 rtx
store_by_pieces(rtx to,unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,scalar_int_mode),void * constfundata,unsigned int align,bool memsetp,memop_ret retmode)1397 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
1398 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1399 void *constfundata, unsigned int align, bool memsetp,
1400 memop_ret retmode)
1401 {
1402 if (len == 0)
1403 {
1404 gcc_assert (retmode != RETURN_END_MINUS_ONE);
1405 return to;
1406 }
1407
1408 gcc_assert (targetm.use_by_pieces_infrastructure_p
1409 (len, align,
1410 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,
1411 optimize_insn_for_speed_p ()));
1412
1413 store_by_pieces_d data (to, constfun, constfundata, len, align);
1414 data.run ();
1415
1416 if (retmode != RETURN_BEGIN)
1417 return data.finish_retmode (retmode);
1418 else
1419 return to;
1420 }
1421
1422 /* Callback routine for clear_by_pieces.
1423 Return const0_rtx unconditionally. */
1424
1425 static rtx
clear_by_pieces_1(void *,HOST_WIDE_INT,scalar_int_mode)1426 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode)
1427 {
1428 return const0_rtx;
1429 }
1430
1431 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1432 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1433
1434 static void
clear_by_pieces(rtx to,unsigned HOST_WIDE_INT len,unsigned int align)1435 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
1436 {
1437 if (len == 0)
1438 return;
1439
1440 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align);
1441 data.run ();
1442 }
1443
1444 /* Context used by compare_by_pieces_genfn. It stores the fail label
1445 to jump to in case of miscomparison, and for branch ratios greater than 1,
1446 it stores an accumulator and the current and maximum counts before
1447 emitting another branch. */
1448
1449 class compare_by_pieces_d : public op_by_pieces_d
1450 {
1451 rtx_code_label *m_fail_label;
1452 rtx m_accumulator;
1453 int m_count, m_batch;
1454
1455 void generate (rtx, rtx, machine_mode);
1456 bool prepare_mode (machine_mode, unsigned int);
1457 void finish_mode (machine_mode);
1458 public:
compare_by_pieces_d(rtx op0,rtx op1,by_pieces_constfn op1_cfn,void * op1_cfn_data,HOST_WIDE_INT len,int align,rtx_code_label * fail_label)1459 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
1460 void *op1_cfn_data, HOST_WIDE_INT len, int align,
1461 rtx_code_label *fail_label)
1462 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align)
1463 {
1464 m_fail_label = fail_label;
1465 }
1466 };
1467
1468 /* A callback used when iterating for a compare_by_pieces_operation.
1469 OP0 and OP1 are the values that have been loaded and should be
1470 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1471 context structure. */
1472
1473 void
generate(rtx op0,rtx op1,machine_mode mode)1474 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1475 {
1476 if (m_batch > 1)
1477 {
1478 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX,
1479 true, OPTAB_LIB_WIDEN);
1480 if (m_count != 0)
1481 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
1482 true, OPTAB_LIB_WIDEN);
1483 m_accumulator = temp;
1484
1485 if (++m_count < m_batch)
1486 return;
1487
1488 m_count = 0;
1489 op0 = m_accumulator;
1490 op1 = const0_rtx;
1491 m_accumulator = NULL_RTX;
1492 }
1493 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL,
1494 m_fail_label, profile_probability::uninitialized ());
1495 }
1496
1497 /* Return true if MODE can be used for a set of moves and comparisons,
1498 given an alignment ALIGN. Prepare whatever data is necessary for
1499 later calls to generate. */
1500
1501 bool
prepare_mode(machine_mode mode,unsigned int align)1502 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1503 {
1504 insn_code icode = optab_handler (mov_optab, mode);
1505 if (icode == CODE_FOR_nothing
1506 || align < GET_MODE_ALIGNMENT (mode)
1507 || !can_compare_p (EQ, mode, ccp_jump))
1508 return false;
1509 m_batch = targetm.compare_by_pieces_branch_ratio (mode);
1510 if (m_batch < 0)
1511 return false;
1512 m_accumulator = NULL_RTX;
1513 m_count = 0;
1514 return true;
1515 }
1516
1517 /* Called after expanding a series of comparisons in MODE. If we have
1518 accumulated results for which we haven't emitted a branch yet, do
1519 so now. */
1520
1521 void
finish_mode(machine_mode mode)1522 compare_by_pieces_d::finish_mode (machine_mode mode)
1523 {
1524 if (m_accumulator != NULL_RTX)
1525 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode,
1526 NULL_RTX, NULL, m_fail_label,
1527 profile_probability::uninitialized ());
1528 }
1529
1530 /* Generate several move instructions to compare LEN bytes from blocks
1531 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1532
1533 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1534 used to push FROM to the stack.
1535
1536 ALIGN is maximum stack alignment we can assume.
1537
1538 Optionally, the caller can pass a constfn and associated data in A1_CFN
1539 and A1_CFN_DATA. describing that the second operand being compared is a
1540 known constant and how to obtain its data. */
1541
1542 static rtx
compare_by_pieces(rtx arg0,rtx arg1,unsigned HOST_WIDE_INT len,rtx target,unsigned int align,by_pieces_constfn a1_cfn,void * a1_cfn_data)1543 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
1544 rtx target, unsigned int align,
1545 by_pieces_constfn a1_cfn, void *a1_cfn_data)
1546 {
1547 rtx_code_label *fail_label = gen_label_rtx ();
1548 rtx_code_label *end_label = gen_label_rtx ();
1549
1550 if (target == NULL_RTX
1551 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
1552 target = gen_reg_rtx (TYPE_MODE (integer_type_node));
1553
1554 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
1555 fail_label);
1556
1557 data.run ();
1558
1559 emit_move_insn (target, const0_rtx);
1560 emit_jump (end_label);
1561 emit_barrier ();
1562 emit_label (fail_label);
1563 emit_move_insn (target, const1_rtx);
1564 emit_label (end_label);
1565
1566 return target;
1567 }
1568
1569 /* Emit code to move a block Y to a block X. This may be done with
1570 string-move instructions, with multiple scalar move instructions,
1571 or with a library call.
1572
1573 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1574 SIZE is an rtx that says how long they are.
1575 ALIGN is the maximum alignment we can assume they have.
1576 METHOD describes what kind of copy this is, and what mechanisms may be used.
1577 MIN_SIZE is the minimal size of block to move
1578 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1579 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1580
1581 Return the address of the new block, if memcpy is called and returns it,
1582 0 otherwise. */
1583
1584 rtx
emit_block_move_hints(rtx x,rtx y,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size,bool bail_out_libcall,bool * is_move_done,bool might_overlap)1585 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1586 unsigned int expected_align, HOST_WIDE_INT expected_size,
1587 unsigned HOST_WIDE_INT min_size,
1588 unsigned HOST_WIDE_INT max_size,
1589 unsigned HOST_WIDE_INT probable_max_size,
1590 bool bail_out_libcall, bool *is_move_done,
1591 bool might_overlap)
1592 {
1593 int may_use_call;
1594 rtx retval = 0;
1595 unsigned int align;
1596
1597 if (is_move_done)
1598 *is_move_done = true;
1599
1600 gcc_assert (size);
1601 if (CONST_INT_P (size) && INTVAL (size) == 0)
1602 return 0;
1603
1604 switch (method)
1605 {
1606 case BLOCK_OP_NORMAL:
1607 case BLOCK_OP_TAILCALL:
1608 may_use_call = 1;
1609 break;
1610
1611 case BLOCK_OP_CALL_PARM:
1612 may_use_call = block_move_libcall_safe_for_call_parm ();
1613
1614 /* Make inhibit_defer_pop nonzero around the library call
1615 to force it to pop the arguments right away. */
1616 NO_DEFER_POP;
1617 break;
1618
1619 case BLOCK_OP_NO_LIBCALL:
1620 may_use_call = 0;
1621 break;
1622
1623 case BLOCK_OP_NO_LIBCALL_RET:
1624 may_use_call = -1;
1625 break;
1626
1627 default:
1628 gcc_unreachable ();
1629 }
1630
1631 gcc_assert (MEM_P (x) && MEM_P (y));
1632 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1633 gcc_assert (align >= BITS_PER_UNIT);
1634
1635 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1636 block copy is more efficient for other large modes, e.g. DCmode. */
1637 x = adjust_address (x, BLKmode, 0);
1638 y = adjust_address (y, BLKmode, 0);
1639
1640 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1641 can be incorrect is coming from __builtin_memcpy. */
1642 poly_int64 const_size;
1643 if (poly_int_rtx_p (size, &const_size))
1644 {
1645 x = shallow_copy_rtx (x);
1646 y = shallow_copy_rtx (y);
1647 set_mem_size (x, const_size);
1648 set_mem_size (y, const_size);
1649 }
1650
1651 bool pieces_ok = CONST_INT_P (size)
1652 && can_move_by_pieces (INTVAL (size), align);
1653 bool pattern_ok = false;
1654
1655 if (!pieces_ok || might_overlap)
1656 {
1657 pattern_ok
1658 = emit_block_move_via_pattern (x, y, size, align,
1659 expected_align, expected_size,
1660 min_size, max_size, probable_max_size,
1661 might_overlap);
1662 if (!pattern_ok && might_overlap)
1663 {
1664 /* Do not try any of the other methods below as they are not safe
1665 for overlapping moves. */
1666 *is_move_done = false;
1667 return retval;
1668 }
1669 }
1670
1671 if (pattern_ok)
1672 ;
1673 else if (pieces_ok)
1674 move_by_pieces (x, y, INTVAL (size), align, RETURN_BEGIN);
1675 else if (may_use_call && !might_overlap
1676 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1677 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1678 {
1679 if (bail_out_libcall)
1680 {
1681 if (is_move_done)
1682 *is_move_done = false;
1683 return retval;
1684 }
1685
1686 if (may_use_call < 0)
1687 return pc_rtx;
1688
1689 retval = emit_block_copy_via_libcall (x, y, size,
1690 method == BLOCK_OP_TAILCALL);
1691 }
1692 else if (might_overlap)
1693 *is_move_done = false;
1694 else
1695 emit_block_move_via_loop (x, y, size, align);
1696
1697 if (method == BLOCK_OP_CALL_PARM)
1698 OK_DEFER_POP;
1699
1700 return retval;
1701 }
1702
1703 rtx
emit_block_move(rtx x,rtx y,rtx size,enum block_op_methods method)1704 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1705 {
1706 unsigned HOST_WIDE_INT max, min = 0;
1707 if (GET_CODE (size) == CONST_INT)
1708 min = max = UINTVAL (size);
1709 else
1710 max = GET_MODE_MASK (GET_MODE (size));
1711 return emit_block_move_hints (x, y, size, method, 0, -1,
1712 min, max, max);
1713 }
1714
1715 /* A subroutine of emit_block_move. Returns true if calling the
1716 block move libcall will not clobber any parameters which may have
1717 already been placed on the stack. */
1718
1719 static bool
block_move_libcall_safe_for_call_parm(void)1720 block_move_libcall_safe_for_call_parm (void)
1721 {
1722 tree fn;
1723
1724 /* If arguments are pushed on the stack, then they're safe. */
1725 if (PUSH_ARGS)
1726 return true;
1727
1728 /* If registers go on the stack anyway, any argument is sure to clobber
1729 an outgoing argument. */
1730 #if defined (REG_PARM_STACK_SPACE)
1731 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1732 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1733 depend on its argument. */
1734 (void) fn;
1735 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1736 && REG_PARM_STACK_SPACE (fn) != 0)
1737 return false;
1738 #endif
1739
1740 /* If any argument goes in memory, then it might clobber an outgoing
1741 argument. */
1742 {
1743 CUMULATIVE_ARGS args_so_far_v;
1744 cumulative_args_t args_so_far;
1745 tree arg;
1746
1747 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1748 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1749 args_so_far = pack_cumulative_args (&args_so_far_v);
1750
1751 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1752 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1753 {
1754 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1755 function_arg_info arg_info (mode, /*named=*/true);
1756 rtx tmp = targetm.calls.function_arg (args_so_far, arg_info);
1757 if (!tmp || !REG_P (tmp))
1758 return false;
1759 if (targetm.calls.arg_partial_bytes (args_so_far, arg_info))
1760 return false;
1761 targetm.calls.function_arg_advance (args_so_far, arg_info);
1762 }
1763 }
1764 return true;
1765 }
1766
1767 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1768 return true if successful.
1769
1770 X is the destination of the copy or move.
1771 Y is the source of the copy or move.
1772 SIZE is the size of the block to be moved.
1773
1774 MIGHT_OVERLAP indicates this originated with expansion of a
1775 builtin_memmove() and the source and destination blocks may
1776 overlap.
1777 */
1778
1779 static bool
emit_block_move_via_pattern(rtx x,rtx y,rtx size,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size,bool might_overlap)1780 emit_block_move_via_pattern (rtx x, rtx y, rtx size, unsigned int align,
1781 unsigned int expected_align,
1782 HOST_WIDE_INT expected_size,
1783 unsigned HOST_WIDE_INT min_size,
1784 unsigned HOST_WIDE_INT max_size,
1785 unsigned HOST_WIDE_INT probable_max_size,
1786 bool might_overlap)
1787 {
1788 if (expected_align < align)
1789 expected_align = align;
1790 if (expected_size != -1)
1791 {
1792 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1793 expected_size = probable_max_size;
1794 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1795 expected_size = min_size;
1796 }
1797
1798 /* Since this is a move insn, we don't care about volatility. */
1799 temporary_volatile_ok v (true);
1800
1801 /* Try the most limited insn first, because there's no point
1802 including more than one in the machine description unless
1803 the more limited one has some advantage. */
1804
1805 opt_scalar_int_mode mode_iter;
1806 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
1807 {
1808 scalar_int_mode mode = mode_iter.require ();
1809 enum insn_code code;
1810 if (might_overlap)
1811 code = direct_optab_handler (movmem_optab, mode);
1812 else
1813 code = direct_optab_handler (cpymem_optab, mode);
1814
1815 if (code != CODE_FOR_nothing
1816 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1817 here because if SIZE is less than the mode mask, as it is
1818 returned by the macro, it will definitely be less than the
1819 actual mode mask. Since SIZE is within the Pmode address
1820 space, we limit MODE to Pmode. */
1821 && ((CONST_INT_P (size)
1822 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1823 <= (GET_MODE_MASK (mode) >> 1)))
1824 || max_size <= (GET_MODE_MASK (mode) >> 1)
1825 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1826 {
1827 class expand_operand ops[9];
1828 unsigned int nops;
1829
1830 /* ??? When called via emit_block_move_for_call, it'd be
1831 nice if there were some way to inform the backend, so
1832 that it doesn't fail the expansion because it thinks
1833 emitting the libcall would be more efficient. */
1834 nops = insn_data[(int) code].n_generator_args;
1835 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1836
1837 create_fixed_operand (&ops[0], x);
1838 create_fixed_operand (&ops[1], y);
1839 /* The check above guarantees that this size conversion is valid. */
1840 create_convert_operand_to (&ops[2], size, mode, true);
1841 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1842 if (nops >= 6)
1843 {
1844 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1845 create_integer_operand (&ops[5], expected_size);
1846 }
1847 if (nops >= 8)
1848 {
1849 create_integer_operand (&ops[6], min_size);
1850 /* If we cannot represent the maximal size,
1851 make parameter NULL. */
1852 if ((HOST_WIDE_INT) max_size != -1)
1853 create_integer_operand (&ops[7], max_size);
1854 else
1855 create_fixed_operand (&ops[7], NULL);
1856 }
1857 if (nops == 9)
1858 {
1859 /* If we cannot represent the maximal size,
1860 make parameter NULL. */
1861 if ((HOST_WIDE_INT) probable_max_size != -1)
1862 create_integer_operand (&ops[8], probable_max_size);
1863 else
1864 create_fixed_operand (&ops[8], NULL);
1865 }
1866 if (maybe_expand_insn (code, nops, ops))
1867 return true;
1868 }
1869 }
1870
1871 return false;
1872 }
1873
1874 /* A subroutine of emit_block_move. Copy the data via an explicit
1875 loop. This is used only when libcalls are forbidden. */
1876 /* ??? It'd be nice to copy in hunks larger than QImode. */
1877
1878 static void
emit_block_move_via_loop(rtx x,rtx y,rtx size,unsigned int align ATTRIBUTE_UNUSED)1879 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1880 unsigned int align ATTRIBUTE_UNUSED)
1881 {
1882 rtx_code_label *cmp_label, *top_label;
1883 rtx iter, x_addr, y_addr, tmp;
1884 machine_mode x_addr_mode = get_address_mode (x);
1885 machine_mode y_addr_mode = get_address_mode (y);
1886 machine_mode iter_mode;
1887
1888 iter_mode = GET_MODE (size);
1889 if (iter_mode == VOIDmode)
1890 iter_mode = word_mode;
1891
1892 top_label = gen_label_rtx ();
1893 cmp_label = gen_label_rtx ();
1894 iter = gen_reg_rtx (iter_mode);
1895
1896 emit_move_insn (iter, const0_rtx);
1897
1898 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1899 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1900 do_pending_stack_adjust ();
1901
1902 emit_jump (cmp_label);
1903 emit_label (top_label);
1904
1905 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1906 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1907
1908 if (x_addr_mode != y_addr_mode)
1909 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1910 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1911
1912 x = change_address (x, QImode, x_addr);
1913 y = change_address (y, QImode, y_addr);
1914
1915 emit_move_insn (x, y);
1916
1917 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1918 true, OPTAB_LIB_WIDEN);
1919 if (tmp != iter)
1920 emit_move_insn (iter, tmp);
1921
1922 emit_label (cmp_label);
1923
1924 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1925 true, top_label,
1926 profile_probability::guessed_always ()
1927 .apply_scale (9, 10));
1928 }
1929
1930 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1931 TAILCALL is true if this is a tail call. */
1932
1933 rtx
emit_block_op_via_libcall(enum built_in_function fncode,rtx dst,rtx src,rtx size,bool tailcall)1934 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
1935 rtx size, bool tailcall)
1936 {
1937 rtx dst_addr, src_addr;
1938 tree call_expr, dst_tree, src_tree, size_tree;
1939 machine_mode size_mode;
1940
1941 /* Since dst and src are passed to a libcall, mark the corresponding
1942 tree EXPR as addressable. */
1943 tree dst_expr = MEM_EXPR (dst);
1944 tree src_expr = MEM_EXPR (src);
1945 if (dst_expr)
1946 mark_addressable (dst_expr);
1947 if (src_expr)
1948 mark_addressable (src_expr);
1949
1950 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1951 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1952 dst_tree = make_tree (ptr_type_node, dst_addr);
1953
1954 src_addr = copy_addr_to_reg (XEXP (src, 0));
1955 src_addr = convert_memory_address (ptr_mode, src_addr);
1956 src_tree = make_tree (ptr_type_node, src_addr);
1957
1958 size_mode = TYPE_MODE (sizetype);
1959 size = convert_to_mode (size_mode, size, 1);
1960 size = copy_to_mode_reg (size_mode, size);
1961 size_tree = make_tree (sizetype, size);
1962
1963 /* It is incorrect to use the libcall calling conventions for calls to
1964 memcpy/memmove/memcmp because they can be provided by the user. */
1965 tree fn = builtin_decl_implicit (fncode);
1966 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1967 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1968
1969 return expand_call (call_expr, NULL_RTX, false);
1970 }
1971
1972 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1973 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1974 otherwise return null. */
1975
1976 rtx
expand_cmpstrn_or_cmpmem(insn_code icode,rtx target,rtx arg1_rtx,rtx arg2_rtx,tree arg3_type,rtx arg3_rtx,HOST_WIDE_INT align)1977 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
1978 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
1979 HOST_WIDE_INT align)
1980 {
1981 machine_mode insn_mode = insn_data[icode].operand[0].mode;
1982
1983 if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
1984 target = NULL_RTX;
1985
1986 class expand_operand ops[5];
1987 create_output_operand (&ops[0], target, insn_mode);
1988 create_fixed_operand (&ops[1], arg1_rtx);
1989 create_fixed_operand (&ops[2], arg2_rtx);
1990 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type),
1991 TYPE_UNSIGNED (arg3_type));
1992 create_integer_operand (&ops[4], align);
1993 if (maybe_expand_insn (icode, 5, ops))
1994 return ops[0].value;
1995 return NULL_RTX;
1996 }
1997
1998 /* Expand a block compare between X and Y with length LEN using the
1999 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2000 of the expression that was used to calculate the length. ALIGN
2001 gives the known minimum common alignment. */
2002
2003 static rtx
emit_block_cmp_via_cmpmem(rtx x,rtx y,rtx len,tree len_type,rtx target,unsigned align)2004 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
2005 unsigned align)
2006 {
2007 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2008 implementing memcmp because it will stop if it encounters two
2009 zero bytes. */
2010 insn_code icode = direct_optab_handler (cmpmem_optab, SImode);
2011
2012 if (icode == CODE_FOR_nothing)
2013 return NULL_RTX;
2014
2015 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
2016 }
2017
2018 /* Emit code to compare a block Y to a block X. This may be done with
2019 string-compare instructions, with multiple scalar instructions,
2020 or with a library call.
2021
2022 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2023 they are. LEN_TYPE is the type of the expression that was used to
2024 calculate it.
2025
2026 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2027 value of a normal memcmp call, instead we can just compare for equality.
2028 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2029 returning NULL_RTX.
2030
2031 Optionally, the caller can pass a constfn and associated data in Y_CFN
2032 and Y_CFN_DATA. describing that the second operand being compared is a
2033 known constant and how to obtain its data.
2034 Return the result of the comparison, or NULL_RTX if we failed to
2035 perform the operation. */
2036
2037 rtx
emit_block_cmp_hints(rtx x,rtx y,rtx len,tree len_type,rtx target,bool equality_only,by_pieces_constfn y_cfn,void * y_cfndata)2038 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
2039 bool equality_only, by_pieces_constfn y_cfn,
2040 void *y_cfndata)
2041 {
2042 rtx result = 0;
2043
2044 if (CONST_INT_P (len) && INTVAL (len) == 0)
2045 return const0_rtx;
2046
2047 gcc_assert (MEM_P (x) && MEM_P (y));
2048 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
2049 gcc_assert (align >= BITS_PER_UNIT);
2050
2051 x = adjust_address (x, BLKmode, 0);
2052 y = adjust_address (y, BLKmode, 0);
2053
2054 if (equality_only
2055 && CONST_INT_P (len)
2056 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES))
2057 result = compare_by_pieces (x, y, INTVAL (len), target, align,
2058 y_cfn, y_cfndata);
2059 else
2060 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);
2061
2062 return result;
2063 }
2064
2065 /* Copy all or part of a value X into registers starting at REGNO.
2066 The number of registers to be filled is NREGS. */
2067
2068 void
move_block_to_reg(int regno,rtx x,int nregs,machine_mode mode)2069 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2070 {
2071 if (nregs == 0)
2072 return;
2073
2074 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
2075 x = validize_mem (force_const_mem (mode, x));
2076
2077 /* See if the machine can do this with a load multiple insn. */
2078 if (targetm.have_load_multiple ())
2079 {
2080 rtx_insn *last = get_last_insn ();
2081 rtx first = gen_rtx_REG (word_mode, regno);
2082 if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
2083 GEN_INT (nregs)))
2084 {
2085 emit_insn (pat);
2086 return;
2087 }
2088 else
2089 delete_insns_since (last);
2090 }
2091
2092 for (int i = 0; i < nregs; i++)
2093 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
2094 operand_subword_force (x, i, mode));
2095 }
2096
2097 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2098 The number of registers to be filled is NREGS. */
2099
2100 void
move_block_from_reg(int regno,rtx x,int nregs)2101 move_block_from_reg (int regno, rtx x, int nregs)
2102 {
2103 if (nregs == 0)
2104 return;
2105
2106 /* See if the machine can do this with a store multiple insn. */
2107 if (targetm.have_store_multiple ())
2108 {
2109 rtx_insn *last = get_last_insn ();
2110 rtx first = gen_rtx_REG (word_mode, regno);
2111 if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
2112 GEN_INT (nregs)))
2113 {
2114 emit_insn (pat);
2115 return;
2116 }
2117 else
2118 delete_insns_since (last);
2119 }
2120
2121 for (int i = 0; i < nregs; i++)
2122 {
2123 rtx tem = operand_subword (x, i, 1, BLKmode);
2124
2125 gcc_assert (tem);
2126
2127 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
2128 }
2129 }
2130
2131 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2132 ORIG, where ORIG is a non-consecutive group of registers represented by
2133 a PARALLEL. The clone is identical to the original except in that the
2134 original set of registers is replaced by a new set of pseudo registers.
2135 The new set has the same modes as the original set. */
2136
2137 rtx
gen_group_rtx(rtx orig)2138 gen_group_rtx (rtx orig)
2139 {
2140 int i, length;
2141 rtx *tmps;
2142
2143 gcc_assert (GET_CODE (orig) == PARALLEL);
2144
2145 length = XVECLEN (orig, 0);
2146 tmps = XALLOCAVEC (rtx, length);
2147
2148 /* Skip a NULL entry in first slot. */
2149 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
2150
2151 if (i)
2152 tmps[0] = 0;
2153
2154 for (; i < length; i++)
2155 {
2156 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
2157 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
2158
2159 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
2160 }
2161
2162 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
2163 }
2164
2165 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2166 except that values are placed in TMPS[i], and must later be moved
2167 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2168
2169 static void
emit_group_load_1(rtx * tmps,rtx dst,rtx orig_src,tree type,poly_int64 ssize)2170 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type,
2171 poly_int64 ssize)
2172 {
2173 rtx src;
2174 int start, i;
2175 machine_mode m = GET_MODE (orig_src);
2176
2177 gcc_assert (GET_CODE (dst) == PARALLEL);
2178
2179 if (m != VOIDmode
2180 && !SCALAR_INT_MODE_P (m)
2181 && !MEM_P (orig_src)
2182 && GET_CODE (orig_src) != CONCAT)
2183 {
2184 scalar_int_mode imode;
2185 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode))
2186 {
2187 src = gen_reg_rtx (imode);
2188 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src);
2189 }
2190 else
2191 {
2192 src = assign_stack_temp (GET_MODE (orig_src), ssize);
2193 emit_move_insn (src, orig_src);
2194 }
2195 emit_group_load_1 (tmps, dst, src, type, ssize);
2196 return;
2197 }
2198
2199 /* Check for a NULL entry, used to indicate that the parameter goes
2200 both on the stack and in registers. */
2201 if (XEXP (XVECEXP (dst, 0, 0), 0))
2202 start = 0;
2203 else
2204 start = 1;
2205
2206 /* Process the pieces. */
2207 for (i = start; i < XVECLEN (dst, 0); i++)
2208 {
2209 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
2210 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (dst, 0, i), 1));
2211 poly_int64 bytelen = GET_MODE_SIZE (mode);
2212 poly_int64 shift = 0;
2213
2214 /* Handle trailing fragments that run over the size of the struct.
2215 It's the target's responsibility to make sure that the fragment
2216 cannot be strictly smaller in some cases and strictly larger
2217 in others. */
2218 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2219 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2220 {
2221 /* Arrange to shift the fragment to where it belongs.
2222 extract_bit_field loads to the lsb of the reg. */
2223 if (
2224 #ifdef BLOCK_REG_PADDING
2225 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
2226 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2227 #else
2228 BYTES_BIG_ENDIAN
2229 #endif
2230 )
2231 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2232 bytelen = ssize - bytepos;
2233 gcc_assert (maybe_gt (bytelen, 0));
2234 }
2235
2236 /* If we won't be loading directly from memory, protect the real source
2237 from strange tricks we might play; but make sure that the source can
2238 be loaded directly into the destination. */
2239 src = orig_src;
2240 if (!MEM_P (orig_src)
2241 && (!CONSTANT_P (orig_src)
2242 || (GET_MODE (orig_src) != mode
2243 && GET_MODE (orig_src) != VOIDmode)))
2244 {
2245 if (GET_MODE (orig_src) == VOIDmode)
2246 src = gen_reg_rtx (mode);
2247 else
2248 src = gen_reg_rtx (GET_MODE (orig_src));
2249
2250 emit_move_insn (src, orig_src);
2251 }
2252
2253 /* Optimize the access just a bit. */
2254 if (MEM_P (src)
2255 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src))
2256 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
2257 && multiple_p (bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode))
2258 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2259 {
2260 tmps[i] = gen_reg_rtx (mode);
2261 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
2262 }
2263 else if (COMPLEX_MODE_P (mode)
2264 && GET_MODE (src) == mode
2265 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2266 /* Let emit_move_complex do the bulk of the work. */
2267 tmps[i] = src;
2268 else if (GET_CODE (src) == CONCAT)
2269 {
2270 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src));
2271 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
2272 unsigned int elt;
2273 poly_int64 subpos;
2274
2275 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos)
2276 && known_le (subpos + bytelen, slen0))
2277 {
2278 /* The following assumes that the concatenated objects all
2279 have the same size. In this case, a simple calculation
2280 can be used to determine the object and the bit field
2281 to be extracted. */
2282 tmps[i] = XEXP (src, elt);
2283 if (maybe_ne (subpos, 0)
2284 || maybe_ne (subpos + bytelen, slen0)
2285 || (!CONSTANT_P (tmps[i])
2286 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
2287 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
2288 subpos * BITS_PER_UNIT,
2289 1, NULL_RTX, mode, mode, false,
2290 NULL);
2291 }
2292 else
2293 {
2294 rtx mem;
2295
2296 gcc_assert (known_eq (bytepos, 0));
2297 mem = assign_stack_temp (GET_MODE (src), slen);
2298 emit_move_insn (mem, src);
2299 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
2300 0, 1, NULL_RTX, mode, mode, false,
2301 NULL);
2302 }
2303 }
2304 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2305 SIMD register, which is currently broken. While we get GCC
2306 to emit proper RTL for these cases, let's dump to memory. */
2307 else if (VECTOR_MODE_P (GET_MODE (dst))
2308 && REG_P (src))
2309 {
2310 poly_uint64 slen = GET_MODE_SIZE (GET_MODE (src));
2311 rtx mem;
2312
2313 mem = assign_stack_temp (GET_MODE (src), slen);
2314 emit_move_insn (mem, src);
2315 tmps[i] = adjust_address (mem, mode, bytepos);
2316 }
2317 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
2318 && XVECLEN (dst, 0) > 1)
2319 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
2320 else if (CONSTANT_P (src))
2321 {
2322 if (known_eq (bytelen, ssize))
2323 tmps[i] = src;
2324 else
2325 {
2326 rtx first, second;
2327
2328 /* TODO: const_wide_int can have sizes other than this... */
2329 gcc_assert (known_eq (2 * bytelen, ssize));
2330 split_double (src, &first, &second);
2331 if (i)
2332 tmps[i] = second;
2333 else
2334 tmps[i] = first;
2335 }
2336 }
2337 else if (REG_P (src) && GET_MODE (src) == mode)
2338 tmps[i] = src;
2339 else
2340 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
2341 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
2342 mode, mode, false, NULL);
2343
2344 if (maybe_ne (shift, 0))
2345 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
2346 shift, tmps[i], 0);
2347 }
2348 }
2349
2350 /* Emit code to move a block SRC of type TYPE to a block DST,
2351 where DST is non-consecutive registers represented by a PARALLEL.
2352 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2353 if not known. */
2354
2355 void
emit_group_load(rtx dst,rtx src,tree type,poly_int64 ssize)2356 emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize)
2357 {
2358 rtx *tmps;
2359 int i;
2360
2361 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
2362 emit_group_load_1 (tmps, dst, src, type, ssize);
2363
2364 /* Copy the extracted pieces into the proper (probable) hard regs. */
2365 for (i = 0; i < XVECLEN (dst, 0); i++)
2366 {
2367 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
2368 if (d == NULL)
2369 continue;
2370 emit_move_insn (d, tmps[i]);
2371 }
2372 }
2373
2374 /* Similar, but load SRC into new pseudos in a format that looks like
2375 PARALLEL. This can later be fed to emit_group_move to get things
2376 in the right place. */
2377
2378 rtx
emit_group_load_into_temps(rtx parallel,rtx src,tree type,poly_int64 ssize)2379 emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize)
2380 {
2381 rtvec vec;
2382 int i;
2383
2384 vec = rtvec_alloc (XVECLEN (parallel, 0));
2385 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
2386
2387 /* Convert the vector to look just like the original PARALLEL, except
2388 with the computed values. */
2389 for (i = 0; i < XVECLEN (parallel, 0); i++)
2390 {
2391 rtx e = XVECEXP (parallel, 0, i);
2392 rtx d = XEXP (e, 0);
2393
2394 if (d)
2395 {
2396 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
2397 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
2398 }
2399 RTVEC_ELT (vec, i) = e;
2400 }
2401
2402 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
2403 }
2404
2405 /* Emit code to move a block SRC to block DST, where SRC and DST are
2406 non-consecutive groups of registers, each represented by a PARALLEL. */
2407
2408 void
emit_group_move(rtx dst,rtx src)2409 emit_group_move (rtx dst, rtx src)
2410 {
2411 int i;
2412
2413 gcc_assert (GET_CODE (src) == PARALLEL
2414 && GET_CODE (dst) == PARALLEL
2415 && XVECLEN (src, 0) == XVECLEN (dst, 0));
2416
2417 /* Skip first entry if NULL. */
2418 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
2419 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
2420 XEXP (XVECEXP (src, 0, i), 0));
2421 }
2422
2423 /* Move a group of registers represented by a PARALLEL into pseudos. */
2424
2425 rtx
emit_group_move_into_temps(rtx src)2426 emit_group_move_into_temps (rtx src)
2427 {
2428 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
2429 int i;
2430
2431 for (i = 0; i < XVECLEN (src, 0); i++)
2432 {
2433 rtx e = XVECEXP (src, 0, i);
2434 rtx d = XEXP (e, 0);
2435
2436 if (d)
2437 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
2438 RTVEC_ELT (vec, i) = e;
2439 }
2440
2441 return gen_rtx_PARALLEL (GET_MODE (src), vec);
2442 }
2443
2444 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2445 where SRC is non-consecutive registers represented by a PARALLEL.
2446 SSIZE represents the total size of block ORIG_DST, or -1 if not
2447 known. */
2448
2449 void
emit_group_store(rtx orig_dst,rtx src,tree type ATTRIBUTE_UNUSED,poly_int64 ssize)2450 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
2451 poly_int64 ssize)
2452 {
2453 rtx *tmps, dst;
2454 int start, finish, i;
2455 machine_mode m = GET_MODE (orig_dst);
2456
2457 gcc_assert (GET_CODE (src) == PARALLEL);
2458
2459 if (!SCALAR_INT_MODE_P (m)
2460 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
2461 {
2462 scalar_int_mode imode;
2463 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode))
2464 {
2465 dst = gen_reg_rtx (imode);
2466 emit_group_store (dst, src, type, ssize);
2467 dst = gen_lowpart (GET_MODE (orig_dst), dst);
2468 }
2469 else
2470 {
2471 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
2472 emit_group_store (dst, src, type, ssize);
2473 }
2474 emit_move_insn (orig_dst, dst);
2475 return;
2476 }
2477
2478 /* Check for a NULL entry, used to indicate that the parameter goes
2479 both on the stack and in registers. */
2480 if (XEXP (XVECEXP (src, 0, 0), 0))
2481 start = 0;
2482 else
2483 start = 1;
2484 finish = XVECLEN (src, 0);
2485
2486 tmps = XALLOCAVEC (rtx, finish);
2487
2488 /* Copy the (probable) hard regs into pseudos. */
2489 for (i = start; i < finish; i++)
2490 {
2491 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
2492 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
2493 {
2494 tmps[i] = gen_reg_rtx (GET_MODE (reg));
2495 emit_move_insn (tmps[i], reg);
2496 }
2497 else
2498 tmps[i] = reg;
2499 }
2500
2501 /* If we won't be storing directly into memory, protect the real destination
2502 from strange tricks we might play. */
2503 dst = orig_dst;
2504 if (GET_CODE (dst) == PARALLEL)
2505 {
2506 rtx temp;
2507
2508 /* We can get a PARALLEL dst if there is a conditional expression in
2509 a return statement. In that case, the dst and src are the same,
2510 so no action is necessary. */
2511 if (rtx_equal_p (dst, src))
2512 return;
2513
2514 /* It is unclear if we can ever reach here, but we may as well handle
2515 it. Allocate a temporary, and split this into a store/load to/from
2516 the temporary. */
2517 temp = assign_stack_temp (GET_MODE (dst), ssize);
2518 emit_group_store (temp, src, type, ssize);
2519 emit_group_load (dst, temp, type, ssize);
2520 return;
2521 }
2522 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2523 {
2524 machine_mode outer = GET_MODE (dst);
2525 machine_mode inner;
2526 poly_int64 bytepos;
2527 bool done = false;
2528 rtx temp;
2529
2530 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2531 dst = gen_reg_rtx (outer);
2532
2533 /* Make life a bit easier for combine. */
2534 /* If the first element of the vector is the low part
2535 of the destination mode, use a paradoxical subreg to
2536 initialize the destination. */
2537 if (start < finish)
2538 {
2539 inner = GET_MODE (tmps[start]);
2540 bytepos = subreg_lowpart_offset (inner, outer);
2541 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)),
2542 bytepos))
2543 {
2544 temp = simplify_gen_subreg (outer, tmps[start],
2545 inner, 0);
2546 if (temp)
2547 {
2548 emit_move_insn (dst, temp);
2549 done = true;
2550 start++;
2551 }
2552 }
2553 }
2554
2555 /* If the first element wasn't the low part, try the last. */
2556 if (!done
2557 && start < finish - 1)
2558 {
2559 inner = GET_MODE (tmps[finish - 1]);
2560 bytepos = subreg_lowpart_offset (inner, outer);
2561 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,
2562 finish - 1), 1)),
2563 bytepos))
2564 {
2565 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2566 inner, 0);
2567 if (temp)
2568 {
2569 emit_move_insn (dst, temp);
2570 done = true;
2571 finish--;
2572 }
2573 }
2574 }
2575
2576 /* Otherwise, simply initialize the result to zero. */
2577 if (!done)
2578 emit_move_insn (dst, CONST0_RTX (outer));
2579 }
2580
2581 /* Process the pieces. */
2582 for (i = start; i < finish; i++)
2583 {
2584 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, i), 1));
2585 machine_mode mode = GET_MODE (tmps[i]);
2586 poly_int64 bytelen = GET_MODE_SIZE (mode);
2587 poly_uint64 adj_bytelen;
2588 rtx dest = dst;
2589
2590 /* Handle trailing fragments that run over the size of the struct.
2591 It's the target's responsibility to make sure that the fragment
2592 cannot be strictly smaller in some cases and strictly larger
2593 in others. */
2594 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2595 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2596 adj_bytelen = ssize - bytepos;
2597 else
2598 adj_bytelen = bytelen;
2599
2600 if (GET_CODE (dst) == CONCAT)
2601 {
2602 if (known_le (bytepos + adj_bytelen,
2603 GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2604 dest = XEXP (dst, 0);
2605 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2606 {
2607 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2608 dest = XEXP (dst, 1);
2609 }
2610 else
2611 {
2612 machine_mode dest_mode = GET_MODE (dest);
2613 machine_mode tmp_mode = GET_MODE (tmps[i]);
2614
2615 gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0));
2616
2617 if (GET_MODE_ALIGNMENT (dest_mode)
2618 >= GET_MODE_ALIGNMENT (tmp_mode))
2619 {
2620 dest = assign_stack_temp (dest_mode,
2621 GET_MODE_SIZE (dest_mode));
2622 emit_move_insn (adjust_address (dest,
2623 tmp_mode,
2624 bytepos),
2625 tmps[i]);
2626 dst = dest;
2627 }
2628 else
2629 {
2630 dest = assign_stack_temp (tmp_mode,
2631 GET_MODE_SIZE (tmp_mode));
2632 emit_move_insn (dest, tmps[i]);
2633 dst = adjust_address (dest, dest_mode, bytepos);
2634 }
2635 break;
2636 }
2637 }
2638
2639 /* Handle trailing fragments that run over the size of the struct. */
2640 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2641 {
2642 /* store_bit_field always takes its value from the lsb.
2643 Move the fragment to the lsb if it's not already there. */
2644 if (
2645 #ifdef BLOCK_REG_PADDING
2646 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2647 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2648 #else
2649 BYTES_BIG_ENDIAN
2650 #endif
2651 )
2652 {
2653 poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2654 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2655 shift, tmps[i], 0);
2656 }
2657
2658 /* Make sure not to write past the end of the struct. */
2659 store_bit_field (dest,
2660 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2661 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2662 VOIDmode, tmps[i], false);
2663 }
2664
2665 /* Optimize the access just a bit. */
2666 else if (MEM_P (dest)
2667 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest))
2668 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2669 && multiple_p (bytepos * BITS_PER_UNIT,
2670 GET_MODE_ALIGNMENT (mode))
2671 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2672 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2673
2674 else
2675 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2676 0, 0, mode, tmps[i], false);
2677 }
2678
2679 /* Copy from the pseudo into the (probable) hard reg. */
2680 if (orig_dst != dst)
2681 emit_move_insn (orig_dst, dst);
2682 }
2683
2684 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2685 of the value stored in X. */
2686
2687 rtx
maybe_emit_group_store(rtx x,tree type)2688 maybe_emit_group_store (rtx x, tree type)
2689 {
2690 machine_mode mode = TYPE_MODE (type);
2691 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2692 if (GET_CODE (x) == PARALLEL)
2693 {
2694 rtx result = gen_reg_rtx (mode);
2695 emit_group_store (result, x, type, int_size_in_bytes (type));
2696 return result;
2697 }
2698 return x;
2699 }
2700
2701 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2702
2703 This is used on targets that return BLKmode values in registers. */
2704
2705 static void
copy_blkmode_from_reg(rtx target,rtx srcreg,tree type)2706 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2707 {
2708 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2709 rtx src = NULL, dst = NULL;
2710 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2711 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2712 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2713 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg));
2714 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target));
2715 fixed_size_mode copy_mode;
2716
2717 /* BLKmode registers created in the back-end shouldn't have survived. */
2718 gcc_assert (mode != BLKmode);
2719
2720 /* If the structure doesn't take up a whole number of words, see whether
2721 SRCREG is padded on the left or on the right. If it's on the left,
2722 set PADDING_CORRECTION to the number of bits to skip.
2723
2724 In most ABIs, the structure will be returned at the least end of
2725 the register, which translates to right padding on little-endian
2726 targets and left padding on big-endian targets. The opposite
2727 holds if the structure is returned at the most significant
2728 end of the register. */
2729 if (bytes % UNITS_PER_WORD != 0
2730 && (targetm.calls.return_in_msb (type)
2731 ? !BYTES_BIG_ENDIAN
2732 : BYTES_BIG_ENDIAN))
2733 padding_correction
2734 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2735
2736 /* We can use a single move if we have an exact mode for the size. */
2737 else if (MEM_P (target)
2738 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target))
2739 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2740 && bytes == GET_MODE_SIZE (mode))
2741 {
2742 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2743 return;
2744 }
2745
2746 /* And if we additionally have the same mode for a register. */
2747 else if (REG_P (target)
2748 && GET_MODE (target) == mode
2749 && bytes == GET_MODE_SIZE (mode))
2750 {
2751 emit_move_insn (target, srcreg);
2752 return;
2753 }
2754
2755 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2756 into a new pseudo which is a full word. */
2757 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2758 {
2759 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2760 mode = word_mode;
2761 }
2762
2763 /* Copy the structure BITSIZE bits at a time. If the target lives in
2764 memory, take care of not reading/writing past its end by selecting
2765 a copy mode suited to BITSIZE. This should always be possible given
2766 how it is computed.
2767
2768 If the target lives in register, make sure not to select a copy mode
2769 larger than the mode of the register.
2770
2771 We could probably emit more efficient code for machines which do not use
2772 strict alignment, but it doesn't seem worth the effort at the current
2773 time. */
2774
2775 copy_mode = word_mode;
2776 if (MEM_P (target))
2777 {
2778 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
2779 if (mem_mode.exists ())
2780 copy_mode = mem_mode.require ();
2781 }
2782 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2783 copy_mode = tmode;
2784
2785 for (bitpos = 0, xbitpos = padding_correction;
2786 bitpos < bytes * BITS_PER_UNIT;
2787 bitpos += bitsize, xbitpos += bitsize)
2788 {
2789 /* We need a new source operand each time xbitpos is on a
2790 word boundary and when xbitpos == padding_correction
2791 (the first time through). */
2792 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2793 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2794
2795 /* We need a new destination operand each time bitpos is on
2796 a word boundary. */
2797 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2798 dst = target;
2799 else if (bitpos % BITS_PER_WORD == 0)
2800 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2801
2802 /* Use xbitpos for the source extraction (right justified) and
2803 bitpos for the destination store (left justified). */
2804 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2805 extract_bit_field (src, bitsize,
2806 xbitpos % BITS_PER_WORD, 1,
2807 NULL_RTX, copy_mode, copy_mode,
2808 false, NULL),
2809 false);
2810 }
2811 }
2812
2813 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2814 register if it contains any data, otherwise return null.
2815
2816 This is used on targets that return BLKmode values in registers. */
2817
2818 rtx
copy_blkmode_to_reg(machine_mode mode_in,tree src)2819 copy_blkmode_to_reg (machine_mode mode_in, tree src)
2820 {
2821 int i, n_regs;
2822 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2823 unsigned int bitsize;
2824 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2825 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2826 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
2827 fixed_size_mode dst_mode;
2828 scalar_int_mode min_mode;
2829
2830 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2831
2832 x = expand_normal (src);
2833
2834 bytes = arg_int_size_in_bytes (TREE_TYPE (src));
2835 if (bytes == 0)
2836 return NULL_RTX;
2837
2838 /* If the structure doesn't take up a whole number of words, see
2839 whether the register value should be padded on the left or on
2840 the right. Set PADDING_CORRECTION to the number of padding
2841 bits needed on the left side.
2842
2843 In most ABIs, the structure will be returned at the least end of
2844 the register, which translates to right padding on little-endian
2845 targets and left padding on big-endian targets. The opposite
2846 holds if the structure is returned at the most significant
2847 end of the register. */
2848 if (bytes % UNITS_PER_WORD != 0
2849 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2850 ? !BYTES_BIG_ENDIAN
2851 : BYTES_BIG_ENDIAN))
2852 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2853 * BITS_PER_UNIT));
2854
2855 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2856 dst_words = XALLOCAVEC (rtx, n_regs);
2857 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2858 min_mode = smallest_int_mode_for_size (bitsize);
2859
2860 /* Copy the structure BITSIZE bits at a time. */
2861 for (bitpos = 0, xbitpos = padding_correction;
2862 bitpos < bytes * BITS_PER_UNIT;
2863 bitpos += bitsize, xbitpos += bitsize)
2864 {
2865 /* We need a new destination pseudo each time xbitpos is
2866 on a word boundary and when xbitpos == padding_correction
2867 (the first time through). */
2868 if (xbitpos % BITS_PER_WORD == 0
2869 || xbitpos == padding_correction)
2870 {
2871 /* Generate an appropriate register. */
2872 dst_word = gen_reg_rtx (word_mode);
2873 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2874
2875 /* Clear the destination before we move anything into it. */
2876 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2877 }
2878
2879 /* Find the largest integer mode that can be used to copy all or as
2880 many bits as possible of the structure if the target supports larger
2881 copies. There are too many corner cases here w.r.t to alignments on
2882 the read/writes. So if there is any padding just use single byte
2883 operations. */
2884 opt_scalar_int_mode mode_iter;
2885 if (padding_correction == 0 && !STRICT_ALIGNMENT)
2886 {
2887 FOR_EACH_MODE_FROM (mode_iter, min_mode)
2888 {
2889 unsigned int msize = GET_MODE_BITSIZE (mode_iter.require ());
2890 if (msize <= ((bytes * BITS_PER_UNIT) - bitpos)
2891 && msize <= BITS_PER_WORD)
2892 bitsize = msize;
2893 else
2894 break;
2895 }
2896 }
2897
2898 /* We need a new source operand each time bitpos is on a word
2899 boundary. */
2900 if (bitpos % BITS_PER_WORD == 0)
2901 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2902
2903 /* Use bitpos for the source extraction (left justified) and
2904 xbitpos for the destination store (right justified). */
2905 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2906 0, 0, word_mode,
2907 extract_bit_field (src_word, bitsize,
2908 bitpos % BITS_PER_WORD, 1,
2909 NULL_RTX, word_mode, word_mode,
2910 false, NULL),
2911 false);
2912 }
2913
2914 if (mode == BLKmode)
2915 {
2916 /* Find the smallest integer mode large enough to hold the
2917 entire structure. */
2918 opt_scalar_int_mode mode_iter;
2919 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
2920 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
2921 break;
2922
2923 /* A suitable mode should have been found. */
2924 mode = mode_iter.require ();
2925 }
2926
2927 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2928 dst_mode = word_mode;
2929 else
2930 dst_mode = mode;
2931 dst = gen_reg_rtx (dst_mode);
2932
2933 for (i = 0; i < n_regs; i++)
2934 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2935
2936 if (mode != dst_mode)
2937 dst = gen_lowpart (mode, dst);
2938
2939 return dst;
2940 }
2941
2942 /* Add a USE expression for REG to the (possibly empty) list pointed
2943 to by CALL_FUSAGE. REG must denote a hard register. */
2944
2945 void
use_reg_mode(rtx * call_fusage,rtx reg,machine_mode mode)2946 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2947 {
2948 gcc_assert (REG_P (reg));
2949
2950 if (!HARD_REGISTER_P (reg))
2951 return;
2952
2953 *call_fusage
2954 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2955 }
2956
2957 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2958 to by CALL_FUSAGE. REG must denote a hard register. */
2959
2960 void
clobber_reg_mode(rtx * call_fusage,rtx reg,machine_mode mode)2961 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2962 {
2963 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2964
2965 *call_fusage
2966 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2967 }
2968
2969 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2970 starting at REGNO. All of these registers must be hard registers. */
2971
2972 void
use_regs(rtx * call_fusage,int regno,int nregs)2973 use_regs (rtx *call_fusage, int regno, int nregs)
2974 {
2975 int i;
2976
2977 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2978
2979 for (i = 0; i < nregs; i++)
2980 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2981 }
2982
2983 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2984 PARALLEL REGS. This is for calls that pass values in multiple
2985 non-contiguous locations. The Irix 6 ABI has examples of this. */
2986
2987 void
use_group_regs(rtx * call_fusage,rtx regs)2988 use_group_regs (rtx *call_fusage, rtx regs)
2989 {
2990 int i;
2991
2992 for (i = 0; i < XVECLEN (regs, 0); i++)
2993 {
2994 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2995
2996 /* A NULL entry means the parameter goes both on the stack and in
2997 registers. This can also be a MEM for targets that pass values
2998 partially on the stack and partially in registers. */
2999 if (reg != 0 && REG_P (reg))
3000 use_reg (call_fusage, reg);
3001 }
3002 }
3003
3004 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3005 assigment and the code of the expresion on the RHS is CODE. Return
3006 NULL otherwise. */
3007
3008 static gimple *
get_def_for_expr(tree name,enum tree_code code)3009 get_def_for_expr (tree name, enum tree_code code)
3010 {
3011 gimple *def_stmt;
3012
3013 if (TREE_CODE (name) != SSA_NAME)
3014 return NULL;
3015
3016 def_stmt = get_gimple_for_ssa_name (name);
3017 if (!def_stmt
3018 || gimple_assign_rhs_code (def_stmt) != code)
3019 return NULL;
3020
3021 return def_stmt;
3022 }
3023
3024 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3025 assigment and the class of the expresion on the RHS is CLASS. Return
3026 NULL otherwise. */
3027
3028 static gimple *
get_def_for_expr_class(tree name,enum tree_code_class tclass)3029 get_def_for_expr_class (tree name, enum tree_code_class tclass)
3030 {
3031 gimple *def_stmt;
3032
3033 if (TREE_CODE (name) != SSA_NAME)
3034 return NULL;
3035
3036 def_stmt = get_gimple_for_ssa_name (name);
3037 if (!def_stmt
3038 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
3039 return NULL;
3040
3041 return def_stmt;
3042 }
3043
3044 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3045 its length in bytes. */
3046
3047 rtx
clear_storage_hints(rtx object,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)3048 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
3049 unsigned int expected_align, HOST_WIDE_INT expected_size,
3050 unsigned HOST_WIDE_INT min_size,
3051 unsigned HOST_WIDE_INT max_size,
3052 unsigned HOST_WIDE_INT probable_max_size)
3053 {
3054 machine_mode mode = GET_MODE (object);
3055 unsigned int align;
3056
3057 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
3058
3059 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3060 just move a zero. Otherwise, do this a piece at a time. */
3061 poly_int64 size_val;
3062 if (mode != BLKmode
3063 && poly_int_rtx_p (size, &size_val)
3064 && known_eq (size_val, GET_MODE_SIZE (mode)))
3065 {
3066 rtx zero = CONST0_RTX (mode);
3067 if (zero != NULL)
3068 {
3069 emit_move_insn (object, zero);
3070 return NULL;
3071 }
3072
3073 if (COMPLEX_MODE_P (mode))
3074 {
3075 zero = CONST0_RTX (GET_MODE_INNER (mode));
3076 if (zero != NULL)
3077 {
3078 write_complex_part (object, zero, 0);
3079 write_complex_part (object, zero, 1);
3080 return NULL;
3081 }
3082 }
3083 }
3084
3085 if (size == const0_rtx)
3086 return NULL;
3087
3088 align = MEM_ALIGN (object);
3089
3090 if (CONST_INT_P (size)
3091 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
3092 CLEAR_BY_PIECES,
3093 optimize_insn_for_speed_p ()))
3094 clear_by_pieces (object, INTVAL (size), align);
3095 else if (set_storage_via_setmem (object, size, const0_rtx, align,
3096 expected_align, expected_size,
3097 min_size, max_size, probable_max_size))
3098 ;
3099 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
3100 return set_storage_via_libcall (object, size, const0_rtx,
3101 method == BLOCK_OP_TAILCALL);
3102 else
3103 gcc_unreachable ();
3104
3105 return NULL;
3106 }
3107
3108 rtx
clear_storage(rtx object,rtx size,enum block_op_methods method)3109 clear_storage (rtx object, rtx size, enum block_op_methods method)
3110 {
3111 unsigned HOST_WIDE_INT max, min = 0;
3112 if (GET_CODE (size) == CONST_INT)
3113 min = max = UINTVAL (size);
3114 else
3115 max = GET_MODE_MASK (GET_MODE (size));
3116 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
3117 }
3118
3119
3120 /* A subroutine of clear_storage. Expand a call to memset.
3121 Return the return value of memset, 0 otherwise. */
3122
3123 rtx
set_storage_via_libcall(rtx object,rtx size,rtx val,bool tailcall)3124 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3125 {
3126 tree call_expr, fn, object_tree, size_tree, val_tree;
3127 machine_mode size_mode;
3128
3129 object = copy_addr_to_reg (XEXP (object, 0));
3130 object_tree = make_tree (ptr_type_node, object);
3131
3132 if (!CONST_INT_P (val))
3133 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
3134 val_tree = make_tree (integer_type_node, val);
3135
3136 size_mode = TYPE_MODE (sizetype);
3137 size = convert_to_mode (size_mode, size, 1);
3138 size = copy_to_mode_reg (size_mode, size);
3139 size_tree = make_tree (sizetype, size);
3140
3141 /* It is incorrect to use the libcall calling conventions for calls to
3142 memset because it can be provided by the user. */
3143 fn = builtin_decl_implicit (BUILT_IN_MEMSET);
3144 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
3145 CALL_EXPR_TAILCALL (call_expr) = tailcall;
3146
3147 return expand_call (call_expr, NULL_RTX, false);
3148 }
3149
3150 /* Expand a setmem pattern; return true if successful. */
3151
3152 bool
set_storage_via_setmem(rtx object,rtx size,rtx val,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)3153 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
3154 unsigned int expected_align, HOST_WIDE_INT expected_size,
3155 unsigned HOST_WIDE_INT min_size,
3156 unsigned HOST_WIDE_INT max_size,
3157 unsigned HOST_WIDE_INT probable_max_size)
3158 {
3159 /* Try the most limited insn first, because there's no point
3160 including more than one in the machine description unless
3161 the more limited one has some advantage. */
3162
3163 if (expected_align < align)
3164 expected_align = align;
3165 if (expected_size != -1)
3166 {
3167 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
3168 expected_size = max_size;
3169 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
3170 expected_size = min_size;
3171 }
3172
3173 opt_scalar_int_mode mode_iter;
3174 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
3175 {
3176 scalar_int_mode mode = mode_iter.require ();
3177 enum insn_code code = direct_optab_handler (setmem_optab, mode);
3178
3179 if (code != CODE_FOR_nothing
3180 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3181 here because if SIZE is less than the mode mask, as it is
3182 returned by the macro, it will definitely be less than the
3183 actual mode mask. Since SIZE is within the Pmode address
3184 space, we limit MODE to Pmode. */
3185 && ((CONST_INT_P (size)
3186 && ((unsigned HOST_WIDE_INT) INTVAL (size)
3187 <= (GET_MODE_MASK (mode) >> 1)))
3188 || max_size <= (GET_MODE_MASK (mode) >> 1)
3189 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
3190 {
3191 class expand_operand ops[9];
3192 unsigned int nops;
3193
3194 nops = insn_data[(int) code].n_generator_args;
3195 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
3196
3197 create_fixed_operand (&ops[0], object);
3198 /* The check above guarantees that this size conversion is valid. */
3199 create_convert_operand_to (&ops[1], size, mode, true);
3200 create_convert_operand_from (&ops[2], val, byte_mode, true);
3201 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
3202 if (nops >= 6)
3203 {
3204 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
3205 create_integer_operand (&ops[5], expected_size);
3206 }
3207 if (nops >= 8)
3208 {
3209 create_integer_operand (&ops[6], min_size);
3210 /* If we cannot represent the maximal size,
3211 make parameter NULL. */
3212 if ((HOST_WIDE_INT) max_size != -1)
3213 create_integer_operand (&ops[7], max_size);
3214 else
3215 create_fixed_operand (&ops[7], NULL);
3216 }
3217 if (nops == 9)
3218 {
3219 /* If we cannot represent the maximal size,
3220 make parameter NULL. */
3221 if ((HOST_WIDE_INT) probable_max_size != -1)
3222 create_integer_operand (&ops[8], probable_max_size);
3223 else
3224 create_fixed_operand (&ops[8], NULL);
3225 }
3226 if (maybe_expand_insn (code, nops, ops))
3227 return true;
3228 }
3229 }
3230
3231 return false;
3232 }
3233
3234
3235 /* Write to one of the components of the complex value CPLX. Write VAL to
3236 the real part if IMAG_P is false, and the imaginary part if its true. */
3237
3238 void
write_complex_part(rtx cplx,rtx val,bool imag_p)3239 write_complex_part (rtx cplx, rtx val, bool imag_p)
3240 {
3241 machine_mode cmode;
3242 scalar_mode imode;
3243 unsigned ibitsize;
3244
3245 if (GET_CODE (cplx) == CONCAT)
3246 {
3247 emit_move_insn (XEXP (cplx, imag_p), val);
3248 return;
3249 }
3250
3251 cmode = GET_MODE (cplx);
3252 imode = GET_MODE_INNER (cmode);
3253 ibitsize = GET_MODE_BITSIZE (imode);
3254
3255 /* For MEMs simplify_gen_subreg may generate an invalid new address
3256 because, e.g., the original address is considered mode-dependent
3257 by the target, which restricts simplify_subreg from invoking
3258 adjust_address_nv. Instead of preparing fallback support for an
3259 invalid address, we call adjust_address_nv directly. */
3260 if (MEM_P (cplx))
3261 {
3262 emit_move_insn (adjust_address_nv (cplx, imode,
3263 imag_p ? GET_MODE_SIZE (imode) : 0),
3264 val);
3265 return;
3266 }
3267
3268 /* If the sub-object is at least word sized, then we know that subregging
3269 will work. This special case is important, since store_bit_field
3270 wants to operate on integer modes, and there's rarely an OImode to
3271 correspond to TCmode. */
3272 if (ibitsize >= BITS_PER_WORD
3273 /* For hard regs we have exact predicates. Assume we can split
3274 the original object if it spans an even number of hard regs.
3275 This special case is important for SCmode on 64-bit platforms
3276 where the natural size of floating-point regs is 32-bit. */
3277 || (REG_P (cplx)
3278 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3279 && REG_NREGS (cplx) % 2 == 0))
3280 {
3281 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3282 imag_p ? GET_MODE_SIZE (imode) : 0);
3283 if (part)
3284 {
3285 emit_move_insn (part, val);
3286 return;
3287 }
3288 else
3289 /* simplify_gen_subreg may fail for sub-word MEMs. */
3290 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3291 }
3292
3293 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
3294 false);
3295 }
3296
3297 /* Extract one of the components of the complex value CPLX. Extract the
3298 real part if IMAG_P is false, and the imaginary part if it's true. */
3299
3300 rtx
read_complex_part(rtx cplx,bool imag_p)3301 read_complex_part (rtx cplx, bool imag_p)
3302 {
3303 machine_mode cmode;
3304 scalar_mode imode;
3305 unsigned ibitsize;
3306
3307 if (GET_CODE (cplx) == CONCAT)
3308 return XEXP (cplx, imag_p);
3309
3310 cmode = GET_MODE (cplx);
3311 imode = GET_MODE_INNER (cmode);
3312 ibitsize = GET_MODE_BITSIZE (imode);
3313
3314 /* Special case reads from complex constants that got spilled to memory. */
3315 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3316 {
3317 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3318 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3319 {
3320 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3321 if (CONSTANT_CLASS_P (part))
3322 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3323 }
3324 }
3325
3326 /* For MEMs simplify_gen_subreg may generate an invalid new address
3327 because, e.g., the original address is considered mode-dependent
3328 by the target, which restricts simplify_subreg from invoking
3329 adjust_address_nv. Instead of preparing fallback support for an
3330 invalid address, we call adjust_address_nv directly. */
3331 if (MEM_P (cplx))
3332 return adjust_address_nv (cplx, imode,
3333 imag_p ? GET_MODE_SIZE (imode) : 0);
3334
3335 /* If the sub-object is at least word sized, then we know that subregging
3336 will work. This special case is important, since extract_bit_field
3337 wants to operate on integer modes, and there's rarely an OImode to
3338 correspond to TCmode. */
3339 if (ibitsize >= BITS_PER_WORD
3340 /* For hard regs we have exact predicates. Assume we can split
3341 the original object if it spans an even number of hard regs.
3342 This special case is important for SCmode on 64-bit platforms
3343 where the natural size of floating-point regs is 32-bit. */
3344 || (REG_P (cplx)
3345 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3346 && REG_NREGS (cplx) % 2 == 0))
3347 {
3348 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3349 imag_p ? GET_MODE_SIZE (imode) : 0);
3350 if (ret)
3351 return ret;
3352 else
3353 /* simplify_gen_subreg may fail for sub-word MEMs. */
3354 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3355 }
3356
3357 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3358 true, NULL_RTX, imode, imode, false, NULL);
3359 }
3360
3361 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3362 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3363 represented in NEW_MODE. If FORCE is true, this will never happen, as
3364 we'll force-create a SUBREG if needed. */
3365
3366 static rtx
emit_move_change_mode(machine_mode new_mode,machine_mode old_mode,rtx x,bool force)3367 emit_move_change_mode (machine_mode new_mode,
3368 machine_mode old_mode, rtx x, bool force)
3369 {
3370 rtx ret;
3371
3372 if (push_operand (x, GET_MODE (x)))
3373 {
3374 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3375 MEM_COPY_ATTRIBUTES (ret, x);
3376 }
3377 else if (MEM_P (x))
3378 {
3379 /* We don't have to worry about changing the address since the
3380 size in bytes is supposed to be the same. */
3381 if (reload_in_progress)
3382 {
3383 /* Copy the MEM to change the mode and move any
3384 substitutions from the old MEM to the new one. */
3385 ret = adjust_address_nv (x, new_mode, 0);
3386 copy_replacements (x, ret);
3387 }
3388 else
3389 ret = adjust_address (x, new_mode, 0);
3390 }
3391 else
3392 {
3393 /* Note that we do want simplify_subreg's behavior of validating
3394 that the new mode is ok for a hard register. If we were to use
3395 simplify_gen_subreg, we would create the subreg, but would
3396 probably run into the target not being able to implement it. */
3397 /* Except, of course, when FORCE is true, when this is exactly what
3398 we want. Which is needed for CCmodes on some targets. */
3399 if (force)
3400 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3401 else
3402 ret = simplify_subreg (new_mode, x, old_mode, 0);
3403 }
3404
3405 return ret;
3406 }
3407
3408 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3409 an integer mode of the same size as MODE. Returns the instruction
3410 emitted, or NULL if such a move could not be generated. */
3411
3412 static rtx_insn *
emit_move_via_integer(machine_mode mode,rtx x,rtx y,bool force)3413 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3414 {
3415 scalar_int_mode imode;
3416 enum insn_code code;
3417
3418 /* There must exist a mode of the exact size we require. */
3419 if (!int_mode_for_mode (mode).exists (&imode))
3420 return NULL;
3421
3422 /* The target must support moves in this mode. */
3423 code = optab_handler (mov_optab, imode);
3424 if (code == CODE_FOR_nothing)
3425 return NULL;
3426
3427 x = emit_move_change_mode (imode, mode, x, force);
3428 if (x == NULL_RTX)
3429 return NULL;
3430 y = emit_move_change_mode (imode, mode, y, force);
3431 if (y == NULL_RTX)
3432 return NULL;
3433 return emit_insn (GEN_FCN (code) (x, y));
3434 }
3435
3436 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3437 Return an equivalent MEM that does not use an auto-increment. */
3438
3439 rtx
emit_move_resolve_push(machine_mode mode,rtx x)3440 emit_move_resolve_push (machine_mode mode, rtx x)
3441 {
3442 enum rtx_code code = GET_CODE (XEXP (x, 0));
3443 rtx temp;
3444
3445 poly_int64 adjust = GET_MODE_SIZE (mode);
3446 #ifdef PUSH_ROUNDING
3447 adjust = PUSH_ROUNDING (adjust);
3448 #endif
3449 if (code == PRE_DEC || code == POST_DEC)
3450 adjust = -adjust;
3451 else if (code == PRE_MODIFY || code == POST_MODIFY)
3452 {
3453 rtx expr = XEXP (XEXP (x, 0), 1);
3454
3455 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3456 poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1));
3457 if (GET_CODE (expr) == MINUS)
3458 val = -val;
3459 gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val));
3460 adjust = val;
3461 }
3462
3463 /* Do not use anti_adjust_stack, since we don't want to update
3464 stack_pointer_delta. */
3465 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3466 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3467 0, OPTAB_LIB_WIDEN);
3468 if (temp != stack_pointer_rtx)
3469 emit_move_insn (stack_pointer_rtx, temp);
3470
3471 switch (code)
3472 {
3473 case PRE_INC:
3474 case PRE_DEC:
3475 case PRE_MODIFY:
3476 temp = stack_pointer_rtx;
3477 break;
3478 case POST_INC:
3479 case POST_DEC:
3480 case POST_MODIFY:
3481 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3482 break;
3483 default:
3484 gcc_unreachable ();
3485 }
3486
3487 return replace_equiv_address (x, temp);
3488 }
3489
3490 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3491 X is known to satisfy push_operand, and MODE is known to be complex.
3492 Returns the last instruction emitted. */
3493
3494 rtx_insn *
emit_move_complex_push(machine_mode mode,rtx x,rtx y)3495 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3496 {
3497 scalar_mode submode = GET_MODE_INNER (mode);
3498 bool imag_first;
3499
3500 #ifdef PUSH_ROUNDING
3501 poly_int64 submodesize = GET_MODE_SIZE (submode);
3502
3503 /* In case we output to the stack, but the size is smaller than the
3504 machine can push exactly, we need to use move instructions. */
3505 if (maybe_ne (PUSH_ROUNDING (submodesize), submodesize))
3506 {
3507 x = emit_move_resolve_push (mode, x);
3508 return emit_move_insn (x, y);
3509 }
3510 #endif
3511
3512 /* Note that the real part always precedes the imag part in memory
3513 regardless of machine's endianness. */
3514 switch (GET_CODE (XEXP (x, 0)))
3515 {
3516 case PRE_DEC:
3517 case POST_DEC:
3518 imag_first = true;
3519 break;
3520 case PRE_INC:
3521 case POST_INC:
3522 imag_first = false;
3523 break;
3524 default:
3525 gcc_unreachable ();
3526 }
3527
3528 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3529 read_complex_part (y, imag_first));
3530 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3531 read_complex_part (y, !imag_first));
3532 }
3533
3534 /* A subroutine of emit_move_complex. Perform the move from Y to X
3535 via two moves of the parts. Returns the last instruction emitted. */
3536
3537 rtx_insn *
emit_move_complex_parts(rtx x,rtx y)3538 emit_move_complex_parts (rtx x, rtx y)
3539 {
3540 /* Show the output dies here. This is necessary for SUBREGs
3541 of pseudos since we cannot track their lifetimes correctly;
3542 hard regs shouldn't appear here except as return values. */
3543 if (!reload_completed && !reload_in_progress
3544 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3545 emit_clobber (x);
3546
3547 write_complex_part (x, read_complex_part (y, false), false);
3548 write_complex_part (x, read_complex_part (y, true), true);
3549
3550 return get_last_insn ();
3551 }
3552
3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3554 MODE is known to be complex. Returns the last instruction emitted. */
3555
3556 static rtx_insn *
emit_move_complex(machine_mode mode,rtx x,rtx y)3557 emit_move_complex (machine_mode mode, rtx x, rtx y)
3558 {
3559 bool try_int;
3560
3561 /* Need to take special care for pushes, to maintain proper ordering
3562 of the data, and possibly extra padding. */
3563 if (push_operand (x, mode))
3564 return emit_move_complex_push (mode, x, y);
3565
3566 /* See if we can coerce the target into moving both values at once, except
3567 for floating point where we favor moving as parts if this is easy. */
3568 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3569 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3570 && !(REG_P (x)
3571 && HARD_REGISTER_P (x)
3572 && REG_NREGS (x) == 1)
3573 && !(REG_P (y)
3574 && HARD_REGISTER_P (y)
3575 && REG_NREGS (y) == 1))
3576 try_int = false;
3577 /* Not possible if the values are inherently not adjacent. */
3578 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3579 try_int = false;
3580 /* Is possible if both are registers (or subregs of registers). */
3581 else if (register_operand (x, mode) && register_operand (y, mode))
3582 try_int = true;
3583 /* If one of the operands is a memory, and alignment constraints
3584 are friendly enough, we may be able to do combined memory operations.
3585 We do not attempt this if Y is a constant because that combination is
3586 usually better with the by-parts thing below. */
3587 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3588 && (!STRICT_ALIGNMENT
3589 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3590 try_int = true;
3591 else
3592 try_int = false;
3593
3594 if (try_int)
3595 {
3596 rtx_insn *ret;
3597
3598 /* For memory to memory moves, optimal behavior can be had with the
3599 existing block move logic. But use normal expansion if optimizing
3600 for size. */
3601 if (MEM_P (x) && MEM_P (y))
3602 {
3603 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode),
3604 (optimize_insn_for_speed_p()
3605 ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL));
3606 return get_last_insn ();
3607 }
3608
3609 ret = emit_move_via_integer (mode, x, y, true);
3610 if (ret)
3611 return ret;
3612 }
3613
3614 return emit_move_complex_parts (x, y);
3615 }
3616
3617 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3618 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3619
3620 static rtx_insn *
emit_move_ccmode(machine_mode mode,rtx x,rtx y)3621 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3622 {
3623 rtx_insn *ret;
3624
3625 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3626 if (mode != CCmode)
3627 {
3628 enum insn_code code = optab_handler (mov_optab, CCmode);
3629 if (code != CODE_FOR_nothing)
3630 {
3631 x = emit_move_change_mode (CCmode, mode, x, true);
3632 y = emit_move_change_mode (CCmode, mode, y, true);
3633 return emit_insn (GEN_FCN (code) (x, y));
3634 }
3635 }
3636
3637 /* Otherwise, find the MODE_INT mode of the same width. */
3638 ret = emit_move_via_integer (mode, x, y, false);
3639 gcc_assert (ret != NULL);
3640 return ret;
3641 }
3642
3643 /* Return true if word I of OP lies entirely in the
3644 undefined bits of a paradoxical subreg. */
3645
3646 static bool
undefined_operand_subword_p(const_rtx op,int i)3647 undefined_operand_subword_p (const_rtx op, int i)
3648 {
3649 if (GET_CODE (op) != SUBREG)
3650 return false;
3651 machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3652 poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op);
3653 return (known_ge (offset, GET_MODE_SIZE (innermostmode))
3654 || known_le (offset, -UNITS_PER_WORD));
3655 }
3656
3657 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3658 MODE is any multi-word or full-word mode that lacks a move_insn
3659 pattern. Note that you will get better code if you define such
3660 patterns, even if they must turn into multiple assembler instructions. */
3661
3662 static rtx_insn *
emit_move_multi_word(machine_mode mode,rtx x,rtx y)3663 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3664 {
3665 rtx_insn *last_insn = 0;
3666 rtx_insn *seq;
3667 rtx inner;
3668 bool need_clobber;
3669 int i, mode_size;
3670
3671 /* This function can only handle cases where the number of words is
3672 known at compile time. */
3673 mode_size = GET_MODE_SIZE (mode).to_constant ();
3674 gcc_assert (mode_size >= UNITS_PER_WORD);
3675
3676 /* If X is a push on the stack, do the push now and replace
3677 X with a reference to the stack pointer. */
3678 if (push_operand (x, mode))
3679 x = emit_move_resolve_push (mode, x);
3680
3681 /* If we are in reload, see if either operand is a MEM whose address
3682 is scheduled for replacement. */
3683 if (reload_in_progress && MEM_P (x)
3684 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3685 x = replace_equiv_address_nv (x, inner);
3686 if (reload_in_progress && MEM_P (y)
3687 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3688 y = replace_equiv_address_nv (y, inner);
3689
3690 start_sequence ();
3691
3692 need_clobber = false;
3693 for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++)
3694 {
3695 /* Do not generate code for a move if it would go entirely
3696 to the non-existing bits of a paradoxical subreg. */
3697 if (undefined_operand_subword_p (x, i))
3698 continue;
3699
3700 rtx xpart = operand_subword (x, i, 1, mode);
3701 rtx ypart;
3702
3703 /* Do not generate code for a move if it would come entirely
3704 from the undefined bits of a paradoxical subreg. */
3705 if (undefined_operand_subword_p (y, i))
3706 continue;
3707
3708 ypart = operand_subword (y, i, 1, mode);
3709
3710 /* If we can't get a part of Y, put Y into memory if it is a
3711 constant. Otherwise, force it into a register. Then we must
3712 be able to get a part of Y. */
3713 if (ypart == 0 && CONSTANT_P (y))
3714 {
3715 y = use_anchored_address (force_const_mem (mode, y));
3716 ypart = operand_subword (y, i, 1, mode);
3717 }
3718 else if (ypart == 0)
3719 ypart = operand_subword_force (y, i, mode);
3720
3721 gcc_assert (xpart && ypart);
3722
3723 need_clobber |= (GET_CODE (xpart) == SUBREG);
3724
3725 last_insn = emit_move_insn (xpart, ypart);
3726 }
3727
3728 seq = get_insns ();
3729 end_sequence ();
3730
3731 /* Show the output dies here. This is necessary for SUBREGs
3732 of pseudos since we cannot track their lifetimes correctly;
3733 hard regs shouldn't appear here except as return values.
3734 We never want to emit such a clobber after reload. */
3735 if (x != y
3736 && ! (reload_in_progress || reload_completed)
3737 && need_clobber != 0)
3738 emit_clobber (x);
3739
3740 emit_insn (seq);
3741
3742 return last_insn;
3743 }
3744
3745 /* Low level part of emit_move_insn.
3746 Called just like emit_move_insn, but assumes X and Y
3747 are basically valid. */
3748
3749 rtx_insn *
emit_move_insn_1(rtx x,rtx y)3750 emit_move_insn_1 (rtx x, rtx y)
3751 {
3752 machine_mode mode = GET_MODE (x);
3753 enum insn_code code;
3754
3755 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3756
3757 code = optab_handler (mov_optab, mode);
3758 if (code != CODE_FOR_nothing)
3759 return emit_insn (GEN_FCN (code) (x, y));
3760
3761 /* Expand complex moves by moving real part and imag part. */
3762 if (COMPLEX_MODE_P (mode))
3763 return emit_move_complex (mode, x, y);
3764
3765 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3766 || ALL_FIXED_POINT_MODE_P (mode))
3767 {
3768 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3769
3770 /* If we can't find an integer mode, use multi words. */
3771 if (result)
3772 return result;
3773 else
3774 return emit_move_multi_word (mode, x, y);
3775 }
3776
3777 if (GET_MODE_CLASS (mode) == MODE_CC)
3778 return emit_move_ccmode (mode, x, y);
3779
3780 /* Try using a move pattern for the corresponding integer mode. This is
3781 only safe when simplify_subreg can convert MODE constants into integer
3782 constants. At present, it can only do this reliably if the value
3783 fits within a HOST_WIDE_INT. */
3784 if (!CONSTANT_P (y)
3785 || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT))
3786 {
3787 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3788
3789 if (ret)
3790 {
3791 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3792 return ret;
3793 }
3794 }
3795
3796 return emit_move_multi_word (mode, x, y);
3797 }
3798
3799 /* Generate code to copy Y into X.
3800 Both Y and X must have the same mode, except that
3801 Y can be a constant with VOIDmode.
3802 This mode cannot be BLKmode; use emit_block_move for that.
3803
3804 Return the last instruction emitted. */
3805
3806 rtx_insn *
emit_move_insn(rtx x,rtx y)3807 emit_move_insn (rtx x, rtx y)
3808 {
3809 machine_mode mode = GET_MODE (x);
3810 rtx y_cst = NULL_RTX;
3811 rtx_insn *last_insn;
3812 rtx set;
3813
3814 gcc_assert (mode != BLKmode
3815 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3816
3817 if (CONSTANT_P (y))
3818 {
3819 if (optimize
3820 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3821 && (last_insn = compress_float_constant (x, y)))
3822 return last_insn;
3823
3824 y_cst = y;
3825
3826 if (!targetm.legitimate_constant_p (mode, y))
3827 {
3828 y = force_const_mem (mode, y);
3829
3830 /* If the target's cannot_force_const_mem prevented the spill,
3831 assume that the target's move expanders will also take care
3832 of the non-legitimate constant. */
3833 if (!y)
3834 y = y_cst;
3835 else
3836 y = use_anchored_address (y);
3837 }
3838 }
3839
3840 /* If X or Y are memory references, verify that their addresses are valid
3841 for the machine. */
3842 if (MEM_P (x)
3843 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3844 MEM_ADDR_SPACE (x))
3845 && ! push_operand (x, GET_MODE (x))))
3846 x = validize_mem (x);
3847
3848 if (MEM_P (y)
3849 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3850 MEM_ADDR_SPACE (y)))
3851 y = validize_mem (y);
3852
3853 gcc_assert (mode != BLKmode);
3854
3855 last_insn = emit_move_insn_1 (x, y);
3856
3857 if (y_cst && REG_P (x)
3858 && (set = single_set (last_insn)) != NULL_RTX
3859 && SET_DEST (set) == x
3860 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3861 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3862
3863 return last_insn;
3864 }
3865
3866 /* Generate the body of an instruction to copy Y into X.
3867 It may be a list of insns, if one insn isn't enough. */
3868
3869 rtx_insn *
gen_move_insn(rtx x,rtx y)3870 gen_move_insn (rtx x, rtx y)
3871 {
3872 rtx_insn *seq;
3873
3874 start_sequence ();
3875 emit_move_insn_1 (x, y);
3876 seq = get_insns ();
3877 end_sequence ();
3878 return seq;
3879 }
3880
3881 /* If Y is representable exactly in a narrower mode, and the target can
3882 perform the extension directly from constant or memory, then emit the
3883 move as an extension. */
3884
3885 static rtx_insn *
compress_float_constant(rtx x,rtx y)3886 compress_float_constant (rtx x, rtx y)
3887 {
3888 machine_mode dstmode = GET_MODE (x);
3889 machine_mode orig_srcmode = GET_MODE (y);
3890 machine_mode srcmode;
3891 const REAL_VALUE_TYPE *r;
3892 int oldcost, newcost;
3893 bool speed = optimize_insn_for_speed_p ();
3894
3895 r = CONST_DOUBLE_REAL_VALUE (y);
3896
3897 if (targetm.legitimate_constant_p (dstmode, y))
3898 oldcost = set_src_cost (y, orig_srcmode, speed);
3899 else
3900 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);
3901
3902 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)
3903 {
3904 enum insn_code ic;
3905 rtx trunc_y;
3906 rtx_insn *last_insn;
3907
3908 /* Skip if the target can't extend this way. */
3909 ic = can_extend_p (dstmode, srcmode, 0);
3910 if (ic == CODE_FOR_nothing)
3911 continue;
3912
3913 /* Skip if the narrowed value isn't exact. */
3914 if (! exact_real_truncate (srcmode, r))
3915 continue;
3916
3917 trunc_y = const_double_from_real_value (*r, srcmode);
3918
3919 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3920 {
3921 /* Skip if the target needs extra instructions to perform
3922 the extension. */
3923 if (!insn_operand_matches (ic, 1, trunc_y))
3924 continue;
3925 /* This is valid, but may not be cheaper than the original. */
3926 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3927 dstmode, speed);
3928 if (oldcost < newcost)
3929 continue;
3930 }
3931 else if (float_extend_from_mem[dstmode][srcmode])
3932 {
3933 trunc_y = force_const_mem (srcmode, trunc_y);
3934 /* This is valid, but may not be cheaper than the original. */
3935 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3936 dstmode, speed);
3937 if (oldcost < newcost)
3938 continue;
3939 trunc_y = validize_mem (trunc_y);
3940 }
3941 else
3942 continue;
3943
3944 /* For CSE's benefit, force the compressed constant pool entry
3945 into a new pseudo. This constant may be used in different modes,
3946 and if not, combine will put things back together for us. */
3947 trunc_y = force_reg (srcmode, trunc_y);
3948
3949 /* If x is a hard register, perform the extension into a pseudo,
3950 so that e.g. stack realignment code is aware of it. */
3951 rtx target = x;
3952 if (REG_P (x) && HARD_REGISTER_P (x))
3953 target = gen_reg_rtx (dstmode);
3954
3955 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3956 last_insn = get_last_insn ();
3957
3958 if (REG_P (target))
3959 set_unique_reg_note (last_insn, REG_EQUAL, y);
3960
3961 if (target != x)
3962 return emit_move_insn (x, target);
3963 return last_insn;
3964 }
3965
3966 return NULL;
3967 }
3968
3969 /* Pushing data onto the stack. */
3970
3971 /* Push a block of length SIZE (perhaps variable)
3972 and return an rtx to address the beginning of the block.
3973 The value may be virtual_outgoing_args_rtx.
3974
3975 EXTRA is the number of bytes of padding to push in addition to SIZE.
3976 BELOW nonzero means this padding comes at low addresses;
3977 otherwise, the padding comes at high addresses. */
3978
3979 rtx
push_block(rtx size,poly_int64 extra,int below)3980 push_block (rtx size, poly_int64 extra, int below)
3981 {
3982 rtx temp;
3983
3984 size = convert_modes (Pmode, ptr_mode, size, 1);
3985 if (CONSTANT_P (size))
3986 anti_adjust_stack (plus_constant (Pmode, size, extra));
3987 else if (REG_P (size) && known_eq (extra, 0))
3988 anti_adjust_stack (size);
3989 else
3990 {
3991 temp = copy_to_mode_reg (Pmode, size);
3992 if (maybe_ne (extra, 0))
3993 temp = expand_binop (Pmode, add_optab, temp,
3994 gen_int_mode (extra, Pmode),
3995 temp, 0, OPTAB_LIB_WIDEN);
3996 anti_adjust_stack (temp);
3997 }
3998
3999 if (STACK_GROWS_DOWNWARD)
4000 {
4001 temp = virtual_outgoing_args_rtx;
4002 if (maybe_ne (extra, 0) && below)
4003 temp = plus_constant (Pmode, temp, extra);
4004 }
4005 else
4006 {
4007 poly_int64 csize;
4008 if (poly_int_rtx_p (size, &csize))
4009 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
4010 -csize - (below ? 0 : extra));
4011 else if (maybe_ne (extra, 0) && !below)
4012 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
4013 negate_rtx (Pmode, plus_constant (Pmode, size,
4014 extra)));
4015 else
4016 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
4017 negate_rtx (Pmode, size));
4018 }
4019
4020 return memory_address (NARROWEST_INT_MODE, temp);
4021 }
4022
4023 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4024
4025 static rtx
mem_autoinc_base(rtx mem)4026 mem_autoinc_base (rtx mem)
4027 {
4028 if (MEM_P (mem))
4029 {
4030 rtx addr = XEXP (mem, 0);
4031 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
4032 return XEXP (addr, 0);
4033 }
4034 return NULL;
4035 }
4036
4037 /* A utility routine used here, in reload, and in try_split. The insns
4038 after PREV up to and including LAST are known to adjust the stack,
4039 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4040 placing notes as appropriate. PREV may be NULL, indicating the
4041 entire insn sequence prior to LAST should be scanned.
4042
4043 The set of allowed stack pointer modifications is small:
4044 (1) One or more auto-inc style memory references (aka pushes),
4045 (2) One or more addition/subtraction with the SP as destination,
4046 (3) A single move insn with the SP as destination,
4047 (4) A call_pop insn,
4048 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4049
4050 Insns in the sequence that do not modify the SP are ignored,
4051 except for noreturn calls.
4052
4053 The return value is the amount of adjustment that can be trivially
4054 verified, via immediate operand or auto-inc. If the adjustment
4055 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4056
4057 poly_int64
find_args_size_adjust(rtx_insn * insn)4058 find_args_size_adjust (rtx_insn *insn)
4059 {
4060 rtx dest, set, pat;
4061 int i;
4062
4063 pat = PATTERN (insn);
4064 set = NULL;
4065
4066 /* Look for a call_pop pattern. */
4067 if (CALL_P (insn))
4068 {
4069 /* We have to allow non-call_pop patterns for the case
4070 of emit_single_push_insn of a TLS address. */
4071 if (GET_CODE (pat) != PARALLEL)
4072 return 0;
4073
4074 /* All call_pop have a stack pointer adjust in the parallel.
4075 The call itself is always first, and the stack adjust is
4076 usually last, so search from the end. */
4077 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
4078 {
4079 set = XVECEXP (pat, 0, i);
4080 if (GET_CODE (set) != SET)
4081 continue;
4082 dest = SET_DEST (set);
4083 if (dest == stack_pointer_rtx)
4084 break;
4085 }
4086 /* We'd better have found the stack pointer adjust. */
4087 if (i == 0)
4088 return 0;
4089 /* Fall through to process the extracted SET and DEST
4090 as if it was a standalone insn. */
4091 }
4092 else if (GET_CODE (pat) == SET)
4093 set = pat;
4094 else if ((set = single_set (insn)) != NULL)
4095 ;
4096 else if (GET_CODE (pat) == PARALLEL)
4097 {
4098 /* ??? Some older ports use a parallel with a stack adjust
4099 and a store for a PUSH_ROUNDING pattern, rather than a
4100 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4101 /* ??? See h8300 and m68k, pushqi1. */
4102 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
4103 {
4104 set = XVECEXP (pat, 0, i);
4105 if (GET_CODE (set) != SET)
4106 continue;
4107 dest = SET_DEST (set);
4108 if (dest == stack_pointer_rtx)
4109 break;
4110
4111 /* We do not expect an auto-inc of the sp in the parallel. */
4112 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
4113 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4114 != stack_pointer_rtx);
4115 }
4116 if (i < 0)
4117 return 0;
4118 }
4119 else
4120 return 0;
4121
4122 dest = SET_DEST (set);
4123
4124 /* Look for direct modifications of the stack pointer. */
4125 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
4126 {
4127 /* Look for a trivial adjustment, otherwise assume nothing. */
4128 /* Note that the SPU restore_stack_block pattern refers to
4129 the stack pointer in V4SImode. Consider that non-trivial. */
4130 poly_int64 offset;
4131 if (SCALAR_INT_MODE_P (GET_MODE (dest))
4132 && strip_offset (SET_SRC (set), &offset) == stack_pointer_rtx)
4133 return offset;
4134 /* ??? Reload can generate no-op moves, which will be cleaned
4135 up later. Recognize it and continue searching. */
4136 else if (rtx_equal_p (dest, SET_SRC (set)))
4137 return 0;
4138 else
4139 return HOST_WIDE_INT_MIN;
4140 }
4141 else
4142 {
4143 rtx mem, addr;
4144
4145 /* Otherwise only think about autoinc patterns. */
4146 if (mem_autoinc_base (dest) == stack_pointer_rtx)
4147 {
4148 mem = dest;
4149 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4150 != stack_pointer_rtx);
4151 }
4152 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
4153 mem = SET_SRC (set);
4154 else
4155 return 0;
4156
4157 addr = XEXP (mem, 0);
4158 switch (GET_CODE (addr))
4159 {
4160 case PRE_INC:
4161 case POST_INC:
4162 return GET_MODE_SIZE (GET_MODE (mem));
4163 case PRE_DEC:
4164 case POST_DEC:
4165 return -GET_MODE_SIZE (GET_MODE (mem));
4166 case PRE_MODIFY:
4167 case POST_MODIFY:
4168 addr = XEXP (addr, 1);
4169 gcc_assert (GET_CODE (addr) == PLUS);
4170 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
4171 return rtx_to_poly_int64 (XEXP (addr, 1));
4172 default:
4173 gcc_unreachable ();
4174 }
4175 }
4176 }
4177
4178 poly_int64
fixup_args_size_notes(rtx_insn * prev,rtx_insn * last,poly_int64 end_args_size)4179 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last,
4180 poly_int64 end_args_size)
4181 {
4182 poly_int64 args_size = end_args_size;
4183 bool saw_unknown = false;
4184 rtx_insn *insn;
4185
4186 for (insn = last; insn != prev; insn = PREV_INSN (insn))
4187 {
4188 if (!NONDEBUG_INSN_P (insn))
4189 continue;
4190
4191 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4192 a call argument containing a TLS address that itself requires
4193 a call to __tls_get_addr. The handling of stack_pointer_delta
4194 in emit_single_push_insn is supposed to ensure that any such
4195 notes are already correct. */
4196 rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4197 gcc_assert (!note || known_eq (args_size, get_args_size (note)));
4198
4199 poly_int64 this_delta = find_args_size_adjust (insn);
4200 if (known_eq (this_delta, 0))
4201 {
4202 if (!CALL_P (insn)
4203 || ACCUMULATE_OUTGOING_ARGS
4204 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
4205 continue;
4206 }
4207
4208 gcc_assert (!saw_unknown);
4209 if (known_eq (this_delta, HOST_WIDE_INT_MIN))
4210 saw_unknown = true;
4211
4212 if (!note)
4213 add_args_size_note (insn, args_size);
4214 if (STACK_GROWS_DOWNWARD)
4215 this_delta = -poly_uint64 (this_delta);
4216
4217 if (saw_unknown)
4218 args_size = HOST_WIDE_INT_MIN;
4219 else
4220 args_size -= this_delta;
4221 }
4222
4223 return args_size;
4224 }
4225
4226 #ifdef PUSH_ROUNDING
4227 /* Emit single push insn. */
4228
4229 static void
emit_single_push_insn_1(machine_mode mode,rtx x,tree type)4230 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4231 {
4232 rtx dest_addr;
4233 poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4234 rtx dest;
4235 enum insn_code icode;
4236
4237 /* If there is push pattern, use it. Otherwise try old way of throwing
4238 MEM representing push operation to move expander. */
4239 icode = optab_handler (push_optab, mode);
4240 if (icode != CODE_FOR_nothing)
4241 {
4242 class expand_operand ops[1];
4243
4244 create_input_operand (&ops[0], x, mode);
4245 if (maybe_expand_insn (icode, 1, ops))
4246 return;
4247 }
4248 if (known_eq (GET_MODE_SIZE (mode), rounded_size))
4249 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4250 /* If we are to pad downward, adjust the stack pointer first and
4251 then store X into the stack location using an offset. This is
4252 because emit_move_insn does not know how to pad; it does not have
4253 access to type. */
4254 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
4255 {
4256 emit_move_insn (stack_pointer_rtx,
4257 expand_binop (Pmode,
4258 STACK_GROWS_DOWNWARD ? sub_optab
4259 : add_optab,
4260 stack_pointer_rtx,
4261 gen_int_mode (rounded_size, Pmode),
4262 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4263
4264 poly_int64 offset = rounded_size - GET_MODE_SIZE (mode);
4265 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4266 /* We have already decremented the stack pointer, so get the
4267 previous value. */
4268 offset += rounded_size;
4269
4270 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4271 /* We have already incremented the stack pointer, so get the
4272 previous value. */
4273 offset -= rounded_size;
4274
4275 dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset);
4276 }
4277 else
4278 {
4279 if (STACK_GROWS_DOWNWARD)
4280 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4281 dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size);
4282 else
4283 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4284 dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size);
4285
4286 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4287 }
4288
4289 dest = gen_rtx_MEM (mode, dest_addr);
4290
4291 if (type != 0)
4292 {
4293 set_mem_attributes (dest, type, 1);
4294
4295 if (cfun->tail_call_marked)
4296 /* Function incoming arguments may overlap with sibling call
4297 outgoing arguments and we cannot allow reordering of reads
4298 from function arguments with stores to outgoing arguments
4299 of sibling calls. */
4300 set_mem_alias_set (dest, 0);
4301 }
4302 emit_move_insn (dest, x);
4303 }
4304
4305 /* Emit and annotate a single push insn. */
4306
4307 static void
emit_single_push_insn(machine_mode mode,rtx x,tree type)4308 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4309 {
4310 poly_int64 delta, old_delta = stack_pointer_delta;
4311 rtx_insn *prev = get_last_insn ();
4312 rtx_insn *last;
4313
4314 emit_single_push_insn_1 (mode, x, type);
4315
4316 /* Adjust stack_pointer_delta to describe the situation after the push
4317 we just performed. Note that we must do this after the push rather
4318 than before the push in case calculating X needs pushes and pops of
4319 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4320 for such pushes and pops must not include the effect of the future
4321 push of X. */
4322 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4323
4324 last = get_last_insn ();
4325
4326 /* Notice the common case where we emitted exactly one insn. */
4327 if (PREV_INSN (last) == prev)
4328 {
4329 add_args_size_note (last, stack_pointer_delta);
4330 return;
4331 }
4332
4333 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4334 gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN)
4335 || known_eq (delta, old_delta));
4336 }
4337 #endif
4338
4339 /* If reading SIZE bytes from X will end up reading from
4340 Y return the number of bytes that overlap. Return -1
4341 if there is no overlap or -2 if we can't determine
4342 (for example when X and Y have different base registers). */
4343
4344 static int
memory_load_overlap(rtx x,rtx y,HOST_WIDE_INT size)4345 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4346 {
4347 rtx tmp = plus_constant (Pmode, x, size);
4348 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4349
4350 if (!CONST_INT_P (sub))
4351 return -2;
4352
4353 HOST_WIDE_INT val = INTVAL (sub);
4354
4355 return IN_RANGE (val, 1, size) ? val : -1;
4356 }
4357
4358 /* Generate code to push X onto the stack, assuming it has mode MODE and
4359 type TYPE.
4360 MODE is redundant except when X is a CONST_INT (since they don't
4361 carry mode info).
4362 SIZE is an rtx for the size of data to be copied (in bytes),
4363 needed only if X is BLKmode.
4364 Return true if successful. May return false if asked to push a
4365 partial argument during a sibcall optimization (as specified by
4366 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4367 to not overlap.
4368
4369 ALIGN (in bits) is maximum alignment we can assume.
4370
4371 If PARTIAL and REG are both nonzero, then copy that many of the first
4372 bytes of X into registers starting with REG, and push the rest of X.
4373 The amount of space pushed is decreased by PARTIAL bytes.
4374 REG must be a hard register in this case.
4375 If REG is zero but PARTIAL is not, take any all others actions for an
4376 argument partially in registers, but do not actually load any
4377 registers.
4378
4379 EXTRA is the amount in bytes of extra space to leave next to this arg.
4380 This is ignored if an argument block has already been allocated.
4381
4382 On a machine that lacks real push insns, ARGS_ADDR is the address of
4383 the bottom of the argument block for this call. We use indexing off there
4384 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4385 argument block has not been preallocated.
4386
4387 ARGS_SO_FAR is the size of args previously pushed for this call.
4388
4389 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4390 for arguments passed in registers. If nonzero, it will be the number
4391 of bytes required. */
4392
4393 bool
emit_push_insn(rtx x,machine_mode mode,tree type,rtx size,unsigned int align,int partial,rtx reg,poly_int64 extra,rtx args_addr,rtx args_so_far,int reg_parm_stack_space,rtx alignment_pad,bool sibcall_p)4394 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4395 unsigned int align, int partial, rtx reg, poly_int64 extra,
4396 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4397 rtx alignment_pad, bool sibcall_p)
4398 {
4399 rtx xinner;
4400 pad_direction stack_direction
4401 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD;
4402
4403 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4404 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4405 Default is below for small data on big-endian machines; else above. */
4406 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);
4407
4408 /* Invert direction if stack is post-decrement.
4409 FIXME: why? */
4410 if (STACK_PUSH_CODE == POST_DEC)
4411 if (where_pad != PAD_NONE)
4412 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);
4413
4414 xinner = x;
4415
4416 int nregs = partial / UNITS_PER_WORD;
4417 rtx *tmp_regs = NULL;
4418 int overlapping = 0;
4419
4420 if (mode == BLKmode
4421 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4422 {
4423 /* Copy a block into the stack, entirely or partially. */
4424
4425 rtx temp;
4426 int used;
4427 int offset;
4428 int skip;
4429
4430 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4431 used = partial - offset;
4432
4433 if (mode != BLKmode)
4434 {
4435 /* A value is to be stored in an insufficiently aligned
4436 stack slot; copy via a suitably aligned slot if
4437 necessary. */
4438 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode);
4439 if (!MEM_P (xinner))
4440 {
4441 temp = assign_temp (type, 1, 1);
4442 emit_move_insn (temp, xinner);
4443 xinner = temp;
4444 }
4445 }
4446
4447 gcc_assert (size);
4448
4449 /* USED is now the # of bytes we need not copy to the stack
4450 because registers will take care of them. */
4451
4452 if (partial != 0)
4453 xinner = adjust_address (xinner, BLKmode, used);
4454
4455 /* If the partial register-part of the arg counts in its stack size,
4456 skip the part of stack space corresponding to the registers.
4457 Otherwise, start copying to the beginning of the stack space,
4458 by setting SKIP to 0. */
4459 skip = (reg_parm_stack_space == 0) ? 0 : used;
4460
4461 #ifdef PUSH_ROUNDING
4462 /* Do it with several push insns if that doesn't take lots of insns
4463 and if there is no difficulty with push insns that skip bytes
4464 on the stack for alignment purposes. */
4465 if (args_addr == 0
4466 && PUSH_ARGS
4467 && CONST_INT_P (size)
4468 && skip == 0
4469 && MEM_ALIGN (xinner) >= align
4470 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4471 /* Here we avoid the case of a structure whose weak alignment
4472 forces many pushes of a small amount of data,
4473 and such small pushes do rounding that causes trouble. */
4474 && ((!targetm.slow_unaligned_access (word_mode, align))
4475 || align >= BIGGEST_ALIGNMENT
4476 || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT),
4477 align / BITS_PER_UNIT))
4478 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size)))
4479 {
4480 /* Push padding now if padding above and stack grows down,
4481 or if padding below and stack grows up.
4482 But if space already allocated, this has already been done. */
4483 if (maybe_ne (extra, 0)
4484 && args_addr == 0
4485 && where_pad != PAD_NONE
4486 && where_pad != stack_direction)
4487 anti_adjust_stack (gen_int_mode (extra, Pmode));
4488
4489 move_by_pieces (NULL, xinner, INTVAL (size) - used, align,
4490 RETURN_BEGIN);
4491 }
4492 else
4493 #endif /* PUSH_ROUNDING */
4494 {
4495 rtx target;
4496
4497 /* Otherwise make space on the stack and copy the data
4498 to the address of that space. */
4499
4500 /* Deduct words put into registers from the size we must copy. */
4501 if (partial != 0)
4502 {
4503 if (CONST_INT_P (size))
4504 size = GEN_INT (INTVAL (size) - used);
4505 else
4506 size = expand_binop (GET_MODE (size), sub_optab, size,
4507 gen_int_mode (used, GET_MODE (size)),
4508 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4509 }
4510
4511 /* Get the address of the stack space.
4512 In this case, we do not deal with EXTRA separately.
4513 A single stack adjust will do. */
4514 poly_int64 const_args_so_far;
4515 if (! args_addr)
4516 {
4517 temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
4518 extra = 0;
4519 }
4520 else if (poly_int_rtx_p (args_so_far, &const_args_so_far))
4521 temp = memory_address (BLKmode,
4522 plus_constant (Pmode, args_addr,
4523 skip + const_args_so_far));
4524 else
4525 temp = memory_address (BLKmode,
4526 plus_constant (Pmode,
4527 gen_rtx_PLUS (Pmode,
4528 args_addr,
4529 args_so_far),
4530 skip));
4531
4532 if (!ACCUMULATE_OUTGOING_ARGS)
4533 {
4534 /* If the source is referenced relative to the stack pointer,
4535 copy it to another register to stabilize it. We do not need
4536 to do this if we know that we won't be changing sp. */
4537
4538 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4539 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4540 temp = copy_to_reg (temp);
4541 }
4542
4543 target = gen_rtx_MEM (BLKmode, temp);
4544
4545 /* We do *not* set_mem_attributes here, because incoming arguments
4546 may overlap with sibling call outgoing arguments and we cannot
4547 allow reordering of reads from function arguments with stores
4548 to outgoing arguments of sibling calls. We do, however, want
4549 to record the alignment of the stack slot. */
4550 /* ALIGN may well be better aligned than TYPE, e.g. due to
4551 PARM_BOUNDARY. Assume the caller isn't lying. */
4552 set_mem_align (target, align);
4553
4554 /* If part should go in registers and pushing to that part would
4555 overwrite some of the values that need to go into regs, load the
4556 overlapping values into temporary pseudos to be moved into the hard
4557 regs at the end after the stack pushing has completed.
4558 We cannot load them directly into the hard regs here because
4559 they can be clobbered by the block move expansions.
4560 See PR 65358. */
4561
4562 if (partial > 0 && reg != 0 && mode == BLKmode
4563 && GET_CODE (reg) != PARALLEL)
4564 {
4565 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4566 if (overlapping > 0)
4567 {
4568 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4569 overlapping /= UNITS_PER_WORD;
4570
4571 tmp_regs = XALLOCAVEC (rtx, overlapping);
4572
4573 for (int i = 0; i < overlapping; i++)
4574 tmp_regs[i] = gen_reg_rtx (word_mode);
4575
4576 for (int i = 0; i < overlapping; i++)
4577 emit_move_insn (tmp_regs[i],
4578 operand_subword_force (target, i, mode));
4579 }
4580 else if (overlapping == -1)
4581 overlapping = 0;
4582 /* Could not determine whether there is overlap.
4583 Fail the sibcall. */
4584 else
4585 {
4586 overlapping = 0;
4587 if (sibcall_p)
4588 return false;
4589 }
4590 }
4591 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4592 }
4593 }
4594 else if (partial > 0)
4595 {
4596 /* Scalar partly in registers. This case is only supported
4597 for fixed-wdth modes. */
4598 int num_words = GET_MODE_SIZE (mode).to_constant ();
4599 num_words /= UNITS_PER_WORD;
4600 int i;
4601 int not_stack;
4602 /* # bytes of start of argument
4603 that we must make space for but need not store. */
4604 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4605 int args_offset = INTVAL (args_so_far);
4606 int skip;
4607
4608 /* Push padding now if padding above and stack grows down,
4609 or if padding below and stack grows up.
4610 But if space already allocated, this has already been done. */
4611 if (maybe_ne (extra, 0)
4612 && args_addr == 0
4613 && where_pad != PAD_NONE
4614 && where_pad != stack_direction)
4615 anti_adjust_stack (gen_int_mode (extra, Pmode));
4616
4617 /* If we make space by pushing it, we might as well push
4618 the real data. Otherwise, we can leave OFFSET nonzero
4619 and leave the space uninitialized. */
4620 if (args_addr == 0)
4621 offset = 0;
4622
4623 /* Now NOT_STACK gets the number of words that we don't need to
4624 allocate on the stack. Convert OFFSET to words too. */
4625 not_stack = (partial - offset) / UNITS_PER_WORD;
4626 offset /= UNITS_PER_WORD;
4627
4628 /* If the partial register-part of the arg counts in its stack size,
4629 skip the part of stack space corresponding to the registers.
4630 Otherwise, start copying to the beginning of the stack space,
4631 by setting SKIP to 0. */
4632 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4633
4634 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4635 x = validize_mem (force_const_mem (mode, x));
4636
4637 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4638 SUBREGs of such registers are not allowed. */
4639 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4640 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4641 x = copy_to_reg (x);
4642
4643 /* Loop over all the words allocated on the stack for this arg. */
4644 /* We can do it by words, because any scalar bigger than a word
4645 has a size a multiple of a word. */
4646 for (i = num_words - 1; i >= not_stack; i--)
4647 if (i >= not_stack + offset)
4648 if (!emit_push_insn (operand_subword_force (x, i, mode),
4649 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4650 0, args_addr,
4651 GEN_INT (args_offset + ((i - not_stack + skip)
4652 * UNITS_PER_WORD)),
4653 reg_parm_stack_space, alignment_pad, sibcall_p))
4654 return false;
4655 }
4656 else
4657 {
4658 rtx addr;
4659 rtx dest;
4660
4661 /* Push padding now if padding above and stack grows down,
4662 or if padding below and stack grows up.
4663 But if space already allocated, this has already been done. */
4664 if (maybe_ne (extra, 0)
4665 && args_addr == 0
4666 && where_pad != PAD_NONE
4667 && where_pad != stack_direction)
4668 anti_adjust_stack (gen_int_mode (extra, Pmode));
4669
4670 #ifdef PUSH_ROUNDING
4671 if (args_addr == 0 && PUSH_ARGS)
4672 emit_single_push_insn (mode, x, type);
4673 else
4674 #endif
4675 {
4676 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far);
4677 dest = gen_rtx_MEM (mode, memory_address (mode, addr));
4678
4679 /* We do *not* set_mem_attributes here, because incoming arguments
4680 may overlap with sibling call outgoing arguments and we cannot
4681 allow reordering of reads from function arguments with stores
4682 to outgoing arguments of sibling calls. We do, however, want
4683 to record the alignment of the stack slot. */
4684 /* ALIGN may well be better aligned than TYPE, e.g. due to
4685 PARM_BOUNDARY. Assume the caller isn't lying. */
4686 set_mem_align (dest, align);
4687
4688 emit_move_insn (dest, x);
4689 }
4690 }
4691
4692 /* Move the partial arguments into the registers and any overlapping
4693 values that we moved into the pseudos in tmp_regs. */
4694 if (partial > 0 && reg != 0)
4695 {
4696 /* Handle calls that pass values in multiple non-contiguous locations.
4697 The Irix 6 ABI has examples of this. */
4698 if (GET_CODE (reg) == PARALLEL)
4699 emit_group_load (reg, x, type, -1);
4700 else
4701 {
4702 gcc_assert (partial % UNITS_PER_WORD == 0);
4703 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4704
4705 for (int i = 0; i < overlapping; i++)
4706 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4707 + nregs - overlapping + i),
4708 tmp_regs[i]);
4709
4710 }
4711 }
4712
4713 if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction)
4714 anti_adjust_stack (gen_int_mode (extra, Pmode));
4715
4716 if (alignment_pad && args_addr == 0)
4717 anti_adjust_stack (alignment_pad);
4718
4719 return true;
4720 }
4721
4722 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4723 operations. */
4724
4725 static rtx
get_subtarget(rtx x)4726 get_subtarget (rtx x)
4727 {
4728 return (optimize
4729 || x == 0
4730 /* Only registers can be subtargets. */
4731 || !REG_P (x)
4732 /* Don't use hard regs to avoid extending their life. */
4733 || REGNO (x) < FIRST_PSEUDO_REGISTER
4734 ? 0 : x);
4735 }
4736
4737 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4738 FIELD is a bitfield. Returns true if the optimization was successful,
4739 and there's nothing else to do. */
4740
4741 static bool
optimize_bitfield_assignment_op(poly_uint64 pbitsize,poly_uint64 pbitpos,poly_uint64 pbitregion_start,poly_uint64 pbitregion_end,machine_mode mode1,rtx str_rtx,tree to,tree src,bool reverse)4742 optimize_bitfield_assignment_op (poly_uint64 pbitsize,
4743 poly_uint64 pbitpos,
4744 poly_uint64 pbitregion_start,
4745 poly_uint64 pbitregion_end,
4746 machine_mode mode1, rtx str_rtx,
4747 tree to, tree src, bool reverse)
4748 {
4749 /* str_mode is not guaranteed to be a scalar type. */
4750 machine_mode str_mode = GET_MODE (str_rtx);
4751 unsigned int str_bitsize;
4752 tree op0, op1;
4753 rtx value, result;
4754 optab binop;
4755 gimple *srcstmt;
4756 enum tree_code code;
4757
4758 unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end;
4759 if (mode1 != VOIDmode
4760 || !pbitsize.is_constant (&bitsize)
4761 || !pbitpos.is_constant (&bitpos)
4762 || !pbitregion_start.is_constant (&bitregion_start)
4763 || !pbitregion_end.is_constant (&bitregion_end)
4764 || bitsize >= BITS_PER_WORD
4765 || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize)
4766 || str_bitsize > BITS_PER_WORD
4767 || TREE_SIDE_EFFECTS (to)
4768 || TREE_THIS_VOLATILE (to))
4769 return false;
4770
4771 STRIP_NOPS (src);
4772 if (TREE_CODE (src) != SSA_NAME)
4773 return false;
4774 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4775 return false;
4776
4777 srcstmt = get_gimple_for_ssa_name (src);
4778 if (!srcstmt
4779 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4780 return false;
4781
4782 code = gimple_assign_rhs_code (srcstmt);
4783
4784 op0 = gimple_assign_rhs1 (srcstmt);
4785
4786 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4787 to find its initialization. Hopefully the initialization will
4788 be from a bitfield load. */
4789 if (TREE_CODE (op0) == SSA_NAME)
4790 {
4791 gimple *op0stmt = get_gimple_for_ssa_name (op0);
4792
4793 /* We want to eventually have OP0 be the same as TO, which
4794 should be a bitfield. */
4795 if (!op0stmt
4796 || !is_gimple_assign (op0stmt)
4797 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4798 return false;
4799 op0 = gimple_assign_rhs1 (op0stmt);
4800 }
4801
4802 op1 = gimple_assign_rhs2 (srcstmt);
4803
4804 if (!operand_equal_p (to, op0, 0))
4805 return false;
4806
4807 if (MEM_P (str_rtx))
4808 {
4809 unsigned HOST_WIDE_INT offset1;
4810
4811 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4812 str_bitsize = BITS_PER_WORD;
4813
4814 scalar_int_mode best_mode;
4815 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
4816 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode))
4817 return false;
4818 str_mode = best_mode;
4819 str_bitsize = GET_MODE_BITSIZE (best_mode);
4820
4821 offset1 = bitpos;
4822 bitpos %= str_bitsize;
4823 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4824 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4825 }
4826 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4827 return false;
4828
4829 /* If the bit field covers the whole REG/MEM, store_field
4830 will likely generate better code. */
4831 if (bitsize >= str_bitsize)
4832 return false;
4833
4834 /* We can't handle fields split across multiple entities. */
4835 if (bitpos + bitsize > str_bitsize)
4836 return false;
4837
4838 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
4839 bitpos = str_bitsize - bitpos - bitsize;
4840
4841 switch (code)
4842 {
4843 case PLUS_EXPR:
4844 case MINUS_EXPR:
4845 /* For now, just optimize the case of the topmost bitfield
4846 where we don't need to do any masking and also
4847 1 bit bitfields where xor can be used.
4848 We might win by one instruction for the other bitfields
4849 too if insv/extv instructions aren't used, so that
4850 can be added later. */
4851 if ((reverse || bitpos + bitsize != str_bitsize)
4852 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4853 break;
4854
4855 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4856 value = convert_modes (str_mode,
4857 TYPE_MODE (TREE_TYPE (op1)), value,
4858 TYPE_UNSIGNED (TREE_TYPE (op1)));
4859
4860 /* We may be accessing data outside the field, which means
4861 we can alias adjacent data. */
4862 if (MEM_P (str_rtx))
4863 {
4864 str_rtx = shallow_copy_rtx (str_rtx);
4865 set_mem_alias_set (str_rtx, 0);
4866 set_mem_expr (str_rtx, 0);
4867 }
4868
4869 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize))
4870 {
4871 value = expand_and (str_mode, value, const1_rtx, NULL);
4872 binop = xor_optab;
4873 }
4874 else
4875 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4876
4877 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4878 if (reverse)
4879 value = flip_storage_order (str_mode, value);
4880 result = expand_binop (str_mode, binop, str_rtx,
4881 value, str_rtx, 1, OPTAB_WIDEN);
4882 if (result != str_rtx)
4883 emit_move_insn (str_rtx, result);
4884 return true;
4885
4886 case BIT_IOR_EXPR:
4887 case BIT_XOR_EXPR:
4888 if (TREE_CODE (op1) != INTEGER_CST)
4889 break;
4890 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4891 value = convert_modes (str_mode,
4892 TYPE_MODE (TREE_TYPE (op1)), value,
4893 TYPE_UNSIGNED (TREE_TYPE (op1)));
4894
4895 /* We may be accessing data outside the field, which means
4896 we can alias adjacent data. */
4897 if (MEM_P (str_rtx))
4898 {
4899 str_rtx = shallow_copy_rtx (str_rtx);
4900 set_mem_alias_set (str_rtx, 0);
4901 set_mem_expr (str_rtx, 0);
4902 }
4903
4904 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4905 if (bitpos + bitsize != str_bitsize)
4906 {
4907 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1,
4908 str_mode);
4909 value = expand_and (str_mode, value, mask, NULL_RTX);
4910 }
4911 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4912 if (reverse)
4913 value = flip_storage_order (str_mode, value);
4914 result = expand_binop (str_mode, binop, str_rtx,
4915 value, str_rtx, 1, OPTAB_WIDEN);
4916 if (result != str_rtx)
4917 emit_move_insn (str_rtx, result);
4918 return true;
4919
4920 default:
4921 break;
4922 }
4923
4924 return false;
4925 }
4926
4927 /* In the C++ memory model, consecutive bit fields in a structure are
4928 considered one memory location.
4929
4930 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4931 returns the bit range of consecutive bits in which this COMPONENT_REF
4932 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4933 and *OFFSET may be adjusted in the process.
4934
4935 If the access does not need to be restricted, 0 is returned in both
4936 *BITSTART and *BITEND. */
4937
4938 void
get_bit_range(poly_uint64_pod * bitstart,poly_uint64_pod * bitend,tree exp,poly_int64_pod * bitpos,tree * offset)4939 get_bit_range (poly_uint64_pod *bitstart, poly_uint64_pod *bitend, tree exp,
4940 poly_int64_pod *bitpos, tree *offset)
4941 {
4942 poly_int64 bitoffset;
4943 tree field, repr;
4944
4945 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4946
4947 field = TREE_OPERAND (exp, 1);
4948 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4949 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4950 need to limit the range we can access. */
4951 if (!repr)
4952 {
4953 *bitstart = *bitend = 0;
4954 return;
4955 }
4956
4957 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4958 part of a larger bit field, then the representative does not serve any
4959 useful purpose. This can occur in Ada. */
4960 if (handled_component_p (TREE_OPERAND (exp, 0)))
4961 {
4962 machine_mode rmode;
4963 poly_int64 rbitsize, rbitpos;
4964 tree roffset;
4965 int unsignedp, reversep, volatilep = 0;
4966 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4967 &roffset, &rmode, &unsignedp, &reversep,
4968 &volatilep);
4969 if (!multiple_p (rbitpos, BITS_PER_UNIT))
4970 {
4971 *bitstart = *bitend = 0;
4972 return;
4973 }
4974 }
4975
4976 /* Compute the adjustment to bitpos from the offset of the field
4977 relative to the representative. DECL_FIELD_OFFSET of field and
4978 repr are the same by construction if they are not constants,
4979 see finish_bitfield_layout. */
4980 poly_uint64 field_offset, repr_offset;
4981 if (poly_int_tree_p (DECL_FIELD_OFFSET (field), &field_offset)
4982 && poly_int_tree_p (DECL_FIELD_OFFSET (repr), &repr_offset))
4983 bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT;
4984 else
4985 bitoffset = 0;
4986 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4987 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4988
4989 /* If the adjustment is larger than bitpos, we would have a negative bit
4990 position for the lower bound and this may wreak havoc later. Adjust
4991 offset and bitpos to make the lower bound non-negative in that case. */
4992 if (maybe_gt (bitoffset, *bitpos))
4993 {
4994 poly_int64 adjust_bits = upper_bound (bitoffset, *bitpos) - *bitpos;
4995 poly_int64 adjust_bytes = exact_div (adjust_bits, BITS_PER_UNIT);
4996
4997 *bitpos += adjust_bits;
4998 if (*offset == NULL_TREE)
4999 *offset = size_int (-adjust_bytes);
5000 else
5001 *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes));
5002 *bitstart = 0;
5003 }
5004 else
5005 *bitstart = *bitpos - bitoffset;
5006
5007 *bitend = *bitstart + tree_to_poly_uint64 (DECL_SIZE (repr)) - 1;
5008 }
5009
5010 /* Returns true if BASE is a DECL that does not reside in memory and
5011 has non-BLKmode. DECL_RTL must not be a MEM; if
5012 DECL_RTL was not set yet, return false. */
5013
5014 static inline bool
non_mem_decl_p(tree base)5015 non_mem_decl_p (tree base)
5016 {
5017 if (!DECL_P (base)
5018 || TREE_ADDRESSABLE (base)
5019 || DECL_MODE (base) == BLKmode)
5020 return false;
5021
5022 if (!DECL_RTL_SET_P (base))
5023 return false;
5024
5025 return (!MEM_P (DECL_RTL (base)));
5026 }
5027
5028 /* Returns true if REF refers to an object that does not
5029 reside in memory and has non-BLKmode. */
5030
5031 static inline bool
mem_ref_refers_to_non_mem_p(tree ref)5032 mem_ref_refers_to_non_mem_p (tree ref)
5033 {
5034 tree base;
5035
5036 if (TREE_CODE (ref) == MEM_REF
5037 || TREE_CODE (ref) == TARGET_MEM_REF)
5038 {
5039 tree addr = TREE_OPERAND (ref, 0);
5040
5041 if (TREE_CODE (addr) != ADDR_EXPR)
5042 return false;
5043
5044 base = TREE_OPERAND (addr, 0);
5045 }
5046 else
5047 base = ref;
5048
5049 return non_mem_decl_p (base);
5050 }
5051
5052 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5053 is true, try generating a nontemporal store. */
5054
5055 void
expand_assignment(tree to,tree from,bool nontemporal)5056 expand_assignment (tree to, tree from, bool nontemporal)
5057 {
5058 rtx to_rtx = 0;
5059 rtx result;
5060 machine_mode mode;
5061 unsigned int align;
5062 enum insn_code icode;
5063
5064 /* Don't crash if the lhs of the assignment was erroneous. */
5065 if (TREE_CODE (to) == ERROR_MARK)
5066 {
5067 expand_normal (from);
5068 return;
5069 }
5070
5071 /* Optimize away no-op moves without side-effects. */
5072 if (operand_equal_p (to, from, 0))
5073 return;
5074
5075 /* Handle misaligned stores. */
5076 mode = TYPE_MODE (TREE_TYPE (to));
5077 if ((TREE_CODE (to) == MEM_REF
5078 || TREE_CODE (to) == TARGET_MEM_REF
5079 || DECL_P (to))
5080 && mode != BLKmode
5081 && !mem_ref_refers_to_non_mem_p (to)
5082 && ((align = get_object_alignment (to))
5083 < GET_MODE_ALIGNMENT (mode))
5084 && (((icode = optab_handler (movmisalign_optab, mode))
5085 != CODE_FOR_nothing)
5086 || targetm.slow_unaligned_access (mode, align)))
5087 {
5088 rtx reg, mem;
5089
5090 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
5091 reg = force_not_mem (reg);
5092 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5093 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to))
5094 reg = flip_storage_order (mode, reg);
5095
5096 if (icode != CODE_FOR_nothing)
5097 {
5098 class expand_operand ops[2];
5099
5100 create_fixed_operand (&ops[0], mem);
5101 create_input_operand (&ops[1], reg, mode);
5102 /* The movmisalign<mode> pattern cannot fail, else the assignment
5103 would silently be omitted. */
5104 expand_insn (icode, 2, ops);
5105 }
5106 else
5107 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg,
5108 false);
5109 return;
5110 }
5111
5112 /* Assignment of a structure component needs special treatment
5113 if the structure component's rtx is not simply a MEM.
5114 Assignment of an array element at a constant index, and assignment of
5115 an array element in an unaligned packed structure field, has the same
5116 problem. Same for (partially) storing into a non-memory object. */
5117 if (handled_component_p (to)
5118 || (TREE_CODE (to) == MEM_REF
5119 && (REF_REVERSE_STORAGE_ORDER (to)
5120 || mem_ref_refers_to_non_mem_p (to)))
5121 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
5122 {
5123 machine_mode mode1;
5124 poly_int64 bitsize, bitpos;
5125 poly_uint64 bitregion_start = 0;
5126 poly_uint64 bitregion_end = 0;
5127 tree offset;
5128 int unsignedp, reversep, volatilep = 0;
5129 tree tem;
5130
5131 push_temp_slots ();
5132 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
5133 &unsignedp, &reversep, &volatilep);
5134
5135 /* Make sure bitpos is not negative, it can wreak havoc later. */
5136 if (maybe_lt (bitpos, 0))
5137 {
5138 gcc_assert (offset == NULL_TREE);
5139 offset = size_int (bits_to_bytes_round_down (bitpos));
5140 bitpos = num_trailing_bits (bitpos);
5141 }
5142
5143 if (TREE_CODE (to) == COMPONENT_REF
5144 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
5145 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
5146 /* The C++ memory model naturally applies to byte-aligned fields.
5147 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5148 BITSIZE are not byte-aligned, there is no need to limit the range
5149 we can access. This can occur with packed structures in Ada. */
5150 else if (maybe_gt (bitsize, 0)
5151 && multiple_p (bitsize, BITS_PER_UNIT)
5152 && multiple_p (bitpos, BITS_PER_UNIT))
5153 {
5154 bitregion_start = bitpos;
5155 bitregion_end = bitpos + bitsize - 1;
5156 }
5157
5158 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
5159
5160 /* If the field has a mode, we want to access it in the
5161 field's mode, not the computed mode.
5162 If a MEM has VOIDmode (external with incomplete type),
5163 use BLKmode for it instead. */
5164 if (MEM_P (to_rtx))
5165 {
5166 if (mode1 != VOIDmode)
5167 to_rtx = adjust_address (to_rtx, mode1, 0);
5168 else if (GET_MODE (to_rtx) == VOIDmode)
5169 to_rtx = adjust_address (to_rtx, BLKmode, 0);
5170 }
5171
5172 if (offset != 0)
5173 {
5174 machine_mode address_mode;
5175 rtx offset_rtx;
5176
5177 if (!MEM_P (to_rtx))
5178 {
5179 /* We can get constant negative offsets into arrays with broken
5180 user code. Translate this to a trap instead of ICEing. */
5181 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
5182 expand_builtin_trap ();
5183 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
5184 }
5185
5186 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
5187 address_mode = get_address_mode (to_rtx);
5188 if (GET_MODE (offset_rtx) != address_mode)
5189 {
5190 /* We cannot be sure that the RTL in offset_rtx is valid outside
5191 of a memory address context, so force it into a register
5192 before attempting to convert it to the desired mode. */
5193 offset_rtx = force_operand (offset_rtx, NULL_RTX);
5194 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5195 }
5196
5197 /* If we have an expression in OFFSET_RTX and a non-zero
5198 byte offset in BITPOS, adding the byte offset before the
5199 OFFSET_RTX results in better intermediate code, which makes
5200 later rtl optimization passes perform better.
5201
5202 We prefer intermediate code like this:
5203
5204 r124:DI=r123:DI+0x18
5205 [r124:DI]=r121:DI
5206
5207 ... instead of ...
5208
5209 r124:DI=r123:DI+0x10
5210 [r124:DI+0x8]=r121:DI
5211
5212 This is only done for aligned data values, as these can
5213 be expected to result in single move instructions. */
5214 poly_int64 bytepos;
5215 if (mode1 != VOIDmode
5216 && maybe_ne (bitpos, 0)
5217 && maybe_gt (bitsize, 0)
5218 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
5219 && multiple_p (bitpos, bitsize)
5220 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
5221 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
5222 {
5223 to_rtx = adjust_address (to_rtx, mode1, bytepos);
5224 bitregion_start = 0;
5225 if (known_ge (bitregion_end, poly_uint64 (bitpos)))
5226 bitregion_end -= bitpos;
5227 bitpos = 0;
5228 }
5229
5230 to_rtx = offset_address (to_rtx, offset_rtx,
5231 highest_pow2_factor_for_target (to,
5232 offset));
5233 }
5234
5235 /* No action is needed if the target is not a memory and the field
5236 lies completely outside that target. This can occur if the source
5237 code contains an out-of-bounds access to a small array. */
5238 if (!MEM_P (to_rtx)
5239 && GET_MODE (to_rtx) != BLKmode
5240 && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx))))
5241 {
5242 expand_normal (from);
5243 result = NULL;
5244 }
5245 /* Handle expand_expr of a complex value returning a CONCAT. */
5246 else if (GET_CODE (to_rtx) == CONCAT)
5247 {
5248 machine_mode to_mode = GET_MODE (to_rtx);
5249 gcc_checking_assert (COMPLEX_MODE_P (to_mode));
5250 poly_int64 mode_bitsize = GET_MODE_BITSIZE (to_mode);
5251 unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode);
5252 if (TYPE_MODE (TREE_TYPE (from)) == to_mode
5253 && known_eq (bitpos, 0)
5254 && known_eq (bitsize, mode_bitsize))
5255 result = store_expr (from, to_rtx, false, nontemporal, reversep);
5256 else if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE_INNER (to_mode)
5257 && known_eq (bitsize, inner_bitsize)
5258 && (known_eq (bitpos, 0)
5259 || known_eq (bitpos, inner_bitsize)))
5260 result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)),
5261 false, nontemporal, reversep);
5262 else if (known_le (bitpos + bitsize, inner_bitsize))
5263 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5264 bitregion_start, bitregion_end,
5265 mode1, from, get_alias_set (to),
5266 nontemporal, reversep);
5267 else if (known_ge (bitpos, inner_bitsize))
5268 result = store_field (XEXP (to_rtx, 1), bitsize,
5269 bitpos - inner_bitsize,
5270 bitregion_start, bitregion_end,
5271 mode1, from, get_alias_set (to),
5272 nontemporal, reversep);
5273 else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize))
5274 {
5275 result = expand_normal (from);
5276 if (GET_CODE (result) == CONCAT)
5277 {
5278 to_mode = GET_MODE_INNER (to_mode);
5279 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result));
5280 rtx from_real
5281 = simplify_gen_subreg (to_mode, XEXP (result, 0),
5282 from_mode, 0);
5283 rtx from_imag
5284 = simplify_gen_subreg (to_mode, XEXP (result, 1),
5285 from_mode, 0);
5286 if (!from_real || !from_imag)
5287 goto concat_store_slow;
5288 emit_move_insn (XEXP (to_rtx, 0), from_real);
5289 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5290 }
5291 else
5292 {
5293 machine_mode from_mode
5294 = GET_MODE (result) == VOIDmode
5295 ? TYPE_MODE (TREE_TYPE (from))
5296 : GET_MODE (result);
5297 rtx from_rtx;
5298 if (MEM_P (result))
5299 from_rtx = change_address (result, to_mode, NULL_RTX);
5300 else
5301 from_rtx
5302 = simplify_gen_subreg (to_mode, result, from_mode, 0);
5303 if (from_rtx)
5304 {
5305 emit_move_insn (XEXP (to_rtx, 0),
5306 read_complex_part (from_rtx, false));
5307 emit_move_insn (XEXP (to_rtx, 1),
5308 read_complex_part (from_rtx, true));
5309 }
5310 else
5311 {
5312 to_mode = GET_MODE_INNER (to_mode);
5313 rtx from_real
5314 = simplify_gen_subreg (to_mode, result, from_mode, 0);
5315 rtx from_imag
5316 = simplify_gen_subreg (to_mode, result, from_mode,
5317 GET_MODE_SIZE (to_mode));
5318 if (!from_real || !from_imag)
5319 goto concat_store_slow;
5320 emit_move_insn (XEXP (to_rtx, 0), from_real);
5321 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5322 }
5323 }
5324 }
5325 else
5326 {
5327 concat_store_slow:;
5328 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5329 GET_MODE_SIZE (GET_MODE (to_rtx)));
5330 write_complex_part (temp, XEXP (to_rtx, 0), false);
5331 write_complex_part (temp, XEXP (to_rtx, 1), true);
5332 result = store_field (temp, bitsize, bitpos,
5333 bitregion_start, bitregion_end,
5334 mode1, from, get_alias_set (to),
5335 nontemporal, reversep);
5336 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5337 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5338 }
5339 }
5340 /* For calls to functions returning variable length structures, if TO_RTX
5341 is not a MEM, go through a MEM because we must not create temporaries
5342 of the VLA type. */
5343 else if (!MEM_P (to_rtx)
5344 && TREE_CODE (from) == CALL_EXPR
5345 && COMPLETE_TYPE_P (TREE_TYPE (from))
5346 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) != INTEGER_CST)
5347 {
5348 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5349 GET_MODE_SIZE (GET_MODE (to_rtx)));
5350 result = store_field (temp, bitsize, bitpos, bitregion_start,
5351 bitregion_end, mode1, from, get_alias_set (to),
5352 nontemporal, reversep);
5353 emit_move_insn (to_rtx, temp);
5354 }
5355 else
5356 {
5357 if (MEM_P (to_rtx))
5358 {
5359 /* If the field is at offset zero, we could have been given the
5360 DECL_RTX of the parent struct. Don't munge it. */
5361 to_rtx = shallow_copy_rtx (to_rtx);
5362 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5363 if (volatilep)
5364 MEM_VOLATILE_P (to_rtx) = 1;
5365 }
5366
5367 gcc_checking_assert (known_ge (bitpos, 0));
5368 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5369 bitregion_start, bitregion_end,
5370 mode1, to_rtx, to, from,
5371 reversep))
5372 result = NULL;
5373 else
5374 result = store_field (to_rtx, bitsize, bitpos,
5375 bitregion_start, bitregion_end,
5376 mode1, from, get_alias_set (to),
5377 nontemporal, reversep);
5378 }
5379
5380 if (result)
5381 preserve_temp_slots (result);
5382 pop_temp_slots ();
5383 return;
5384 }
5385
5386 /* If the rhs is a function call and its value is not an aggregate,
5387 call the function before we start to compute the lhs.
5388 This is needed for correct code for cases such as
5389 val = setjmp (buf) on machines where reference to val
5390 requires loading up part of an address in a separate insn.
5391
5392 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5393 since it might be a promoted variable where the zero- or sign- extension
5394 needs to be done. Handling this in the normal way is safe because no
5395 computation is done before the call. The same is true for SSA names. */
5396 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5397 && COMPLETE_TYPE_P (TREE_TYPE (from))
5398 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5399 && ! (((VAR_P (to)
5400 || TREE_CODE (to) == PARM_DECL
5401 || TREE_CODE (to) == RESULT_DECL)
5402 && REG_P (DECL_RTL (to)))
5403 || TREE_CODE (to) == SSA_NAME))
5404 {
5405 rtx value;
5406
5407 push_temp_slots ();
5408 value = expand_normal (from);
5409
5410 if (to_rtx == 0)
5411 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5412
5413 /* Handle calls that return values in multiple non-contiguous locations.
5414 The Irix 6 ABI has examples of this. */
5415 if (GET_CODE (to_rtx) == PARALLEL)
5416 {
5417 if (GET_CODE (value) == PARALLEL)
5418 emit_group_move (to_rtx, value);
5419 else
5420 emit_group_load (to_rtx, value, TREE_TYPE (from),
5421 int_size_in_bytes (TREE_TYPE (from)));
5422 }
5423 else if (GET_CODE (value) == PARALLEL)
5424 emit_group_store (to_rtx, value, TREE_TYPE (from),
5425 int_size_in_bytes (TREE_TYPE (from)));
5426 else if (GET_MODE (to_rtx) == BLKmode)
5427 {
5428 /* Handle calls that return BLKmode values in registers. */
5429 if (REG_P (value))
5430 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5431 else
5432 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5433 }
5434 else
5435 {
5436 if (POINTER_TYPE_P (TREE_TYPE (to)))
5437 value = convert_memory_address_addr_space
5438 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value,
5439 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5440
5441 emit_move_insn (to_rtx, value);
5442 }
5443
5444 preserve_temp_slots (to_rtx);
5445 pop_temp_slots ();
5446 return;
5447 }
5448
5449 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5450 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5451
5452 /* Don't move directly into a return register. */
5453 if (TREE_CODE (to) == RESULT_DECL
5454 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5455 {
5456 rtx temp;
5457
5458 push_temp_slots ();
5459
5460 /* If the source is itself a return value, it still is in a pseudo at
5461 this point so we can move it back to the return register directly. */
5462 if (REG_P (to_rtx)
5463 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5464 && TREE_CODE (from) != CALL_EXPR)
5465 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5466 else
5467 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5468
5469 /* Handle calls that return values in multiple non-contiguous locations.
5470 The Irix 6 ABI has examples of this. */
5471 if (GET_CODE (to_rtx) == PARALLEL)
5472 {
5473 if (GET_CODE (temp) == PARALLEL)
5474 emit_group_move (to_rtx, temp);
5475 else
5476 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5477 int_size_in_bytes (TREE_TYPE (from)));
5478 }
5479 else if (temp)
5480 emit_move_insn (to_rtx, temp);
5481
5482 preserve_temp_slots (to_rtx);
5483 pop_temp_slots ();
5484 return;
5485 }
5486
5487 /* In case we are returning the contents of an object which overlaps
5488 the place the value is being stored, use a safe function when copying
5489 a value through a pointer into a structure value return block. */
5490 if (TREE_CODE (to) == RESULT_DECL
5491 && TREE_CODE (from) == INDIRECT_REF
5492 && ADDR_SPACE_GENERIC_P
5493 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5494 && refs_may_alias_p (to, from)
5495 && cfun->returns_struct
5496 && !cfun->returns_pcc_struct)
5497 {
5498 rtx from_rtx, size;
5499
5500 push_temp_slots ();
5501 size = expr_size (from);
5502 from_rtx = expand_normal (from);
5503
5504 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size);
5505
5506 preserve_temp_slots (to_rtx);
5507 pop_temp_slots ();
5508 return;
5509 }
5510
5511 /* Compute FROM and store the value in the rtx we got. */
5512
5513 push_temp_slots ();
5514 result = store_expr (from, to_rtx, 0, nontemporal, false);
5515 preserve_temp_slots (result);
5516 pop_temp_slots ();
5517 return;
5518 }
5519
5520 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5521 succeeded, false otherwise. */
5522
5523 bool
emit_storent_insn(rtx to,rtx from)5524 emit_storent_insn (rtx to, rtx from)
5525 {
5526 class expand_operand ops[2];
5527 machine_mode mode = GET_MODE (to);
5528 enum insn_code code = optab_handler (storent_optab, mode);
5529
5530 if (code == CODE_FOR_nothing)
5531 return false;
5532
5533 create_fixed_operand (&ops[0], to);
5534 create_input_operand (&ops[1], from, mode);
5535 return maybe_expand_insn (code, 2, ops);
5536 }
5537
5538 /* Helper function for store_expr storing of STRING_CST. */
5539
5540 static rtx
string_cst_read_str(void * data,HOST_WIDE_INT offset,scalar_int_mode mode)5541 string_cst_read_str (void *data, HOST_WIDE_INT offset, scalar_int_mode mode)
5542 {
5543 tree str = (tree) data;
5544
5545 gcc_assert (offset >= 0);
5546 if (offset >= TREE_STRING_LENGTH (str))
5547 return const0_rtx;
5548
5549 if ((unsigned HOST_WIDE_INT) offset + GET_MODE_SIZE (mode)
5550 > (unsigned HOST_WIDE_INT) TREE_STRING_LENGTH (str))
5551 {
5552 char *p = XALLOCAVEC (char, GET_MODE_SIZE (mode));
5553 size_t l = TREE_STRING_LENGTH (str) - offset;
5554 memcpy (p, TREE_STRING_POINTER (str) + offset, l);
5555 memset (p + l, '\0', GET_MODE_SIZE (mode) - l);
5556 return c_readstr (p, mode, false);
5557 }
5558
5559 return c_readstr (TREE_STRING_POINTER (str) + offset, mode, false);
5560 }
5561
5562 /* Generate code for computing expression EXP,
5563 and storing the value into TARGET.
5564
5565 If the mode is BLKmode then we may return TARGET itself.
5566 It turns out that in BLKmode it doesn't cause a problem.
5567 because C has no operators that could combine two different
5568 assignments into the same BLKmode object with different values
5569 with no sequence point. Will other languages need this to
5570 be more thorough?
5571
5572 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5573 stack, and block moves may need to be treated specially.
5574
5575 If NONTEMPORAL is true, try using a nontemporal store instruction.
5576
5577 If REVERSE is true, the store is to be done in reverse order. */
5578
5579 rtx
store_expr(tree exp,rtx target,int call_param_p,bool nontemporal,bool reverse)5580 store_expr (tree exp, rtx target, int call_param_p,
5581 bool nontemporal, bool reverse)
5582 {
5583 rtx temp;
5584 rtx alt_rtl = NULL_RTX;
5585 location_t loc = curr_insn_location ();
5586
5587 if (VOID_TYPE_P (TREE_TYPE (exp)))
5588 {
5589 /* C++ can generate ?: expressions with a throw expression in one
5590 branch and an rvalue in the other. Here, we resolve attempts to
5591 store the throw expression's nonexistent result. */
5592 gcc_assert (!call_param_p);
5593 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5594 return NULL_RTX;
5595 }
5596 if (TREE_CODE (exp) == COMPOUND_EXPR)
5597 {
5598 /* Perform first part of compound expression, then assign from second
5599 part. */
5600 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5601 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5602 return store_expr (TREE_OPERAND (exp, 1), target,
5603 call_param_p, nontemporal, reverse);
5604 }
5605 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5606 {
5607 /* For conditional expression, get safe form of the target. Then
5608 test the condition, doing the appropriate assignment on either
5609 side. This avoids the creation of unnecessary temporaries.
5610 For non-BLKmode, it is more efficient not to do this. */
5611
5612 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5613
5614 do_pending_stack_adjust ();
5615 NO_DEFER_POP;
5616 jumpifnot (TREE_OPERAND (exp, 0), lab1,
5617 profile_probability::uninitialized ());
5618 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5619 nontemporal, reverse);
5620 emit_jump_insn (targetm.gen_jump (lab2));
5621 emit_barrier ();
5622 emit_label (lab1);
5623 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5624 nontemporal, reverse);
5625 emit_label (lab2);
5626 OK_DEFER_POP;
5627
5628 return NULL_RTX;
5629 }
5630 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5631 /* If this is a scalar in a register that is stored in a wider mode
5632 than the declared mode, compute the result into its declared mode
5633 and then convert to the wider mode. Our value is the computed
5634 expression. */
5635 {
5636 rtx inner_target = 0;
5637 scalar_int_mode outer_mode = subreg_unpromoted_mode (target);
5638 scalar_int_mode inner_mode = subreg_promoted_mode (target);
5639
5640 /* We can do the conversion inside EXP, which will often result
5641 in some optimizations. Do the conversion in two steps: first
5642 change the signedness, if needed, then the extend. But don't
5643 do this if the type of EXP is a subtype of something else
5644 since then the conversion might involve more than just
5645 converting modes. */
5646 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5647 && TREE_TYPE (TREE_TYPE (exp)) == 0
5648 && GET_MODE_PRECISION (outer_mode)
5649 == TYPE_PRECISION (TREE_TYPE (exp)))
5650 {
5651 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5652 TYPE_UNSIGNED (TREE_TYPE (exp))))
5653 {
5654 /* Some types, e.g. Fortran's logical*4, won't have a signed
5655 version, so use the mode instead. */
5656 tree ntype
5657 = (signed_or_unsigned_type_for
5658 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5659 if (ntype == NULL)
5660 ntype = lang_hooks.types.type_for_mode
5661 (TYPE_MODE (TREE_TYPE (exp)),
5662 SUBREG_PROMOTED_SIGN (target));
5663
5664 exp = fold_convert_loc (loc, ntype, exp);
5665 }
5666
5667 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5668 (inner_mode, SUBREG_PROMOTED_SIGN (target)),
5669 exp);
5670
5671 inner_target = SUBREG_REG (target);
5672 }
5673
5674 temp = expand_expr (exp, inner_target, VOIDmode,
5675 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5676
5677
5678 /* If TEMP is a VOIDmode constant, use convert_modes to make
5679 sure that we properly convert it. */
5680 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5681 {
5682 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)),
5683 temp, SUBREG_PROMOTED_SIGN (target));
5684 temp = convert_modes (inner_mode, outer_mode, temp,
5685 SUBREG_PROMOTED_SIGN (target));
5686 }
5687
5688 convert_move (SUBREG_REG (target), temp,
5689 SUBREG_PROMOTED_SIGN (target));
5690
5691 return NULL_RTX;
5692 }
5693 else if ((TREE_CODE (exp) == STRING_CST
5694 || (TREE_CODE (exp) == MEM_REF
5695 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5696 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5697 == STRING_CST
5698 && integer_zerop (TREE_OPERAND (exp, 1))))
5699 && !nontemporal && !call_param_p
5700 && MEM_P (target))
5701 {
5702 /* Optimize initialization of an array with a STRING_CST. */
5703 HOST_WIDE_INT exp_len, str_copy_len;
5704 rtx dest_mem;
5705 tree str = TREE_CODE (exp) == STRING_CST
5706 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5707
5708 exp_len = int_expr_size (exp);
5709 if (exp_len <= 0)
5710 goto normal_expr;
5711
5712 if (TREE_STRING_LENGTH (str) <= 0)
5713 goto normal_expr;
5714
5715 if (can_store_by_pieces (exp_len, string_cst_read_str, (void *) str,
5716 MEM_ALIGN (target), false))
5717 {
5718 store_by_pieces (target, exp_len, string_cst_read_str, (void *) str,
5719 MEM_ALIGN (target), false, RETURN_BEGIN);
5720 return NULL_RTX;
5721 }
5722
5723 str_copy_len = TREE_STRING_LENGTH (str);
5724 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0)
5725 {
5726 str_copy_len += STORE_MAX_PIECES - 1;
5727 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5728 }
5729 if (str_copy_len >= exp_len)
5730 goto normal_expr;
5731
5732 if (!can_store_by_pieces (str_copy_len, string_cst_read_str,
5733 (void *) str, MEM_ALIGN (target), false))
5734 goto normal_expr;
5735
5736 dest_mem = store_by_pieces (target, str_copy_len, string_cst_read_str,
5737 (void *) str, MEM_ALIGN (target), false,
5738 RETURN_END);
5739 clear_storage (adjust_address_1 (dest_mem, BLKmode, 0, 1, 1, 0,
5740 exp_len - str_copy_len),
5741 GEN_INT (exp_len - str_copy_len), BLOCK_OP_NORMAL);
5742 return NULL_RTX;
5743 }
5744 else
5745 {
5746 rtx tmp_target;
5747
5748 normal_expr:
5749 /* If we want to use a nontemporal or a reverse order store, force the
5750 value into a register first. */
5751 tmp_target = nontemporal || reverse ? NULL_RTX : target;
5752 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5753 (call_param_p
5754 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5755 &alt_rtl, false);
5756 }
5757
5758 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5759 the same as that of TARGET, adjust the constant. This is needed, for
5760 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5761 only a word-sized value. */
5762 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5763 && TREE_CODE (exp) != ERROR_MARK
5764 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5765 {
5766 if (GET_MODE_CLASS (GET_MODE (target))
5767 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp)))
5768 && known_eq (GET_MODE_BITSIZE (GET_MODE (target)),
5769 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)))))
5770 {
5771 rtx t = simplify_gen_subreg (GET_MODE (target), temp,
5772 TYPE_MODE (TREE_TYPE (exp)), 0);
5773 if (t)
5774 temp = t;
5775 }
5776 if (GET_MODE (temp) == VOIDmode)
5777 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5778 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5779 }
5780
5781 /* If value was not generated in the target, store it there.
5782 Convert the value to TARGET's type first if necessary and emit the
5783 pending incrementations that have been queued when expanding EXP.
5784 Note that we cannot emit the whole queue blindly because this will
5785 effectively disable the POST_INC optimization later.
5786
5787 If TEMP and TARGET compare equal according to rtx_equal_p, but
5788 one or both of them are volatile memory refs, we have to distinguish
5789 two cases:
5790 - expand_expr has used TARGET. In this case, we must not generate
5791 another copy. This can be detected by TARGET being equal according
5792 to == .
5793 - expand_expr has not used TARGET - that means that the source just
5794 happens to have the same RTX form. Since temp will have been created
5795 by expand_expr, it will compare unequal according to == .
5796 We must generate a copy in this case, to reach the correct number
5797 of volatile memory references. */
5798
5799 if ((! rtx_equal_p (temp, target)
5800 || (temp != target && (side_effects_p (temp)
5801 || side_effects_p (target))))
5802 && TREE_CODE (exp) != ERROR_MARK
5803 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5804 but TARGET is not valid memory reference, TEMP will differ
5805 from TARGET although it is really the same location. */
5806 && !(alt_rtl
5807 && rtx_equal_p (alt_rtl, target)
5808 && !side_effects_p (alt_rtl)
5809 && !side_effects_p (target))
5810 /* If there's nothing to copy, don't bother. Don't call
5811 expr_size unless necessary, because some front-ends (C++)
5812 expr_size-hook must not be given objects that are not
5813 supposed to be bit-copied or bit-initialized. */
5814 && expr_size (exp) != const0_rtx)
5815 {
5816 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5817 {
5818 if (GET_MODE (target) == BLKmode)
5819 {
5820 /* Handle calls that return BLKmode values in registers. */
5821 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5822 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5823 else
5824 store_bit_field (target,
5825 rtx_to_poly_int64 (expr_size (exp))
5826 * BITS_PER_UNIT,
5827 0, 0, 0, GET_MODE (temp), temp, reverse);
5828 }
5829 else
5830 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5831 }
5832
5833 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5834 {
5835 /* Handle copying a string constant into an array. The string
5836 constant may be shorter than the array. So copy just the string's
5837 actual length, and clear the rest. First get the size of the data
5838 type of the string, which is actually the size of the target. */
5839 rtx size = expr_size (exp);
5840
5841 if (CONST_INT_P (size)
5842 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5843 emit_block_move (target, temp, size,
5844 (call_param_p
5845 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5846 else
5847 {
5848 machine_mode pointer_mode
5849 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5850 machine_mode address_mode = get_address_mode (target);
5851
5852 /* Compute the size of the data to copy from the string. */
5853 tree copy_size
5854 = size_binop_loc (loc, MIN_EXPR,
5855 make_tree (sizetype, size),
5856 size_int (TREE_STRING_LENGTH (exp)));
5857 rtx copy_size_rtx
5858 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5859 (call_param_p
5860 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5861 rtx_code_label *label = 0;
5862
5863 /* Copy that much. */
5864 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5865 TYPE_UNSIGNED (sizetype));
5866 emit_block_move (target, temp, copy_size_rtx,
5867 (call_param_p
5868 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5869
5870 /* Figure out how much is left in TARGET that we have to clear.
5871 Do all calculations in pointer_mode. */
5872 poly_int64 const_copy_size;
5873 if (poly_int_rtx_p (copy_size_rtx, &const_copy_size))
5874 {
5875 size = plus_constant (address_mode, size, -const_copy_size);
5876 target = adjust_address (target, BLKmode, const_copy_size);
5877 }
5878 else
5879 {
5880 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5881 copy_size_rtx, NULL_RTX, 0,
5882 OPTAB_LIB_WIDEN);
5883
5884 if (GET_MODE (copy_size_rtx) != address_mode)
5885 copy_size_rtx = convert_to_mode (address_mode,
5886 copy_size_rtx,
5887 TYPE_UNSIGNED (sizetype));
5888
5889 target = offset_address (target, copy_size_rtx,
5890 highest_pow2_factor (copy_size));
5891 label = gen_label_rtx ();
5892 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5893 GET_MODE (size), 0, label);
5894 }
5895
5896 if (size != const0_rtx)
5897 clear_storage (target, size, BLOCK_OP_NORMAL);
5898
5899 if (label)
5900 emit_label (label);
5901 }
5902 }
5903 /* Handle calls that return values in multiple non-contiguous locations.
5904 The Irix 6 ABI has examples of this. */
5905 else if (GET_CODE (target) == PARALLEL)
5906 {
5907 if (GET_CODE (temp) == PARALLEL)
5908 emit_group_move (target, temp);
5909 else
5910 emit_group_load (target, temp, TREE_TYPE (exp),
5911 int_size_in_bytes (TREE_TYPE (exp)));
5912 }
5913 else if (GET_CODE (temp) == PARALLEL)
5914 emit_group_store (target, temp, TREE_TYPE (exp),
5915 int_size_in_bytes (TREE_TYPE (exp)));
5916 else if (GET_MODE (temp) == BLKmode)
5917 emit_block_move (target, temp, expr_size (exp),
5918 (call_param_p
5919 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5920 /* If we emit a nontemporal store, there is nothing else to do. */
5921 else if (nontemporal && emit_storent_insn (target, temp))
5922 ;
5923 else
5924 {
5925 if (reverse)
5926 temp = flip_storage_order (GET_MODE (target), temp);
5927 temp = force_operand (temp, target);
5928 if (temp != target)
5929 emit_move_insn (target, temp);
5930 }
5931 }
5932
5933 return NULL_RTX;
5934 }
5935
5936 /* Return true if field F of structure TYPE is a flexible array. */
5937
5938 static bool
flexible_array_member_p(const_tree f,const_tree type)5939 flexible_array_member_p (const_tree f, const_tree type)
5940 {
5941 const_tree tf;
5942
5943 tf = TREE_TYPE (f);
5944 return (DECL_CHAIN (f) == NULL
5945 && TREE_CODE (tf) == ARRAY_TYPE
5946 && TYPE_DOMAIN (tf)
5947 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5948 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5949 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5950 && int_size_in_bytes (type) >= 0);
5951 }
5952
5953 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5954 must have in order for it to completely initialize a value of type TYPE.
5955 Return -1 if the number isn't known.
5956
5957 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5958
5959 static HOST_WIDE_INT
count_type_elements(const_tree type,bool for_ctor_p)5960 count_type_elements (const_tree type, bool for_ctor_p)
5961 {
5962 switch (TREE_CODE (type))
5963 {
5964 case ARRAY_TYPE:
5965 {
5966 tree nelts;
5967
5968 nelts = array_type_nelts (type);
5969 if (nelts && tree_fits_uhwi_p (nelts))
5970 {
5971 unsigned HOST_WIDE_INT n;
5972
5973 n = tree_to_uhwi (nelts) + 1;
5974 if (n == 0 || for_ctor_p)
5975 return n;
5976 else
5977 return n * count_type_elements (TREE_TYPE (type), false);
5978 }
5979 return for_ctor_p ? -1 : 1;
5980 }
5981
5982 case RECORD_TYPE:
5983 {
5984 unsigned HOST_WIDE_INT n;
5985 tree f;
5986
5987 n = 0;
5988 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5989 if (TREE_CODE (f) == FIELD_DECL)
5990 {
5991 if (!for_ctor_p)
5992 n += count_type_elements (TREE_TYPE (f), false);
5993 else if (!flexible_array_member_p (f, type))
5994 /* Don't count flexible arrays, which are not supposed
5995 to be initialized. */
5996 n += 1;
5997 }
5998
5999 return n;
6000 }
6001
6002 case UNION_TYPE:
6003 case QUAL_UNION_TYPE:
6004 {
6005 tree f;
6006 HOST_WIDE_INT n, m;
6007
6008 gcc_assert (!for_ctor_p);
6009 /* Estimate the number of scalars in each field and pick the
6010 maximum. Other estimates would do instead; the idea is simply
6011 to make sure that the estimate is not sensitive to the ordering
6012 of the fields. */
6013 n = 1;
6014 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
6015 if (TREE_CODE (f) == FIELD_DECL)
6016 {
6017 m = count_type_elements (TREE_TYPE (f), false);
6018 /* If the field doesn't span the whole union, add an extra
6019 scalar for the rest. */
6020 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
6021 TYPE_SIZE (type)) != 1)
6022 m++;
6023 if (n < m)
6024 n = m;
6025 }
6026 return n;
6027 }
6028
6029 case COMPLEX_TYPE:
6030 return 2;
6031
6032 case VECTOR_TYPE:
6033 {
6034 unsigned HOST_WIDE_INT nelts;
6035 if (TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts))
6036 return nelts;
6037 else
6038 return -1;
6039 }
6040
6041 case INTEGER_TYPE:
6042 case REAL_TYPE:
6043 case FIXED_POINT_TYPE:
6044 case ENUMERAL_TYPE:
6045 case BOOLEAN_TYPE:
6046 case POINTER_TYPE:
6047 case OFFSET_TYPE:
6048 case REFERENCE_TYPE:
6049 case NULLPTR_TYPE:
6050 return 1;
6051
6052 case ERROR_MARK:
6053 return 0;
6054
6055 case VOID_TYPE:
6056 case METHOD_TYPE:
6057 case FUNCTION_TYPE:
6058 case LANG_TYPE:
6059 default:
6060 gcc_unreachable ();
6061 }
6062 }
6063
6064 /* Helper for categorize_ctor_elements. Identical interface. */
6065
6066 static bool
categorize_ctor_elements_1(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_unique_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)6067 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6068 HOST_WIDE_INT *p_unique_nz_elts,
6069 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6070 {
6071 unsigned HOST_WIDE_INT idx;
6072 HOST_WIDE_INT nz_elts, unique_nz_elts, init_elts, num_fields;
6073 tree value, purpose, elt_type;
6074
6075 /* Whether CTOR is a valid constant initializer, in accordance with what
6076 initializer_constant_valid_p does. If inferred from the constructor
6077 elements, true until proven otherwise. */
6078 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
6079 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
6080
6081 nz_elts = 0;
6082 unique_nz_elts = 0;
6083 init_elts = 0;
6084 num_fields = 0;
6085 elt_type = NULL_TREE;
6086
6087 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
6088 {
6089 HOST_WIDE_INT mult = 1;
6090
6091 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
6092 {
6093 tree lo_index = TREE_OPERAND (purpose, 0);
6094 tree hi_index = TREE_OPERAND (purpose, 1);
6095
6096 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
6097 mult = (tree_to_uhwi (hi_index)
6098 - tree_to_uhwi (lo_index) + 1);
6099 }
6100 num_fields += mult;
6101 elt_type = TREE_TYPE (value);
6102
6103 switch (TREE_CODE (value))
6104 {
6105 case CONSTRUCTOR:
6106 {
6107 HOST_WIDE_INT nz = 0, unz = 0, ic = 0;
6108
6109 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &unz,
6110 &ic, p_complete);
6111
6112 nz_elts += mult * nz;
6113 unique_nz_elts += unz;
6114 init_elts += mult * ic;
6115
6116 if (const_from_elts_p && const_p)
6117 const_p = const_elt_p;
6118 }
6119 break;
6120
6121 case INTEGER_CST:
6122 case REAL_CST:
6123 case FIXED_CST:
6124 if (!initializer_zerop (value))
6125 {
6126 nz_elts += mult;
6127 unique_nz_elts++;
6128 }
6129 init_elts += mult;
6130 break;
6131
6132 case STRING_CST:
6133 nz_elts += mult * TREE_STRING_LENGTH (value);
6134 unique_nz_elts += TREE_STRING_LENGTH (value);
6135 init_elts += mult * TREE_STRING_LENGTH (value);
6136 break;
6137
6138 case COMPLEX_CST:
6139 if (!initializer_zerop (TREE_REALPART (value)))
6140 {
6141 nz_elts += mult;
6142 unique_nz_elts++;
6143 }
6144 if (!initializer_zerop (TREE_IMAGPART (value)))
6145 {
6146 nz_elts += mult;
6147 unique_nz_elts++;
6148 }
6149 init_elts += 2 * mult;
6150 break;
6151
6152 case VECTOR_CST:
6153 {
6154 /* We can only construct constant-length vectors using
6155 CONSTRUCTOR. */
6156 unsigned int nunits = VECTOR_CST_NELTS (value).to_constant ();
6157 for (unsigned int i = 0; i < nunits; ++i)
6158 {
6159 tree v = VECTOR_CST_ELT (value, i);
6160 if (!initializer_zerop (v))
6161 {
6162 nz_elts += mult;
6163 unique_nz_elts++;
6164 }
6165 init_elts += mult;
6166 }
6167 }
6168 break;
6169
6170 default:
6171 {
6172 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
6173 nz_elts += mult * tc;
6174 unique_nz_elts += tc;
6175 init_elts += mult * tc;
6176
6177 if (const_from_elts_p && const_p)
6178 const_p
6179 = initializer_constant_valid_p (value,
6180 elt_type,
6181 TYPE_REVERSE_STORAGE_ORDER
6182 (TREE_TYPE (ctor)))
6183 != NULL_TREE;
6184 }
6185 break;
6186 }
6187 }
6188
6189 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
6190 num_fields, elt_type))
6191 *p_complete = false;
6192
6193 *p_nz_elts += nz_elts;
6194 *p_unique_nz_elts += unique_nz_elts;
6195 *p_init_elts += init_elts;
6196
6197 return const_p;
6198 }
6199
6200 /* Examine CTOR to discover:
6201 * how many scalar fields are set to nonzero values,
6202 and place it in *P_NZ_ELTS;
6203 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6204 high - low + 1 (this can be useful for callers to determine ctors
6205 that could be cheaply initialized with - perhaps nested - loops
6206 compared to copied from huge read-only data),
6207 and place it in *P_UNIQUE_NZ_ELTS;
6208 * how many scalar fields in total are in CTOR,
6209 and place it in *P_ELT_COUNT.
6210 * whether the constructor is complete -- in the sense that every
6211 meaningful byte is explicitly given a value --
6212 and place it in *P_COMPLETE.
6213
6214 Return whether or not CTOR is a valid static constant initializer, the same
6215 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6216
6217 bool
categorize_ctor_elements(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_unique_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)6218 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6219 HOST_WIDE_INT *p_unique_nz_elts,
6220 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6221 {
6222 *p_nz_elts = 0;
6223 *p_unique_nz_elts = 0;
6224 *p_init_elts = 0;
6225 *p_complete = true;
6226
6227 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_unique_nz_elts,
6228 p_init_elts, p_complete);
6229 }
6230
6231 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6232 of which had type LAST_TYPE. Each element was itself a complete
6233 initializer, in the sense that every meaningful byte was explicitly
6234 given a value. Return true if the same is true for the constructor
6235 as a whole. */
6236
6237 bool
complete_ctor_at_level_p(const_tree type,HOST_WIDE_INT num_elts,const_tree last_type)6238 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
6239 const_tree last_type)
6240 {
6241 if (TREE_CODE (type) == UNION_TYPE
6242 || TREE_CODE (type) == QUAL_UNION_TYPE)
6243 {
6244 if (num_elts == 0)
6245 return false;
6246
6247 gcc_assert (num_elts == 1 && last_type);
6248
6249 /* ??? We could look at each element of the union, and find the
6250 largest element. Which would avoid comparing the size of the
6251 initialized element against any tail padding in the union.
6252 Doesn't seem worth the effort... */
6253 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
6254 }
6255
6256 return count_type_elements (type, true) == num_elts;
6257 }
6258
6259 /* Return 1 if EXP contains mostly (3/4) zeros. */
6260
6261 static int
mostly_zeros_p(const_tree exp)6262 mostly_zeros_p (const_tree exp)
6263 {
6264 if (TREE_CODE (exp) == CONSTRUCTOR)
6265 {
6266 HOST_WIDE_INT nz_elts, unz_elts, init_elts;
6267 bool complete_p;
6268
6269 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts,
6270 &complete_p);
6271 return !complete_p || nz_elts < init_elts / 4;
6272 }
6273
6274 return initializer_zerop (exp);
6275 }
6276
6277 /* Return 1 if EXP contains all zeros. */
6278
6279 static int
all_zeros_p(const_tree exp)6280 all_zeros_p (const_tree exp)
6281 {
6282 if (TREE_CODE (exp) == CONSTRUCTOR)
6283 {
6284 HOST_WIDE_INT nz_elts, unz_elts, init_elts;
6285 bool complete_p;
6286
6287 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts,
6288 &complete_p);
6289 return nz_elts == 0;
6290 }
6291
6292 return initializer_zerop (exp);
6293 }
6294
6295 /* Helper function for store_constructor.
6296 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6297 CLEARED is as for store_constructor.
6298 ALIAS_SET is the alias set to use for any stores.
6299 If REVERSE is true, the store is to be done in reverse order.
6300
6301 This provides a recursive shortcut back to store_constructor when it isn't
6302 necessary to go through store_field. This is so that we can pass through
6303 the cleared field to let store_constructor know that we may not have to
6304 clear a substructure if the outer structure has already been cleared. */
6305
6306 static void
store_constructor_field(rtx target,poly_uint64 bitsize,poly_int64 bitpos,poly_uint64 bitregion_start,poly_uint64 bitregion_end,machine_mode mode,tree exp,int cleared,alias_set_type alias_set,bool reverse)6307 store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos,
6308 poly_uint64 bitregion_start,
6309 poly_uint64 bitregion_end,
6310 machine_mode mode,
6311 tree exp, int cleared,
6312 alias_set_type alias_set, bool reverse)
6313 {
6314 poly_int64 bytepos;
6315 poly_uint64 bytesize;
6316 if (TREE_CODE (exp) == CONSTRUCTOR
6317 /* We can only call store_constructor recursively if the size and
6318 bit position are on a byte boundary. */
6319 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
6320 && maybe_ne (bitsize, 0U)
6321 && multiple_p (bitsize, BITS_PER_UNIT, &bytesize)
6322 /* If we have a nonzero bitpos for a register target, then we just
6323 let store_field do the bitfield handling. This is unlikely to
6324 generate unnecessary clear instructions anyways. */
6325 && (known_eq (bitpos, 0) || MEM_P (target)))
6326 {
6327 if (MEM_P (target))
6328 {
6329 machine_mode target_mode = GET_MODE (target);
6330 if (target_mode != BLKmode
6331 && !multiple_p (bitpos, GET_MODE_ALIGNMENT (target_mode)))
6332 target_mode = BLKmode;
6333 target = adjust_address (target, target_mode, bytepos);
6334 }
6335
6336
6337 /* Update the alias set, if required. */
6338 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
6339 && MEM_ALIAS_SET (target) != 0)
6340 {
6341 target = copy_rtx (target);
6342 set_mem_alias_set (target, alias_set);
6343 }
6344
6345 store_constructor (exp, target, cleared, bytesize, reverse);
6346 }
6347 else
6348 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode,
6349 exp, alias_set, false, reverse);
6350 }
6351
6352
6353 /* Returns the number of FIELD_DECLs in TYPE. */
6354
6355 static int
fields_length(const_tree type)6356 fields_length (const_tree type)
6357 {
6358 tree t = TYPE_FIELDS (type);
6359 int count = 0;
6360
6361 for (; t; t = DECL_CHAIN (t))
6362 if (TREE_CODE (t) == FIELD_DECL)
6363 ++count;
6364
6365 return count;
6366 }
6367
6368
6369 /* Store the value of constructor EXP into the rtx TARGET.
6370 TARGET is either a REG or a MEM; we know it cannot conflict, since
6371 safe_from_p has been called.
6372 CLEARED is true if TARGET is known to have been zero'd.
6373 SIZE is the number of bytes of TARGET we are allowed to modify: this
6374 may not be the same as the size of EXP if we are assigning to a field
6375 which has been packed to exclude padding bits.
6376 If REVERSE is true, the store is to be done in reverse order. */
6377
6378 static void
store_constructor(tree exp,rtx target,int cleared,poly_int64 size,bool reverse)6379 store_constructor (tree exp, rtx target, int cleared, poly_int64 size,
6380 bool reverse)
6381 {
6382 tree type = TREE_TYPE (exp);
6383 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6384 poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0;
6385
6386 switch (TREE_CODE (type))
6387 {
6388 case RECORD_TYPE:
6389 case UNION_TYPE:
6390 case QUAL_UNION_TYPE:
6391 {
6392 unsigned HOST_WIDE_INT idx;
6393 tree field, value;
6394
6395 /* The storage order is specified for every aggregate type. */
6396 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6397
6398 /* If size is zero or the target is already cleared, do nothing. */
6399 if (known_eq (size, 0) || cleared)
6400 cleared = 1;
6401 /* We either clear the aggregate or indicate the value is dead. */
6402 else if ((TREE_CODE (type) == UNION_TYPE
6403 || TREE_CODE (type) == QUAL_UNION_TYPE)
6404 && ! CONSTRUCTOR_ELTS (exp))
6405 /* If the constructor is empty, clear the union. */
6406 {
6407 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6408 cleared = 1;
6409 }
6410
6411 /* If we are building a static constructor into a register,
6412 set the initial value as zero so we can fold the value into
6413 a constant. But if more than one register is involved,
6414 this probably loses. */
6415 else if (REG_P (target) && TREE_STATIC (exp)
6416 && known_le (GET_MODE_SIZE (GET_MODE (target)),
6417 REGMODE_NATURAL_SIZE (GET_MODE (target))))
6418 {
6419 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6420 cleared = 1;
6421 }
6422
6423 /* If the constructor has fewer fields than the structure or
6424 if we are initializing the structure to mostly zeros, clear
6425 the whole structure first. Don't do this if TARGET is a
6426 register whose mode size isn't equal to SIZE since
6427 clear_storage can't handle this case. */
6428 else if (known_size_p (size)
6429 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type))
6430 || mostly_zeros_p (exp))
6431 && (!REG_P (target)
6432 || known_eq (GET_MODE_SIZE (GET_MODE (target)), size)))
6433 {
6434 clear_storage (target, gen_int_mode (size, Pmode),
6435 BLOCK_OP_NORMAL);
6436 cleared = 1;
6437 }
6438
6439 if (REG_P (target) && !cleared)
6440 emit_clobber (target);
6441
6442 /* Store each element of the constructor into the
6443 corresponding field of TARGET. */
6444 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6445 {
6446 machine_mode mode;
6447 HOST_WIDE_INT bitsize;
6448 HOST_WIDE_INT bitpos = 0;
6449 tree offset;
6450 rtx to_rtx = target;
6451
6452 /* Just ignore missing fields. We cleared the whole
6453 structure, above, if any fields are missing. */
6454 if (field == 0)
6455 continue;
6456
6457 if (cleared && initializer_zerop (value))
6458 continue;
6459
6460 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6461 bitsize = tree_to_uhwi (DECL_SIZE (field));
6462 else
6463 gcc_unreachable ();
6464
6465 mode = DECL_MODE (field);
6466 if (DECL_BIT_FIELD (field))
6467 mode = VOIDmode;
6468
6469 offset = DECL_FIELD_OFFSET (field);
6470 if (tree_fits_shwi_p (offset)
6471 && tree_fits_shwi_p (bit_position (field)))
6472 {
6473 bitpos = int_bit_position (field);
6474 offset = NULL_TREE;
6475 }
6476 else
6477 gcc_unreachable ();
6478
6479 /* If this initializes a field that is smaller than a
6480 word, at the start of a word, try to widen it to a full
6481 word. This special case allows us to output C++ member
6482 function initializations in a form that the optimizers
6483 can understand. */
6484 if (WORD_REGISTER_OPERATIONS
6485 && REG_P (target)
6486 && bitsize < BITS_PER_WORD
6487 && bitpos % BITS_PER_WORD == 0
6488 && GET_MODE_CLASS (mode) == MODE_INT
6489 && TREE_CODE (value) == INTEGER_CST
6490 && exp_size >= 0
6491 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6492 {
6493 type = TREE_TYPE (value);
6494
6495 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6496 {
6497 type = lang_hooks.types.type_for_mode
6498 (word_mode, TYPE_UNSIGNED (type));
6499 value = fold_convert (type, value);
6500 /* Make sure the bits beyond the original bitsize are zero
6501 so that we can correctly avoid extra zeroing stores in
6502 later constructor elements. */
6503 tree bitsize_mask
6504 = wide_int_to_tree (type, wi::mask (bitsize, false,
6505 BITS_PER_WORD));
6506 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
6507 }
6508
6509 if (BYTES_BIG_ENDIAN)
6510 value
6511 = fold_build2 (LSHIFT_EXPR, type, value,
6512 build_int_cst (type,
6513 BITS_PER_WORD - bitsize));
6514 bitsize = BITS_PER_WORD;
6515 mode = word_mode;
6516 }
6517
6518 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6519 && DECL_NONADDRESSABLE_P (field))
6520 {
6521 to_rtx = copy_rtx (to_rtx);
6522 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6523 }
6524
6525 store_constructor_field (to_rtx, bitsize, bitpos,
6526 0, bitregion_end, mode,
6527 value, cleared,
6528 get_alias_set (TREE_TYPE (field)),
6529 reverse);
6530 }
6531 break;
6532 }
6533 case ARRAY_TYPE:
6534 {
6535 tree value, index;
6536 unsigned HOST_WIDE_INT i;
6537 int need_to_clear;
6538 tree domain;
6539 tree elttype = TREE_TYPE (type);
6540 int const_bounds_p;
6541 HOST_WIDE_INT minelt = 0;
6542 HOST_WIDE_INT maxelt = 0;
6543
6544 /* The storage order is specified for every aggregate type. */
6545 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6546
6547 domain = TYPE_DOMAIN (type);
6548 const_bounds_p = (TYPE_MIN_VALUE (domain)
6549 && TYPE_MAX_VALUE (domain)
6550 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6551 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6552
6553 /* If we have constant bounds for the range of the type, get them. */
6554 if (const_bounds_p)
6555 {
6556 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6557 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6558 }
6559
6560 /* If the constructor has fewer elements than the array, clear
6561 the whole array first. Similarly if this is static
6562 constructor of a non-BLKmode object. */
6563 if (cleared)
6564 need_to_clear = 0;
6565 else if (REG_P (target) && TREE_STATIC (exp))
6566 need_to_clear = 1;
6567 else
6568 {
6569 unsigned HOST_WIDE_INT idx;
6570 HOST_WIDE_INT count = 0, zero_count = 0;
6571 need_to_clear = ! const_bounds_p;
6572
6573 /* This loop is a more accurate version of the loop in
6574 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6575 is also needed to check for missing elements. */
6576 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6577 {
6578 HOST_WIDE_INT this_node_count;
6579
6580 if (need_to_clear)
6581 break;
6582
6583 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6584 {
6585 tree lo_index = TREE_OPERAND (index, 0);
6586 tree hi_index = TREE_OPERAND (index, 1);
6587
6588 if (! tree_fits_uhwi_p (lo_index)
6589 || ! tree_fits_uhwi_p (hi_index))
6590 {
6591 need_to_clear = 1;
6592 break;
6593 }
6594
6595 this_node_count = (tree_to_uhwi (hi_index)
6596 - tree_to_uhwi (lo_index) + 1);
6597 }
6598 else
6599 this_node_count = 1;
6600
6601 count += this_node_count;
6602 if (mostly_zeros_p (value))
6603 zero_count += this_node_count;
6604 }
6605
6606 /* Clear the entire array first if there are any missing
6607 elements, or if the incidence of zero elements is >=
6608 75%. */
6609 if (! need_to_clear
6610 && (count < maxelt - minelt + 1
6611 || 4 * zero_count >= 3 * count))
6612 need_to_clear = 1;
6613 }
6614
6615 if (need_to_clear && maybe_gt (size, 0))
6616 {
6617 if (REG_P (target))
6618 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6619 else
6620 clear_storage (target, gen_int_mode (size, Pmode),
6621 BLOCK_OP_NORMAL);
6622 cleared = 1;
6623 }
6624
6625 if (!cleared && REG_P (target))
6626 /* Inform later passes that the old value is dead. */
6627 emit_clobber (target);
6628
6629 /* Store each element of the constructor into the
6630 corresponding element of TARGET, determined by counting the
6631 elements. */
6632 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6633 {
6634 machine_mode mode;
6635 poly_int64 bitsize;
6636 HOST_WIDE_INT bitpos;
6637 rtx xtarget = target;
6638
6639 if (cleared && initializer_zerop (value))
6640 continue;
6641
6642 mode = TYPE_MODE (elttype);
6643 if (mode != BLKmode)
6644 bitsize = GET_MODE_BITSIZE (mode);
6645 else if (!poly_int_tree_p (TYPE_SIZE (elttype), &bitsize))
6646 bitsize = -1;
6647
6648 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6649 {
6650 tree lo_index = TREE_OPERAND (index, 0);
6651 tree hi_index = TREE_OPERAND (index, 1);
6652 rtx index_r, pos_rtx;
6653 HOST_WIDE_INT lo, hi, count;
6654 tree position;
6655
6656 /* If the range is constant and "small", unroll the loop. */
6657 if (const_bounds_p
6658 && tree_fits_shwi_p (lo_index)
6659 && tree_fits_shwi_p (hi_index)
6660 && (lo = tree_to_shwi (lo_index),
6661 hi = tree_to_shwi (hi_index),
6662 count = hi - lo + 1,
6663 (!MEM_P (target)
6664 || count <= 2
6665 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6666 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6667 <= 40 * 8)))))
6668 {
6669 lo -= minelt; hi -= minelt;
6670 for (; lo <= hi; lo++)
6671 {
6672 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6673
6674 if (MEM_P (target)
6675 && !MEM_KEEP_ALIAS_SET_P (target)
6676 && TREE_CODE (type) == ARRAY_TYPE
6677 && TYPE_NONALIASED_COMPONENT (type))
6678 {
6679 target = copy_rtx (target);
6680 MEM_KEEP_ALIAS_SET_P (target) = 1;
6681 }
6682
6683 store_constructor_field
6684 (target, bitsize, bitpos, 0, bitregion_end,
6685 mode, value, cleared,
6686 get_alias_set (elttype), reverse);
6687 }
6688 }
6689 else
6690 {
6691 rtx_code_label *loop_start = gen_label_rtx ();
6692 rtx_code_label *loop_end = gen_label_rtx ();
6693 tree exit_cond;
6694
6695 expand_normal (hi_index);
6696
6697 index = build_decl (EXPR_LOCATION (exp),
6698 VAR_DECL, NULL_TREE, domain);
6699 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6700 SET_DECL_RTL (index, index_r);
6701 store_expr (lo_index, index_r, 0, false, reverse);
6702
6703 /* Build the head of the loop. */
6704 do_pending_stack_adjust ();
6705 emit_label (loop_start);
6706
6707 /* Assign value to element index. */
6708 position =
6709 fold_convert (ssizetype,
6710 fold_build2 (MINUS_EXPR,
6711 TREE_TYPE (index),
6712 index,
6713 TYPE_MIN_VALUE (domain)));
6714
6715 position =
6716 size_binop (MULT_EXPR, position,
6717 fold_convert (ssizetype,
6718 TYPE_SIZE_UNIT (elttype)));
6719
6720 pos_rtx = expand_normal (position);
6721 xtarget = offset_address (target, pos_rtx,
6722 highest_pow2_factor (position));
6723 xtarget = adjust_address (xtarget, mode, 0);
6724 if (TREE_CODE (value) == CONSTRUCTOR)
6725 store_constructor (value, xtarget, cleared,
6726 exact_div (bitsize, BITS_PER_UNIT),
6727 reverse);
6728 else
6729 store_expr (value, xtarget, 0, false, reverse);
6730
6731 /* Generate a conditional jump to exit the loop. */
6732 exit_cond = build2 (LT_EXPR, integer_type_node,
6733 index, hi_index);
6734 jumpif (exit_cond, loop_end,
6735 profile_probability::uninitialized ());
6736
6737 /* Update the loop counter, and jump to the head of
6738 the loop. */
6739 expand_assignment (index,
6740 build2 (PLUS_EXPR, TREE_TYPE (index),
6741 index, integer_one_node),
6742 false);
6743
6744 emit_jump (loop_start);
6745
6746 /* Build the end of the loop. */
6747 emit_label (loop_end);
6748 }
6749 }
6750 else if ((index != 0 && ! tree_fits_shwi_p (index))
6751 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6752 {
6753 tree position;
6754
6755 if (index == 0)
6756 index = ssize_int (1);
6757
6758 if (minelt)
6759 index = fold_convert (ssizetype,
6760 fold_build2 (MINUS_EXPR,
6761 TREE_TYPE (index),
6762 index,
6763 TYPE_MIN_VALUE (domain)));
6764
6765 position =
6766 size_binop (MULT_EXPR, index,
6767 fold_convert (ssizetype,
6768 TYPE_SIZE_UNIT (elttype)));
6769 xtarget = offset_address (target,
6770 expand_normal (position),
6771 highest_pow2_factor (position));
6772 xtarget = adjust_address (xtarget, mode, 0);
6773 store_expr (value, xtarget, 0, false, reverse);
6774 }
6775 else
6776 {
6777 if (index != 0)
6778 bitpos = ((tree_to_shwi (index) - minelt)
6779 * tree_to_uhwi (TYPE_SIZE (elttype)));
6780 else
6781 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6782
6783 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6784 && TREE_CODE (type) == ARRAY_TYPE
6785 && TYPE_NONALIASED_COMPONENT (type))
6786 {
6787 target = copy_rtx (target);
6788 MEM_KEEP_ALIAS_SET_P (target) = 1;
6789 }
6790 store_constructor_field (target, bitsize, bitpos, 0,
6791 bitregion_end, mode, value,
6792 cleared, get_alias_set (elttype),
6793 reverse);
6794 }
6795 }
6796 break;
6797 }
6798
6799 case VECTOR_TYPE:
6800 {
6801 unsigned HOST_WIDE_INT idx;
6802 constructor_elt *ce;
6803 int i;
6804 int need_to_clear;
6805 insn_code icode = CODE_FOR_nothing;
6806 tree elt;
6807 tree elttype = TREE_TYPE (type);
6808 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6809 machine_mode eltmode = TYPE_MODE (elttype);
6810 HOST_WIDE_INT bitsize;
6811 HOST_WIDE_INT bitpos;
6812 rtvec vector = NULL;
6813 poly_uint64 n_elts;
6814 unsigned HOST_WIDE_INT const_n_elts;
6815 alias_set_type alias;
6816 bool vec_vec_init_p = false;
6817 machine_mode mode = GET_MODE (target);
6818
6819 gcc_assert (eltmode != BLKmode);
6820
6821 /* Try using vec_duplicate_optab for uniform vectors. */
6822 if (!TREE_SIDE_EFFECTS (exp)
6823 && VECTOR_MODE_P (mode)
6824 && eltmode == GET_MODE_INNER (mode)
6825 && ((icode = optab_handler (vec_duplicate_optab, mode))
6826 != CODE_FOR_nothing)
6827 && (elt = uniform_vector_p (exp)))
6828 {
6829 class expand_operand ops[2];
6830 create_output_operand (&ops[0], target, mode);
6831 create_input_operand (&ops[1], expand_normal (elt), eltmode);
6832 expand_insn (icode, 2, ops);
6833 if (!rtx_equal_p (target, ops[0].value))
6834 emit_move_insn (target, ops[0].value);
6835 break;
6836 }
6837
6838 n_elts = TYPE_VECTOR_SUBPARTS (type);
6839 if (REG_P (target)
6840 && VECTOR_MODE_P (mode)
6841 && n_elts.is_constant (&const_n_elts))
6842 {
6843 machine_mode emode = eltmode;
6844 bool vector_typed_elts_p = false;
6845
6846 if (CONSTRUCTOR_NELTS (exp)
6847 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value))
6848 == VECTOR_TYPE))
6849 {
6850 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value);
6851 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp)
6852 * TYPE_VECTOR_SUBPARTS (etype),
6853 n_elts));
6854 emode = TYPE_MODE (etype);
6855 vector_typed_elts_p = true;
6856 }
6857 icode = convert_optab_handler (vec_init_optab, mode, emode);
6858 if (icode != CODE_FOR_nothing)
6859 {
6860 unsigned int n = const_n_elts;
6861
6862 if (vector_typed_elts_p)
6863 {
6864 n = CONSTRUCTOR_NELTS (exp);
6865 vec_vec_init_p = true;
6866 }
6867 vector = rtvec_alloc (n);
6868 for (unsigned int k = 0; k < n; k++)
6869 RTVEC_ELT (vector, k) = CONST0_RTX (emode);
6870 }
6871 }
6872
6873 /* If the constructor has fewer elements than the vector,
6874 clear the whole array first. Similarly if this is static
6875 constructor of a non-BLKmode object. */
6876 if (cleared)
6877 need_to_clear = 0;
6878 else if (REG_P (target) && TREE_STATIC (exp))
6879 need_to_clear = 1;
6880 else
6881 {
6882 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6883 tree value;
6884
6885 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6886 {
6887 tree sz = TYPE_SIZE (TREE_TYPE (value));
6888 int n_elts_here
6889 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz,
6890 TYPE_SIZE (elttype)));
6891
6892 count += n_elts_here;
6893 if (mostly_zeros_p (value))
6894 zero_count += n_elts_here;
6895 }
6896
6897 /* Clear the entire vector first if there are any missing elements,
6898 or if the incidence of zero elements is >= 75%. */
6899 need_to_clear = (maybe_lt (count, n_elts)
6900 || 4 * zero_count >= 3 * count);
6901 }
6902
6903 if (need_to_clear && maybe_gt (size, 0) && !vector)
6904 {
6905 if (REG_P (target))
6906 emit_move_insn (target, CONST0_RTX (mode));
6907 else
6908 clear_storage (target, gen_int_mode (size, Pmode),
6909 BLOCK_OP_NORMAL);
6910 cleared = 1;
6911 }
6912
6913 /* Inform later passes that the old value is dead. */
6914 if (!cleared && !vector && REG_P (target))
6915 emit_move_insn (target, CONST0_RTX (mode));
6916
6917 if (MEM_P (target))
6918 alias = MEM_ALIAS_SET (target);
6919 else
6920 alias = get_alias_set (elttype);
6921
6922 /* Store each element of the constructor into the corresponding
6923 element of TARGET, determined by counting the elements. */
6924 for (idx = 0, i = 0;
6925 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6926 idx++, i += bitsize / elt_size)
6927 {
6928 HOST_WIDE_INT eltpos;
6929 tree value = ce->value;
6930
6931 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6932 if (cleared && initializer_zerop (value))
6933 continue;
6934
6935 if (ce->index)
6936 eltpos = tree_to_uhwi (ce->index);
6937 else
6938 eltpos = i;
6939
6940 if (vector)
6941 {
6942 if (vec_vec_init_p)
6943 {
6944 gcc_assert (ce->index == NULL_TREE);
6945 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE);
6946 eltpos = idx;
6947 }
6948 else
6949 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6950 RTVEC_ELT (vector, eltpos) = expand_normal (value);
6951 }
6952 else
6953 {
6954 machine_mode value_mode
6955 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6956 ? TYPE_MODE (TREE_TYPE (value)) : eltmode);
6957 bitpos = eltpos * elt_size;
6958 store_constructor_field (target, bitsize, bitpos, 0,
6959 bitregion_end, value_mode,
6960 value, cleared, alias, reverse);
6961 }
6962 }
6963
6964 if (vector)
6965 emit_insn (GEN_FCN (icode) (target,
6966 gen_rtx_PARALLEL (mode, vector)));
6967 break;
6968 }
6969
6970 default:
6971 gcc_unreachable ();
6972 }
6973 }
6974
6975 /* Store the value of EXP (an expression tree)
6976 into a subfield of TARGET which has mode MODE and occupies
6977 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6978 If MODE is VOIDmode, it means that we are storing into a bit-field.
6979
6980 BITREGION_START is bitpos of the first bitfield in this region.
6981 BITREGION_END is the bitpos of the ending bitfield in this region.
6982 These two fields are 0, if the C++ memory model does not apply,
6983 or we are not interested in keeping track of bitfield regions.
6984
6985 Always return const0_rtx unless we have something particular to
6986 return.
6987
6988 ALIAS_SET is the alias set for the destination. This value will
6989 (in general) be different from that for TARGET, since TARGET is a
6990 reference to the containing structure.
6991
6992 If NONTEMPORAL is true, try generating a nontemporal store.
6993
6994 If REVERSE is true, the store is to be done in reverse order. */
6995
6996 static rtx
store_field(rtx target,poly_int64 bitsize,poly_int64 bitpos,poly_uint64 bitregion_start,poly_uint64 bitregion_end,machine_mode mode,tree exp,alias_set_type alias_set,bool nontemporal,bool reverse)6997 store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos,
6998 poly_uint64 bitregion_start, poly_uint64 bitregion_end,
6999 machine_mode mode, tree exp,
7000 alias_set_type alias_set, bool nontemporal, bool reverse)
7001 {
7002 if (TREE_CODE (exp) == ERROR_MARK)
7003 return const0_rtx;
7004
7005 /* If we have nothing to store, do nothing unless the expression has
7006 side-effects. Don't do that for zero sized addressable lhs of
7007 calls. */
7008 if (known_eq (bitsize, 0)
7009 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
7010 || TREE_CODE (exp) != CALL_EXPR))
7011 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
7012
7013 if (GET_CODE (target) == CONCAT)
7014 {
7015 /* We're storing into a struct containing a single __complex. */
7016
7017 gcc_assert (known_eq (bitpos, 0));
7018 return store_expr (exp, target, 0, nontemporal, reverse);
7019 }
7020
7021 /* If the structure is in a register or if the component
7022 is a bit field, we cannot use addressing to access it.
7023 Use bit-field techniques or SUBREG to store in it. */
7024
7025 poly_int64 decl_bitsize;
7026 if (mode == VOIDmode
7027 || (mode != BLKmode && ! direct_store[(int) mode]
7028 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7029 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
7030 || REG_P (target)
7031 || GET_CODE (target) == SUBREG
7032 /* If the field isn't aligned enough to store as an ordinary memref,
7033 store it as a bit field. */
7034 || (mode != BLKmode
7035 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
7036 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
7037 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target)))
7038 || !multiple_p (bitpos, BITS_PER_UNIT)))
7039 || (known_size_p (bitsize)
7040 && mode != BLKmode
7041 && maybe_gt (GET_MODE_BITSIZE (mode), bitsize))
7042 /* If the RHS and field are a constant size and the size of the
7043 RHS isn't the same size as the bitfield, we must use bitfield
7044 operations. */
7045 || (known_size_p (bitsize)
7046 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
7047 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
7048 bitsize)
7049 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7050 we will handle specially below. */
7051 && !(TREE_CODE (exp) == CONSTRUCTOR
7052 && multiple_p (bitsize, BITS_PER_UNIT))
7053 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7054 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7055 includes some extra padding. store_expr / expand_expr will in
7056 that case call get_inner_reference that will have the bitsize
7057 we check here and thus the block move will not clobber the
7058 padding that shouldn't be clobbered. In the future we could
7059 replace the TREE_ADDRESSABLE check with a check that
7060 get_base_address needs to live in memory. */
7061 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
7062 || TREE_CODE (exp) != COMPONENT_REF
7063 || !multiple_p (bitsize, BITS_PER_UNIT)
7064 || !multiple_p (bitpos, BITS_PER_UNIT)
7065 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)),
7066 &decl_bitsize)
7067 || maybe_ne (decl_bitsize, bitsize)))
7068 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7069 decl we must use bitfield operations. */
7070 || (known_size_p (bitsize)
7071 && TREE_CODE (exp) == MEM_REF
7072 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
7073 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7074 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7075 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
7076 {
7077 rtx temp;
7078 gimple *nop_def;
7079
7080 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7081 implies a mask operation. If the precision is the same size as
7082 the field we're storing into, that mask is redundant. This is
7083 particularly common with bit field assignments generated by the
7084 C front end. */
7085 nop_def = get_def_for_expr (exp, NOP_EXPR);
7086 if (nop_def)
7087 {
7088 tree type = TREE_TYPE (exp);
7089 if (INTEGRAL_TYPE_P (type)
7090 && maybe_ne (TYPE_PRECISION (type),
7091 GET_MODE_BITSIZE (TYPE_MODE (type)))
7092 && known_eq (bitsize, TYPE_PRECISION (type)))
7093 {
7094 tree op = gimple_assign_rhs1 (nop_def);
7095 type = TREE_TYPE (op);
7096 if (INTEGRAL_TYPE_P (type)
7097 && known_ge (TYPE_PRECISION (type), bitsize))
7098 exp = op;
7099 }
7100 }
7101
7102 temp = expand_normal (exp);
7103
7104 /* We don't support variable-sized BLKmode bitfields, since our
7105 handling of BLKmode is bound up with the ability to break
7106 things into words. */
7107 gcc_assert (mode != BLKmode || bitsize.is_constant ());
7108
7109 /* Handle calls that return values in multiple non-contiguous locations.
7110 The Irix 6 ABI has examples of this. */
7111 if (GET_CODE (temp) == PARALLEL)
7112 {
7113 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
7114 machine_mode temp_mode = GET_MODE (temp);
7115 if (temp_mode == BLKmode || temp_mode == VOIDmode)
7116 temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
7117 rtx temp_target = gen_reg_rtx (temp_mode);
7118 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
7119 temp = temp_target;
7120 }
7121
7122 /* Handle calls that return BLKmode values in registers. */
7123 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
7124 {
7125 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
7126 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
7127 temp = temp_target;
7128 }
7129
7130 /* If the value has aggregate type and an integral mode then, if BITSIZE
7131 is narrower than this mode and this is for big-endian data, we first
7132 need to put the value into the low-order bits for store_bit_field,
7133 except when MODE is BLKmode and BITSIZE larger than the word size
7134 (see the handling of fields larger than a word in store_bit_field).
7135 Moreover, the field may be not aligned on a byte boundary; in this
7136 case, if it has reverse storage order, it needs to be accessed as a
7137 scalar field with reverse storage order and we must first put the
7138 value into target order. */
7139 scalar_int_mode temp_mode;
7140 if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
7141 && is_int_mode (GET_MODE (temp), &temp_mode))
7142 {
7143 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode);
7144
7145 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));
7146
7147 if (reverse)
7148 temp = flip_storage_order (temp_mode, temp);
7149
7150 gcc_checking_assert (known_le (bitsize, size));
7151 if (maybe_lt (bitsize, size)
7152 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
7153 /* Use of to_constant for BLKmode was checked above. */
7154 && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD))
7155 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp,
7156 size - bitsize, NULL_RTX, 1);
7157 }
7158
7159 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7160 if (mode != VOIDmode && mode != BLKmode
7161 && mode != TYPE_MODE (TREE_TYPE (exp)))
7162 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
7163
7164 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7165 and BITPOS must be aligned on a byte boundary. If so, we simply do
7166 a block copy. Likewise for a BLKmode-like TARGET. */
7167 if (GET_MODE (temp) == BLKmode
7168 && (GET_MODE (target) == BLKmode
7169 || (MEM_P (target)
7170 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
7171 && multiple_p (bitpos, BITS_PER_UNIT)
7172 && multiple_p (bitsize, BITS_PER_UNIT))))
7173 {
7174 gcc_assert (MEM_P (target) && MEM_P (temp));
7175 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
7176 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
7177
7178 target = adjust_address (target, VOIDmode, bytepos);
7179 emit_block_move (target, temp,
7180 gen_int_mode (bytesize, Pmode),
7181 BLOCK_OP_NORMAL);
7182
7183 return const0_rtx;
7184 }
7185
7186 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7187 word size, we need to load the value (see again store_bit_field). */
7188 if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD))
7189 {
7190 temp_mode = smallest_int_mode_for_size (bitsize);
7191 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
7192 temp_mode, false, NULL);
7193 }
7194
7195 /* Store the value in the bitfield. */
7196 gcc_checking_assert (known_ge (bitpos, 0));
7197 store_bit_field (target, bitsize, bitpos,
7198 bitregion_start, bitregion_end,
7199 mode, temp, reverse);
7200
7201 return const0_rtx;
7202 }
7203 else
7204 {
7205 /* Now build a reference to just the desired component. */
7206 rtx to_rtx = adjust_address (target, mode,
7207 exact_div (bitpos, BITS_PER_UNIT));
7208
7209 if (to_rtx == target)
7210 to_rtx = copy_rtx (to_rtx);
7211
7212 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
7213 set_mem_alias_set (to_rtx, alias_set);
7214
7215 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7216 into a target smaller than its type; handle that case now. */
7217 if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (bitsize))
7218 {
7219 poly_int64 bytesize = exact_div (bitsize, BITS_PER_UNIT);
7220 store_constructor (exp, to_rtx, 0, bytesize, reverse);
7221 return to_rtx;
7222 }
7223
7224 return store_expr (exp, to_rtx, 0, nontemporal, reverse);
7225 }
7226 }
7227
7228 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7229 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7230 codes and find the ultimate containing object, which we return.
7231
7232 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7233 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7234 storage order of the field.
7235 If the position of the field is variable, we store a tree
7236 giving the variable offset (in units) in *POFFSET.
7237 This offset is in addition to the bit position.
7238 If the position is not variable, we store 0 in *POFFSET.
7239
7240 If any of the extraction expressions is volatile,
7241 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7242
7243 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7244 Otherwise, it is a mode that can be used to access the field.
7245
7246 If the field describes a variable-sized object, *PMODE is set to
7247 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7248 this case, but the address of the object can be found. */
7249
7250 tree
get_inner_reference(tree exp,poly_int64_pod * pbitsize,poly_int64_pod * pbitpos,tree * poffset,machine_mode * pmode,int * punsignedp,int * preversep,int * pvolatilep)7251 get_inner_reference (tree exp, poly_int64_pod *pbitsize,
7252 poly_int64_pod *pbitpos, tree *poffset,
7253 machine_mode *pmode, int *punsignedp,
7254 int *preversep, int *pvolatilep)
7255 {
7256 tree size_tree = 0;
7257 machine_mode mode = VOIDmode;
7258 bool blkmode_bitfield = false;
7259 tree offset = size_zero_node;
7260 poly_offset_int bit_offset = 0;
7261
7262 /* First get the mode, signedness, storage order and size. We do this from
7263 just the outermost expression. */
7264 *pbitsize = -1;
7265 if (TREE_CODE (exp) == COMPONENT_REF)
7266 {
7267 tree field = TREE_OPERAND (exp, 1);
7268 size_tree = DECL_SIZE (field);
7269 if (flag_strict_volatile_bitfields > 0
7270 && TREE_THIS_VOLATILE (exp)
7271 && DECL_BIT_FIELD_TYPE (field)
7272 && DECL_MODE (field) != BLKmode)
7273 /* Volatile bitfields should be accessed in the mode of the
7274 field's type, not the mode computed based on the bit
7275 size. */
7276 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
7277 else if (!DECL_BIT_FIELD (field))
7278 {
7279 mode = DECL_MODE (field);
7280 /* For vector fields re-check the target flags, as DECL_MODE
7281 could have been set with different target flags than
7282 the current function has. */
7283 if (mode == BLKmode
7284 && VECTOR_TYPE_P (TREE_TYPE (field))
7285 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field))))
7286 mode = TYPE_MODE (TREE_TYPE (field));
7287 }
7288 else if (DECL_MODE (field) == BLKmode)
7289 blkmode_bitfield = true;
7290
7291 *punsignedp = DECL_UNSIGNED (field);
7292 }
7293 else if (TREE_CODE (exp) == BIT_FIELD_REF)
7294 {
7295 size_tree = TREE_OPERAND (exp, 1);
7296 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
7297 || TYPE_UNSIGNED (TREE_TYPE (exp)));
7298
7299 /* For vector element types with the correct size of access or for
7300 vector typed accesses use the mode of the access type. */
7301 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
7302 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
7303 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
7304 || VECTOR_TYPE_P (TREE_TYPE (exp)))
7305 mode = TYPE_MODE (TREE_TYPE (exp));
7306 }
7307 else
7308 {
7309 mode = TYPE_MODE (TREE_TYPE (exp));
7310 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
7311
7312 if (mode == BLKmode)
7313 size_tree = TYPE_SIZE (TREE_TYPE (exp));
7314 else
7315 *pbitsize = GET_MODE_BITSIZE (mode);
7316 }
7317
7318 if (size_tree != 0)
7319 {
7320 if (! tree_fits_uhwi_p (size_tree))
7321 mode = BLKmode, *pbitsize = -1;
7322 else
7323 *pbitsize = tree_to_uhwi (size_tree);
7324 }
7325
7326 *preversep = reverse_storage_order_for_component_p (exp);
7327
7328 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7329 and find the ultimate containing object. */
7330 while (1)
7331 {
7332 switch (TREE_CODE (exp))
7333 {
7334 case BIT_FIELD_REF:
7335 bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2));
7336 break;
7337
7338 case COMPONENT_REF:
7339 {
7340 tree field = TREE_OPERAND (exp, 1);
7341 tree this_offset = component_ref_field_offset (exp);
7342
7343 /* If this field hasn't been filled in yet, don't go past it.
7344 This should only happen when folding expressions made during
7345 type construction. */
7346 if (this_offset == 0)
7347 break;
7348
7349 offset = size_binop (PLUS_EXPR, offset, this_offset);
7350 bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field));
7351
7352 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7353 }
7354 break;
7355
7356 case ARRAY_REF:
7357 case ARRAY_RANGE_REF:
7358 {
7359 tree index = TREE_OPERAND (exp, 1);
7360 tree low_bound = array_ref_low_bound (exp);
7361 tree unit_size = array_ref_element_size (exp);
7362
7363 /* We assume all arrays have sizes that are a multiple of a byte.
7364 First subtract the lower bound, if any, in the type of the
7365 index, then convert to sizetype and multiply by the size of
7366 the array element. */
7367 if (! integer_zerop (low_bound))
7368 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
7369 index, low_bound);
7370
7371 offset = size_binop (PLUS_EXPR, offset,
7372 size_binop (MULT_EXPR,
7373 fold_convert (sizetype, index),
7374 unit_size));
7375 }
7376 break;
7377
7378 case REALPART_EXPR:
7379 break;
7380
7381 case IMAGPART_EXPR:
7382 bit_offset += *pbitsize;
7383 break;
7384
7385 case VIEW_CONVERT_EXPR:
7386 break;
7387
7388 case MEM_REF:
7389 /* Hand back the decl for MEM[&decl, off]. */
7390 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
7391 {
7392 tree off = TREE_OPERAND (exp, 1);
7393 if (!integer_zerop (off))
7394 {
7395 poly_offset_int boff = mem_ref_offset (exp);
7396 boff <<= LOG2_BITS_PER_UNIT;
7397 bit_offset += boff;
7398 }
7399 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7400 }
7401 goto done;
7402
7403 default:
7404 goto done;
7405 }
7406
7407 /* If any reference in the chain is volatile, the effect is volatile. */
7408 if (TREE_THIS_VOLATILE (exp))
7409 *pvolatilep = 1;
7410
7411 exp = TREE_OPERAND (exp, 0);
7412 }
7413 done:
7414
7415 /* If OFFSET is constant, see if we can return the whole thing as a
7416 constant bit position. Make sure to handle overflow during
7417 this conversion. */
7418 if (poly_int_tree_p (offset))
7419 {
7420 poly_offset_int tem = wi::sext (wi::to_poly_offset (offset),
7421 TYPE_PRECISION (sizetype));
7422 tem <<= LOG2_BITS_PER_UNIT;
7423 tem += bit_offset;
7424 if (tem.to_shwi (pbitpos))
7425 *poffset = offset = NULL_TREE;
7426 }
7427
7428 /* Otherwise, split it up. */
7429 if (offset)
7430 {
7431 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7432 if (!bit_offset.to_shwi (pbitpos) || maybe_lt (*pbitpos, 0))
7433 {
7434 *pbitpos = num_trailing_bits (bit_offset.force_shwi ());
7435 poly_offset_int bytes = bits_to_bytes_round_down (bit_offset);
7436 offset = size_binop (PLUS_EXPR, offset,
7437 build_int_cst (sizetype, bytes.force_shwi ()));
7438 }
7439
7440 *poffset = offset;
7441 }
7442
7443 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7444 if (mode == VOIDmode
7445 && blkmode_bitfield
7446 && multiple_p (*pbitpos, BITS_PER_UNIT)
7447 && multiple_p (*pbitsize, BITS_PER_UNIT))
7448 *pmode = BLKmode;
7449 else
7450 *pmode = mode;
7451
7452 return exp;
7453 }
7454
7455 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7456
7457 static unsigned HOST_WIDE_INT
target_align(const_tree target)7458 target_align (const_tree target)
7459 {
7460 /* We might have a chain of nested references with intermediate misaligning
7461 bitfields components, so need to recurse to find out. */
7462
7463 unsigned HOST_WIDE_INT this_align, outer_align;
7464
7465 switch (TREE_CODE (target))
7466 {
7467 case BIT_FIELD_REF:
7468 return 1;
7469
7470 case COMPONENT_REF:
7471 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7472 outer_align = target_align (TREE_OPERAND (target, 0));
7473 return MIN (this_align, outer_align);
7474
7475 case ARRAY_REF:
7476 case ARRAY_RANGE_REF:
7477 this_align = TYPE_ALIGN (TREE_TYPE (target));
7478 outer_align = target_align (TREE_OPERAND (target, 0));
7479 return MIN (this_align, outer_align);
7480
7481 CASE_CONVERT:
7482 case NON_LVALUE_EXPR:
7483 case VIEW_CONVERT_EXPR:
7484 this_align = TYPE_ALIGN (TREE_TYPE (target));
7485 outer_align = target_align (TREE_OPERAND (target, 0));
7486 return MAX (this_align, outer_align);
7487
7488 default:
7489 return TYPE_ALIGN (TREE_TYPE (target));
7490 }
7491 }
7492
7493
7494 /* Given an rtx VALUE that may contain additions and multiplications, return
7495 an equivalent value that just refers to a register, memory, or constant.
7496 This is done by generating instructions to perform the arithmetic and
7497 returning a pseudo-register containing the value.
7498
7499 The returned value may be a REG, SUBREG, MEM or constant. */
7500
7501 rtx
force_operand(rtx value,rtx target)7502 force_operand (rtx value, rtx target)
7503 {
7504 rtx op1, op2;
7505 /* Use subtarget as the target for operand 0 of a binary operation. */
7506 rtx subtarget = get_subtarget (target);
7507 enum rtx_code code = GET_CODE (value);
7508
7509 /* Check for subreg applied to an expression produced by loop optimizer. */
7510 if (code == SUBREG
7511 && !REG_P (SUBREG_REG (value))
7512 && !MEM_P (SUBREG_REG (value)))
7513 {
7514 value
7515 = simplify_gen_subreg (GET_MODE (value),
7516 force_reg (GET_MODE (SUBREG_REG (value)),
7517 force_operand (SUBREG_REG (value),
7518 NULL_RTX)),
7519 GET_MODE (SUBREG_REG (value)),
7520 SUBREG_BYTE (value));
7521 code = GET_CODE (value);
7522 }
7523
7524 /* Check for a PIC address load. */
7525 if ((code == PLUS || code == MINUS)
7526 && XEXP (value, 0) == pic_offset_table_rtx
7527 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7528 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7529 || GET_CODE (XEXP (value, 1)) == CONST))
7530 {
7531 if (!subtarget)
7532 subtarget = gen_reg_rtx (GET_MODE (value));
7533 emit_move_insn (subtarget, value);
7534 return subtarget;
7535 }
7536
7537 if (ARITHMETIC_P (value))
7538 {
7539 op2 = XEXP (value, 1);
7540 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7541 subtarget = 0;
7542 if (code == MINUS && CONST_INT_P (op2))
7543 {
7544 code = PLUS;
7545 op2 = negate_rtx (GET_MODE (value), op2);
7546 }
7547
7548 /* Check for an addition with OP2 a constant integer and our first
7549 operand a PLUS of a virtual register and something else. In that
7550 case, we want to emit the sum of the virtual register and the
7551 constant first and then add the other value. This allows virtual
7552 register instantiation to simply modify the constant rather than
7553 creating another one around this addition. */
7554 if (code == PLUS && CONST_INT_P (op2)
7555 && GET_CODE (XEXP (value, 0)) == PLUS
7556 && REG_P (XEXP (XEXP (value, 0), 0))
7557 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7558 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7559 {
7560 rtx temp = expand_simple_binop (GET_MODE (value), code,
7561 XEXP (XEXP (value, 0), 0), op2,
7562 subtarget, 0, OPTAB_LIB_WIDEN);
7563 return expand_simple_binop (GET_MODE (value), code, temp,
7564 force_operand (XEXP (XEXP (value,
7565 0), 1), 0),
7566 target, 0, OPTAB_LIB_WIDEN);
7567 }
7568
7569 op1 = force_operand (XEXP (value, 0), subtarget);
7570 op2 = force_operand (op2, NULL_RTX);
7571 switch (code)
7572 {
7573 case MULT:
7574 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7575 case DIV:
7576 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7577 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7578 target, 1, OPTAB_LIB_WIDEN);
7579 else
7580 return expand_divmod (0,
7581 FLOAT_MODE_P (GET_MODE (value))
7582 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7583 GET_MODE (value), op1, op2, target, 0);
7584 case MOD:
7585 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7586 target, 0);
7587 case UDIV:
7588 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7589 target, 1);
7590 case UMOD:
7591 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7592 target, 1);
7593 case ASHIFTRT:
7594 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7595 target, 0, OPTAB_LIB_WIDEN);
7596 default:
7597 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7598 target, 1, OPTAB_LIB_WIDEN);
7599 }
7600 }
7601 if (UNARY_P (value))
7602 {
7603 if (!target)
7604 target = gen_reg_rtx (GET_MODE (value));
7605 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7606 switch (code)
7607 {
7608 case ZERO_EXTEND:
7609 case SIGN_EXTEND:
7610 case TRUNCATE:
7611 case FLOAT_EXTEND:
7612 case FLOAT_TRUNCATE:
7613 convert_move (target, op1, code == ZERO_EXTEND);
7614 return target;
7615
7616 case FIX:
7617 case UNSIGNED_FIX:
7618 expand_fix (target, op1, code == UNSIGNED_FIX);
7619 return target;
7620
7621 case FLOAT:
7622 case UNSIGNED_FLOAT:
7623 expand_float (target, op1, code == UNSIGNED_FLOAT);
7624 return target;
7625
7626 default:
7627 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7628 }
7629 }
7630
7631 #ifdef INSN_SCHEDULING
7632 /* On machines that have insn scheduling, we want all memory reference to be
7633 explicit, so we need to deal with such paradoxical SUBREGs. */
7634 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7635 value
7636 = simplify_gen_subreg (GET_MODE (value),
7637 force_reg (GET_MODE (SUBREG_REG (value)),
7638 force_operand (SUBREG_REG (value),
7639 NULL_RTX)),
7640 GET_MODE (SUBREG_REG (value)),
7641 SUBREG_BYTE (value));
7642 #endif
7643
7644 return value;
7645 }
7646
7647 /* Subroutine of expand_expr: return nonzero iff there is no way that
7648 EXP can reference X, which is being modified. TOP_P is nonzero if this
7649 call is going to be used to determine whether we need a temporary
7650 for EXP, as opposed to a recursive call to this function.
7651
7652 It is always safe for this routine to return zero since it merely
7653 searches for optimization opportunities. */
7654
7655 int
safe_from_p(const_rtx x,tree exp,int top_p)7656 safe_from_p (const_rtx x, tree exp, int top_p)
7657 {
7658 rtx exp_rtl = 0;
7659 int i, nops;
7660
7661 if (x == 0
7662 /* If EXP has varying size, we MUST use a target since we currently
7663 have no way of allocating temporaries of variable size
7664 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7665 So we assume here that something at a higher level has prevented a
7666 clash. This is somewhat bogus, but the best we can do. Only
7667 do this when X is BLKmode and when we are at the top level. */
7668 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7669 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7670 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7671 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7672 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7673 != INTEGER_CST)
7674 && GET_MODE (x) == BLKmode)
7675 /* If X is in the outgoing argument area, it is always safe. */
7676 || (MEM_P (x)
7677 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7678 || (GET_CODE (XEXP (x, 0)) == PLUS
7679 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7680 return 1;
7681
7682 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7683 find the underlying pseudo. */
7684 if (GET_CODE (x) == SUBREG)
7685 {
7686 x = SUBREG_REG (x);
7687 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7688 return 0;
7689 }
7690
7691 /* Now look at our tree code and possibly recurse. */
7692 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7693 {
7694 case tcc_declaration:
7695 exp_rtl = DECL_RTL_IF_SET (exp);
7696 break;
7697
7698 case tcc_constant:
7699 return 1;
7700
7701 case tcc_exceptional:
7702 if (TREE_CODE (exp) == TREE_LIST)
7703 {
7704 while (1)
7705 {
7706 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7707 return 0;
7708 exp = TREE_CHAIN (exp);
7709 if (!exp)
7710 return 1;
7711 if (TREE_CODE (exp) != TREE_LIST)
7712 return safe_from_p (x, exp, 0);
7713 }
7714 }
7715 else if (TREE_CODE (exp) == CONSTRUCTOR)
7716 {
7717 constructor_elt *ce;
7718 unsigned HOST_WIDE_INT idx;
7719
7720 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7721 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7722 || !safe_from_p (x, ce->value, 0))
7723 return 0;
7724 return 1;
7725 }
7726 else if (TREE_CODE (exp) == ERROR_MARK)
7727 return 1; /* An already-visited SAVE_EXPR? */
7728 else
7729 return 0;
7730
7731 case tcc_statement:
7732 /* The only case we look at here is the DECL_INITIAL inside a
7733 DECL_EXPR. */
7734 return (TREE_CODE (exp) != DECL_EXPR
7735 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7736 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7737 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7738
7739 case tcc_binary:
7740 case tcc_comparison:
7741 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7742 return 0;
7743 /* Fall through. */
7744
7745 case tcc_unary:
7746 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7747
7748 case tcc_expression:
7749 case tcc_reference:
7750 case tcc_vl_exp:
7751 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7752 the expression. If it is set, we conflict iff we are that rtx or
7753 both are in memory. Otherwise, we check all operands of the
7754 expression recursively. */
7755
7756 switch (TREE_CODE (exp))
7757 {
7758 case ADDR_EXPR:
7759 /* If the operand is static or we are static, we can't conflict.
7760 Likewise if we don't conflict with the operand at all. */
7761 if (staticp (TREE_OPERAND (exp, 0))
7762 || TREE_STATIC (exp)
7763 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7764 return 1;
7765
7766 /* Otherwise, the only way this can conflict is if we are taking
7767 the address of a DECL a that address if part of X, which is
7768 very rare. */
7769 exp = TREE_OPERAND (exp, 0);
7770 if (DECL_P (exp))
7771 {
7772 if (!DECL_RTL_SET_P (exp)
7773 || !MEM_P (DECL_RTL (exp)))
7774 return 0;
7775 else
7776 exp_rtl = XEXP (DECL_RTL (exp), 0);
7777 }
7778 break;
7779
7780 case MEM_REF:
7781 if (MEM_P (x)
7782 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7783 get_alias_set (exp)))
7784 return 0;
7785 break;
7786
7787 case CALL_EXPR:
7788 /* Assume that the call will clobber all hard registers and
7789 all of memory. */
7790 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7791 || MEM_P (x))
7792 return 0;
7793 break;
7794
7795 case WITH_CLEANUP_EXPR:
7796 case CLEANUP_POINT_EXPR:
7797 /* Lowered by gimplify.c. */
7798 gcc_unreachable ();
7799
7800 case SAVE_EXPR:
7801 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7802
7803 default:
7804 break;
7805 }
7806
7807 /* If we have an rtx, we do not need to scan our operands. */
7808 if (exp_rtl)
7809 break;
7810
7811 nops = TREE_OPERAND_LENGTH (exp);
7812 for (i = 0; i < nops; i++)
7813 if (TREE_OPERAND (exp, i) != 0
7814 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7815 return 0;
7816
7817 break;
7818
7819 case tcc_type:
7820 /* Should never get a type here. */
7821 gcc_unreachable ();
7822 }
7823
7824 /* If we have an rtl, find any enclosed object. Then see if we conflict
7825 with it. */
7826 if (exp_rtl)
7827 {
7828 if (GET_CODE (exp_rtl) == SUBREG)
7829 {
7830 exp_rtl = SUBREG_REG (exp_rtl);
7831 if (REG_P (exp_rtl)
7832 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7833 return 0;
7834 }
7835
7836 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7837 are memory and they conflict. */
7838 return ! (rtx_equal_p (x, exp_rtl)
7839 || (MEM_P (x) && MEM_P (exp_rtl)
7840 && true_dependence (exp_rtl, VOIDmode, x)));
7841 }
7842
7843 /* If we reach here, it is safe. */
7844 return 1;
7845 }
7846
7847
7848 /* Return the highest power of two that EXP is known to be a multiple of.
7849 This is used in updating alignment of MEMs in array references. */
7850
7851 unsigned HOST_WIDE_INT
highest_pow2_factor(const_tree exp)7852 highest_pow2_factor (const_tree exp)
7853 {
7854 unsigned HOST_WIDE_INT ret;
7855 int trailing_zeros = tree_ctz (exp);
7856 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7857 return BIGGEST_ALIGNMENT;
7858 ret = HOST_WIDE_INT_1U << trailing_zeros;
7859 if (ret > BIGGEST_ALIGNMENT)
7860 return BIGGEST_ALIGNMENT;
7861 return ret;
7862 }
7863
7864 /* Similar, except that the alignment requirements of TARGET are
7865 taken into account. Assume it is at least as aligned as its
7866 type, unless it is a COMPONENT_REF in which case the layout of
7867 the structure gives the alignment. */
7868
7869 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target(const_tree target,const_tree exp)7870 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7871 {
7872 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7873 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7874
7875 return MAX (factor, talign);
7876 }
7877
7878 /* Convert the tree comparison code TCODE to the rtl one where the
7879 signedness is UNSIGNEDP. */
7880
7881 static enum rtx_code
convert_tree_comp_to_rtx(enum tree_code tcode,int unsignedp)7882 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7883 {
7884 enum rtx_code code;
7885 switch (tcode)
7886 {
7887 case EQ_EXPR:
7888 code = EQ;
7889 break;
7890 case NE_EXPR:
7891 code = NE;
7892 break;
7893 case LT_EXPR:
7894 code = unsignedp ? LTU : LT;
7895 break;
7896 case LE_EXPR:
7897 code = unsignedp ? LEU : LE;
7898 break;
7899 case GT_EXPR:
7900 code = unsignedp ? GTU : GT;
7901 break;
7902 case GE_EXPR:
7903 code = unsignedp ? GEU : GE;
7904 break;
7905 case UNORDERED_EXPR:
7906 code = UNORDERED;
7907 break;
7908 case ORDERED_EXPR:
7909 code = ORDERED;
7910 break;
7911 case UNLT_EXPR:
7912 code = UNLT;
7913 break;
7914 case UNLE_EXPR:
7915 code = UNLE;
7916 break;
7917 case UNGT_EXPR:
7918 code = UNGT;
7919 break;
7920 case UNGE_EXPR:
7921 code = UNGE;
7922 break;
7923 case UNEQ_EXPR:
7924 code = UNEQ;
7925 break;
7926 case LTGT_EXPR:
7927 code = LTGT;
7928 break;
7929
7930 default:
7931 gcc_unreachable ();
7932 }
7933 return code;
7934 }
7935
7936 /* Subroutine of expand_expr. Expand the two operands of a binary
7937 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7938 The value may be stored in TARGET if TARGET is nonzero. The
7939 MODIFIER argument is as documented by expand_expr. */
7940
7941 void
expand_operands(tree exp0,tree exp1,rtx target,rtx * op0,rtx * op1,enum expand_modifier modifier)7942 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7943 enum expand_modifier modifier)
7944 {
7945 if (! safe_from_p (target, exp1, 1))
7946 target = 0;
7947 if (operand_equal_p (exp0, exp1, 0))
7948 {
7949 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7950 *op1 = copy_rtx (*op0);
7951 }
7952 else
7953 {
7954 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7955 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7956 }
7957 }
7958
7959
7960 /* Return a MEM that contains constant EXP. DEFER is as for
7961 output_constant_def and MODIFIER is as for expand_expr. */
7962
7963 static rtx
expand_expr_constant(tree exp,int defer,enum expand_modifier modifier)7964 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7965 {
7966 rtx mem;
7967
7968 mem = output_constant_def (exp, defer);
7969 if (modifier != EXPAND_INITIALIZER)
7970 mem = use_anchored_address (mem);
7971 return mem;
7972 }
7973
7974 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7975 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7976
7977 static rtx
expand_expr_addr_expr_1(tree exp,rtx target,scalar_int_mode tmode,enum expand_modifier modifier,addr_space_t as)7978 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode,
7979 enum expand_modifier modifier, addr_space_t as)
7980 {
7981 rtx result, subtarget;
7982 tree inner, offset;
7983 poly_int64 bitsize, bitpos;
7984 int unsignedp, reversep, volatilep = 0;
7985 machine_mode mode1;
7986
7987 /* If we are taking the address of a constant and are at the top level,
7988 we have to use output_constant_def since we can't call force_const_mem
7989 at top level. */
7990 /* ??? This should be considered a front-end bug. We should not be
7991 generating ADDR_EXPR of something that isn't an LVALUE. The only
7992 exception here is STRING_CST. */
7993 if (CONSTANT_CLASS_P (exp))
7994 {
7995 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7996 if (modifier < EXPAND_SUM)
7997 result = force_operand (result, target);
7998 return result;
7999 }
8000
8001 /* Everything must be something allowed by is_gimple_addressable. */
8002 switch (TREE_CODE (exp))
8003 {
8004 case INDIRECT_REF:
8005 /* This case will happen via recursion for &a->b. */
8006 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
8007
8008 case MEM_REF:
8009 {
8010 tree tem = TREE_OPERAND (exp, 0);
8011 if (!integer_zerop (TREE_OPERAND (exp, 1)))
8012 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
8013 return expand_expr (tem, target, tmode, modifier);
8014 }
8015
8016 case TARGET_MEM_REF:
8017 return addr_for_mem_ref (exp, as, true);
8018
8019 case CONST_DECL:
8020 /* Expand the initializer like constants above. */
8021 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
8022 0, modifier), 0);
8023 if (modifier < EXPAND_SUM)
8024 result = force_operand (result, target);
8025 return result;
8026
8027 case REALPART_EXPR:
8028 /* The real part of the complex number is always first, therefore
8029 the address is the same as the address of the parent object. */
8030 offset = 0;
8031 bitpos = 0;
8032 inner = TREE_OPERAND (exp, 0);
8033 break;
8034
8035 case IMAGPART_EXPR:
8036 /* The imaginary part of the complex number is always second.
8037 The expression is therefore always offset by the size of the
8038 scalar type. */
8039 offset = 0;
8040 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp)));
8041 inner = TREE_OPERAND (exp, 0);
8042 break;
8043
8044 case COMPOUND_LITERAL_EXPR:
8045 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8046 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8047 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8048 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8049 the initializers aren't gimplified. */
8050 if (COMPOUND_LITERAL_EXPR_DECL (exp)
8051 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
8052 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
8053 target, tmode, modifier, as);
8054 /* FALLTHRU */
8055 default:
8056 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8057 expand_expr, as that can have various side effects; LABEL_DECLs for
8058 example, may not have their DECL_RTL set yet. Expand the rtl of
8059 CONSTRUCTORs too, which should yield a memory reference for the
8060 constructor's contents. Assume language specific tree nodes can
8061 be expanded in some interesting way. */
8062 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
8063 if (DECL_P (exp)
8064 || TREE_CODE (exp) == CONSTRUCTOR
8065 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
8066 {
8067 result = expand_expr (exp, target, tmode,
8068 modifier == EXPAND_INITIALIZER
8069 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
8070
8071 /* If the DECL isn't in memory, then the DECL wasn't properly
8072 marked TREE_ADDRESSABLE, which will be either a front-end
8073 or a tree optimizer bug. */
8074
8075 gcc_assert (MEM_P (result));
8076 result = XEXP (result, 0);
8077
8078 /* ??? Is this needed anymore? */
8079 if (DECL_P (exp))
8080 TREE_USED (exp) = 1;
8081
8082 if (modifier != EXPAND_INITIALIZER
8083 && modifier != EXPAND_CONST_ADDRESS
8084 && modifier != EXPAND_SUM)
8085 result = force_operand (result, target);
8086 return result;
8087 }
8088
8089 /* Pass FALSE as the last argument to get_inner_reference although
8090 we are expanding to RTL. The rationale is that we know how to
8091 handle "aligning nodes" here: we can just bypass them because
8092 they won't change the final object whose address will be returned
8093 (they actually exist only for that purpose). */
8094 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
8095 &unsignedp, &reversep, &volatilep);
8096 break;
8097 }
8098
8099 /* We must have made progress. */
8100 gcc_assert (inner != exp);
8101
8102 subtarget = offset || maybe_ne (bitpos, 0) ? NULL_RTX : target;
8103 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8104 inner alignment, force the inner to be sufficiently aligned. */
8105 if (CONSTANT_CLASS_P (inner)
8106 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
8107 {
8108 inner = copy_node (inner);
8109 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
8110 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp)));
8111 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
8112 }
8113 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
8114
8115 if (offset)
8116 {
8117 rtx tmp;
8118
8119 if (modifier != EXPAND_NORMAL)
8120 result = force_operand (result, NULL);
8121 tmp = expand_expr (offset, NULL_RTX, tmode,
8122 modifier == EXPAND_INITIALIZER
8123 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
8124
8125 /* expand_expr is allowed to return an object in a mode other
8126 than TMODE. If it did, we need to convert. */
8127 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
8128 tmp = convert_modes (tmode, GET_MODE (tmp),
8129 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
8130 result = convert_memory_address_addr_space (tmode, result, as);
8131 tmp = convert_memory_address_addr_space (tmode, tmp, as);
8132
8133 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8134 result = simplify_gen_binary (PLUS, tmode, result, tmp);
8135 else
8136 {
8137 subtarget = maybe_ne (bitpos, 0) ? NULL_RTX : target;
8138 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
8139 1, OPTAB_LIB_WIDEN);
8140 }
8141 }
8142
8143 if (maybe_ne (bitpos, 0))
8144 {
8145 /* Someone beforehand should have rejected taking the address
8146 of an object that isn't byte-aligned. */
8147 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
8148 result = convert_memory_address_addr_space (tmode, result, as);
8149 result = plus_constant (tmode, result, bytepos);
8150 if (modifier < EXPAND_SUM)
8151 result = force_operand (result, target);
8152 }
8153
8154 return result;
8155 }
8156
8157 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8158 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8159
8160 static rtx
expand_expr_addr_expr(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier)8161 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
8162 enum expand_modifier modifier)
8163 {
8164 addr_space_t as = ADDR_SPACE_GENERIC;
8165 scalar_int_mode address_mode = Pmode;
8166 scalar_int_mode pointer_mode = ptr_mode;
8167 machine_mode rmode;
8168 rtx result;
8169
8170 /* Target mode of VOIDmode says "whatever's natural". */
8171 if (tmode == VOIDmode)
8172 tmode = TYPE_MODE (TREE_TYPE (exp));
8173
8174 if (POINTER_TYPE_P (TREE_TYPE (exp)))
8175 {
8176 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
8177 address_mode = targetm.addr_space.address_mode (as);
8178 pointer_mode = targetm.addr_space.pointer_mode (as);
8179 }
8180
8181 /* We can get called with some Weird Things if the user does silliness
8182 like "(short) &a". In that case, convert_memory_address won't do
8183 the right thing, so ignore the given target mode. */
8184 scalar_int_mode new_tmode = (tmode == pointer_mode
8185 ? pointer_mode
8186 : address_mode);
8187
8188 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
8189 new_tmode, modifier, as);
8190
8191 /* Despite expand_expr claims concerning ignoring TMODE when not
8192 strictly convenient, stuff breaks if we don't honor it. Note
8193 that combined with the above, we only do this for pointer modes. */
8194 rmode = GET_MODE (result);
8195 if (rmode == VOIDmode)
8196 rmode = new_tmode;
8197 if (rmode != new_tmode)
8198 result = convert_memory_address_addr_space (new_tmode, result, as);
8199
8200 return result;
8201 }
8202
8203 /* Generate code for computing CONSTRUCTOR EXP.
8204 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8205 is TRUE, instead of creating a temporary variable in memory
8206 NULL is returned and the caller needs to handle it differently. */
8207
8208 static rtx
expand_constructor(tree exp,rtx target,enum expand_modifier modifier,bool avoid_temp_mem)8209 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
8210 bool avoid_temp_mem)
8211 {
8212 tree type = TREE_TYPE (exp);
8213 machine_mode mode = TYPE_MODE (type);
8214
8215 /* Try to avoid creating a temporary at all. This is possible
8216 if all of the initializer is zero.
8217 FIXME: try to handle all [0..255] initializers we can handle
8218 with memset. */
8219 if (TREE_STATIC (exp)
8220 && !TREE_ADDRESSABLE (exp)
8221 && target != 0 && mode == BLKmode
8222 && all_zeros_p (exp))
8223 {
8224 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
8225 return target;
8226 }
8227
8228 /* All elts simple constants => refer to a constant in memory. But
8229 if this is a non-BLKmode mode, let it store a field at a time
8230 since that should make a CONST_INT, CONST_WIDE_INT or
8231 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8232 use, it is best to store directly into the target unless the type
8233 is large enough that memcpy will be used. If we are making an
8234 initializer and all operands are constant, put it in memory as
8235 well.
8236
8237 FIXME: Avoid trying to fill vector constructors piece-meal.
8238 Output them with output_constant_def below unless we're sure
8239 they're zeros. This should go away when vector initializers
8240 are treated like VECTOR_CST instead of arrays. */
8241 if ((TREE_STATIC (exp)
8242 && ((mode == BLKmode
8243 && ! (target != 0 && safe_from_p (target, exp, 1)))
8244 || TREE_ADDRESSABLE (exp)
8245 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
8246 && (! can_move_by_pieces
8247 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
8248 TYPE_ALIGN (type)))
8249 && ! mostly_zeros_p (exp))))
8250 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
8251 && TREE_CONSTANT (exp)))
8252 {
8253 rtx constructor;
8254
8255 if (avoid_temp_mem)
8256 return NULL_RTX;
8257
8258 constructor = expand_expr_constant (exp, 1, modifier);
8259
8260 if (modifier != EXPAND_CONST_ADDRESS
8261 && modifier != EXPAND_INITIALIZER
8262 && modifier != EXPAND_SUM)
8263 constructor = validize_mem (constructor);
8264
8265 return constructor;
8266 }
8267
8268 /* Handle calls that pass values in multiple non-contiguous
8269 locations. The Irix 6 ABI has examples of this. */
8270 if (target == 0 || ! safe_from_p (target, exp, 1)
8271 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM
8272 /* Also make a temporary if the store is to volatile memory, to
8273 avoid individual accesses to aggregate members. */
8274 || (GET_CODE (target) == MEM
8275 && MEM_VOLATILE_P (target)
8276 && !TREE_ADDRESSABLE (TREE_TYPE (exp))))
8277 {
8278 if (avoid_temp_mem)
8279 return NULL_RTX;
8280
8281 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
8282 }
8283
8284 store_constructor (exp, target, 0, int_expr_size (exp), false);
8285 return target;
8286 }
8287
8288
8289 /* expand_expr: generate code for computing expression EXP.
8290 An rtx for the computed value is returned. The value is never null.
8291 In the case of a void EXP, const0_rtx is returned.
8292
8293 The value may be stored in TARGET if TARGET is nonzero.
8294 TARGET is just a suggestion; callers must assume that
8295 the rtx returned may not be the same as TARGET.
8296
8297 If TARGET is CONST0_RTX, it means that the value will be ignored.
8298
8299 If TMODE is not VOIDmode, it suggests generating the
8300 result in mode TMODE. But this is done only when convenient.
8301 Otherwise, TMODE is ignored and the value generated in its natural mode.
8302 TMODE is just a suggestion; callers must assume that
8303 the rtx returned may not have mode TMODE.
8304
8305 Note that TARGET may have neither TMODE nor MODE. In that case, it
8306 probably will not be used.
8307
8308 If MODIFIER is EXPAND_SUM then when EXP is an addition
8309 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8310 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8311 products as above, or REG or MEM, or constant.
8312 Ordinarily in such cases we would output mul or add instructions
8313 and then return a pseudo reg containing the sum.
8314
8315 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8316 it also marks a label as absolutely required (it can't be dead).
8317 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8318 This is used for outputting expressions used in initializers.
8319
8320 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8321 with a constant address even if that address is not normally legitimate.
8322 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8323
8324 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8325 a call parameter. Such targets require special care as we haven't yet
8326 marked TARGET so that it's safe from being trashed by libcalls. We
8327 don't want to use TARGET for anything but the final result;
8328 Intermediate values must go elsewhere. Additionally, calls to
8329 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8330
8331 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8332 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8333 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8334 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8335 recursively.
8336 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8337 then *ALT_RTL is set to TARGET (before legitimziation).
8338
8339 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8340 In this case, we don't adjust a returned MEM rtx that wouldn't be
8341 sufficiently aligned for its mode; instead, it's up to the caller
8342 to deal with it afterwards. This is used to make sure that unaligned
8343 base objects for which out-of-bounds accesses are supported, for
8344 example record types with trailing arrays, aren't realigned behind
8345 the back of the caller.
8346 The normal operating mode is to pass FALSE for this parameter. */
8347
8348 rtx
expand_expr_real(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)8349 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8350 enum expand_modifier modifier, rtx *alt_rtl,
8351 bool inner_reference_p)
8352 {
8353 rtx ret;
8354
8355 /* Handle ERROR_MARK before anybody tries to access its type. */
8356 if (TREE_CODE (exp) == ERROR_MARK
8357 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8358 {
8359 ret = CONST0_RTX (tmode);
8360 return ret ? ret : const0_rtx;
8361 }
8362
8363 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8364 inner_reference_p);
8365 return ret;
8366 }
8367
8368 /* Try to expand the conditional expression which is represented by
8369 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8370 return the rtl reg which represents the result. Otherwise return
8371 NULL_RTX. */
8372
8373 static rtx
expand_cond_expr_using_cmove(tree treeop0 ATTRIBUTE_UNUSED,tree treeop1 ATTRIBUTE_UNUSED,tree treeop2 ATTRIBUTE_UNUSED)8374 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8375 tree treeop1 ATTRIBUTE_UNUSED,
8376 tree treeop2 ATTRIBUTE_UNUSED)
8377 {
8378 rtx insn;
8379 rtx op00, op01, op1, op2;
8380 enum rtx_code comparison_code;
8381 machine_mode comparison_mode;
8382 gimple *srcstmt;
8383 rtx temp;
8384 tree type = TREE_TYPE (treeop1);
8385 int unsignedp = TYPE_UNSIGNED (type);
8386 machine_mode mode = TYPE_MODE (type);
8387 machine_mode orig_mode = mode;
8388 static bool expanding_cond_expr_using_cmove = false;
8389
8390 /* Conditional move expansion can end up TERing two operands which,
8391 when recursively hitting conditional expressions can result in
8392 exponential behavior if the cmove expansion ultimatively fails.
8393 It's hardly profitable to TER a cmove into a cmove so avoid doing
8394 that by failing early if we end up recursing. */
8395 if (expanding_cond_expr_using_cmove)
8396 return NULL_RTX;
8397
8398 /* If we cannot do a conditional move on the mode, try doing it
8399 with the promoted mode. */
8400 if (!can_conditionally_move_p (mode))
8401 {
8402 mode = promote_mode (type, mode, &unsignedp);
8403 if (!can_conditionally_move_p (mode))
8404 return NULL_RTX;
8405 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8406 }
8407 else
8408 temp = assign_temp (type, 0, 1);
8409
8410 expanding_cond_expr_using_cmove = true;
8411 start_sequence ();
8412 expand_operands (treeop1, treeop2,
8413 temp, &op1, &op2, EXPAND_NORMAL);
8414
8415 if (TREE_CODE (treeop0) == SSA_NAME
8416 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8417 {
8418 type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8419 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8420 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8421 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8422 comparison_mode = TYPE_MODE (type);
8423 unsignedp = TYPE_UNSIGNED (type);
8424 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8425 }
8426 else if (COMPARISON_CLASS_P (treeop0))
8427 {
8428 type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8429 enum tree_code cmpcode = TREE_CODE (treeop0);
8430 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8431 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8432 unsignedp = TYPE_UNSIGNED (type);
8433 comparison_mode = TYPE_MODE (type);
8434 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8435 }
8436 else
8437 {
8438 op00 = expand_normal (treeop0);
8439 op01 = const0_rtx;
8440 comparison_code = NE;
8441 comparison_mode = GET_MODE (op00);
8442 if (comparison_mode == VOIDmode)
8443 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8444 }
8445 expanding_cond_expr_using_cmove = false;
8446
8447 if (GET_MODE (op1) != mode)
8448 op1 = gen_lowpart (mode, op1);
8449
8450 if (GET_MODE (op2) != mode)
8451 op2 = gen_lowpart (mode, op2);
8452
8453 /* Try to emit the conditional move. */
8454 insn = emit_conditional_move (temp, comparison_code,
8455 op00, op01, comparison_mode,
8456 op1, op2, mode,
8457 unsignedp);
8458
8459 /* If we could do the conditional move, emit the sequence,
8460 and return. */
8461 if (insn)
8462 {
8463 rtx_insn *seq = get_insns ();
8464 end_sequence ();
8465 emit_insn (seq);
8466 return convert_modes (orig_mode, mode, temp, 0);
8467 }
8468
8469 /* Otherwise discard the sequence and fall back to code with
8470 branches. */
8471 end_sequence ();
8472 return NULL_RTX;
8473 }
8474
8475 /* A helper function for expand_expr_real_2 to be used with a
8476 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8477 is nonzero, with alignment ALIGN in bits.
8478 Store the value at TARGET if possible (if TARGET is nonzero).
8479 Regardless of TARGET, we return the rtx for where the value is placed.
8480 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8481 then *ALT_RTL is set to TARGET (before legitimziation). */
8482
8483 static rtx
expand_misaligned_mem_ref(rtx temp,machine_mode mode,int unsignedp,unsigned int align,rtx target,rtx * alt_rtl)8484 expand_misaligned_mem_ref (rtx temp, machine_mode mode, int unsignedp,
8485 unsigned int align, rtx target, rtx *alt_rtl)
8486 {
8487 enum insn_code icode;
8488
8489 if ((icode = optab_handler (movmisalign_optab, mode))
8490 != CODE_FOR_nothing)
8491 {
8492 class expand_operand ops[2];
8493
8494 /* We've already validated the memory, and we're creating a
8495 new pseudo destination. The predicates really can't fail,
8496 nor can the generator. */
8497 create_output_operand (&ops[0], NULL_RTX, mode);
8498 create_fixed_operand (&ops[1], temp);
8499 expand_insn (icode, 2, ops);
8500 temp = ops[0].value;
8501 }
8502 else if (targetm.slow_unaligned_access (mode, align))
8503 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
8504 0, unsignedp, target,
8505 mode, mode, false, alt_rtl);
8506 return temp;
8507 }
8508
8509 rtx
expand_expr_real_2(sepops ops,rtx target,machine_mode tmode,enum expand_modifier modifier)8510 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8511 enum expand_modifier modifier)
8512 {
8513 rtx op0, op1, op2, temp;
8514 rtx_code_label *lab;
8515 tree type;
8516 int unsignedp;
8517 machine_mode mode;
8518 scalar_int_mode int_mode;
8519 enum tree_code code = ops->code;
8520 optab this_optab;
8521 rtx subtarget, original_target;
8522 int ignore;
8523 bool reduce_bit_field;
8524 location_t loc = ops->location;
8525 tree treeop0, treeop1, treeop2;
8526 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8527 ? reduce_to_bit_field_precision ((expr), \
8528 target, \
8529 type) \
8530 : (expr))
8531
8532 type = ops->type;
8533 mode = TYPE_MODE (type);
8534 unsignedp = TYPE_UNSIGNED (type);
8535
8536 treeop0 = ops->op0;
8537 treeop1 = ops->op1;
8538 treeop2 = ops->op2;
8539
8540 /* We should be called only on simple (binary or unary) expressions,
8541 exactly those that are valid in gimple expressions that aren't
8542 GIMPLE_SINGLE_RHS (or invalid). */
8543 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8544 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8545 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8546
8547 ignore = (target == const0_rtx
8548 || ((CONVERT_EXPR_CODE_P (code)
8549 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8550 && TREE_CODE (type) == VOID_TYPE));
8551
8552 /* We should be called only if we need the result. */
8553 gcc_assert (!ignore);
8554
8555 /* An operation in what may be a bit-field type needs the
8556 result to be reduced to the precision of the bit-field type,
8557 which is narrower than that of the type's mode. */
8558 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8559 && !type_has_mode_precision_p (type));
8560
8561 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8562 target = 0;
8563
8564 /* Use subtarget as the target for operand 0 of a binary operation. */
8565 subtarget = get_subtarget (target);
8566 original_target = target;
8567
8568 switch (code)
8569 {
8570 case NON_LVALUE_EXPR:
8571 case PAREN_EXPR:
8572 CASE_CONVERT:
8573 if (treeop0 == error_mark_node)
8574 return const0_rtx;
8575
8576 if (TREE_CODE (type) == UNION_TYPE)
8577 {
8578 tree valtype = TREE_TYPE (treeop0);
8579
8580 /* If both input and output are BLKmode, this conversion isn't doing
8581 anything except possibly changing memory attribute. */
8582 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8583 {
8584 rtx result = expand_expr (treeop0, target, tmode,
8585 modifier);
8586
8587 result = copy_rtx (result);
8588 set_mem_attributes (result, type, 0);
8589 return result;
8590 }
8591
8592 if (target == 0)
8593 {
8594 if (TYPE_MODE (type) != BLKmode)
8595 target = gen_reg_rtx (TYPE_MODE (type));
8596 else
8597 target = assign_temp (type, 1, 1);
8598 }
8599
8600 if (MEM_P (target))
8601 /* Store data into beginning of memory target. */
8602 store_expr (treeop0,
8603 adjust_address (target, TYPE_MODE (valtype), 0),
8604 modifier == EXPAND_STACK_PARM,
8605 false, TYPE_REVERSE_STORAGE_ORDER (type));
8606
8607 else
8608 {
8609 gcc_assert (REG_P (target)
8610 && !TYPE_REVERSE_STORAGE_ORDER (type));
8611
8612 /* Store this field into a union of the proper type. */
8613 poly_uint64 op0_size
8614 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0)));
8615 poly_uint64 union_size = GET_MODE_BITSIZE (mode);
8616 store_field (target,
8617 /* The conversion must be constructed so that
8618 we know at compile time how many bits
8619 to preserve. */
8620 ordered_min (op0_size, union_size),
8621 0, 0, 0, TYPE_MODE (valtype), treeop0, 0,
8622 false, false);
8623 }
8624
8625 /* Return the entire union. */
8626 return target;
8627 }
8628
8629 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8630 {
8631 op0 = expand_expr (treeop0, target, VOIDmode,
8632 modifier);
8633
8634 /* If the signedness of the conversion differs and OP0 is
8635 a promoted SUBREG, clear that indication since we now
8636 have to do the proper extension. */
8637 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8638 && GET_CODE (op0) == SUBREG)
8639 SUBREG_PROMOTED_VAR_P (op0) = 0;
8640
8641 return REDUCE_BIT_FIELD (op0);
8642 }
8643
8644 op0 = expand_expr (treeop0, NULL_RTX, mode,
8645 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8646 if (GET_MODE (op0) == mode)
8647 ;
8648
8649 /* If OP0 is a constant, just convert it into the proper mode. */
8650 else if (CONSTANT_P (op0))
8651 {
8652 tree inner_type = TREE_TYPE (treeop0);
8653 machine_mode inner_mode = GET_MODE (op0);
8654
8655 if (inner_mode == VOIDmode)
8656 inner_mode = TYPE_MODE (inner_type);
8657
8658 if (modifier == EXPAND_INITIALIZER)
8659 op0 = lowpart_subreg (mode, op0, inner_mode);
8660 else
8661 op0= convert_modes (mode, inner_mode, op0,
8662 TYPE_UNSIGNED (inner_type));
8663 }
8664
8665 else if (modifier == EXPAND_INITIALIZER)
8666 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8667 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8668
8669 else if (target == 0)
8670 op0 = convert_to_mode (mode, op0,
8671 TYPE_UNSIGNED (TREE_TYPE
8672 (treeop0)));
8673 else
8674 {
8675 convert_move (target, op0,
8676 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8677 op0 = target;
8678 }
8679
8680 return REDUCE_BIT_FIELD (op0);
8681
8682 case ADDR_SPACE_CONVERT_EXPR:
8683 {
8684 tree treeop0_type = TREE_TYPE (treeop0);
8685
8686 gcc_assert (POINTER_TYPE_P (type));
8687 gcc_assert (POINTER_TYPE_P (treeop0_type));
8688
8689 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8690 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8691
8692 /* Conversions between pointers to the same address space should
8693 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8694 gcc_assert (as_to != as_from);
8695
8696 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8697
8698 /* Ask target code to handle conversion between pointers
8699 to overlapping address spaces. */
8700 if (targetm.addr_space.subset_p (as_to, as_from)
8701 || targetm.addr_space.subset_p (as_from, as_to))
8702 {
8703 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8704 }
8705 else
8706 {
8707 /* For disjoint address spaces, converting anything but a null
8708 pointer invokes undefined behavior. We truncate or extend the
8709 value as if we'd converted via integers, which handles 0 as
8710 required, and all others as the programmer likely expects. */
8711 #ifndef POINTERS_EXTEND_UNSIGNED
8712 const int POINTERS_EXTEND_UNSIGNED = 1;
8713 #endif
8714 op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
8715 op0, POINTERS_EXTEND_UNSIGNED);
8716 }
8717 gcc_assert (op0);
8718 return op0;
8719 }
8720
8721 case POINTER_PLUS_EXPR:
8722 /* Even though the sizetype mode and the pointer's mode can be different
8723 expand is able to handle this correctly and get the correct result out
8724 of the PLUS_EXPR code. */
8725 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8726 if sizetype precision is smaller than pointer precision. */
8727 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8728 treeop1 = fold_convert_loc (loc, type,
8729 fold_convert_loc (loc, ssizetype,
8730 treeop1));
8731 /* If sizetype precision is larger than pointer precision, truncate the
8732 offset to have matching modes. */
8733 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8734 treeop1 = fold_convert_loc (loc, type, treeop1);
8735 /* FALLTHRU */
8736
8737 case PLUS_EXPR:
8738 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8739 something else, make sure we add the register to the constant and
8740 then to the other thing. This case can occur during strength
8741 reduction and doing it this way will produce better code if the
8742 frame pointer or argument pointer is eliminated.
8743
8744 fold-const.c will ensure that the constant is always in the inner
8745 PLUS_EXPR, so the only case we need to do anything about is if
8746 sp, ap, or fp is our second argument, in which case we must swap
8747 the innermost first argument and our second argument. */
8748
8749 if (TREE_CODE (treeop0) == PLUS_EXPR
8750 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8751 && VAR_P (treeop1)
8752 && (DECL_RTL (treeop1) == frame_pointer_rtx
8753 || DECL_RTL (treeop1) == stack_pointer_rtx
8754 || DECL_RTL (treeop1) == arg_pointer_rtx))
8755 {
8756 gcc_unreachable ();
8757 }
8758
8759 /* If the result is to be ptr_mode and we are adding an integer to
8760 something, we might be forming a constant. So try to use
8761 plus_constant. If it produces a sum and we can't accept it,
8762 use force_operand. This allows P = &ARR[const] to generate
8763 efficient code on machines where a SYMBOL_REF is not a valid
8764 address.
8765
8766 If this is an EXPAND_SUM call, always return the sum. */
8767 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8768 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8769 {
8770 if (modifier == EXPAND_STACK_PARM)
8771 target = 0;
8772 if (TREE_CODE (treeop0) == INTEGER_CST
8773 && HWI_COMPUTABLE_MODE_P (mode)
8774 && TREE_CONSTANT (treeop1))
8775 {
8776 rtx constant_part;
8777 HOST_WIDE_INT wc;
8778 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8779
8780 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8781 EXPAND_SUM);
8782 /* Use wi::shwi to ensure that the constant is
8783 truncated according to the mode of OP1, then sign extended
8784 to a HOST_WIDE_INT. Using the constant directly can result
8785 in non-canonical RTL in a 64x32 cross compile. */
8786 wc = TREE_INT_CST_LOW (treeop0);
8787 constant_part =
8788 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8789 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8790 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8791 op1 = force_operand (op1, target);
8792 return REDUCE_BIT_FIELD (op1);
8793 }
8794
8795 else if (TREE_CODE (treeop1) == INTEGER_CST
8796 && HWI_COMPUTABLE_MODE_P (mode)
8797 && TREE_CONSTANT (treeop0))
8798 {
8799 rtx constant_part;
8800 HOST_WIDE_INT wc;
8801 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8802
8803 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8804 (modifier == EXPAND_INITIALIZER
8805 ? EXPAND_INITIALIZER : EXPAND_SUM));
8806 if (! CONSTANT_P (op0))
8807 {
8808 op1 = expand_expr (treeop1, NULL_RTX,
8809 VOIDmode, modifier);
8810 /* Return a PLUS if modifier says it's OK. */
8811 if (modifier == EXPAND_SUM
8812 || modifier == EXPAND_INITIALIZER)
8813 return simplify_gen_binary (PLUS, mode, op0, op1);
8814 goto binop2;
8815 }
8816 /* Use wi::shwi to ensure that the constant is
8817 truncated according to the mode of OP1, then sign extended
8818 to a HOST_WIDE_INT. Using the constant directly can result
8819 in non-canonical RTL in a 64x32 cross compile. */
8820 wc = TREE_INT_CST_LOW (treeop1);
8821 constant_part
8822 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8823 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8824 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8825 op0 = force_operand (op0, target);
8826 return REDUCE_BIT_FIELD (op0);
8827 }
8828 }
8829
8830 /* Use TER to expand pointer addition of a negated value
8831 as pointer subtraction. */
8832 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8833 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8834 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8835 && TREE_CODE (treeop1) == SSA_NAME
8836 && TYPE_MODE (TREE_TYPE (treeop0))
8837 == TYPE_MODE (TREE_TYPE (treeop1)))
8838 {
8839 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR);
8840 if (def)
8841 {
8842 treeop1 = gimple_assign_rhs1 (def);
8843 code = MINUS_EXPR;
8844 goto do_minus;
8845 }
8846 }
8847
8848 /* No sense saving up arithmetic to be done
8849 if it's all in the wrong mode to form part of an address.
8850 And force_operand won't know whether to sign-extend or
8851 zero-extend. */
8852 if (modifier != EXPAND_INITIALIZER
8853 && (modifier != EXPAND_SUM || mode != ptr_mode))
8854 {
8855 expand_operands (treeop0, treeop1,
8856 subtarget, &op0, &op1, modifier);
8857 if (op0 == const0_rtx)
8858 return op1;
8859 if (op1 == const0_rtx)
8860 return op0;
8861 goto binop2;
8862 }
8863
8864 expand_operands (treeop0, treeop1,
8865 subtarget, &op0, &op1, modifier);
8866 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8867
8868 case MINUS_EXPR:
8869 case POINTER_DIFF_EXPR:
8870 do_minus:
8871 /* For initializers, we are allowed to return a MINUS of two
8872 symbolic constants. Here we handle all cases when both operands
8873 are constant. */
8874 /* Handle difference of two symbolic constants,
8875 for the sake of an initializer. */
8876 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8877 && really_constant_p (treeop0)
8878 && really_constant_p (treeop1))
8879 {
8880 expand_operands (treeop0, treeop1,
8881 NULL_RTX, &op0, &op1, modifier);
8882 return simplify_gen_binary (MINUS, mode, op0, op1);
8883 }
8884
8885 /* No sense saving up arithmetic to be done
8886 if it's all in the wrong mode to form part of an address.
8887 And force_operand won't know whether to sign-extend or
8888 zero-extend. */
8889 if (modifier != EXPAND_INITIALIZER
8890 && (modifier != EXPAND_SUM || mode != ptr_mode))
8891 goto binop;
8892
8893 expand_operands (treeop0, treeop1,
8894 subtarget, &op0, &op1, modifier);
8895
8896 /* Convert A - const to A + (-const). */
8897 if (CONST_INT_P (op1))
8898 {
8899 op1 = negate_rtx (mode, op1);
8900 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8901 }
8902
8903 goto binop2;
8904
8905 case WIDEN_MULT_PLUS_EXPR:
8906 case WIDEN_MULT_MINUS_EXPR:
8907 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8908 op2 = expand_normal (treeop2);
8909 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8910 target, unsignedp);
8911 return target;
8912
8913 case WIDEN_MULT_EXPR:
8914 /* If first operand is constant, swap them.
8915 Thus the following special case checks need only
8916 check the second operand. */
8917 if (TREE_CODE (treeop0) == INTEGER_CST)
8918 std::swap (treeop0, treeop1);
8919
8920 /* First, check if we have a multiplication of one signed and one
8921 unsigned operand. */
8922 if (TREE_CODE (treeop1) != INTEGER_CST
8923 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8924 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8925 {
8926 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8927 this_optab = usmul_widen_optab;
8928 if (find_widening_optab_handler (this_optab, mode, innermode)
8929 != CODE_FOR_nothing)
8930 {
8931 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8932 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8933 EXPAND_NORMAL);
8934 else
8935 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8936 EXPAND_NORMAL);
8937 /* op0 and op1 might still be constant, despite the above
8938 != INTEGER_CST check. Handle it. */
8939 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8940 {
8941 op0 = convert_modes (mode, innermode, op0, true);
8942 op1 = convert_modes (mode, innermode, op1, false);
8943 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8944 target, unsignedp));
8945 }
8946 goto binop3;
8947 }
8948 }
8949 /* Check for a multiplication with matching signedness. */
8950 else if ((TREE_CODE (treeop1) == INTEGER_CST
8951 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8952 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8953 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8954 {
8955 tree op0type = TREE_TYPE (treeop0);
8956 machine_mode innermode = TYPE_MODE (op0type);
8957 bool zextend_p = TYPE_UNSIGNED (op0type);
8958 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8959 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8960
8961 if (TREE_CODE (treeop0) != INTEGER_CST)
8962 {
8963 if (find_widening_optab_handler (this_optab, mode, innermode)
8964 != CODE_FOR_nothing)
8965 {
8966 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8967 EXPAND_NORMAL);
8968 /* op0 and op1 might still be constant, despite the above
8969 != INTEGER_CST check. Handle it. */
8970 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8971 {
8972 widen_mult_const:
8973 op0 = convert_modes (mode, innermode, op0, zextend_p);
8974 op1
8975 = convert_modes (mode, innermode, op1,
8976 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8977 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8978 target,
8979 unsignedp));
8980 }
8981 temp = expand_widening_mult (mode, op0, op1, target,
8982 unsignedp, this_optab);
8983 return REDUCE_BIT_FIELD (temp);
8984 }
8985 if (find_widening_optab_handler (other_optab, mode, innermode)
8986 != CODE_FOR_nothing
8987 && innermode == word_mode)
8988 {
8989 rtx htem, hipart;
8990 op0 = expand_normal (treeop0);
8991 op1 = expand_normal (treeop1);
8992 /* op0 and op1 might be constants, despite the above
8993 != INTEGER_CST check. Handle it. */
8994 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8995 goto widen_mult_const;
8996 temp = expand_binop (mode, other_optab, op0, op1, target,
8997 unsignedp, OPTAB_LIB_WIDEN);
8998 hipart = gen_highpart (word_mode, temp);
8999 htem = expand_mult_highpart_adjust (word_mode, hipart,
9000 op0, op1, hipart,
9001 zextend_p);
9002 if (htem != hipart)
9003 emit_move_insn (hipart, htem);
9004 return REDUCE_BIT_FIELD (temp);
9005 }
9006 }
9007 }
9008 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
9009 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
9010 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
9011 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
9012
9013 case MULT_EXPR:
9014 /* If this is a fixed-point operation, then we cannot use the code
9015 below because "expand_mult" doesn't support sat/no-sat fixed-point
9016 multiplications. */
9017 if (ALL_FIXED_POINT_MODE_P (mode))
9018 goto binop;
9019
9020 /* If first operand is constant, swap them.
9021 Thus the following special case checks need only
9022 check the second operand. */
9023 if (TREE_CODE (treeop0) == INTEGER_CST)
9024 std::swap (treeop0, treeop1);
9025
9026 /* Attempt to return something suitable for generating an
9027 indexed address, for machines that support that. */
9028
9029 if (modifier == EXPAND_SUM && mode == ptr_mode
9030 && tree_fits_shwi_p (treeop1))
9031 {
9032 tree exp1 = treeop1;
9033
9034 op0 = expand_expr (treeop0, subtarget, VOIDmode,
9035 EXPAND_SUM);
9036
9037 if (!REG_P (op0))
9038 op0 = force_operand (op0, NULL_RTX);
9039 if (!REG_P (op0))
9040 op0 = copy_to_mode_reg (mode, op0);
9041
9042 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
9043 gen_int_mode (tree_to_shwi (exp1),
9044 TYPE_MODE (TREE_TYPE (exp1)))));
9045 }
9046
9047 if (modifier == EXPAND_STACK_PARM)
9048 target = 0;
9049
9050 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
9051 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
9052
9053 case TRUNC_MOD_EXPR:
9054 case FLOOR_MOD_EXPR:
9055 case CEIL_MOD_EXPR:
9056 case ROUND_MOD_EXPR:
9057
9058 case TRUNC_DIV_EXPR:
9059 case FLOOR_DIV_EXPR:
9060 case CEIL_DIV_EXPR:
9061 case ROUND_DIV_EXPR:
9062 case EXACT_DIV_EXPR:
9063 {
9064 /* If this is a fixed-point operation, then we cannot use the code
9065 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9066 divisions. */
9067 if (ALL_FIXED_POINT_MODE_P (mode))
9068 goto binop;
9069
9070 if (modifier == EXPAND_STACK_PARM)
9071 target = 0;
9072 /* Possible optimization: compute the dividend with EXPAND_SUM
9073 then if the divisor is constant can optimize the case
9074 where some terms of the dividend have coeffs divisible by it. */
9075 expand_operands (treeop0, treeop1,
9076 subtarget, &op0, &op1, EXPAND_NORMAL);
9077 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR
9078 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR;
9079 if (SCALAR_INT_MODE_P (mode)
9080 && optimize >= 2
9081 && get_range_pos_neg (treeop0) == 1
9082 && get_range_pos_neg (treeop1) == 1)
9083 {
9084 /* If both arguments are known to be positive when interpreted
9085 as signed, we can expand it as both signed and unsigned
9086 division or modulo. Choose the cheaper sequence in that case. */
9087 bool speed_p = optimize_insn_for_speed_p ();
9088 do_pending_stack_adjust ();
9089 start_sequence ();
9090 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
9091 rtx_insn *uns_insns = get_insns ();
9092 end_sequence ();
9093 start_sequence ();
9094 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
9095 rtx_insn *sgn_insns = get_insns ();
9096 end_sequence ();
9097 unsigned uns_cost = seq_cost (uns_insns, speed_p);
9098 unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
9099
9100 /* If costs are the same then use as tie breaker the other
9101 other factor. */
9102 if (uns_cost == sgn_cost)
9103 {
9104 uns_cost = seq_cost (uns_insns, !speed_p);
9105 sgn_cost = seq_cost (sgn_insns, !speed_p);
9106 }
9107
9108 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp))
9109 {
9110 emit_insn (uns_insns);
9111 return uns_ret;
9112 }
9113 emit_insn (sgn_insns);
9114 return sgn_ret;
9115 }
9116 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp);
9117 }
9118 case RDIV_EXPR:
9119 goto binop;
9120
9121 case MULT_HIGHPART_EXPR:
9122 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
9123 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
9124 gcc_assert (temp);
9125 return temp;
9126
9127 case FIXED_CONVERT_EXPR:
9128 op0 = expand_normal (treeop0);
9129 if (target == 0 || modifier == EXPAND_STACK_PARM)
9130 target = gen_reg_rtx (mode);
9131
9132 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
9133 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
9134 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
9135 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
9136 else
9137 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
9138 return target;
9139
9140 case FIX_TRUNC_EXPR:
9141 op0 = expand_normal (treeop0);
9142 if (target == 0 || modifier == EXPAND_STACK_PARM)
9143 target = gen_reg_rtx (mode);
9144 expand_fix (target, op0, unsignedp);
9145 return target;
9146
9147 case FLOAT_EXPR:
9148 op0 = expand_normal (treeop0);
9149 if (target == 0 || modifier == EXPAND_STACK_PARM)
9150 target = gen_reg_rtx (mode);
9151 /* expand_float can't figure out what to do if FROM has VOIDmode.
9152 So give it the correct mode. With -O, cse will optimize this. */
9153 if (GET_MODE (op0) == VOIDmode)
9154 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
9155 op0);
9156 expand_float (target, op0,
9157 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9158 return target;
9159
9160 case NEGATE_EXPR:
9161 op0 = expand_expr (treeop0, subtarget,
9162 VOIDmode, EXPAND_NORMAL);
9163 if (modifier == EXPAND_STACK_PARM)
9164 target = 0;
9165 temp = expand_unop (mode,
9166 optab_for_tree_code (NEGATE_EXPR, type,
9167 optab_default),
9168 op0, target, 0);
9169 gcc_assert (temp);
9170 return REDUCE_BIT_FIELD (temp);
9171
9172 case ABS_EXPR:
9173 case ABSU_EXPR:
9174 op0 = expand_expr (treeop0, subtarget,
9175 VOIDmode, EXPAND_NORMAL);
9176 if (modifier == EXPAND_STACK_PARM)
9177 target = 0;
9178
9179 /* ABS_EXPR is not valid for complex arguments. */
9180 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9181 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
9182
9183 /* Unsigned abs is simply the operand. Testing here means we don't
9184 risk generating incorrect code below. */
9185 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
9186 return op0;
9187
9188 return expand_abs (mode, op0, target, unsignedp,
9189 safe_from_p (target, treeop0, 1));
9190
9191 case MAX_EXPR:
9192 case MIN_EXPR:
9193 target = original_target;
9194 if (target == 0
9195 || modifier == EXPAND_STACK_PARM
9196 || (MEM_P (target) && MEM_VOLATILE_P (target))
9197 || GET_MODE (target) != mode
9198 || (REG_P (target)
9199 && REGNO (target) < FIRST_PSEUDO_REGISTER))
9200 target = gen_reg_rtx (mode);
9201 expand_operands (treeop0, treeop1,
9202 target, &op0, &op1, EXPAND_NORMAL);
9203
9204 /* First try to do it with a special MIN or MAX instruction.
9205 If that does not win, use a conditional jump to select the proper
9206 value. */
9207 this_optab = optab_for_tree_code (code, type, optab_default);
9208 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9209 OPTAB_WIDEN);
9210 if (temp != 0)
9211 return temp;
9212
9213 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9214 and similarly for MAX <x, y>. */
9215 if (VECTOR_TYPE_P (type))
9216 {
9217 tree t0 = make_tree (type, op0);
9218 tree t1 = make_tree (type, op1);
9219 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
9220 type, t0, t1);
9221 return expand_vec_cond_expr (type, comparison, t0, t1,
9222 original_target);
9223 }
9224
9225 /* At this point, a MEM target is no longer useful; we will get better
9226 code without it. */
9227
9228 if (! REG_P (target))
9229 target = gen_reg_rtx (mode);
9230
9231 /* If op1 was placed in target, swap op0 and op1. */
9232 if (target != op0 && target == op1)
9233 std::swap (op0, op1);
9234
9235 /* We generate better code and avoid problems with op1 mentioning
9236 target by forcing op1 into a pseudo if it isn't a constant. */
9237 if (! CONSTANT_P (op1))
9238 op1 = force_reg (mode, op1);
9239
9240 {
9241 enum rtx_code comparison_code;
9242 rtx cmpop1 = op1;
9243
9244 if (code == MAX_EXPR)
9245 comparison_code = unsignedp ? GEU : GE;
9246 else
9247 comparison_code = unsignedp ? LEU : LE;
9248
9249 /* Canonicalize to comparisons against 0. */
9250 if (op1 == const1_rtx)
9251 {
9252 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9253 or (a != 0 ? a : 1) for unsigned.
9254 For MIN we are safe converting (a <= 1 ? a : 1)
9255 into (a <= 0 ? a : 1) */
9256 cmpop1 = const0_rtx;
9257 if (code == MAX_EXPR)
9258 comparison_code = unsignedp ? NE : GT;
9259 }
9260 if (op1 == constm1_rtx && !unsignedp)
9261 {
9262 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9263 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9264 cmpop1 = const0_rtx;
9265 if (code == MIN_EXPR)
9266 comparison_code = LT;
9267 }
9268
9269 /* Use a conditional move if possible. */
9270 if (can_conditionally_move_p (mode))
9271 {
9272 rtx insn;
9273
9274 start_sequence ();
9275
9276 /* Try to emit the conditional move. */
9277 insn = emit_conditional_move (target, comparison_code,
9278 op0, cmpop1, mode,
9279 op0, op1, mode,
9280 unsignedp);
9281
9282 /* If we could do the conditional move, emit the sequence,
9283 and return. */
9284 if (insn)
9285 {
9286 rtx_insn *seq = get_insns ();
9287 end_sequence ();
9288 emit_insn (seq);
9289 return target;
9290 }
9291
9292 /* Otherwise discard the sequence and fall back to code with
9293 branches. */
9294 end_sequence ();
9295 }
9296
9297 if (target != op0)
9298 emit_move_insn (target, op0);
9299
9300 lab = gen_label_rtx ();
9301 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
9302 unsignedp, mode, NULL_RTX, NULL, lab,
9303 profile_probability::uninitialized ());
9304 }
9305 emit_move_insn (target, op1);
9306 emit_label (lab);
9307 return target;
9308
9309 case BIT_NOT_EXPR:
9310 op0 = expand_expr (treeop0, subtarget,
9311 VOIDmode, EXPAND_NORMAL);
9312 if (modifier == EXPAND_STACK_PARM)
9313 target = 0;
9314 /* In case we have to reduce the result to bitfield precision
9315 for unsigned bitfield expand this as XOR with a proper constant
9316 instead. */
9317 if (reduce_bit_field && TYPE_UNSIGNED (type))
9318 {
9319 int_mode = SCALAR_INT_TYPE_MODE (type);
9320 wide_int mask = wi::mask (TYPE_PRECISION (type),
9321 false, GET_MODE_PRECISION (int_mode));
9322
9323 temp = expand_binop (int_mode, xor_optab, op0,
9324 immed_wide_int_const (mask, int_mode),
9325 target, 1, OPTAB_LIB_WIDEN);
9326 }
9327 else
9328 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9329 gcc_assert (temp);
9330 return temp;
9331
9332 /* ??? Can optimize bitwise operations with one arg constant.
9333 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9334 and (a bitwise1 b) bitwise2 b (etc)
9335 but that is probably not worth while. */
9336
9337 case BIT_AND_EXPR:
9338 case BIT_IOR_EXPR:
9339 case BIT_XOR_EXPR:
9340 goto binop;
9341
9342 case LROTATE_EXPR:
9343 case RROTATE_EXPR:
9344 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9345 || type_has_mode_precision_p (type));
9346 /* fall through */
9347
9348 case LSHIFT_EXPR:
9349 case RSHIFT_EXPR:
9350 {
9351 /* If this is a fixed-point operation, then we cannot use the code
9352 below because "expand_shift" doesn't support sat/no-sat fixed-point
9353 shifts. */
9354 if (ALL_FIXED_POINT_MODE_P (mode))
9355 goto binop;
9356
9357 if (! safe_from_p (subtarget, treeop1, 1))
9358 subtarget = 0;
9359 if (modifier == EXPAND_STACK_PARM)
9360 target = 0;
9361 op0 = expand_expr (treeop0, subtarget,
9362 VOIDmode, EXPAND_NORMAL);
9363
9364 /* Left shift optimization when shifting across word_size boundary.
9365
9366 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9367 there isn't native instruction to support this wide mode
9368 left shift. Given below scenario:
9369
9370 Type A = (Type) B << C
9371
9372 |< T >|
9373 | dest_high | dest_low |
9374
9375 | word_size |
9376
9377 If the shift amount C caused we shift B to across the word
9378 size boundary, i.e part of B shifted into high half of
9379 destination register, and part of B remains in the low
9380 half, then GCC will use the following left shift expand
9381 logic:
9382
9383 1. Initialize dest_low to B.
9384 2. Initialize every bit of dest_high to the sign bit of B.
9385 3. Logic left shift dest_low by C bit to finalize dest_low.
9386 The value of dest_low before this shift is kept in a temp D.
9387 4. Logic left shift dest_high by C.
9388 5. Logic right shift D by (word_size - C).
9389 6. Or the result of 4 and 5 to finalize dest_high.
9390
9391 While, by checking gimple statements, if operand B is
9392 coming from signed extension, then we can simplify above
9393 expand logic into:
9394
9395 1. dest_high = src_low >> (word_size - C).
9396 2. dest_low = src_low << C.
9397
9398 We can use one arithmetic right shift to finish all the
9399 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9400 needed from 6 into 2.
9401
9402 The case is similar for zero extension, except that we
9403 initialize dest_high to zero rather than copies of the sign
9404 bit from B. Furthermore, we need to use a logical right shift
9405 in this case.
9406
9407 The choice of sign-extension versus zero-extension is
9408 determined entirely by whether or not B is signed and is
9409 independent of the current setting of unsignedp. */
9410
9411 temp = NULL_RTX;
9412 if (code == LSHIFT_EXPR
9413 && target
9414 && REG_P (target)
9415 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode)
9416 && mode == int_mode
9417 && TREE_CONSTANT (treeop1)
9418 && TREE_CODE (treeop0) == SSA_NAME)
9419 {
9420 gimple *def = SSA_NAME_DEF_STMT (treeop0);
9421 if (is_gimple_assign (def)
9422 && gimple_assign_rhs_code (def) == NOP_EXPR)
9423 {
9424 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE
9425 (TREE_TYPE (gimple_assign_rhs1 (def)));
9426
9427 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode)
9428 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
9429 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
9430 >= GET_MODE_BITSIZE (word_mode)))
9431 {
9432 rtx_insn *seq, *seq_old;
9433 poly_uint64 high_off = subreg_highpart_offset (word_mode,
9434 int_mode);
9435 bool extend_unsigned
9436 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def)));
9437 rtx low = lowpart_subreg (word_mode, op0, int_mode);
9438 rtx dest_low = lowpart_subreg (word_mode, target, int_mode);
9439 rtx dest_high = simplify_gen_subreg (word_mode, target,
9440 int_mode, high_off);
9441 HOST_WIDE_INT ramount = (BITS_PER_WORD
9442 - TREE_INT_CST_LOW (treeop1));
9443 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
9444
9445 start_sequence ();
9446 /* dest_high = src_low >> (word_size - C). */
9447 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
9448 rshift, dest_high,
9449 extend_unsigned);
9450 if (temp != dest_high)
9451 emit_move_insn (dest_high, temp);
9452
9453 /* dest_low = src_low << C. */
9454 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
9455 treeop1, dest_low, unsignedp);
9456 if (temp != dest_low)
9457 emit_move_insn (dest_low, temp);
9458
9459 seq = get_insns ();
9460 end_sequence ();
9461 temp = target ;
9462
9463 if (have_insn_for (ASHIFT, int_mode))
9464 {
9465 bool speed_p = optimize_insn_for_speed_p ();
9466 start_sequence ();
9467 rtx ret_old = expand_variable_shift (code, int_mode,
9468 op0, treeop1,
9469 target,
9470 unsignedp);
9471
9472 seq_old = get_insns ();
9473 end_sequence ();
9474 if (seq_cost (seq, speed_p)
9475 >= seq_cost (seq_old, speed_p))
9476 {
9477 seq = seq_old;
9478 temp = ret_old;
9479 }
9480 }
9481 emit_insn (seq);
9482 }
9483 }
9484 }
9485
9486 if (temp == NULL_RTX)
9487 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9488 unsignedp);
9489 if (code == LSHIFT_EXPR)
9490 temp = REDUCE_BIT_FIELD (temp);
9491 return temp;
9492 }
9493
9494 /* Could determine the answer when only additive constants differ. Also,
9495 the addition of one can be handled by changing the condition. */
9496 case LT_EXPR:
9497 case LE_EXPR:
9498 case GT_EXPR:
9499 case GE_EXPR:
9500 case EQ_EXPR:
9501 case NE_EXPR:
9502 case UNORDERED_EXPR:
9503 case ORDERED_EXPR:
9504 case UNLT_EXPR:
9505 case UNLE_EXPR:
9506 case UNGT_EXPR:
9507 case UNGE_EXPR:
9508 case UNEQ_EXPR:
9509 case LTGT_EXPR:
9510 {
9511 temp = do_store_flag (ops,
9512 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9513 tmode != VOIDmode ? tmode : mode);
9514 if (temp)
9515 return temp;
9516
9517 /* Use a compare and a jump for BLKmode comparisons, or for function
9518 type comparisons is have_canonicalize_funcptr_for_compare. */
9519
9520 if ((target == 0
9521 || modifier == EXPAND_STACK_PARM
9522 || ! safe_from_p (target, treeop0, 1)
9523 || ! safe_from_p (target, treeop1, 1)
9524 /* Make sure we don't have a hard reg (such as function's return
9525 value) live across basic blocks, if not optimizing. */
9526 || (!optimize && REG_P (target)
9527 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9528 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9529
9530 emit_move_insn (target, const0_rtx);
9531
9532 rtx_code_label *lab1 = gen_label_rtx ();
9533 jumpifnot_1 (code, treeop0, treeop1, lab1,
9534 profile_probability::uninitialized ());
9535
9536 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9537 emit_move_insn (target, constm1_rtx);
9538 else
9539 emit_move_insn (target, const1_rtx);
9540
9541 emit_label (lab1);
9542 return target;
9543 }
9544 case COMPLEX_EXPR:
9545 /* Get the rtx code of the operands. */
9546 op0 = expand_normal (treeop0);
9547 op1 = expand_normal (treeop1);
9548
9549 if (!target)
9550 target = gen_reg_rtx (TYPE_MODE (type));
9551 else
9552 /* If target overlaps with op1, then either we need to force
9553 op1 into a pseudo (if target also overlaps with op0),
9554 or write the complex parts in reverse order. */
9555 switch (GET_CODE (target))
9556 {
9557 case CONCAT:
9558 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9559 {
9560 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9561 {
9562 complex_expr_force_op1:
9563 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9564 emit_move_insn (temp, op1);
9565 op1 = temp;
9566 break;
9567 }
9568 complex_expr_swap_order:
9569 /* Move the imaginary (op1) and real (op0) parts to their
9570 location. */
9571 write_complex_part (target, op1, true);
9572 write_complex_part (target, op0, false);
9573
9574 return target;
9575 }
9576 break;
9577 case MEM:
9578 temp = adjust_address_nv (target,
9579 GET_MODE_INNER (GET_MODE (target)), 0);
9580 if (reg_overlap_mentioned_p (temp, op1))
9581 {
9582 scalar_mode imode = GET_MODE_INNER (GET_MODE (target));
9583 temp = adjust_address_nv (target, imode,
9584 GET_MODE_SIZE (imode));
9585 if (reg_overlap_mentioned_p (temp, op0))
9586 goto complex_expr_force_op1;
9587 goto complex_expr_swap_order;
9588 }
9589 break;
9590 default:
9591 if (reg_overlap_mentioned_p (target, op1))
9592 {
9593 if (reg_overlap_mentioned_p (target, op0))
9594 goto complex_expr_force_op1;
9595 goto complex_expr_swap_order;
9596 }
9597 break;
9598 }
9599
9600 /* Move the real (op0) and imaginary (op1) parts to their location. */
9601 write_complex_part (target, op0, false);
9602 write_complex_part (target, op1, true);
9603
9604 return target;
9605
9606 case WIDEN_SUM_EXPR:
9607 {
9608 tree oprnd0 = treeop0;
9609 tree oprnd1 = treeop1;
9610
9611 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9612 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9613 target, unsignedp);
9614 return target;
9615 }
9616
9617 case VEC_UNPACK_HI_EXPR:
9618 case VEC_UNPACK_LO_EXPR:
9619 case VEC_UNPACK_FIX_TRUNC_HI_EXPR:
9620 case VEC_UNPACK_FIX_TRUNC_LO_EXPR:
9621 {
9622 op0 = expand_normal (treeop0);
9623 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9624 target, unsignedp);
9625 gcc_assert (temp);
9626 return temp;
9627 }
9628
9629 case VEC_UNPACK_FLOAT_HI_EXPR:
9630 case VEC_UNPACK_FLOAT_LO_EXPR:
9631 {
9632 op0 = expand_normal (treeop0);
9633 /* The signedness is determined from input operand. */
9634 temp = expand_widen_pattern_expr
9635 (ops, op0, NULL_RTX, NULL_RTX,
9636 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9637
9638 gcc_assert (temp);
9639 return temp;
9640 }
9641
9642 case VEC_WIDEN_MULT_HI_EXPR:
9643 case VEC_WIDEN_MULT_LO_EXPR:
9644 case VEC_WIDEN_MULT_EVEN_EXPR:
9645 case VEC_WIDEN_MULT_ODD_EXPR:
9646 case VEC_WIDEN_LSHIFT_HI_EXPR:
9647 case VEC_WIDEN_LSHIFT_LO_EXPR:
9648 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9649 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9650 target, unsignedp);
9651 gcc_assert (target);
9652 return target;
9653
9654 case VEC_PACK_SAT_EXPR:
9655 case VEC_PACK_FIX_TRUNC_EXPR:
9656 mode = TYPE_MODE (TREE_TYPE (treeop0));
9657 goto binop;
9658
9659 case VEC_PACK_TRUNC_EXPR:
9660 if (VECTOR_BOOLEAN_TYPE_P (type)
9661 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0))
9662 && mode == TYPE_MODE (TREE_TYPE (treeop0))
9663 && SCALAR_INT_MODE_P (mode))
9664 {
9665 class expand_operand eops[4];
9666 machine_mode imode = TYPE_MODE (TREE_TYPE (treeop0));
9667 expand_operands (treeop0, treeop1,
9668 subtarget, &op0, &op1, EXPAND_NORMAL);
9669 this_optab = vec_pack_sbool_trunc_optab;
9670 enum insn_code icode = optab_handler (this_optab, imode);
9671 create_output_operand (&eops[0], target, mode);
9672 create_convert_operand_from (&eops[1], op0, imode, false);
9673 create_convert_operand_from (&eops[2], op1, imode, false);
9674 temp = GEN_INT (TYPE_VECTOR_SUBPARTS (type).to_constant ());
9675 create_input_operand (&eops[3], temp, imode);
9676 expand_insn (icode, 4, eops);
9677 return eops[0].value;
9678 }
9679 mode = TYPE_MODE (TREE_TYPE (treeop0));
9680 goto binop;
9681
9682 case VEC_PACK_FLOAT_EXPR:
9683 mode = TYPE_MODE (TREE_TYPE (treeop0));
9684 expand_operands (treeop0, treeop1,
9685 subtarget, &op0, &op1, EXPAND_NORMAL);
9686 this_optab = optab_for_tree_code (code, TREE_TYPE (treeop0),
9687 optab_default);
9688 target = expand_binop (mode, this_optab, op0, op1, target,
9689 TYPE_UNSIGNED (TREE_TYPE (treeop0)),
9690 OPTAB_LIB_WIDEN);
9691 gcc_assert (target);
9692 return target;
9693
9694 case VEC_PERM_EXPR:
9695 {
9696 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9697 vec_perm_builder sel;
9698 if (TREE_CODE (treeop2) == VECTOR_CST
9699 && tree_to_vec_perm_builder (&sel, treeop2))
9700 {
9701 machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2));
9702 temp = expand_vec_perm_const (mode, op0, op1, sel,
9703 sel_mode, target);
9704 }
9705 else
9706 {
9707 op2 = expand_normal (treeop2);
9708 temp = expand_vec_perm_var (mode, op0, op1, op2, target);
9709 }
9710 gcc_assert (temp);
9711 return temp;
9712 }
9713
9714 case DOT_PROD_EXPR:
9715 {
9716 tree oprnd0 = treeop0;
9717 tree oprnd1 = treeop1;
9718 tree oprnd2 = treeop2;
9719
9720 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9721 op2 = expand_normal (oprnd2);
9722 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9723 target, unsignedp);
9724 return target;
9725 }
9726
9727 case SAD_EXPR:
9728 {
9729 tree oprnd0 = treeop0;
9730 tree oprnd1 = treeop1;
9731 tree oprnd2 = treeop2;
9732
9733 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9734 op2 = expand_normal (oprnd2);
9735 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9736 target, unsignedp);
9737 return target;
9738 }
9739
9740 case REALIGN_LOAD_EXPR:
9741 {
9742 tree oprnd0 = treeop0;
9743 tree oprnd1 = treeop1;
9744 tree oprnd2 = treeop2;
9745
9746 this_optab = optab_for_tree_code (code, type, optab_default);
9747 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9748 op2 = expand_normal (oprnd2);
9749 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9750 target, unsignedp);
9751 gcc_assert (temp);
9752 return temp;
9753 }
9754
9755 case COND_EXPR:
9756 {
9757 /* A COND_EXPR with its type being VOID_TYPE represents a
9758 conditional jump and is handled in
9759 expand_gimple_cond_expr. */
9760 gcc_assert (!VOID_TYPE_P (type));
9761
9762 /* Note that COND_EXPRs whose type is a structure or union
9763 are required to be constructed to contain assignments of
9764 a temporary variable, so that we can evaluate them here
9765 for side effect only. If type is void, we must do likewise. */
9766
9767 gcc_assert (!TREE_ADDRESSABLE (type)
9768 && !ignore
9769 && TREE_TYPE (treeop1) != void_type_node
9770 && TREE_TYPE (treeop2) != void_type_node);
9771
9772 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9773 if (temp)
9774 return temp;
9775
9776 /* If we are not to produce a result, we have no target. Otherwise,
9777 if a target was specified use it; it will not be used as an
9778 intermediate target unless it is safe. If no target, use a
9779 temporary. */
9780
9781 if (modifier != EXPAND_STACK_PARM
9782 && original_target
9783 && safe_from_p (original_target, treeop0, 1)
9784 && GET_MODE (original_target) == mode
9785 && !MEM_P (original_target))
9786 temp = original_target;
9787 else
9788 temp = assign_temp (type, 0, 1);
9789
9790 do_pending_stack_adjust ();
9791 NO_DEFER_POP;
9792 rtx_code_label *lab0 = gen_label_rtx ();
9793 rtx_code_label *lab1 = gen_label_rtx ();
9794 jumpifnot (treeop0, lab0,
9795 profile_probability::uninitialized ());
9796 store_expr (treeop1, temp,
9797 modifier == EXPAND_STACK_PARM,
9798 false, false);
9799
9800 emit_jump_insn (targetm.gen_jump (lab1));
9801 emit_barrier ();
9802 emit_label (lab0);
9803 store_expr (treeop2, temp,
9804 modifier == EXPAND_STACK_PARM,
9805 false, false);
9806
9807 emit_label (lab1);
9808 OK_DEFER_POP;
9809 return temp;
9810 }
9811
9812 case VEC_COND_EXPR:
9813 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9814 return target;
9815
9816 case VEC_DUPLICATE_EXPR:
9817 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
9818 target = expand_vector_broadcast (mode, op0);
9819 gcc_assert (target);
9820 return target;
9821
9822 case VEC_SERIES_EXPR:
9823 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, modifier);
9824 return expand_vec_series_expr (mode, op0, op1, target);
9825
9826 case BIT_INSERT_EXPR:
9827 {
9828 unsigned bitpos = tree_to_uhwi (treeop2);
9829 unsigned bitsize;
9830 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1)))
9831 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1));
9832 else
9833 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1)));
9834 op0 = expand_normal (treeop0);
9835 op1 = expand_normal (treeop1);
9836 rtx dst = gen_reg_rtx (mode);
9837 emit_move_insn (dst, op0);
9838 store_bit_field (dst, bitsize, bitpos, 0, 0,
9839 TYPE_MODE (TREE_TYPE (treeop1)), op1, false);
9840 return dst;
9841 }
9842
9843 default:
9844 gcc_unreachable ();
9845 }
9846
9847 /* Here to do an ordinary binary operator. */
9848 binop:
9849 expand_operands (treeop0, treeop1,
9850 subtarget, &op0, &op1, EXPAND_NORMAL);
9851 binop2:
9852 this_optab = optab_for_tree_code (code, type, optab_default);
9853 binop3:
9854 if (modifier == EXPAND_STACK_PARM)
9855 target = 0;
9856 temp = expand_binop (mode, this_optab, op0, op1, target,
9857 unsignedp, OPTAB_LIB_WIDEN);
9858 gcc_assert (temp);
9859 /* Bitwise operations do not need bitfield reduction as we expect their
9860 operands being properly truncated. */
9861 if (code == BIT_XOR_EXPR
9862 || code == BIT_AND_EXPR
9863 || code == BIT_IOR_EXPR)
9864 return temp;
9865 return REDUCE_BIT_FIELD (temp);
9866 }
9867 #undef REDUCE_BIT_FIELD
9868
9869
9870 /* Return TRUE if expression STMT is suitable for replacement.
9871 Never consider memory loads as replaceable, because those don't ever lead
9872 into constant expressions. */
9873
9874 static bool
stmt_is_replaceable_p(gimple * stmt)9875 stmt_is_replaceable_p (gimple *stmt)
9876 {
9877 if (ssa_is_replaceable_p (stmt))
9878 {
9879 /* Don't move around loads. */
9880 if (!gimple_assign_single_p (stmt)
9881 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9882 return true;
9883 }
9884 return false;
9885 }
9886
9887 rtx
expand_expr_real_1(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)9888 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9889 enum expand_modifier modifier, rtx *alt_rtl,
9890 bool inner_reference_p)
9891 {
9892 rtx op0, op1, temp, decl_rtl;
9893 tree type;
9894 int unsignedp;
9895 machine_mode mode, dmode;
9896 enum tree_code code = TREE_CODE (exp);
9897 rtx subtarget, original_target;
9898 int ignore;
9899 tree context;
9900 bool reduce_bit_field;
9901 location_t loc = EXPR_LOCATION (exp);
9902 struct separate_ops ops;
9903 tree treeop0, treeop1, treeop2;
9904 tree ssa_name = NULL_TREE;
9905 gimple *g;
9906
9907 type = TREE_TYPE (exp);
9908 mode = TYPE_MODE (type);
9909 unsignedp = TYPE_UNSIGNED (type);
9910
9911 treeop0 = treeop1 = treeop2 = NULL_TREE;
9912 if (!VL_EXP_CLASS_P (exp))
9913 switch (TREE_CODE_LENGTH (code))
9914 {
9915 default:
9916 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */
9917 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */
9918 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */
9919 case 0: break;
9920 }
9921 ops.code = code;
9922 ops.type = type;
9923 ops.op0 = treeop0;
9924 ops.op1 = treeop1;
9925 ops.op2 = treeop2;
9926 ops.location = loc;
9927
9928 ignore = (target == const0_rtx
9929 || ((CONVERT_EXPR_CODE_P (code)
9930 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9931 && TREE_CODE (type) == VOID_TYPE));
9932
9933 /* An operation in what may be a bit-field type needs the
9934 result to be reduced to the precision of the bit-field type,
9935 which is narrower than that of the type's mode. */
9936 reduce_bit_field = (!ignore
9937 && INTEGRAL_TYPE_P (type)
9938 && !type_has_mode_precision_p (type));
9939
9940 /* If we are going to ignore this result, we need only do something
9941 if there is a side-effect somewhere in the expression. If there
9942 is, short-circuit the most common cases here. Note that we must
9943 not call expand_expr with anything but const0_rtx in case this
9944 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9945
9946 if (ignore)
9947 {
9948 if (! TREE_SIDE_EFFECTS (exp))
9949 return const0_rtx;
9950
9951 /* Ensure we reference a volatile object even if value is ignored, but
9952 don't do this if all we are doing is taking its address. */
9953 if (TREE_THIS_VOLATILE (exp)
9954 && TREE_CODE (exp) != FUNCTION_DECL
9955 && mode != VOIDmode && mode != BLKmode
9956 && modifier != EXPAND_CONST_ADDRESS)
9957 {
9958 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9959 if (MEM_P (temp))
9960 copy_to_reg (temp);
9961 return const0_rtx;
9962 }
9963
9964 if (TREE_CODE_CLASS (code) == tcc_unary
9965 || code == BIT_FIELD_REF
9966 || code == COMPONENT_REF
9967 || code == INDIRECT_REF)
9968 return expand_expr (treeop0, const0_rtx, VOIDmode,
9969 modifier);
9970
9971 else if (TREE_CODE_CLASS (code) == tcc_binary
9972 || TREE_CODE_CLASS (code) == tcc_comparison
9973 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9974 {
9975 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9976 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9977 return const0_rtx;
9978 }
9979
9980 target = 0;
9981 }
9982
9983 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9984 target = 0;
9985
9986 /* Use subtarget as the target for operand 0 of a binary operation. */
9987 subtarget = get_subtarget (target);
9988 original_target = target;
9989
9990 switch (code)
9991 {
9992 case LABEL_DECL:
9993 {
9994 tree function = decl_function_context (exp);
9995
9996 temp = label_rtx (exp);
9997 temp = gen_rtx_LABEL_REF (Pmode, temp);
9998
9999 if (function != current_function_decl
10000 && function != 0)
10001 LABEL_REF_NONLOCAL_P (temp) = 1;
10002
10003 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
10004 return temp;
10005 }
10006
10007 case SSA_NAME:
10008 /* ??? ivopts calls expander, without any preparation from
10009 out-of-ssa. So fake instructions as if this was an access to the
10010 base variable. This unnecessarily allocates a pseudo, see how we can
10011 reuse it, if partition base vars have it set already. */
10012 if (!currently_expanding_to_rtl)
10013 {
10014 tree var = SSA_NAME_VAR (exp);
10015 if (var && DECL_RTL_SET_P (var))
10016 return DECL_RTL (var);
10017 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
10018 LAST_VIRTUAL_REGISTER + 1);
10019 }
10020
10021 g = get_gimple_for_ssa_name (exp);
10022 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10023 if (g == NULL
10024 && modifier == EXPAND_INITIALIZER
10025 && !SSA_NAME_IS_DEFAULT_DEF (exp)
10026 && (optimize || !SSA_NAME_VAR (exp)
10027 || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
10028 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
10029 g = SSA_NAME_DEF_STMT (exp);
10030 if (g)
10031 {
10032 rtx r;
10033 location_t saved_loc = curr_insn_location ();
10034 loc = gimple_location (g);
10035 if (loc != UNKNOWN_LOCATION)
10036 set_curr_insn_location (loc);
10037 ops.code = gimple_assign_rhs_code (g);
10038 switch (get_gimple_rhs_class (ops.code))
10039 {
10040 case GIMPLE_TERNARY_RHS:
10041 ops.op2 = gimple_assign_rhs3 (g);
10042 /* Fallthru */
10043 case GIMPLE_BINARY_RHS:
10044 ops.op1 = gimple_assign_rhs2 (g);
10045
10046 /* Try to expand conditonal compare. */
10047 if (targetm.gen_ccmp_first)
10048 {
10049 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
10050 r = expand_ccmp_expr (g, mode);
10051 if (r)
10052 break;
10053 }
10054 /* Fallthru */
10055 case GIMPLE_UNARY_RHS:
10056 ops.op0 = gimple_assign_rhs1 (g);
10057 ops.type = TREE_TYPE (gimple_assign_lhs (g));
10058 ops.location = loc;
10059 r = expand_expr_real_2 (&ops, target, tmode, modifier);
10060 break;
10061 case GIMPLE_SINGLE_RHS:
10062 {
10063 r = expand_expr_real (gimple_assign_rhs1 (g), target,
10064 tmode, modifier, alt_rtl,
10065 inner_reference_p);
10066 break;
10067 }
10068 default:
10069 gcc_unreachable ();
10070 }
10071 set_curr_insn_location (saved_loc);
10072 if (REG_P (r) && !REG_EXPR (r))
10073 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
10074 return r;
10075 }
10076
10077 ssa_name = exp;
10078 decl_rtl = get_rtx_for_ssa_name (ssa_name);
10079 exp = SSA_NAME_VAR (ssa_name);
10080 goto expand_decl_rtl;
10081
10082 case PARM_DECL:
10083 case VAR_DECL:
10084 /* If a static var's type was incomplete when the decl was written,
10085 but the type is complete now, lay out the decl now. */
10086 if (DECL_SIZE (exp) == 0
10087 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
10088 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
10089 layout_decl (exp, 0);
10090
10091 /* fall through */
10092
10093 case FUNCTION_DECL:
10094 case RESULT_DECL:
10095 decl_rtl = DECL_RTL (exp);
10096 expand_decl_rtl:
10097 gcc_assert (decl_rtl);
10098
10099 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10100 settings for VECTOR_TYPE_P that might switch for the function. */
10101 if (currently_expanding_to_rtl
10102 && code == VAR_DECL && MEM_P (decl_rtl)
10103 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
10104 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
10105 else
10106 decl_rtl = copy_rtx (decl_rtl);
10107
10108 /* Record writes to register variables. */
10109 if (modifier == EXPAND_WRITE
10110 && REG_P (decl_rtl)
10111 && HARD_REGISTER_P (decl_rtl))
10112 add_to_hard_reg_set (&crtl->asm_clobbers,
10113 GET_MODE (decl_rtl), REGNO (decl_rtl));
10114
10115 /* Ensure variable marked as used even if it doesn't go through
10116 a parser. If it hasn't be used yet, write out an external
10117 definition. */
10118 if (exp)
10119 TREE_USED (exp) = 1;
10120
10121 /* Show we haven't gotten RTL for this yet. */
10122 temp = 0;
10123
10124 /* Variables inherited from containing functions should have
10125 been lowered by this point. */
10126 if (exp)
10127 context = decl_function_context (exp);
10128 gcc_assert (!exp
10129 || SCOPE_FILE_SCOPE_P (context)
10130 || context == current_function_decl
10131 || TREE_STATIC (exp)
10132 || DECL_EXTERNAL (exp)
10133 /* ??? C++ creates functions that are not TREE_STATIC. */
10134 || TREE_CODE (exp) == FUNCTION_DECL);
10135
10136 /* This is the case of an array whose size is to be determined
10137 from its initializer, while the initializer is still being parsed.
10138 ??? We aren't parsing while expanding anymore. */
10139
10140 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
10141 temp = validize_mem (decl_rtl);
10142
10143 /* If DECL_RTL is memory, we are in the normal case and the
10144 address is not valid, get the address into a register. */
10145
10146 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
10147 {
10148 if (alt_rtl)
10149 *alt_rtl = decl_rtl;
10150 decl_rtl = use_anchored_address (decl_rtl);
10151 if (modifier != EXPAND_CONST_ADDRESS
10152 && modifier != EXPAND_SUM
10153 && !memory_address_addr_space_p (exp ? DECL_MODE (exp)
10154 : GET_MODE (decl_rtl),
10155 XEXP (decl_rtl, 0),
10156 MEM_ADDR_SPACE (decl_rtl)))
10157 temp = replace_equiv_address (decl_rtl,
10158 copy_rtx (XEXP (decl_rtl, 0)));
10159 }
10160
10161 /* If we got something, return it. But first, set the alignment
10162 if the address is a register. */
10163 if (temp != 0)
10164 {
10165 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0)))
10166 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
10167 }
10168 else if (MEM_P (decl_rtl))
10169 temp = decl_rtl;
10170
10171 if (temp != 0)
10172 {
10173 if (MEM_P (temp)
10174 && modifier != EXPAND_WRITE
10175 && modifier != EXPAND_MEMORY
10176 && modifier != EXPAND_INITIALIZER
10177 && modifier != EXPAND_CONST_ADDRESS
10178 && modifier != EXPAND_SUM
10179 && !inner_reference_p
10180 && mode != BLKmode
10181 && MEM_ALIGN (temp) < GET_MODE_ALIGNMENT (mode))
10182 temp = expand_misaligned_mem_ref (temp, mode, unsignedp,
10183 MEM_ALIGN (temp), NULL_RTX, NULL);
10184
10185 return temp;
10186 }
10187
10188 if (exp)
10189 dmode = DECL_MODE (exp);
10190 else
10191 dmode = TYPE_MODE (TREE_TYPE (ssa_name));
10192
10193 /* If the mode of DECL_RTL does not match that of the decl,
10194 there are two cases: we are dealing with a BLKmode value
10195 that is returned in a register, or we are dealing with
10196 a promoted value. In the latter case, return a SUBREG
10197 of the wanted mode, but mark it so that we know that it
10198 was already extended. */
10199 if (REG_P (decl_rtl)
10200 && dmode != BLKmode
10201 && GET_MODE (decl_rtl) != dmode)
10202 {
10203 machine_mode pmode;
10204
10205 /* Get the signedness to be used for this variable. Ensure we get
10206 the same mode we got when the variable was declared. */
10207 if (code != SSA_NAME)
10208 pmode = promote_decl_mode (exp, &unsignedp);
10209 else if ((g = SSA_NAME_DEF_STMT (ssa_name))
10210 && gimple_code (g) == GIMPLE_CALL
10211 && !gimple_call_internal_p (g))
10212 pmode = promote_function_mode (type, mode, &unsignedp,
10213 gimple_call_fntype (g),
10214 2);
10215 else
10216 pmode = promote_ssa_mode (ssa_name, &unsignedp);
10217 gcc_assert (GET_MODE (decl_rtl) == pmode);
10218
10219 temp = gen_lowpart_SUBREG (mode, decl_rtl);
10220 SUBREG_PROMOTED_VAR_P (temp) = 1;
10221 SUBREG_PROMOTED_SET (temp, unsignedp);
10222 return temp;
10223 }
10224
10225 return decl_rtl;
10226
10227 case INTEGER_CST:
10228 {
10229 /* Given that TYPE_PRECISION (type) is not always equal to
10230 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10231 the former to the latter according to the signedness of the
10232 type. */
10233 scalar_int_mode int_mode = SCALAR_INT_TYPE_MODE (type);
10234 temp = immed_wide_int_const
10235 (wi::to_wide (exp, GET_MODE_PRECISION (int_mode)), int_mode);
10236 return temp;
10237 }
10238
10239 case VECTOR_CST:
10240 {
10241 tree tmp = NULL_TREE;
10242 if (VECTOR_MODE_P (mode))
10243 return const_vector_from_tree (exp);
10244 scalar_int_mode int_mode;
10245 if (is_int_mode (mode, &int_mode))
10246 {
10247 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
10248 return const_scalar_mask_from_tree (int_mode, exp);
10249 else
10250 {
10251 tree type_for_mode
10252 = lang_hooks.types.type_for_mode (int_mode, 1);
10253 if (type_for_mode)
10254 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR,
10255 type_for_mode, exp);
10256 }
10257 }
10258 if (!tmp)
10259 {
10260 vec<constructor_elt, va_gc> *v;
10261 /* Constructors need to be fixed-length. FIXME. */
10262 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
10263 vec_alloc (v, nunits);
10264 for (unsigned int i = 0; i < nunits; ++i)
10265 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
10266 tmp = build_constructor (type, v);
10267 }
10268 return expand_expr (tmp, ignore ? const0_rtx : target,
10269 tmode, modifier);
10270 }
10271
10272 case CONST_DECL:
10273 if (modifier == EXPAND_WRITE)
10274 {
10275 /* Writing into CONST_DECL is always invalid, but handle it
10276 gracefully. */
10277 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
10278 scalar_int_mode address_mode = targetm.addr_space.address_mode (as);
10279 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode,
10280 EXPAND_NORMAL, as);
10281 op0 = memory_address_addr_space (mode, op0, as);
10282 temp = gen_rtx_MEM (mode, op0);
10283 set_mem_addr_space (temp, as);
10284 return temp;
10285 }
10286 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
10287
10288 case REAL_CST:
10289 /* If optimized, generate immediate CONST_DOUBLE
10290 which will be turned into memory by reload if necessary.
10291
10292 We used to force a register so that loop.c could see it. But
10293 this does not allow gen_* patterns to perform optimizations with
10294 the constants. It also produces two insns in cases like "x = 1.0;".
10295 On most machines, floating-point constants are not permitted in
10296 many insns, so we'd end up copying it to a register in any case.
10297
10298 Now, we do the copying in expand_binop, if appropriate. */
10299 return const_double_from_real_value (TREE_REAL_CST (exp),
10300 TYPE_MODE (TREE_TYPE (exp)));
10301
10302 case FIXED_CST:
10303 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
10304 TYPE_MODE (TREE_TYPE (exp)));
10305
10306 case COMPLEX_CST:
10307 /* Handle evaluating a complex constant in a CONCAT target. */
10308 if (original_target && GET_CODE (original_target) == CONCAT)
10309 {
10310 rtx rtarg, itarg;
10311
10312 mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
10313 rtarg = XEXP (original_target, 0);
10314 itarg = XEXP (original_target, 1);
10315
10316 /* Move the real and imaginary parts separately. */
10317 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
10318 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
10319
10320 if (op0 != rtarg)
10321 emit_move_insn (rtarg, op0);
10322 if (op1 != itarg)
10323 emit_move_insn (itarg, op1);
10324
10325 return original_target;
10326 }
10327
10328 /* fall through */
10329
10330 case STRING_CST:
10331 temp = expand_expr_constant (exp, 1, modifier);
10332
10333 /* temp contains a constant address.
10334 On RISC machines where a constant address isn't valid,
10335 make some insns to get that address into a register. */
10336 if (modifier != EXPAND_CONST_ADDRESS
10337 && modifier != EXPAND_INITIALIZER
10338 && modifier != EXPAND_SUM
10339 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
10340 MEM_ADDR_SPACE (temp)))
10341 return replace_equiv_address (temp,
10342 copy_rtx (XEXP (temp, 0)));
10343 return temp;
10344
10345 case POLY_INT_CST:
10346 return immed_wide_int_const (poly_int_cst_value (exp), mode);
10347
10348 case SAVE_EXPR:
10349 {
10350 tree val = treeop0;
10351 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
10352 inner_reference_p);
10353
10354 if (!SAVE_EXPR_RESOLVED_P (exp))
10355 {
10356 /* We can indeed still hit this case, typically via builtin
10357 expanders calling save_expr immediately before expanding
10358 something. Assume this means that we only have to deal
10359 with non-BLKmode values. */
10360 gcc_assert (GET_MODE (ret) != BLKmode);
10361
10362 val = build_decl (curr_insn_location (),
10363 VAR_DECL, NULL, TREE_TYPE (exp));
10364 DECL_ARTIFICIAL (val) = 1;
10365 DECL_IGNORED_P (val) = 1;
10366 treeop0 = val;
10367 TREE_OPERAND (exp, 0) = treeop0;
10368 SAVE_EXPR_RESOLVED_P (exp) = 1;
10369
10370 if (!CONSTANT_P (ret))
10371 ret = copy_to_reg (ret);
10372 SET_DECL_RTL (val, ret);
10373 }
10374
10375 return ret;
10376 }
10377
10378
10379 case CONSTRUCTOR:
10380 /* If we don't need the result, just ensure we evaluate any
10381 subexpressions. */
10382 if (ignore)
10383 {
10384 unsigned HOST_WIDE_INT idx;
10385 tree value;
10386
10387 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
10388 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
10389
10390 return const0_rtx;
10391 }
10392
10393 return expand_constructor (exp, target, modifier, false);
10394
10395 case TARGET_MEM_REF:
10396 {
10397 addr_space_t as
10398 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10399 unsigned int align;
10400
10401 op0 = addr_for_mem_ref (exp, as, true);
10402 op0 = memory_address_addr_space (mode, op0, as);
10403 temp = gen_rtx_MEM (mode, op0);
10404 set_mem_attributes (temp, exp, 0);
10405 set_mem_addr_space (temp, as);
10406 align = get_object_alignment (exp);
10407 if (modifier != EXPAND_WRITE
10408 && modifier != EXPAND_MEMORY
10409 && mode != BLKmode
10410 && align < GET_MODE_ALIGNMENT (mode))
10411 temp = expand_misaligned_mem_ref (temp, mode, unsignedp,
10412 align, NULL_RTX, NULL);
10413 return temp;
10414 }
10415
10416 case MEM_REF:
10417 {
10418 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp);
10419 addr_space_t as
10420 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10421 machine_mode address_mode;
10422 tree base = TREE_OPERAND (exp, 0);
10423 gimple *def_stmt;
10424 unsigned align;
10425 /* Handle expansion of non-aliased memory with non-BLKmode. That
10426 might end up in a register. */
10427 if (mem_ref_refers_to_non_mem_p (exp))
10428 {
10429 poly_int64 offset = mem_ref_offset (exp).force_shwi ();
10430 base = TREE_OPERAND (base, 0);
10431 poly_uint64 type_size;
10432 if (known_eq (offset, 0)
10433 && !reverse
10434 && poly_int_tree_p (TYPE_SIZE (type), &type_size)
10435 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)), type_size))
10436 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
10437 target, tmode, modifier);
10438 if (TYPE_MODE (type) == BLKmode)
10439 {
10440 temp = assign_stack_temp (DECL_MODE (base),
10441 GET_MODE_SIZE (DECL_MODE (base)));
10442 store_expr (base, temp, 0, false, false);
10443 temp = adjust_address (temp, BLKmode, offset);
10444 set_mem_size (temp, int_size_in_bytes (type));
10445 return temp;
10446 }
10447 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
10448 bitsize_int (offset * BITS_PER_UNIT));
10449 REF_REVERSE_STORAGE_ORDER (exp) = reverse;
10450 return expand_expr (exp, target, tmode, modifier);
10451 }
10452 address_mode = targetm.addr_space.address_mode (as);
10453 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
10454 {
10455 tree mask = gimple_assign_rhs2 (def_stmt);
10456 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
10457 gimple_assign_rhs1 (def_stmt), mask);
10458 TREE_OPERAND (exp, 0) = base;
10459 }
10460 align = get_object_alignment (exp);
10461 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
10462 op0 = memory_address_addr_space (mode, op0, as);
10463 if (!integer_zerop (TREE_OPERAND (exp, 1)))
10464 {
10465 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
10466 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
10467 op0 = memory_address_addr_space (mode, op0, as);
10468 }
10469 temp = gen_rtx_MEM (mode, op0);
10470 set_mem_attributes (temp, exp, 0);
10471 set_mem_addr_space (temp, as);
10472 if (TREE_THIS_VOLATILE (exp))
10473 MEM_VOLATILE_P (temp) = 1;
10474 if (modifier != EXPAND_WRITE
10475 && modifier != EXPAND_MEMORY
10476 && !inner_reference_p
10477 && mode != BLKmode
10478 && align < GET_MODE_ALIGNMENT (mode))
10479 temp = expand_misaligned_mem_ref (temp, mode, unsignedp, align,
10480 modifier == EXPAND_STACK_PARM
10481 ? NULL_RTX : target, alt_rtl);
10482 if (reverse
10483 && modifier != EXPAND_MEMORY
10484 && modifier != EXPAND_WRITE)
10485 temp = flip_storage_order (mode, temp);
10486 return temp;
10487 }
10488
10489 case ARRAY_REF:
10490
10491 {
10492 tree array = treeop0;
10493 tree index = treeop1;
10494 tree init;
10495
10496 /* Fold an expression like: "foo"[2].
10497 This is not done in fold so it won't happen inside &.
10498 Don't fold if this is for wide characters since it's too
10499 difficult to do correctly and this is a very rare case. */
10500
10501 if (modifier != EXPAND_CONST_ADDRESS
10502 && modifier != EXPAND_INITIALIZER
10503 && modifier != EXPAND_MEMORY)
10504 {
10505 tree t = fold_read_from_constant_string (exp);
10506
10507 if (t)
10508 return expand_expr (t, target, tmode, modifier);
10509 }
10510
10511 /* If this is a constant index into a constant array,
10512 just get the value from the array. Handle both the cases when
10513 we have an explicit constructor and when our operand is a variable
10514 that was declared const. */
10515
10516 if (modifier != EXPAND_CONST_ADDRESS
10517 && modifier != EXPAND_INITIALIZER
10518 && modifier != EXPAND_MEMORY
10519 && TREE_CODE (array) == CONSTRUCTOR
10520 && ! TREE_SIDE_EFFECTS (array)
10521 && TREE_CODE (index) == INTEGER_CST)
10522 {
10523 unsigned HOST_WIDE_INT ix;
10524 tree field, value;
10525
10526 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10527 field, value)
10528 if (tree_int_cst_equal (field, index))
10529 {
10530 if (!TREE_SIDE_EFFECTS (value))
10531 return expand_expr (fold (value), target, tmode, modifier);
10532 break;
10533 }
10534 }
10535
10536 else if (optimize >= 1
10537 && modifier != EXPAND_CONST_ADDRESS
10538 && modifier != EXPAND_INITIALIZER
10539 && modifier != EXPAND_MEMORY
10540 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10541 && TREE_CODE (index) == INTEGER_CST
10542 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
10543 && (init = ctor_for_folding (array)) != error_mark_node)
10544 {
10545 if (init == NULL_TREE)
10546 {
10547 tree value = build_zero_cst (type);
10548 if (TREE_CODE (value) == CONSTRUCTOR)
10549 {
10550 /* If VALUE is a CONSTRUCTOR, this optimization is only
10551 useful if this doesn't store the CONSTRUCTOR into
10552 memory. If it does, it is more efficient to just
10553 load the data from the array directly. */
10554 rtx ret = expand_constructor (value, target,
10555 modifier, true);
10556 if (ret == NULL_RTX)
10557 value = NULL_TREE;
10558 }
10559
10560 if (value)
10561 return expand_expr (value, target, tmode, modifier);
10562 }
10563 else if (TREE_CODE (init) == CONSTRUCTOR)
10564 {
10565 unsigned HOST_WIDE_INT ix;
10566 tree field, value;
10567
10568 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10569 field, value)
10570 if (tree_int_cst_equal (field, index))
10571 {
10572 if (TREE_SIDE_EFFECTS (value))
10573 break;
10574
10575 if (TREE_CODE (value) == CONSTRUCTOR)
10576 {
10577 /* If VALUE is a CONSTRUCTOR, this
10578 optimization is only useful if
10579 this doesn't store the CONSTRUCTOR
10580 into memory. If it does, it is more
10581 efficient to just load the data from
10582 the array directly. */
10583 rtx ret = expand_constructor (value, target,
10584 modifier, true);
10585 if (ret == NULL_RTX)
10586 break;
10587 }
10588
10589 return
10590 expand_expr (fold (value), target, tmode, modifier);
10591 }
10592 }
10593 else if (TREE_CODE (init) == STRING_CST)
10594 {
10595 tree low_bound = array_ref_low_bound (exp);
10596 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10597
10598 /* Optimize the special case of a zero lower bound.
10599
10600 We convert the lower bound to sizetype to avoid problems
10601 with constant folding. E.g. suppose the lower bound is
10602 1 and its mode is QI. Without the conversion
10603 (ARRAY + (INDEX - (unsigned char)1))
10604 becomes
10605 (ARRAY + (-(unsigned char)1) + INDEX)
10606 which becomes
10607 (ARRAY + 255 + INDEX). Oops! */
10608 if (!integer_zerop (low_bound))
10609 index1 = size_diffop_loc (loc, index1,
10610 fold_convert_loc (loc, sizetype,
10611 low_bound));
10612
10613 if (tree_fits_uhwi_p (index1)
10614 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10615 {
10616 tree char_type = TREE_TYPE (TREE_TYPE (init));
10617 scalar_int_mode char_mode;
10618
10619 if (is_int_mode (TYPE_MODE (char_type), &char_mode)
10620 && GET_MODE_SIZE (char_mode) == 1)
10621 return gen_int_mode (TREE_STRING_POINTER (init)
10622 [TREE_INT_CST_LOW (index1)],
10623 char_mode);
10624 }
10625 }
10626 }
10627 }
10628 goto normal_inner_ref;
10629
10630 case COMPONENT_REF:
10631 /* If the operand is a CONSTRUCTOR, we can just extract the
10632 appropriate field if it is present. */
10633 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10634 {
10635 unsigned HOST_WIDE_INT idx;
10636 tree field, value;
10637 scalar_int_mode field_mode;
10638
10639 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10640 idx, field, value)
10641 if (field == treeop1
10642 /* We can normally use the value of the field in the
10643 CONSTRUCTOR. However, if this is a bitfield in
10644 an integral mode that we can fit in a HOST_WIDE_INT,
10645 we must mask only the number of bits in the bitfield,
10646 since this is done implicitly by the constructor. If
10647 the bitfield does not meet either of those conditions,
10648 we can't do this optimization. */
10649 && (! DECL_BIT_FIELD (field)
10650 || (is_int_mode (DECL_MODE (field), &field_mode)
10651 && (GET_MODE_PRECISION (field_mode)
10652 <= HOST_BITS_PER_WIDE_INT))))
10653 {
10654 if (DECL_BIT_FIELD (field)
10655 && modifier == EXPAND_STACK_PARM)
10656 target = 0;
10657 op0 = expand_expr (value, target, tmode, modifier);
10658 if (DECL_BIT_FIELD (field))
10659 {
10660 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10661 scalar_int_mode imode
10662 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field));
10663
10664 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10665 {
10666 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1,
10667 imode);
10668 op0 = expand_and (imode, op0, op1, target);
10669 }
10670 else
10671 {
10672 int count = GET_MODE_PRECISION (imode) - bitsize;
10673
10674 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10675 target, 0);
10676 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10677 target, 0);
10678 }
10679 }
10680
10681 return op0;
10682 }
10683 }
10684 goto normal_inner_ref;
10685
10686 case BIT_FIELD_REF:
10687 case ARRAY_RANGE_REF:
10688 normal_inner_ref:
10689 {
10690 machine_mode mode1, mode2;
10691 poly_int64 bitsize, bitpos, bytepos;
10692 tree offset;
10693 int reversep, volatilep = 0, must_force_mem;
10694 tree tem
10695 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
10696 &unsignedp, &reversep, &volatilep);
10697 rtx orig_op0, memloc;
10698 bool clear_mem_expr = false;
10699
10700 /* If we got back the original object, something is wrong. Perhaps
10701 we are evaluating an expression too early. In any event, don't
10702 infinitely recurse. */
10703 gcc_assert (tem != exp);
10704
10705 /* If TEM's type is a union of variable size, pass TARGET to the inner
10706 computation, since it will need a temporary and TARGET is known
10707 to have to do. This occurs in unchecked conversion in Ada. */
10708 orig_op0 = op0
10709 = expand_expr_real (tem,
10710 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10711 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10712 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10713 != INTEGER_CST)
10714 && modifier != EXPAND_STACK_PARM
10715 ? target : NULL_RTX),
10716 VOIDmode,
10717 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10718 NULL, true);
10719
10720 /* If the field has a mode, we want to access it in the
10721 field's mode, not the computed mode.
10722 If a MEM has VOIDmode (external with incomplete type),
10723 use BLKmode for it instead. */
10724 if (MEM_P (op0))
10725 {
10726 if (mode1 != VOIDmode)
10727 op0 = adjust_address (op0, mode1, 0);
10728 else if (GET_MODE (op0) == VOIDmode)
10729 op0 = adjust_address (op0, BLKmode, 0);
10730 }
10731
10732 mode2
10733 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10734
10735 /* Make sure bitpos is not negative, it can wreak havoc later. */
10736 if (maybe_lt (bitpos, 0))
10737 {
10738 gcc_checking_assert (offset == NULL_TREE);
10739 offset = size_int (bits_to_bytes_round_down (bitpos));
10740 bitpos = num_trailing_bits (bitpos);
10741 }
10742
10743 /* If we have either an offset, a BLKmode result, or a reference
10744 outside the underlying object, we must force it to memory.
10745 Such a case can occur in Ada if we have unchecked conversion
10746 of an expression from a scalar type to an aggregate type or
10747 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10748 passed a partially uninitialized object or a view-conversion
10749 to a larger size. */
10750 must_force_mem = (offset
10751 || mode1 == BLKmode
10752 || (mode == BLKmode
10753 && !int_mode_for_size (bitsize, 1).exists ())
10754 || maybe_gt (bitpos + bitsize,
10755 GET_MODE_BITSIZE (mode2)));
10756
10757 /* Handle CONCAT first. */
10758 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10759 {
10760 if (known_eq (bitpos, 0)
10761 && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0)))
10762 && COMPLEX_MODE_P (mode1)
10763 && COMPLEX_MODE_P (GET_MODE (op0))
10764 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1))
10765 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0)))))
10766 {
10767 if (reversep)
10768 op0 = flip_storage_order (GET_MODE (op0), op0);
10769 if (mode1 != GET_MODE (op0))
10770 {
10771 rtx parts[2];
10772 for (int i = 0; i < 2; i++)
10773 {
10774 rtx op = read_complex_part (op0, i != 0);
10775 if (GET_CODE (op) == SUBREG)
10776 op = force_reg (GET_MODE (op), op);
10777 temp = gen_lowpart_common (GET_MODE_INNER (mode1), op);
10778 if (temp)
10779 op = temp;
10780 else
10781 {
10782 if (!REG_P (op) && !MEM_P (op))
10783 op = force_reg (GET_MODE (op), op);
10784 op = gen_lowpart (GET_MODE_INNER (mode1), op);
10785 }
10786 parts[i] = op;
10787 }
10788 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]);
10789 }
10790 return op0;
10791 }
10792 if (known_eq (bitpos, 0)
10793 && known_eq (bitsize,
10794 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10795 && maybe_ne (bitsize, 0))
10796 {
10797 op0 = XEXP (op0, 0);
10798 mode2 = GET_MODE (op0);
10799 }
10800 else if (known_eq (bitpos,
10801 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10802 && known_eq (bitsize,
10803 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))))
10804 && maybe_ne (bitpos, 0)
10805 && maybe_ne (bitsize, 0))
10806 {
10807 op0 = XEXP (op0, 1);
10808 bitpos = 0;
10809 mode2 = GET_MODE (op0);
10810 }
10811 else
10812 /* Otherwise force into memory. */
10813 must_force_mem = 1;
10814 }
10815
10816 /* If this is a constant, put it in a register if it is a legitimate
10817 constant and we don't need a memory reference. */
10818 if (CONSTANT_P (op0)
10819 && mode2 != BLKmode
10820 && targetm.legitimate_constant_p (mode2, op0)
10821 && !must_force_mem)
10822 op0 = force_reg (mode2, op0);
10823
10824 /* Otherwise, if this is a constant, try to force it to the constant
10825 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10826 is a legitimate constant. */
10827 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10828 op0 = validize_mem (memloc);
10829
10830 /* Otherwise, if this is a constant or the object is not in memory
10831 and need be, put it there. */
10832 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10833 {
10834 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10835 emit_move_insn (memloc, op0);
10836 op0 = memloc;
10837 clear_mem_expr = true;
10838 }
10839
10840 if (offset)
10841 {
10842 machine_mode address_mode;
10843 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10844 EXPAND_SUM);
10845
10846 gcc_assert (MEM_P (op0));
10847
10848 address_mode = get_address_mode (op0);
10849 if (GET_MODE (offset_rtx) != address_mode)
10850 {
10851 /* We cannot be sure that the RTL in offset_rtx is valid outside
10852 of a memory address context, so force it into a register
10853 before attempting to convert it to the desired mode. */
10854 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10855 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10856 }
10857
10858 /* See the comment in expand_assignment for the rationale. */
10859 if (mode1 != VOIDmode
10860 && maybe_ne (bitpos, 0)
10861 && maybe_gt (bitsize, 0)
10862 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10863 && multiple_p (bitpos, bitsize)
10864 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
10865 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10866 {
10867 op0 = adjust_address (op0, mode1, bytepos);
10868 bitpos = 0;
10869 }
10870
10871 op0 = offset_address (op0, offset_rtx,
10872 highest_pow2_factor (offset));
10873 }
10874
10875 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10876 record its alignment as BIGGEST_ALIGNMENT. */
10877 if (MEM_P (op0)
10878 && known_eq (bitpos, 0)
10879 && offset != 0
10880 && is_aligning_offset (offset, tem))
10881 set_mem_align (op0, BIGGEST_ALIGNMENT);
10882
10883 /* Don't forget about volatility even if this is a bitfield. */
10884 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10885 {
10886 if (op0 == orig_op0)
10887 op0 = copy_rtx (op0);
10888
10889 MEM_VOLATILE_P (op0) = 1;
10890 }
10891
10892 if (MEM_P (op0) && TREE_CODE (tem) == FUNCTION_DECL)
10893 {
10894 if (op0 == orig_op0)
10895 op0 = copy_rtx (op0);
10896
10897 set_mem_align (op0, BITS_PER_UNIT);
10898 }
10899
10900 /* In cases where an aligned union has an unaligned object
10901 as a field, we might be extracting a BLKmode value from
10902 an integer-mode (e.g., SImode) object. Handle this case
10903 by doing the extract into an object as wide as the field
10904 (which we know to be the width of a basic mode), then
10905 storing into memory, and changing the mode to BLKmode. */
10906 if (mode1 == VOIDmode
10907 || REG_P (op0) || GET_CODE (op0) == SUBREG
10908 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10909 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10910 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10911 && modifier != EXPAND_CONST_ADDRESS
10912 && modifier != EXPAND_INITIALIZER
10913 && modifier != EXPAND_MEMORY)
10914 /* If the bitfield is volatile and the bitsize
10915 is narrower than the access size of the bitfield,
10916 we need to extract bitfields from the access. */
10917 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10918 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10919 && mode1 != BLKmode
10920 && maybe_lt (bitsize, GET_MODE_SIZE (mode1) * BITS_PER_UNIT))
10921 /* If the field isn't aligned enough to fetch as a memref,
10922 fetch it as a bit field. */
10923 || (mode1 != BLKmode
10924 && (((MEM_P (op0)
10925 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10926 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode1))
10927 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10928 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
10929 && modifier != EXPAND_MEMORY
10930 && ((modifier == EXPAND_CONST_ADDRESS
10931 || modifier == EXPAND_INITIALIZER)
10932 ? STRICT_ALIGNMENT
10933 : targetm.slow_unaligned_access (mode1,
10934 MEM_ALIGN (op0))))
10935 || !multiple_p (bitpos, BITS_PER_UNIT)))
10936 /* If the type and the field are a constant size and the
10937 size of the type isn't the same size as the bitfield,
10938 we must use bitfield operations. */
10939 || (known_size_p (bitsize)
10940 && TYPE_SIZE (TREE_TYPE (exp))
10941 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
10942 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
10943 bitsize)))
10944 {
10945 machine_mode ext_mode = mode;
10946
10947 if (ext_mode == BLKmode
10948 && ! (target != 0 && MEM_P (op0)
10949 && MEM_P (target)
10950 && multiple_p (bitpos, BITS_PER_UNIT)))
10951 ext_mode = int_mode_for_size (bitsize, 1).else_blk ();
10952
10953 if (ext_mode == BLKmode)
10954 {
10955 if (target == 0)
10956 target = assign_temp (type, 1, 1);
10957
10958 /* ??? Unlike the similar test a few lines below, this one is
10959 very likely obsolete. */
10960 if (known_eq (bitsize, 0))
10961 return target;
10962
10963 /* In this case, BITPOS must start at a byte boundary and
10964 TARGET, if specified, must be a MEM. */
10965 gcc_assert (MEM_P (op0)
10966 && (!target || MEM_P (target)));
10967
10968 bytepos = exact_div (bitpos, BITS_PER_UNIT);
10969 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
10970 emit_block_move (target,
10971 adjust_address (op0, VOIDmode, bytepos),
10972 gen_int_mode (bytesize, Pmode),
10973 (modifier == EXPAND_STACK_PARM
10974 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10975
10976 return target;
10977 }
10978
10979 /* If we have nothing to extract, the result will be 0 for targets
10980 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10981 return 0 for the sake of consistency, as reading a zero-sized
10982 bitfield is valid in Ada and the value is fully specified. */
10983 if (known_eq (bitsize, 0))
10984 return const0_rtx;
10985
10986 op0 = validize_mem (op0);
10987
10988 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10989 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10990
10991 /* If the result has aggregate type and the extraction is done in
10992 an integral mode, then the field may be not aligned on a byte
10993 boundary; in this case, if it has reverse storage order, it
10994 needs to be extracted as a scalar field with reverse storage
10995 order and put back into memory order afterwards. */
10996 if (AGGREGATE_TYPE_P (type)
10997 && GET_MODE_CLASS (ext_mode) == MODE_INT)
10998 reversep = TYPE_REVERSE_STORAGE_ORDER (type);
10999
11000 gcc_checking_assert (known_ge (bitpos, 0));
11001 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
11002 (modifier == EXPAND_STACK_PARM
11003 ? NULL_RTX : target),
11004 ext_mode, ext_mode, reversep, alt_rtl);
11005
11006 /* If the result has aggregate type and the mode of OP0 is an
11007 integral mode then, if BITSIZE is narrower than this mode
11008 and this is for big-endian data, we must put the field
11009 into the high-order bits. And we must also put it back
11010 into memory order if it has been previously reversed. */
11011 scalar_int_mode op0_mode;
11012 if (AGGREGATE_TYPE_P (type)
11013 && is_int_mode (GET_MODE (op0), &op0_mode))
11014 {
11015 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode);
11016
11017 gcc_checking_assert (known_le (bitsize, size));
11018 if (maybe_lt (bitsize, size)
11019 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
11020 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0,
11021 size - bitsize, op0, 1);
11022
11023 if (reversep)
11024 op0 = flip_storage_order (op0_mode, op0);
11025 }
11026
11027 /* If the result type is BLKmode, store the data into a temporary
11028 of the appropriate type, but with the mode corresponding to the
11029 mode for the data we have (op0's mode). */
11030 if (mode == BLKmode)
11031 {
11032 rtx new_rtx
11033 = assign_stack_temp_for_type (ext_mode,
11034 GET_MODE_BITSIZE (ext_mode),
11035 type);
11036 emit_move_insn (new_rtx, op0);
11037 op0 = copy_rtx (new_rtx);
11038 PUT_MODE (op0, BLKmode);
11039 }
11040
11041 return op0;
11042 }
11043
11044 /* If the result is BLKmode, use that to access the object
11045 now as well. */
11046 if (mode == BLKmode)
11047 mode1 = BLKmode;
11048
11049 /* Get a reference to just this component. */
11050 bytepos = bits_to_bytes_round_down (bitpos);
11051 if (modifier == EXPAND_CONST_ADDRESS
11052 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
11053 op0 = adjust_address_nv (op0, mode1, bytepos);
11054 else
11055 op0 = adjust_address (op0, mode1, bytepos);
11056
11057 if (op0 == orig_op0)
11058 op0 = copy_rtx (op0);
11059
11060 /* Don't set memory attributes if the base expression is
11061 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11062 we should just honor its original memory attributes. */
11063 if (!(TREE_CODE (tem) == SSA_NAME
11064 && (MEM_P (orig_op0) || CONSTANT_P (orig_op0))))
11065 set_mem_attributes (op0, exp, 0);
11066
11067 if (REG_P (XEXP (op0, 0)))
11068 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
11069
11070 /* If op0 is a temporary because the original expressions was forced
11071 to memory, clear MEM_EXPR so that the original expression cannot
11072 be marked as addressable through MEM_EXPR of the temporary. */
11073 if (clear_mem_expr)
11074 set_mem_expr (op0, NULL_TREE);
11075
11076 MEM_VOLATILE_P (op0) |= volatilep;
11077
11078 if (reversep
11079 && modifier != EXPAND_MEMORY
11080 && modifier != EXPAND_WRITE)
11081 op0 = flip_storage_order (mode1, op0);
11082
11083 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
11084 || modifier == EXPAND_CONST_ADDRESS
11085 || modifier == EXPAND_INITIALIZER)
11086 return op0;
11087
11088 if (target == 0)
11089 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
11090
11091 convert_move (target, op0, unsignedp);
11092 return target;
11093 }
11094
11095 case OBJ_TYPE_REF:
11096 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
11097
11098 case CALL_EXPR:
11099 /* All valid uses of __builtin_va_arg_pack () are removed during
11100 inlining. */
11101 if (CALL_EXPR_VA_ARG_PACK (exp))
11102 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
11103 {
11104 tree fndecl = get_callee_fndecl (exp), attr;
11105
11106 if (fndecl
11107 /* Don't diagnose the error attribute in thunks, those are
11108 artificially created. */
11109 && !CALL_FROM_THUNK_P (exp)
11110 && (attr = lookup_attribute ("error",
11111 DECL_ATTRIBUTES (fndecl))) != NULL)
11112 {
11113 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
11114 error ("%Kcall to %qs declared with attribute error: %s", exp,
11115 identifier_to_locale (ident),
11116 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
11117 }
11118 if (fndecl
11119 /* Don't diagnose the warning attribute in thunks, those are
11120 artificially created. */
11121 && !CALL_FROM_THUNK_P (exp)
11122 && (attr = lookup_attribute ("warning",
11123 DECL_ATTRIBUTES (fndecl))) != NULL)
11124 {
11125 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
11126 warning_at (tree_nonartificial_location (exp),
11127 OPT_Wattribute_warning,
11128 "%Kcall to %qs declared with attribute warning: %s",
11129 exp, identifier_to_locale (ident),
11130 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
11131 }
11132
11133 /* Check for a built-in function. */
11134 if (fndecl && fndecl_built_in_p (fndecl))
11135 {
11136 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
11137 return expand_builtin (exp, target, subtarget, tmode, ignore);
11138 }
11139 }
11140 return expand_call (exp, target, ignore);
11141
11142 case VIEW_CONVERT_EXPR:
11143 op0 = NULL_RTX;
11144
11145 /* If we are converting to BLKmode, try to avoid an intermediate
11146 temporary by fetching an inner memory reference. */
11147 if (mode == BLKmode
11148 && poly_int_tree_p (TYPE_SIZE (type))
11149 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
11150 && handled_component_p (treeop0))
11151 {
11152 machine_mode mode1;
11153 poly_int64 bitsize, bitpos, bytepos;
11154 tree offset;
11155 int reversep, volatilep = 0;
11156 tree tem
11157 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1,
11158 &unsignedp, &reversep, &volatilep);
11159
11160 /* ??? We should work harder and deal with non-zero offsets. */
11161 if (!offset
11162 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
11163 && !reversep
11164 && known_size_p (bitsize)
11165 && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize))
11166 {
11167 /* See the normal_inner_ref case for the rationale. */
11168 rtx orig_op0
11169 = expand_expr_real (tem,
11170 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
11171 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
11172 != INTEGER_CST)
11173 && modifier != EXPAND_STACK_PARM
11174 ? target : NULL_RTX),
11175 VOIDmode,
11176 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
11177 NULL, true);
11178
11179 if (MEM_P (orig_op0))
11180 {
11181 op0 = orig_op0;
11182
11183 /* Get a reference to just this component. */
11184 if (modifier == EXPAND_CONST_ADDRESS
11185 || modifier == EXPAND_SUM
11186 || modifier == EXPAND_INITIALIZER)
11187 op0 = adjust_address_nv (op0, mode, bytepos);
11188 else
11189 op0 = adjust_address (op0, mode, bytepos);
11190
11191 if (op0 == orig_op0)
11192 op0 = copy_rtx (op0);
11193
11194 set_mem_attributes (op0, treeop0, 0);
11195 if (REG_P (XEXP (op0, 0)))
11196 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
11197
11198 MEM_VOLATILE_P (op0) |= volatilep;
11199 }
11200 }
11201 }
11202
11203 if (!op0)
11204 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
11205 NULL, inner_reference_p);
11206
11207 /* If the input and output modes are both the same, we are done. */
11208 if (mode == GET_MODE (op0))
11209 ;
11210 /* If neither mode is BLKmode, and both modes are the same size
11211 then we can use gen_lowpart. */
11212 else if (mode != BLKmode
11213 && GET_MODE (op0) != BLKmode
11214 && known_eq (GET_MODE_PRECISION (mode),
11215 GET_MODE_PRECISION (GET_MODE (op0)))
11216 && !COMPLEX_MODE_P (GET_MODE (op0)))
11217 {
11218 if (GET_CODE (op0) == SUBREG)
11219 op0 = force_reg (GET_MODE (op0), op0);
11220 temp = gen_lowpart_common (mode, op0);
11221 if (temp)
11222 op0 = temp;
11223 else
11224 {
11225 if (!REG_P (op0) && !MEM_P (op0))
11226 op0 = force_reg (GET_MODE (op0), op0);
11227 op0 = gen_lowpart (mode, op0);
11228 }
11229 }
11230 /* If both types are integral, convert from one mode to the other. */
11231 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
11232 op0 = convert_modes (mode, GET_MODE (op0), op0,
11233 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
11234 /* If the output type is a bit-field type, do an extraction. */
11235 else if (reduce_bit_field)
11236 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
11237 TYPE_UNSIGNED (type), NULL_RTX,
11238 mode, mode, false, NULL);
11239 /* As a last resort, spill op0 to memory, and reload it in a
11240 different mode. */
11241 else if (!MEM_P (op0))
11242 {
11243 /* If the operand is not a MEM, force it into memory. Since we
11244 are going to be changing the mode of the MEM, don't call
11245 force_const_mem for constants because we don't allow pool
11246 constants to change mode. */
11247 tree inner_type = TREE_TYPE (treeop0);
11248
11249 gcc_assert (!TREE_ADDRESSABLE (exp));
11250
11251 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
11252 target
11253 = assign_stack_temp_for_type
11254 (TYPE_MODE (inner_type),
11255 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
11256
11257 emit_move_insn (target, op0);
11258 op0 = target;
11259 }
11260
11261 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11262 output type is such that the operand is known to be aligned, indicate
11263 that it is. Otherwise, we need only be concerned about alignment for
11264 non-BLKmode results. */
11265 if (MEM_P (op0))
11266 {
11267 enum insn_code icode;
11268
11269 if (modifier != EXPAND_WRITE
11270 && modifier != EXPAND_MEMORY
11271 && !inner_reference_p
11272 && mode != BLKmode
11273 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
11274 {
11275 /* If the target does have special handling for unaligned
11276 loads of mode then use them. */
11277 if ((icode = optab_handler (movmisalign_optab, mode))
11278 != CODE_FOR_nothing)
11279 {
11280 rtx reg;
11281
11282 op0 = adjust_address (op0, mode, 0);
11283 /* We've already validated the memory, and we're creating a
11284 new pseudo destination. The predicates really can't
11285 fail. */
11286 reg = gen_reg_rtx (mode);
11287
11288 /* Nor can the insn generator. */
11289 rtx_insn *insn = GEN_FCN (icode) (reg, op0);
11290 emit_insn (insn);
11291 return reg;
11292 }
11293 else if (STRICT_ALIGNMENT)
11294 {
11295 poly_uint64 mode_size = GET_MODE_SIZE (mode);
11296 poly_uint64 temp_size = mode_size;
11297 if (GET_MODE (op0) != BLKmode)
11298 temp_size = upper_bound (temp_size,
11299 GET_MODE_SIZE (GET_MODE (op0)));
11300 rtx new_rtx
11301 = assign_stack_temp_for_type (mode, temp_size, type);
11302 rtx new_with_op0_mode
11303 = adjust_address (new_rtx, GET_MODE (op0), 0);
11304
11305 gcc_assert (!TREE_ADDRESSABLE (exp));
11306
11307 if (GET_MODE (op0) == BLKmode)
11308 {
11309 rtx size_rtx = gen_int_mode (mode_size, Pmode);
11310 emit_block_move (new_with_op0_mode, op0, size_rtx,
11311 (modifier == EXPAND_STACK_PARM
11312 ? BLOCK_OP_CALL_PARM
11313 : BLOCK_OP_NORMAL));
11314 }
11315 else
11316 emit_move_insn (new_with_op0_mode, op0);
11317
11318 op0 = new_rtx;
11319 }
11320 }
11321
11322 op0 = adjust_address (op0, mode, 0);
11323 }
11324
11325 return op0;
11326
11327 case MODIFY_EXPR:
11328 {
11329 tree lhs = treeop0;
11330 tree rhs = treeop1;
11331 gcc_assert (ignore);
11332
11333 /* Check for |= or &= of a bitfield of size one into another bitfield
11334 of size 1. In this case, (unless we need the result of the
11335 assignment) we can do this more efficiently with a
11336 test followed by an assignment, if necessary.
11337
11338 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11339 things change so we do, this code should be enhanced to
11340 support it. */
11341 if (TREE_CODE (lhs) == COMPONENT_REF
11342 && (TREE_CODE (rhs) == BIT_IOR_EXPR
11343 || TREE_CODE (rhs) == BIT_AND_EXPR)
11344 && TREE_OPERAND (rhs, 0) == lhs
11345 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
11346 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
11347 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
11348 {
11349 rtx_code_label *label = gen_label_rtx ();
11350 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
11351 profile_probability prob = profile_probability::uninitialized ();
11352 if (value)
11353 jumpifnot (TREE_OPERAND (rhs, 1), label, prob);
11354 else
11355 jumpif (TREE_OPERAND (rhs, 1), label, prob);
11356 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
11357 false);
11358 do_pending_stack_adjust ();
11359 emit_label (label);
11360 return const0_rtx;
11361 }
11362
11363 expand_assignment (lhs, rhs, false);
11364 return const0_rtx;
11365 }
11366
11367 case ADDR_EXPR:
11368 return expand_expr_addr_expr (exp, target, tmode, modifier);
11369
11370 case REALPART_EXPR:
11371 op0 = expand_normal (treeop0);
11372 return read_complex_part (op0, false);
11373
11374 case IMAGPART_EXPR:
11375 op0 = expand_normal (treeop0);
11376 return read_complex_part (op0, true);
11377
11378 case RETURN_EXPR:
11379 case LABEL_EXPR:
11380 case GOTO_EXPR:
11381 case SWITCH_EXPR:
11382 case ASM_EXPR:
11383 /* Expanded in cfgexpand.c. */
11384 gcc_unreachable ();
11385
11386 case TRY_CATCH_EXPR:
11387 case CATCH_EXPR:
11388 case EH_FILTER_EXPR:
11389 case TRY_FINALLY_EXPR:
11390 case EH_ELSE_EXPR:
11391 /* Lowered by tree-eh.c. */
11392 gcc_unreachable ();
11393
11394 case WITH_CLEANUP_EXPR:
11395 case CLEANUP_POINT_EXPR:
11396 case TARGET_EXPR:
11397 case CASE_LABEL_EXPR:
11398 case VA_ARG_EXPR:
11399 case BIND_EXPR:
11400 case INIT_EXPR:
11401 case CONJ_EXPR:
11402 case COMPOUND_EXPR:
11403 case PREINCREMENT_EXPR:
11404 case PREDECREMENT_EXPR:
11405 case POSTINCREMENT_EXPR:
11406 case POSTDECREMENT_EXPR:
11407 case LOOP_EXPR:
11408 case EXIT_EXPR:
11409 case COMPOUND_LITERAL_EXPR:
11410 /* Lowered by gimplify.c. */
11411 gcc_unreachable ();
11412
11413 case FDESC_EXPR:
11414 /* Function descriptors are not valid except for as
11415 initialization constants, and should not be expanded. */
11416 gcc_unreachable ();
11417
11418 case WITH_SIZE_EXPR:
11419 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11420 have pulled out the size to use in whatever context it needed. */
11421 return expand_expr_real (treeop0, original_target, tmode,
11422 modifier, alt_rtl, inner_reference_p);
11423
11424 default:
11425 return expand_expr_real_2 (&ops, target, tmode, modifier);
11426 }
11427 }
11428
11429 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11430 signedness of TYPE), possibly returning the result in TARGET.
11431 TYPE is known to be a partial integer type. */
11432 static rtx
reduce_to_bit_field_precision(rtx exp,rtx target,tree type)11433 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
11434 {
11435 HOST_WIDE_INT prec = TYPE_PRECISION (type);
11436 if (target && GET_MODE (target) != GET_MODE (exp))
11437 target = 0;
11438 /* For constant values, reduce using build_int_cst_type. */
11439 poly_int64 const_exp;
11440 if (poly_int_rtx_p (exp, &const_exp))
11441 {
11442 tree t = build_int_cst_type (type, const_exp);
11443 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
11444 }
11445 else if (TYPE_UNSIGNED (type))
11446 {
11447 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11448 rtx mask = immed_wide_int_const
11449 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
11450 return expand_and (mode, exp, mask, target);
11451 }
11452 else
11453 {
11454 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11455 int count = GET_MODE_PRECISION (mode) - prec;
11456 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0);
11457 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
11458 }
11459 }
11460
11461 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11462 when applied to the address of EXP produces an address known to be
11463 aligned more than BIGGEST_ALIGNMENT. */
11464
11465 static int
is_aligning_offset(const_tree offset,const_tree exp)11466 is_aligning_offset (const_tree offset, const_tree exp)
11467 {
11468 /* Strip off any conversions. */
11469 while (CONVERT_EXPR_P (offset))
11470 offset = TREE_OPERAND (offset, 0);
11471
11472 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11473 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11474 if (TREE_CODE (offset) != BIT_AND_EXPR
11475 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
11476 || compare_tree_int (TREE_OPERAND (offset, 1),
11477 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
11478 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1))
11479 return 0;
11480
11481 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11482 It must be NEGATE_EXPR. Then strip any more conversions. */
11483 offset = TREE_OPERAND (offset, 0);
11484 while (CONVERT_EXPR_P (offset))
11485 offset = TREE_OPERAND (offset, 0);
11486
11487 if (TREE_CODE (offset) != NEGATE_EXPR)
11488 return 0;
11489
11490 offset = TREE_OPERAND (offset, 0);
11491 while (CONVERT_EXPR_P (offset))
11492 offset = TREE_OPERAND (offset, 0);
11493
11494 /* This must now be the address of EXP. */
11495 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
11496 }
11497
11498 /* Return the tree node if an ARG corresponds to a string constant or zero
11499 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11500 non-constant) offset in bytes within the string that ARG is accessing.
11501 If MEM_SIZE is non-zero the storage size of the memory is returned.
11502 If DECL is non-zero the constant declaration is returned if available. */
11503
11504 tree
string_constant(tree arg,tree * ptr_offset,tree * mem_size,tree * decl)11505 string_constant (tree arg, tree *ptr_offset, tree *mem_size, tree *decl)
11506 {
11507 tree dummy = NULL_TREE;;
11508 if (!mem_size)
11509 mem_size = &dummy;
11510
11511 /* Store the type of the original expression before conversions
11512 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11513 removed. */
11514 tree argtype = TREE_TYPE (arg);
11515
11516 tree array;
11517 STRIP_NOPS (arg);
11518
11519 /* Non-constant index into the character array in an ARRAY_REF
11520 expression or null. */
11521 tree varidx = NULL_TREE;
11522
11523 poly_int64 base_off = 0;
11524
11525 if (TREE_CODE (arg) == ADDR_EXPR)
11526 {
11527 arg = TREE_OPERAND (arg, 0);
11528 tree ref = arg;
11529 if (TREE_CODE (arg) == ARRAY_REF)
11530 {
11531 tree idx = TREE_OPERAND (arg, 1);
11532 if (TREE_CODE (idx) != INTEGER_CST)
11533 {
11534 /* From a pointer (but not array) argument extract the variable
11535 index to prevent get_addr_base_and_unit_offset() from failing
11536 due to it. Use it later to compute the non-constant offset
11537 into the string and return it to the caller. */
11538 varidx = idx;
11539 ref = TREE_OPERAND (arg, 0);
11540
11541 if (TREE_CODE (TREE_TYPE (arg)) == ARRAY_TYPE)
11542 return NULL_TREE;
11543
11544 if (!integer_zerop (array_ref_low_bound (arg)))
11545 return NULL_TREE;
11546
11547 if (!integer_onep (array_ref_element_size (arg)))
11548 return NULL_TREE;
11549 }
11550 }
11551 array = get_addr_base_and_unit_offset (ref, &base_off);
11552 if (!array
11553 || (TREE_CODE (array) != VAR_DECL
11554 && TREE_CODE (array) != CONST_DECL
11555 && TREE_CODE (array) != STRING_CST))
11556 return NULL_TREE;
11557 }
11558 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
11559 {
11560 tree arg0 = TREE_OPERAND (arg, 0);
11561 tree arg1 = TREE_OPERAND (arg, 1);
11562
11563 tree offset;
11564 tree str = string_constant (arg0, &offset, mem_size, decl);
11565 if (!str)
11566 {
11567 str = string_constant (arg1, &offset, mem_size, decl);
11568 arg1 = arg0;
11569 }
11570
11571 if (str)
11572 {
11573 /* Avoid pointers to arrays (see bug 86622). */
11574 if (POINTER_TYPE_P (TREE_TYPE (arg))
11575 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg))) == ARRAY_TYPE
11576 && !(decl && !*decl)
11577 && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl))
11578 && tree_fits_uhwi_p (*mem_size)
11579 && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl))))
11580 return NULL_TREE;
11581
11582 tree type = TREE_TYPE (offset);
11583 arg1 = fold_convert (type, arg1);
11584 *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, arg1);
11585 return str;
11586 }
11587 return NULL_TREE;
11588 }
11589 else if (TREE_CODE (arg) == SSA_NAME)
11590 {
11591 gimple *stmt = SSA_NAME_DEF_STMT (arg);
11592 if (!is_gimple_assign (stmt))
11593 return NULL_TREE;
11594
11595 tree rhs1 = gimple_assign_rhs1 (stmt);
11596 tree_code code = gimple_assign_rhs_code (stmt);
11597 if (code == ADDR_EXPR)
11598 return string_constant (rhs1, ptr_offset, mem_size, decl);
11599 else if (code != POINTER_PLUS_EXPR)
11600 return NULL_TREE;
11601
11602 tree offset;
11603 if (tree str = string_constant (rhs1, &offset, mem_size, decl))
11604 {
11605 /* Avoid pointers to arrays (see bug 86622). */
11606 if (POINTER_TYPE_P (TREE_TYPE (rhs1))
11607 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1))) == ARRAY_TYPE
11608 && !(decl && !*decl)
11609 && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl))
11610 && tree_fits_uhwi_p (*mem_size)
11611 && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl))))
11612 return NULL_TREE;
11613
11614 tree rhs2 = gimple_assign_rhs2 (stmt);
11615 tree type = TREE_TYPE (offset);
11616 rhs2 = fold_convert (type, rhs2);
11617 *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, rhs2);
11618 return str;
11619 }
11620 return NULL_TREE;
11621 }
11622 else if (DECL_P (arg))
11623 array = arg;
11624 else
11625 return NULL_TREE;
11626
11627 tree offset = wide_int_to_tree (sizetype, base_off);
11628 if (varidx)
11629 {
11630 if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE)
11631 return NULL_TREE;
11632
11633 gcc_assert (TREE_CODE (arg) == ARRAY_REF);
11634 tree chartype = TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg, 0)));
11635 if (TREE_CODE (chartype) != INTEGER_TYPE)
11636 return NULL;
11637
11638 offset = fold_convert (sizetype, varidx);
11639 }
11640
11641 if (TREE_CODE (array) == STRING_CST)
11642 {
11643 *ptr_offset = fold_convert (sizetype, offset);
11644 *mem_size = TYPE_SIZE_UNIT (TREE_TYPE (array));
11645 if (decl)
11646 *decl = NULL_TREE;
11647 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array)))
11648 >= TREE_STRING_LENGTH (array));
11649 return array;
11650 }
11651
11652 if (!VAR_P (array) && TREE_CODE (array) != CONST_DECL)
11653 return NULL_TREE;
11654
11655 tree init = ctor_for_folding (array);
11656
11657 /* Handle variables initialized with string literals. */
11658 if (!init || init == error_mark_node)
11659 return NULL_TREE;
11660 if (TREE_CODE (init) == CONSTRUCTOR)
11661 {
11662 /* Convert the 64-bit constant offset to a wider type to avoid
11663 overflow. */
11664 offset_int wioff;
11665 if (!base_off.is_constant (&wioff))
11666 return NULL_TREE;
11667
11668 wioff *= BITS_PER_UNIT;
11669 if (!wi::fits_uhwi_p (wioff))
11670 return NULL_TREE;
11671
11672 base_off = wioff.to_uhwi ();
11673 unsigned HOST_WIDE_INT fieldoff = 0;
11674 init = fold_ctor_reference (TREE_TYPE (arg), init, base_off, 0, array,
11675 &fieldoff);
11676 HOST_WIDE_INT cstoff;
11677 if (!base_off.is_constant (&cstoff))
11678 return NULL_TREE;
11679
11680 cstoff = (cstoff - fieldoff) / BITS_PER_UNIT;
11681 tree off = build_int_cst (sizetype, cstoff);
11682 if (varidx)
11683 offset = fold_build2 (PLUS_EXPR, TREE_TYPE (offset), offset, off);
11684 else
11685 offset = off;
11686 }
11687
11688 if (!init)
11689 return NULL_TREE;
11690
11691 *ptr_offset = offset;
11692
11693 tree inittype = TREE_TYPE (init);
11694
11695 if (TREE_CODE (init) == INTEGER_CST
11696 && (TREE_CODE (TREE_TYPE (array)) == INTEGER_TYPE
11697 || TYPE_MAIN_VARIANT (inittype) == char_type_node))
11698 {
11699 /* For a reference to (address of) a single constant character,
11700 store the native representation of the character in CHARBUF.
11701 If the reference is to an element of an array or a member
11702 of a struct, only consider narrow characters until ctors
11703 for wide character arrays are transformed to STRING_CSTs
11704 like those for narrow arrays. */
11705 unsigned char charbuf[MAX_BITSIZE_MODE_ANY_MODE / BITS_PER_UNIT];
11706 int len = native_encode_expr (init, charbuf, sizeof charbuf, 0);
11707 if (len > 0)
11708 {
11709 /* Construct a string literal with elements of INITTYPE and
11710 the representation above. Then strip
11711 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11712 init = build_string_literal (len, (char *)charbuf, inittype);
11713 init = TREE_OPERAND (TREE_OPERAND (init, 0), 0);
11714 }
11715 }
11716
11717 tree initsize = TYPE_SIZE_UNIT (inittype);
11718
11719 if (TREE_CODE (init) == CONSTRUCTOR && initializer_zerop (init))
11720 {
11721 /* Fold an empty/zero constructor for an implicitly initialized
11722 object or subobject into the empty string. */
11723
11724 /* Determine the character type from that of the original
11725 expression. */
11726 tree chartype = argtype;
11727 if (POINTER_TYPE_P (chartype))
11728 chartype = TREE_TYPE (chartype);
11729 while (TREE_CODE (chartype) == ARRAY_TYPE)
11730 chartype = TREE_TYPE (chartype);
11731 /* Convert a char array to an empty STRING_CST having an array
11732 of the expected type. */
11733 if (!initsize)
11734 initsize = integer_zero_node;
11735
11736 unsigned HOST_WIDE_INT size = tree_to_uhwi (initsize);
11737 init = build_string_literal (size ? 1 : 0, "", chartype, size);
11738 init = TREE_OPERAND (init, 0);
11739 init = TREE_OPERAND (init, 0);
11740
11741 *ptr_offset = integer_zero_node;
11742 }
11743
11744 if (decl)
11745 *decl = array;
11746
11747 if (TREE_CODE (init) != STRING_CST)
11748 return NULL_TREE;
11749
11750 *mem_size = initsize;
11751
11752 gcc_checking_assert (tree_to_shwi (initsize) >= TREE_STRING_LENGTH (init));
11753
11754 return init;
11755 }
11756
11757 /* Compute the modular multiplicative inverse of A modulo M
11758 using extended Euclid's algorithm. Assumes A and M are coprime. */
11759 static wide_int
mod_inv(const wide_int & a,const wide_int & b)11760 mod_inv (const wide_int &a, const wide_int &b)
11761 {
11762 /* Verify the assumption. */
11763 gcc_checking_assert (wi::eq_p (wi::gcd (a, b), 1));
11764
11765 unsigned int p = a.get_precision () + 1;
11766 gcc_checking_assert (b.get_precision () + 1 == p);
11767 wide_int c = wide_int::from (a, p, UNSIGNED);
11768 wide_int d = wide_int::from (b, p, UNSIGNED);
11769 wide_int x0 = wide_int::from (0, p, UNSIGNED);
11770 wide_int x1 = wide_int::from (1, p, UNSIGNED);
11771
11772 if (wi::eq_p (b, 1))
11773 return wide_int::from (1, p, UNSIGNED);
11774
11775 while (wi::gt_p (c, 1, UNSIGNED))
11776 {
11777 wide_int t = d;
11778 wide_int q = wi::divmod_trunc (c, d, UNSIGNED, &d);
11779 c = t;
11780 wide_int s = x0;
11781 x0 = wi::sub (x1, wi::mul (q, x0));
11782 x1 = s;
11783 }
11784 if (wi::lt_p (x1, 0, SIGNED))
11785 x1 += d;
11786 return x1;
11787 }
11788
11789 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11790 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11791 for C2 > 0 to x & C3 == C2
11792 for C2 < 0 to x & C3 == (C2 & C3). */
11793 enum tree_code
maybe_optimize_pow2p_mod_cmp(enum tree_code code,tree * arg0,tree * arg1)11794 maybe_optimize_pow2p_mod_cmp (enum tree_code code, tree *arg0, tree *arg1)
11795 {
11796 gimple *stmt = get_def_for_expr (*arg0, TRUNC_MOD_EXPR);
11797 tree treeop0 = gimple_assign_rhs1 (stmt);
11798 tree treeop1 = gimple_assign_rhs2 (stmt);
11799 tree type = TREE_TYPE (*arg0);
11800 scalar_int_mode mode;
11801 if (!is_a <scalar_int_mode> (TYPE_MODE (type), &mode))
11802 return code;
11803 if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type)
11804 || TYPE_PRECISION (type) <= 1
11805 || TYPE_UNSIGNED (type)
11806 /* Signed x % c == 0 should have been optimized into unsigned modulo
11807 earlier. */
11808 || integer_zerop (*arg1)
11809 /* If c is known to be non-negative, modulo will be expanded as unsigned
11810 modulo. */
11811 || get_range_pos_neg (treeop0) == 1)
11812 return code;
11813
11814 /* x % c == d where d < 0 && d <= -c should be always false. */
11815 if (tree_int_cst_sgn (*arg1) == -1
11816 && -wi::to_widest (treeop1) >= wi::to_widest (*arg1))
11817 return code;
11818
11819 int prec = TYPE_PRECISION (type);
11820 wide_int w = wi::to_wide (treeop1) - 1;
11821 w |= wi::shifted_mask (0, prec - 1, true, prec);
11822 tree c3 = wide_int_to_tree (type, w);
11823 tree c4 = *arg1;
11824 if (tree_int_cst_sgn (*arg1) == -1)
11825 c4 = wide_int_to_tree (type, w & wi::to_wide (*arg1));
11826
11827 rtx op0 = expand_normal (treeop0);
11828 treeop0 = make_tree (TREE_TYPE (treeop0), op0);
11829
11830 bool speed_p = optimize_insn_for_speed_p ();
11831
11832 do_pending_stack_adjust ();
11833
11834 location_t loc = gimple_location (stmt);
11835 struct separate_ops ops;
11836 ops.code = TRUNC_MOD_EXPR;
11837 ops.location = loc;
11838 ops.type = TREE_TYPE (treeop0);
11839 ops.op0 = treeop0;
11840 ops.op1 = treeop1;
11841 ops.op2 = NULL_TREE;
11842 start_sequence ();
11843 rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
11844 EXPAND_NORMAL);
11845 rtx_insn *moinsns = get_insns ();
11846 end_sequence ();
11847
11848 unsigned mocost = seq_cost (moinsns, speed_p);
11849 mocost += rtx_cost (mor, mode, EQ, 0, speed_p);
11850 mocost += rtx_cost (expand_normal (*arg1), mode, EQ, 1, speed_p);
11851
11852 ops.code = BIT_AND_EXPR;
11853 ops.location = loc;
11854 ops.type = TREE_TYPE (treeop0);
11855 ops.op0 = treeop0;
11856 ops.op1 = c3;
11857 ops.op2 = NULL_TREE;
11858 start_sequence ();
11859 rtx mur = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
11860 EXPAND_NORMAL);
11861 rtx_insn *muinsns = get_insns ();
11862 end_sequence ();
11863
11864 unsigned mucost = seq_cost (muinsns, speed_p);
11865 mucost += rtx_cost (mur, mode, EQ, 0, speed_p);
11866 mucost += rtx_cost (expand_normal (c4), mode, EQ, 1, speed_p);
11867
11868 if (mocost <= mucost)
11869 {
11870 emit_insn (moinsns);
11871 *arg0 = make_tree (TREE_TYPE (*arg0), mor);
11872 return code;
11873 }
11874
11875 emit_insn (muinsns);
11876 *arg0 = make_tree (TREE_TYPE (*arg0), mur);
11877 *arg1 = c4;
11878 return code;
11879 }
11880
11881 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11882 If C1 is odd to:
11883 (X - C2) * C3 <= C4 (or >), where
11884 C3 is modular multiplicative inverse of C1 and 1<<prec and
11885 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11886 if C2 > ((1<<prec) - 1) % C1).
11887 If C1 is even, S = ctz (C1) and C2 is 0, use
11888 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11889 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11890
11891 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11892 unsigned):
11893 (X * C3) + C4 <= 2 * C4, where
11894 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11895 C4 is ((1<<(prec - 1) - 1) / C1).
11896 If C1 is even, S = ctz(C1), use
11897 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11898 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11899 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11900
11901 See the Hacker's Delight book, section 10-17. */
11902 enum tree_code
maybe_optimize_mod_cmp(enum tree_code code,tree * arg0,tree * arg1)11903 maybe_optimize_mod_cmp (enum tree_code code, tree *arg0, tree *arg1)
11904 {
11905 gcc_checking_assert (code == EQ_EXPR || code == NE_EXPR);
11906 gcc_checking_assert (TREE_CODE (*arg1) == INTEGER_CST);
11907
11908 if (optimize < 2)
11909 return code;
11910
11911 gimple *stmt = get_def_for_expr (*arg0, TRUNC_MOD_EXPR);
11912 if (stmt == NULL)
11913 return code;
11914
11915 tree treeop0 = gimple_assign_rhs1 (stmt);
11916 tree treeop1 = gimple_assign_rhs2 (stmt);
11917 if (TREE_CODE (treeop0) != SSA_NAME
11918 || TREE_CODE (treeop1) != INTEGER_CST
11919 /* Don't optimize the undefined behavior case x % 0;
11920 x % 1 should have been optimized into zero, punt if
11921 it makes it here for whatever reason;
11922 x % -c should have been optimized into x % c. */
11923 || compare_tree_int (treeop1, 2) <= 0
11924 /* Likewise x % c == d where d >= c should be always false. */
11925 || tree_int_cst_le (treeop1, *arg1))
11926 return code;
11927
11928 /* Unsigned x % pow2 is handled right already, for signed
11929 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11930 if (integer_pow2p (treeop1))
11931 return maybe_optimize_pow2p_mod_cmp (code, arg0, arg1);
11932
11933 tree type = TREE_TYPE (*arg0);
11934 scalar_int_mode mode;
11935 if (!is_a <scalar_int_mode> (TYPE_MODE (type), &mode))
11936 return code;
11937 if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type)
11938 || TYPE_PRECISION (type) <= 1)
11939 return code;
11940
11941 signop sgn = UNSIGNED;
11942 /* If both operands are known to have the sign bit clear, handle
11943 even the signed modulo case as unsigned. treeop1 is always
11944 positive >= 2, checked above. */
11945 if (!TYPE_UNSIGNED (type) && get_range_pos_neg (treeop0) != 1)
11946 sgn = SIGNED;
11947
11948 if (!TYPE_UNSIGNED (type))
11949 {
11950 if (tree_int_cst_sgn (*arg1) == -1)
11951 return code;
11952 type = unsigned_type_for (type);
11953 if (!type || TYPE_MODE (type) != TYPE_MODE (TREE_TYPE (*arg0)))
11954 return code;
11955 }
11956
11957 int prec = TYPE_PRECISION (type);
11958 wide_int w = wi::to_wide (treeop1);
11959 int shift = wi::ctz (w);
11960 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11961 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11962 If C1 is odd, we can handle all cases by subtracting
11963 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11964 e.g. by testing for overflow on the subtraction, punt on that for now
11965 though. */
11966 if ((sgn == SIGNED || shift) && !integer_zerop (*arg1))
11967 {
11968 if (sgn == SIGNED)
11969 return code;
11970 wide_int x = wi::umod_trunc (wi::mask (prec, false, prec), w);
11971 if (wi::gtu_p (wi::to_wide (*arg1), x))
11972 return code;
11973 }
11974
11975 imm_use_iterator imm_iter;
11976 use_operand_p use_p;
11977 FOR_EACH_IMM_USE_FAST (use_p, imm_iter, treeop0)
11978 {
11979 gimple *use_stmt = USE_STMT (use_p);
11980 /* Punt if treeop0 is used in the same bb in a division
11981 or another modulo with the same divisor. We should expect
11982 the division and modulo combined together. */
11983 if (use_stmt == stmt
11984 || gimple_bb (use_stmt) != gimple_bb (stmt))
11985 continue;
11986 if (!is_gimple_assign (use_stmt)
11987 || (gimple_assign_rhs_code (use_stmt) != TRUNC_DIV_EXPR
11988 && gimple_assign_rhs_code (use_stmt) != TRUNC_MOD_EXPR))
11989 continue;
11990 if (gimple_assign_rhs1 (use_stmt) != treeop0
11991 || !operand_equal_p (gimple_assign_rhs2 (use_stmt), treeop1, 0))
11992 continue;
11993 return code;
11994 }
11995
11996 w = wi::lrshift (w, shift);
11997 wide_int a = wide_int::from (w, prec + 1, UNSIGNED);
11998 wide_int b = wi::shifted_mask (prec, 1, false, prec + 1);
11999 wide_int m = wide_int::from (mod_inv (a, b), prec, UNSIGNED);
12000 tree c3 = wide_int_to_tree (type, m);
12001 tree c5 = NULL_TREE;
12002 wide_int d, e;
12003 if (sgn == UNSIGNED)
12004 {
12005 d = wi::divmod_trunc (wi::mask (prec, false, prec), w, UNSIGNED, &e);
12006 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12007 otherwise use < or subtract one from C4. E.g. for
12008 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12009 x % 3U == 1 already needs to be
12010 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12011 if (!shift && wi::gtu_p (wi::to_wide (*arg1), e))
12012 d -= 1;
12013 if (shift)
12014 d = wi::lrshift (d, shift);
12015 }
12016 else
12017 {
12018 e = wi::udiv_trunc (wi::mask (prec - 1, false, prec), w);
12019 if (!shift)
12020 d = wi::lshift (e, 1);
12021 else
12022 {
12023 e = wi::bit_and (e, wi::mask (shift, true, prec));
12024 d = wi::lrshift (e, shift - 1);
12025 }
12026 c5 = wide_int_to_tree (type, e);
12027 }
12028 tree c4 = wide_int_to_tree (type, d);
12029
12030 rtx op0 = expand_normal (treeop0);
12031 treeop0 = make_tree (TREE_TYPE (treeop0), op0);
12032
12033 bool speed_p = optimize_insn_for_speed_p ();
12034
12035 do_pending_stack_adjust ();
12036
12037 location_t loc = gimple_location (stmt);
12038 struct separate_ops ops;
12039 ops.code = TRUNC_MOD_EXPR;
12040 ops.location = loc;
12041 ops.type = TREE_TYPE (treeop0);
12042 ops.op0 = treeop0;
12043 ops.op1 = treeop1;
12044 ops.op2 = NULL_TREE;
12045 start_sequence ();
12046 rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type),
12047 EXPAND_NORMAL);
12048 rtx_insn *moinsns = get_insns ();
12049 end_sequence ();
12050
12051 unsigned mocost = seq_cost (moinsns, speed_p);
12052 mocost += rtx_cost (mor, mode, EQ, 0, speed_p);
12053 mocost += rtx_cost (expand_normal (*arg1), mode, EQ, 1, speed_p);
12054
12055 tree t = fold_convert_loc (loc, type, treeop0);
12056 if (!integer_zerop (*arg1))
12057 t = fold_build2_loc (loc, MINUS_EXPR, type, t, fold_convert (type, *arg1));
12058 t = fold_build2_loc (loc, MULT_EXPR, type, t, c3);
12059 if (sgn == SIGNED)
12060 t = fold_build2_loc (loc, PLUS_EXPR, type, t, c5);
12061 if (shift)
12062 {
12063 tree s = build_int_cst (NULL_TREE, shift);
12064 t = fold_build2_loc (loc, RROTATE_EXPR, type, t, s);
12065 }
12066
12067 start_sequence ();
12068 rtx mur = expand_normal (t);
12069 rtx_insn *muinsns = get_insns ();
12070 end_sequence ();
12071
12072 unsigned mucost = seq_cost (muinsns, speed_p);
12073 mucost += rtx_cost (mur, mode, LE, 0, speed_p);
12074 mucost += rtx_cost (expand_normal (c4), mode, LE, 1, speed_p);
12075
12076 if (mocost <= mucost)
12077 {
12078 emit_insn (moinsns);
12079 *arg0 = make_tree (TREE_TYPE (*arg0), mor);
12080 return code;
12081 }
12082
12083 emit_insn (muinsns);
12084 *arg0 = make_tree (type, mur);
12085 *arg1 = c4;
12086 return code == EQ_EXPR ? LE_EXPR : GT_EXPR;
12087 }
12088
12089 /* Generate code to calculate OPS, and exploded expression
12090 using a store-flag instruction and return an rtx for the result.
12091 OPS reflects a comparison.
12092
12093 If TARGET is nonzero, store the result there if convenient.
12094
12095 Return zero if there is no suitable set-flag instruction
12096 available on this machine.
12097
12098 Once expand_expr has been called on the arguments of the comparison,
12099 we are committed to doing the store flag, since it is not safe to
12100 re-evaluate the expression. We emit the store-flag insn by calling
12101 emit_store_flag, but only expand the arguments if we have a reason
12102 to believe that emit_store_flag will be successful. If we think that
12103 it will, but it isn't, we have to simulate the store-flag with a
12104 set/jump/set sequence. */
12105
12106 static rtx
do_store_flag(sepops ops,rtx target,machine_mode mode)12107 do_store_flag (sepops ops, rtx target, machine_mode mode)
12108 {
12109 enum rtx_code code;
12110 tree arg0, arg1, type;
12111 machine_mode operand_mode;
12112 int unsignedp;
12113 rtx op0, op1;
12114 rtx subtarget = target;
12115 location_t loc = ops->location;
12116
12117 arg0 = ops->op0;
12118 arg1 = ops->op1;
12119
12120 /* Don't crash if the comparison was erroneous. */
12121 if (arg0 == error_mark_node || arg1 == error_mark_node)
12122 return const0_rtx;
12123
12124 type = TREE_TYPE (arg0);
12125 operand_mode = TYPE_MODE (type);
12126 unsignedp = TYPE_UNSIGNED (type);
12127
12128 /* We won't bother with BLKmode store-flag operations because it would mean
12129 passing a lot of information to emit_store_flag. */
12130 if (operand_mode == BLKmode)
12131 return 0;
12132
12133 /* We won't bother with store-flag operations involving function pointers
12134 when function pointers must be canonicalized before comparisons. */
12135 if (targetm.have_canonicalize_funcptr_for_compare ()
12136 && ((POINTER_TYPE_P (TREE_TYPE (arg0))
12137 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0))))
12138 || (POINTER_TYPE_P (TREE_TYPE (arg1))
12139 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1))))))
12140 return 0;
12141
12142 STRIP_NOPS (arg0);
12143 STRIP_NOPS (arg1);
12144
12145 /* For vector typed comparisons emit code to generate the desired
12146 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12147 expander for this. */
12148 if (TREE_CODE (ops->type) == VECTOR_TYPE)
12149 {
12150 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
12151 if (VECTOR_BOOLEAN_TYPE_P (ops->type)
12152 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code))
12153 return expand_vec_cmp_expr (ops->type, ifexp, target);
12154 else
12155 {
12156 tree if_true = constant_boolean_node (true, ops->type);
12157 tree if_false = constant_boolean_node (false, ops->type);
12158 return expand_vec_cond_expr (ops->type, ifexp, if_true,
12159 if_false, target);
12160 }
12161 }
12162
12163 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12164 into (x - C2) * C3 < C4. */
12165 if ((ops->code == EQ_EXPR || ops->code == NE_EXPR)
12166 && TREE_CODE (arg0) == SSA_NAME
12167 && TREE_CODE (arg1) == INTEGER_CST)
12168 {
12169 enum tree_code new_code = maybe_optimize_mod_cmp (ops->code,
12170 &arg0, &arg1);
12171 if (new_code != ops->code)
12172 {
12173 struct separate_ops nops = *ops;
12174 nops.code = ops->code = new_code;
12175 nops.op0 = arg0;
12176 nops.op1 = arg1;
12177 nops.type = TREE_TYPE (arg0);
12178 return do_store_flag (&nops, target, mode);
12179 }
12180 }
12181
12182 /* Get the rtx comparison code to use. We know that EXP is a comparison
12183 operation of some type. Some comparisons against 1 and -1 can be
12184 converted to comparisons with zero. Do so here so that the tests
12185 below will be aware that we have a comparison with zero. These
12186 tests will not catch constants in the first operand, but constants
12187 are rarely passed as the first operand. */
12188
12189 switch (ops->code)
12190 {
12191 case EQ_EXPR:
12192 code = EQ;
12193 break;
12194 case NE_EXPR:
12195 code = NE;
12196 break;
12197 case LT_EXPR:
12198 if (integer_onep (arg1))
12199 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
12200 else
12201 code = unsignedp ? LTU : LT;
12202 break;
12203 case LE_EXPR:
12204 if (! unsignedp && integer_all_onesp (arg1))
12205 arg1 = integer_zero_node, code = LT;
12206 else
12207 code = unsignedp ? LEU : LE;
12208 break;
12209 case GT_EXPR:
12210 if (! unsignedp && integer_all_onesp (arg1))
12211 arg1 = integer_zero_node, code = GE;
12212 else
12213 code = unsignedp ? GTU : GT;
12214 break;
12215 case GE_EXPR:
12216 if (integer_onep (arg1))
12217 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
12218 else
12219 code = unsignedp ? GEU : GE;
12220 break;
12221
12222 case UNORDERED_EXPR:
12223 code = UNORDERED;
12224 break;
12225 case ORDERED_EXPR:
12226 code = ORDERED;
12227 break;
12228 case UNLT_EXPR:
12229 code = UNLT;
12230 break;
12231 case UNLE_EXPR:
12232 code = UNLE;
12233 break;
12234 case UNGT_EXPR:
12235 code = UNGT;
12236 break;
12237 case UNGE_EXPR:
12238 code = UNGE;
12239 break;
12240 case UNEQ_EXPR:
12241 code = UNEQ;
12242 break;
12243 case LTGT_EXPR:
12244 code = LTGT;
12245 break;
12246
12247 default:
12248 gcc_unreachable ();
12249 }
12250
12251 /* Put a constant second. */
12252 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
12253 || TREE_CODE (arg0) == FIXED_CST)
12254 {
12255 std::swap (arg0, arg1);
12256 code = swap_condition (code);
12257 }
12258
12259 /* If this is an equality or inequality test of a single bit, we can
12260 do this by shifting the bit being tested to the low-order bit and
12261 masking the result with the constant 1. If the condition was EQ,
12262 we xor it with 1. This does not require an scc insn and is faster
12263 than an scc insn even if we have it.
12264
12265 The code to make this transformation was moved into fold_single_bit_test,
12266 so we just call into the folder and expand its result. */
12267
12268 if ((code == NE || code == EQ)
12269 && integer_zerop (arg1)
12270 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
12271 {
12272 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
12273 if (srcstmt
12274 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
12275 {
12276 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
12277 type = lang_hooks.types.type_for_mode (mode, unsignedp);
12278 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
12279 gimple_assign_rhs1 (srcstmt),
12280 gimple_assign_rhs2 (srcstmt));
12281 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
12282 if (temp)
12283 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
12284 }
12285 }
12286
12287 if (! get_subtarget (target)
12288 || GET_MODE (subtarget) != operand_mode)
12289 subtarget = 0;
12290
12291 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
12292
12293 if (target == 0)
12294 target = gen_reg_rtx (mode);
12295
12296 /* Try a cstore if possible. */
12297 return emit_store_flag_force (target, code, op0, op1,
12298 operand_mode, unsignedp,
12299 (TYPE_PRECISION (ops->type) == 1
12300 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
12301 }
12302
12303 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12304 0 otherwise (i.e. if there is no casesi instruction).
12305
12306 DEFAULT_PROBABILITY is the probability of jumping to the default
12307 label. */
12308 int
try_casesi(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,rtx fallback_label,profile_probability default_probability)12309 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
12310 rtx table_label, rtx default_label, rtx fallback_label,
12311 profile_probability default_probability)
12312 {
12313 class expand_operand ops[5];
12314 scalar_int_mode index_mode = SImode;
12315 rtx op1, op2, index;
12316
12317 if (! targetm.have_casesi ())
12318 return 0;
12319
12320 /* The index must be some form of integer. Convert it to SImode. */
12321 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type);
12322 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode))
12323 {
12324 rtx rangertx = expand_normal (range);
12325
12326 /* We must handle the endpoints in the original mode. */
12327 index_expr = build2 (MINUS_EXPR, index_type,
12328 index_expr, minval);
12329 minval = integer_zero_node;
12330 index = expand_normal (index_expr);
12331 if (default_label)
12332 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
12333 omode, 1, default_label,
12334 default_probability);
12335 /* Now we can safely truncate. */
12336 index = convert_to_mode (index_mode, index, 0);
12337 }
12338 else
12339 {
12340 if (omode != index_mode)
12341 {
12342 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
12343 index_expr = fold_convert (index_type, index_expr);
12344 }
12345
12346 index = expand_normal (index_expr);
12347 }
12348
12349 do_pending_stack_adjust ();
12350
12351 op1 = expand_normal (minval);
12352 op2 = expand_normal (range);
12353
12354 create_input_operand (&ops[0], index, index_mode);
12355 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
12356 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
12357 create_fixed_operand (&ops[3], table_label);
12358 create_fixed_operand (&ops[4], (default_label
12359 ? default_label
12360 : fallback_label));
12361 expand_jump_insn (targetm.code_for_casesi, 5, ops);
12362 return 1;
12363 }
12364
12365 /* Attempt to generate a tablejump instruction; same concept. */
12366 /* Subroutine of the next function.
12367
12368 INDEX is the value being switched on, with the lowest value
12369 in the table already subtracted.
12370 MODE is its expected mode (needed if INDEX is constant).
12371 RANGE is the length of the jump table.
12372 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12373
12374 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12375 index value is out of range.
12376 DEFAULT_PROBABILITY is the probability of jumping to
12377 the default label. */
12378
12379 static void
do_tablejump(rtx index,machine_mode mode,rtx range,rtx table_label,rtx default_label,profile_probability default_probability)12380 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
12381 rtx default_label, profile_probability default_probability)
12382 {
12383 rtx temp, vector;
12384
12385 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
12386 cfun->cfg->max_jumptable_ents = INTVAL (range);
12387
12388 /* Do an unsigned comparison (in the proper mode) between the index
12389 expression and the value which represents the length of the range.
12390 Since we just finished subtracting the lower bound of the range
12391 from the index expression, this comparison allows us to simultaneously
12392 check that the original index expression value is both greater than
12393 or equal to the minimum value of the range and less than or equal to
12394 the maximum value of the range. */
12395
12396 if (default_label)
12397 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
12398 default_label, default_probability);
12399
12400 /* If index is in range, it must fit in Pmode.
12401 Convert to Pmode so we can index with it. */
12402 if (mode != Pmode)
12403 {
12404 unsigned int width;
12405
12406 /* We know the value of INDEX is between 0 and RANGE. If we have a
12407 sign-extended subreg, and RANGE does not have the sign bit set, then
12408 we have a value that is valid for both sign and zero extension. In
12409 this case, we get better code if we sign extend. */
12410 if (GET_CODE (index) == SUBREG
12411 && SUBREG_PROMOTED_VAR_P (index)
12412 && SUBREG_PROMOTED_SIGNED_P (index)
12413 && ((width = GET_MODE_PRECISION (as_a <scalar_int_mode> (mode)))
12414 <= HOST_BITS_PER_WIDE_INT)
12415 && ! (UINTVAL (range) & (HOST_WIDE_INT_1U << (width - 1))))
12416 index = convert_to_mode (Pmode, index, 0);
12417 else
12418 index = convert_to_mode (Pmode, index, 1);
12419 }
12420
12421 /* Don't let a MEM slip through, because then INDEX that comes
12422 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12423 and break_out_memory_refs will go to work on it and mess it up. */
12424 #ifdef PIC_CASE_VECTOR_ADDRESS
12425 if (flag_pic && !REG_P (index))
12426 index = copy_to_mode_reg (Pmode, index);
12427 #endif
12428
12429 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12430 GET_MODE_SIZE, because this indicates how large insns are. The other
12431 uses should all be Pmode, because they are addresses. This code
12432 could fail if addresses and insns are not the same size. */
12433 index = simplify_gen_binary (MULT, Pmode, index,
12434 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
12435 Pmode));
12436 index = simplify_gen_binary (PLUS, Pmode, index,
12437 gen_rtx_LABEL_REF (Pmode, table_label));
12438
12439 #ifdef PIC_CASE_VECTOR_ADDRESS
12440 if (flag_pic)
12441 index = PIC_CASE_VECTOR_ADDRESS (index);
12442 else
12443 #endif
12444 index = memory_address (CASE_VECTOR_MODE, index);
12445 temp = gen_reg_rtx (CASE_VECTOR_MODE);
12446 vector = gen_const_mem (CASE_VECTOR_MODE, index);
12447 convert_move (temp, vector, 0);
12448
12449 emit_jump_insn (targetm.gen_tablejump (temp, table_label));
12450
12451 /* If we are generating PIC code or if the table is PC-relative, the
12452 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12453 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
12454 emit_barrier ();
12455 }
12456
12457 int
try_tablejump(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,profile_probability default_probability)12458 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
12459 rtx table_label, rtx default_label,
12460 profile_probability default_probability)
12461 {
12462 rtx index;
12463
12464 if (! targetm.have_tablejump ())
12465 return 0;
12466
12467 index_expr = fold_build2 (MINUS_EXPR, index_type,
12468 fold_convert (index_type, index_expr),
12469 fold_convert (index_type, minval));
12470 index = expand_normal (index_expr);
12471 do_pending_stack_adjust ();
12472
12473 do_tablejump (index, TYPE_MODE (index_type),
12474 convert_modes (TYPE_MODE (index_type),
12475 TYPE_MODE (TREE_TYPE (range)),
12476 expand_normal (range),
12477 TYPE_UNSIGNED (TREE_TYPE (range))),
12478 table_label, default_label, default_probability);
12479 return 1;
12480 }
12481
12482 /* Return a CONST_VECTOR rtx representing vector mask for
12483 a VECTOR_CST of booleans. */
12484 static rtx
const_vector_mask_from_tree(tree exp)12485 const_vector_mask_from_tree (tree exp)
12486 {
12487 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
12488 machine_mode inner = GET_MODE_INNER (mode);
12489
12490 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
12491 VECTOR_CST_NELTS_PER_PATTERN (exp));
12492 unsigned int count = builder.encoded_nelts ();
12493 for (unsigned int i = 0; i < count; ++i)
12494 {
12495 tree elt = VECTOR_CST_ELT (exp, i);
12496 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
12497 if (integer_zerop (elt))
12498 builder.quick_push (CONST0_RTX (inner));
12499 else if (integer_onep (elt)
12500 || integer_minus_onep (elt))
12501 builder.quick_push (CONSTM1_RTX (inner));
12502 else
12503 gcc_unreachable ();
12504 }
12505 return builder.build ();
12506 }
12507
12508 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12509 Return a constant scalar rtx of mode MODE in which bit X is set if element
12510 X of EXP is nonzero. */
12511 static rtx
const_scalar_mask_from_tree(scalar_int_mode mode,tree exp)12512 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp)
12513 {
12514 wide_int res = wi::zero (GET_MODE_PRECISION (mode));
12515 tree elt;
12516
12517 /* The result has a fixed number of bits so the input must too. */
12518 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
12519 for (unsigned int i = 0; i < nunits; ++i)
12520 {
12521 elt = VECTOR_CST_ELT (exp, i);
12522 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
12523 if (integer_all_onesp (elt))
12524 res = wi::set_bit (res, i);
12525 else
12526 gcc_assert (integer_zerop (elt));
12527 }
12528
12529 return immed_wide_int_const (res, mode);
12530 }
12531
12532 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12533 static rtx
const_vector_from_tree(tree exp)12534 const_vector_from_tree (tree exp)
12535 {
12536 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
12537
12538 if (initializer_zerop (exp))
12539 return CONST0_RTX (mode);
12540
12541 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
12542 return const_vector_mask_from_tree (exp);
12543
12544 machine_mode inner = GET_MODE_INNER (mode);
12545
12546 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
12547 VECTOR_CST_NELTS_PER_PATTERN (exp));
12548 unsigned int count = builder.encoded_nelts ();
12549 for (unsigned int i = 0; i < count; ++i)
12550 {
12551 tree elt = VECTOR_CST_ELT (exp, i);
12552 if (TREE_CODE (elt) == REAL_CST)
12553 builder.quick_push (const_double_from_real_value (TREE_REAL_CST (elt),
12554 inner));
12555 else if (TREE_CODE (elt) == FIXED_CST)
12556 builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
12557 inner));
12558 else
12559 builder.quick_push (immed_wide_int_const (wi::to_poly_wide (elt),
12560 inner));
12561 }
12562 return builder.build ();
12563 }
12564
12565 /* Build a decl for a personality function given a language prefix. */
12566
12567 tree
build_personality_function(const char * lang)12568 build_personality_function (const char *lang)
12569 {
12570 const char *unwind_and_version;
12571 tree decl, type;
12572 char *name;
12573
12574 switch (targetm_common.except_unwind_info (&global_options))
12575 {
12576 case UI_NONE:
12577 return NULL;
12578 case UI_SJLJ:
12579 unwind_and_version = "_sj0";
12580 break;
12581 case UI_DWARF2:
12582 case UI_TARGET:
12583 unwind_and_version = "_v0";
12584 break;
12585 case UI_SEH:
12586 unwind_and_version = "_seh0";
12587 break;
12588 default:
12589 gcc_unreachable ();
12590 }
12591
12592 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
12593
12594 type = build_function_type_list (unsigned_type_node,
12595 integer_type_node, integer_type_node,
12596 long_long_unsigned_type_node,
12597 ptr_type_node, ptr_type_node, NULL_TREE);
12598 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
12599 get_identifier (name), type);
12600 DECL_ARTIFICIAL (decl) = 1;
12601 DECL_EXTERNAL (decl) = 1;
12602 TREE_PUBLIC (decl) = 1;
12603
12604 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12605 are the flags assigned by targetm.encode_section_info. */
12606 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
12607
12608 return decl;
12609 }
12610
12611 /* Extracts the personality function of DECL and returns the corresponding
12612 libfunc. */
12613
12614 rtx
get_personality_function(tree decl)12615 get_personality_function (tree decl)
12616 {
12617 tree personality = DECL_FUNCTION_PERSONALITY (decl);
12618 enum eh_personality_kind pk;
12619
12620 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
12621 if (pk == eh_personality_none)
12622 return NULL;
12623
12624 if (!personality
12625 && pk == eh_personality_any)
12626 personality = lang_hooks.eh_personality ();
12627
12628 if (pk == eh_personality_lang)
12629 gcc_assert (personality != NULL_TREE);
12630
12631 return XEXP (DECL_RTL (personality), 0);
12632 }
12633
12634 /* Returns a tree for the size of EXP in bytes. */
12635
12636 static tree
tree_expr_size(const_tree exp)12637 tree_expr_size (const_tree exp)
12638 {
12639 if (DECL_P (exp)
12640 && DECL_SIZE_UNIT (exp) != 0)
12641 return DECL_SIZE_UNIT (exp);
12642 else
12643 return size_in_bytes (TREE_TYPE (exp));
12644 }
12645
12646 /* Return an rtx for the size in bytes of the value of EXP. */
12647
12648 rtx
expr_size(tree exp)12649 expr_size (tree exp)
12650 {
12651 tree size;
12652
12653 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
12654 size = TREE_OPERAND (exp, 1);
12655 else
12656 {
12657 size = tree_expr_size (exp);
12658 gcc_assert (size);
12659 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
12660 }
12661
12662 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
12663 }
12664
12665 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12666 if the size can vary or is larger than an integer. */
12667
12668 static HOST_WIDE_INT
int_expr_size(tree exp)12669 int_expr_size (tree exp)
12670 {
12671 tree size;
12672
12673 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
12674 size = TREE_OPERAND (exp, 1);
12675 else
12676 {
12677 size = tree_expr_size (exp);
12678 gcc_assert (size);
12679 }
12680
12681 if (size == 0 || !tree_fits_shwi_p (size))
12682 return -1;
12683
12684 return tree_to_shwi (size);
12685 }
12686