1 /* Copyright (c) 2002, Marek Michalkiewicz 2 All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 * Redistributions of source code must retain the above copyright 8 notice, this list of conditions and the following disclaimer. 9 10 * Redistributions in binary form must reproduce the above copyright 11 notice, this list of conditions and the following disclaimer in 12 the documentation and/or other materials provided with the 13 distribution. 14 15 * Neither the name of the copyright holders nor the names of 16 contributors may be used to endorse or promote products derived 17 from this software without specific prior written permission. 18 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 POSSIBILITY OF SUCH DAMAGE. */ 30 31 /* $Id: io2323.h 2483 2015-08-06 09:16:30Z pitchumani $ */ 32 33 /* avr/io2323.h - definitions for AT90S2323 */ 34 35 #ifndef _AVR_IO2323_H_ 36 #define _AVR_IO2323_H_ 1 37 38 /* This file should only be included from <avr/io.h>, never directly. */ 39 40 #ifndef _AVR_IO_H_ 41 # error "Include <avr/io.h> instead of this file." 42 #endif 43 44 #ifndef _AVR_IOXXX_H_ 45 # define _AVR_IOXXX_H_ "io2323.h" 46 #else 47 # error "Attempt to include more than one <avr/ioXXX.h> file." 48 #endif 49 50 /* I/O registers */ 51 52 /* Input Pins, Port B */ 53 #define PINB _SFR_IO8(0x16) 54 55 /* Data Direction Register, Port B */ 56 #define DDRB _SFR_IO8(0x17) 57 58 /* Data Register, Port B */ 59 #define PORTB _SFR_IO8(0x18) 60 61 /* EEPROM Control Register */ 62 #define EECR _SFR_IO8(0x1C) 63 64 /* EEPROM Data Register */ 65 #define EEDR _SFR_IO8(0x1D) 66 67 /* EEPROM Address Register */ 68 #define EEAR _SFR_IO8(0x1E) 69 #define EEARL _SFR_IO8(0x1E) 70 71 /* Watchdog Timer Control Register */ 72 #define WDTCR _SFR_IO8(0x21) 73 74 /* Timer/Counter 0 */ 75 #define TCNT0 _SFR_IO8(0x32) 76 77 /* Timer/Counter 0 Control Register */ 78 #define TCCR0 _SFR_IO8(0x33) 79 80 /* MCU Status Register */ 81 #define MCUSR _SFR_IO8(0x34) 82 83 /* MCU general Control Register */ 84 #define MCUCR _SFR_IO8(0x35) 85 86 /* Timer/Counter Interrupt Flag register */ 87 #define TIFR _SFR_IO8(0x38) 88 89 /* Timer/Counter Interrupt MaSK register */ 90 #define TIMSK _SFR_IO8(0x39) 91 92 /* General Interrupt Flag register */ 93 #define GIFR _SFR_IO8(0x3A) 94 95 /* General Interrupt MaSK register */ 96 #define GIMSK _SFR_IO8(0x3B) 97 98 /* 0x3D..0x3E SP */ 99 100 /* 0x3F SREG */ 101 102 /* Interrupt vectors */ 103 104 /* External Interrupt 0 */ 105 #define INT0_vect_num 1 106 #define INT0_vect _VECTOR(1) 107 #define SIG_INTERRUPT0 _VECTOR(1) 108 109 /* Timer/Counter0 Overflow */ 110 #define TIMER0_OVF0_vect_num 2 111 #define TIMER0_OVF0_vect _VECTOR(2) 112 #define SIG_OVERFLOW0 _VECTOR(2) 113 114 #define _VECTORS_SIZE 6 115 116 /* 117 The Register Bit names are represented by their bit number (0-7). 118 */ 119 120 /* General Interrupt MaSK register */ 121 #define INT0 6 122 #define INTF0 6 123 124 /* General Interrupt Flag Register */ 125 #define TOIE0 1 126 #define TOV0 1 127 128 /* MCU general Control Register */ 129 #define SE 5 130 #define SM 4 131 #define ISC01 1 132 #define ISC00 0 133 134 /* Timer/Counter 0 Control Register */ 135 #define CS02 2 136 #define CS01 1 137 #define CS00 0 138 139 /* Watchdog Timer Control Register */ 140 #define WDTOE 4 141 #define WDE 3 142 #define WDP2 2 143 #define WDP1 1 144 #define WDP0 0 145 146 /* 147 PB2 = SCK/T0 148 PB1 = MISO/INT0 149 PB0 = MOSI 150 */ 151 152 /* Data Register, Port B */ 153 #define PB2 2 154 #define PB1 1 155 #define PB0 0 156 157 /* Data Direction Register, Port B */ 158 #define DDB2 2 159 #define DDB1 1 160 #define DDB0 0 161 162 /* Input Pins, Port B */ 163 #define PINB2 2 164 #define PINB1 1 165 #define PINB0 0 166 167 /* EEPROM Control Register */ 168 #define EERIE 3 169 #define EEMWE 2 170 #define EEWE 1 171 #define EERE 0 172 173 /* Constants */ 174 #define RAMSTART 0x60 175 #define RAMEND 0xDF 176 #define XRAMEND RAMEND 177 #define E2END 0x7F 178 #define E2PAGESIZE 0 179 #define FLASHEND 0x07FF 180 181 182 /* Fuses */ 183 #define FUSE_MEMORY_SIZE 1 184 185 /* Low Fuse Byte */ 186 #define FUSE_FSTRT (unsigned char)~_BV(0) 187 #define FUSE_SPIEN (unsigned char)~_BV(5) 188 #define LFUSE_DEFAULT (0xFF) 189 190 191 /* Lock Bits */ 192 #define __LOCK_BITS_EXIST 193 194 195 /* Signature */ 196 #define SIGNATURE_0 0x1E 197 #define SIGNATURE_1 0x91 198 #define SIGNATURE_2 0x02 199 200 #define SLEEP_MODE_IDLE 0 201 #define SLEEP_MODE_PWR_DOWN _BV(SM) 202 203 204 #endif /* _AVR_IO2323_H_ */ 205 206 /* Signature */ 207 #define SIGNATURE_0 0x1E 208 #define SIGNATURE_1 0x91 209 #define SIGNATURE_2 0x02 210 211