1 /* Copyright (c) 2002, Marek Michalkiewicz 2 All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 * Redistributions of source code must retain the above copyright 8 notice, this list of conditions and the following disclaimer. 9 10 * Redistributions in binary form must reproduce the above copyright 11 notice, this list of conditions and the following disclaimer in 12 the documentation and/or other materials provided with the 13 distribution. 14 15 * Neither the name of the copyright holders nor the names of 16 contributors may be used to endorse or promote products derived 17 from this software without specific prior written permission. 18 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 POSSIBILITY OF SUCH DAMAGE. */ 30 31 /* $Id: iotn28.h 2456 2014-11-19 09:57:29Z saaadhu $ */ 32 33 /* avr/iotn28.h - definitions for ATtiny28 */ 34 35 #ifndef _AVR_IOTN28_H_ 36 #define _AVR_IOTN28_H_ 1 37 38 /* This file should only be included from <avr/io.h>, never directly. */ 39 40 #ifndef _AVR_IO_H_ 41 # error "Include <avr/io.h> instead of this file." 42 #endif 43 44 #ifndef _AVR_IOXXX_H_ 45 # define _AVR_IOXXX_H_ "iotn28.h" 46 #else 47 # error "Attempt to include more than one <avr/ioXXX.h> file." 48 #endif 49 50 #ifndef __ASSEMBLER__ 51 # warning "MCU not supported by the C compiler" 52 #endif 53 54 /* I/O registers */ 55 56 #define OSCCAL _SFR_IO8(0x00) 57 58 #define WDTCR _SFR_IO8(0x01) 59 60 #define MODCR _SFR_IO8(0x02) 61 62 #define TCNT0 _SFR_IO8(0x03) 63 #define TCCR0 _SFR_IO8(0x04) 64 65 #define IFR _SFR_IO8(0x05) 66 #define ICR _SFR_IO8(0x06) 67 68 #define MCUCS _SFR_IO8(0x07) 69 70 #define ACSR _SFR_IO8(0x08) 71 72 /* 0x09..0x0F reserved */ 73 74 #define PIND _SFR_IO8(0x10) 75 #define DDRD _SFR_IO8(0x11) 76 #define PORTD _SFR_IO8(0x12) 77 78 /* 0x13..0x15 reserved */ 79 80 #define PINB _SFR_IO8(0x16) 81 82 /* 0x17..0x18 reserved */ 83 84 #define PINA _SFR_IO8(0x19) 85 #define PACR _SFR_IO8(0x1A) 86 #define PORTA _SFR_IO8(0x1B) 87 88 /* 0x1C..0x3E reserved */ 89 90 /* 0x3F SREG */ 91 92 /* Interrupt vectors */ 93 94 /* External Interrupt 0 */ 95 #define INT0_vect_num 1 96 #define INT0_vect _VECTOR(1) 97 #define SIG_INTERRUPT0 _VECTOR(1) 98 99 /* External Interrupt 1 */ 100 #define INT1_vect_num 2 101 #define INT1_vect _VECTOR(2) 102 #define SIG_INTERRUPT1 _VECTOR(2) 103 104 /* Low-level Input on Port B */ 105 #define LOWLEVEL_IO_PINS_vect_num 3 106 #define LOWLEVEL_IO_PINS_vect _VECTOR(3) 107 #define SIG_PIN _VECTOR(3) 108 109 /* Timer/Counter0 Overflow */ 110 #define TIMER0_OVF_vect_num 4 111 #define TIMER0_OVF_vect _VECTOR(4) 112 #define SIG_OVERFLOW0 _VECTOR(4) 113 114 /* Analog Comparator */ 115 #define ANA_COMP_vect_num 5 116 #define ANA_COMP_vect _VECTOR(5) 117 #define SIG_COMPARATOR _VECTOR(5) 118 119 #define _VECTORS_SIZE 12 120 121 122 /* Bit numbers */ 123 124 /* ICR */ 125 #define INT1 7 126 #define INT0 6 127 #define LLIE 5 128 #define TOIE0 4 129 #define ISC11 3 130 #define ISC10 2 131 #define ISC01 1 132 #define ISC00 133 134 /* IFR */ 135 #define INTF1 7 136 #define INTF0 6 137 #define TOV0 4 138 139 /* MCUCS */ 140 #define PLUPB 7 141 #define SE 5 142 #define SM 4 143 #define WDRF 3 144 #define EXTRF 1 145 #define PORF 0 146 147 /* TCCR0 */ 148 #define FOV0 7 149 #define OOM01 4 150 #define OOM00 3 151 #define CS02 2 152 #define CS01 1 153 #define CS00 0 154 155 /* MODCR */ 156 #define ONTIM4 7 157 #define ONTIM3 6 158 #define ONTIM2 5 159 #define ONTIM1 4 160 #define ONTIM0 3 161 #define MCONF2 2 162 #define MCONF1 1 163 #define MCONF0 0 164 165 /* WDTCR */ 166 #define WDTOE 4 167 #define WDE 3 168 #define WDP2 2 169 #define WDP1 1 170 #define WDP0 0 171 172 /* 173 PA2 = IR 174 */ 175 176 /* PORTA */ 177 #define PA3 3 178 #define PA2 2 179 #define PA1 1 180 #define PA0 0 181 182 /* PACR */ 183 #define DDA3 3 184 #define PA2HC 2 185 #define DDA1 1 186 #define DDA0 0 187 188 /* PINA */ 189 #define PINA3 3 190 #define PINA1 1 191 #define PINA0 0 192 193 /* 194 PB4 = INT1 195 PB3 = INT0 196 PB2 = T0 197 PB1 = AIN1 198 PB0 = AIN0 199 */ 200 201 /* PINB */ 202 #define PINB7 7 203 #define PINB6 6 204 #define PINB5 5 205 #define PINB4 4 206 #define PINB3 3 207 #define PINB2 2 208 #define PINB1 1 209 #define PINB0 0 210 211 /* PORTD */ 212 #define PD7 7 213 #define PD6 6 214 #define PD5 5 215 #define PD4 4 216 #define PD3 3 217 #define PD2 2 218 #define PD1 1 219 #define PD0 0 220 221 /* DDRD */ 222 #define DDD7 7 223 #define DDD6 6 224 #define DDD5 5 225 #define DDD4 4 226 #define DDD3 3 227 #define DDD2 2 228 #define DDD1 1 229 #define DDD0 0 230 231 /* PIND */ 232 #define PIND7 7 233 #define PIND6 6 234 #define PIND5 5 235 #define PIND4 4 236 #define PIND3 3 237 #define PIND2 2 238 #define PIND1 1 239 #define PIND0 0 240 241 /* ACSR */ 242 #define ACD 7 243 #define ACO 5 244 #define ACI 4 245 #define ACIE 3 246 #define ACIS1 1 247 #define ACIS0 0 248 249 #define RAMSTART 0x60 250 /* Last memory addresses */ 251 #define RAMEND 0x1F 252 #define XRAMEND 0x0 253 #define E2END 0x0 254 #define E2PAGESIZE 0 255 #define FLASHEND 0x7FF 256 257 258 /* Fuses */ 259 260 #define FUSE_MEMORY_SIZE 1 261 262 /* Fuse Byte */ 263 #define FUSE_CKSEL0 (unsigned char)~_BV(0) 264 #define FUSE_CKSEL1 (unsigned char)~_BV(1) 265 #define FUSE_CKSEL2 (unsigned char)~_BV(2) 266 #define FUSE_CKSEL3 (unsigned char)~_BV(3) 267 #define FUSE_INTCAP (unsigned char)~_BV(4) 268 #define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3) 269 270 271 /* Lock Bits */ 272 #define __LOCK_BITS_EXIST 273 274 275 /* Signature */ 276 #define SIGNATURE_0 0x1E 277 #define SIGNATURE_1 0x91 278 #define SIGNATURE_2 0x07 279 280 281 /* Deprecated items */ 282 #if !defined(__AVR_LIBC_DEPRECATED_ENABLE__) 283 284 #pragma GCC system_header 285 286 #pragma GCC poison SIG_INTERRUPT0 287 #pragma GCC poison SIG_INTERRUPT1 288 #pragma GCC poison SIG_PIN 289 #pragma GCC poison SIG_OVERFLOW0 290 #pragma GCC poison SIG_COMPARATOR 291 292 #endif /* !defined(__AVR_LIBC_DEPRECATED_ENABLE__) */ 293 294 295 #define SLEEP_MODE_IDLE (0x00<<4) 296 #define SLEEP_MODE_PWR_DOWN (0x01<<4) 297 298 299 #endif /* _AVR_IOTN28_H_ */ 300