1 #objdump: -dr --prefix-addresses --show-raw-insn 2 #name: MIPS16 PC-relative operations 1 3 #as: -32 4 5 .*: +file format .*mips.* 6 7 Disassembly of section \.text: 8 \.\.\. 9 [0-9a-f]+ <[^>]*> fe40 dla v0,00010000 <foo> 10 [0-9a-f]+ <[^>]*> 6500 nop 11 [0-9a-f]+ <[^>]*> fc40 ld v0,00010000 <foo> 12 [0-9a-f]+ <[^>]*> 6500 nop 13 [0-9a-f]+ <[^>]*> fe5f dla v0,00010084 <baz\+0x4> 14 [0-9a-f]+ <[^>]*> 6500 nop 15 [0-9a-f]+ <[^>]*> fc5f ld v0,00010100 <baz\+0x80> 16 [0-9a-f]+ <[^>]*> 6500 nop 17 [0-9a-f]+ <[^>]*> f080 fe40 dla v0,00010090 <baz\+0x10> 18 [0-9a-f]+ <[^>]*> f100 fc40 ld v0,00010110 <baz\+0x90> 19 [0-9a-f]+ <[^>]*> f7ff fe5c dla v0,00010014 <foo\+0x14> 20 [0-9a-f]+ <[^>]*> f7ff fc5c ld v0,00010014 <foo\+0x14> 21 [0-9a-f]+ <[^>]*> f7ef fe5f dla v0,0001801f <baz\+0x7f9f> 22 [0-9a-f]+ <[^>]*> f7ef fc5f ld v0,0001801f <baz\+0x7f9f> 23 [0-9a-f]+ <[^>]*> f010 fe40 dla v0,00008028 <bar\+0x8028> 24 [0-9a-f]+ <[^>]*> f010 fc40 ld v0,00008028 <bar\+0x8028> 25 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 26 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.* 27 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 28 [0-9a-f]+ <[^>]*> f7ef fd5f daddiu v0,32767 29 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.* 30 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 31 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.* 32 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 33 [0-9a-f]+ <[^>]*> f7ef 3a5b ld v0,32763\(v0\) 34 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.* 35 [0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535 36 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.* 37 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 38 [0-9a-f]+ <[^>]*> f7ef fd5e daddiu v0,32766 39 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.* 40 [0-9a-f]+ <[^>]*> f7ff 6a1f li v0,65535 41 [ ]*[0-9a-f]+: R_MIPS16_HI16 L0.* 42 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 43 [0-9a-f]+ <[^>]*> f7ef 3a5a ld v0,32762\(v0\) 44 [ ]*[0-9a-f]+: R_MIPS16_LO16 L0.* 45 [0-9a-f]+ <[^>]*> 6500 nop 46 \.\.\. 47 \.\.\. 48