1 /* 2 Copyright (c) 2003 Andreas Robinson, All rights reserved. 3 4 This library is free software; you can redistribute it and/or 5 modify it under the terms of the GNU Lesser General Public 6 License as published by the Free Software Foundation; either 7 version 2 of the License, or (at your option) any later version. 8 */ 9 10 #ifndef __UNICHROME_H__ 11 #define __UNICHROME_H__ 12 13 #include <core/coredefs.h> 14 #include <core/surface.h> 15 #include <core/layers.h> 16 #include <core/layer_control.h> 17 18 #include <directfb.h> 19 20 #define UNICHROME_DEVICE "/dev/cle266vgaio" 21 #define UC_FIFO_SIZE 4096 22 23 /** If defined - the driver will use the 3D engine. */ 24 #define UC_ENABLE_3D 25 //#undef UC_ENABLE_3D 26 27 28 /** Register settings for the current source surface. (3D) */ 29 struct uc_hw_texture { 30 DFBSurfaceBlittingFlags bltflags; 31 32 u32 l2w; //width, rounded up to nearest 2^m, eg 600 => 1024 33 u32 l2h; //height, rounded up, e.g 480 => 512 34 u32 we; //width exponent, i.e m in the number 2^m 35 u32 he; //height exponent 36 37 u32 format; // HW pixel format 38 39 // 3d engine texture environment, texture unit 0 40 41 // Used for the DSBLIT_BLEND_ALPHACHANNEL, DSBLIT_BLEND_COLORALPHA 42 // and DSBLIT_COLORIZE blitting flags. 43 44 u32 regHTXnTB; 45 u32 regHTXnMPMD; 46 47 u32 regHTXnTBLCsat_0; 48 u32 regHTXnTBLCop_0; 49 u32 regHTXnTBLMPfog_0; 50 u32 regHTXnTBLAsat_0; 51 u32 regHTXnTBLRCb_0; 52 u32 regHTXnTBLRAa_0; 53 u32 regHTXnTBLRFog_0; 54 }; 55 56 57 /** Hardware source-destination blending registers. */ 58 struct uc_hw_alpha { 59 /* 60 u32 regHABBasL; // Alpha buffer, low 24 bits. 61 u32 regHABBasH; // Alpha buffer, high 8 bits. 62 u32 regHABFM; // Alpha pixel format, memory type and pitch. 63 u32 regHATMD; // Alpha test function and reference value. 64 65 // Blending function 66 */ 67 u32 regHABLCsat; 68 u32 regHABLCop; 69 u32 regHABLAsat; 70 u32 regHABLAop; 71 u32 regHABLRCa; 72 u32 regHABLRFCa; 73 u32 regHABLRCbias; 74 u32 regHABLRCb; 75 u32 regHABLRFCb; 76 u32 regHABLRAa; 77 u32 regHABLRAb; 78 }; 79 80 typedef enum { 81 uc_source2d = 0x00000001, 82 uc_source3d = 0x00000002, 83 uc_texenv = 0x00000004, 84 uc_blending_fn = 0x00000008, 85 uc_color2d = 0x00000010, 86 uc_colorkey2d = 0x00000020 87 } UcStateBits; 88 89 #define UC_VALIDATE(b) (ucdev->valid |= (b)) 90 #define UC_INVALIDATE(b) (ucdev->valid &= ~(b)) 91 #define UC_IS_VALID(b) (ucdev->valid & (b)) 92 93 typedef struct _UcDeviceData { 94 95 /* State validation */ 96 UcStateBits valid; 97 98 /* Current state settings */ 99 u32 pitch; // combined src/dst pitch (2D) 100 u32 color; // 2D fill color 101 u32 color3d; // color for 3D operations 102 u32 draw_rop2d; // logical drawing ROP (2D) 103 u32 draw_rop3d; // logical drawing ROP (3D) 104 105 DFBSurfaceBlittingFlags bflags; // blitting flags 106 DFBRegion clip; // clipping region 107 108 DFBSurfacePixelFormat dst_format; // destination pixel format 109 int dst_offset; // destination buffer byte offset 110 int dst_pitch; // destination buffer byte pitch 111 112 int field; // source field 113 114 /* Hardware settings */ 115 struct uc_hw_alpha hwalpha; // alpha blending setting (3D) 116 struct uc_hw_texture hwtex; // hardware settings for blitting (3D) 117 118 119 /// Set directly after a 2D/3D engine command is sent. 120 int must_wait; 121 unsigned int cmd_waitcycles; 122 unsigned int idle_waitcycles; 123 124 u32 vq_start; // VQ related 125 u32 vq_size; 126 u32 vq_end; 127 128 } UcDeviceData; 129 130 131 typedef struct _UcDriverData { 132 int file; // File handle to mmapped IO region. 133 int hwrev; // Hardware revision 134 volatile void* hwregs; // Hardware register base 135 struct uc_fifo* fifo; // Data FIFO. 136 FusionSHMPoolShared *pool; 137 } UcDriverData; 138 139 140 #endif // __UNICHROME_H__ 141