1 /* bfin-defs.h ADI Blackfin gas header file
2    Copyright 2005
3    Free Software Foundation, Inc.
4 
5    This file is part of GAS, the GNU Assembler.
6 
7    GAS is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 2, or (at your option)
10    any later version.
11 
12    GAS is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with GAS; see the file COPYING.  If not, write to the Free
19    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20    02110-1301, USA.  */
21 
22 #ifndef BFIN_PARSE_H
23 #define BFIN_PARSE_H
24 
25 #include <bfd.h>
26 #include "as.h"
27 
28 #define PCREL	1
29 #define CODE_FRAG_SIZE 4096  /* 1 page.  */
30 
31 
32 /* Definition for all status bits.  */
33 typedef enum
34 {
35   c_0,
36   c_1,
37   c_4,
38   c_2,
39   c_uimm2,
40   c_uimm3,
41   c_imm3,
42   c_pcrel4,
43   c_imm4,
44   c_uimm4s4,
45   c_uimm4,
46   c_uimm4s2,
47   c_negimm5s4,
48   c_imm5,
49   c_uimm5,
50   c_imm6,
51   c_imm7,
52   c_imm8,
53   c_uimm8,
54   c_pcrel8,
55   c_uimm8s4,
56   c_pcrel8s4,
57   c_lppcrel10,
58   c_pcrel10,
59   c_pcrel12,
60   c_imm16s4,
61   c_luimm16,
62   c_imm16,
63   c_huimm16,
64   c_rimm16,
65   c_imm16s2,
66   c_uimm16s4,
67   c_uimm16,
68   c_pcrel24
69 } const_forms_t;
70 
71 
72 /* High-Nibble: group code, low nibble: register code.  */
73 
74 
75 #define T_REG_R       0x00
76 #define T_REG_P       0x10
77 #define T_REG_I       0x20
78 #define T_REG_B       0x30
79 #define T_REG_L       0x34
80 #define T_REG_M       0x24
81 #define T_REG_A       0x40
82 
83 /* All registers above this value don't
84    belong to a usuable register group.  */
85 #define T_NOGROUP     0xa0
86 
87 /* Flags.  */
88 #define F_REG_ALL    0x1000
89 #define F_REG_HIGH   0x2000  /* Half register: high half.  */
90 
91 enum machine_registers
92 {
93   REG_R0    = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
94   REG_P0    = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
95   REG_I0    = T_REG_I, REG_I1, REG_I2, REG_I3,
96   REG_M0    = T_REG_M, REG_M1, REG_M2, REG_M3,
97   REG_B0    = T_REG_B, REG_B1, REG_B2, REG_B3,
98   REG_L0    = T_REG_L, REG_L1, REG_L2, REG_L3,
99   REG_A0x   = T_REG_A, REG_A0w, REG_A1x, REG_A1w,
100   REG_ASTAT = 0x46,
101   REG_RETS  = 0x47,
102   REG_LC0   = 0x60, REG_LT0, REG_LB0,  REG_LC1, REG_LT1, REG_LB1,
103               REG_CYCLES, REG_CYCLES2,
104   REG_USP   = 0x70, REG_SEQSTAT, REG_SYSCFG,
105 	      REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT,
106 
107 /* These don't have groups.  */
108   REG_sftreset = T_NOGROUP, REG_omode, REG_excause, REG_emucause,
109 	         REG_idle_req, REG_hwerrcause,
110   REG_A0       = 0xc0, REG_A1, REG_CC,
111 /* Pseudo registers, used only for distinction from symbols.  */
112 		 REG_RL0, REG_RL1, REG_RL2, REG_RL3,
113 		 REG_RL4, REG_RL5, REG_RL6, REG_RL7,
114 		 REG_RH0, REG_RH1, REG_RH2, REG_RH3,
115 		 REG_RH4, REG_RH5, REG_RH6, REG_RH7,
116 		 REG_LASTREG
117 };
118 
119 /* Status register flags.  */
120 
121 enum statusflags
122 {
123   S_AZ = 0,
124   S_AN,
125   S_AQ = 6,
126   S_AC0 = 12,
127   S_AC1,
128   S_AV0 = 16,
129   S_AV0S,
130   S_AV1,
131   S_AV1S,
132   S_V = 24,
133   S_VS = 25
134 };
135 
136 
137 enum reg_class
138 {
139   rc_dregs_lo,
140   rc_dregs_hi,
141   rc_dregs,
142   rc_dregs_pair,
143   rc_pregs,
144   rc_spfp,
145   rc_dregs_hilo,
146   rc_accum_ext,
147   rc_accum_word,
148   rc_accum,
149   rc_iregs,
150   rc_mregs,
151   rc_bregs,
152   rc_lregs,
153   rc_dpregs,
154   rc_gregs,
155   rc_regs,
156   rc_statbits,
157   rc_ignore_bits,
158   rc_ccstat,
159   rc_counters,
160   rc_dregs2_sysregs1,
161   rc_open,
162   rc_sysregs2,
163   rc_sysregs3,
164   rc_allregs,
165   LIM_REG_CLASSES
166 };
167 
168 /* mmod field.  */
169 #define M_S2RND 1
170 #define M_T     2
171 #define M_W32   3
172 #define M_FU    4
173 #define M_TFU   6
174 #define M_IS    8
175 #define M_ISS2  9
176 #define M_IH    11
177 #define M_IU    12
178 
179 /* Register type checking macros.  */
180 
181 #define CODE_MASK  0x07
182 #define CLASS_MASK 0xf0
183 
184 #define REG_SAME(a, b)   ((a).regno == (b).regno)
185 #define REG_EQUAL(a, b)  (((a).regno & CODE_MASK) == ((b).regno & CODE_MASK))
186 #define REG_CLASS(a)     ((a.regno) & 0xf0)
187 #define IS_A1(a)         ((a).regno == REG_A1)
188 #define IS_H(a)          ((a).regno & F_REG_HIGH ? 1: 0)
189 #define IS_EVEN(r)       (r.regno % 2 == 0)
190 #define IS_HCOMPL(a, b)  (REG_EQUAL(a, b) && \
191                          ((a).regno & F_REG_HIGH) != ((b).regno & F_REG_HIGH))
192 
193 /* register type checking.  */
194 #define _TYPECHECK(r, x) (((r).regno & CLASS_MASK) == T_REG_##x)
195 
196 #define IS_DREG(r)       _TYPECHECK(r, R)
197 #define IS_DREG_H(r)     (_TYPECHECK(r, R) && IS_H(r))
198 #define IS_DREG_L(r)     (_TYPECHECK(r, R) && !IS_H(r))
199 #define IS_PREG(r)       _TYPECHECK(r, P)
200 #define IS_IREG(r)       (((r).regno & 0xf4) == T_REG_I)
201 #define IS_MREG(r)       (((r).regno & 0xf4) == T_REG_M)
202 #define IS_BREG(r)       (((r).regno & 0xf4) == T_REG_B)
203 #define IS_LREG(r)       (((r).regno & 0xf4) == T_REG_L)
204 #define IS_CREG(r)       ((r).regno == REG_LC0 || (r).regno == REG_LC1)
205 #define IS_ALLREG(r)     ((r).regno < T_NOGROUP)
206 
207 /* Expression value macros.  */
208 
209 typedef enum
210 {
211   ones_compl,
212   twos_compl,
213   mult,
214   divide,
215   mod,
216   add,
217   sub,
218   lsh,
219   rsh,
220   logand,
221   logior,
222   logxor
223 } expr_opcodes_t;
224 
225 struct expressionS;
226 
227 #define SYMBOL_T       symbolS*
228 
229 struct expression_cell
230 {
231   int value;
232   SYMBOL_T symbol;
233 };
234 
235 /* User Type Definitions.  */
236 struct bfin_insn
237 {
238   unsigned long value;
239   struct bfin_insn *next;
240   struct expression_cell *exp;
241   int pcrel;
242   int reloc;
243 };
244 
245 #define INSTR_T struct bfin_insn*
246 #define EXPR_T  struct expression_cell*
247 
248 typedef struct expr_node_struct Expr_Node;
249 
250 extern INSTR_T gencode (unsigned long x);
251 extern INSTR_T conscode (INSTR_T head, INSTR_T tail);
252 extern INSTR_T conctcode (INSTR_T head, INSTR_T tail);
253 extern INSTR_T note_reloc
254        (INSTR_T code, Expr_Node *, int reloc,int pcrel);
255 extern INSTR_T note_reloc1
256        (INSTR_T code, const char * sym, int reloc, int pcrel);
257 extern INSTR_T note_reloc2
258        (INSTR_T code, const char *symbol, int reloc, int value, int pcrel);
259 
260 /* Types of expressions.  */
261 typedef enum
262 {
263   Expr_Node_Binop,		/* Binary operator.  */
264   Expr_Node_Unop,		/* Unary operator.  */
265   Expr_Node_Reloc,		/* Symbol to be relocated.  */
266   Expr_Node_GOT_Reloc,		/* Symbol to be relocated using the GOT.  */
267   Expr_Node_Constant 		/* Constant.  */
268 } Expr_Node_Type;
269 
270 /* Types of operators.  */
271 typedef enum
272 {
273   Expr_Op_Type_Add,
274   Expr_Op_Type_Sub,
275   Expr_Op_Type_Mult,
276   Expr_Op_Type_Div,
277   Expr_Op_Type_Mod,
278   Expr_Op_Type_Lshift,
279   Expr_Op_Type_Rshift,
280   Expr_Op_Type_BAND,		/* Bitwise AND.  */
281   Expr_Op_Type_BOR,		/* Bitwise OR.  */
282   Expr_Op_Type_BXOR,		/* Bitwise exclusive OR.  */
283   Expr_Op_Type_LAND,		/* Logical AND.  */
284   Expr_Op_Type_LOR,		/* Logical OR.  */
285   Expr_Op_Type_NEG,
286   Expr_Op_Type_COMP		/* Complement.  */
287 } Expr_Op_Type;
288 
289 /* The value that can be stored ... depends on type.  */
290 typedef union
291 {
292   const char *s_value;		/* if relocation symbol, the text.  */
293   int i_value;			/* if constant, the value.  */
294   Expr_Op_Type op_value;	/* if operator, the value.  */
295 } Expr_Node_Value;
296 
297 /* The expression node.  */
298 struct expr_node_struct
299 {
300   Expr_Node_Type 	type;
301   Expr_Node_Value	value;
302   Expr_Node		*Left_Child;
303   Expr_Node		*Right_Child;
304 };
305 
306 
307 /* Operations on the expression node.  */
308 Expr_Node *Expr_Node_Create (Expr_Node_Type type,
309 		         Expr_Node_Value value,
310 			 Expr_Node *Left_Child,
311 			 Expr_Node *Right_Child);
312 
313 /* Generate the reloc structure as a series of instructions.  */
314 INSTR_T Expr_Node_Gen_Reloc (Expr_Node *head, int parent_reloc);
315 
316 #define MKREF(x)	mkexpr (0,x)
317 #define ALLOCATE(x)	malloc (x)
318 
319 #define NULL_CODE ((INSTR_T) 0)
320 
321 #ifndef EXPR_VALUE
322 #define EXPR_VALUE(x)  (((x)->type == Expr_Node_Constant) ? ((x)->value.i_value) : 0)
323 #endif
324 #ifndef EXPR_SYMBOL
325 #define EXPR_SYMBOL(x) ((x)->symbol)
326 #endif
327 
328 
329 typedef long reg_t;
330 
331 
332 typedef struct _register
333 {
334   reg_t regno;       /* Register ID as defined in machine_registers.  */
335   int   flags;
336 } Register;
337 
338 
339 typedef struct _macfunc
340 {
341   char n;
342   char op;
343   char w;
344   char P;
345   Register dst;
346   Register s0;
347   Register s1;
348 } Macfunc;
349 
350 typedef struct _opt_mode
351 {
352   int MM;
353   int mod;
354 } Opt_mode;
355 
356 typedef enum
357 {
358   SEMANTIC_ERROR,
359   NO_INSN_GENERATED,
360   INSN_GENERATED
361 } parse_state;
362 
363 
364 #ifdef __cplusplus
365 extern "C" {
366 #endif
367 
368 extern int debug_codeselection;
369 
370 void error (char *format, ...);
371 void warn (char *format, ...);
372 int  semantic_error (char *syntax);
373 void semantic_error_2 (char *syntax);
374 
375 EXPR_T mkexpr (int, SYMBOL_T);
376 
377 extern void bfin_equals (Expr_Node *sym);
378 /* Defined in bfin-lex.l.  */
379 void set_start_state (void);
380 
381 #ifdef __cplusplus
382 }
383 #endif
384 
385 #endif  /* BFIN_PARSE_H */
386 
387