1 /* 2 Copyright (C) 2001-present by Serge Lamikhov-Center 3 4 Permission is hereby granted, free of charge, to any person obtaining a copy 5 of this software and associated documentation files (the "Software"), to deal 6 in the Software without restriction, including without limitation the rights 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 copies of the Software, and to permit persons to whom the Software is 9 furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included in 12 all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20 THE SOFTWARE. 21 */ 22 23 #ifndef ELFTYPES_H 24 #define ELFTYPES_H 25 26 #ifndef ELFIO_NO_OWN_TYPES 27 #if !defined( ELFIO_NO_CSTDINT ) && !defined( ELFIO_NO_INTTYPES ) 28 #include <stdint.h> 29 #else 30 typedef unsigned char uint8_t; 31 typedef signed char int8_t; 32 typedef unsigned short uint16_t; 33 typedef signed short int16_t; 34 #ifdef _MSC_VER 35 typedef unsigned __int32 uint32_t; 36 typedef signed __int32 int32_t; 37 typedef unsigned __int64 uint64_t; 38 typedef signed __int64 int64_t; 39 #else 40 typedef unsigned int uint32_t; 41 typedef signed int int32_t; 42 typedef unsigned long long uint64_t; 43 typedef signed long long int64_t; 44 #endif // _MSC_VER 45 #endif // ELFIO_NO_CSTDINT 46 #endif // ELFIO_NO_OWN_TYPES 47 48 #ifdef __cplusplus 49 namespace ELFIO { 50 #endif 51 52 // Attention! Platform depended definitions. 53 typedef uint16_t Elf_Half; 54 typedef uint32_t Elf_Word; 55 typedef int32_t Elf_Sword; 56 typedef uint64_t Elf_Xword; 57 typedef int64_t Elf_Sxword; 58 59 typedef uint32_t Elf32_Addr; 60 typedef uint32_t Elf32_Off; 61 typedef uint64_t Elf64_Addr; 62 typedef uint64_t Elf64_Off; 63 64 #define Elf32_Half Elf_Half 65 #define Elf64_Half Elf_Half 66 #define Elf32_Word Elf_Word 67 #define Elf64_Word Elf_Word 68 #define Elf32_Sword Elf_Sword 69 #define Elf64_Sword Elf_Sword 70 71 /////////////////////// 72 // ELF Header Constants 73 74 // File type 75 #define ET_NONE 0 76 #define ET_REL 1 77 #define ET_EXEC 2 78 #define ET_DYN 3 79 #define ET_CORE 4 80 #define ET_LOOS 0xFE00 81 #define ET_HIOS 0xFEFF 82 #define ET_LOPROC 0xFF00 83 #define ET_HIPROC 0xFFFF 84 85 #define EM_NONE 0 // No machine 86 #define EM_M32 1 // AT&T WE 32100 87 #define EM_SPARC 2 // SUN SPARC 88 #define EM_386 3 // Intel 80386 89 #define EM_68K 4 // Motorola m68k family 90 #define EM_88K 5 // Motorola m88k family 91 #define EM_486 6 // Intel 80486// Reserved for future use 92 #define EM_860 7 // Intel 80860 93 #define EM_MIPS 8 // MIPS R3000 (officially, big-endian only) 94 #define EM_S370 9 // IBM System/370 95 #define EM_MIPS_RS3_LE 10 // MIPS R3000 little-endian (Deprecated) 96 #define EM_res011 11 // Reserved 97 #define EM_res012 12 // Reserved 98 #define EM_res013 13 // Reserved 99 #define EM_res014 14 // Reserved 100 #define EM_PARISC 15 // HPPA 101 #define EM_res016 16 // Reserved 102 #define EM_VPP550 17 // Fujitsu VPP500 103 #define EM_SPARC32PLUS 18 // Sun's "v8plus" 104 #define EM_960 19 // Intel 80960 105 #define EM_PPC 20 // PowerPC 106 #define EM_PPC64 21 // 64-bit PowerPC 107 #define EM_S390 22 // IBM S/390 108 #define EM_SPU 23 // Sony/Toshiba/IBM SPU 109 #define EM_res024 24 // Reserved 110 #define EM_res025 25 // Reserved 111 #define EM_res026 26 // Reserved 112 #define EM_res027 27 // Reserved 113 #define EM_res028 28 // Reserved 114 #define EM_res029 29 // Reserved 115 #define EM_res030 30 // Reserved 116 #define EM_res031 31 // Reserved 117 #define EM_res032 32 // Reserved 118 #define EM_res033 33 // Reserved 119 #define EM_res034 34 // Reserved 120 #define EM_res035 35 // Reserved 121 #define EM_V800 36 // NEC V800 series 122 #define EM_FR20 37 // Fujitsu FR20 123 #define EM_RH32 38 // TRW RH32 124 #define EM_MCORE 39 // Motorola M*Core // May also be taken by Fujitsu MMA 125 #define EM_RCE 39 // Old name for MCore 126 #define EM_ARM 40 // ARM 127 #define EM_OLD_ALPHA 41 // Digital Alpha 128 #define EM_SH 42 // Renesas (formerly Hitachi) / SuperH SH 129 #define EM_SPARCV9 43 // SPARC v9 64-bit 130 #define EM_TRICORE 44 // Siemens Tricore embedded processor 131 #define EM_ARC 45 // ARC Cores 132 #define EM_H8_300 46 // Renesas (formerly Hitachi) H8/300 133 #define EM_H8_300H 47 // Renesas (formerly Hitachi) H8/300H 134 #define EM_H8S 48 // Renesas (formerly Hitachi) H8S 135 #define EM_H8_500 49 // Renesas (formerly Hitachi) H8/500 136 #define EM_IA_64 50 // Intel IA-64 Processor 137 #define EM_MIPS_X 51 // Stanford MIPS-X 138 #define EM_COLDFIRE 52 // Motorola Coldfire 139 #define EM_68HC12 53 // Motorola M68HC12 140 #define EM_MMA 54 // Fujitsu Multimedia Accelerator 141 #define EM_PCP 55 // Siemens PCP 142 #define EM_NCPU 56 // Sony nCPU embedded RISC processor 143 #define EM_NDR1 57 // Denso NDR1 microprocesspr 144 #define EM_STARCORE 58 // Motorola Star*Core processor 145 #define EM_ME16 59 // Toyota ME16 processor 146 #define EM_ST100 60 // STMicroelectronics ST100 processor 147 #define EM_TINYJ 61 // Advanced Logic Corp. TinyJ embedded processor 148 #define EM_X86_64 62 // Advanced Micro Devices X86-64 processor 149 #define EM_PDSP 63 // Sony DSP Processor 150 #define EM_PDP10 64 // Digital Equipment Corp. PDP-10 151 #define EM_PDP11 65 // Digital Equipment Corp. PDP-11 152 #define EM_FX66 66 // Siemens FX66 microcontroller 153 #define EM_ST9PLUS 67 // STMicroelectronics ST9+ 8/16 bit microcontroller 154 #define EM_ST7 68 // STMicroelectronics ST7 8-bit microcontroller 155 #define EM_68HC16 69 // Motorola MC68HC16 Microcontroller 156 #define EM_68HC11 70 // Motorola MC68HC11 Microcontroller 157 #define EM_68HC08 71 // Motorola MC68HC08 Microcontroller 158 #define EM_68HC05 72 // Motorola MC68HC05 Microcontroller 159 #define EM_SVX 73 // Silicon Graphics SVx 160 #define EM_ST19 74 // STMicroelectronics ST19 8-bit cpu 161 #define EM_VAX 75 // Digital VAX 162 #define EM_CRIS 76 // Axis Communications 32-bit embedded processor 163 #define EM_JAVELIN 77 // Infineon Technologies 32-bit embedded cpu 164 #define EM_FIREPATH 78 // Element 14 64-bit DSP processor 165 #define EM_ZSP 79 // LSI Logic's 16-bit DSP processor 166 #define EM_MMIX 80 // Donald Knuth's educational 64-bit processor 167 #define EM_HUANY 81 // Harvard's machine-independent format 168 #define EM_PRISM 82 // SiTera Prism 169 #define EM_AVR 83 // Atmel AVR 8-bit microcontroller 170 #define EM_FR30 84 // Fujitsu FR30 171 #define EM_D10V 85 // Mitsubishi D10V 172 #define EM_D30V 86 // Mitsubishi D30V 173 #define EM_V850 87 // NEC v850 174 #define EM_M32R 88 // Renesas M32R (formerly Mitsubishi M32R) 175 #define EM_MN10300 89 // Matsushita MN10300 176 #define EM_MN10200 90 // Matsushita MN10200 177 #define EM_PJ 91 // picoJava 178 #define EM_OPENRISC 92 // OpenRISC 32-bit embedded processor 179 #define EM_ARC_A5 93 // ARC Cores Tangent-A5 180 #define EM_XTENSA 94 // Tensilica Xtensa Architecture 181 #define EM_VIDEOCORE 95 // Alphamosaic VideoCore processor 182 #define EM_TMM_GPP 96 // Thompson Multimedia General Purpose Processor 183 #define EM_NS32K 97 // National Semiconductor 32000 series 184 #define EM_TPC 98 // Tenor Network TPC processor 185 #define EM_SNP1K 99 // Trebia SNP 1000 processor 186 #define EM_ST200 100 // STMicroelectronics ST200 microcontroller 187 #define EM_IP2K 101 // Ubicom IP2022 micro controller 188 #define EM_MAX 102 // MAX Processor 189 #define EM_CR 103 // National Semiconductor CompactRISC 190 #define EM_F2MC16 104 // Fujitsu F2MC16 191 #define EM_MSP430 105 // TI msp430 micro controller 192 #define EM_BLACKFIN 106 // ADI Blackfin 193 #define EM_SE_C33 107 // S1C33 Family of Seiko Epson processors 194 #define EM_SEP 108 // Sharp embedded microprocessor 195 #define EM_ARCA 109 // Arca RISC Microprocessor 196 #define EM_UNICORE 110 // Microprocessor series from PKU-Unity Ltd. 197 #define EM_EXCESS 111 // eXcess: 16/32/64-bit configurable embedded CPU 198 #define EM_DXP 112 // Icera Semiconductor Inc. Deep Execution Processor 199 #define EM_ALTERA_NIOS2 113 // Altera Nios II soft-core processor 200 #define EM_CRX 114 // National Semiconductor CRX 201 #define EM_XGATE 115 // Motorola XGATE embedded processor 202 #define EM_C166 116 // Infineon C16x/XC16x processor 203 #define EM_M16C 117 // Renesas M16C series microprocessors 204 #define EM_DSPIC30F 118 // Microchip Technology dsPIC30F DSignal Controller 205 #define EM_CE 119 // Freescale Communication Engine RISC core 206 #define EM_M32C 120 // Renesas M32C series microprocessors 207 #define EM_res121 121 // Reserved 208 #define EM_res122 122 // Reserved 209 #define EM_res123 123 // Reserved 210 #define EM_res124 124 // Reserved 211 #define EM_res125 125 // Reserved 212 #define EM_res126 126 // Reserved 213 #define EM_res127 127 // Reserved 214 #define EM_res128 128 // Reserved 215 #define EM_res129 129 // Reserved 216 #define EM_res130 130 // Reserved 217 #define EM_TSK3000 131 // Altium TSK3000 core 218 #define EM_RS08 132 // Freescale RS08 embedded processor 219 #define EM_res133 133 // Reserved 220 #define EM_ECOG2 134 // Cyan Technology eCOG2 microprocessor 221 #define EM_SCORE 135 // Sunplus Score 222 #define EM_SCORE7 135 // Sunplus S+core7 RISC processor 223 #define EM_DSP24 136 // New Japan Radio (NJR) 24-bit DSP Processor 224 #define EM_VIDEOCORE3 137 // Broadcom VideoCore III processor 225 #define EM_LATTICEMICO32 138 // RISC processor for Lattice FPGA architecture 226 #define EM_SE_C17 139 // Seiko Epson C17 family 227 #define EM_TI_C6000 140 // Texas Instruments TMS320C6000 DSP family 228 #define EM_TI_C2000 141 // Texas Instruments TMS320C2000 DSP family 229 #define EM_TI_C5500 142 // Texas Instruments TMS320C55x DSP family 230 #define EM_res143 143 // Reserved 231 #define EM_res144 144 // Reserved 232 #define EM_res145 145 // Reserved 233 #define EM_res146 146 // Reserved 234 #define EM_res147 147 // Reserved 235 #define EM_res148 148 // Reserved 236 #define EM_res149 149 // Reserved 237 #define EM_res150 150 // Reserved 238 #define EM_res151 151 // Reserved 239 #define EM_res152 152 // Reserved 240 #define EM_res153 153 // Reserved 241 #define EM_res154 154 // Reserved 242 #define EM_res155 155 // Reserved 243 #define EM_res156 156 // Reserved 244 #define EM_res157 157 // Reserved 245 #define EM_res158 158 // Reserved 246 #define EM_res159 159 // Reserved 247 #define EM_MMDSP_PLUS 160 // STMicroelectronics 64bit VLIW Data Signal Processor 248 #define EM_CYPRESS_M8C 161 // Cypress M8C microprocessor 249 #define EM_R32C 162 // Renesas R32C series microprocessors 250 #define EM_TRIMEDIA 163 // NXP Semiconductors TriMedia architecture family 251 #define EM_QDSP6 164 // QUALCOMM DSP6 Processor 252 #define EM_8051 165 // Intel 8051 and variants 253 #define EM_STXP7X 166 // STMicroelectronics STxP7x family 254 #define EM_NDS32 167 // Andes Technology embedded RISC processor family 255 #define EM_ECOG1 168 // Cyan Technology eCOG1X family 256 #define EM_ECOG1X 168 // Cyan Technology eCOG1X family 257 #define EM_MAXQ30 169 // Dallas Semiconductor MAXQ30 Core Micro-controllers 258 #define EM_XIMO16 170 // New Japan Radio (NJR) 16-bit DSP Processor 259 #define EM_MANIK 171 // M2000 Reconfigurable RISC Microprocessor 260 #define EM_CRAYNV2 172 // Cray Inc. NV2 vector architecture 261 #define EM_RX 173 // Renesas RX family 262 #define EM_METAG 174 // Imagination Technologies META processor architecture 263 #define EM_MCST_ELBRUS 175 // MCST Elbrus general purpose hardware architecture 264 #define EM_ECOG16 176 // Cyan Technology eCOG16 family 265 #define EM_CR16 177 // National Semiconductor CompactRISC 16-bit processor 266 #define EM_ETPU 178 // Freescale Extended Time Processing Unit 267 #define EM_SLE9X 179 // Infineon Technologies SLE9X core 268 #define EM_L1OM 180 // Intel L1OM 269 #define EM_INTEL181 181 // Reserved by Intel 270 #define EM_INTEL182 182 // Reserved by Intel 271 #define EM_res183 183 // Reserved by ARM 272 #define EM_res184 184 // Reserved by ARM 273 #define EM_AVR32 185 // Atmel Corporation 32-bit microprocessor family 274 #define EM_STM8 186 // STMicroeletronics STM8 8-bit microcontroller 275 #define EM_TILE64 187 // Tilera TILE64 multicore architecture family 276 #define EM_TILEPRO 188 // Tilera TILEPro multicore architecture family 277 #define EM_MICROBLAZE 189 // Xilinx MicroBlaze 32-bit RISC soft processor core 278 #define EM_CUDA 190 // NVIDIA CUDA architecture 279 #define EM_TILEGX 191 // Tilera TILE-Gx multicore architecture family 280 #define EM_CLOUDSHIELD 192 // CloudShield architecture family 281 #define EM_COREA_1ST 193 // KIPO-KAIST Core-A 1st generation processor family 282 #define EM_COREA_2ND 194 // KIPO-KAIST Core-A 2nd generation processor family 283 #define EM_ARC_COMPACT2 195 // Synopsys ARCompact V2 284 #define EM_OPEN8 196 // Open8 8-bit RISC soft processor core 285 #define EM_RL78 197 // Renesas RL78 family 286 #define EM_VIDEOCORE5 198 // Broadcom VideoCore V processor 287 #define EM_78KOR 199 // Renesas 78KOR family 288 #define EM_56800EX 200 // Freescale 56800EX Digital Signal Controller (DSC) 289 #define EM_BA1 201 // Beyond BA1 CPU architecture 290 #define EM_BA2 202 // Beyond BA2 CPU architecture 291 #define EM_XCORE 203 // XMOS xCORE processor family 292 #define EM_MCHP_PIC 204 // Microchip 8-bit PIC(r) family 293 #define EM_INTEL205 205 // Reserved by Intel 294 #define EM_INTEL206 206 // Reserved by Intel 295 #define EM_INTEL207 207 // Reserved by Intel 296 #define EM_INTEL208 208 // Reserved by Intel 297 #define EM_INTEL209 209 // Reserved by Intel 298 #define EM_KM32 210 // KM211 KM32 32-bit processor 299 #define EM_KMX32 211 // KM211 KMX32 32-bit processor 300 #define EM_KMX16 212 // KM211 KMX16 16-bit processor 301 #define EM_KMX8 213 // KM211 KMX8 8-bit processor 302 #define EM_KVARC 214 // KM211 KVARC processor 303 #define EM_CDP 215 // Paneve CDP architecture family 304 #define EM_COGE 216 // Cognitive Smart Memory Processor 305 #define EM_COOL 217 // iCelero CoolEngine 306 #define EM_NORC 218 // Nanoradio Optimized RISC 307 #define EM_CSR_KALIMBA 219 // CSR Kalimba architecture family 308 #define EM_Z80 220 // Zilog Z80 309 #define EM_VISIUM 221 // Controls and Data Services VISIUMcore processor 310 #define EM_FT32 222 // FTDI Chip FT32 high performance 32-bit RISC architecture 311 #define EM_MOXIE 223 // Moxie processor family 312 #define EM_AMDGPU 224 // AMD GPU architecture 313 #define EM_RISCV 243 // RISC-V 314 #define EM_LANAI 244 // Lanai processor 315 #define EM_CEVA 245 // CEVA Processor Architecture Family 316 #define EM_CEVA_X2 246 // CEVA X2 Processor Family 317 #define EM_BPF 247 // Linux BPF – in-kernel virtual machine 318 #define EM_GRAPHCORE_IPU 248 // Graphcore Intelligent Processing Unit 319 #define EM_IMG1 249 // Imagination Technologies 320 #define EM_NFP 250 // Netronome Flow Processor (P) 321 #define EM_CSKY 252 // C-SKY processor family 322 #define EM_ARC_COMPACT3_64 253 // "Synopsys ARCv2.3 64-bit"; 323 #define EM_MCS6502 254 // "MOS Technology MCS 6502 processor"; 324 #define EM_ARC_COMPACT3 255 // "Synopsys ARCv2.3 32-bit"; 325 #define EM_KVX 256 // "Kalray VLIW core of the MPPA processor family"; 326 #define EM_65816 257 // "WDC 65816/65C816"; 327 #define EM_LOONGARCH 258 // "Loongson Loongarch"; 328 #define EM_KF32 259 // "ChipON KungFu32"; 329 330 #define EM_MT 0x2530 // "Morpho Techologies MT processor"; 331 #define EM_ALPHA 0x9026 // "Alpha"; 332 #define EM_WEBASSEMBLY 0x4157 // "Web Assembly"; 333 #define EM_DLX 0x5aa5 // "OpenDLX"; 334 #define EM_XSTORMY16 0xad45 // "Sanyo XStormy16 CPU core"; 335 #define EM_IQ2000 0xFEBA // "Vitesse IQ2000"; 336 #define EM_M32C_OLD 0xFEB0 337 #define EM_NIOS32 0xFEBB // "Altera Nios"; 338 #define EM_CYGNUS_MEP 0xF00D // "Toshiba MeP Media Engine"; 339 #define EM_ADAPTEVA_EPIPHANY 0x1223 // "Adapteva EPIPHANY"; 340 #define EM_CYGNUS_FRV 0x5441 // "Fujitsu FR-V"; 341 #define EM_S12Z 0x4DEF // "Freescale S12Z"; 342 343 // File version 344 #define EV_NONE 0 345 #define EV_CURRENT 1 346 347 // Identification index 348 #define EI_MAG0 0 349 #define EI_MAG1 1 350 #define EI_MAG2 2 351 #define EI_MAG3 3 352 #define EI_CLASS 4 353 #define EI_DATA 5 354 #define EI_VERSION 6 355 #define EI_OSABI 7 356 #define EI_ABIVERSION 8 357 #define EI_PAD 9 358 #define EI_NIDENT 16 359 360 // Magic number 361 #define ELFMAG0 0x7F 362 #define ELFMAG1 'E' 363 #define ELFMAG2 'L' 364 #define ELFMAG3 'F' 365 366 // File class 367 #define ELFCLASSNONE 0 368 #define ELFCLASS32 1 369 #define ELFCLASS64 2 370 371 // Encoding 372 #define ELFDATANONE 0 373 #define ELFDATA2LSB 1 374 #define ELFDATA2MSB 2 375 376 // OS extensions 377 #define ELFOSABI_NONE 0 // No extensions or unspecified 378 #define ELFOSABI_HPUX 1 // Hewlett-Packard HP-UX 379 #define ELFOSABI_NETBSD 2 // NetBSD 380 #define ELFOSABI_LINUX 3 // Linux 381 #define ELFOSABI_SOLARIS 6 // Sun Solaris 382 #define ELFOSABI_AIX 7 // AIX 383 #define ELFOSABI_IRIX 8 // IRIX 384 #define ELFOSABI_FREEBSD 9 // FreeBSD 385 #define ELFOSABI_TRU64 10 // Compaq TRU64 UNIX 386 #define ELFOSABI_MODESTO 11 // Novell Modesto 387 #define ELFOSABI_OPENBSD 12 // Open BSD 388 #define ELFOSABI_OPENVMS 13 // Open VMS 389 #define ELFOSABI_NSK 14 // Hewlett-Packard Non-Stop Kernel 390 #define ELFOSABI_AROS 15 // Amiga Research OS 391 #define ELFOSABI_FENIXOS 16 // The FenixOS highly scalable multi-core OS 392 393 // 64-255 Architecture-specific value range 394 // AMDGPU OS for HSA compatible compute kernels 395 #define ELFOSABI_AMDGPU_HSA 64 396 // AMDGPU OS for AMD PAL compatible graphics 397 // shaders and compute kernels 398 #define ELFOSABI_AMDGPU_PAL 65 399 // AMDGPU OS for Mesa3D compatible graphics 400 // shaders and compute kernels 401 #define ELFOSABI_AMDGPU_MESA3D 66 402 403 // AMDGPU specific e_flags 404 #define EF_AMDGPU_MACH 0x0ff // AMDGPU processor selection mask. 405 // Indicates if the XNACK target feature is 406 // enabled for all code contained in the ELF. 407 #define EF_AMDGPU_XNACK 0x100 408 // AMDGPU processors 409 #define EF_AMDGPU_MACH_NONE 0x000 // Unspecified processor. 410 #define EF_AMDGPU_MACH_R600_R600 0x001 411 #define EF_AMDGPU_MACH_R600_R630 0x002 412 #define EF_AMDGPU_MACH_R600_RS880 0x003 413 #define EF_AMDGPU_MACH_R600_RV670 0x004 414 #define EF_AMDGPU_MACH_R600_RV710 0x005 415 #define EF_AMDGPU_MACH_R600_RV730 0x006 416 #define EF_AMDGPU_MACH_R600_RV770 0x007 417 #define EF_AMDGPU_MACH_R600_CEDAR 0x008 418 #define EF_AMDGPU_MACH_R600_CYPRESS 0x009 419 #define EF_AMDGPU_MACH_R600_JUNIPER 0x00a 420 #define EF_AMDGPU_MACH_R600_REDWOOD 0x00b 421 #define EF_AMDGPU_MACH_R600_SUMO 0x00c 422 #define EF_AMDGPU_MACH_R600_BARTS 0x00d 423 #define EF_AMDGPU_MACH_R600_CAICOS 0x00e 424 #define EF_AMDGPU_MACH_R600_CAYMAN 0x00f 425 #define EF_AMDGPU_MACH_R600_TURKS 0x010 426 #define EF_AMDGPU_MACH_R600_RESERVED_FIRST 0x011 427 #define EF_AMDGPU_MACH_R600_RESERVED_LAST 0x01f 428 #define EF_AMDGPU_MACH_R600_FIRST EF_AMDGPU_MACH_R600_R600 429 #define EF_AMDGPU_MACH_R600_LAST EF_AMDGPU_MACH_R600_TURKS 430 #define EF_AMDGPU_MACH_AMDGCN_GFX600 0x020 431 #define EF_AMDGPU_MACH_AMDGCN_GFX601 0x021 432 #define EF_AMDGPU_MACH_AMDGCN_GFX700 0x022 433 #define EF_AMDGPU_MACH_AMDGCN_GFX701 0x023 434 #define EF_AMDGPU_MACH_AMDGCN_GFX702 0x024 435 #define EF_AMDGPU_MACH_AMDGCN_GFX703 0x025 436 #define EF_AMDGPU_MACH_AMDGCN_GFX704 0x026 437 #define EF_AMDGPU_MACH_AMDGCN_GFX801 0x028 438 #define EF_AMDGPU_MACH_AMDGCN_GFX802 0x029 439 #define EF_AMDGPU_MACH_AMDGCN_GFX803 0x02a 440 #define EF_AMDGPU_MACH_AMDGCN_GFX810 0x02b 441 #define EF_AMDGPU_MACH_AMDGCN_GFX900 0x02c 442 #define EF_AMDGPU_MACH_AMDGCN_GFX902 0x02d 443 #define EF_AMDGPU_MACH_AMDGCN_GFX904 0x02e 444 #define EF_AMDGPU_MACH_AMDGCN_GFX906 0x02f 445 #define EF_AMDGPU_MACH_AMDGCN_RESERVED0 0x027 446 #define EF_AMDGPU_MACH_AMDGCN_RESERVED1 0x030 447 #define EF_AMDGPU_MACH_AMDGCN_FIRST EF_AMDGPU_MACH_AMDGCN_GFX600 448 #define EF_AMDGPU_MACH_AMDGCN_LAST EF_AMDGPU_MACH_AMDGCN_GFX906 449 450 ///////////////////// 451 // Sections constants 452 453 // Section indexes 454 #define SHN_UNDEF 0 455 #define SHN_LORESERVE 0xFF00 456 #define SHN_LOPROC 0xFF00 457 #define SHN_HIPROC 0xFF1F 458 #define SHN_LOOS 0xFF20 459 #define SHN_HIOS 0xFF3F 460 #define SHN_ABS 0xFFF1 461 #define SHN_COMMON 0xFFF2 462 #define SHN_XINDEX 0xFFFF 463 #define SHN_HIRESERVE 0xFFFF 464 465 // Section types 466 #define SHT_NULL 0 467 #define SHT_PROGBITS 1 468 #define SHT_SYMTAB 2 469 #define SHT_STRTAB 3 470 #define SHT_RELA 4 471 #define SHT_HASH 5 472 #define SHT_DYNAMIC 6 473 #define SHT_NOTE 7 474 #define SHT_NOBITS 8 475 #define SHT_REL 9 476 #define SHT_SHLIB 10 477 #define SHT_DYNSYM 11 478 #define SHT_INIT_ARRAY 14 479 #define SHT_FINI_ARRAY 15 480 #define SHT_PREINIT_ARRAY 16 481 #define SHT_GROUP 17 482 #define SHT_SYMTAB_SHNDX 18 483 #define SHT_LOOS 0x60000000 484 #define SHT_HIOS 0x6fffffff 485 #define SHT_LOPROC 0x70000000 486 #define SHT_HIPROC 0x7FFFFFFF 487 #define SHT_LOUSER 0x80000000 488 #define SHT_HIUSER 0xFFFFFFFF 489 490 // Section attribute flags 491 #define SHF_WRITE 0x1 492 #define SHF_ALLOC 0x2 493 #define SHF_EXECINSTR 0x4 494 #define SHF_MERGE 0x10 495 #define SHF_STRINGS 0x20 496 #define SHF_INFO_LINK 0x40 497 #define SHF_LINK_ORDER 0x80 498 #define SHF_OS_NONCONFORMING 0x100 499 #define SHF_GROUP 0x200 500 #define SHF_TLS 0x400 501 #define SHF_MASKOS 0x0ff00000 502 #define SHF_MASKPROC 0xF0000000 503 504 // Section group flags 505 #define GRP_COMDAT 0x1 506 #define GRP_MASKOS 0x0ff00000 507 #define GRP_MASKPROC 0xf0000000 508 509 // Symbol binding 510 #define STB_LOCAL 0 511 #define STB_GLOBAL 1 512 #define STB_WEAK 2 513 #define STB_LOOS 10 514 #define STB_HIOS 12 515 #define STB_MULTIDEF 13 516 #define STB_LOPROC 13 517 #define STB_HIPROC 15 518 519 // Note types 520 #define NT_AMDGPU_METADATA 1 521 #define NT_AMD_AMDGPU_HSA_METADATA 10 522 #define NT_AMD_AMDGPU_ISA 11 523 #define NT_AMD_AMDGPU_PAL_METADATA 12 524 525 // Symbol types 526 #define STT_NOTYPE 0 527 #define STT_OBJECT 1 528 #define STT_FUNC 2 529 #define STT_SECTION 3 530 #define STT_FILE 4 531 #define STT_COMMON 5 532 #define STT_TLS 6 533 #define STT_LOOS 10 534 #define STT_AMDGPU_HSA_KERNEL 10 535 #define STT_HIOS 12 536 #define STT_LOPROC 13 537 #define STT_HIPROC 15 538 539 // Symbol visibility 540 #define STV_DEFAULT 0 541 #define STV_INTERNAL 1 542 #define STV_HIDDEN 2 543 #define STV_PROTECTED 3 544 545 // Undefined name 546 #define STN_UNDEF 0 547 548 // Relocation types 549 #define R_386_NONE 0 550 #define R_X86_64_NONE 0 551 #define R_AMDGPU_NONE 0 552 #define R_386_32 1 553 #define R_X86_64_64 1 554 #define R_AMDGPU_ABS32_LO 1 555 #define R_386_PC32 2 556 #define R_X86_64_PC32 2 557 #define R_AMDGPU_ABS32_HI 2 558 #define R_386_GOT32 3 559 #define R_X86_64_GOT32 3 560 #define R_AMDGPU_ABS64 3 561 #define R_386_PLT32 4 562 #define R_X86_64_PLT32 4 563 #define R_AMDGPU_REL32 4 564 #define R_386_COPY 5 565 #define R_X86_64_COPY 5 566 #define R_AMDGPU_REL64 5 567 #define R_386_GLOB_DAT 6 568 #define R_X86_64_GLOB_DAT 6 569 #define R_AMDGPU_ABS32 6 570 #define R_386_JMP_SLOT 7 571 #define R_X86_64_JUMP_SLOT 7 572 #define R_AMDGPU_GOTPCREL 7 573 #define R_386_RELATIVE 8 574 #define R_X86_64_RELATIVE 8 575 #define R_AMDGPU_GOTPCREL32_LO 8 576 #define R_386_GOTOFF 9 577 #define R_X86_64_GOTPCREL 9 578 #define R_AMDGPU_GOTPCREL32_HI 9 579 #define R_386_GOTPC 10 580 #define R_X86_64_32 10 581 #define R_AMDGPU_REL32_LO 10 582 #define R_386_32PLT 11 583 #define R_X86_64_32S 11 584 #define R_AMDGPU_REL32_HI 11 585 #define R_X86_64_16 12 586 #define R_X86_64_PC16 13 587 #define R_AMDGPU_RELATIVE64 13 588 #define R_386_TLS_TPOFF 14 589 #define R_X86_64_8 14 590 #define R_386_TLS_IE 15 591 #define R_X86_64_PC8 15 592 #define R_386_TLS_GOTIE 16 593 #define R_X86_64_DTPMOD64 16 594 #define R_386_TLS_LE 17 595 #define R_X86_64_DTPOFF64 17 596 #define R_386_TLS_GD 18 597 #define R_X86_64_TPOFF64 18 598 #define R_386_TLS_LDM 19 599 #define R_X86_64_TLSGD 19 600 #define R_386_16 20 601 #define R_X86_64_TLSLD 20 602 #define R_386_PC16 21 603 #define R_X86_64_DTPOFF32 21 604 #define R_386_8 22 605 #define R_X86_64_GOTTPOFF 22 606 #define R_386_PC8 23 607 #define R_X86_64_TPOFF32 23 608 #define R_386_TLS_GD_32 24 609 #define R_X86_64_PC64 24 610 #define R_386_TLS_GD_PUSH 25 611 #define R_X86_64_GOTOFF64 25 612 #define R_386_TLS_GD_CALL 26 613 #define R_X86_64_GOTPC32 26 614 #define R_386_TLS_GD_POP 27 615 #define R_X86_64_GOT64 27 616 #define R_386_TLS_LDM_32 28 617 #define R_X86_64_GOTPCREL64 28 618 #define R_386_TLS_LDM_PUSH 29 619 #define R_X86_64_GOTPC64 29 620 #define R_386_TLS_LDM_CALL 30 621 #define R_X86_64_GOTPLT64 30 622 #define R_386_TLS_LDM_POP 31 623 #define R_X86_64_PLTOFF64 31 624 #define R_386_TLS_LDO_32 32 625 #define R_386_TLS_IE_32 33 626 #define R_386_TLS_LE_32 34 627 #define R_X86_64_GOTPC32_TLSDESC 34 628 #define R_386_TLS_DTPMOD32 35 629 #define R_X86_64_TLSDESC_CALL 35 630 #define R_386_TLS_DTPOFF32 36 631 #define R_X86_64_TLSDESC 36 632 #define R_386_TLS_TPOFF32 37 633 #define R_X86_64_IRELATIVE 37 634 #define R_386_SIZE32 38 635 #define R_386_TLS_GOTDESC 39 636 #define R_386_TLS_DESC_CALL 40 637 #define R_386_TLS_DESC 41 638 #define R_386_IRELATIVE 42 639 #define R_386_GOT32X 43 640 #define R_X86_64_GNU_VTINHERIT 250 641 #define R_X86_64_GNU_VTENTRY 251 642 643 // Segment types 644 #define PT_NULL 0 645 #define PT_LOAD 1 646 #define PT_DYNAMIC 2 647 #define PT_INTERP 3 648 #define PT_NOTE 4 649 #define PT_SHLIB 5 650 #define PT_PHDR 6 651 #define PT_TLS 7 652 #define PT_LOOS 0x60000000 653 #define PT_HIOS 0x6fffffff 654 #define PT_LOPROC 0x70000000 655 #define PT_HIPROC 0x7FFFFFFF 656 657 // Segment flags 658 #define PF_X 1 // Execute 659 #define PF_W 2 // Write 660 #define PF_R 4 // Read 661 #define PF_MASKOS 0x0ff00000 // Unspecified 662 #define PF_MASKPROC 0xf0000000 // Unspecified 663 664 // Dynamic Array Tags 665 #define DT_NULL 0 666 #define DT_NEEDED 1 667 #define DT_PLTRELSZ 2 668 #define DT_PLTGOT 3 669 #define DT_HASH 4 670 #define DT_STRTAB 5 671 #define DT_SYMTAB 6 672 #define DT_RELA 7 673 #define DT_RELASZ 8 674 #define DT_RELAENT 9 675 #define DT_STRSZ 10 676 #define DT_SYMENT 11 677 #define DT_INIT 12 678 #define DT_FINI 13 679 #define DT_SONAME 14 680 #define DT_RPATH 15 681 #define DT_SYMBOLIC 16 682 #define DT_REL 17 683 #define DT_RELSZ 18 684 #define DT_RELENT 19 685 #define DT_PLTREL 20 686 #define DT_DEBUG 21 687 #define DT_TEXTREL 22 688 #define DT_JMPREL 23 689 #define DT_BIND_NOW 24 690 #define DT_INIT_ARRAY 25 691 #define DT_FINI_ARRAY 26 692 #define DT_INIT_ARRAYSZ 27 693 #define DT_FINI_ARRAYSZ 28 694 #define DT_RUNPATH 29 695 #define DT_FLAGS 30 696 #define DT_ENCODING 32 697 #define DT_PREINIT_ARRAY 32 698 #define DT_PREINIT_ARRAYSZ 33 699 #define DT_MAXPOSTAGS 34 700 #define DT_LOOS 0x6000000D 701 #define DT_HIOS 0x6ffff000 702 #define DT_LOPROC 0x70000000 703 #define DT_HIPROC 0x7FFFFFFF 704 705 // DT_FLAGS values 706 #define DF_ORIGIN 0x1 707 #define DF_SYMBOLIC 0x2 708 #define DF_TEXTREL 0x4 709 #define DF_BIND_NOW 0x8 710 #define DF_STATIC_TLS 0x10 711 712 // ELF file header 713 struct Elf32_Ehdr 714 { 715 unsigned char e_ident[EI_NIDENT]; 716 Elf_Half e_type; 717 Elf_Half e_machine; 718 Elf_Word e_version; 719 Elf32_Addr e_entry; 720 Elf32_Off e_phoff; 721 Elf32_Off e_shoff; 722 Elf_Word e_flags; 723 Elf_Half e_ehsize; 724 Elf_Half e_phentsize; 725 Elf_Half e_phnum; 726 Elf_Half e_shentsize; 727 Elf_Half e_shnum; 728 Elf_Half e_shstrndx; 729 }; 730 731 struct Elf64_Ehdr 732 { 733 unsigned char e_ident[EI_NIDENT]; 734 Elf_Half e_type; 735 Elf_Half e_machine; 736 Elf_Word e_version; 737 Elf64_Addr e_entry; 738 Elf64_Off e_phoff; 739 Elf64_Off e_shoff; 740 Elf_Word e_flags; 741 Elf_Half e_ehsize; 742 Elf_Half e_phentsize; 743 Elf_Half e_phnum; 744 Elf_Half e_shentsize; 745 Elf_Half e_shnum; 746 Elf_Half e_shstrndx; 747 }; 748 749 // Section header 750 struct Elf32_Shdr 751 { 752 Elf_Word sh_name; 753 Elf_Word sh_type; 754 Elf_Word sh_flags; 755 Elf32_Addr sh_addr; 756 Elf32_Off sh_offset; 757 Elf_Word sh_size; 758 Elf_Word sh_link; 759 Elf_Word sh_info; 760 Elf_Word sh_addralign; 761 Elf_Word sh_entsize; 762 }; 763 764 struct Elf64_Shdr 765 { 766 Elf_Word sh_name; 767 Elf_Word sh_type; 768 Elf_Xword sh_flags; 769 Elf64_Addr sh_addr; 770 Elf64_Off sh_offset; 771 Elf_Xword sh_size; 772 Elf_Word sh_link; 773 Elf_Word sh_info; 774 Elf_Xword sh_addralign; 775 Elf_Xword sh_entsize; 776 }; 777 778 // Segment header 779 struct Elf32_Phdr 780 { 781 Elf_Word p_type; 782 Elf32_Off p_offset; 783 Elf32_Addr p_vaddr; 784 Elf32_Addr p_paddr; 785 Elf_Word p_filesz; 786 Elf_Word p_memsz; 787 Elf_Word p_flags; 788 Elf_Word p_align; 789 }; 790 791 struct Elf64_Phdr 792 { 793 Elf_Word p_type; 794 Elf_Word p_flags; 795 Elf64_Off p_offset; 796 Elf64_Addr p_vaddr; 797 Elf64_Addr p_paddr; 798 Elf_Xword p_filesz; 799 Elf_Xword p_memsz; 800 Elf_Xword p_align; 801 }; 802 803 // Symbol table entry 804 struct Elf32_Sym 805 { 806 Elf_Word st_name; 807 Elf32_Addr st_value; 808 Elf_Word st_size; 809 unsigned char st_info; 810 unsigned char st_other; 811 Elf_Half st_shndx; 812 }; 813 814 struct Elf64_Sym 815 { 816 Elf_Word st_name; 817 unsigned char st_info; 818 unsigned char st_other; 819 Elf_Half st_shndx; 820 Elf64_Addr st_value; 821 Elf_Xword st_size; 822 }; 823 824 #define ELF_ST_BIND( i ) ( ( i ) >> 4 ) 825 #define ELF_ST_TYPE( i ) ( (i)&0xf ) 826 #define ELF_ST_INFO( b, t ) ( ( ( b ) << 4 ) + ( (t)&0xf ) ) 827 828 #define ELF_ST_VISIBILITY( o ) ( (o)&0x3 ) 829 830 // Relocation entries 831 struct Elf32_Rel 832 { 833 Elf32_Addr r_offset; 834 Elf_Word r_info; 835 }; 836 837 struct Elf32_Rela 838 { 839 Elf32_Addr r_offset; 840 Elf_Word r_info; 841 Elf_Sword r_addend; 842 }; 843 844 struct Elf64_Rel 845 { 846 Elf64_Addr r_offset; 847 Elf_Xword r_info; 848 }; 849 850 struct Elf64_Rela 851 { 852 Elf64_Addr r_offset; 853 Elf_Xword r_info; 854 Elf_Sxword r_addend; 855 }; 856 857 #define ELF32_R_SYM( i ) ( ( i ) >> 8 ) 858 #define ELF32_R_TYPE( i ) ( (unsigned char)( i ) ) 859 #define ELF32_R_INFO( s, t ) ( ( ( s ) << 8 ) + (unsigned char)( t ) ) 860 861 #define ELF64_R_SYM( i ) ( ( i ) >> 32 ) 862 #define ELF64_R_TYPE( i ) ( (i)&0xffffffffL ) 863 #define ELF64_R_INFO( s, t ) \ 864 ( ( ( ( int64_t )( s ) ) << 32 ) + ( (t)&0xffffffffL ) ) 865 866 // Dynamic structure 867 struct Elf32_Dyn 868 { 869 Elf_Sword d_tag; 870 union { 871 Elf_Word d_val; 872 Elf32_Addr d_ptr; 873 } d_un; 874 }; 875 876 struct Elf64_Dyn 877 { 878 Elf_Sxword d_tag; 879 union { 880 Elf_Xword d_val; 881 Elf64_Addr d_ptr; 882 } d_un; 883 }; 884 885 #ifdef __cplusplus 886 } // namespace ELFIO 887 #endif 888 889 #endif // ELFTYPES_H 890