1# Check 32bit AVX512{BITALG,VL} instructions 2 3 .allow_index_reg 4 .text 5_start: 6 vpshufbitqmb %xmm4, %xmm5, %k5{%k7} # AVX512{BITALG,VL} 7 vpshufbitqmb -123456(%esp,%esi,8), %xmm5, %k5{%k7} # AVX512{BITALG,VL} 8 vpshufbitqmb 2032(%edx), %xmm5, %k5{%k7} # AVX512{BITALG,VL} Disp8 9 vpshufbitqmb %ymm4, %ymm5, %k5{%k7} # AVX512{BITALG,VL} 10 vpshufbitqmb -123456(%esp,%esi,8), %ymm5, %k5{%k7} # AVX512{BITALG,VL} 11 vpshufbitqmb 4064(%edx), %ymm5, %k5{%k7} # AVX512{BITALG,VL} Disp8 12 13 vpopcntb %xmm5, %xmm6{%k7} # AVX512{BITALG,VL} 14 vpopcntb %xmm5, %xmm6{%k7}{z} # AVX512{BITALG,VL} 15 vpopcntb -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BITALG,VL} 16 vpopcntb 2032(%edx), %xmm6{%k7} # AVX512{BITALG,VL} Disp8 17 vpopcntb %ymm5, %ymm6{%k7} # AVX512{BITALG,VL} 18 vpopcntb %ymm5, %ymm6{%k7}{z} # AVX512{BITALG,VL} 19 vpopcntb -123456(%esp,%esi,8), %ymm6{%k7} # AVX512{BITALG,VL} 20 vpopcntb 4064(%edx), %ymm6{%k7} # AVX512{BITALG,VL} Disp8 21 22 vpopcntw %xmm5, %xmm6{%k7} # AVX512{BITALG,VL} 23 vpopcntw %xmm5, %xmm6{%k7}{z} # AVX512{BITALG,VL} 24 vpopcntw -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BITALG,VL} 25 vpopcntw 2032(%edx), %xmm6{%k7} # AVX512{BITALG,VL} Disp8 26 vpopcntw %ymm5, %ymm6{%k7} # AVX512{BITALG,VL} 27 vpopcntw %ymm5, %ymm6{%k7}{z} # AVX512{BITALG,VL} 28 vpopcntw -123456(%esp,%esi,8), %ymm6{%k7} # AVX512{BITALG,VL} 29 vpopcntw 4064(%edx), %ymm6{%k7} # AVX512{BITALG,VL} Disp8 30 31 vpopcntd %xmm5, %xmm6{%k7} # AVX512{BITALG,VL} 32 vpopcntd %xmm5, %xmm6{%k7}{z} # AVX512{BITALG,VL} 33 vpopcntd -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BITALG,VL} 34 vpopcntd 2032(%edx), %xmm6{%k7} # AVX512{BITALG,VL} Disp8 35 vpopcntd 508(%edx){1to4}, %xmm6{%k7} # AVX512{BITALG,VL} Disp8 36 vpopcntd %ymm5, %ymm6{%k7} # AVX512{BITALG,VL} 37 vpopcntd %ymm5, %ymm6{%k7}{z} # AVX512{BITALG,VL} 38 vpopcntd -123456(%esp,%esi,8), %ymm6{%k7} # AVX512{BITALG,VL} 39 vpopcntd 4064(%edx), %ymm6{%k7} # AVX512{BITALG,VL} Disp8 40 vpopcntd 508(%edx){1to8}, %ymm6{%k7} # AVX512{BITALG,VL} Disp8 41 42 vpopcntq %xmm5, %xmm6{%k7} # AVX512{BITALG,VL} 43 vpopcntq %xmm5, %xmm6{%k7}{z} # AVX512{BITALG,VL} 44 vpopcntq -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{BITALG,VL} 45 vpopcntq 2032(%edx), %xmm6{%k7} # AVX512{BITALG,VL} Disp8 46 vpopcntq 1016(%edx){1to2}, %xmm6{%k7} # AVX512{BITALG,VL} Disp8 47 vpopcntq %ymm5, %ymm6{%k7} # AVX512{BITALG,VL} 48 vpopcntq %ymm5, %ymm6{%k7}{z} # AVX512{BITALG,VL} 49 vpopcntq -123456(%esp,%esi,8), %ymm6{%k7} # AVX512{BITALG,VL} 50 vpopcntq 4064(%edx), %ymm6{%k7} # AVX512{BITALG,VL} Disp8 51 vpopcntq 1016(%edx){1to4}, %ymm6{%k7} # AVX512{BITALG,VL} Disp8 52 53 .intel_syntax noprefix 54 vpshufbitqmb k5{k7}, xmm5, xmm4 # AVX512{BITALG,VL} 55 vpshufbitqmb k5{k7}, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 56 vpshufbitqmb k5{k7}, xmm5, XMMWORD PTR [edx+2032] # AVX512{BITALG,VL} Disp8 57 vpshufbitqmb k5{k7}, ymm5, ymm4 # AVX512{BITALG,VL} 58 vpshufbitqmb k5{k7}, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 59 vpshufbitqmb k5{k7}, ymm5, YMMWORD PTR [edx+4064] # AVX512{BITALG,VL} Disp8 60 61 vpopcntb xmm6{k7}, xmm5 # AVX512{BITALG,VL} 62 vpopcntb xmm6{k7}{z}, xmm5 # AVX512{BITALG,VL} 63 vpopcntb xmm6{k7}, XMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 64 vpopcntb xmm6{k7}, XMMWORD PTR [edx+2032] # AVX512{BITALG,VL} Disp8 65 vpopcntb ymm6{k7}, ymm5 # AVX512{BITALG,VL} 66 vpopcntb ymm6{k7}{z}, ymm5 # AVX512{BITALG,VL} 67 vpopcntb ymm6{k7}, YMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 68 vpopcntb ymm6{k7}, YMMWORD PTR [edx+4064] # AVX512{BITALG,VL} Disp8 69 70 vpopcntw xmm6{k7}, xmm5 # AVX512{BITALG,VL} 71 vpopcntw xmm6{k7}{z}, xmm5 # AVX512{BITALG,VL} 72 vpopcntw xmm6{k7}, XMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 73 vpopcntw xmm6{k7}, XMMWORD PTR [edx+2032] # AVX512{BITALG,VL} Disp8 74 vpopcntw ymm6{k7}, ymm5 # AVX512{BITALG,VL} 75 vpopcntw ymm6{k7}{z}, ymm5 # AVX512{BITALG,VL} 76 vpopcntw ymm6{k7}, YMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 77 vpopcntw ymm6{k7}, YMMWORD PTR [edx+4064] # AVX512{BITALG,VL} Disp8 78 79 vpopcntd xmm6{k7}, xmm5 # AVX512{BITALG,VL} 80 vpopcntd xmm6{k7}{z}, xmm5 # AVX512{BITALG,VL} 81 vpopcntd xmm6{k7}, XMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 82 vpopcntd xmm6{k7}, XMMWORD PTR [edx+2032] # AVX512{BITALG,VL} Disp8 83 vpopcntd xmm6{k7}, [edx+508]{1to4} # AVX512{BITALG,VL} Disp8 84 vpopcntd xmm6{k7}, DWORD PTR [edx]{1to4} # AVX512{BITALG,VL} 85 vpopcntd ymm6{k7}, ymm5 # AVX512{BITALG,VL} 86 vpopcntd ymm6{k7}{z}, ymm5 # AVX512{BITALG,VL} 87 vpopcntd ymm6{k7}, YMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 88 vpopcntd ymm6{k7}, YMMWORD PTR [edx+4064] # AVX512{BITALG,VL} Disp8 89 vpopcntd ymm6{k7}, [edx+508]{1to8} # AVX512{BITALG,VL} Disp8 90 vpopcntd ymm6{k7}, DWORD PTR [edx]{1to8} # AVX512{BITALG,VL} 91 92 vpopcntq xmm6{k7}, xmm5 # AVX512{BITALG,VL} 93 vpopcntq xmm6{k7}{z}, xmm5 # AVX512{BITALG,VL} 94 vpopcntq xmm6{k7}, XMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 95 vpopcntq xmm6{k7}, XMMWORD PTR [edx+2032] # AVX512{BITALG,VL} Disp8 96 vpopcntq xmm6{k7}, [edx+1016]{1to2} # AVX512{BITALG,VL} Disp8 97 vpopcntq xmm6{k7}, QWORD PTR [edx]{1to2} # AVX512{BITALG,VL} 98 vpopcntq ymm6{k7}, ymm5 # AVX512{BITALG,VL} 99 vpopcntq ymm6{k7}{z}, ymm5 # AVX512{BITALG,VL} 100 vpopcntq ymm6{k7}, YMMWORD PTR [esp+esi*8-123456] # AVX512{BITALG,VL} 101 vpopcntq ymm6{k7}, YMMWORD PTR [edx+4064] # AVX512{BITALG,VL} Disp8 102 vpopcntq ymm6{k7}, [edx+1016]{1to4} # AVX512{BITALG,VL} Disp8 103 vpopcntq ymm6{k7}, QWORD PTR [edx]{1to4} # AVX512{BITALG,VL 104